tree b97f9f4b0fd8160339a223544285a72479b7af71
parent f5cdc11775c4b7fdbf52a6dd2f463d329804ab11
author Dirk Behme <dirk.behme@de.bosch.com> 1334263574 +0000
committer Albert ARIBAUD <albert.u.boot@aribaud.net> 1334670082 +0200

i.MX6: arm2: Add AXI cache and Qos setting

Do the same AXI cache and Qos settings done already in the
SabreLite imximage.cfg for the ARM2 board, too.

It fixes a display flash issue caused by low priority of
the display IDMA channel.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
Acked-by: Jason Liu <r64343@freescale.com>