[FOSS_TLK]platform: tegra: merge the preempted_by_irq/fs SMCs

Instead of maintaining two different SMCs for the "preempted" scenario,
we can make use of a common SMC_TOS_PREEMPTED. The error code in the
frame pointer is all that the NS world needs to differentiate between
scenarios. We store this error code before restoring the NS world
context and pass it as the error code in r0. This way the entire
mechanism becomes scalable.

Change-Id: I7eba10e14effca774fa37e2c26a3e1753032035c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/715771
Reviewed-by: Automatic_Commit_Validation_User
diff --git a/arch/arm/arm/monitor_vectors.S b/arch/arm/arm/monitor_vectors.S
index 377e0aa..d7b43f6 100644
--- a/arch/arm/arm/monitor_vectors.S
+++ b/arch/arm/arm/monitor_vectors.S
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2014, NVIDIA CORPORATION. All rights reserved
+ * Copyright (c) 2012-2015, NVIDIA CORPORATION. All rights reserved
  *
  * Permission is hereby granted, free of charge, to any person obtaining
  * a copy of this software and associated documentation files
@@ -192,13 +192,9 @@
 	cmp	r0, r2
 	beq	restore_stdcall_state
 
-	mov32	r2, SMC_TOS_PREEMPT_BY_IRQ
+	mov32	r2, SMC_TOS_PREEMPTED
 	cmp	r0, r2
-	beq	preempt_by_irq
-
-	mov32	r2, SMC_TOS_PREEMPT_BY_FS
-	cmp	r0, r2
-	beq	preempt_by_fs
+	beq	return_preempted
 
 	/* for INITIAL_NS_RETURN restore from arg */
 	RESTORE_MON_FRAME_FROM_ARG r1
@@ -208,14 +204,12 @@
 	RESTORE_NS_STATE
 	movs	pc, r14
 
-preempt_by_irq:
+return_preempted:
+	/* return the preempted-by code */
+	ldr	r0, [r1]	/* load frame->r[0] */
+	push	{ r0 }
 	RESTORE_NS_STATE
-	mov	r0, #SMC_ERR_PREEMPT_BY_IRQ
-	movs	pc, r14
-
-preempt_by_fs:
-	RESTORE_NS_STATE
-	mov	r0, #SMC_ERR_PREEMPT_BY_FS
+	pop	{ r0 }
 	movs	pc, r14
 
 .globl mon_fastcall_frame_addr
diff --git a/include/lib/monitor/monitor_vector.h b/include/lib/monitor/monitor_vector.h
index d992f48..aab82b3 100644
--- a/include/lib/monitor/monitor_vector.h
+++ b/include/lib/monitor/monitor_vector.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved
+ * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved
  *
  * Permission is hereby granted, free of charge, to any person obtaining
  * a copy of this software and associated documentation files
@@ -98,18 +98,16 @@
 
 /* Trusted OS issued SMC (i.e. generated from the TLK kernel) */
 #define SMC_TOS_CALL			(0x32 << SMC_OWNER_SHIFT)
-#define SMC_TOS_FROM_SECURE		(1 << 15)
-#define SMC_TOS_PREEMPT			(1 << 12)
 
 #if ARCH_ARM
 /* TOS 32bit secure fastcalls */
 #define SMC_TOS_SECURE	(SMC_FASTCALL | SMC_TOS_CALL | \
-			 SMC_TOS_FROM_SECURE | SMC_CALLING_CONVENTION_32)
+			 SMC_CALLING_CONVENTION_32)
 #endif
 #if ARCH_ARM64
 /* TOS 64bit secure fastcalls */
 #define SMC_TOS_SECURE	(SMC_FASTCALL | SMC_TOS_CALL | \
-			 SMC_TOS_FROM_SECURE | SMC_CALLING_CONVENTION_64)
+			 SMC_CALLING_CONVENTION_64)
 #endif
 
 /* low byte used as jump table idx */
@@ -117,12 +115,10 @@
 
 /* TOS issued SMCs (update MAX_FUNC_IDX when adding new calls) */
 #define	SMC_TOS_COMPLETION		(SMC_TOS_SECURE | 0x1)
-#define	SMC_TOS_PREEMPT_BY_IRQ		(SMC_TOS_SECURE | SMC_TOS_PREEMPT | 0x2)
-#define	SMC_TOS_PREEMPT_BY_FS		(SMC_TOS_SECURE | SMC_TOS_PREEMPT | 0x3)
-#define	SMC_TOS_INITIAL_NS_RETURN	(SMC_TOS_SECURE | 0x4)
-#define	SMC_TOS_ADDR_TRANSLATE		(SMC_TOS_SECURE | 0x5)
-#define	SMC_TOS_INIT_SHARED_ADDR	(SMC_TOS_SECURE | 0x6)
-#define	SMC_TOS_MAX_FUNC_IDX		0x6
+#define	SMC_TOS_PREEMPTED		(SMC_TOS_SECURE | 0x2)
+#define	SMC_TOS_INITIAL_NS_RETURN	(SMC_TOS_SECURE | 0x3)
+#define	SMC_TOS_ADDR_TRANSLATE		(SMC_TOS_SECURE | 0x4)
+#define	SMC_TOS_INIT_SHARED_ADDR	(SMC_TOS_SECURE | 0x5)
 
 /* restart pre-empted SMC handling */
 #define SMC_TOS_RESTART			(60 << 24)
diff --git a/platform/tegra/common/interrupts.c b/platform/tegra/common/interrupts.c
index 1587d01..641859d 100644
--- a/platform/tegra/common/interrupts.c
+++ b/platform/tegra/common/interrupts.c
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2008 Travis Geiselbrecht
- * Copyright (c) 2012-2014, NVIDIA CORPORATION. All rights reserved
+ * Copyright (c) 2012-2015, NVIDIA CORPORATION. All rights reserved
  *
  * Permission is hereby granted, free of charge, to any person obtaining
  * a copy of this software and associated documentation files
@@ -136,8 +136,7 @@
 
 	memset(&frame, 0, sizeof(struct tz_monitor_frame));
 	frame.r[0] = SMC_ERR_PREEMPT_BY_IRQ;
-
-	(void)tz_switch_to_ns(SMC_TOS_PREEMPT_BY_IRQ, &frame);
+	(void)tz_switch_to_ns(SMC_TOS_PREEMPTED, &frame);
 
 	return INT_NO_RESCHEDULE;
 }
diff --git a/platform/tegra/common/platform.c b/platform/tegra/common/platform.c
index 3a9bac4..92fe45a 100644
--- a/platform/tegra/common/platform.c
+++ b/platform/tegra/common/platform.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2014, NVIDIA CORPORATION. All rights reserved
+ * Copyright (c) 2012-2015, NVIDIA CORPORATION. All rights reserved
  *
  * Permission is hereby granted, free of charge, to any person obtaining
  * a copy of this software and associated documentation files
@@ -224,7 +224,7 @@
 	memset(&frame, 0, sizeof(struct tz_monitor_frame));
 	frame.r[0] = SMC_ERR_PREEMPT_BY_FS;
 
-	(void)tz_switch_to_ns(SMC_TOS_PREEMPT_BY_FS, &frame);
+	(void)tz_switch_to_ns(SMC_TOS_PREEMPTED, &frame);
 
 	return 0;
 }