]> nv-tegra.nvidia Code Review - linux-3.10.git/commitdiff
Merge refs/heads/ieee80211-wifi from master.kernel.org:/pub/scm/linux/kernel/git...
authorLinus Torvalds <torvalds@evo.osdl.org>
Fri, 2 Sep 2005 09:01:35 +0000 (02:01 -0700)
committerLinus Torvalds <torvalds@evo.osdl.org>
Fri, 2 Sep 2005 09:01:35 +0000 (02:01 -0700)
147 files changed:
Documentation/serial/driver
MAINTAINERS
arch/arm/Kconfig
arch/arm/common/gic.c
arch/arm/kernel/calls.S
arch/arm/kernel/entry-common.S
arch/arm/kernel/sys_arm.c
arch/arm/kernel/time.c
arch/arm/mach-ixp4xx/common.c
arch/arm/mach-ixp4xx/coyote-pci.c
arch/arm/mach-ixp4xx/coyote-setup.c
arch/arm/mach-ixp4xx/gtwx5715-pci.c
arch/arm/mach-ixp4xx/gtwx5715-setup.c
arch/arm/mach-ixp4xx/ixdp425-pci.c
arch/arm/mach-ixp4xx/ixdp425-setup.c
arch/arm/mach-ixp4xx/ixdpg425-pci.c
arch/arm/mach-pxa/time.c
arch/arm/mach-s3c2410/clock.c
arch/arm/mach-s3c2410/s3c2440-clock.c
arch/arm/mach-sa1100/time.c
arch/arm/mm/alignment.c
arch/arm/mm/mm-armv.c
arch/ia64/Kconfig
arch/ia64/hp/sim/boot/fw-emu.c
arch/ia64/ia32/ia32_signal.c
arch/ia64/kernel/Makefile
arch/ia64/kernel/cpufreq/Kconfig [new file with mode: 0644]
arch/ia64/kernel/cpufreq/Makefile [new file with mode: 0644]
arch/ia64/kernel/cpufreq/acpi-cpufreq.c [new file with mode: 0644]
arch/ia64/kernel/sys_ia64.c
arch/ia64/kernel/uncached.c
arch/ia64/lib/Makefile
arch/ia64/lib/swiotlb.c
arch/ia64/mm/hugetlbpage.c
arch/ia64/pci/pci.c
arch/ia64/sn/include/tio.h
arch/ia64/sn/include/xtalk/hubdev.h
arch/ia64/sn/kernel/bte.c
arch/ia64/sn/kernel/huberror.c
arch/ia64/sn/kernel/io_init.c
arch/ia64/sn/kernel/irq.c
arch/ia64/sn/kernel/setup.c
arch/ia64/sn/kernel/sn2/ptc_deadlock.S
arch/ia64/sn/kernel/sn2/sn2_smp.c
arch/ia64/sn/kernel/sn2/sn_hwperf.c
arch/ia64/sn/kernel/sn2/sn_proc_fs.c
arch/ia64/sn/kernel/sn2/timer_interrupt.c
arch/ia64/sn/pci/Makefile
arch/ia64/sn/pci/pcibr/pcibr_dma.c
arch/ia64/sn/pci/pcibr/pcibr_provider.c
arch/ia64/sn/pci/tioca_provider.c
arch/ia64/sn/pci/tioce_provider.c [new file with mode: 0644]
arch/m68knommu/Kconfig
arch/m68knommu/Makefile
arch/m68knommu/defconfig
arch/m68knommu/kernel/setup.c
arch/m68knommu/kernel/traps.c
arch/m68knommu/kernel/vmlinux.lds.S
arch/m68knommu/platform/523x/config.c [new file with mode: 0644]
arch/m68knommu/platform/5307/head.S
arch/m68knommu/platform/68328/entry.S
arch/m68knommu/platform/68360/entry.S
arch/ppc/kernel/cpu_setup_6xx.S
arch/ppc/kernel/l2cr.S
arch/ppc64/mm/slb_low.S
arch/v850/configs/rte-ma1-cb_defconfig
arch/v850/configs/rte-me2-cb_defconfig
arch/v850/configs/sim_defconfig
arch/v850/kernel/setup.c
drivers/char/mwave/mwavedd.c
drivers/char/snsc_event.c
drivers/media/dvb/ttpci/Kconfig
drivers/misc/Kconfig
drivers/net/Kconfig
drivers/net/iseries_veth.c
drivers/net/iseries_veth.h [deleted file]
drivers/net/tulip/de2104x.c
drivers/net/tulip/tulip_core.c
drivers/pci/rom.c
drivers/serial/21285.c
drivers/serial/8250.c
drivers/serial/8250.h
drivers/serial/Kconfig
drivers/serial/amba-pl010.c
drivers/serial/amba-pl011.c
drivers/serial/au1x00_uart.c
drivers/serial/clps711x.c
drivers/serial/cpm_uart/cpm_uart_core.c
drivers/serial/dz.c
drivers/serial/icom.c
drivers/serial/imx.c
drivers/serial/ioc4_serial.c
drivers/serial/ip22zilog.c
drivers/serial/jsm/jsm_tty.c
drivers/serial/m32r_sio.c
drivers/serial/mpc52xx_uart.c
drivers/serial/mpsc.c
drivers/serial/mux.c
drivers/serial/pmac_zilog.c
drivers/serial/pxa.c
drivers/serial/s3c2410.c
drivers/serial/sa1100.c
drivers/serial/serial_core.c
drivers/serial/serial_lh7a40x.c
drivers/serial/serial_txx9.c
drivers/serial/sh-sci.c
drivers/serial/sn_console.c
drivers/serial/sunsab.c
drivers/serial/sunsu.c
drivers/serial/sunzilog.c
drivers/serial/uart00.c
drivers/serial/v850e_uart.c
drivers/serial/vr41xx_siu.c
fs/binfmt_flat.c
include/asm-arm/arch-ixp4xx/io.h
include/asm-arm/arch-ixp4xx/platform.h
include/asm-arm/arch-pxa/pxa-regs.h
include/asm-arm/arch-s3c2410/regs-clock.h
include/asm-arm/unistd.h
include/asm-ia64/acpi.h
include/asm-ia64/fcntl.h
include/asm-ia64/io.h
include/asm-ia64/mmu.h
include/asm-ia64/mmu_context.h
include/asm-ia64/page.h
include/asm-ia64/pal.h
include/asm-ia64/pgtable.h
include/asm-ia64/rwsem.h
include/asm-ia64/sn/addrs.h
include/asm-ia64/sn/geo.h
include/asm-ia64/sn/intr.h
include/asm-ia64/sn/nodepda.h
include/asm-ia64/sn/pcibus_provider_defs.h
include/asm-ia64/sn/pda.h
include/asm-ia64/sn/sn2/sn_hwperf.h
include/asm-ia64/sn/sn_sal.h
include/asm-ia64/sn/tioce.h [new file with mode: 0644]
include/asm-ia64/sn/tioce_provider.h [new file with mode: 0644]
include/asm-ia64/spinlock.h
include/asm-ia64/system.h
include/asm-m68knommu/page.h
include/linux/cpu.h
include/linux/serial.h
include/linux/serial_8250.h
include/linux/serial_core.h
init/do_mounts.c
net/sunrpc/rpc_pipe.c

index ac7eabbf662aaf9d83814debb4f39d0c79043faf..87856d3cfb67fbcd16baf475c262c909f862cbb1 100644 (file)
@@ -111,24 +111,17 @@ hardware.
        Interrupts: locally disabled.
        This call must not sleep
 
-  stop_tx(port,tty_stop)
+  stop_tx(port)
        Stop transmitting characters.  This might be due to the CTS
        line becoming inactive or the tty layer indicating we want
-       to stop transmission.
-
-       tty_stop: 1 if this call is due to the TTY layer issuing a
-                 TTY stop to the driver (equiv to rs_stop).
+       to stop transmission due to an XOFF character.
 
        Locking: port->lock taken.
        Interrupts: locally disabled.
        This call must not sleep
 
-  start_tx(port,tty_start)
-       start transmitting characters.  (incidentally, nonempty will
-       always be nonzero, and shouldn't be used - it will be dropped).
-
-       tty_start: 1 if this call was due to the TTY layer issuing
-                  a TTY start to the driver (equiv to rs_start)
+  start_tx(port)
+       start transmitting characters.
 
        Locking: port->lock taken.
        Interrupts: locally disabled.
index 671e32905d28629728b7e600eb5208cc040fa074..5899ec1504f3317c77f48805bd4d3cc8ab29cd8c 100644 (file)
@@ -2650,11 +2650,6 @@ S:       Maintained
 UCLINUX (AND M68KNOMMU)
 P:     Greg Ungerer
 M:     gerg@uclinux.org
-M:     gerg@snapgear.com
-P:     David McCullough
-M:     davidm@snapgear.com
-P:     D. Jeff Dionne (created first uClinux port)
-M:     jeff@uclinux.org
 W:     http://www.uclinux.org/
 L:     uclinux-dev@uclinux.org  (subscribers-only)
 S:     Maintained
index 4bf0e8737e1fd514477ec4009ba4e908f189b9a9..68dfdba71d74126512efcd4996282ffce11b63a4 100644 (file)
@@ -365,8 +365,8 @@ config NO_IDLE_HZ
 
          Please note that dynamic tick may affect the accuracy of
          timekeeping on some platforms depending on the implementation.
-         Currently at least OMAP platform is known to have accurate
-         timekeeping with dynamic tick.
+         Currently at least OMAP, PXA2xx and SA11x0 platforms are known
+         to have accurate timekeeping with dynamic tick.
 
 config ARCH_DISCONTIGMEM_ENABLE
        bool
index 51dbf5489b6b31fb5a0cd515c9e4839e7bfb9e50..d7499071755976a0a14b7b0c26eb8db62555e7b9 100644 (file)
@@ -24,6 +24,7 @@
 #include <linux/kernel.h>
 #include <linux/list.h>
 #include <linux/smp.h>
+#include <linux/cpumask.h>
 
 #include <asm/irq.h>
 #include <asm/io.h>
index 2b6b4c786e654c125cfa62b750337bc5894b9731..db07ce42b3b2c6873f9b767389ae766d0f89ad6f 100644 (file)
@@ -284,7 +284,7 @@ __syscall_start:
                .long   sys_fstatfs64
                .long   sys_tgkill
                .long   sys_utimes
-/* 270 */      .long   sys_fadvise64_64
+/* 270 */      .long   sys_arm_fadvise64_64_wrapper
                .long   sys_pciconfig_iobase
                .long   sys_pciconfig_read
                .long   sys_pciconfig_write
index 3f8d0e3aefabf71c6bf82783024a72c39988974f..6281d488ac975d225aa10f536b5849db1b528956 100644 (file)
@@ -265,6 +265,10 @@ sys_futex_wrapper:
                str     r5, [sp, #4]            @ push sixth arg
                b       sys_futex
 
+sys_arm_fadvise64_64_wrapper:
+               str     r5, [sp, #4]            @ push r5 to stack
+               b       sys_arm_fadvise64_64
+
 /*
  * Note: off_4k (r5) is always units of 4K.  If we can't do the requested
  * offset, we return EINVAL.
index f897ce2ccf0d358cc79a6493b23d1cf33d91a05a..42629ff84f5a8864787c1d862f001e47a3000765 100644 (file)
@@ -311,3 +311,13 @@ long execve(const char *filename, char **argv, char **envp)
        return ret;
 }
 EXPORT_SYMBOL(execve);
+
+/*
+ * Since loff_t is a 64 bit type we avoid a lot of ABI hastle
+ * with a different argument ordering.
+ */
+asmlinkage long sys_arm_fadvise64_64(int fd, int advice,
+                                    loff_t offset, loff_t len)
+{
+       return sys_fadvise64_64(fd, offset, len, advice);
+}
index 1b7fcd50c3e25c8a208bc3347dc55dc7d0605e1e..8880482dcbffd4dbbfb20ea98def232de3b439d1 100644 (file)
@@ -433,10 +433,12 @@ void timer_dyn_reprogram(void)
 {
        struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick;
 
-       write_seqlock(&xtime_lock);
-       if (dyn_tick->state & DYN_TICK_ENABLED)
-               dyn_tick->reprogram(next_timer_interrupt() - jiffies);
-       write_sequnlock(&xtime_lock);
+       if (dyn_tick) {
+               write_seqlock(&xtime_lock);
+               if (dyn_tick->state & DYN_TICK_ENABLED)
+                       dyn_tick->reprogram(next_timer_interrupt() - jiffies);
+               write_sequnlock(&xtime_lock);
+       }
 }
 
 static ssize_t timer_show_dyn_tick(struct sys_device *dev, char *buf)
index 04490a9f8f6ecfc2158d8b21ec3aa096b888e1f2..0422e906cc9a64e4ff11d43e866049a72ba52cd0 100644 (file)
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
-enum ixp4xx_irq_type {
-       IXP4XX_IRQ_LEVEL, IXP4XX_IRQ_EDGE
-};
-static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type);
-
-/*************************************************************************
- * GPIO acces functions
- *************************************************************************/
-
-/*
- * Configure GPIO line for input, interrupt, or output operation
- *
- * TODO: Enable/disable the irq_desc based on interrupt or output mode.
- * TODO: Should these be named ixp4xx_gpio_?
- */
-void gpio_line_config(u8 line, u32 style)
-{
-       static const int gpio2irq[] = {
-               6, 7, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29
-       };
-       u32 enable;
-       volatile u32 *int_reg;
-       u32 int_style;
-       enum ixp4xx_irq_type irq_type;
-
-       enable = *IXP4XX_GPIO_GPOER;
-
-       if (style & IXP4XX_GPIO_OUT) {
-               enable &= ~((1) << line);
-       } else if (style & IXP4XX_GPIO_IN) {
-               enable |= ((1) << line);
-
-               switch (style & IXP4XX_GPIO_INTSTYLE_MASK)
-               {
-               case (IXP4XX_GPIO_ACTIVE_HIGH):
-                       int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;
-                       irq_type = IXP4XX_IRQ_LEVEL;
-                       break;
-               case (IXP4XX_GPIO_ACTIVE_LOW):
-                       int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW;
-                       irq_type = IXP4XX_IRQ_LEVEL;
-                       break;
-               case (IXP4XX_GPIO_RISING_EDGE):
-                       int_style = IXP4XX_GPIO_STYLE_RISING_EDGE;
-                       irq_type = IXP4XX_IRQ_EDGE;
-                       break;
-               case (IXP4XX_GPIO_FALLING_EDGE):
-                       int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE;
-                       irq_type = IXP4XX_IRQ_EDGE;
-                       break;
-               case (IXP4XX_GPIO_TRANSITIONAL):
-                       int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL;
-                       irq_type = IXP4XX_IRQ_EDGE;
-                       break;
-               default:
-                       int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;
-                       irq_type = IXP4XX_IRQ_LEVEL;
-                       break;
-               }
-
-               if (style & IXP4XX_GPIO_INTSTYLE_MASK)
-                       ixp4xx_config_irq(gpio2irq[line], irq_type);
-
-               if (line >= 8) {        /* pins 8-15 */ 
-                       line -= 8;
-                       int_reg = IXP4XX_GPIO_GPIT2R;
-               }
-               else {                  /* pins 0-7 */
-                       int_reg = IXP4XX_GPIO_GPIT1R;
-               }
-
-               /* Clear the style for the appropriate pin */
-               *int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR << 
-                               (line * IXP4XX_GPIO_STYLE_SIZE));
-
-               /* Set the new style */
-               *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE));
-       }
-
-       *IXP4XX_GPIO_GPOER = enable;
-}
-
-EXPORT_SYMBOL(gpio_line_config);
-
 /*************************************************************************
  * IXP4xx chipset I/O mapping
  *************************************************************************/
@@ -165,6 +81,69 @@ void __init ixp4xx_map_io(void)
  *       (be it PCI or something else) configures that GPIO line
  *       as an IRQ.
  **************************************************************************/
+enum ixp4xx_irq_type {
+       IXP4XX_IRQ_LEVEL, IXP4XX_IRQ_EDGE
+};
+
+static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type);
+
+/*
+ * IRQ -> GPIO mapping table
+ */
+static int irq2gpio[32] = {
+       -1, -1, -1, -1, -1, -1,  0,  1,
+       -1, -1, -1, -1, -1, -1, -1, -1,
+       -1, -1, -1,  2,  3,  4,  5,  6,
+        7,  8,  9, 10, 11, 12, -1, -1,
+};
+
+static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type)
+{
+       int line = irq2gpio[irq];
+       u32 int_style;
+       enum ixp4xx_irq_type irq_type;
+       volatile u32 *int_reg;
+
+       /*
+        * Only for GPIO IRQs
+        */
+       if (line < 0)
+               return -EINVAL;
+
+       if (type & IRQT_BOTHEDGE) {
+               int_style = IXP4XX_GPIO_STYLE_TRANSITIONAL;
+               irq_type = IXP4XX_IRQ_EDGE;
+       } else  if (type & IRQT_RISING) {
+               int_style = IXP4XX_GPIO_STYLE_RISING_EDGE;
+               irq_type = IXP4XX_IRQ_EDGE;
+       } else if (type & IRQT_FALLING) {
+               int_style = IXP4XX_GPIO_STYLE_FALLING_EDGE;
+               irq_type = IXP4XX_IRQ_EDGE;
+       } else if (type & IRQT_HIGH) {
+               int_style = IXP4XX_GPIO_STYLE_ACTIVE_HIGH;
+               irq_type = IXP4XX_IRQ_LEVEL;
+       } else if (type & IRQT_LOW) {
+               int_style = IXP4XX_GPIO_STYLE_ACTIVE_LOW;
+               irq_type = IXP4XX_IRQ_LEVEL;
+       }
+
+       ixp4xx_config_irq(irq, irq_type);
+
+       if (line >= 8) {        /* pins 8-15 */
+               line -= 8;
+               int_reg = IXP4XX_GPIO_GPIT2R;
+       } else {                /* pins 0-7 */
+               int_reg = IXP4XX_GPIO_GPIT1R;
+       }
+
+       /* Clear the style for the appropriate pin */
+       *int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR <<
+                       (line * IXP4XX_GPIO_STYLE_SIZE));
+
+       /* Set the new style */
+       *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE));
+}
+
 static void ixp4xx_irq_mask(unsigned int irq)
 {
        if (cpu_is_ixp46x() && irq >= 32)
@@ -183,12 +162,6 @@ static void ixp4xx_irq_unmask(unsigned int irq)
 
 static void ixp4xx_irq_ack(unsigned int irq)
 {
-       static int irq2gpio[32] = {
-               -1, -1, -1, -1, -1, -1,  0,  1,
-               -1, -1, -1, -1, -1, -1, -1, -1,
-               -1, -1, -1,  2,  3,  4,  5,  6,
-                7,  8,  9, 10, 11, 12, -1, -1,
-       };
        int line = (irq < 32) ? irq2gpio[irq] : -1;
 
        if (line >= 0)
@@ -209,12 +182,14 @@ static struct irqchip ixp4xx_irq_level_chip = {
        .ack    = ixp4xx_irq_mask,
        .mask   = ixp4xx_irq_mask,
        .unmask = ixp4xx_irq_level_unmask,
+       .type   = ixp4xx_set_irq_type
 };
 
 static struct irqchip ixp4xx_irq_edge_chip = {
        .ack    = ixp4xx_irq_ack,
        .mask   = ixp4xx_irq_mask,
        .unmask = ixp4xx_irq_unmask,
+       .type   = ixp4xx_set_irq_type
 };
 
 static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type)
index afafb42ae12951c8a96bc615328bee61a5565b07..60de8a94cff5f828cf93840d0d80cff53cc395da 100644 (file)
@@ -30,11 +30,8 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
 
 void __init coyote_pci_preinit(void)
 {
-       gpio_line_config(COYOTE_PCI_SLOT0_PIN,
-                       IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
-
-       gpio_line_config(COYOTE_PCI_SLOT1_PIN,
-                       IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
+       set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQT_LOW);
+       set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQT_LOW);
 
        gpio_line_isr_clear(COYOTE_PCI_SLOT0_PIN);
        gpio_line_isr_clear(COYOTE_PCI_SLOT1_PIN);
index 411ea999619055a7b0e73bd3678ecd9ad8806989..8b2f25322452b2c449ca02296128075e4a09918e 100644 (file)
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 
-void __init coyote_map_io(void)
-{
-       ixp4xx_map_io();
-}
-
 static struct flash_platform_data coyote_flash_data = {
        .map_name       = "cfi_probe",
        .width          = 2,
@@ -107,7 +102,7 @@ MACHINE_START(ADI_COYOTE, "ADI Engineering Coyote")
        .phys_ram       = PHYS_OFFSET,
        .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
        .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-       .map_io         = coyote_map_io,
+       .map_io         = ixp4xx_map_io,
        .init_irq       = ixp4xx_init_irq,
        .timer          = &ixp4xx_timer,
        .boot_params    = 0x0100,
@@ -125,7 +120,7 @@ MACHINE_START(IXDPG425, "Intel IXDPG425")
        .phys_ram       = PHYS_OFFSET,
        .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
        .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-       .map_io         = coyote_map_io,
+       .map_io         = ixp4xx_map_io,
        .init_irq       = ixp4xx_init_irq,
        .timer          = &ixp4xx_timer,
        .boot_params    = 0x0100,
index b18035824e3e386c59a38b2c5d6e6db321fe6258..a66484b63d36b12b0dccd06770b3b3a9d2931a7a 100644 (file)
@@ -35,26 +35,20 @@ extern void ixp4xx_pci_preinit(void);
 extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
 extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
 
-        /*
-        * The exact GPIO pins and IRQs are defined in arch-ixp4xx/gtwx5715.h
-        * Slot 0 isn't actually populated with a card connector but
-        * we initialize it anyway in case a future version has the
-        * slot populated or someone with good soldering skills has
-        * some free time.
-        */
-
-
-static void gtwx5715_init_gpio(u8 pin, u32 style)
-{
-       gpio_line_config(pin, style | IXP4XX_GPIO_ACTIVE_LOW);
-
-       if (style & IXP4XX_GPIO_IN) gpio_line_isr_clear(pin);
-}
 
+/*
+ * The exact GPIO pins and IRQs are defined in arch-ixp4xx/gtwx5715.h
+ * Slot 0 isn't actually populated with a card connector but
+ * we initialize it anyway in case a future version has the
+ * slot populated or someone with good soldering skills has
+ * some free time.
+ */
 void __init gtwx5715_pci_preinit(void)
 {
-       gtwx5715_init_gpio(GTWX5715_PCI_SLOT0_INTA_GPIO,        IXP4XX_GPIO_IN);
-       gtwx5715_init_gpio(GTWX5715_PCI_SLOT1_INTA_GPIO,        IXP4XX_GPIO_IN);
+       set_irq_type(GTWX5715_PCI_SLOT0_INTA_IRQ, IRQT_LOW);
+       set_irq_type(GTWX5715_PCI_SLOT0_INTB_IRQ, IRQT_LOW);
+       set_irq_type(GTWX5715_PCI_SLOT1_INTA_IRQ, IRQT_LOW);
+       set_irq_type(GTWX5715_PCI_SLOT1_INTB_IRQ, IRQT_LOW);
 
        ixp4xx_pci_preinit();
 }
index 333459d6aa464bb5394fd46783e9b6690b6ed4aa..3fd92c5cbaa83e21566595aab80090a93dcdd192 100644 (file)
@@ -101,12 +101,6 @@ static struct platform_device gtwx5715_uart_device = {
        .resource       = gtwx5715_uart_resources,
 };
 
-
-void __init gtwx5715_map_io(void)
-{
-       ixp4xx_map_io();
-}
-
 static struct flash_platform_data gtwx5715_flash_data = {
        .map_name       = "cfi_probe",
        .width          = 2,
@@ -144,7 +138,7 @@ MACHINE_START(GTWX5715, "Gemtek GTWX5715 (Linksys WRV54G)")
        .phys_ram       = PHYS_OFFSET,
        .phys_io        = IXP4XX_UART2_BASE_PHYS,
        .io_pg_offst    = ((IXP4XX_UART2_BASE_VIRT) >> 18) & 0xfffc,
-       .map_io         = gtwx5715_map_io,
+       .map_io         = ixp4xx_map_io,
        .init_irq       = ixp4xx_init_irq,
        .timer          = &ixp4xx_timer,
        .boot_params    = 0x0100,
index c2ab9ebb5980cac5d68f1e57f68973461b36e1fa..f9a1d3e7d6922d30c6226690d06162facec746b2 100644 (file)
 
 void __init ixdp425_pci_preinit(void)
 {
-       gpio_line_config(IXDP425_PCI_INTA_PIN,
-                               IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
-       gpio_line_config(IXDP425_PCI_INTB_PIN, 
-                               IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
-       gpio_line_config(IXDP425_PCI_INTC_PIN, 
-                               IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
-       gpio_line_config(IXDP425_PCI_INTD_PIN, 
-                               IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
+       set_irq_type(IRQ_IXDP425_PCI_INTA, IRQT_LOW);
+       set_irq_type(IRQ_IXDP425_PCI_INTB, IRQT_LOW);
+       set_irq_type(IRQ_IXDP425_PCI_INTC, IRQT_LOW);
+       set_irq_type(IRQ_IXDP425_PCI_INTD, IRQT_LOW);
 
        gpio_line_isr_clear(IXDP425_PCI_INTA_PIN);
        gpio_line_isr_clear(IXDP425_PCI_INTB_PIN);
index fa0646c8693b096c7c1ee6b6a16dc3074bff2679..6c14ff3c23a04706df50f9f8ad38e5179994e21b 100644 (file)
 #include <asm/mach/arch.h>
 #include <asm/mach/flash.h>
 
-void __init ixdp425_map_io(void) 
-{
-       ixp4xx_map_io();
-}
-
 static struct flash_platform_data ixdp425_flash_data = {
        .map_name       = "cfi_probe",
        .width          = 2,
@@ -133,7 +128,7 @@ MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
        .phys_ram       = PHYS_OFFSET,
        .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
        .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-       .map_io         = ixdp425_map_io,
+       .map_io         = ixp4xx_map_io,
        .init_irq       = ixp4xx_init_irq,
        .timer          = &ixp4xx_timer,
        .boot_params    = 0x0100,
@@ -145,7 +140,7 @@ MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
        .phys_ram       = PHYS_OFFSET,
        .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
        .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-       .map_io         = ixdp425_map_io,
+       .map_io         = ixp4xx_map_io,
        .init_irq       = ixp4xx_init_irq,
        .timer          = &ixp4xx_timer,
        .boot_params    = 0x0100,
@@ -157,7 +152,7 @@ MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
        .phys_ram       = PHYS_OFFSET,
        .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
        .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-       .map_io         = ixdp425_map_io,
+       .map_io         = ixp4xx_map_io,
        .init_irq       = ixp4xx_init_irq,
        .timer          = &ixp4xx_timer,
        .boot_params    = 0x0100,
@@ -176,7 +171,7 @@ MACHINE_START(AVILA, "Gateworks Avila Network Platform")
        .phys_ram       = PHYS_OFFSET,
        .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
        .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-       .map_io         = ixdp425_map_io,
+       .map_io         = ixp4xx_map_io,
        .init_irq       = ixp4xx_init_irq,
        .timer          = &ixp4xx_timer,
        .boot_params    = 0x0100,
index ce4563f006766b411a8758005b782c8752faed2c..fe5e7660de1d5e855594b45a6fdaf7cd4c152655 100644 (file)
@@ -29,8 +29,8 @@ extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
 
 void __init ixdpg425_pci_preinit(void)
 {
-       gpio_line_config(6, IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
-       gpio_line_config(7, IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
+       set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW);
+       set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW);
 
        gpio_line_isr_clear(6);
        gpio_line_isr_clear(7);
index 6e5202154f911321a82e53e0b93d716726b57d5e..7dad3f1465e076028954b1f18169ed8b82b2502e 100644 (file)
@@ -70,6 +70,11 @@ static unsigned long pxa_gettimeoffset (void)
        return usec;
 }
 
+#ifdef CONFIG_NO_IDLE_HZ
+static unsigned long initial_match;
+static int match_posponed;
+#endif
+
 static irqreturn_t
 pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 {
@@ -77,11 +82,19 @@ pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 
        write_seqlock(&xtime_lock);
 
+#ifdef CONFIG_NO_IDLE_HZ
+       if (match_posponed) {
+               match_posponed = 0;
+               OSMR0 = initial_match;
+       }
+#endif
+
        /* Loop until we get ahead of the free running timer.
         * This ensures an exact clock tick count and time accuracy.
-        * IRQs are disabled inside the loop to ensure coherence between
-        * lost_ticks (updated in do_timer()) and the match reg value, so we
-        * can use do_gettimeofday() from interrupt handlers.
+        * Since IRQs are disabled at this point, coherence between
+        * lost_ticks(updated in do_timer()) and the match reg value is
+        * ensured, hence we can use do_gettimeofday() from interrupt
+        * handlers.
         *
         * HACK ALERT: it seems that the PXA timer regs aren't updated right
         * away in all cases when a write occurs.  We therefore compare with
@@ -126,6 +139,42 @@ static void __init pxa_timer_init(void)
        OSCR = 0;               /* initialize free-running timer, force first match */
 }
 
+#ifdef CONFIG_NO_IDLE_HZ
+static int pxa_dyn_tick_enable_disable(void)
+{
+       /* nothing to do */
+       return 0;
+}
+
+static void pxa_dyn_tick_reprogram(unsigned long ticks)
+{
+       if (ticks > 1) {
+               initial_match = OSMR0;
+               OSMR0 = initial_match + ticks * LATCH;
+               match_posponed = 1;
+       }
+}
+
+static irqreturn_t
+pxa_dyn_tick_handler(int irq, void *dev_id, struct pt_regs *regs)
+{
+       if (match_posponed) {
+               match_posponed = 0;
+               OSMR0 = initial_match;
+               if ( (signed long)(initial_match - OSCR) <= 8 )
+                       return pxa_timer_interrupt(irq, dev_id, regs);
+       }
+       return IRQ_NONE;
+}
+
+static struct dyn_tick_timer pxa_dyn_tick = {
+       .enable         = pxa_dyn_tick_enable_disable,
+       .disable        = pxa_dyn_tick_enable_disable,
+       .reprogram      = pxa_dyn_tick_reprogram,
+       .handler        = pxa_dyn_tick_handler,
+};
+#endif
+
 #ifdef CONFIG_PM
 static unsigned long osmr[4], oier;
 
@@ -161,4 +210,7 @@ struct sys_timer pxa_timer = {
        .suspend        = pxa_timer_suspend,
        .resume         = pxa_timer_resume,
        .offset         = pxa_gettimeoffset,
+#ifdef CONFIG_NO_IDLE_HZ
+       .dyn_tick       = &pxa_dyn_tick,
+#endif
 };
index 9a66050e887d0e99db09d53d1ab91bda120f6353..f59608268751f6769a920c49b73b75fa8ab1fce4 100644 (file)
@@ -388,6 +388,7 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
                                unsigned long hclk,
                                unsigned long pclk)
 {
+       unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
        struct clk *clkp = init_clocks;
        int ptr;
        int ret;
@@ -446,5 +447,13 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
                }
        }
 
+       /* show the clock-slow value */
+
+       printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n",
+              print_mhz(xtal / ( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))),
+              (clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast",
+              (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
+              (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
+
        return 0;
 }
index b018a1f680cef41c83b461f1a0b28c4203b91dc0..c67e0979aec38476635be1f2a9e990079c4c6082 100644 (file)
@@ -68,6 +68,7 @@ static struct clk s3c2440_clk_ac97 = {
 static int s3c2440_clk_add(struct sys_device *sysdev)
 {
        unsigned long upllcon = __raw_readl(S3C2410_UPLLCON);
+       unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
        struct clk *clk_h;
        struct clk *clk_p;
        struct clk *clk_xtal;
@@ -80,8 +81,9 @@ static int s3c2440_clk_add(struct sys_device *sysdev)
 
        s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal->rate);
 
-       printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n",
-              print_mhz(s3c2440_clk_upll.rate));
+       printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz, DVS %s\n",
+              print_mhz(s3c2440_clk_upll.rate),
+              (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
 
        clk_p = clk_get(NULL, "pclk");
        clk_h = clk_get(NULL, "hclk");
index 0eeb3616ffea739652f8221504da7a1548374171..47e0420623fc25083a486f74887bff522260108b 100644 (file)
@@ -70,15 +70,11 @@ static unsigned long sa1100_gettimeoffset (void)
        return usec;
 }
 
-/*
- * We will be entered with IRQs enabled.
- *
- * Loop until we get ahead of the free running timer.
- * This ensures an exact clock tick count and time accuracy.
- * IRQs are disabled inside the loop to ensure coherence between
- * lost_ticks (updated in do_timer()) and the match reg value, so we
- * can use do_gettimeofday() from interrupt handlers.
- */
+#ifdef CONFIG_NO_IDLE_HZ
+static unsigned long initial_match;
+static int match_posponed;
+#endif
+
 static irqreturn_t
 sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 {
@@ -86,6 +82,21 @@ sa1100_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 
        write_seqlock(&xtime_lock);
 
+#ifdef CONFIG_NO_IDLE_HZ
+       if (match_posponed) {
+               match_posponed = 0;
+               OSMR0 = initial_match;
+       }
+#endif
+
+       /*
+        * Loop until we get ahead of the free running timer.
+        * This ensures an exact clock tick count and time accuracy.
+        * Since IRQs are disabled at this point, coherence between
+        * lost_ticks(updated in do_timer()) and the match reg value is
+        * ensured, hence we can use do_gettimeofday() from interrupt
+        * handlers.
+        */
        do {
                timer_tick(regs);
                OSSR = OSSR_M0;  /* Clear match on timer 0 */
@@ -120,6 +131,42 @@ static void __init sa1100_timer_init(void)
        OSCR = 0;               /* initialize free-running timer, force first match */
 }
 
+#ifdef CONFIG_NO_IDLE_HZ
+static int sa1100_dyn_tick_enable_disable(void)
+{
+       /* nothing to do */
+       return 0;
+}
+
+static void sa1100_dyn_tick_reprogram(unsigned long ticks)
+{
+       if (ticks > 1) {
+               initial_match = OSMR0;
+               OSMR0 = initial_match + ticks * LATCH;
+               match_posponed = 1;
+       }
+}
+
+static irqreturn_t
+sa1100_dyn_tick_handler(int irq, void *dev_id, struct pt_regs *regs)
+{
+       if (match_posponed) {
+               match_posponed = 0;
+               OSMR0 = initial_match;
+               if ((signed long)(initial_match - OSCR) <= 0)
+                       return sa1100_timer_interrupt(irq, dev_id, regs);
+       }
+       return IRQ_NONE;
+}
+
+static struct dyn_tick_timer sa1100_dyn_tick = {
+       .enable         = sa1100_dyn_tick_enable_disable,
+       .disable        = sa1100_dyn_tick_enable_disable,
+       .reprogram      = sa1100_dyn_tick_reprogram,
+       .handler        = sa1100_dyn_tick_handler,
+};
+#endif
+
 #ifdef CONFIG_PM
 unsigned long osmr[4], oier;
 
@@ -156,4 +203,7 @@ struct sys_timer sa1100_timer = {
        .suspend        = sa1100_timer_suspend,
        .resume         = sa1100_timer_resume,
        .offset         = sa1100_gettimeoffset,
+#ifdef CONFIG_NO_IDLE_HZ
+       .dyn_tick       = &sa1100_dyn_tick,
+#endif
 };
index 81f4a8a2d34b2c7af8c93074ca8f0c443fb80bc2..4b39d867ac14ef5e4ced59cd5ba3c6157e6427de 100644 (file)
@@ -45,7 +45,7 @@
 
 #define LDST_P_EQ_U(i) ((((i) ^ ((i) >> 1)) & (1 << 23)) == 0)
 
-#define LDSTH_I_BIT(i) (i & (1 << 22))         /* half-word immed      */
+#define LDSTHD_I_BIT(i)        (i & (1 << 22))         /* double/half-word immed */
 #define LDM_S_BIT(i)   (i & (1 << 22))         /* write CPSR from SPSR */
 
 #define RN_BITS(i)     ((i >> 16) & 15)        /* Rn                   */
@@ -68,6 +68,7 @@ static unsigned long ai_sys;
 static unsigned long ai_skipped;
 static unsigned long ai_half;
 static unsigned long ai_word;
+static unsigned long ai_dword;
 static unsigned long ai_multi;
 static int ai_usermode;
 
@@ -93,6 +94,8 @@ proc_alignment_read(char *page, char **start, off_t off, int count, int *eof,
        p += sprintf(p, "Skipped:\t%lu\n", ai_skipped);
        p += sprintf(p, "Half:\t\t%lu\n", ai_half);
        p += sprintf(p, "Word:\t\t%lu\n", ai_word);
+       if (cpu_architecture() >= CPU_ARCH_ARMv5TE)
+               p += sprintf(p, "DWord:\t\t%lu\n", ai_dword);
        p += sprintf(p, "Multi:\t\t%lu\n", ai_multi);
        p += sprintf(p, "User faults:\t%i (%s)\n", ai_usermode,
                        usermode_action[ai_usermode]);
@@ -283,12 +286,6 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
 {
        unsigned int rd = RD_BITS(instr);
 
-       if ((instr & 0x01f00ff0) == 0x01000090)
-               goto swp;
-
-       if ((instr & 0x90) != 0x90 || (instr & 0x60) == 0)
-               goto bad;
-
        ai_half += 1;
 
        if (user_mode(regs))
@@ -323,10 +320,47 @@ do_alignment_ldrhstrh(unsigned long addr, unsigned long instr, struct pt_regs *r
 
        return TYPE_LDST;
 
- swp:
-       printk(KERN_ERR "Alignment trap: not handling swp instruction\n");
- bad:
-       return TYPE_ERROR;
+ fault:
+       return TYPE_FAULT;
+}
+
+static int
+do_alignment_ldrdstrd(unsigned long addr, unsigned long instr,
+                     struct pt_regs *regs)
+{
+       unsigned int rd = RD_BITS(instr);
+
+       ai_dword += 1;
+
+       if (user_mode(regs))
+               goto user;
+
+       if ((instr & 0xf0) == 0xd0) {
+               unsigned long val;
+               get32_unaligned_check(val, addr);
+               regs->uregs[rd] = val;
+               get32_unaligned_check(val, addr+4);
+               regs->uregs[rd+1] = val;
+       } else {
+               put32_unaligned_check(regs->uregs[rd], addr);
+               put32_unaligned_check(regs->uregs[rd+1], addr+4);
+       }
+
+       return TYPE_LDST;
+
+ user:
+       if ((instr & 0xf0) == 0xd0) {
+               unsigned long val;
+               get32t_unaligned_check(val, addr);
+               regs->uregs[rd] = val;
+               get32t_unaligned_check(val, addr+4);
+               regs->uregs[rd+1] = val;
+       } else {
+               put32t_unaligned_check(regs->uregs[rd], addr);
+               put32t_unaligned_check(regs->uregs[rd+1], addr+4);
+       }
+
+       return TYPE_LDST;
 
  fault:
        return TYPE_FAULT;
@@ -617,12 +651,20 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
        regs->ARM_pc += thumb_mode(regs) ? 2 : 4;
 
        switch (CODING_BITS(instr)) {
-       case 0x00000000:        /* ldrh or strh */
-               if (LDSTH_I_BIT(instr))
+       case 0x00000000:        /* 3.13.4 load/store instruction extensions */
+               if (LDSTHD_I_BIT(instr))
                        offset.un = (instr & 0xf00) >> 4 | (instr & 15);
                else
                        offset.un = regs->uregs[RM_BITS(instr)];
-               handler = do_alignment_ldrhstrh;
+
+               if ((instr & 0x000000f0) == 0x000000b0 || /* LDRH, STRH */
+                   (instr & 0x001000f0) == 0x001000f0)   /* LDRSH */
+                       handler = do_alignment_ldrhstrh;
+               else if ((instr & 0x001000f0) == 0x000000d0 || /* LDRD */
+                        (instr & 0x001000f0) == 0x000000f0)   /* STRD */
+                       handler = do_alignment_ldrdstrd;
+               else
+                       goto bad;
                break;
 
        case 0x04000000:        /* ldr or str immediate */
index 3c655c54e23131b10cbf33d3d1fb1fe4a81d52be..d125a3dc061c8fb5efb27ceed11ce731ddafe4a5 100644 (file)
@@ -275,11 +275,9 @@ alloc_init_supersection(unsigned long virt, unsigned long phys, int prot)
        int i;
 
        for (i = 0; i < 16; i += 1) {
-               alloc_init_section(virt, phys & SUPERSECTION_MASK,
-                                  prot | PMD_SECT_SUPER);
+               alloc_init_section(virt, phys, prot | PMD_SECT_SUPER);
 
                virt += (PGDIR_SIZE / 2);
-               phys += (PGDIR_SIZE / 2);
        }
 }
 
@@ -297,14 +295,10 @@ alloc_init_page(unsigned long virt, unsigned long phys, unsigned int prot_l1, pg
        pte_t *ptep;
 
        if (pmd_none(*pmdp)) {
-               unsigned long pmdval;
                ptep = alloc_bootmem_low_pages(2 * PTRS_PER_PTE *
                                               sizeof(pte_t));
 
-               pmdval = __pa(ptep) | prot_l1;
-               pmdp[0] = __pmd(pmdval);
-               pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t));
-               flush_pmd_entry(pmdp);
+               __pmd_populate(pmdp, __pa(ptep) | prot_l1);
        }
        ptep = pte_offset_kernel(pmdp, virt);
 
@@ -459,7 +453,7 @@ static void __init build_mem_type_table(void)
 
        for (i = 0; i < 16; i++) {
                unsigned long v = pgprot_val(protection_map[i]);
-               v &= (~(PTE_BUFFERABLE|PTE_CACHEABLE)) | user_pgprot;
+               v = (v & ~(PTE_BUFFERABLE|PTE_CACHEABLE)) | user_pgprot;
                protection_map[i] = __pgprot(v);
        }
 
@@ -583,23 +577,23 @@ static void __init create_mapping(struct map_desc *md)
  */
 void setup_mm_for_reboot(char mode)
 {
-       unsigned long pmdval;
+       unsigned long base_pmdval;
        pgd_t *pgd;
-       pmd_t *pmd;
        int i;
-       int cpu_arch = cpu_architecture();
 
        if (current->mm && current->mm->pgd)
                pgd = current->mm->pgd;
        else
                pgd = init_mm.pgd;
 
-       for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++) {
-               pmdval = (i << PGDIR_SHIFT) |
-                        PMD_SECT_AP_WRITE | PMD_SECT_AP_READ |
-                        PMD_TYPE_SECT;
-               if (cpu_arch <= CPU_ARCH_ARMv5TEJ)
-                       pmdval |= PMD_BIT4;
+       base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
+       if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ)
+               base_pmdval |= PMD_BIT4;
+
+       for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) {
+               unsigned long pmdval = (i << PGDIR_SHIFT) | base_pmdval;
+               pmd_t *pmd;
+
                pmd = pmd_off(pgd, i << PGDIR_SHIFT);
                pmd[0] = __pmd(pmdval);
                pmd[1] = __pmd(pmdval + (1 << (PGDIR_SHIFT - 1)));
index 80988136f26d7dec0791f62c1df59eca73af35ea..3deced637f07c814706698e6e90a10088aebe889 100644 (file)
@@ -383,6 +383,12 @@ source "drivers/acpi/Kconfig"
 
 endif
 
+if PM
+
+source "arch/ia64/kernel/cpufreq/Kconfig"
+
+endif
+
 endmenu
 
 if !IA64_HP_SIM
index 5c46928e3dc655739bf0081ce19f503848930054..30fdfb1d0a53e3d08c9f817eaf34a0bd7b9a78f3 100644 (file)
@@ -237,17 +237,6 @@ sal_emulator (long index, unsigned long in1, unsigned long in2,
        return ((struct sal_ret_values) {status, r9, r10, r11});
 }
 
-
-/*
- * This is here to work around a bug in egcs-1.1.1b that causes the
- * compiler to crash (seems like a bug in the new alias analysis code.
- */
-void *
-id (long addr)
-{
-       return (void *) addr;
-}
-
 struct ia64_boot_param *
 sys_fw_init (const char *args, int arglen)
 {
index ebb89be2aa2dba5acbcaf7773414ff7ca51a1b87..aa891c9bc9b67ac268970391f49122f37af4b22a 100644 (file)
@@ -29,7 +29,6 @@
 #include <asm/uaccess.h>
 #include <asm/rse.h>
 #include <asm/sigcontext.h>
-#include <asm/segment.h>
 
 #include "ia32priv.h"
 
index e1fb68ddec26328f5ea7f19ce099628fea81b664..b242594be55b46716d0ddf0a08e01dab60df14dd 100644 (file)
@@ -20,6 +20,7 @@ obj-$(CONFIG_SMP)             += smp.o smpboot.o domain.o
 obj-$(CONFIG_NUMA)             += numa.o
 obj-$(CONFIG_PERFMON)          += perfmon_default_smpl.o
 obj-$(CONFIG_IA64_CYCLONE)     += cyclone.o
+obj-$(CONFIG_CPU_FREQ)         += cpufreq/
 obj-$(CONFIG_IA64_MCA_RECOVERY)        += mca_recovery.o
 obj-$(CONFIG_KPROBES)          += kprobes.o jprobes.o
 obj-$(CONFIG_IA64_UNCACHED_ALLOCATOR)  += uncached.o
diff --git a/arch/ia64/kernel/cpufreq/Kconfig b/arch/ia64/kernel/cpufreq/Kconfig
new file mode 100644 (file)
index 0000000..2d9d527
--- /dev/null
@@ -0,0 +1,29 @@
+
+#
+# CPU Frequency scaling
+#
+
+menu "CPU Frequency scaling"
+
+source "drivers/cpufreq/Kconfig"
+
+if CPU_FREQ
+
+comment "CPUFreq processor drivers"
+
+config IA64_ACPI_CPUFREQ
+       tristate "ACPI Processor P-States driver"
+       select CPU_FREQ_TABLE
+       depends on ACPI_PROCESSOR
+       help
+       This driver adds a CPUFreq driver which utilizes the ACPI
+       Processor Performance States.
+
+       For details, take a look at <file:Documentation/cpu-freq/>.
+
+       If in doubt, say N.
+
+endif   # CPU_FREQ
+
+endmenu
+
diff --git a/arch/ia64/kernel/cpufreq/Makefile b/arch/ia64/kernel/cpufreq/Makefile
new file mode 100644 (file)
index 0000000..f748d34
--- /dev/null
@@ -0,0 +1 @@
+obj-$(CONFIG_IA64_ACPI_CPUFREQ)                += acpi-cpufreq.o
diff --git a/arch/ia64/kernel/cpufreq/acpi-cpufreq.c b/arch/ia64/kernel/cpufreq/acpi-cpufreq.c
new file mode 100644 (file)
index 0000000..da4d5cf
--- /dev/null
@@ -0,0 +1,499 @@
+/*
+ * arch/ia64/kernel/cpufreq/acpi-cpufreq.c
+ * This file provides the ACPI based P-state support. This
+ * module works with generic cpufreq infrastructure. Most of
+ * the code is based on i386 version
+ * (arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c)
+ *
+ * Copyright (C) 2005 Intel Corp
+ *      Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <asm/io.h>
+#include <asm/uaccess.h>
+#include <asm/pal.h>
+
+#include <linux/acpi.h>
+#include <acpi/processor.h>
+
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
+
+MODULE_AUTHOR("Venkatesh Pallipadi");
+MODULE_DESCRIPTION("ACPI Processor P-States Driver");
+MODULE_LICENSE("GPL");
+
+
+struct cpufreq_acpi_io {
+       struct acpi_processor_performance       acpi_data;
+       struct cpufreq_frequency_table          *freq_table;
+       unsigned int                            resume;
+};
+
+static struct cpufreq_acpi_io  *acpi_io_data[NR_CPUS];
+
+static struct cpufreq_driver acpi_cpufreq_driver;
+
+
+static int
+processor_set_pstate (
+       u32     value)
+{
+       s64 retval;
+
+       dprintk("processor_set_pstate\n");
+
+       retval = ia64_pal_set_pstate((u64)value);
+
+       if (retval) {
+               dprintk("Failed to set freq to 0x%x, with error 0x%x\n",
+                       value, retval);
+               return -ENODEV;
+       }
+       return (int)retval;
+}
+
+
+static int
+processor_get_pstate (
+       u32     *value)
+{
+       u64     pstate_index = 0;
+       s64     retval;
+
+       dprintk("processor_get_pstate\n");
+
+       retval = ia64_pal_get_pstate(&pstate_index);
+       *value = (u32) pstate_index;
+
+       if (retval)
+               dprintk("Failed to get current freq with "
+                       "error 0x%x, idx 0x%x\n", retval, *value);
+
+       return (int)retval;
+}
+
+
+/* To be used only after data->acpi_data is initialized */
+static unsigned
+extract_clock (
+       struct cpufreq_acpi_io *data,
+       unsigned value,
+       unsigned int cpu)
+{
+       unsigned long i;
+
+       dprintk("extract_clock\n");
+
+       for (i = 0; i < data->acpi_data.state_count; i++) {
+               if (value >= data->acpi_data.states[i].control)
+                       return data->acpi_data.states[i].core_frequency;
+       }
+       return data->acpi_data.states[i-1].core_frequency;
+}
+
+
+static unsigned int
+processor_get_freq (
+       struct cpufreq_acpi_io  *data,
+       unsigned int            cpu)
+{
+       int                     ret = 0;
+       u32                     value = 0;
+       cpumask_t               saved_mask;
+       unsigned long           clock_freq;
+
+       dprintk("processor_get_freq\n");
+
+       saved_mask = current->cpus_allowed;
+       set_cpus_allowed(current, cpumask_of_cpu(cpu));
+       if (smp_processor_id() != cpu) {
+               ret = -EAGAIN;
+               goto migrate_end;
+       }
+
+       /*
+        * processor_get_pstate gets the average frequency since the
+        * last get. So, do two PAL_get_freq()...
+        */
+       ret = processor_get_pstate(&value);
+       ret = processor_get_pstate(&value);
+
+       if (ret) {
+               set_cpus_allowed(current, saved_mask);
+               printk(KERN_WARNING "get performance failed with error %d\n",
+                      ret);
+               ret = -EAGAIN;
+               goto migrate_end;
+       }
+       clock_freq = extract_clock(data, value, cpu);
+       ret = (clock_freq*1000);
+
+migrate_end:
+       set_cpus_allowed(current, saved_mask);
+       return ret;
+}
+
+
+static int
+processor_set_freq (
+       struct cpufreq_acpi_io  *data,
+       unsigned int            cpu,
+       int                     state)
+{
+       int                     ret = 0;
+       u32                     value = 0;
+       struct cpufreq_freqs    cpufreq_freqs;
+       cpumask_t               saved_mask;
+       int                     retval;
+
+       dprintk("processor_set_freq\n");
+
+       saved_mask = current->cpus_allowed;
+       set_cpus_allowed(current, cpumask_of_cpu(cpu));
+       if (smp_processor_id() != cpu) {
+               retval = -EAGAIN;
+               goto migrate_end;
+       }
+
+       if (state == data->acpi_data.state) {
+               if (unlikely(data->resume)) {
+                       dprintk("Called after resume, resetting to P%d\n", state);
+                       data->resume = 0;
+               } else {
+                       dprintk("Already at target state (P%d)\n", state);
+                       retval = 0;
+                       goto migrate_end;
+               }
+       }
+
+       dprintk("Transitioning from P%d to P%d\n",
+               data->acpi_data.state, state);
+
+       /* cpufreq frequency struct */
+       cpufreq_freqs.cpu = cpu;
+       cpufreq_freqs.old = data->freq_table[data->acpi_data.state].frequency;
+       cpufreq_freqs.new = data->freq_table[state].frequency;
+
+       /* notify cpufreq */
+       cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_PRECHANGE);
+
+       /*
+        * First we write the target state's 'control' value to the
+        * control_register.
+        */
+
+       value = (u32) data->acpi_data.states[state].control;
+
+       dprintk("Transitioning to state: 0x%08x\n", value);
+
+       ret = processor_set_pstate(value);
+       if (ret) {
+               unsigned int tmp = cpufreq_freqs.new;
+               cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE);
+               cpufreq_freqs.new = cpufreq_freqs.old;
+               cpufreq_freqs.old = tmp;
+               cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_PRECHANGE);
+               cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE);
+               printk(KERN_WARNING "Transition failed with error %d\n", ret);
+               retval = -ENODEV;
+               goto migrate_end;
+       }
+
+       cpufreq_notify_transition(&cpufreq_freqs, CPUFREQ_POSTCHANGE);
+
+       data->acpi_data.state = state;
+
+       retval = 0;
+
+migrate_end:
+       set_cpus_allowed(current, saved_mask);
+       return (retval);
+}
+
+
+static unsigned int
+acpi_cpufreq_get (
+       unsigned int            cpu)
+{
+       struct cpufreq_acpi_io *data = acpi_io_data[cpu];
+
+       dprintk("acpi_cpufreq_get\n");
+
+       return processor_get_freq(data, cpu);
+}
+
+
+static int
+acpi_cpufreq_target (
+       struct cpufreq_policy   *policy,
+       unsigned int target_freq,
+       unsigned int relation)
+{
+       struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu];
+       unsigned int next_state = 0;
+       unsigned int result = 0;
+
+       dprintk("acpi_cpufreq_setpolicy\n");
+
+       result = cpufreq_frequency_table_target(policy,
+                       data->freq_table, target_freq, relation, &next_state);
+       if (result)
+               return (result);
+
+       result = processor_set_freq(data, policy->cpu, next_state);
+
+       return (result);
+}
+
+
+static int
+acpi_cpufreq_verify (
+       struct cpufreq_policy   *policy)
+{
+       unsigned int result = 0;
+       struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu];
+
+       dprintk("acpi_cpufreq_verify\n");
+
+       result = cpufreq_frequency_table_verify(policy,
+                       data->freq_table);
+
+       return (result);
+}
+
+
+/*
+ * processor_init_pdc - let BIOS know about the SMP capabilities
+ * of this driver
+ * @perf: processor-specific acpi_io_data struct
+ * @cpu: CPU being initialized
+ *
+ * To avoid issues with legacy OSes, some BIOSes require to be informed of
+ * the SMP capabilities of OS P-state driver. Here we set the bits in _PDC
+ * accordingly. Actual call to _PDC is done in driver/acpi/processor.c
+ */
+static void
+processor_init_pdc (
+               struct acpi_processor_performance *perf,
+               unsigned int cpu,
+               struct acpi_object_list *obj_list
+               )
+{
+       union acpi_object *obj;
+       u32 *buf;
+
+       dprintk("processor_init_pdc\n");
+
+       perf->pdc = NULL;
+       /* Initialize pdc. It will be used later. */
+       if (!obj_list)
+               return;
+
+       if (!(obj_list->count && obj_list->pointer))
+               return;
+
+       obj = obj_list->pointer;
+       if ((obj->buffer.length == 12) && obj->buffer.pointer) {
+               buf = (u32 *)obj->buffer.pointer;
+                       buf[0] = ACPI_PDC_REVISION_ID;
+                       buf[1] = 1;
+                       buf[2] = ACPI_PDC_EST_CAPABILITY_SMP;
+               perf->pdc = obj_list;
+       }
+       return;
+}
+
+
+static int
+acpi_cpufreq_cpu_init (
+       struct cpufreq_policy   *policy)
+{
+       unsigned int            i;
+       unsigned int            cpu = policy->cpu;
+       struct cpufreq_acpi_io  *data;
+       unsigned int            result = 0;
+
+       union acpi_object               arg0 = {ACPI_TYPE_BUFFER};
+       u32                             arg0_buf[3];
+       struct acpi_object_list         arg_list = {1, &arg0};
+
+       dprintk("acpi_cpufreq_cpu_init\n");
+       /* setup arg_list for _PDC settings */
+        arg0.buffer.length = 12;
+        arg0.buffer.pointer = (u8 *) arg0_buf;
+
+       data = kmalloc(sizeof(struct cpufreq_acpi_io), GFP_KERNEL);
+       if (!data)
+               return (-ENOMEM);
+
+       memset(data, 0, sizeof(struct cpufreq_acpi_io));
+
+       acpi_io_data[cpu] = data;
+
+       processor_init_pdc(&data->acpi_data, cpu, &arg_list);
+       result = acpi_processor_register_performance(&data->acpi_data, cpu);
+       data->acpi_data.pdc = NULL;
+
+       if (result)
+               goto err_free;
+
+       /* capability check */
+       if (data->acpi_data.state_count <= 1) {
+               dprintk("No P-States\n");
+               result = -ENODEV;
+               goto err_unreg;
+       }
+
+       if ((data->acpi_data.control_register.space_id !=
+                                       ACPI_ADR_SPACE_FIXED_HARDWARE) ||
+           (data->acpi_data.status_register.space_id !=
+                                       ACPI_ADR_SPACE_FIXED_HARDWARE)) {
+               dprintk("Unsupported address space [%d, %d]\n",
+                       (u32) (data->acpi_data.control_register.space_id),
+                       (u32) (data->acpi_data.status_register.space_id));
+               result = -ENODEV;
+               goto err_unreg;
+       }
+
+       /* alloc freq_table */
+       data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
+                                  (data->acpi_data.state_count + 1),
+                                  GFP_KERNEL);
+       if (!data->freq_table) {
+               result = -ENOMEM;
+               goto err_unreg;
+       }
+
+       /* detect transition latency */
+       policy->cpuinfo.transition_latency = 0;
+       for (i=0; i<data->acpi_data.state_count; i++) {
+               if ((data->acpi_data.states[i].transition_latency * 1000) >
+                   policy->cpuinfo.transition_latency) {
+                       policy->cpuinfo.transition_latency =
+                           data->acpi_data.states[i].transition_latency * 1000;
+               }
+       }
+       policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+
+       policy->cur = processor_get_freq(data, policy->cpu);
+
+       /* table init */
+       for (i = 0; i <= data->acpi_data.state_count; i++)
+       {
+               data->freq_table[i].index = i;
+               if (i < data->acpi_data.state_count) {
+                       data->freq_table[i].frequency =
+                             data->acpi_data.states[i].core_frequency * 1000;
+               } else {
+                       data->freq_table[i].frequency = CPUFREQ_TABLE_END;
+               }
+       }
+
+       result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
+       if (result) {
+               goto err_freqfree;
+       }
+
+       /* notify BIOS that we exist */
+       acpi_processor_notify_smm(THIS_MODULE);
+
+       printk(KERN_INFO "acpi-cpufreq: CPU%u - ACPI performance management "
+              "activated.\n", cpu);
+
+       for (i = 0; i < data->acpi_data.state_count; i++)
+               dprintk("     %cP%d: %d MHz, %d mW, %d uS, %d uS, 0x%x 0x%x\n",
+                       (i == data->acpi_data.state?'*':' '), i,
+                       (u32) data->acpi_data.states[i].core_frequency,
+                       (u32) data->acpi_data.states[i].power,
+                       (u32) data->acpi_data.states[i].transition_latency,
+                       (u32) data->acpi_data.states[i].bus_master_latency,
+                       (u32) data->acpi_data.states[i].status,
+                       (u32) data->acpi_data.states[i].control);
+
+       cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
+
+       /* the first call to ->target() should result in us actually
+        * writing something to the appropriate registers. */
+       data->resume = 1;
+
+       return (result);
+
+ err_freqfree:
+       kfree(data->freq_table);
+ err_unreg:
+       acpi_processor_unregister_performance(&data->acpi_data, cpu);
+ err_free:
+       kfree(data);
+       acpi_io_data[cpu] = NULL;
+
+       return (result);
+}
+
+
+static int
+acpi_cpufreq_cpu_exit (
+       struct cpufreq_policy   *policy)
+{
+       struct cpufreq_acpi_io *data = acpi_io_data[policy->cpu];
+
+       dprintk("acpi_cpufreq_cpu_exit\n");
+
+       if (data) {
+               cpufreq_frequency_table_put_attr(policy->cpu);
+               acpi_io_data[policy->cpu] = NULL;
+               acpi_processor_unregister_performance(&data->acpi_data,
+                                                     policy->cpu);
+               kfree(data);
+       }
+
+       return (0);
+}
+
+
+static struct freq_attr* acpi_cpufreq_attr[] = {
+       &cpufreq_freq_attr_scaling_available_freqs,
+       NULL,
+};
+
+
+static struct cpufreq_driver acpi_cpufreq_driver = {
+       .verify         = acpi_cpufreq_verify,
+       .target         = acpi_cpufreq_target,
+       .get            = acpi_cpufreq_get,
+       .init           = acpi_cpufreq_cpu_init,
+       .exit           = acpi_cpufreq_cpu_exit,
+       .name           = "acpi-cpufreq",
+       .owner          = THIS_MODULE,
+       .attr           = acpi_cpufreq_attr,
+};
+
+
+static int __init
+acpi_cpufreq_init (void)
+{
+       dprintk("acpi_cpufreq_init\n");
+
+       return cpufreq_register_driver(&acpi_cpufreq_driver);
+}
+
+
+static void __exit
+acpi_cpufreq_exit (void)
+{
+       dprintk("acpi_cpufreq_exit\n");
+
+       cpufreq_unregister_driver(&acpi_cpufreq_driver);
+       return;
+}
+
+
+late_initcall(acpi_cpufreq_init);
+module_exit(acpi_cpufreq_exit);
+
index 770fab37928ee9e4c3870b8875473f7a53d1213b..f2dbcd1db0d4dc99b3baca0d0b677c3ed788a58c 100644 (file)
@@ -35,7 +35,7 @@ arch_get_unmapped_area (struct file *filp, unsigned long addr, unsigned long len
                return -ENOMEM;
 
 #ifdef CONFIG_HUGETLB_PAGE
-       if (REGION_NUMBER(addr) == REGION_HPAGE)
+       if (REGION_NUMBER(addr) == RGN_HPAGE)
                addr = 0;
 #endif
        if (!addr)
index 490dfc9ab47ffd51bd02167047e7dcb3a9de5041..4e9d06c48a8ba40c3cb70d39e352efa793f26f48 100644 (file)
@@ -184,7 +184,7 @@ uncached_free_page(unsigned long maddr)
 {
        int node;
 
-       node = nasid_to_cnodeid(NASID_GET(maddr));
+       node = paddr_to_nid(maddr - __IA64_UNCACHED_OFFSET);
 
        dprintk(KERN_DEBUG "uncached_free_page(%lx) on node %i\n", maddr, node);
 
@@ -217,7 +217,7 @@ uncached_build_memmap(unsigned long start, unsigned long end, void *arg)
 
        memset((char *)vstart, 0, length);
 
-       node = nasid_to_cnodeid(NASID_GET(start));
+       node = paddr_to_nid(start);
 
        for (; vstart < vend ; vstart += PAGE_SIZE) {
                dprintk(KERN_INFO "sticking %lx into the pool!\n", vstart);
index 1902c3c2ef923f57ff19b9550cd34bb75ce7a4bb..799407e7726f2a9c54f301ce50f71c253f514174 100644 (file)
@@ -6,7 +6,7 @@ obj-y := io.o
 
 lib-y := __divsi3.o __udivsi3.o __modsi3.o __umodsi3.o                 \
        __divdi3.o __udivdi3.o __moddi3.o __umoddi3.o                   \
-       bitop.o checksum.o clear_page.o csum_partial_copy.o copy_page.o \
+       bitop.o checksum.o clear_page.o csum_partial_copy.o             \
        clear_user.o strncpy_from_user.o strlen_user.o strnlen_user.o   \
        flush.o ip_fast_csum.o do_csum.o                                \
        memset.o strlen.o swiotlb.o
index ab7b3ad99a7fa9f9c87c78474ee7fda27d3f01b0..dbc0b3e449c5fe7ad8e81c284d00c85b0bf600fe 100644 (file)
@@ -93,8 +93,7 @@ static int __init
 setup_io_tlb_npages(char *str)
 {
        if (isdigit(*str)) {
-               io_tlb_nslabs = simple_strtoul(str, &str, 0) <<
-                       (PAGE_SHIFT - IO_TLB_SHIFT);
+               io_tlb_nslabs = simple_strtoul(str, &str, 0);
                /* avoid tail segment of size < IO_TLB_SEGSIZE */
                io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
        }
@@ -117,7 +116,7 @@ swiotlb_init_with_default_size (size_t default_size)
        unsigned long i;
 
        if (!io_tlb_nslabs) {
-               io_tlb_nslabs = (default_size >> PAGE_SHIFT);
+               io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
                io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
        }
 
index e0a776a3044c89f5614de6e2284c6a338cda6170..2d13889d0a9915da645b074ecbef1f8a0b56d116 100644 (file)
@@ -76,7 +76,7 @@ int is_aligned_hugepage_range(unsigned long addr, unsigned long len)
                return -EINVAL;
        if (addr & ~HPAGE_MASK)
                return -EINVAL;
-       if (REGION_NUMBER(addr) != REGION_HPAGE)
+       if (REGION_NUMBER(addr) != RGN_HPAGE)
                return -EINVAL;
 
        return 0;
@@ -87,7 +87,7 @@ struct page *follow_huge_addr(struct mm_struct *mm, unsigned long addr, int writ
        struct page *page;
        pte_t *ptep;
 
-       if (REGION_NUMBER(addr) != REGION_HPAGE)
+       if (REGION_NUMBER(addr) != RGN_HPAGE)
                return ERR_PTR(-EINVAL);
 
        ptep = huge_pte_offset(mm, addr);
@@ -142,8 +142,8 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr, u
                return -ENOMEM;
        if (len & ~HPAGE_MASK)
                return -EINVAL;
-       /* This code assumes that REGION_HPAGE != 0. */
-       if ((REGION_NUMBER(addr) != REGION_HPAGE) || (addr & (HPAGE_SIZE - 1)))
+       /* This code assumes that RGN_HPAGE != 0. */
+       if ((REGION_NUMBER(addr) != RGN_HPAGE) || (addr & (HPAGE_SIZE - 1)))
                addr = HPAGE_REGION_BASE;
        else
                addr = ALIGN(addr, HPAGE_SIZE);
index f9472c50ab4298a072fd25cfca6743ff69122b91..9977c122e9fa2c1a314e2d90fb5260dba87b0cb7 100644 (file)
@@ -24,7 +24,6 @@
 
 #include <asm/machvec.h>
 #include <asm/page.h>
-#include <asm/segment.h>
 #include <asm/system.h>
 #include <asm/io.h>
 #include <asm/sal.h>
index 0139124dd54a66935124494ff4cff213f0452d89..6b2e7b75eb19136cee3f7f5943667c55ee75da90 100644 (file)
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
  */
 
 #ifndef _ASM_IA64_SN_TIO_H
 #define TIO_ITTE_VALID_MASK    0x1
 #define TIO_ITTE_VALID_SHIFT   16
 
+#define TIO_ITTE_WIDGET(itte) \
+       (((itte) >> TIO_ITTE_WIDGET_SHIFT) & TIO_ITTE_WIDGET_MASK)
+#define TIO_ITTE_VALID(itte) \
+       (((itte) >> TIO_ITTE_VALID_SHIFT) & TIO_ITTE_VALID_MASK)
 
 #define TIO_ITTE_PUT(nasid, bigwin, widget, addr, valid) \
         REMOTE_HUB_S((nasid), TIO_ITTE(bigwin), \
index 580a1c0403a73c373c60cf34cc59f985bb5a16f0..71c2b271b4c687daabd4e886023fe85dacfeeb94 100644 (file)
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
  */
 #ifndef _ASM_IA64_SN_XTALK_HUBDEV_H
 #define _ASM_IA64_SN_XTALK_HUBDEV_H
@@ -16,6 +16,9 @@
 #define IIO_ITTE_WIDGET_MASK    ((1<<IIO_ITTE_WIDGET_BITS)-1)
 #define IIO_ITTE_WIDGET_SHIFT   8
 
+#define IIO_ITTE_WIDGET(itte)  \
+       (((itte) >> IIO_ITTE_WIDGET_SHIFT) & IIO_ITTE_WIDGET_MASK)
+
 /*
  * Use the top big window as a surrogate for the first small window
  */
@@ -34,7 +37,8 @@ struct sn_flush_device_list {
        unsigned long sfdl_force_int_addr;
        unsigned long sfdl_flush_value;
        volatile unsigned long *sfdl_flush_addr;
-       uint64_t sfdl_persistent_busnum;
+       uint32_t sfdl_persistent_busnum;
+       uint32_t sfdl_persistent_segment;
        struct pcibus_info *sfdl_pcibus_info;
        spinlock_t sfdl_flush_lock;
 };
@@ -58,7 +62,8 @@ struct hubdev_info {
 
        void                            *hdi_nodepda;
        void                            *hdi_node_vertex;
-       void                            *hdi_xtalk_vertex;
+       uint32_t                        max_segment_number;
+       uint32_t                        max_pcibus_number;
 };
 
 extern void hubdev_init_node(nodepda_t *, cnodeid_t);
index 647deae9bfcd57c3fef46b03d7f47912f6c985b1..45854c637e9ca035f2d16dac86da2698ec300030 100644 (file)
 
 /* two interfaces on two btes */
 #define MAX_INTERFACES_TO_TRY          4
+#define MAX_NODES_TO_TRY               2
 
 static struct bteinfo_s *bte_if_on_node(nasid_t nasid, int interface)
 {
        nodepda_t *tmp_nodepda;
 
+       if (nasid_to_cnodeid(nasid) == -1)
+               return (struct bteinfo_s *)NULL;;
+
        tmp_nodepda = NODEPDA(nasid_to_cnodeid(nasid));
        return &tmp_nodepda->bte_if[interface];
 
 }
 
+static inline void bte_start_transfer(struct bteinfo_s *bte, u64 len, u64 mode)
+{
+       if (is_shub2()) {
+               BTE_CTRL_STORE(bte, (IBLS_BUSY | ((len) | (mode) << 24)));
+       } else {
+               BTE_LNSTAT_STORE(bte, len);
+               BTE_CTRL_STORE(bte, mode);
+       }
+}
+
 /************************************************************************
  * Block Transfer Engine copy related functions.
  *
@@ -67,13 +81,15 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
 {
        u64 transfer_size;
        u64 transfer_stat;
+       u64 notif_phys_addr;
        struct bteinfo_s *bte;
        bte_result_t bte_status;
        unsigned long irq_flags;
        unsigned long itc_end = 0;
-       struct bteinfo_s *btes_to_try[MAX_INTERFACES_TO_TRY];
-       int bte_if_index;
-       int bte_pri, bte_sec;
+       int nasid_to_try[MAX_NODES_TO_TRY];
+       int my_nasid = get_nasid();
+       int bte_if_index, nasid_index;
+       int bte_first, btes_per_node = BTES_PER_NODE;
 
        BTE_PRINTK(("bte_copy(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%p)\n",
                    src, dest, len, mode, notification));
@@ -86,36 +102,26 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
                 (src & L1_CACHE_MASK) || (dest & L1_CACHE_MASK));
        BUG_ON(!(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT)));
 
-       /* CPU 0 (per node) tries bte0 first, CPU 1 try bte1 first */
-       if (cpuid_to_subnode(smp_processor_id()) == 0) {
-               bte_pri = 0;
-               bte_sec = 1;
-       } else {
-               bte_pri = 1;
-               bte_sec = 0;
-       }
+       /*
+        * Start with interface corresponding to cpu number
+        */
+       bte_first = raw_smp_processor_id() % btes_per_node;
 
        if (mode & BTE_USE_DEST) {
                /* try remote then local */
-               btes_to_try[0] = bte_if_on_node(NASID_GET(dest), bte_pri);
-               btes_to_try[1] = bte_if_on_node(NASID_GET(dest), bte_sec);
+               nasid_to_try[0] = NASID_GET(dest);
                if (mode & BTE_USE_ANY) {
-                       btes_to_try[2] = bte_if_on_node(get_nasid(), bte_pri);
-                       btes_to_try[3] = bte_if_on_node(get_nasid(), bte_sec);
+                       nasid_to_try[1] = my_nasid;
                } else {
-                       btes_to_try[2] = NULL;
-                       btes_to_try[3] = NULL;
+                       nasid_to_try[1] = (int)NULL;
                }
        } else {
                /* try local then remote */
-               btes_to_try[0] = bte_if_on_node(get_nasid(), bte_pri);
-               btes_to_try[1] = bte_if_on_node(get_nasid(), bte_sec);
+               nasid_to_try[0] = my_nasid;
                if (mode & BTE_USE_ANY) {
-                       btes_to_try[2] = bte_if_on_node(NASID_GET(dest), bte_pri);
-                       btes_to_try[3] = bte_if_on_node(NASID_GET(dest), bte_sec);
+                       nasid_to_try[1] = NASID_GET(dest);
                } else {
-                       btes_to_try[2] = NULL;
-                       btes_to_try[3] = NULL;
+                       nasid_to_try[1] = (int)NULL;
                }
        }
 
@@ -123,11 +129,12 @@ retry_bteop:
        do {
                local_irq_save(irq_flags);
 
-               bte_if_index = 0;
+               bte_if_index = bte_first;
+               nasid_index = 0;
 
                /* Attempt to lock one of the BTE interfaces. */
-               while (bte_if_index < MAX_INTERFACES_TO_TRY) {
-                       bte = btes_to_try[bte_if_index++];
+               while (nasid_index < MAX_NODES_TO_TRY) {
+                       bte = bte_if_on_node(nasid_to_try[nasid_index],bte_if_index);
 
                        if (bte == NULL) {
                                continue;
@@ -143,6 +150,15 @@ retry_bteop:
                                        break;
                                }
                        }
+
+                       bte_if_index = (bte_if_index + 1) % btes_per_node; /* Next interface */
+                       if (bte_if_index == bte_first) {
+                               /*
+                                * We've tried all interfaces on this node
+                                */
+                               nasid_index++;
+                       }
+
                        bte = NULL;
                }
 
@@ -169,7 +185,13 @@ retry_bteop:
 
        /* Initialize the notification to a known value. */
        *bte->most_rcnt_na = BTE_WORD_BUSY;
+       notif_phys_addr = TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na));
 
+       if (is_shub2()) {
+               src = SH2_TIO_PHYS_TO_DMA(src);
+               dest = SH2_TIO_PHYS_TO_DMA(dest);
+               notif_phys_addr = SH2_TIO_PHYS_TO_DMA(notif_phys_addr);
+       }
        /* Set the source and destination registers */
        BTE_PRINTKV(("IBSA = 0x%lx)\n", (TO_PHYS(src))));
        BTE_SRC_STORE(bte, TO_PHYS(src));
@@ -177,14 +199,12 @@ retry_bteop:
        BTE_DEST_STORE(bte, TO_PHYS(dest));
 
        /* Set the notification register */
-       BTE_PRINTKV(("IBNA = 0x%lx)\n",
-                    TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na))));
-       BTE_NOTIF_STORE(bte,
-                       TO_PHYS(ia64_tpa((unsigned long)bte->most_rcnt_na)));
+       BTE_PRINTKV(("IBNA = 0x%lx)\n", notif_phys_addr));
+       BTE_NOTIF_STORE(bte, notif_phys_addr);
 
        /* Initiate the transfer */
        BTE_PRINTK(("IBCT = 0x%lx)\n", BTE_VALID_MODE(mode)));
-       BTE_START_TRANSFER(bte, transfer_size, BTE_VALID_MODE(mode));
+       bte_start_transfer(bte, transfer_size, BTE_VALID_MODE(mode));
 
        itc_end = ia64_get_itc() + (40000000 * local_cpu_data->cyc_per_usec);
 
@@ -195,6 +215,7 @@ retry_bteop:
        }
 
        while ((transfer_stat = *bte->most_rcnt_na) == BTE_WORD_BUSY) {
+               cpu_relax();
                if (ia64_get_itc() > itc_end) {
                        BTE_PRINTK(("BTE timeout nasid 0x%x bte%d IBLS = 0x%lx na 0x%lx\n",
                                NASID_GET(bte->bte_base_addr), bte->bte_num,
index 5c39b43ba3c029604103bb1757dbe3d5db1faa5c..5c5eb01c50f02b53f97513eda0e1e65e3daa2c00 100644 (file)
@@ -76,7 +76,7 @@ void hubiio_crb_free(struct hubdev_info *hubdev_info, int crbnum)
         */
        REMOTE_HUB_S(hubdev_info->hdi_nasid, IIO_ICDR, (IIO_ICDR_PND | crbnum));
        while (REMOTE_HUB_L(hubdev_info->hdi_nasid, IIO_ICDR) & IIO_ICDR_PND)
-               udelay(1);
+               cpu_relax();
 
 }
 
index 414cdf2e3c965e124223833a1ed036783e4c4392..4564ed0b5ff31e32aab74c819369e3762382f512 100644 (file)
@@ -18,6 +18,7 @@
 #include <asm/sn/simulator.h>
 #include <asm/sn/sn_sal.h>
 #include <asm/sn/tioca_provider.h>
+#include <asm/sn/tioce_provider.h>
 #include "xtalk/hubdev.h"
 #include "xtalk/xwidgetdev.h"
 
@@ -44,6 +45,9 @@ int sn_ioif_inited = 0;               /* SN I/O infrastructure initialized? */
 
 struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES];      /* indexed by asic type */
 
+static int max_segment_number = 0; /* Default highest segment number */
+static int max_pcibus_number = 255; /* Default highest pci bus number */
+
 /*
  * Hooks and struct for unsupported pci providers
  */
@@ -157,13 +161,28 @@ static void sn_fixup_ionodes(void)
        uint64_t nasid;
        int i, widget;
 
+       /*
+        * Get SGI Specific HUB chipset information.
+        * Inform Prom that this kernel can support domain bus numbering.
+        */
        for (i = 0; i < numionodes; i++) {
                hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
                nasid = cnodeid_to_nasid(i);
+               hubdev->max_segment_number = 0xffffffff;
+               hubdev->max_pcibus_number = 0xff;
                status = sal_get_hubdev_info(nasid, (uint64_t) __pa(hubdev));
                if (status)
                        continue;
 
+               /* Save the largest Domain and pcibus numbers found. */
+               if (hubdev->max_segment_number) {
+                       /*
+                        * Dealing with a Prom that supports segments.
+                        */
+                       max_segment_number = hubdev->max_segment_number;
+                       max_pcibus_number = hubdev->max_pcibus_number;
+               }
+
                /* Attach the error interrupt handlers */
                if (nasid & 1)
                        ice_error_init(hubdev);
@@ -230,7 +249,7 @@ void sn_pci_unfixup_slot(struct pci_dev *dev)
 void sn_pci_fixup_slot(struct pci_dev *dev)
 {
        int idx;
-       int segment = 0;
+       int segment = pci_domain_nr(dev->bus);
        int status = 0;
        struct pcibus_bussoft *bs;
        struct pci_bus *host_pci_bus;
@@ -283,9 +302,9 @@ void sn_pci_fixup_slot(struct pci_dev *dev)
         * PCI host_pci_dev struct and set up host bus linkages
         */
 
-       bus_no = SN_PCIDEV_INFO(dev)->pdi_slot_host_handle >> 32;
+       bus_no = (SN_PCIDEV_INFO(dev)->pdi_slot_host_handle >> 32) & 0xff;
        devfn = SN_PCIDEV_INFO(dev)->pdi_slot_host_handle & 0xffffffff;
-       host_pci_bus = pci_find_bus(pci_domain_nr(dev->bus), bus_no);
+       host_pci_bus = pci_find_bus(segment, bus_no);
        host_pci_dev = pci_get_slot(host_pci_bus, devfn);
 
        SN_PCIDEV_INFO(dev)->host_pci_dev = host_pci_dev;
@@ -333,6 +352,7 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
        prom_bussoft_ptr = __va(prom_bussoft_ptr);
 
        controller = kcalloc(1,sizeof(struct pci_controller), GFP_KERNEL);
+       controller->segment = segment;
        if (!controller)
                BUG();
 
@@ -390,7 +410,7 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
        if (controller->node >= num_online_nodes()) {
                struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus);
 
-               printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%lu"
+               printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u"
                                    "L_IO=%lx L_MEM=%lx BASE=%lx\n",
                        b->bs_asic_type, b->bs_xid, b->bs_persist_busnum,
                        b->bs_legacy_io, b->bs_legacy_mem, b->bs_base);
@@ -445,6 +465,7 @@ sn_sysdata_free_start:
 static int __init sn_pci_init(void)
 {
        int i = 0;
+       int j = 0;
        struct pci_dev *pci_dev = NULL;
        extern void sn_init_cpei_timer(void);
 #ifdef CONFIG_PROC_FS
@@ -464,6 +485,7 @@ static int __init sn_pci_init(void)
 
        pcibr_init_provider();
        tioca_init_provider();
+       tioce_init_provider();
 
        /*
         * This is needed to avoid bounce limit checks in the blk layer
@@ -479,8 +501,9 @@ static int __init sn_pci_init(void)
 #endif
 
        /* busses are not known yet ... */
-       for (i = 0; i < PCI_BUSES_TO_SCAN; i++)
-               sn_pci_controller_fixup(0, i, NULL);
+       for (i = 0; i <= max_segment_number; i++)
+               for (j = 0; j <= max_pcibus_number; j++)
+                       sn_pci_controller_fixup(i, j, NULL);
 
        /*
         * Generic Linux PCI Layer has created the pci_bus and pci_dev 
index 84d276a14ecb178d696d239f0758efaff251ee47..9fc74631ba8aa92568a8fed1e27c0a202e00f92f 100644 (file)
@@ -5,7 +5,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (c) 2000-2004 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2000-2005 Silicon Graphics, Inc.  All Rights Reserved.
  */
 
 #include <linux/irq.h>
@@ -76,16 +76,14 @@ static void sn_enable_irq(unsigned int irq)
 
 static void sn_ack_irq(unsigned int irq)
 {
-       uint64_t event_occurred, mask = 0;
-       int nasid;
+       u64 event_occurred, mask = 0;
 
        irq = irq & 0xff;
-       nasid = get_nasid();
        event_occurred =
-           HUB_L((uint64_t *) GLOBAL_MMR_ADDR(nasid, SH_EVENT_OCCURRED));
+           HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
        mask = event_occurred & SH_ALL_INT_MASK;
-       HUB_S((uint64_t *) GLOBAL_MMR_ADDR(nasid, SH_EVENT_OCCURRED_ALIAS),
-                mask);
+       HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),
+             mask);
        __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
 
        move_irq(irq);
@@ -93,15 +91,12 @@ static void sn_ack_irq(unsigned int irq)
 
 static void sn_end_irq(unsigned int irq)
 {
-       int nasid;
        int ivec;
-       uint64_t event_occurred;
+       u64 event_occurred;
 
        ivec = irq & 0xff;
        if (ivec == SGI_UART_VECTOR) {
-               nasid = get_nasid();
-               event_occurred = HUB_L((uint64_t *) GLOBAL_MMR_ADDR
-                                      (nasid, SH_EVENT_OCCURRED));
+               event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
                /* If the UART bit is set here, we may have received an
                 * interrupt from the UART that the driver missed.  To
                 * make sure, we IPI ourselves to force us to look again.
@@ -132,6 +127,7 @@ static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
                int local_widget, status;
                nasid_t local_nasid;
                struct sn_irq_info *new_irq_info;
+               struct sn_pcibus_provider *pci_provider;
 
                new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
                if (new_irq_info == NULL)
@@ -171,8 +167,9 @@ static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
                new_irq_info->irq_cpuid = cpuid;
                register_intr_pda(new_irq_info);
 
-               if (IS_PCI_BRIDGE_ASIC(new_irq_info->irq_bridge_type))
-                       pcibr_change_devices_irq(new_irq_info);
+               pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type];
+               if (pci_provider && pci_provider->target_interrupt)
+                       (pci_provider->target_interrupt)(new_irq_info);
 
                spin_lock(&sn_irq_info_lock);
                list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
@@ -317,6 +314,16 @@ void sn_irq_unfixup(struct pci_dev *pci_dev)
        pci_dev_put(pci_dev);
 }
 
+static inline void
+sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
+{
+       struct sn_pcibus_provider *pci_provider;
+
+       pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
+       if (pci_provider && pci_provider->force_interrupt)
+               (*pci_provider->force_interrupt)(sn_irq_info);
+}
+
 static void force_interrupt(int irq)
 {
        struct sn_irq_info *sn_irq_info;
@@ -325,11 +332,9 @@ static void force_interrupt(int irq)
                return;
 
        rcu_read_lock();
-       list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list) {
-               if (IS_PCI_BRIDGE_ASIC(sn_irq_info->irq_bridge_type) &&
-                   (sn_irq_info->irq_bridge != NULL))
-                       pcibr_force_interrupt(sn_irq_info);
-       }
+       list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
+               sn_call_force_intr_provider(sn_irq_info);
+
        rcu_read_unlock();
 }
 
@@ -351,6 +356,14 @@ static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
        struct pcidev_info *pcidev_info;
        struct pcibus_info *pcibus_info;
 
+       /*
+        * Bridge types attached to TIO (anything but PIC) do not need this WAR
+        * since they do not target Shub II interrupt registers.  If that
+        * ever changes, this check needs to accomodate.
+        */
+       if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
+               return;
+
        pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
        if (!pcidev_info)
                return;
@@ -377,16 +390,12 @@ static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
                break;
        }
        if (!test_bit(irr_bit, &irr_reg)) {
-               if (!test_bit(irq, pda->sn_soft_irr)) {
-                       if (!test_bit(irq, pda->sn_in_service_ivecs)) {
-                               regval &= 0xff;
-                               if (sn_irq_info->irq_int_bit & regval &
-                                   sn_irq_info->irq_last_intr) {
-                                       regval &=
-                                           ~(sn_irq_info->
-                                             irq_int_bit & regval);
-                                       pcibr_force_interrupt(sn_irq_info);
-                               }
+               if (!test_bit(irq, pda->sn_in_service_ivecs)) {
+                       regval &= 0xff;
+                       if (sn_irq_info->irq_int_bit & regval &
+                           sn_irq_info->irq_last_intr) {
+                               regval &= ~(sn_irq_info->irq_int_bit & regval);
+                               sn_call_force_intr_provider(sn_irq_info);
                        }
                }
        }
@@ -404,13 +413,7 @@ void sn_lb_int_war_check(void)
        rcu_read_lock();
        for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
                list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
-                       /*
-                        * Only call for PCI bridges that are fully
-                        * initialized.
-                        */
-                       if (IS_PCI_BRIDGE_ASIC(sn_irq_info->irq_bridge_type) &&
-                           (sn_irq_info->irq_bridge != NULL))
-                               sn_check_intr(i, sn_irq_info);
+                       sn_check_intr(i, sn_irq_info);
                }
        }
        rcu_read_unlock();
index 7c7fe441d62371ec513365bd89814397e0888b2e..a594aca959e6e141eb83a8769887f9199dc8b42a 100644 (file)
@@ -80,8 +80,6 @@ EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid);
 DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda);
 EXPORT_PER_CPU_SYMBOL(__sn_nodepda);
 
-partid_t sn_partid = -1;
-EXPORT_SYMBOL(sn_partid);
 char sn_system_serial_number_string[128];
 EXPORT_SYMBOL(sn_system_serial_number_string);
 u64 sn_partition_serial_number;
@@ -403,6 +401,7 @@ static void __init sn_init_pdas(char **cmdline_p)
                memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
                memset(nodepdaindr[cnode]->phys_cpuid, -1,
                    sizeof(nodepdaindr[cnode]->phys_cpuid));
+               spin_lock_init(&nodepdaindr[cnode]->ptc_lock);
        }
 
        /*
@@ -532,8 +531,8 @@ void __init sn_cpu_init(void)
         */
        {
                u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
-               u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_1,
-                       SH2_PIO_WRITE_STATUS_2, SH2_PIO_WRITE_STATUS_3};
+               u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_2,
+                       SH2_PIO_WRITE_STATUS_1, SH2_PIO_WRITE_STATUS_3};
                u64 *pio;
                pio = is_shub1() ? pio1 : pio2;
                pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]);
index 96cb71d156820f9b33df9a07ea5049afe3bc77b9..3fa95065a4460e618a4cb4d4e1979ed830fc6cee 100644 (file)
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
  */
 
 #include <asm/types.h>
@@ -11,7 +11,7 @@
 
 #define DEADLOCKBIT    SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_SHFT
 #define WRITECOUNTMASK SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK
-#define ALIAS_OFFSET   (SH1_PIO_WRITE_STATUS_0_ALIAS-SH1_PIO_WRITE_STATUS_0)
+#define ALIAS_OFFSET   8
 
 
        .global sn2_ptc_deadlock_recovery_core
@@ -36,13 +36,15 @@ sn2_ptc_deadlock_recovery_core:
        extr.u  piowcphy=piowc,0,61;;   // Convert piowc to uncached physical address
        dep     piowcphy=-1,piowcphy,63,1
        movl    mask=WRITECOUNTMASK
+       mov     r8=r0
 
 1:
        add     scr2=ALIAS_OFFSET,piowc // Address of WRITE_STATUS alias register 
-       mov     scr1=7;;                // Clear DEADLOCK, WRITE_ERROR, MULTI_WRITE_ERROR
-       st8.rel [scr2]=scr1;;
+       ;;
+       ld8.acq scr1=[scr2];;
 
 5:     ld8.acq scr1=[piowc];;          // Wait for PIOs to complete.
+       hint    @pause
        and     scr2=scr1,mask;;        // mask of writecount bits
        cmp.ne  p6,p0=zeroval,scr2
 (p6)   br.cond.sptk 5b
@@ -57,6 +59,7 @@ sn2_ptc_deadlock_recovery_core:
        st8.rel [ptc0]=data0            // Write PTC0 & wait for completion.
 
 5:     ld8.acq scr1=[piowcphy];;       // Wait for PIOs to complete.
+       hint    @pause
        and     scr2=scr1,mask;;        // mask of writecount bits
        cmp.ne  p6,p0=zeroval,scr2
 (p6)   br.cond.sptk 5b;;
@@ -67,6 +70,7 @@ sn2_ptc_deadlock_recovery_core:
 (p7)   st8.rel [ptc1]=data1;;          // Now write PTC1.
 
 5:     ld8.acq scr1=[piowcphy];;       // Wait for PIOs to complete.
+       hint    @pause
        and     scr2=scr1,mask;;        // mask of writecount bits
        cmp.ne  p6,p0=zeroval,scr2
 (p6)   br.cond.sptk 5b
@@ -77,6 +81,7 @@ sn2_ptc_deadlock_recovery_core:
        srlz.i;;
        ////////////// END   PHYSICAL MODE ////////////////////
 
+(p8)   add     r8=1,r8
 (p8)   br.cond.spnt 1b;;               // Repeat if DEADLOCK occurred.
 
        br.ret.sptk     rp
index 7af05a7ac743a2416774ef75245f51b0d0b203a4..0a4ee50c302f94750f6c9f8876970e58b19d8b0e 100644 (file)
@@ -5,7 +5,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
  */
 
 #include <linux/init.h>
@@ -20,6 +20,8 @@
 #include <linux/module.h>
 #include <linux/bitops.h>
 #include <linux/nodemask.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
 
 #include <asm/processor.h>
 #include <asm/irq.h>
 #include <asm/sn/nodepda.h>
 #include <asm/sn/rw_mmr.h>
 
-void sn2_ptc_deadlock_recovery(volatile unsigned long *, unsigned long data0, 
-       volatile unsigned long *, unsigned long data1);
+DEFINE_PER_CPU(struct ptc_stats, ptcstats);
+DECLARE_PER_CPU(struct ptc_stats, ptcstats);
 
 static  __cacheline_aligned DEFINE_SPINLOCK(sn2_global_ptc_lock);
 
-static unsigned long sn2_ptc_deadlock_count;
+void sn2_ptc_deadlock_recovery(short *, short, int, volatile unsigned long *, unsigned long data0,
+       volatile unsigned long *, unsigned long data1);
+
+#ifdef DEBUG_PTC
+/*
+ * ptctest:
+ *
+ *     xyz - 3 digit hex number:
+ *             x - Force PTC purges to use shub:
+ *                     0 - no force
+ *                     1 - force
+ *             y - interupt enable
+ *                     0 - disable interrupts
+ *                     1 - leave interuupts enabled
+ *             z - type of lock:
+ *                     0 - global lock
+ *                     1 - node local lock
+ *                     2 - no lock
+ *
+ *     Note: on shub1, only ptctest == 0 is supported. Don't try other values!
+ */
+
+static unsigned int sn2_ptctest = 0;
+
+static int __init ptc_test(char *str)
+{
+       get_option(&str, &sn2_ptctest);
+       return 1;
+}
+__setup("ptctest=", ptc_test);
+
+static inline int ptc_lock(unsigned long *flagp)
+{
+       unsigned long opt = sn2_ptctest & 255;
+
+       switch (opt) {
+       case 0x00:
+               spin_lock_irqsave(&sn2_global_ptc_lock, *flagp);
+               break;
+       case 0x01:
+               spin_lock_irqsave(&sn_nodepda->ptc_lock, *flagp);
+               break;
+       case 0x02:
+               local_irq_save(*flagp);
+               break;
+       case 0x10:
+               spin_lock(&sn2_global_ptc_lock);
+               break;
+       case 0x11:
+               spin_lock(&sn_nodepda->ptc_lock);
+               break;
+       case 0x12:
+               break;
+       default:
+               BUG();
+       }
+       return opt;
+}
+
+static inline void ptc_unlock(unsigned long flags, int opt)
+{
+       switch (opt) {
+       case 0x00:
+               spin_unlock_irqrestore(&sn2_global_ptc_lock, flags);
+               break;
+       case 0x01:
+               spin_unlock_irqrestore(&sn_nodepda->ptc_lock, flags);
+               break;
+       case 0x02:
+               local_irq_restore(flags);
+               break;
+       case 0x10:
+               spin_unlock(&sn2_global_ptc_lock);
+               break;
+       case 0x11:
+               spin_unlock(&sn_nodepda->ptc_lock);
+               break;
+       case 0x12:
+               break;
+       default:
+               BUG();
+       }
+}
+#else
+
+#define sn2_ptctest    0
+
+static inline int ptc_lock(unsigned long *flagp)
+{
+       spin_lock_irqsave(&sn2_global_ptc_lock, *flagp);
+       return 0;
+}
+
+static inline void ptc_unlock(unsigned long flags, int opt)
+{
+       spin_unlock_irqrestore(&sn2_global_ptc_lock, flags);
+}
+#endif
+
+struct ptc_stats {
+       unsigned long ptc_l;
+       unsigned long change_rid;
+       unsigned long shub_ptc_flushes;
+       unsigned long nodes_flushed;
+       unsigned long deadlocks;
+       unsigned long lock_itc_clocks;
+       unsigned long shub_itc_clocks;
+       unsigned long shub_itc_clocks_max;
+};
 
 static inline unsigned long wait_piowc(void)
 {
@@ -89,9 +199,9 @@ void
 sn2_global_tlb_purge(unsigned long start, unsigned long end,
                     unsigned long nbits)
 {
-       int i, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0;
+       int i, opt, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0;
        volatile unsigned long *ptc0, *ptc1;
-       unsigned long flags = 0, data0 = 0, data1 = 0;
+       unsigned long itc, itc2, flags, data0 = 0, data1 = 0;
        struct mm_struct *mm = current->active_mm;
        short nasids[MAX_NUMNODES], nix;
        nodemask_t nodes_flushed;
@@ -114,16 +224,19 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
                        start += (1UL << nbits);
                } while (start < end);
                ia64_srlz_i();
+               __get_cpu_var(ptcstats).ptc_l++;
                preempt_enable();
                return;
        }
 
        if (atomic_read(&mm->mm_users) == 1) {
                flush_tlb_mm(mm);
+               __get_cpu_var(ptcstats).change_rid++;
                preempt_enable();
                return;
        }
 
+       itc = ia64_get_itc();
        nix = 0;
        for_each_node_mask(cnode, nodes_flushed)
                nasids[nix++] = cnodeid_to_nasid(cnode);
@@ -148,7 +261,12 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
 
        mynasid = get_nasid();
 
-       spin_lock_irqsave(&sn2_global_ptc_lock, flags);
+       itc = ia64_get_itc();
+       opt = ptc_lock(&flags);
+       itc2 = ia64_get_itc();
+       __get_cpu_var(ptcstats).lock_itc_clocks += itc2 - itc;
+       __get_cpu_var(ptcstats).shub_ptc_flushes++;
+       __get_cpu_var(ptcstats).nodes_flushed += nix;
 
        do {
                if (shub1)
@@ -157,7 +275,7 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
                        data0 = (data0 & ~SH2_PTC_ADDR_MASK) | (start & SH2_PTC_ADDR_MASK);
                for (i = 0; i < nix; i++) {
                        nasid = nasids[i];
-                       if (unlikely(nasid == mynasid)) {
+                       if ((!(sn2_ptctest & 3)) && unlikely(nasid == mynasid)) {
                                ia64_ptcga(start, nbits << 2);
                                ia64_srlz_i();
                        } else {
@@ -169,18 +287,22 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
                                flushed = 1;
                        }
                }
-
                if (flushed
                    && (wait_piowc() &
-                       SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_MASK)) {
-                       sn2_ptc_deadlock_recovery(ptc0, data0, ptc1, data1);
+                               (SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_MASK))) {
+                       sn2_ptc_deadlock_recovery(nasids, nix, mynasid, ptc0, data0, ptc1, data1);
                }
 
                start += (1UL << nbits);
 
        } while (start < end);
 
-       spin_unlock_irqrestore(&sn2_global_ptc_lock, flags);
+       itc2 = ia64_get_itc() - itc2;
+       __get_cpu_var(ptcstats).shub_itc_clocks += itc2;
+       if (itc2 > __get_cpu_var(ptcstats).shub_itc_clocks_max)
+               __get_cpu_var(ptcstats).shub_itc_clocks_max = itc2;
+
+       ptc_unlock(flags, opt);
 
        preempt_enable();
 }
@@ -192,31 +314,29 @@ sn2_global_tlb_purge(unsigned long start, unsigned long end,
  * TLB flush transaction.  The recovery sequence is somewhat tricky & is
  * coded in assembly language.
  */
-void sn2_ptc_deadlock_recovery(volatile unsigned long *ptc0, unsigned long data0,
+void sn2_ptc_deadlock_recovery(short *nasids, short nix, int mynasid, volatile unsigned long *ptc0, unsigned long data0,
        volatile unsigned long *ptc1, unsigned long data1)
 {
        extern void sn2_ptc_deadlock_recovery_core(volatile unsigned long *, unsigned long,
                volatile unsigned long *, unsigned long, volatile unsigned long *, unsigned long);
-       int cnode, mycnode, nasid;
-       volatile unsigned long *piows;
-       volatile unsigned long zeroval;
+       short nasid, i;
+       unsigned long *piows, zeroval;
 
-       sn2_ptc_deadlock_count++;
+       __get_cpu_var(ptcstats).deadlocks++;
 
-       piows = pda->pio_write_status_addr;
+       piows = (unsigned long *) pda->pio_write_status_addr;
        zeroval = pda->pio_write_status_val;
 
-       mycnode = numa_node_id();
-
-       for_each_online_node(cnode) {
-               if (is_headless_node(cnode) || cnode == mycnode)
+       for (i=0; i < nix; i++) {
+               nasid = nasids[i];
+               if (!(sn2_ptctest & 3) && nasid == mynasid)
                        continue;
-               nasid = cnodeid_to_nasid(cnode);
                ptc0 = CHANGE_NASID(nasid, ptc0);
                if (ptc1)
                        ptc1 = CHANGE_NASID(nasid, ptc1);
                sn2_ptc_deadlock_recovery_core(ptc0, data0, ptc1, data1, piows, zeroval);
        }
+
 }
 
 /**
@@ -293,3 +413,93 @@ void sn2_send_IPI(int cpuid, int vector, int delivery_mode, int redirect)
 
        sn_send_IPI_phys(nasid, physid, vector, delivery_mode);
 }
+
+#ifdef CONFIG_PROC_FS
+
+#define PTC_BASENAME   "sgi_sn/ptc_statistics"
+
+static void *sn2_ptc_seq_start(struct seq_file *file, loff_t * offset)
+{
+       if (*offset < NR_CPUS)
+               return offset;
+       return NULL;
+}
+
+static void *sn2_ptc_seq_next(struct seq_file *file, void *data, loff_t * offset)
+{
+       (*offset)++;
+       if (*offset < NR_CPUS)
+               return offset;
+       return NULL;
+}
+
+static void sn2_ptc_seq_stop(struct seq_file *file, void *data)
+{
+}
+
+static int sn2_ptc_seq_show(struct seq_file *file, void *data)
+{
+       struct ptc_stats *stat;
+       int cpu;
+
+       cpu = *(loff_t *) data;
+
+       if (!cpu) {
+               seq_printf(file, "# ptc_l change_rid shub_ptc_flushes shub_nodes_flushed deadlocks lock_nsec shub_nsec shub_nsec_max\n");
+               seq_printf(file, "# ptctest %d\n", sn2_ptctest);
+       }
+
+       if (cpu < NR_CPUS && cpu_online(cpu)) {
+               stat = &per_cpu(ptcstats, cpu);
+               seq_printf(file, "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld\n", cpu, stat->ptc_l,
+                               stat->change_rid, stat->shub_ptc_flushes, stat->nodes_flushed,
+                               stat->deadlocks,
+                               1000 * stat->lock_itc_clocks / per_cpu(cpu_info, cpu).cyc_per_usec,
+                               1000 * stat->shub_itc_clocks / per_cpu(cpu_info, cpu).cyc_per_usec,
+                               1000 * stat->shub_itc_clocks_max / per_cpu(cpu_info, cpu).cyc_per_usec);
+       }
+
+       return 0;
+}
+
+static struct seq_operations sn2_ptc_seq_ops = {
+       .start = sn2_ptc_seq_start,
+       .next = sn2_ptc_seq_next,
+       .stop = sn2_ptc_seq_stop,
+       .show = sn2_ptc_seq_show
+};
+
+int sn2_ptc_proc_open(struct inode *inode, struct file *file)
+{
+       return seq_open(file, &sn2_ptc_seq_ops);
+}
+
+static struct file_operations proc_sn2_ptc_operations = {
+       .open = sn2_ptc_proc_open,
+       .read = seq_read,
+       .llseek = seq_lseek,
+       .release = seq_release,
+};
+
+static struct proc_dir_entry *proc_sn2_ptc;
+
+static int __init sn2_ptc_init(void)
+{
+       if (!(proc_sn2_ptc = create_proc_entry(PTC_BASENAME, 0444, NULL))) {
+               printk(KERN_ERR "unable to create %s proc entry", PTC_BASENAME);
+               return -EINVAL;
+       }
+       proc_sn2_ptc->proc_fops = &proc_sn2_ptc_operations;
+       spin_lock_init(&sn2_global_ptc_lock);
+       return 0;
+}
+
+static void __exit sn2_ptc_exit(void)
+{
+       remove_proc_entry(PTC_BASENAME, NULL);
+}
+
+module_init(sn2_ptc_init);
+module_exit(sn2_ptc_exit);
+#endif /* CONFIG_PROC_FS */
+
index 833e700fdac93e4ada8c663c8c182b4d899cf05b..0513aacac8c13898a8e7edf57cfe9530b13e553d 100644 (file)
@@ -36,7 +36,6 @@
 #include <asm/topology.h>
 #include <asm/smp.h>
 #include <asm/semaphore.h>
-#include <asm/segment.h>
 #include <asm/uaccess.h>
 #include <asm/sal.h>
 #include <asm/sn/io.h>
@@ -59,7 +58,7 @@ static int sn_hwperf_enum_objects(int *nobj, struct sn_hwperf_object_info **ret)
        struct sn_hwperf_object_info *objbuf = NULL;
 
        if ((e = sn_hwperf_init()) < 0) {
-               printk("sn_hwperf_init failed: err %d\n", e);
+               printk(KERN_ERR "sn_hwperf_init failed: err %d\n", e);
                goto out;
        }
 
@@ -111,7 +110,7 @@ static int sn_hwperf_geoid_to_cnode(char *location)
        if (sn_hwperf_location_to_bpos(location, &rack, &bay, &slot, &slab))
                return -1;
 
-       for (cnode = 0; cnode < numionodes; cnode++) {
+       for_each_node(cnode) {
                geoid = cnodeid_get_geoid(cnode);
                module_id = geo_module(geoid);
                this_rack = MODULE_GET_RACK(module_id);
@@ -124,11 +123,13 @@ static int sn_hwperf_geoid_to_cnode(char *location)
                }
        }
 
-       return cnode < numionodes ? cnode : -1;
+       return node_possible(cnode) ? cnode : -1;
 }
 
 static int sn_hwperf_obj_to_cnode(struct sn_hwperf_object_info * obj)
 {
+       if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj))
+               BUG();
        if (!obj->sn_hwp_this_part)
                return -1;
        return sn_hwperf_geoid_to_cnode(obj->location);
@@ -174,31 +175,199 @@ static const char *sn_hwperf_get_slabname(struct sn_hwperf_object_info *obj,
        return slabname;
 }
 
-static void print_pci_topology(struct seq_file *s,
-       struct sn_hwperf_object_info *obj, int *ordinal,
-       u64 rack, u64 bay, u64 slot, u64 slab)
+static void print_pci_topology(struct seq_file *s)
+{
+       char *p;
+       size_t sz;
+       int e;
+
+       for (sz = PAGE_SIZE; sz < 16 * PAGE_SIZE; sz += PAGE_SIZE) {
+               if (!(p = (char *)kmalloc(sz, GFP_KERNEL)))
+                       break;
+               e = ia64_sn_ioif_get_pci_topology(__pa(p), sz);
+               if (e == SALRET_OK)
+                       seq_puts(s, p);
+               kfree(p);
+               if (e == SALRET_OK || e == SALRET_NOT_IMPLEMENTED)
+                       break;
+       }
+}
+
+static inline int sn_hwperf_has_cpus(cnodeid_t node)
+{
+       return node_online(node) && nr_cpus_node(node);
+}
+
+static inline int sn_hwperf_has_mem(cnodeid_t node)
+{
+       return node_online(node) && NODE_DATA(node)->node_present_pages;
+}
+
+static struct sn_hwperf_object_info *
+sn_hwperf_findobj_id(struct sn_hwperf_object_info *objbuf,
+       int nobj, int id)
 {
-       char *p1;
-       char *p2;
-       char *pg;
-
-       if (!(pg = (char *)get_zeroed_page(GFP_KERNEL)))
-               return; /* ignore */
-       if (ia64_sn_ioif_get_pci_topology(rack, bay, slot, slab,
-               __pa(pg), PAGE_SIZE) == SN_HWPERF_OP_OK) {
-               for (p1=pg; *p1 && p1 < pg + PAGE_SIZE;) {
-                       if (!(p2 = strchr(p1, '\n')))
+       int i;
+       struct sn_hwperf_object_info *p = objbuf;
+
+       for (i=0; i < nobj; i++, p++) {
+               if (p->id == id)
+                       return p;
+       }
+
+       return NULL;
+
+}
+
+static int sn_hwperf_get_nearest_node_objdata(struct sn_hwperf_object_info *objbuf,
+       int nobj, cnodeid_t node, cnodeid_t *near_mem_node, cnodeid_t *near_cpu_node)
+{
+       int e;
+       struct sn_hwperf_object_info *nodeobj = NULL;
+       struct sn_hwperf_object_info *op;
+       struct sn_hwperf_object_info *dest;
+       struct sn_hwperf_object_info *router;
+       struct sn_hwperf_port_info ptdata[16];
+       int sz, i, j;
+       cnodeid_t c;
+       int found_mem = 0;
+       int found_cpu = 0;
+
+       if (!node_possible(node))
+               return -EINVAL;
+
+       if (sn_hwperf_has_cpus(node)) {
+               if (near_cpu_node)
+                       *near_cpu_node = node;
+               found_cpu++;
+       }
+
+       if (sn_hwperf_has_mem(node)) {
+               if (near_mem_node)
+                       *near_mem_node = node;
+               found_mem++;
+       }
+
+       if (found_cpu && found_mem)
+               return 0; /* trivially successful */
+
+       /* find the argument node object */
+       for (i=0, op=objbuf; i < nobj; i++, op++) {
+               if (!SN_HWPERF_IS_NODE(op) && !SN_HWPERF_IS_IONODE(op))
+                       continue;
+               if (node == sn_hwperf_obj_to_cnode(op)) {
+                       nodeobj = op;
+                       break;
+               }
+       }
+       if (!nodeobj) {
+               e = -ENOENT;
+               goto err;
+       }
+
+       /* get it's interconnect topology */
+       sz = op->ports * sizeof(struct sn_hwperf_port_info);
+       if (sz > sizeof(ptdata))
+               BUG();
+       e = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
+                             SN_HWPERF_ENUM_PORTS, nodeobj->id, sz,
+                             (u64)&ptdata, 0, 0, NULL);
+       if (e != SN_HWPERF_OP_OK) {
+               e = -EINVAL;
+               goto err;
+       }
+
+       /* find nearest node with cpus and nearest memory */
+       for (router=NULL, j=0; j < op->ports; j++) {
+               dest = sn_hwperf_findobj_id(objbuf, nobj, ptdata[j].conn_id);
+               if (!dest || SN_HWPERF_FOREIGN(dest) ||
+                   !SN_HWPERF_IS_NODE(dest) || SN_HWPERF_IS_IONODE(dest)) {
+                       continue;
+               }
+               c = sn_hwperf_obj_to_cnode(dest);
+               if (!found_cpu && sn_hwperf_has_cpus(c)) {
+                       if (near_cpu_node)
+                               *near_cpu_node = c;
+                       found_cpu++;
+               }
+               if (!found_mem && sn_hwperf_has_mem(c)) {
+                       if (near_mem_node)
+                               *near_mem_node = c;
+                       found_mem++;
+               }
+               if (SN_HWPERF_IS_ROUTER(dest))
+                       router = dest;
+       }
+
+       if (router && (!found_cpu || !found_mem)) {
+               /* search for a node connected to the same router */
+               sz = router->ports * sizeof(struct sn_hwperf_port_info);
+               if (sz > sizeof(ptdata))
+                       BUG();
+               e = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
+                                     SN_HWPERF_ENUM_PORTS, router->id, sz,
+                                     (u64)&ptdata, 0, 0, NULL);
+               if (e != SN_HWPERF_OP_OK) {
+                       e = -EINVAL;
+                       goto err;
+               }
+               for (j=0; j < router->ports; j++) {
+                       dest = sn_hwperf_findobj_id(objbuf, nobj,
+                               ptdata[j].conn_id);
+                       if (!dest || dest->id == node ||
+                           SN_HWPERF_FOREIGN(dest) ||
+                           !SN_HWPERF_IS_NODE(dest) ||
+                           SN_HWPERF_IS_IONODE(dest)) {
+                               continue;
+                       }
+                       c = sn_hwperf_obj_to_cnode(dest);
+                       if (!found_cpu && sn_hwperf_has_cpus(c)) {
+                               if (near_cpu_node)
+                                       *near_cpu_node = c;
+                               found_cpu++;
+                       }
+                       if (!found_mem && sn_hwperf_has_mem(c)) {
+                               if (near_mem_node)
+                                       *near_mem_node = c;
+                               found_mem++;
+                       }
+                       if (found_cpu && found_mem)
+                               break;
+               }
+       }
+
+       if (!found_cpu || !found_mem) {
+               /* resort to _any_ node with CPUs and memory */
+               for (i=0, op=objbuf; i < nobj; i++, op++) {
+                       if (SN_HWPERF_FOREIGN(op) ||
+                           SN_HWPERF_IS_IONODE(op) ||
+                           !SN_HWPERF_IS_NODE(op)) {
+                               continue;
+                       }
+                       c = sn_hwperf_obj_to_cnode(op);
+                       if (!found_cpu && sn_hwperf_has_cpus(c)) {
+                               if (near_cpu_node)
+                                       *near_cpu_node = c;
+                               found_cpu++;
+                       }
+                       if (!found_mem && sn_hwperf_has_mem(c)) {
+                               if (near_mem_node)
+                                       *near_mem_node = c;
+                               found_mem++;
+                       }
+                       if (found_cpu && found_mem)
                                break;
-                       *p2 = '\0';
-                       seq_printf(s, "pcibus %d %s-%s\n",
-                               *ordinal, obj->location, p1);
-                       (*ordinal)++;
-                       p1 = p2 + 1;
                }
        }
-       free_page((unsigned long)pg);
+
+       if (!found_cpu || !found_mem)
+               e = -ENODATA;
+
+err:
+       return e;
 }
 
+
 static int sn_topology_show(struct seq_file *s, void *d)
 {
        int sz;
@@ -215,7 +384,6 @@ static int sn_topology_show(struct seq_file *s, void *d)
        struct sn_hwperf_object_info *p;
        struct sn_hwperf_object_info *obj = d;  /* this object */
        struct sn_hwperf_object_info *objs = s->private; /* all objects */
-       int rack, bay, slot, slab;
        u8 shubtype;
        u8 system_size;
        u8 sharing_size;
@@ -225,7 +393,6 @@ static int sn_topology_show(struct seq_file *s, void *d)
        u8 region_size;
        u16 nasid_mask;
        int nasid_msb;
-       int pci_bus_ordinal = 0;
 
        if (obj == objs) {
                seq_printf(s, "# sn_topology version 2\n");
@@ -253,6 +420,8 @@ static int sn_topology_show(struct seq_file *s, void *d)
                        shubtype ? "shub2" : "shub1", 
                        (u64)nasid_mask << nasid_shift, nasid_msb, nasid_shift,
                        system_size, sharing_size, coher, region_size);
+
+               print_pci_topology(s);
        }
 
        if (SN_HWPERF_FOREIGN(obj)) {
@@ -272,11 +441,24 @@ static int sn_topology_show(struct seq_file *s, void *d)
        if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj))
                seq_putc(s, '\n');
        else {
+               cnodeid_t near_mem = -1;
+               cnodeid_t near_cpu = -1;
+
                seq_printf(s, ", nasid 0x%x", cnodeid_to_nasid(ordinal));
-               for (i=0; i < numionodes; i++) {
-                       seq_printf(s, i ? ":%d" : ", dist %d",
-                               node_distance(ordinal, i));
+
+               if (sn_hwperf_get_nearest_node_objdata(objs, sn_hwperf_obj_cnt,
+                       ordinal, &near_mem, &near_cpu) == 0) {
+                       seq_printf(s, ", near_mem_nodeid %d, near_cpu_nodeid %d",
+                               near_mem, near_cpu);
+               }
+
+               if (!SN_HWPERF_IS_IONODE(obj)) {
+                       for_each_online_node(i) {
+                               seq_printf(s, i ? ":%d" : ", dist %d",
+                                       node_distance(ordinal, i));
+                       }
                }
+
                seq_putc(s, '\n');
 
                /*
@@ -300,17 +482,6 @@ static int sn_topology_show(struct seq_file *s, void *d)
                                seq_putc(s, '\n');
                        }
                }
-
-               /*
-                * PCI busses attached to this node, if any
-                */
-               if (sn_hwperf_location_to_bpos(obj->location,
-                       &rack, &bay, &slot, &slab)) {
-                       /* export pci bus info */
-                       print_pci_topology(s, obj, &pci_bus_ordinal,
-                               rack, bay, slot, slab);
-
-               }
        }
 
        if (obj->ports) {
@@ -572,6 +743,8 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, u64 arg)
                if ((r = sn_hwperf_enum_objects(&nobj, &objs)) == 0) {
                        memset(p, 0, a.sz);
                        for (i = 0; i < nobj; i++) {
+                               if (!SN_HWPERF_IS_NODE(objs + i))
+                                       continue;
                                node = sn_hwperf_obj_to_cnode(objs + i);
                                for_each_online_cpu(j) {
                                        if (node != cpu_to_node(j))
@@ -598,7 +771,7 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, u64 arg)
 
        case SN_HWPERF_GET_NODE_NASID:
                if (a.sz != sizeof(u64) ||
-                  (node = a.arg) < 0 || node >= numionodes) {
+                  (node = a.arg) < 0 || !node_possible(node)) {
                        r = -EINVAL;
                        goto error;
                }
@@ -627,6 +800,14 @@ sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, u64 arg)
                                vfree(objs);
                                goto error;
                        }
+
+                       if (!SN_HWPERF_IS_NODE(objs + i) &&
+                           !SN_HWPERF_IS_IONODE(objs + i)) {
+                               r = -ENOENT;
+                               vfree(objs);
+                               goto error;
+                       }
+
                        *(u64 *)p = (u64)sn_hwperf_obj_to_cnode(objs + i);
                        vfree(objs);
                }
@@ -692,6 +873,7 @@ static int sn_hwperf_init(void)
 
        /* single threaded, once-only initialization */
        down(&sn_hwperf_init_mutex);
+
        if (sn_hwperf_salheap) {
                up(&sn_hwperf_init_mutex);
                return e;
@@ -742,19 +924,6 @@ out:
                sn_hwperf_salheap = NULL;
                sn_hwperf_obj_cnt = 0;
        }
-
-       if (!e) {
-               /*
-                * Register a dynamic misc device for ioctl. Platforms
-                * supporting hotplug will create /dev/sn_hwperf, else
-                * user can to look up the minor number in /proc/misc.
-                */
-               if ((e = misc_register(&sn_hwperf_dev)) != 0) {
-                       printk(KERN_ERR "sn_hwperf_init: misc register "
-                              "for \"sn_hwperf\" failed, err %d\n", e);
-               }
-       }
-
        up(&sn_hwperf_init_mutex);
        return e;
 }
@@ -782,3 +951,41 @@ int sn_topology_release(struct inode *inode, struct file *file)
        vfree(seq->private);
        return seq_release(inode, file);
 }
+
+int sn_hwperf_get_nearest_node(cnodeid_t node,
+       cnodeid_t *near_mem_node, cnodeid_t *near_cpu_node)
+{
+       int e;
+       int nobj;
+       struct sn_hwperf_object_info *objbuf;
+
+       if ((e = sn_hwperf_enum_objects(&nobj, &objbuf)) == 0) {
+               e = sn_hwperf_get_nearest_node_objdata(objbuf, nobj,
+                       node, near_mem_node, near_cpu_node);
+               vfree(objbuf);
+       }
+
+       return e;
+}
+
+static int __devinit sn_hwperf_misc_register_init(void)
+{
+       int e;
+
+       sn_hwperf_init();
+
+       /*
+        * Register a dynamic misc device for hwperf ioctls. Platforms
+        * supporting hotplug will create /dev/sn_hwperf, else user
+        * can to look up the minor number in /proc/misc.
+        */
+       if ((e = misc_register(&sn_hwperf_dev)) != 0) {
+               printk(KERN_ERR "sn_hwperf_misc_register_init: failed to "
+               "register misc device for \"%s\"\n", sn_hwperf_dev.name);
+       }
+
+       return e;
+}
+
+device_initcall(sn_hwperf_misc_register_init); /* after misc_init() */
+EXPORT_SYMBOL(sn_hwperf_get_nearest_node);
index 6a80fca807b9c59119ca08367da12e1d7ceca651..51bf82720d994188faf55a74b68888908f78c3e1 100644 (file)
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
  */
 #include <linux/config.h>
 #include <asm/uaccess.h>
@@ -15,7 +15,7 @@
 
 static int partition_id_show(struct seq_file *s, void *p)
 {
-       seq_printf(s, "%d\n", sn_local_partid());
+       seq_printf(s, "%d\n", sn_partition_id);
        return 0;
 }
 
index cde7375390b0db4e4160ffaaf44d6bc44dfb0763..adf5db2e2afeb4e2742457b40c062e0546e42972 100644 (file)
@@ -1,7 +1,7 @@
 /*
  *
  *
- * Copyright (c) 2003 Silicon Graphics, Inc.  All Rights Reserved.
+ * Copyright (c) 2005 Silicon Graphics, Inc.  All Rights Reserved.
  * 
  * This program is free software; you can redistribute it and/or modify it 
  * under the terms of version 2 of the GNU General Public License 
@@ -50,14 +50,16 @@ void sn_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
                             LED_CPU_HEARTBEAT, LED_CPU_HEARTBEAT);
        }
 
-       if (enable_shub_wars_1_1()) {
-               /* Bugfix code for SHUB 1.1 */
-               if (pda->pio_shub_war_cam_addr)
-                       *pda->pio_shub_war_cam_addr = 0x8000000000000010UL;
+       if (is_shub1()) {
+               if (enable_shub_wars_1_1()) {
+                       /* Bugfix code for SHUB 1.1 */
+                       if (pda->pio_shub_war_cam_addr)
+                               *pda->pio_shub_war_cam_addr = 0x8000000000000010UL;
+               }
+               if (pda->sn_lb_int_war_ticks == 0)
+                       sn_lb_int_war_check();
+               pda->sn_lb_int_war_ticks++;
+               if (pda->sn_lb_int_war_ticks >= SN_LB_INT_WAR_INTERVAL)
+                       pda->sn_lb_int_war_ticks = 0;
        }
-       if (pda->sn_lb_int_war_ticks == 0)
-               sn_lb_int_war_check();
-       pda->sn_lb_int_war_ticks++;
-       if (pda->sn_lb_int_war_ticks >= SN_LB_INT_WAR_INTERVAL)
-               pda->sn_lb_int_war_ticks = 0;
 }
index 2f915bce25f9e6734040ccb0611b2236acac12ee..321576b1b425f8916858c875058326148216fa8f 100644 (file)
@@ -7,4 +7,4 @@
 #
 # Makefile for the sn pci general routines.
 
-obj-y := pci_dma.o tioca_provider.o pcibr/ 
+obj-y := pci_dma.o tioca_provider.o tioce_provider.o pcibr/
index b058dc2a0b9d3dfb7a17fe73f2ae35f72266ebd3..34093476e9652fc03938edeadeddb4596d439d34 100644 (file)
@@ -3,7 +3,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved.
+ * Copyright (C) 2001-2005 Silicon Graphics, Inc. All rights reserved.
  */
 
 #include <linux/types.h>
@@ -215,8 +215,8 @@ void sn_dma_flush(uint64_t addr)
        int is_tio;
        int wid_num;
        int i, j;
-       int bwin;
        uint64_t flags;
+       uint64_t itte;
        struct hubdev_info *hubinfo;
        volatile struct sn_flush_device_list *p;
        struct sn_flush_nasid_entry *flush_nasid_list;
@@ -233,31 +233,36 @@ void sn_dma_flush(uint64_t addr)
        if (!hubinfo) {
                BUG();
        }
-       is_tio = (nasid & 1);
-       if (is_tio) {
-               wid_num = TIO_SWIN_WIDGETNUM(addr);
-               bwin = TIO_BWIN_WINDOWNUM(addr);
-       } else {
-               wid_num = SWIN_WIDGETNUM(addr);
-               bwin = BWIN_WINDOWNUM(addr);
-       }
 
        flush_nasid_list = &hubinfo->hdi_flush_nasid_list;
        if (flush_nasid_list->widget_p == NULL)
                return;
-       if (bwin > 0) {
-               uint64_t itte = flush_nasid_list->iio_itte[bwin];
 
-               if (is_tio) {
-                       wid_num = (itte >> TIO_ITTE_WIDGET_SHIFT) &
-                           TIO_ITTE_WIDGET_MASK;
-               } else {
-                       wid_num = (itte >> IIO_ITTE_WIDGET_SHIFT) &
-                           IIO_ITTE_WIDGET_MASK;
-               }
+       is_tio = (nasid & 1);
+       if (is_tio) {
+               int itte_index;
+
+               if (TIO_HWIN(addr))
+                       itte_index = 0;
+               else if (TIO_BWIN_WINDOWNUM(addr))
+                       itte_index = TIO_BWIN_WINDOWNUM(addr);
+               else
+                       itte_index = -1;
+
+               if (itte_index >= 0) {
+                       itte = flush_nasid_list->iio_itte[itte_index];
+                       if (! TIO_ITTE_VALID(itte))
+                               return;
+                       wid_num = TIO_ITTE_WIDGET(itte);
+               } else
+                       wid_num = TIO_SWIN_WIDGETNUM(addr);
+       } else {
+               if (BWIN_WINDOWNUM(addr)) {
+                       itte = flush_nasid_list->iio_itte[BWIN_WINDOWNUM(addr)];
+                       wid_num = IIO_ITTE_WIDGET(itte);
+               } else
+                       wid_num = SWIN_WIDGETNUM(addr);
        }
-       if (flush_nasid_list->widget_p == NULL)
-               return;
        if (flush_nasid_list->widget_p[wid_num] == NULL)
                return;
        p = &flush_nasid_list->widget_p[wid_num][0];
@@ -283,10 +288,16 @@ void sn_dma_flush(uint64_t addr)
        /*
         * For TIOCP use the Device(x) Write Request Buffer Flush Bridge
         * register since it ensures the data has entered the coherence
-        * domain, unlike PIC
+        * domain, unlike PIC.
         */
        if (is_tio) {
-               uint32_t tio_id = REMOTE_HUB_L(nasid, TIO_NODE_ID);
+               /*
+                * Note:  devices behind TIOCE should never be matched in the
+                * above code, and so the following code is PIC/CP centric.
+                * If CE ever needs the sn_dma_flush mechanism, we will have
+                * to account for that here and in tioce_bus_fixup().
+                */
+               uint32_t tio_id = HUB_L(TIO_IOSPACE_ADDR(nasid, TIO_NODE_ID));
                uint32_t revnum = XWIDGET_PART_REV_NUM(tio_id);
 
                /* TIOCP BRINGUP WAR (PV907516): Don't write buffer flush reg */
@@ -306,7 +317,8 @@ void sn_dma_flush(uint64_t addr)
                *(volatile uint32_t *)(p->sfdl_force_int_addr) = 1;
 
                /* wait for the interrupt to come back. */
-               while (*(p->sfdl_flush_addr) != 0x10f) ;
+               while (*(p->sfdl_flush_addr) != 0x10f)
+                       cpu_relax();
 
                /* okay, everything is synched up. */
                spin_unlock_irqrestore((spinlock_t *)&p->sfdl_flush_lock, flags);
index b95e928636a1bb6c4417e23381b9bfd27992c6fc..7b03b8084ffc441d90d3725e601816f6b856d741 100644 (file)
@@ -15,6 +15,7 @@
 #include <asm/sn/pcibus_provider_defs.h>
 #include <asm/sn/pcidev.h>
 #include <asm/sn/sn_sal.h>
+#include <asm/sn/sn2/sn_hwperf.h>
 #include "xtalk/xwidgetdev.h"
 #include "xtalk/hubdev.h"
 
@@ -60,7 +61,7 @@ static int sal_pcibr_error_interrupt(struct pcibus_info *soft)
        ret_stuff.status = 0;
        ret_stuff.v0 = 0;
 
-       segment = 0;
+       segment = soft->pbi_buscommon.bs_persist_segment;
        busnum = soft->pbi_buscommon.bs_persist_busnum;
        SAL_CALL_NOLOCK(ret_stuff,
                        (u64) SN_SAL_IOIF_ERROR_INTERRUPT,
@@ -88,6 +89,7 @@ void *
 pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller)
 {
        int nasid, cnode, j;
+       cnodeid_t near_cnode;
        struct hubdev_info *hubdev_info;
        struct pcibus_info *soft;
        struct sn_flush_device_list *sn_flush_device_list;
@@ -115,7 +117,7 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
        /*
         * register the bridge's error interrupt handler
         */
-       if (request_irq(SGI_PCIBR_ERROR, (void *)pcibr_error_intr_handler,
+       if (request_irq(SGI_PCIASIC_ERROR, (void *)pcibr_error_intr_handler,
                        SA_SHIRQ, "PCIBR error", (void *)(soft))) {
                printk(KERN_WARNING
                       "pcibr cannot allocate interrupt for error handler\n");
@@ -142,9 +144,12 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
                             j++, sn_flush_device_list++) {
                                if (sn_flush_device_list->sfdl_slot == -1)
                                        continue;
-                               if (sn_flush_device_list->
-                                   sfdl_persistent_busnum ==
-                                   soft->pbi_buscommon.bs_persist_busnum)
+                               if ((sn_flush_device_list->
+                                    sfdl_persistent_segment ==
+                                    soft->pbi_buscommon.bs_persist_segment) &&
+                                    (sn_flush_device_list->
+                                    sfdl_persistent_busnum ==
+                                    soft->pbi_buscommon.bs_persist_busnum))
                                        sn_flush_device_list->sfdl_pcibus_info =
                                            soft;
                        }
@@ -158,12 +163,18 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
        memset(soft->pbi_int_ate_resource.ate, 0,
               (soft->pbi_int_ate_size * sizeof(uint64_t)));
 
-       if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP)
-               /*
-                * TIO PCI Bridge with no closest node information.
-                * FIXME: Find another way to determine the closest node
-                */
-               controller->node = -1;
+       if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) {
+               /* TIO PCI Bridge: find nearest node with CPUs */
+               int e = sn_hwperf_get_nearest_node(cnode, NULL, &near_cnode);
+
+               if (e < 0) {
+                       near_cnode = (cnodeid_t)-1; /* use any node */
+                       printk(KERN_WARNING "pcibr_bus_fixup: failed to find "
+                               "near node with CPUs to TIO node %d, err=%d\n",
+                               cnode, e);
+               }
+               controller->node = near_cnode;
+       }
        else
                controller->node = cnode;
        return soft;
@@ -175,6 +186,9 @@ void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info)
        struct pcibus_info *pcibus_info;
        int bit = sn_irq_info->irq_int_bit;
 
+       if (! sn_irq_info->irq_bridge)
+               return;
+
        pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
        if (pcidev_info) {
                pcibus_info =
@@ -184,7 +198,7 @@ void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info)
        }
 }
 
-void pcibr_change_devices_irq(struct sn_irq_info *sn_irq_info)
+void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info)
 {
        struct pcidev_info *pcidev_info;
        struct pcibus_info *pcibus_info;
@@ -219,6 +233,8 @@ struct sn_pcibus_provider pcibr_provider = {
        .dma_map_consistent = pcibr_dma_map_consistent,
        .dma_unmap = pcibr_dma_unmap,
        .bus_fixup = pcibr_bus_fixup,
+       .force_interrupt = pcibr_force_interrupt,
+       .target_interrupt = pcibr_target_interrupt
 };
 
 int
index 5d76a758146597d45d822474789223db97dcb4bc..ea09c12f02586de9d6bc49507951fb919420ea70 100644 (file)
@@ -559,7 +559,7 @@ tioca_error_intr_handler(int irq, void *arg, struct pt_regs *pt)
        ret_stuff.status = 0;
        ret_stuff.v0 = 0;
 
-       segment = 0;
+       segment = soft->ca_common.bs_persist_segment;
        busnum = soft->ca_common.bs_persist_busnum;
 
        SAL_CALL_NOLOCK(ret_stuff,
@@ -622,7 +622,8 @@ tioca_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
            nasid_to_cnodeid(tioca_common->ca_closest_nasid);
        tioca_common->ca_kernel_private = (uint64_t) tioca_kern;
 
-       bus = pci_find_bus(0, tioca_common->ca_common.bs_persist_busnum);
+       bus = pci_find_bus(tioca_common->ca_common.bs_persist_segment,
+               tioca_common->ca_common.bs_persist_busnum);
        BUG_ON(!bus);
        tioca_kern->ca_devices = &bus->devices;
 
@@ -656,6 +657,8 @@ static struct sn_pcibus_provider tioca_pci_interfaces = {
        .dma_map_consistent = tioca_dma_map,
        .dma_unmap = tioca_dma_unmap,
        .bus_fixup = tioca_bus_fixup,
+       .force_interrupt = NULL,
+       .target_interrupt = NULL
 };
 
 /**
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
new file mode 100644 (file)
index 0000000..8e75db2
--- /dev/null
@@ -0,0 +1,771 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003-2005 Silicon Graphics, Inc.  All Rights Reserved.
+ */
+
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <asm/sn/sn_sal.h>
+#include <asm/sn/addrs.h>
+#include <asm/sn/pcidev.h>
+#include <asm/sn/pcibus_provider_defs.h>
+#include <asm/sn/tioce_provider.h>
+
+/**
+ * Bus address ranges for the 5 flavors of TIOCE DMA
+ */
+
+#define TIOCE_D64_MIN  0x8000000000000000UL
+#define TIOCE_D64_MAX  0xffffffffffffffffUL
+#define TIOCE_D64_ADDR(a)      ((a) >= TIOCE_D64_MIN)
+
+#define TIOCE_D32_MIN  0x0000000080000000UL
+#define TIOCE_D32_MAX  0x00000000ffffffffUL
+#define TIOCE_D32_ADDR(a)      ((a) >= TIOCE_D32_MIN && (a) <= TIOCE_D32_MAX)
+
+#define TIOCE_M32_MIN  0x0000000000000000UL
+#define TIOCE_M32_MAX  0x000000007fffffffUL
+#define TIOCE_M32_ADDR(a)      ((a) >= TIOCE_M32_MIN && (a) <= TIOCE_M32_MAX)
+
+#define TIOCE_M40_MIN  0x0000004000000000UL
+#define TIOCE_M40_MAX  0x0000007fffffffffUL
+#define TIOCE_M40_ADDR(a)      ((a) >= TIOCE_M40_MIN && (a) <= TIOCE_M40_MAX)
+
+#define TIOCE_M40S_MIN 0x0000008000000000UL
+#define TIOCE_M40S_MAX 0x000000ffffffffffUL
+#define TIOCE_M40S_ADDR(a)     ((a) >= TIOCE_M40S_MIN && (a) <= TIOCE_M40S_MAX)
+
+/*
+ * ATE manipulation macros.
+ */
+
+#define ATE_PAGESHIFT(ps)      (__ffs(ps))
+#define ATE_PAGEMASK(ps)       ((ps)-1)
+
+#define ATE_PAGE(x, ps) ((x) >> ATE_PAGESHIFT(ps))
+#define ATE_NPAGES(start, len, pagesize) \
+       (ATE_PAGE((start)+(len)-1, pagesize) - ATE_PAGE(start, pagesize) + 1)
+
+#define ATE_VALID(ate) ((ate) & (1UL << 63))
+#define ATE_MAKE(addr, ps) (((addr) & ~ATE_PAGEMASK(ps)) | (1UL << 63))
+
+/*
+ * Flavors of ate-based mapping supported by tioce_alloc_map()
+ */
+
+#define TIOCE_ATE_M32  1
+#define TIOCE_ATE_M40  2
+#define TIOCE_ATE_M40S 3
+
+#define KB(x)  ((x) << 10)
+#define MB(x)  ((x) << 20)
+#define GB(x)  ((x) << 30)
+
+/**
+ * tioce_dma_d64 - create a DMA mapping using 64-bit direct mode
+ * @ct_addr: system coretalk address
+ *
+ * Map @ct_addr into 64-bit CE bus space.  No device context is necessary
+ * and no CE mapping are consumed.
+ *
+ * Bits 53:0 come from the coretalk address.  The remaining bits are set as
+ * follows:
+ *
+ * 63    - must be 1 to indicate d64 mode to CE hardware
+ * 62    - barrier bit ... controlled with tioce_dma_barrier()
+ * 61    - 0 since this is not an MSI transaction
+ * 60:54 - reserved, MBZ
+ */
+static uint64_t
+tioce_dma_d64(unsigned long ct_addr)
+{
+       uint64_t bus_addr;
+
+       bus_addr = ct_addr | (1UL << 63);
+
+       return bus_addr;
+}
+
+/**
+ * pcidev_to_tioce - return misc ce related pointers given a pci_dev
+ * @pci_dev: pci device context
+ * @base: ptr to store struct tioce_mmr * for the CE holding this device
+ * @kernel: ptr to store struct tioce_kernel * for the CE holding this device
+ * @port: ptr to store the CE port number that this device is on
+ *
+ * Return pointers to various CE-related structures for the CE upstream of
+ * @pci_dev.
+ */
+static inline void
+pcidev_to_tioce(struct pci_dev *pdev, struct tioce **base,
+               struct tioce_kernel **kernel, int *port)
+{
+       struct pcidev_info *pcidev_info;
+       struct tioce_common *ce_common;
+       struct tioce_kernel *ce_kernel;
+
+       pcidev_info = SN_PCIDEV_INFO(pdev);
+       ce_common = (struct tioce_common *)pcidev_info->pdi_pcibus_info;
+       ce_kernel = (struct tioce_kernel *)ce_common->ce_kernel_private;
+
+       if (base)
+               *base = (struct tioce *)ce_common->ce_pcibus.bs_base;
+       if (kernel)
+               *kernel = ce_kernel;
+
+       /*
+        * we use port as a zero-based value internally, even though the
+        * documentation is 1-based.
+        */
+       if (port)
+               *port =
+                   (pdev->bus->number < ce_kernel->ce_port1_secondary) ? 0 : 1;
+}
+
+/**
+ * tioce_alloc_map - Given a coretalk address, map it to pcie bus address
+ * space using one of the various ATE-based address modes.
+ * @ce_kern: tioce context
+ * @type: map mode to use
+ * @port: 0-based port that the requesting device is downstream of
+ * @ct_addr: the coretalk address to map
+ * @len: number of bytes to map
+ *
+ * Given the addressing type, set up various paramaters that define the
+ * ATE pool to use.  Search for a contiguous block of entries to cover the
+ * length, and if enough resources exist, fill in the ATE's and construct a
+ * tioce_dmamap struct to track the mapping.
+ */
+static uint64_t
+tioce_alloc_map(struct tioce_kernel *ce_kern, int type, int port,
+               uint64_t ct_addr, int len)
+{
+       int i;
+       int j;
+       int first;
+       int last;
+       int entries;
+       int nates;
+       int pagesize;
+       uint64_t *ate_shadow;
+       uint64_t *ate_reg;
+       uint64_t addr;
+       struct tioce *ce_mmr;
+       uint64_t bus_base;
+       struct tioce_dmamap *map;
+
+       ce_mmr = (struct tioce *)ce_kern->ce_common->ce_pcibus.bs_base;
+
+       switch (type) {
+       case TIOCE_ATE_M32:
+               /*
+                * The first 64 entries of the ate3240 pool are dedicated to
+                * super-page (TIOCE_ATE_M40S) mode.
+                */
+               first = 64;
+               entries = TIOCE_NUM_M3240_ATES - 64;
+               ate_shadow = ce_kern->ce_ate3240_shadow;
+               ate_reg = ce_mmr->ce_ure_ate3240;
+               pagesize = ce_kern->ce_ate3240_pagesize;
+               bus_base = TIOCE_M32_MIN;
+               break;
+       case TIOCE_ATE_M40:
+               first = 0;
+               entries = TIOCE_NUM_M40_ATES;
+               ate_shadow = ce_kern->ce_ate40_shadow;
+               ate_reg = ce_mmr->ce_ure_ate40;
+               pagesize = MB(64);
+               bus_base = TIOCE_M40_MIN;
+               break;
+       case TIOCE_ATE_M40S:
+               /*
+                * ate3240 entries 0-31 are dedicated to port1 super-page
+                * mappings.  ate3240 entries 32-63 are dedicated to port2.
+                */
+               first = port * 32;
+               entries = 32;
+               ate_shadow = ce_kern->ce_ate3240_shadow;
+               ate_reg = ce_mmr->ce_ure_ate3240;
+               pagesize = GB(16);
+               bus_base = TIOCE_M40S_MIN;
+               break;
+       default:
+               return 0;
+       }
+
+       nates = ATE_NPAGES(ct_addr, len, pagesize);
+       if (nates > entries)
+               return 0;
+
+       last = first + entries - nates;
+       for (i = first; i <= last; i++) {
+               if (ATE_VALID(ate_shadow[i]))
+                       continue;
+
+               for (j = i; j < i + nates; j++)
+                       if (ATE_VALID(ate_shadow[j]))
+                               break;
+
+               if (j >= i + nates)
+                       break;
+       }
+
+       if (i > last)
+               return 0;
+
+       map = kcalloc(1, sizeof(struct tioce_dmamap), GFP_ATOMIC);
+       if (!map)
+               return 0;
+
+       addr = ct_addr;
+       for (j = 0; j < nates; j++) {
+               uint64_t ate;
+
+               ate = ATE_MAKE(addr, pagesize);
+               ate_shadow[i + j] = ate;
+               ate_reg[i + j] = ate;
+               addr += pagesize;
+       }
+
+       map->refcnt = 1;
+       map->nbytes = nates * pagesize;
+       map->ct_start = ct_addr & ~ATE_PAGEMASK(pagesize);
+       map->pci_start = bus_base + (i * pagesize);
+       map->ate_hw = &ate_reg[i];
+       map->ate_shadow = &ate_shadow[i];
+       map->ate_count = nates;
+
+       list_add(&map->ce_dmamap_list, &ce_kern->ce_dmamap_list);
+
+       return (map->pci_start + (ct_addr - map->ct_start));
+}
+
+/**
+ * tioce_dma_d32 - create a DMA mapping using 32-bit direct mode
+ * @pdev: linux pci_dev representing the function
+ * @paddr: system physical address
+ *
+ * Map @paddr into 32-bit bus space of the CE associated with @pcidev_info.
+ */
+static uint64_t
+tioce_dma_d32(struct pci_dev *pdev, uint64_t ct_addr)
+{
+       int dma_ok;
+       int port;
+       struct tioce *ce_mmr;
+       struct tioce_kernel *ce_kern;
+       uint64_t ct_upper;
+       uint64_t ct_lower;
+       dma_addr_t bus_addr;
+
+       ct_upper = ct_addr & ~0x3fffffffUL;
+       ct_lower = ct_addr & 0x3fffffffUL;
+
+       pcidev_to_tioce(pdev, &ce_mmr, &ce_kern, &port);
+
+       if (ce_kern->ce_port[port].dirmap_refcnt == 0) {
+               volatile uint64_t tmp;
+
+               ce_kern->ce_port[port].dirmap_shadow = ct_upper;
+               ce_mmr->ce_ure_dir_map[port] = ct_upper;
+               tmp = ce_mmr->ce_ure_dir_map[port];
+               dma_ok = 1;
+       } else
+               dma_ok = (ce_kern->ce_port[port].dirmap_shadow == ct_upper);
+
+       if (dma_ok) {
+               ce_kern->ce_port[port].dirmap_refcnt++;
+               bus_addr = TIOCE_D32_MIN + ct_lower;
+       } else
+               bus_addr = 0;
+
+       return bus_addr;
+}
+
+/**
+ * tioce_dma_barrier - swizzle a TIOCE bus address to include or exclude
+ * the barrier bit.
+ * @bus_addr:  bus address to swizzle
+ *
+ * Given a TIOCE bus address, set the appropriate bit to indicate barrier
+ * attributes.
+ */
+static uint64_t
+tioce_dma_barrier(uint64_t bus_addr, int on)
+{
+       uint64_t barrier_bit;
+
+       /* barrier not supported in M40/M40S mode */
+       if (TIOCE_M40_ADDR(bus_addr) || TIOCE_M40S_ADDR(bus_addr))
+               return bus_addr;
+
+       if (TIOCE_D64_ADDR(bus_addr))
+               barrier_bit = (1UL << 62);
+       else                    /* must be m32 or d32 */
+               barrier_bit = (1UL << 30);
+
+       return (on) ? (bus_addr | barrier_bit) : (bus_addr & ~barrier_bit);
+}
+
+/**
+ * tioce_dma_unmap - release CE mapping resources
+ * @pdev: linux pci_dev representing the function
+ * @bus_addr: bus address returned by an earlier tioce_dma_map
+ * @dir: mapping direction (unused)
+ *
+ * Locate mapping resources associated with @bus_addr and release them.
+ * For mappings created using the direct modes there are no resources
+ * to release.
+ */
+void
+tioce_dma_unmap(struct pci_dev *pdev, dma_addr_t bus_addr, int dir)
+{
+       int i;
+       int port;
+       struct tioce_kernel *ce_kern;
+       struct tioce *ce_mmr;
+       unsigned long flags;
+
+       bus_addr = tioce_dma_barrier(bus_addr, 0);
+       pcidev_to_tioce(pdev, &ce_mmr, &ce_kern, &port);
+
+       /* nothing to do for D64 */
+
+       if (TIOCE_D64_ADDR(bus_addr))
+               return;
+
+       spin_lock_irqsave(&ce_kern->ce_lock, flags);
+
+       if (TIOCE_D32_ADDR(bus_addr)) {
+               if (--ce_kern->ce_port[port].dirmap_refcnt == 0) {
+                       ce_kern->ce_port[port].dirmap_shadow = 0;
+                       ce_mmr->ce_ure_dir_map[port] = 0;
+               }
+       } else {
+               struct tioce_dmamap *map;
+
+               list_for_each_entry(map, &ce_kern->ce_dmamap_list,
+                                   ce_dmamap_list) {
+                       uint64_t last;
+
+                       last = map->pci_start + map->nbytes - 1;
+                       if (bus_addr >= map->pci_start && bus_addr <= last)
+                               break;
+               }
+
+               if (&map->ce_dmamap_list == &ce_kern->ce_dmamap_list) {
+                       printk(KERN_WARNING
+                              "%s:  %s - no map found for bus_addr 0x%lx\n",
+                              __FUNCTION__, pci_name(pdev), bus_addr);
+               } else if (--map->refcnt == 0) {
+                       for (i = 0; i < map->ate_count; i++) {
+                               map->ate_shadow[i] = 0;
+                               map->ate_hw[i] = 0;
+                       }
+
+                       list_del(&map->ce_dmamap_list);
+                       kfree(map);
+               }
+       }
+
+       spin_unlock_irqrestore(&ce_kern->ce_lock, flags);
+}
+
+/**
+ * tioce_do_dma_map - map pages for PCI DMA
+ * @pdev: linux pci_dev representing the function
+ * @paddr: host physical address to map
+ * @byte_count: bytes to map
+ *
+ * This is the main wrapper for mapping host physical pages to CE PCI space.
+ * The mapping mode used is based on the device's dma_mask.
+ */
+static uint64_t
+tioce_do_dma_map(struct pci_dev *pdev, uint64_t paddr, size_t byte_count,
+                int barrier)
+{
+       unsigned long flags;
+       uint64_t ct_addr;
+       uint64_t mapaddr = 0;
+       struct tioce_kernel *ce_kern;
+       struct tioce_dmamap *map;
+       int port;
+       uint64_t dma_mask;
+
+       dma_mask = (barrier) ? pdev->dev.coherent_dma_mask : pdev->dma_mask;
+
+       /* cards must be able to address at least 31 bits */
+       if (dma_mask < 0x7fffffffUL)
+               return 0;
+
+       ct_addr = PHYS_TO_TIODMA(paddr);
+
+       /*
+        * If the device can generate 64 bit addresses, create a D64 map.
+        * Since this should never fail, bypass the rest of the checks.
+        */
+       if (dma_mask == ~0UL) {
+               mapaddr = tioce_dma_d64(ct_addr);
+               goto dma_map_done;
+       }
+
+       pcidev_to_tioce(pdev, NULL, &ce_kern, &port);
+
+       spin_lock_irqsave(&ce_kern->ce_lock, flags);
+
+       /*
+        * D64 didn't work ... See if we have an existing map that covers
+        * this address range.  Must account for devices dma_mask here since
+        * an existing map might have been done in a mode using more pci
+        * address bits than this device can support.
+        */
+       list_for_each_entry(map, &ce_kern->ce_dmamap_list, ce_dmamap_list) {
+               uint64_t last;
+
+               last = map->ct_start + map->nbytes - 1;
+               if (ct_addr >= map->ct_start &&
+                   ct_addr + byte_count - 1 <= last &&
+                   map->pci_start <= dma_mask) {
+                       map->refcnt++;
+                       mapaddr = map->pci_start + (ct_addr - map->ct_start);
+                       break;
+               }
+       }
+
+       /*
+        * If we don't have a map yet, and the card can generate 40
+        * bit addresses, try the M40/M40S modes.  Note these modes do not
+        * support a barrier bit, so if we need a consistent map these
+        * won't work.
+        */
+       if (!mapaddr && !barrier && dma_mask >= 0xffffffffffUL) {
+               /*
+                * We have two options for 40-bit mappings:  16GB "super" ATE's
+                * and 64MB "regular" ATE's.  We'll try both if needed for a
+                * given mapping but which one we try first depends on the
+                * size.  For requests >64MB, prefer to use a super page with
+                * regular as the fallback. Otherwise, try in the reverse order.
+                */
+
+               if (byte_count > MB(64)) {
+                       mapaddr = tioce_alloc_map(ce_kern, TIOCE_ATE_M40S,
+                                                 port, ct_addr, byte_count);
+                       if (!mapaddr)
+                               mapaddr =
+                                   tioce_alloc_map(ce_kern, TIOCE_ATE_M40, -1,
+                                                   ct_addr, byte_count);
+               } else {
+                       mapaddr = tioce_alloc_map(ce_kern, TIOCE_ATE_M40, -1,
+                                                 ct_addr, byte_count);
+                       if (!mapaddr)
+                               mapaddr =
+                                   tioce_alloc_map(ce_kern, TIOCE_ATE_M40S,
+                                                   port, ct_addr, byte_count);
+               }
+       }
+
+       /*
+        * 32-bit direct is the next mode to try
+        */
+       if (!mapaddr && dma_mask >= 0xffffffffUL)
+               mapaddr = tioce_dma_d32(pdev, ct_addr);
+
+       /*
+        * Last resort, try 32-bit ATE-based map.
+        */
+       if (!mapaddr)
+               mapaddr =
+                   tioce_alloc_map(ce_kern, TIOCE_ATE_M32, -1, ct_addr,
+                                   byte_count);
+
+       spin_unlock_irqrestore(&ce_kern->ce_lock, flags);
+
+dma_map_done:
+       if (mapaddr & barrier)
+               mapaddr = tioce_dma_barrier(mapaddr, 1);
+
+       return mapaddr;
+}
+
+/**
+ * tioce_dma - standard pci dma map interface
+ * @pdev: pci device requesting the map
+ * @paddr: system physical address to map into pci space
+ * @byte_count: # bytes to map
+ *
+ * Simply call tioce_do_dma_map() to create a map with the barrier bit clear
+ * in the address.
+ */
+static uint64_t
+tioce_dma(struct pci_dev *pdev, uint64_t paddr, size_t byte_count)
+{
+       return tioce_do_dma_map(pdev, paddr, byte_count, 0);
+}
+
+/**
+ * tioce_dma_consistent - consistent pci dma map interface
+ * @pdev: pci device requesting the map
+ * @paddr: system physical address to map into pci space
+ * @byte_count: # bytes to map
+ *
+ * Simply call tioce_do_dma_map() to create a map with the barrier bit set
+ * in the address.
+ */ static uint64_t
+tioce_dma_consistent(struct pci_dev *pdev, uint64_t paddr, size_t byte_count)
+{
+       return tioce_do_dma_map(pdev, paddr, byte_count, 1);
+}
+
+/**
+ * tioce_error_intr_handler - SGI TIO CE error interrupt handler
+ * @irq: unused
+ * @arg: pointer to tioce_common struct for the given CE
+ * @pt: unused
+ *
+ * Handle a CE error interrupt.  Simply a wrapper around a SAL call which
+ * defers processing to the SGI prom.
+ */ static irqreturn_t
+tioce_error_intr_handler(int irq, void *arg, struct pt_regs *pt)
+{
+       struct tioce_common *soft = arg;
+       struct ia64_sal_retval ret_stuff;
+       ret_stuff.status = 0;
+       ret_stuff.v0 = 0;
+
+       SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_ERROR_INTERRUPT,
+                       soft->ce_pcibus.bs_persist_segment,
+                       soft->ce_pcibus.bs_persist_busnum, 0, 0, 0, 0, 0);
+
+       return IRQ_HANDLED;
+}
+
+/**
+ * tioce_kern_init - init kernel structures related to a given TIOCE
+ * @tioce_common: ptr to a cached tioce_common struct that originated in prom
+ */ static struct tioce_kernel *
+tioce_kern_init(struct tioce_common *tioce_common)
+{
+       int i;
+       uint32_t tmp;
+       struct tioce *tioce_mmr;
+       struct tioce_kernel *tioce_kern;
+
+       tioce_kern = kcalloc(1, sizeof(struct tioce_kernel), GFP_KERNEL);
+       if (!tioce_kern) {
+               return NULL;
+       }
+
+       tioce_kern->ce_common = tioce_common;
+       spin_lock_init(&tioce_kern->ce_lock);
+       INIT_LIST_HEAD(&tioce_kern->ce_dmamap_list);
+       tioce_common->ce_kernel_private = (uint64_t) tioce_kern;
+
+       /*
+        * Determine the secondary bus number of the port2 logical PPB.
+        * This is used to decide whether a given pci device resides on
+        * port1 or port2.  Note:  We don't have enough plumbing set up
+        * here to use pci_read_config_xxx() so use the raw_pci_ops vector.
+        */
+
+       raw_pci_ops->read(tioce_common->ce_pcibus.bs_persist_segment,
+                         tioce_common->ce_pcibus.bs_persist_busnum,
+                         PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1, &tmp);
+       tioce_kern->ce_port1_secondary = (uint8_t) tmp;
+
+       /*
+        * Set PMU pagesize to the largest size available, and zero out
+        * the ate's.
+        */
+
+       tioce_mmr = (struct tioce *)tioce_common->ce_pcibus.bs_base;
+       tioce_mmr->ce_ure_page_map &= ~CE_URE_PAGESIZE_MASK;
+       tioce_mmr->ce_ure_page_map |= CE_URE_256K_PAGESIZE;
+       tioce_kern->ce_ate3240_pagesize = KB(256);
+
+       for (i = 0; i < TIOCE_NUM_M40_ATES; i++) {
+               tioce_kern->ce_ate40_shadow[i] = 0;
+               tioce_mmr->ce_ure_ate40[i] = 0;
+       }
+
+       for (i = 0; i < TIOCE_NUM_M3240_ATES; i++) {
+               tioce_kern->ce_ate3240_shadow[i] = 0;
+               tioce_mmr->ce_ure_ate3240[i] = 0;
+       }
+
+       return tioce_kern;
+}
+
+/**
+ * tioce_force_interrupt - implement altix force_interrupt() backend for CE
+ * @sn_irq_info: sn asic irq that we need an interrupt generated for
+ *
+ * Given an sn_irq_info struct, set the proper bit in ce_adm_force_int to
+ * force a secondary interrupt to be generated.  This is to work around an
+ * asic issue where there is a small window of opportunity for a legacy device
+ * interrupt to be lost.
+ */
+static void
+tioce_force_interrupt(struct sn_irq_info *sn_irq_info)
+{
+       struct pcidev_info *pcidev_info;
+       struct tioce_common *ce_common;
+       struct tioce *ce_mmr;
+       uint64_t force_int_val;
+
+       if (!sn_irq_info->irq_bridge)
+               return;
+
+       if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_TIOCE)
+               return;
+
+       pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
+       if (!pcidev_info)
+               return;
+
+       ce_common = (struct tioce_common *)pcidev_info->pdi_pcibus_info;
+       ce_mmr = (struct tioce *)ce_common->ce_pcibus.bs_base;
+
+       /*
+        * irq_int_bit is originally set up by prom, and holds the interrupt
+        * bit shift (not mask) as defined by the bit definitions in the
+        * ce_adm_int mmr.  These shifts are not the same for the
+        * ce_adm_force_int register, so do an explicit mapping here to make
+        * things clearer.
+        */
+
+       switch (sn_irq_info->irq_int_bit) {
+       case CE_ADM_INT_PCIE_PORT1_DEV_A_SHFT:
+               force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_A_SHFT;
+               break;
+       case CE_ADM_INT_PCIE_PORT1_DEV_B_SHFT:
+               force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_B_SHFT;
+               break;
+       case CE_ADM_INT_PCIE_PORT1_DEV_C_SHFT:
+               force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_C_SHFT;
+               break;
+       case CE_ADM_INT_PCIE_PORT1_DEV_D_SHFT:
+               force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT1_DEV_D_SHFT;
+               break;
+       case CE_ADM_INT_PCIE_PORT2_DEV_A_SHFT:
+               force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_A_SHFT;
+               break;
+       case CE_ADM_INT_PCIE_PORT2_DEV_B_SHFT:
+               force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_B_SHFT;
+               break;
+       case CE_ADM_INT_PCIE_PORT2_DEV_C_SHFT:
+               force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_C_SHFT;
+               break;
+       case CE_ADM_INT_PCIE_PORT2_DEV_D_SHFT:
+               force_int_val = 1UL << CE_ADM_FORCE_INT_PCIE_PORT2_DEV_D_SHFT;
+               break;
+       default:
+               return;
+       }
+       ce_mmr->ce_adm_force_int = force_int_val;
+}
+
+/**
+ * tioce_target_interrupt - implement set_irq_affinity for tioce resident
+ * functions.  Note:  only applies to line interrupts, not MSI's.
+ *
+ * @sn_irq_info: SN IRQ context
+ *
+ * Given an sn_irq_info, set the associated CE device's interrupt destination
+ * register.  Since the interrupt destination registers are on a per-ce-slot
+ * basis, this will retarget line interrupts for all functions downstream of
+ * the slot.
+ */
+static void
+tioce_target_interrupt(struct sn_irq_info *sn_irq_info)
+{
+       struct pcidev_info *pcidev_info;
+       struct tioce_common *ce_common;
+       struct tioce *ce_mmr;
+       int bit;
+
+       pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
+       if (!pcidev_info)
+               return;
+
+       ce_common = (struct tioce_common *)pcidev_info->pdi_pcibus_info;
+       ce_mmr = (struct tioce *)ce_common->ce_pcibus.bs_base;
+
+       bit = sn_irq_info->irq_int_bit;
+
+       ce_mmr->ce_adm_int_mask |= (1UL << bit);
+       ce_mmr->ce_adm_int_dest[bit] =
+               ((uint64_t)sn_irq_info->irq_irq << INTR_VECTOR_SHFT) |
+                          sn_irq_info->irq_xtalkaddr;
+       ce_mmr->ce_adm_int_mask &= ~(1UL << bit);
+
+       tioce_force_interrupt(sn_irq_info);
+}
+
+/**
+ * tioce_bus_fixup - perform final PCI fixup for a TIO CE bus
+ * @prom_bussoft: Common prom/kernel struct representing the bus
+ *
+ * Replicates the tioce_common pointed to by @prom_bussoft in kernel
+ * space.  Allocates and initializes a kernel-only area for a given CE,
+ * and sets up an irq for handling CE error interrupts.
+ *
+ * On successful setup, returns the kernel version of tioce_common back to
+ * the caller.
+ */
+static void *
+tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller)
+{
+       struct tioce_common *tioce_common;
+
+       /*
+        * Allocate kernel bus soft and copy from prom.
+        */
+
+       tioce_common = kcalloc(1, sizeof(struct tioce_common), GFP_KERNEL);
+       if (!tioce_common)
+               return NULL;
+
+       memcpy(tioce_common, prom_bussoft, sizeof(struct tioce_common));
+       tioce_common->ce_pcibus.bs_base |= __IA64_UNCACHED_OFFSET;
+
+       if (tioce_kern_init(tioce_common) == NULL) {
+               kfree(tioce_common);
+               return NULL;
+       }
+
+       if (request_irq(SGI_PCIASIC_ERROR,
+                       tioce_error_intr_handler,
+                       SA_SHIRQ, "TIOCE error", (void *)tioce_common))
+               printk(KERN_WARNING
+                      "%s:  Unable to get irq %d.  "
+                      "Error interrupts won't be routed for "
+                      "TIOCE bus %04x:%02x\n",
+                      __FUNCTION__, SGI_PCIASIC_ERROR,
+                      tioce_common->ce_pcibus.bs_persist_segment,
+                      tioce_common->ce_pcibus.bs_persist_busnum);
+
+       return tioce_common;
+}
+
+static struct sn_pcibus_provider tioce_pci_interfaces = {
+       .dma_map = tioce_dma,
+       .dma_map_consistent = tioce_dma_consistent,
+       .dma_unmap = tioce_dma_unmap,
+       .bus_fixup = tioce_bus_fixup,
+       .force_interrupt = tioce_force_interrupt,
+       .target_interrupt = tioce_target_interrupt
+};
+
+/**
+ * tioce_init_provider - init SN PCI provider ops for TIO CE
+ */
+int
+tioce_init_provider(void)
+{
+       sn_pci_provider[PCIIO_ASIC_TYPE_TIOCE] = &tioce_pci_interfaces;
+       return 0;
+}
index 117f183f0b43ce63d52f2f9537a7807b625edc71..8520df9cee6dd8c6cd9464b9d28bd23ee2292c83 100644 (file)
@@ -71,21 +71,31 @@ config M5206e
        help
          Motorola ColdFire 5206e processor support.
 
+config M523x
+       bool "MCF523x"
+       help
+         Freescale Coldfire 5230/1/2/4/5 processor support
+
 config M5249
        bool "MCF5249"
        help
          Motorola ColdFire 5249 processor support.
 
-config M527x
-       bool "MCF527x"
+config M5271
+       bool "MCF5271"
        help
-         Freescale (Motorola) ColdFire 5270/5271/5274/5275 processor support.
+         Freescale (Motorola) ColdFire 5270/5271 processor support.
 
 config M5272
        bool "MCF5272"
        help
          Motorola ColdFire 5272 processor support.
 
+config M5275
+       bool "MCF5275"
+       help
+         Freescale (Motorola) ColdFire 5274/5275 processor support.
+
 config M528x
        bool "MCF528x"
        help
@@ -103,9 +113,14 @@ config M5407
 
 endchoice
 
+config M527x
+       bool
+       depends on (M5271 || M5275)
+       default y
+
 config COLDFIRE
        bool
-       depends on (M5206 || M5206e || M5249 || M527x || M5272 || M528x || M5307 || M5407)
+       depends on (M5206 || M5206e || M523x || M5249 || M527x || M5272 || M528x || M5307 || M5407)
        default y
 
 choice
@@ -183,6 +198,11 @@ config CLOCK_60MHz
        help
          Select a 60MHz CPU clock frequency.
 
+config CLOCK_62_5MHz
+       bool "62.5MHz"
+       help
+         Select a 62.5MHz CPU clock frequency.
+
 config CLOCK_64MHz
        bool "64MHz"
        help
@@ -302,6 +322,12 @@ config ELITE
        help
          Support for the Motorola M5206eLITE board.
 
+config M5235EVB
+       bool "Freescale M5235EVB support"
+       depends on M523x
+       help
+         Support for the Freescale M5235EVB board.
+
 config M5249C3
        bool "Motorola M5249C3 board support"
        depends on M5249
@@ -310,13 +336,13 @@ config M5249C3
 
 config M5271EVB
        bool "Freescale (Motorola) M5271EVB board support"
-       depends on M527x
+       depends on M5271
        help
          Support for the Freescale (Motorola) M5271EVB board.
 
 config M5275EVB
        bool "Freescale (Motorola) M5275EVB board support"
-       depends on M527x
+       depends on M5275
        help
          Support for the Freescale (Motorola) M5275EVB board.
 
@@ -343,6 +369,12 @@ config COBRA5282
        depends on M528x
        help
          Support for the senTec COBRA5282 board.
+         
+config SOM5282EM
+       bool "EMAC.Inc SOM5282EM board support"
+       depends on M528x
+       help
+         Support for the EMAC.Inc SOM5282EM module.  
 
 config ARN5307
        bool "Arnewsh 5307 board support"
@@ -410,6 +442,12 @@ config CPU16B
        help
          Support for the SNEHA CPU16B board.
 
+config MOD5272
+       bool "Netburner MOD-5272 board support"
+       depends on M5272
+       help
+         Support for the Netburner MOD-5272 board.
+
 config ROMFS_FROM_ROM
        bool "  ROMFS image not RAM resident"
        depends on (NETtel || SNAPGEAR)
@@ -430,7 +468,7 @@ config ARNEWSH
 config MOTOROLA
        bool
        default y
-       depends on (M5206eC3 || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5407C3)
+       depends on (M5206eC3 || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5407C3)
 
 config HW_FEITH
        bool
@@ -441,6 +479,11 @@ config senTec
        bool
        default y
        depends on (COBRA5272 || COBRA5282)
+       
+config EMAC_INC
+       bool
+       default y
+       depends on (SOM5282EM)
 
 config SNEHA
         bool
@@ -455,6 +498,15 @@ config LARGE_ALLOCS
          a lot of RAM, and you need to able to allocate very large
          contiguous chunks. If unsure, say N.
 
+config 4KSTACKS
+       bool "Use 4Kb for kernel stacks instead of 8Kb"
+       default y
+       help
+         If you say Y here the kernel will use a 4Kb stacksize for the
+         kernel stack attached to each process/thread. This facilitates
+         running more threads on a system and also reduces the pressure
+         on the VM subsystem for higher order allocations.
+
 choice
        prompt "RAM size"
        default AUTO
index a254aa9d49986eb2ff03137fa72bd96b99ba6949..97022ed0da3896d4b173cd4f255c5a513324093a 100644 (file)
@@ -14,6 +14,7 @@ platform-$(CONFIG_M68VZ328)   := 68VZ328
 platform-$(CONFIG_M68360)      := 68360
 platform-$(CONFIG_M5206)       := 5206
 platform-$(CONFIG_M5206e)      := 5206e
+platform-$(CONFIG_M523x)       := 523x
 platform-$(CONFIG_M5249)       := 5249
 platform-$(CONFIG_M527x)       := 527x
 platform-$(CONFIG_M5272)       := 5272
@@ -29,6 +30,7 @@ board-$(CONFIG_UCQUICC)               := uCquicc
 board-$(CONFIG_DRAGEN2)                := de2
 board-$(CONFIG_ARNEWSH)                := ARNEWSH
 board-$(CONFIG_MOTOROLA)       := MOTOROLA
+board-$(CONFIG_M5235EVB)       := M5235EVB
 board-$(CONFIG_M5271EVB)       := M5271EVB
 board-$(CONFIG_M5275EVB)       := M5275EVB
 board-$(CONFIG_M5282EVB)       := M5282EVB
@@ -39,6 +41,7 @@ board-$(CONFIG_SECUREEDGEMP3) := MP3
 board-$(CONFIG_CLEOPATRA)      := CLEOPATRA
 board-$(CONFIG_senTec)         := senTec
 board-$(CONFIG_SNEHA)          := SNEHA
+board-$(CONFIG_MOD5272)                := MOD5272
 BOARD := $(board-y)
 
 model-$(CONFIG_RAMKERNEL)      := ram
@@ -53,6 +56,7 @@ MODEL := $(model-y)
 #
 cpuclass-$(CONFIG_M5206)       := 5307
 cpuclass-$(CONFIG_M5206e)      := 5307
+cpuclass-$(CONFIG_M523x)       := 5307
 cpuclass-$(CONFIG_M5249)       := 5307
 cpuclass-$(CONFIG_M527x)       := 5307
 cpuclass-$(CONFIG_M5272)       := 5307
@@ -76,6 +80,7 @@ export PLATFORM BOARD MODEL CPUCLASS
 #
 cflags-$(CONFIG_M5206)         := -m5200 -Wa,-S -Wa,-m5200
 cflags-$(CONFIG_M5206e)                := -m5200 -Wa,-S -Wa,-m5200
+cflags-$(CONFIG_M523x)         := -m5307 -Wa,-S -Wa,-m5307
 cflags-$(CONFIG_M5249)         := -m5200 -Wa,-S -Wa,-m5200
 cflags-$(CONFIG_M527x)         := -m5307 -Wa,-S -Wa,-m5307
 cflags-$(CONFIG_M5272)         := -m5307 -Wa,-S -Wa,-m5307
index e4bd31be966a285cdf897369279d96344aa6b44a..87f2d6587c56f56cf757b7ff7df2dc5f4e6291df 100644 (file)
@@ -1,24 +1,48 @@
 #
 # Automatically generated make config: don't edit
+# Linux kernel version: 2.6.13-uc0
+# Wed Aug 31 15:03:26 2005
 #
+CONFIG_M68KNOMMU=y
 # CONFIG_MMU is not set
 # CONFIG_FPU is not set
 CONFIG_UID16=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+CONFIG_GENERIC_CALIBRATE_DELAY=y
 
 #
 # Code maturity level options
 #
 CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
 
 #
 # General setup
 #
-# CONFIG_SYSVIPC is not set
+CONFIG_LOCALVERSION=""
+# CONFIG_POSIX_MQUEUE is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_SYSCTL is not set
-CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_AUDIT is not set
+# CONFIG_HOTPLUG is not set
+# CONFIG_KOBJECT_UEVENT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+# CONFIG_KALLSYMS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
+# CONFIG_FUTEX is not set
+# CONFIG_EPOLL is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+CONFIG_BASE_SMALL=0
 
 #
 # Loadable module support
@@ -34,9 +58,11 @@ CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_M68360 is not set
 # CONFIG_M5206 is not set
 # CONFIG_M5206e is not set
+# CONFIG_M523x is not set
 # CONFIG_M5249 is not set
-# CONFIG_M527x is not set
+# CONFIG_M5271 is not set
 CONFIG_M5272=y
+# CONFIG_M5275 is not set
 # CONFIG_M528x is not set
 # CONFIG_M5307 is not set
 # CONFIG_M5407 is not set
@@ -54,6 +80,8 @@ CONFIG_COLDFIRE=y
 # CONFIG_CLOCK_50MHz is not set
 # CONFIG_CLOCK_54MHz is not set
 # CONFIG_CLOCK_60MHz is not set
+# CONFIG_CLOCK_62_5MHz is not set
+# CONFIG_CLOCK_64MHz is not set
 CONFIG_CLOCK_66MHz=y
 # CONFIG_CLOCK_70MHz is not set
 # CONFIG_CLOCK_100MHz is not set
@@ -65,13 +93,19 @@ CONFIG_CLOCK_66MHz=y
 # Platform
 #
 CONFIG_M5272C3=y
+# CONFIG_COBRA5272 is not set
+# CONFIG_CANCam is not set
+# CONFIG_SCALES is not set
 # CONFIG_NETtel is not set
+# CONFIG_CPU16B is not set
+# CONFIG_MOD5272 is not set
 CONFIG_MOTOROLA=y
 # CONFIG_LARGE_ALLOCS is not set
-# CONFIG_RAMAUTO is not set
+CONFIG_4KSTACKS=y
+CONFIG_RAMAUTO=y
 # CONFIG_RAM4MB is not set
 # CONFIG_RAM8MB is not set
-CONFIG_RAM16MB=y
+# CONFIG_RAM16MB is not set
 # CONFIG_RAM32MB is not set
 CONFIG_RAMAUTOBIT=y
 # CONFIG_RAM8BIT is not set
@@ -79,33 +113,117 @@ CONFIG_RAMAUTOBIT=y
 # CONFIG_RAM32BIT is not set
 CONFIG_RAMKERNEL=y
 # CONFIG_ROMKERNEL is not set
-# CONFIG_HIMEMKERNEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
 
 #
 # Bus options (PCI, PCMCIA, EISA, MCA, ISA)
 #
 # CONFIG_PCI is not set
-# CONFIG_HOTPLUG is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# PCI Hotplug Support
+#
 
 #
 # Executable file formats
 #
-CONFIG_KCORE_AOUT=y
 CONFIG_BINFMT_FLAT=y
 # CONFIG_BINFMT_ZFLAT is not set
+# CONFIG_BINFMT_SHARED_FLAT is not set
+# CONFIG_BINFMT_MISC is not set
 
 #
 # Power management options
 #
 # CONFIG_PM is not set
 
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_IP_TCPDIAG is not set
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+
 #
 # Memory Technology Devices (MTD)
 #
 CONFIG_MTD=y
 # CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
 # CONFIG_MTD_REDBOOT_PARTS is not set
 # CONFIG_MTD_CMDLINE_PARTS is not set
 
@@ -116,35 +234,50 @@ CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 # CONFIG_FTL is not set
 # CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
 
 #
 # RAM/ROM/Flash chip drivers
 #
 # CONFIG_MTD_CFI is not set
 # CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
 CONFIG_MTD_RAM=y
 # CONFIG_MTD_ROM is not set
 # CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
 
 #
 # Mapping drivers for chip access
 #
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
 CONFIG_MTD_UCLINUX=y
+# CONFIG_MTD_SNAPGEARuC is not set
+# CONFIG_MTD_PLATRAM is not set
 
 #
 # Self-contained MTD device drivers
 #
 # CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
 # CONFIG_MTD_MTDRAM is not set
 # CONFIG_MTD_BLKMTD is not set
+# CONFIG_MTD_BLOCK2MTD is not set
 
 #
 # Disk-On-Chip Device Drivers
 #
-# CONFIG_MTD_DOC1000 is not set
 # CONFIG_MTD_DOC2000 is not set
 # CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
 
 #
 # NAND Flash Device Drivers
@@ -159,21 +292,32 @@ CONFIG_MTD_UCLINUX=y
 #
 # Plug and Play support
 #
-# CONFIG_PNP is not set
 
 #
 # Block devices
 #
 # CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
 # CONFIG_BLK_DEV_LOOP is not set
 # CONFIG_BLK_DEV_NBD is not set
 CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_BLK_DEV_BLKMEM is not set
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CDROM_PKTCDVD is not set
 
 #
-# ATA/IDE/MFM/RLL support
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
 #
 # CONFIG_IDE is not set
 
@@ -190,249 +334,230 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 #
 # Fusion MPT device support
 #
+# CONFIG_FUSION is not set
 
 #
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_FILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_XFRM_USER is not set
-# CONFIG_IPV6 is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
+# IEEE 1394 (FireWire) support
 #
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
 
 #
-# QoS and/or fair queueing
+# I2O device support
 #
-# CONFIG_NET_SCHED is not set
 
 #
-# Network testing
+# Network device support
 #
-# CONFIG_NET_PKTGEN is not set
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
 
 #
 # Ethernet (10 or 100Mbit)
 #
 CONFIG_NET_ETHERNET=y
 # CONFIG_MII is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_NE2000 is not set
+# CONFIG_NET_PCI is not set
 CONFIG_FEC=y
+# CONFIG_FEC2 is not set
 
 #
 # Ethernet (1000 Mbit)
 #
+
+#
+# Ethernet (10000 Mbit)
+#
+
+#
+# Token Ring devices
+#
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
 CONFIG_PPP=y
 # CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
 # CONFIG_PPP_ASYNC is not set
 # CONFIG_PPP_SYNC_TTY is not set
 # CONFIG_PPP_DEFLATE is not set
 # CONFIG_PPP_BSDCOMP is not set
 # CONFIG_PPPOE is not set
 # CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
 
 #
-# Wireless LAN (non-hamradio)
+# ISDN subsystem
 #
-# CONFIG_NET_RADIO is not set
+# CONFIG_ISDN is not set
 
 #
-# Token Ring devices (depends on LLC=y)
+# Telephony Support
 #
-# CONFIG_SHAPER is not set
+# CONFIG_PHONE is not set
 
 #
-# Wan interfaces
+# Input device support
 #
-# CONFIG_WAN is not set
+# CONFIG_INPUT is not set
 
 #
-# Amateur Radio support
+# Hardware I/O ports
 #
-# CONFIG_HAMRADIO is not set
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
 
 #
-# IrDA (infrared) support
+# Character devices
 #
-# CONFIG_IRDA is not set
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_LEDMAN is not set
+# CONFIG_RESETSWITCH is not set
 
 #
-# ISDN subsystem
+# Serial drivers
 #
-# CONFIG_ISDN_BOOL is not set
+# CONFIG_SERIAL_8250 is not set
 
 #
-# Telephony Support
+# Non-8250 serial port support
 #
-# CONFIG_PHONE is not set
+CONFIG_SERIAL_COLDFIRE=y
+# CONFIG_UNIX98_PTYS is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
 
 #
-# Input device support
+# IPMI
 #
-CONFIG_INPUT=y
+# CONFIG_IPMI_HANDLER is not set
 
 #
-# Userland interfaces
+# Watchdog Cards
 #
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_MCFWATCHDOG is not set
+# CONFIG_RTC is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
 
 #
-# Input I/O drivers
+# Ftape, the floppy tape device driver
 #
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
+# CONFIG_RAW_DRIVER is not set
 
 #
-# Input Device Drivers
+# TPM devices
 #
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-CONFIG_INPUT_MOUSE=y
-CONFIG_MOUSE_PS2=y
-# CONFIG_MOUSE_SERIAL is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
+# CONFIG_MCF_QSPI is not set
+# CONFIG_M41T11M6 is not set
 
 #
-# Character devices
+# I2C support
 #
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-# CONFIG_RESETSWITCH is not set
+# CONFIG_I2C is not set
+# CONFIG_I2C_SENSOR is not set
 
 #
-# Serial drivers
+# Dallas's 1-wire bus
 #
-# CONFIG_SERIAL_8250 is not set
+# CONFIG_W1 is not set
 
 #
-# Non-8250 serial port support
+# Hardware Monitoring support
 #
-CONFIG_SERIAL_COLDFIRE=y
-# CONFIG_UNIX98_PTYS is not set
+# CONFIG_HWMON is not set
 
 #
-# I2C support
+# Misc devices
 #
-# CONFIG_I2C is not set
 
 #
-# I2C Hardware Sensors Mainboard support
+# Multimedia devices
 #
+# CONFIG_VIDEO_DEV is not set
 
 #
-# I2C Hardware Sensors Chip support
+# Digital Video Broadcasting Devices
 #
+# CONFIG_DVB is not set
 
 #
-# Mice
+# Graphics support
 #
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
+# CONFIG_FB is not set
 
 #
-# IPMI
+# SPI support
 #
-# CONFIG_IPMI_HANDLER is not set
+# CONFIG_SPI is not set
 
 #
-# Watchdog Cards
+# Sound
 #
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
+# CONFIG_SOUND is not set
 
 #
-# Ftape, the floppy tape device driver
+# USB support
 #
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
 
 #
-# Multimedia devices
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+
+#
+# SN Devices
 #
-# CONFIG_VIDEO_DEV is not set
 
 #
 # File systems
 #
 CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
 # CONFIG_EXT3_FS is not set
 # CONFIG_JBD is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+
+#
+# XFS support
+#
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_MAGIC_ROM_PTR=y
+# CONFIG_INOTIFY is not set
 # CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
 
@@ -445,15 +570,17 @@ CONFIG_ROMFS_FS=y
 #
 # DOS/FAT/NT Filesystems
 #
-# CONFIG_FAT_FS is not set
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
 # CONFIG_NTFS_FS is not set
 
 #
 # Pseudo filesystems
 #
 CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
+CONFIG_SYSFS=y
 # CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
 
 #
@@ -462,6 +589,7 @@ CONFIG_RAMFS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
@@ -479,12 +607,10 @@ CONFIG_RAMFS=y
 #
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
-# CONFIG_EXPORTFS is not set
 # CONFIG_SMB_FS is not set
 # CONFIG_CIFS is not set
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
 # CONFIG_AFS_FS is not set
 
 #
@@ -494,30 +620,19 @@ CONFIG_RAMFS=y
 CONFIG_MSDOS_PARTITION=y
 
 #
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# Bluetooth support
+# Native Language Support
 #
-# CONFIG_BT is not set
+# CONFIG_NLS is not set
 
 #
 # Kernel hacking
 #
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_FULLDEBUG is not set
-# CONFIG_MAGIC_SYSRQ is not set
 # CONFIG_HIGHPROFILE is not set
+# CONFIG_BOOTPARAM is not set
 # CONFIG_DUMPTOFLASH is not set
 # CONFIG_NO_KERNEL_MSG is not set
 # CONFIG_BDM_DISABLE is not set
@@ -525,6 +640,7 @@ CONFIG_MSDOS_PARTITION=y
 #
 # Security options
 #
+# CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 
 #
@@ -532,7 +648,13 @@ CONFIG_MSDOS_PARTITION=y
 #
 # CONFIG_CRYPTO is not set
 
+#
+# Hardware crypto devices
+#
+
 #
 # Library routines
 #
+# CONFIG_CRC_CCITT is not set
 # CONFIG_CRC32 is not set
+# CONFIG_LIBCRC32C is not set
index 557238596dcb9bd14ad93e8f4c031296885d34db..a220345e9746d063ba2997ab3dc0544651b676e2 100644 (file)
@@ -6,7 +6,7 @@
  *  Copyleft  ()) 2000       James D. Schettine {james@telos-systems.com}
  *  Copyright (C) 1998       Kenneth Albanowski <kjahds@kjahds.com>
  *  Copyright (C) 1995       Hamish Macdonald
- *  Copyright (C) 2000       Lineo Inc. (www.lineo.com) 
+ *  Copyright (C) 2000       Lineo Inc. (www.lineo.com)
  *  Copyright (C) 2001              Lineo, Inc. <www.lineo.com>
  *
  *  68VZ328 Fixes/support    Evan Stawnyczy <e@lineo.ca>
@@ -23,6 +23,7 @@
 #include <linux/interrupt.h>
 #include <linux/fs.h>
 #include <linux/fb.h>
+#include <linux/module.h>
 #include <linux/console.h>
 #include <linux/genhd.h>
 #include <linux/errno.h>
@@ -45,6 +46,9 @@ unsigned long rom_length;
 unsigned long memory_start;
 unsigned long memory_end;
 
+EXPORT_SYMBOL(memory_start);
+EXPORT_SYMBOL(memory_end);
+
 char command_line[COMMAND_LINE_SIZE];
 
 /* setup some dummy routines */
@@ -103,15 +107,21 @@ void (*mach_power_off)( void ) = NULL;
 #if defined(CONFIG_M5206e)
        #define CPU "COLDFIRE(m5206e)"
 #endif
+#if defined(CONFIG_M523x)
+       #define CPU "COLDFIRE(m523x)"
+#endif
 #if defined(CONFIG_M5249)
        #define CPU "COLDFIRE(m5249)"
 #endif
-#if defined(CONFIG_M527x)
-       #define CPU "COLDFIRE(m5270/5271/5274/5275)"
+#if defined(CONFIG_M5271)
+       #define CPU "COLDFIRE(m5270/5271)"
 #endif
 #if defined(CONFIG_M5272)
        #define CPU "COLDFIRE(m5272)"
 #endif
+#if defined(CONFIG_M5275)
+       #define CPU "COLDFIRE(m5274/5275)"
+#endif
 #if defined(CONFIG_M528x)
        #define CPU "COLDFIRE(m5280/5282)"
 #endif
@@ -152,7 +162,7 @@ void setup_arch(char **cmdline_p)
        init_mm.start_code = (unsigned long) &_stext;
        init_mm.end_code = (unsigned long) &_etext;
        init_mm.end_data = (unsigned long) &_edata;
-       init_mm.brk = (unsigned long) 0; 
+       init_mm.brk = (unsigned long) 0;
 
        config_BSP(&command_line[0], sizeof(command_line));
 
@@ -171,7 +181,7 @@ void setup_arch(char **cmdline_p)
 #endif
 #ifdef CONFIG_ELITE
        printk(KERN_INFO "Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n");
-#endif  
+#endif
 #ifdef CONFIG_TELOS
        printk(KERN_INFO "Modified for Omnia ToolVox by James D. Schettine, james@telos-systems.com\n");
 #endif
@@ -200,6 +210,9 @@ void setup_arch(char **cmdline_p)
 #ifdef CONFIG_DRAGEN2
        printk(KERN_INFO "DragonEngine II board support by Georges Menie\n");
 #endif
+#ifdef CONFIG_M5235EVB
+       printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)");
+#endif
 
 #ifdef DEBUG
        printk(KERN_DEBUG "KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x "
@@ -223,7 +236,7 @@ void setup_arch(char **cmdline_p)
        saved_command_line[COMMAND_LINE_SIZE-1] = 0;
 
 #ifdef DEBUG
-       if (strlen(*cmdline_p)) 
+       if (strlen(*cmdline_p))
                printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p);
 #endif
 
index ad7dc6347f19092ec56f5fdf3a546ccda5a7836d..5bc06846286453e52f83a138244c07e5af1502e5 100644 (file)
@@ -21,6 +21,7 @@
 #include <linux/signal.h>
 #include <linux/kernel.h>
 #include <linux/mm.h>
+#include <linux/module.h>
 #include <linux/types.h>
 #include <linux/a.out.h>
 #include <linux/user.h>
@@ -38,7 +39,7 @@
 #include <asm/machdep.h>
 #include <asm/siginfo.h>
 
-static char *vec_names[] = {
+static char const * const vec_names[] = {
        "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR",
        "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc",
        "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111",
@@ -106,17 +107,20 @@ asmlinkage void buserr_c(struct frame *fp)
 
 int kstack_depth_to_print = 48;
 
-void show_stack(struct task_struct *task, unsigned long *esp)
+void show_stack(struct task_struct *task, unsigned long *stack)
 {
-       unsigned long *stack, *endstack, addr;
+       unsigned long *endstack, addr;
        extern char _start, _etext;
        int i;
 
-       if (esp == NULL)
-               esp = (unsigned long *) &esp;
+       if (!stack) {
+               if (task)
+                       stack = (unsigned long *)task->thread.ksp;
+               else
+                       stack = (unsigned long *)&stack;
+       }
 
-       stack = esp;
-       addr = (unsigned long) esp;
+       addr = (unsigned long) stack;
        endstack = (unsigned long *) PAGE_ALIGN(addr);
 
        printk(KERN_EMERG "Stack from %08lx:", (unsigned long)stack);
@@ -306,6 +310,8 @@ void dump_stack(void)
        show_stack(current, &stack);
 }
 
+EXPORT_SYMBOL(dump_stack);
+
 #ifdef CONFIG_M68KFPU_EMU
 asmlinkage void fpemu_signal(int signal, int code, void *addr)
 {
index 31cb12892da5a58e73ee0fe1a720e84d03964309..47f06787190dfb14491db3cb2c06376471acd6e1 100644 (file)
  */
 #if defined(CONFIG_ELITE)
 #define        RAM_START       0x30020000
-#define        RAM_END         0xe0000
+#define        RAM_LENGTH      0xe0000
 #endif
 
 /*
 #if defined(CONFIG_M5206eC3) || defined(CONFIG_M5249C3) || \
     defined(CONFIG_M5272C3) || defined(CONFIG_M5307C3) || \
     defined(CONFIG_ARN5307) || defined(CONFIG_M5407C3) || \
-    defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB)
+    defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB) || \
+    defined(CONFIG_M5235EVB)
 #define        RAM_START       0x20000
 #define        RAM_LENGTH      0x3e0000
 #endif
 #define  RAM_LENGTH  0x3f0000
 #endif
 
+
+/*
+ *     The EMAC SoM-5282EM module.
+ */
+#if defined(CONFIG_SOM5282EM)
+#define  RAM_START   0x10000
+#define  RAM_LENGTH  0xff0000
+#endif
+
+
 /*
  *     These flash boot boards use all of ram for operation. Again the
  *     actual memory size is not important here, assume at least 4MiB.
 #endif
 
 /*
- *     Sneha Boards mimimun memmory
+ *     Sneha Boards mimimun memory
  *     The end of RAM will vary depending on how much ram is fitted,
  *     but this isn't important here, we assume at least 4MiB.
  */
 #define        RAM_LENGTH      0x3e0000
 #endif
 
+#if defined(CONFIG_MOD5272)
+#define RAM_START      0x02000000
+#define RAM_LENGTH     0x00800000
+#define RAMVEC_START   0x20000000
+#define RAMVEC_LENGTH  0x00000400
+#endif
 
 #if defined(CONFIG_RAMKERNEL)
 #define        TEXT            ram
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c
new file mode 100644 (file)
index 0000000..22767ce
--- /dev/null
@@ -0,0 +1,82 @@
+/***************************************************************************/
+
+/*
+ *     linux/arch/m68knommu/platform/523x/config.c
+ *
+ *     Sub-architcture dependant initialization code for the Freescale
+ *     523x CPUs.
+ *
+ *     Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
+ *     Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
+ */
+
+/***************************************************************************/
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/param.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/dma.h>
+#include <asm/traps.h>
+#include <asm/machdep.h>
+#include <asm/coldfire.h>
+#include <asm/mcfsim.h>
+#include <asm/mcfdma.h>
+
+/***************************************************************************/
+
+void coldfire_pit_tick(void);
+void coldfire_pit_init(irqreturn_t (*handler)(int, void *, struct pt_regs *));
+unsigned long coldfire_pit_offset(void);
+void coldfire_trap_init(void);
+void coldfire_reset(void);
+
+/***************************************************************************/
+
+/*
+ *     DMA channel base address table.
+ */
+unsigned int   dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
+        MCF_MBAR + MCFDMA_BASE0,
+};
+
+unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
+
+/***************************************************************************/
+
+void mcf_disableall(void)
+{
+       *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
+       *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
+}
+
+/***************************************************************************/
+
+void mcf_autovector(unsigned int vec)
+{
+       /* Everything is auto-vectored on the 5272 */
+}
+
+/***************************************************************************/
+
+void config_BSP(char *commandp, int size)
+{
+       mcf_disableall();
+
+#ifdef CONFIG_BOOTPARAM
+       strncpy(commandp, CONFIG_BOOTPARAM_STRING, size);
+       commandp[size-1] = 0;
+#else
+       memset(commandp, 0, size);
+#endif
+
+       mach_sched_init = coldfire_pit_init;
+       mach_tick = coldfire_pit_tick;
+       mach_gettimeoffset = coldfire_pit_offset;
+       mach_trap_init = coldfire_trap_init;
+       mach_reset = coldfire_reset;
+}
+
+/***************************************************************************/
index c7d7a395c4cc871e0d286dc73f0fe164eab0271c..7f4ba837901f6dfa74dd7e4cb2c64ee8f25f2316 100644 (file)
  *     Memory size exceptions for special cases. Some boards may be set
  *     for auto memory sizing, but we can't do it that way for some reason.
  *     For example the 5206eLITE board has static RAM, and auto-detecting
- *     the SDRAM will do you no good at all.
+ *     the SDRAM will do you no good at all. Same goes for the MOD5272.
  */
 #ifdef CONFIG_RAMAUTO
 #if defined(CONFIG_M5206eLITE)
-#define        MEM_SIZE        0x00100000              /* 1MiB default memory */
+#define        MEM_SIZE        0x00100000      /* 1MiB default memory */
+#endif
+#if defined(CONFIG_MOD5272)
+#define MEM_SIZE       0x00800000      /* 8MiB default memory */
 #endif
 #endif /* CONFIG_RAMAUTO */
 
+
 /*
  *     If we don't have a fixed memory size now, then lets build in code
  *     to auto detect the DRAM size. Obviously this is the prefered
 
 /*
  *     Most ColdFire boards have their DRAM starting at address 0.
- *     Notable exception is the 5206eLITE board.
+ *     Notable exception is the 5206eLITE board, another is the MOD5272.
  */
 #if defined(CONFIG_M5206eLITE)
 #define        MEM_BASE        0x30000000
 #endif
+#if defined(CONFIG_MOD5272)
+#define MEM_BASE       0x02000000
+#define VBR_BASE       0x20000000      /* vectors in SRAM */
+#endif
 
 #ifndef MEM_BASE
 #define        MEM_BASE        0x00000000      /* memory base at address 0 */
@@ -188,6 +196,7 @@ _start:
        movel   %a7,_rambase
 
        GET_MEM_SIZE                            /* macro code determines size */
+       addl    %a7,%d0
        movel   %d0,_ramend                     /* set end ram addr */
 
        /*
index 0f5d1fe8eb5fc99bc55e2496826c3129d8d4ca56..7d8990d784a2bf8f54ee63f39a2da0c9c6d752e5 100644 (file)
@@ -79,7 +79,7 @@ ENTRY(system_call)
        movel   %sp@(PT_ORIG_D0),%d0
 
        movel   %sp,%d1                 /* get thread_info pointer */
-       andl    #0xffffe000,%d1
+       andl    #-THREAD_SIZE,%d1
        movel   %d1,%a2
        btst    #TIF_SYSCALL_TRACE,%a2@(TI_FLAGS)
        jne     do_trace
@@ -105,7 +105,7 @@ Luser_return:
        andw    #ALLOWINT,%sr
 
        movel   %sp,%d1                 /* get thread_info pointer */
-       andl    #0xffffe000,%d1
+       andl    #-THREAD_SIZE,%d1
        movel   %d1,%a2
        move    %a2@(TI_FLAGS),%d1      /* thread_info->flags */
        andl    #_TIF_WORK_MASK,%d1
index f7bc80a60e0fe645ea6faa8a4e2cb6ceb5eb48f4..8ff48adf24abec4dbec33f1e8c395ff96ceaed1b 100644 (file)
@@ -96,7 +96,7 @@ Luser_return:
        andw    #ALLOWINT,%sr
 
        movel   %sp,%d1                 /* get thread_info pointer */
-       andl    #0xffffe000,%d1
+       andl    #-THREAD_SIZE,%d1
        movel   %d1,%a2
        move    %a2@(TI_FLAGS),%d1      /* thread_info->flags */
        andl    #_TIF_WORK_MASK,%d1
index 468721d9ebd214c1048f9b293f0fa3d9a56d807d..3fb1fb619d2c9510b67a27df2b830b1ab93ffac9 100644 (file)
@@ -249,8 +249,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_NO_DPM)
        sync
        isync
 
-       /* Enable L2 HW prefetch
+       /* Enable L2 HW prefetch, if L2 is enabled
         */
+       mfspr   r3,SPRN_L2CR
+       andis.  r3,r3,L2CR_L2E@h
+       beqlr
        mfspr   r3,SPRN_MSSCR0
        ori     r3,r3,3
        sync
index c39441048266f7ba918f3793f41fa8588267d309..861115249b3595fcadcb6319fef16e97de96c940 100644 (file)
@@ -156,6 +156,26 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
               The bit moved on the 7450.....
          ****/
 
+BEGIN_FTR_SECTION
+       /* Disable L2 prefetch on some 745x and try to ensure
+        * L2 prefetch engines are idle. As explained by errata
+        * text, we can't be sure they are, we just hope very hard
+        * that well be enough (sic !). At least I noticed Apple
+        * doesn't even bother doing the dcbf's here...
+        */
+       mfspr   r4,SPRN_MSSCR0
+       rlwinm  r4,r4,0,0,29
+       sync
+       mtspr   SPRN_MSSCR0,r4
+       sync
+       isync
+       lis     r4,KERNELBASE@h
+       dcbf    0,r4
+       dcbf    0,r4
+       dcbf    0,r4
+       dcbf    0,r4
+END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
+
        /* TODO: use HW flush assist when available */
 
        lis     r4,0x0002
@@ -230,7 +250,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
        oris    r3,r3,0x8000
        mtspr   SPRN_L2CR,r3
        sync
-
+       
+       /* Enable L2 HW prefetch on 744x/745x */
+BEGIN_FTR_SECTION
+       mfspr   r3,SPRN_MSSCR0
+       ori     r3,r3,3
+       sync
+       mtspr   SPRN_MSSCR0,r3
+       sync
+       isync
+END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
 4:
 
        /* Restore HID0[DPM] to whatever it was before */
index bab255889c58214c60214606d3577e9093bc24ca..698d6b9ed6d19566d83a2299715f72a512ef96bb 100644 (file)
@@ -97,25 +97,21 @@ BEGIN_FTR_SECTION
        lhz     r9,PACAHIGHHTLBAREAS(r13)
        srdi    r11,r3,(HTLB_AREA_SHIFT-SID_SHIFT)
        srd     r9,r9,r11
-       andi.   r9,r9,1
-       bne     5f
+       lhz     r11,PACALOWHTLBAREAS(r13)
+       srd     r11,r11,r3
+       or      r9,r9,r11
+END_FTR_SECTION_IFSET(CPU_FTR_16M_PAGE)
+#endif /* CONFIG_HUGETLB_PAGE */
 
        li      r11,SLB_VSID_USER
 
-       cmpldi  r3,16
-       bge     6f
-
-       lhz     r9,PACALOWHTLBAREAS(r13)
-       srd     r9,r9,r3
-       andi.   r9,r9,1
-
-       beq     6f
-
-5:     li      r11,SLB_VSID_USER|SLB_VSID_L
+#ifdef CONFIG_HUGETLB_PAGE
+BEGIN_FTR_SECTION
+       rldimi  r11,r9,8,55             /* shift masked bit into SLB_VSID_L */
 END_FTR_SECTION_IFSET(CPU_FTR_16M_PAGE)
 #endif /* CONFIG_HUGETLB_PAGE */
 
-6:     ld      r9,PACACONTEXTID(r13)
+       ld      r9,PACACONTEXTID(r13)
        rldimi  r3,r9,USER_ESID_BITS,0
 
 9:     /* r3 = protovsid, r11 = flags, r10 = esid_data, cr7 = <>KERNELBASE */
index 1b5ca3c3a6586195bead156fbebd5a436f730b91..1a5beda36e29e91a8e9edad4633f80d00970abca 100644 (file)
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-uc0
-# Thu Jul 21 11:08:27 2005
+# Linux kernel version: 2.6.13-uc0
+# Fri Sep  2 13:54:27 2005
 #
 # CONFIG_MMU is not set
 # CONFIG_UID16 is not set
@@ -44,6 +44,8 @@ CONFIG_ZERO_BSS=y
 # CONFIG_V850E_HIGHRES_TIMER is not set
 # CONFIG_RESET_GUARD is not set
 CONFIG_LARGE_ALLOCS=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
 
 #
 # Code maturity level options
@@ -110,6 +112,52 @@ CONFIG_BINFMT_FLAT=y
 # CONFIG_BINFMT_SHARED_FLAT is not set
 # CONFIG_BINFMT_MISC is not set
 
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+# CONFIG_UNIX is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_IP_TCPDIAG is not set
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+
 #
 # Generic Driver Options
 #
@@ -158,6 +206,7 @@ CONFIG_MTD_CFI_I2=y
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
 
 #
 # Self-contained MTD device drivers
@@ -232,6 +281,7 @@ CONFIG_IOSCHED_NOOP=y
 #
 # Fusion MPT device support
 #
+# CONFIG_FUSION is not set
 
 #
 # IEEE 1394 (FireWire) support
@@ -244,53 +294,8 @@ CONFIG_IOSCHED_NOOP=y
 # CONFIG_I2O is not set
 
 #
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_UNIX is not set
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_IP_TCPDIAG is not set
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
+# Network device support
 #
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
@@ -372,6 +377,8 @@ CONFIG_EEPRO100=y
 # CONFIG_FDDI is not set
 # CONFIG_PPP is not set
 # CONFIG_SLIP is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
 
 #
 # ISDN subsystem
@@ -472,6 +479,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_JBD is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
 
 #
 # XFS support
@@ -479,6 +487,8 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 CONFIG_ROMFS_FS=y
+# CONFIG_MAGIC_ROM_PTR is not set
+CONFIG_INOTIFY=y
 # CONFIG_QUOTA is not set
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
@@ -524,9 +534,11 @@ CONFIG_RAMFS=y
 #
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFSD is not set
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 # CONFIG_SMB_FS is not set
 # CONFIG_CIFS is not set
index 44becc065404ef3ee0b5359a8b5c268836ed6603..15e66647806129086517246af4450612ba6bd971 100644 (file)
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-uc0
-# Thu Jul 21 11:30:08 2005
+# Linux kernel version: 2.6.13-uc0
+# Fri Sep  2 13:47:50 2005
 #
 # CONFIG_MMU is not set
 # CONFIG_UID16 is not set
@@ -41,6 +41,8 @@ CONFIG_ZERO_BSS=y
 # CONFIG_V850E_HIGHRES_TIMER is not set
 # CONFIG_RESET_GUARD is not set
 CONFIG_LARGE_ALLOCS=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
 
 #
 # Code maturity level options
@@ -56,7 +58,6 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_SYSCTL is not set
-# CONFIG_AUDIT is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_EMBEDDED=y
@@ -103,6 +104,11 @@ CONFIG_BINFMT_FLAT=y
 # CONFIG_BINFMT_SHARED_FLAT is not set
 # CONFIG_BINFMT_MISC is not set
 
+#
+# Networking
+#
+# CONFIG_NET is not set
+
 #
 # Generic Driver Options
 #
@@ -151,6 +157,7 @@ CONFIG_MTD_CFI_I2=y
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
 
 #
 # Self-contained MTD device drivers
@@ -218,6 +225,7 @@ CONFIG_IOSCHED_NOOP=y
 #
 # Fusion MPT device support
 #
+# CONFIG_FUSION is not set
 
 #
 # IEEE 1394 (FireWire) support
@@ -228,9 +236,8 @@ CONFIG_IOSCHED_NOOP=y
 #
 
 #
-# Networking support
+# Network device support
 #
-# CONFIG_NET is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
 
@@ -311,7 +318,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 #
 # Ftape, the floppy tape device driver
 #
-# CONFIG_DRM is not set
 # CONFIG_RAW_DRIVER is not set
 
 #
@@ -335,6 +341,7 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_JBD is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
 
 #
 # XFS support
@@ -342,6 +349,8 @@ CONFIG_SERIAL_CORE_CONSOLE=y
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 CONFIG_ROMFS_FS=y
+# CONFIG_MAGIC_ROM_PTR is not set
+CONFIG_INOTIFY=y
 # CONFIG_QUOTA is not set
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
index d73f5f9d8383cad36448998a76e5ac18078c4871..f31ba7398ad009f6499c389bab3be5dc0de23efc 100644 (file)
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12-uc0
-# Thu Jul 21 11:29:27 2005
+# Linux kernel version: 2.6.13-uc0
+# Fri Sep  2 13:36:43 2005
 #
 # CONFIG_MMU is not set
 # CONFIG_UID16 is not set
@@ -36,6 +36,8 @@ CONFIG_NO_CACHE=y
 CONFIG_ZERO_BSS=y
 # CONFIG_RESET_GUARD is not set
 CONFIG_LARGE_ALLOCS=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
 
 #
 # Code maturity level options
@@ -51,7 +53,6 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_SYSCTL is not set
-# CONFIG_AUDIT is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_EMBEDDED=y
@@ -98,6 +99,11 @@ CONFIG_BINFMT_FLAT=y
 # CONFIG_BINFMT_SHARED_FLAT is not set
 # CONFIG_BINFMT_MISC is not set
 
+#
+# Networking
+#
+# CONFIG_NET is not set
+
 #
 # Generic Driver Options
 #
@@ -146,6 +152,7 @@ CONFIG_MTD_CFI_I2=y
 # Mapping drivers for chip access
 #
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
 
 #
 # Self-contained MTD device drivers
@@ -213,6 +220,7 @@ CONFIG_IOSCHED_NOOP=y
 #
 # Fusion MPT device support
 #
+# CONFIG_FUSION is not set
 
 #
 # IEEE 1394 (FireWire) support
@@ -223,9 +231,8 @@ CONFIG_IOSCHED_NOOP=y
 #
 
 #
-# Networking support
+# Network device support
 #
-# CONFIG_NET is not set
 # CONFIG_NETPOLL is not set
 # CONFIG_NET_POLL_CONTROLLER is not set
 
@@ -300,7 +307,6 @@ CONFIG_SERIO=y
 #
 # Ftape, the floppy tape device driver
 #
-# CONFIG_DRM is not set
 # CONFIG_RAW_DRIVER is not set
 
 #
@@ -324,6 +330,7 @@ CONFIG_SERIO=y
 # CONFIG_JBD is not set
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
 
 #
 # XFS support
@@ -331,6 +338,8 @@ CONFIG_SERIO=y
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 CONFIG_ROMFS_FS=y
+# CONFIG_MAGIC_ROM_PTR is not set
+CONFIG_INOTIFY=y
 # CONFIG_QUOTA is not set
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
index c41d72b01b8806cf07ddbc5a664240f0597a84b6..abd48409dcca51f5d4816aaf54e4fa9e149e7fe9 100644 (file)
@@ -1,8 +1,8 @@
 /*
  * arch/v850/kernel/setup.c -- Arch-dependent initialization functions
  *
- *  Copyright (C) 2001,02,03  NEC Electronics Corporation
- *  Copyright (C) 2001,02,03  Miles Bader <miles@gnu.org>
+ *  Copyright (C) 2001,02,03,05  NEC Electronics Corporation
+ *  Copyright (C) 2001,02,03,05  Miles Bader <miles@gnu.org>
  *
  * This file is subject to the terms and conditions of the GNU General
  * Public License.  See the file COPYING in the main directory of this
@@ -98,10 +98,20 @@ void __init trap_init (void)
 }
 
 #ifdef CONFIG_MTD
+
+/* From drivers/mtd/devices/slram.c */
+#define SLRAM_BLK_SZ 0x4000
+
 /* Set the root filesystem to be the given memory region.
    Some parameter may be appended to CMD_LINE.  */
 void set_mem_root (void *addr, size_t len, char *cmd_line)
 {
+       /* Some sort of idiocy in MTD means we must supply a length that's
+          a multiple of SLRAM_BLK_SZ.  We just round up the real length,
+          as the file system shouldn't attempt to access anything beyond
+          the end of the image anyway.  */
+       len = (((len - 1) + SLRAM_BLK_SZ) / SLRAM_BLK_SZ) * SLRAM_BLK_SZ;
+
        /* The only way to pass info to the MTD slram driver is via
           the command line.  */
        if (*cmd_line) {
@@ -284,3 +294,33 @@ init_mem_alloc (unsigned long ram_start, unsigned long ram_len)
        free_area_init_node (0, NODE_DATA(0), zones_size,
                             ADDR_TO_PAGE (PAGE_OFFSET), 0);
 }
+
+\f
+
+/* Taken from m68knommu */
+void show_mem(void)
+{
+    unsigned long i;
+    int free = 0, total = 0, reserved = 0, shared = 0;
+    int cached = 0;
+
+    printk(KERN_INFO "\nMem-info:\n");
+    show_free_areas();
+    i = max_mapnr;
+    while (i-- > 0) {
+       total++;
+       if (PageReserved(mem_map+i))
+           reserved++;
+       else if (PageSwapCache(mem_map+i))
+           cached++;
+       else if (!page_count(mem_map+i))
+           free++;
+       else
+           shared += page_count(mem_map+i) - 1;
+    }
+    printk(KERN_INFO "%d pages of RAM\n",total);
+    printk(KERN_INFO "%d free pages\n",free);
+    printk(KERN_INFO "%d reserved pages\n",reserved);
+    printk(KERN_INFO "%d pages shared\n",shared);
+    printk(KERN_INFO "%d pages swap cached\n",cached);
+}
index d568991ac6b3eafcc2dd85b48a881756c9353d2c..8666171e187b0cf1b53437308566d0ef48b8de9e 100644 (file)
@@ -57,6 +57,7 @@
 #include <linux/sched.h>
 #include <linux/spinlock.h>
 #include <linux/delay.h>
+#include <linux/serial_8250.h>
 #include "smapi.h"
 #include "mwavedd.h"
 #include "3780i.h"
@@ -410,8 +411,8 @@ static ssize_t mwave_write(struct file *file, const char __user *buf,
 
 static int register_serial_portandirq(unsigned int port, int irq)
 {
-       struct serial_struct serial;
-
+       struct uart_port uart;
+       
        switch ( port ) {
                case 0x3f8:
                case 0x2f8:
@@ -442,12 +443,14 @@ static int register_serial_portandirq(unsigned int port, int irq)
        } /* switch */
        /* irq is okay */
 
-       memset(&serial, 0, sizeof(serial));
-       serial.port = port;
-       serial.irq = irq;
-       serial.flags = ASYNC_SHARE_IRQ;
-
-       return register_serial(&serial);
+       memset(&uart, 0, sizeof(struct uart_port));
+       
+       uart.uartclk =  1843200;
+       uart.iobase = port;
+       uart.irq = irq;
+       uart.iotype = UPIO_PORT;
+       uart.flags =  UPF_SHARE_IRQ;
+       return serial8250_register_port(&uart);
 }
 
 
@@ -523,7 +526,7 @@ static void mwave_exit(void)
 #endif
 
        if ( pDrvData->sLine >= 0 ) {
-               unregister_serial(pDrvData->sLine);
+               serial8250_unregister_port(pDrvData->sLine);
        }
        if (pDrvData->bMwaveDevRegistered) {
                misc_deregister(&mwave_misc_dev);
index d692af57213a7cbfac0a7e884749c94a35fb4b73..baaa365285fa973776beddcb0ae5c09389ffbe65 100644 (file)
@@ -19,6 +19,7 @@
 #include <linux/sched.h>
 #include <linux/byteorder/generic.h>
 #include <asm/sn/sn_sal.h>
+#include <asm/unaligned.h>
 #include "snsc.h"
 
 static struct subch_data_s *event_sd;
@@ -62,13 +63,16 @@ static int
 scdrv_parse_event(char *event, int *src, int *code, int *esp_code, char *desc)
 {
        char *desc_end;
+       __be32 from_buf;
 
        /* record event source address */
-       *src = be32_to_cpup((__be32 *)event);
+       from_buf = get_unaligned((__be32 *)event);
+       *src = be32_to_cpup(&from_buf);
        event += 4;                     /* move on to event code */
 
        /* record the system controller's event code */
-       *code = be32_to_cpup((__be32 *)event);
+       from_buf = get_unaligned((__be32 *)event);
+       *code = be32_to_cpup(&from_buf);
        event += 4;                     /* move on to event arguments */
 
        /* how many arguments are in the packet? */
@@ -82,7 +86,8 @@ scdrv_parse_event(char *event, int *src, int *code, int *esp_code, char *desc)
                /* not an integer argument, so give up */
                return -1;
        }
-       *esp_code = be32_to_cpup((__be32 *)event);
+       from_buf = get_unaligned((__be32 *)event);
+       *esp_code = be32_to_cpup(&from_buf);
        event += 4;
 
        /* parse out the event description */
index bf3c011d2cfb3cbc77852c36712d665fe5e25e6f..d8bf65877897bd6a0e1650c19e825584ead7ea9c 100644 (file)
@@ -102,6 +102,9 @@ config DVB_BUDGET_AV
        select VIDEO_DEV
        select VIDEO_SAA7146_VV
        select DVB_STV0299
+       select DVB_TDA1004X
+       select DVB_TDA10021
+       select FW_LOADER
        help
          Support for simple SAA7146 based DVB cards
          (so called Budget- or Nova-PCI cards) without onboard
index 7fc692a8f5b080e8db0a7c133db23f5eced53297..dea6589d153364c0b2f6799f1380e3f99ca180a4 100644 (file)
@@ -6,7 +6,7 @@ menu "Misc devices"
 
 config IBM_ASM
        tristate "Device driver for IBM RSA service processor"
-       depends on X86 && PCI && EXPERIMENTAL
+       depends on X86 && PCI && EXPERIMENTAL && BROKEN
        ---help---
          This option enables device driver support for in-band access to the
          IBM RSA (Condor) service processor in eServer xSeries systems.
index e0239a10d3250ff44f61b91c21f6d68584d1a9fd..7d8bcb38797a1474b3daf70a9ab36df23557e045 100644 (file)
@@ -447,7 +447,7 @@ config NET_SB1250_MAC
 
 config SGI_IOC3_ETH
        bool "SGI IOC3 Ethernet"
-       depends on NET_ETHERNET && PCI && SGI_IP27
+       depends on NET_ETHERNET && PCI && SGI_IP27 && BROKEN
        select CRC32
        select MII
        help
index 183ba97785b0dbadeff6745838d254845fa5a6b1..dc5d089bf184a8091c704de78d2c8fd6451c2224 100644 (file)
 #include <asm/iommu.h>
 #include <asm/vio.h>
 
-#include "iseries_veth.h"
+#undef DEBUG
 
 MODULE_AUTHOR("Kyle Lucke <klucke@us.ibm.com>");
 MODULE_DESCRIPTION("iSeries Virtual ethernet driver");
 MODULE_LICENSE("GPL");
 
+#define VETH_EVENT_CAP (0)
+#define VETH_EVENT_FRAMES      (1)
+#define VETH_EVENT_MONITOR     (2)
+#define VETH_EVENT_FRAMES_ACK  (3)
+
+#define VETH_MAX_ACKS_PER_MSG  (20)
+#define VETH_MAX_FRAMES_PER_MSG        (6)
+
+struct veth_frames_data {
+       u32 addr[VETH_MAX_FRAMES_PER_MSG];
+       u16 len[VETH_MAX_FRAMES_PER_MSG];
+       u32 eofmask;
+};
+#define VETH_EOF_SHIFT         (32-VETH_MAX_FRAMES_PER_MSG)
+
+struct veth_frames_ack_data {
+       u16 token[VETH_MAX_ACKS_PER_MSG];
+};
+
+struct veth_cap_data {
+       u8 caps_version;
+       u8 rsvd1;
+       u16 num_buffers;
+       u16 ack_threshold;
+       u16 rsvd2;
+       u32 ack_timeout;
+       u32 rsvd3;
+       u64 rsvd4[3];
+};
+
+struct veth_lpevent {
+       struct HvLpEvent base_event;
+       union {
+               struct veth_cap_data caps_data;
+               struct veth_frames_data frames_data;
+               struct veth_frames_ack_data frames_ack_data;
+       } u;
+
+};
+
+#define DRV_NAME       "iseries_veth"
+#define DRV_VERSION    "2.0"
+
 #define VETH_NUMBUFFERS                (120)
 #define VETH_ACKTIMEOUT        (1000000) /* microseconds */
 #define VETH_MAX_MCAST         (12)
@@ -113,9 +156,9 @@ MODULE_LICENSE("GPL");
 
 struct veth_msg {
        struct veth_msg *next;
-       struct VethFramesData data;
+       struct veth_frames_data data;
        int token;
-       unsigned long in_use;
+       int in_use;
        struct sk_buff *skb;
        struct device *dev;
 };
@@ -125,23 +168,28 @@ struct veth_lpar_connection {
        struct work_struct statemachine_wq;
        struct veth_msg *msgs;
        int num_events;
-       struct VethCapData local_caps;
+       struct veth_cap_data local_caps;
 
+       struct kobject kobject;
        struct timer_list ack_timer;
 
+       struct timer_list reset_timer;
+       unsigned int reset_timeout;
+       unsigned long last_contact;
+       int outstanding_tx;
+
        spinlock_t lock;
        unsigned long state;
        HvLpInstanceId src_inst;
        HvLpInstanceId dst_inst;
-       struct VethLpEvent cap_event, cap_ack_event;
+       struct veth_lpevent cap_event, cap_ack_event;
        u16 pending_acks[VETH_MAX_ACKS_PER_MSG];
        u32 num_pending_acks;
 
        int num_ack_events;
-       struct VethCapData remote_caps;
+       struct veth_cap_data remote_caps;
        u32 ack_timeout;
 
-       spinlock_t msg_stack_lock;
        struct veth_msg *msg_stack_head;
 };
 
@@ -151,15 +199,17 @@ struct veth_port {
        u64 mac_addr;
        HvLpIndexMap lpar_map;
 
-       spinlock_t pending_gate;
-       struct sk_buff *pending_skb;
-       HvLpIndexMap pending_lpmask;
+       /* queue_lock protects the stopped_map and dev's queue. */
+       spinlock_t queue_lock;
+       HvLpIndexMap stopped_map;
 
+       /* mcast_gate protects promiscuous, num_mcast & mcast_addr. */
        rwlock_t mcast_gate;
        int promiscuous;
-       int all_mcast;
        int num_mcast;
        u64 mcast_addr[VETH_MAX_MCAST];
+
+       struct kobject kobject;
 };
 
 static HvLpIndex this_lp;
@@ -168,44 +218,56 @@ static struct net_device *veth_dev[HVMAXARCHITECTEDVIRTUALLANS]; /* = 0 */
 
 static int veth_start_xmit(struct sk_buff *skb, struct net_device *dev);
 static void veth_recycle_msg(struct veth_lpar_connection *, struct veth_msg *);
-static void veth_flush_pending(struct veth_lpar_connection *cnx);
-static void veth_receive(struct veth_lpar_connection *, struct VethLpEvent *);
-static void veth_timed_ack(unsigned long connectionPtr);
+static void veth_wake_queues(struct veth_lpar_connection *cnx);
+static void veth_stop_queues(struct veth_lpar_connection *cnx);
+static void veth_receive(struct veth_lpar_connection *, struct veth_lpevent *);
+static void veth_release_connection(struct kobject *kobject);
+static void veth_timed_ack(unsigned long ptr);
+static void veth_timed_reset(unsigned long ptr);
 
 /*
  * Utility functions
  */
 
-#define veth_printk(prio, fmt, args...) \
-       printk(prio "%s: " fmt, __FILE__, ## args)
+#define veth_info(fmt, args...) \
+       printk(KERN_INFO DRV_NAME ": " fmt, ## args)
 
 #define veth_error(fmt, args...) \
-       printk(KERN_ERR "(%s:%3.3d) ERROR: " fmt, __FILE__, __LINE__ , ## args)
+       printk(KERN_ERR DRV_NAME ": Error: " fmt, ## args)
+
+#ifdef DEBUG
+#define veth_debug(fmt, args...) \
+       printk(KERN_DEBUG DRV_NAME ": " fmt, ## args)
+#else
+#define veth_debug(fmt, args...) do {} while (0)
+#endif
 
+/* You must hold the connection's lock when you call this function. */
 static inline void veth_stack_push(struct veth_lpar_connection *cnx,
                                   struct veth_msg *msg)
 {
-       unsigned long flags;
-
-       spin_lock_irqsave(&cnx->msg_stack_lock, flags);
        msg->next = cnx->msg_stack_head;
        cnx->msg_stack_head = msg;
-       spin_unlock_irqrestore(&cnx->msg_stack_lock, flags);
 }
 
+/* You must hold the connection's lock when you call this function. */
 static inline struct veth_msg *veth_stack_pop(struct veth_lpar_connection *cnx)
 {
-       unsigned long flags;
        struct veth_msg *msg;
 
-       spin_lock_irqsave(&cnx->msg_stack_lock, flags);
        msg = cnx->msg_stack_head;
        if (msg)
                cnx->msg_stack_head = cnx->msg_stack_head->next;
-       spin_unlock_irqrestore(&cnx->msg_stack_lock, flags);
+
        return msg;
 }
 
+/* You must hold the connection's lock when you call this function. */
+static inline int veth_stack_is_empty(struct veth_lpar_connection *cnx)
+{
+       return cnx->msg_stack_head == NULL;
+}
+
 static inline HvLpEvent_Rc
 veth_signalevent(struct veth_lpar_connection *cnx, u16 subtype,
                 HvLpEvent_AckInd ackind, HvLpEvent_AckType acktype,
@@ -249,13 +311,144 @@ static int veth_allocate_events(HvLpIndex rlp, int number)
        struct veth_allocation vc = { COMPLETION_INITIALIZER(vc.c), 0 };
 
        mf_allocate_lp_events(rlp, HvLpEvent_Type_VirtualLan,
-                           sizeof(struct VethLpEvent), number,
+                           sizeof(struct veth_lpevent), number,
                            &veth_complete_allocation, &vc);
        wait_for_completion(&vc.c);
 
        return vc.num;
 }
 
+/*
+ * sysfs support
+ */
+
+struct veth_cnx_attribute {
+       struct attribute attr;
+       ssize_t (*show)(struct veth_lpar_connection *, char *buf);
+       ssize_t (*store)(struct veth_lpar_connection *, const char *buf);
+};
+
+static ssize_t veth_cnx_attribute_show(struct kobject *kobj,
+               struct attribute *attr, char *buf)
+{
+       struct veth_cnx_attribute *cnx_attr;
+       struct veth_lpar_connection *cnx;
+
+       cnx_attr = container_of(attr, struct veth_cnx_attribute, attr);
+       cnx = container_of(kobj, struct veth_lpar_connection, kobject);
+
+       if (!cnx_attr->show)
+               return -EIO;
+
+       return cnx_attr->show(cnx, buf);
+}
+
+#define CUSTOM_CNX_ATTR(_name, _format, _expression)                   \
+static ssize_t _name##_show(struct veth_lpar_connection *cnx, char *buf)\
+{                                                                      \
+       return sprintf(buf, _format, _expression);                      \
+}                                                                      \
+struct veth_cnx_attribute veth_cnx_attr_##_name = __ATTR_RO(_name)
+
+#define SIMPLE_CNX_ATTR(_name) \
+       CUSTOM_CNX_ATTR(_name, "%lu\n", (unsigned long)cnx->_name)
+
+SIMPLE_CNX_ATTR(outstanding_tx);
+SIMPLE_CNX_ATTR(remote_lp);
+SIMPLE_CNX_ATTR(num_events);
+SIMPLE_CNX_ATTR(src_inst);
+SIMPLE_CNX_ATTR(dst_inst);
+SIMPLE_CNX_ATTR(num_pending_acks);
+SIMPLE_CNX_ATTR(num_ack_events);
+CUSTOM_CNX_ATTR(ack_timeout, "%d\n", jiffies_to_msecs(cnx->ack_timeout));
+CUSTOM_CNX_ATTR(reset_timeout, "%d\n", jiffies_to_msecs(cnx->reset_timeout));
+CUSTOM_CNX_ATTR(state, "0x%.4lX\n", cnx->state);
+CUSTOM_CNX_ATTR(last_contact, "%d\n", cnx->last_contact ?
+               jiffies_to_msecs(jiffies - cnx->last_contact) : 0);
+
+#define GET_CNX_ATTR(_name)    (&veth_cnx_attr_##_name.attr)
+
+static struct attribute *veth_cnx_default_attrs[] = {
+       GET_CNX_ATTR(outstanding_tx),
+       GET_CNX_ATTR(remote_lp),
+       GET_CNX_ATTR(num_events),
+       GET_CNX_ATTR(reset_timeout),
+       GET_CNX_ATTR(last_contact),
+       GET_CNX_ATTR(state),
+       GET_CNX_ATTR(src_inst),
+       GET_CNX_ATTR(dst_inst),
+       GET_CNX_ATTR(num_pending_acks),
+       GET_CNX_ATTR(num_ack_events),
+       GET_CNX_ATTR(ack_timeout),
+       NULL
+};
+
+static struct sysfs_ops veth_cnx_sysfs_ops = {
+               .show = veth_cnx_attribute_show
+};
+
+static struct kobj_type veth_lpar_connection_ktype = {
+       .release        = veth_release_connection,
+       .sysfs_ops      = &veth_cnx_sysfs_ops,
+       .default_attrs  = veth_cnx_default_attrs
+};
+
+struct veth_port_attribute {
+       struct attribute attr;
+       ssize_t (*show)(struct veth_port *, char *buf);
+       ssize_t (*store)(struct veth_port *, const char *buf);
+};
+
+static ssize_t veth_port_attribute_show(struct kobject *kobj,
+               struct attribute *attr, char *buf)
+{
+       struct veth_port_attribute *port_attr;
+       struct veth_port *port;
+
+       port_attr = container_of(attr, struct veth_port_attribute, attr);
+       port = container_of(kobj, struct veth_port, kobject);
+
+       if (!port_attr->show)
+               return -EIO;
+
+       return port_attr->show(port, buf);
+}
+
+#define CUSTOM_PORT_ATTR(_name, _format, _expression)                  \
+static ssize_t _name##_show(struct veth_port *port, char *buf)         \
+{                                                                      \
+       return sprintf(buf, _format, _expression);                      \
+}                                                                      \
+struct veth_port_attribute veth_port_attr_##_name = __ATTR_RO(_name)
+
+#define SIMPLE_PORT_ATTR(_name)        \
+       CUSTOM_PORT_ATTR(_name, "%lu\n", (unsigned long)port->_name)
+
+SIMPLE_PORT_ATTR(promiscuous);
+SIMPLE_PORT_ATTR(num_mcast);
+CUSTOM_PORT_ATTR(lpar_map, "0x%X\n", port->lpar_map);
+CUSTOM_PORT_ATTR(stopped_map, "0x%X\n", port->stopped_map);
+CUSTOM_PORT_ATTR(mac_addr, "0x%lX\n", port->mac_addr);
+
+#define GET_PORT_ATTR(_name)   (&veth_port_attr_##_name.attr)
+static struct attribute *veth_port_default_attrs[] = {
+       GET_PORT_ATTR(mac_addr),
+       GET_PORT_ATTR(lpar_map),
+       GET_PORT_ATTR(stopped_map),
+       GET_PORT_ATTR(promiscuous),
+       GET_PORT_ATTR(num_mcast),
+       NULL
+};
+
+static struct sysfs_ops veth_port_sysfs_ops = {
+       .show = veth_port_attribute_show
+};
+
+static struct kobj_type veth_port_ktype = {
+       .sysfs_ops      = &veth_port_sysfs_ops,
+       .default_attrs  = veth_port_default_attrs
+};
+
 /*
  * LPAR connection code
  */
@@ -266,7 +459,7 @@ static inline void veth_kick_statemachine(struct veth_lpar_connection *cnx)
 }
 
 static void veth_take_cap(struct veth_lpar_connection *cnx,
-                         struct VethLpEvent *event)
+                         struct veth_lpevent *event)
 {
        unsigned long flags;
 
@@ -278,7 +471,7 @@ static void veth_take_cap(struct veth_lpar_connection *cnx,
                                                  HvLpEvent_Type_VirtualLan);
 
        if (cnx->state & VETH_STATE_GOTCAPS) {
-               veth_error("Received a second capabilities from lpar %d\n",
+               veth_error("Received a second capabilities from LPAR %d.\n",
                           cnx->remote_lp);
                event->base_event.xRc = HvLpEvent_Rc_BufferNotAvailable;
                HvCallEvent_ackLpEvent((struct HvLpEvent *) event);
@@ -291,13 +484,13 @@ static void veth_take_cap(struct veth_lpar_connection *cnx,
 }
 
 static void veth_take_cap_ack(struct veth_lpar_connection *cnx,
-                             struct VethLpEvent *event)
+                             struct veth_lpevent *event)
 {
        unsigned long flags;
 
        spin_lock_irqsave(&cnx->lock, flags);
        if (cnx->state & VETH_STATE_GOTCAPACK) {
-               veth_error("Received a second capabilities ack from lpar %d\n",
+               veth_error("Received a second capabilities ack from LPAR %d.\n",
                           cnx->remote_lp);
        } else {
                memcpy(&cnx->cap_ack_event, event,
@@ -309,19 +502,24 @@ static void veth_take_cap_ack(struct veth_lpar_connection *cnx,
 }
 
 static void veth_take_monitor_ack(struct veth_lpar_connection *cnx,
-                                 struct VethLpEvent *event)
+                                 struct veth_lpevent *event)
 {
        unsigned long flags;
 
        spin_lock_irqsave(&cnx->lock, flags);
-       veth_printk(KERN_DEBUG, "Monitor ack returned for lpar %d\n",
-                   cnx->remote_lp);
-       cnx->state |= VETH_STATE_RESET;
-       veth_kick_statemachine(cnx);
+       veth_debug("cnx %d: lost connection.\n", cnx->remote_lp);
+
+       /* Avoid kicking the statemachine once we're shutdown.
+        * It's unnecessary and it could break veth_stop_connection(). */
+
+       if (! (cnx->state & VETH_STATE_SHUTDOWN)) {
+               cnx->state |= VETH_STATE_RESET;
+               veth_kick_statemachine(cnx);
+       }
        spin_unlock_irqrestore(&cnx->lock, flags);
 }
 
-static void veth_handle_ack(struct VethLpEvent *event)
+static void veth_handle_ack(struct veth_lpevent *event)
 {
        HvLpIndex rlp = event->base_event.xTargetLp;
        struct veth_lpar_connection *cnx = veth_cnx[rlp];
@@ -329,58 +527,67 @@ static void veth_handle_ack(struct VethLpEvent *event)
        BUG_ON(! cnx);
 
        switch (event->base_event.xSubtype) {
-       case VethEventTypeCap:
+       case VETH_EVENT_CAP:
                veth_take_cap_ack(cnx, event);
                break;
-       case VethEventTypeMonitor:
+       case VETH_EVENT_MONITOR:
                veth_take_monitor_ack(cnx, event);
                break;
        default:
-               veth_error("Unknown ack type %d from lpar %d\n",
-                          event->base_event.xSubtype, rlp);
+               veth_error("Unknown ack type %d from LPAR %d.\n",
+                               event->base_event.xSubtype, rlp);
        };
 }
 
-static void veth_handle_int(struct VethLpEvent *event)
+static void veth_handle_int(struct veth_lpevent *event)
 {
        HvLpIndex rlp = event->base_event.xSourceLp;
        struct veth_lpar_connection *cnx = veth_cnx[rlp];
        unsigned long flags;
-       int i;
+       int i, acked = 0;
 
        BUG_ON(! cnx);
 
        switch (event->base_event.xSubtype) {
-       case VethEventTypeCap:
+       case VETH_EVENT_CAP:
                veth_take_cap(cnx, event);
                break;
-       case VethEventTypeMonitor:
+       case VETH_EVENT_MONITOR:
                /* do nothing... this'll hang out here til we're dead,
                 * and the hypervisor will return it for us. */
                break;
-       case VethEventTypeFramesAck:
+       case VETH_EVENT_FRAMES_ACK:
                spin_lock_irqsave(&cnx->lock, flags);
+
                for (i = 0; i < VETH_MAX_ACKS_PER_MSG; ++i) {
                        u16 msgnum = event->u.frames_ack_data.token[i];
 
-                       if (msgnum < VETH_NUMBUFFERS)
+                       if (msgnum < VETH_NUMBUFFERS) {
                                veth_recycle_msg(cnx, cnx->msgs + msgnum);
+                               cnx->outstanding_tx--;
+                               acked++;
+                       }
+               }
+
+               if (acked > 0) {
+                       cnx->last_contact = jiffies;
+                       veth_wake_queues(cnx);
                }
+
                spin_unlock_irqrestore(&cnx->lock, flags);
-               veth_flush_pending(cnx);
                break;
-       case VethEventTypeFrames:
+       case VETH_EVENT_FRAMES:
                veth_receive(cnx, event);
                break;
        default:
-               veth_error("Unknown interrupt type %d from lpar %d\n",
-                          event->base_event.xSubtype, rlp);
+               veth_error("Unknown interrupt type %d from LPAR %d.\n",
+                               event->base_event.xSubtype, rlp);
        };
 }
 
 static void veth_handle_event(struct HvLpEvent *event, struct pt_regs *regs)
 {
-       struct VethLpEvent *veth_event = (struct VethLpEvent *)event;
+       struct veth_lpevent *veth_event = (struct veth_lpevent *)event;
 
        if (event->xFlags.xFunction == HvLpEvent_Function_Ack)
                veth_handle_ack(veth_event);
@@ -390,7 +597,7 @@ static void veth_handle_event(struct HvLpEvent *event, struct pt_regs *regs)
 
 static int veth_process_caps(struct veth_lpar_connection *cnx)
 {
-       struct VethCapData *remote_caps = &cnx->remote_caps;
+       struct veth_cap_data *remote_caps = &cnx->remote_caps;
        int num_acks_needed;
 
        /* Convert timer to jiffies */
@@ -400,8 +607,8 @@ static int veth_process_caps(struct veth_lpar_connection *cnx)
             || (remote_caps->ack_threshold > VETH_MAX_ACKS_PER_MSG)
             || (remote_caps->ack_threshold == 0)
             || (cnx->ack_timeout == 0) ) {
-               veth_error("Received incompatible capabilities from lpar %d\n",
-                          cnx->remote_lp);
+               veth_error("Received incompatible capabilities from LPAR %d.\n",
+                               cnx->remote_lp);
                return HvLpEvent_Rc_InvalidSubtypeData;
        }
 
@@ -418,8 +625,8 @@ static int veth_process_caps(struct veth_lpar_connection *cnx)
                        cnx->num_ack_events += num;
 
                if (cnx->num_ack_events < num_acks_needed) {
-                       veth_error("Couldn't allocate enough ack events for lpar %d\n",
-                                  cnx->remote_lp);
+                       veth_error("Couldn't allocate enough ack events "
+                                       "for LPAR %d.\n", cnx->remote_lp);
 
                        return HvLpEvent_Rc_BufferNotAvailable;
                }
@@ -440,15 +647,15 @@ static void veth_statemachine(void *p)
 
  restart:
        if (cnx->state & VETH_STATE_RESET) {
-               int i;
-
-               del_timer(&cnx->ack_timer);
-
                if (cnx->state & VETH_STATE_OPEN)
                        HvCallEvent_closeLpEventPath(cnx->remote_lp,
                                                     HvLpEvent_Type_VirtualLan);
 
-               /* reset ack data */
+               /*
+                * Reset ack data. This prevents the ack_timer actually
+                * doing anything, even if it runs one more time when
+                * we drop the lock below.
+                */
                memset(&cnx->pending_acks, 0xff, sizeof (cnx->pending_acks));
                cnx->num_pending_acks = 0;
 
@@ -458,14 +665,32 @@ static void veth_statemachine(void *p)
                                | VETH_STATE_SENTCAPACK | VETH_STATE_READY);
 
                /* Clean up any leftover messages */
-               if (cnx->msgs)
+               if (cnx->msgs) {
+                       int i;
                        for (i = 0; i < VETH_NUMBUFFERS; ++i)
                                veth_recycle_msg(cnx, cnx->msgs + i);
+               }
+
+               cnx->outstanding_tx = 0;
+               veth_wake_queues(cnx);
+
+               /* Drop the lock so we can do stuff that might sleep or
+                * take other locks. */
                spin_unlock_irq(&cnx->lock);
-               veth_flush_pending(cnx);
+
+               del_timer_sync(&cnx->ack_timer);
+               del_timer_sync(&cnx->reset_timer);
+
                spin_lock_irq(&cnx->lock);
+
                if (cnx->state & VETH_STATE_RESET)
                        goto restart;
+
+               /* Hack, wait for the other end to reset itself. */
+               if (! (cnx->state & VETH_STATE_SHUTDOWN)) {
+                       schedule_delayed_work(&cnx->statemachine_wq, 5 * HZ);
+                       goto out;
+               }
        }
 
        if (cnx->state & VETH_STATE_SHUTDOWN)
@@ -488,7 +713,7 @@ static void veth_statemachine(void *p)
 
        if ( (cnx->state & VETH_STATE_OPEN)
             && !(cnx->state & VETH_STATE_SENTMON) ) {
-               rc = veth_signalevent(cnx, VethEventTypeMonitor,
+               rc = veth_signalevent(cnx, VETH_EVENT_MONITOR,
                                      HvLpEvent_AckInd_DoAck,
                                      HvLpEvent_AckType_DeferredAck,
                                      0, 0, 0, 0, 0, 0);
@@ -498,9 +723,8 @@ static void veth_statemachine(void *p)
                } else {
                        if ( (rc != HvLpEvent_Rc_PartitionDead)
                             && (rc != HvLpEvent_Rc_PathClosed) )
-                               veth_error("Error sending monitor to "
-                                          "lpar %d, rc=%x\n",
-                                          rlp, (int) rc);
+                               veth_error("Error sending monitor to LPAR %d, "
+                                               "rc = %d\n", rlp, rc);
 
                        /* Oh well, hope we get a cap from the other
                         * end and do better when that kicks us */
@@ -512,7 +736,7 @@ static void veth_statemachine(void *p)
             && !(cnx->state & VETH_STATE_SENTCAPS)) {
                u64 *rawcap = (u64 *)&cnx->local_caps;
 
-               rc = veth_signalevent(cnx, VethEventTypeCap,
+               rc = veth_signalevent(cnx, VETH_EVENT_CAP,
                                      HvLpEvent_AckInd_DoAck,
                                      HvLpEvent_AckType_ImmediateAck,
                                      0, rawcap[0], rawcap[1], rawcap[2],
@@ -523,9 +747,9 @@ static void veth_statemachine(void *p)
                } else {
                        if ( (rc != HvLpEvent_Rc_PartitionDead)
                             && (rc != HvLpEvent_Rc_PathClosed) )
-                               veth_error("Error sending caps to "
-                                          "lpar %d, rc=%x\n",
-                                          rlp, (int) rc);
+                               veth_error("Error sending caps to LPAR %d, "
+                                               "rc = %d\n", rlp, rc);
+
                        /* Oh well, hope we get a cap from the other
                         * end and do better when that kicks us */
                        goto out;
@@ -534,7 +758,7 @@ static void veth_statemachine(void *p)
 
        if ((cnx->state & VETH_STATE_GOTCAPS)
            && !(cnx->state & VETH_STATE_SENTCAPACK)) {
-               struct VethCapData *remote_caps = &cnx->remote_caps;
+               struct veth_cap_data *remote_caps = &cnx->remote_caps;
 
                memcpy(remote_caps, &cnx->cap_event.u.caps_data,
                       sizeof(*remote_caps));
@@ -565,10 +789,8 @@ static void veth_statemachine(void *p)
                        add_timer(&cnx->ack_timer);
                        cnx->state |= VETH_STATE_READY;
                } else {
-                       veth_printk(KERN_ERR, "Caps rejected (rc=%d) by "
-                                   "lpar %d\n",
-                                   cnx->cap_ack_event.base_event.xRc,
-                                   rlp);
+                       veth_error("Caps rejected by LPAR %d, rc = %d\n",
+                                       rlp, cnx->cap_ack_event.base_event.xRc);
                        goto cant_cope;
                }
        }
@@ -581,8 +803,8 @@ static void veth_statemachine(void *p)
        /* FIXME: we get here if something happens we really can't
         * cope with.  The link will never work once we get here, and
         * all we can do is not lock the rest of the system up */
-       veth_error("Badness on connection to lpar %d (state=%04lx) "
-                  " - shutting down\n", rlp, cnx->state);
+       veth_error("Unrecoverable error on connection to LPAR %d, shutting down"
+                       " (state = 0x%04lx)\n", rlp, cnx->state);
        cnx->state |= VETH_STATE_SHUTDOWN;
        spin_unlock_irq(&cnx->lock);
 }
@@ -591,7 +813,7 @@ static int veth_init_connection(u8 rlp)
 {
        struct veth_lpar_connection *cnx;
        struct veth_msg *msgs;
-       int i;
+       int i, rc;
 
        if ( (rlp == this_lp)
             || ! HvLpConfig_doLpsCommunicateOnVirtualLan(this_lp, rlp) )
@@ -605,22 +827,36 @@ static int veth_init_connection(u8 rlp)
        cnx->remote_lp = rlp;
        spin_lock_init(&cnx->lock);
        INIT_WORK(&cnx->statemachine_wq, veth_statemachine, cnx);
+
        init_timer(&cnx->ack_timer);
        cnx->ack_timer.function = veth_timed_ack;
        cnx->ack_timer.data = (unsigned long) cnx;
+
+       init_timer(&cnx->reset_timer);
+       cnx->reset_timer.function = veth_timed_reset;
+       cnx->reset_timer.data = (unsigned long) cnx;
+       cnx->reset_timeout = 5 * HZ * (VETH_ACKTIMEOUT / 1000000);
+
        memset(&cnx->pending_acks, 0xff, sizeof (cnx->pending_acks));
 
        veth_cnx[rlp] = cnx;
 
+       /* This gets us 1 reference, which is held on behalf of the driver
+        * infrastructure. It's released at module unload. */
+       kobject_init(&cnx->kobject);
+       cnx->kobject.ktype = &veth_lpar_connection_ktype;
+       rc = kobject_set_name(&cnx->kobject, "cnx%.2d", rlp);
+       if (rc != 0)
+               return rc;
+
        msgs = kmalloc(VETH_NUMBUFFERS * sizeof(struct veth_msg), GFP_KERNEL);
        if (! msgs) {
-               veth_error("Can't allocate buffers for lpar %d\n", rlp);
+               veth_error("Can't allocate buffers for LPAR %d.\n", rlp);
                return -ENOMEM;
        }
 
        cnx->msgs = msgs;
        memset(msgs, 0, VETH_NUMBUFFERS * sizeof(struct veth_msg));
-       spin_lock_init(&cnx->msg_stack_lock);
 
        for (i = 0; i < VETH_NUMBUFFERS; i++) {
                msgs[i].token = i;
@@ -630,8 +866,7 @@ static int veth_init_connection(u8 rlp)
        cnx->num_events = veth_allocate_events(rlp, 2 + VETH_NUMBUFFERS);
 
        if (cnx->num_events < (2 + VETH_NUMBUFFERS)) {
-               veth_error("Can't allocate events for lpar %d, only got %d\n",
-                          rlp, cnx->num_events);
+               veth_error("Can't allocate enough events for LPAR %d.\n", rlp);
                return -ENOMEM;
        }
 
@@ -642,11 +877,9 @@ static int veth_init_connection(u8 rlp)
        return 0;
 }
 
-static void veth_stop_connection(u8 rlp)
+static void veth_stop_connection(struct veth_lpar_connection *cnx)
 {
-       struct veth_lpar_connection *cnx = veth_cnx[rlp];
-
-       if (! cnx)
+       if (!cnx)
                return;
 
        spin_lock_irq(&cnx->lock);
@@ -654,12 +887,23 @@ static void veth_stop_connection(u8 rlp)
        veth_kick_statemachine(cnx);
        spin_unlock_irq(&cnx->lock);
 
+       /* There's a slim chance the reset code has just queued the
+        * statemachine to run in five seconds. If so we need to cancel
+        * that and requeue the work to run now. */
+       if (cancel_delayed_work(&cnx->statemachine_wq)) {
+               spin_lock_irq(&cnx->lock);
+               veth_kick_statemachine(cnx);
+               spin_unlock_irq(&cnx->lock);
+       }
+
+       /* Wait for the state machine to run. */
        flush_scheduled_work();
+}
 
-       /* FIXME: not sure if this is necessary - will already have
-        * been deleted by the state machine, just want to make sure
-        * its not running any more */
-       del_timer_sync(&cnx->ack_timer);
+static void veth_destroy_connection(struct veth_lpar_connection *cnx)
+{
+       if (!cnx)
+               return;
 
        if (cnx->num_events > 0)
                mf_deallocate_lp_events(cnx->remote_lp,
@@ -671,18 +915,18 @@ static void veth_stop_connection(u8 rlp)
                                      HvLpEvent_Type_VirtualLan,
                                      cnx->num_ack_events,
                                      NULL, NULL);
-}
-
-static void veth_destroy_connection(u8 rlp)
-{
-       struct veth_lpar_connection *cnx = veth_cnx[rlp];
-
-       if (! cnx)
-               return;
 
        kfree(cnx->msgs);
+       veth_cnx[cnx->remote_lp] = NULL;
        kfree(cnx);
-       veth_cnx[rlp] = NULL;
+}
+
+static void veth_release_connection(struct kobject *kobj)
+{
+       struct veth_lpar_connection *cnx;
+       cnx = container_of(kobj, struct veth_lpar_connection, kobject);
+       veth_stop_connection(cnx);
+       veth_destroy_connection(cnx);
 }
 
 /*
@@ -726,17 +970,15 @@ static void veth_set_multicast_list(struct net_device *dev)
 
        write_lock_irqsave(&port->mcast_gate, flags);
 
-       if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
-               printk(KERN_INFO "%s: Promiscuous mode enabled.\n",
-                      dev->name);
+       if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) ||
+                       (dev->mc_count > VETH_MAX_MCAST)) {
                port->promiscuous = 1;
-       } else if ( (dev->flags & IFF_ALLMULTI)
-                   || (dev->mc_count > VETH_MAX_MCAST) ) {
-               port->all_mcast = 1;
        } else {
                struct dev_mc_list *dmi = dev->mc_list;
                int i;
 
+               port->promiscuous = 0;
+
             &nb