[MIPS] Sibyte: Stop timers before programming next even.
authorRalf Baechle <ralf@linux-mips.org>
Sun, 11 Nov 2007 17:33:55 +0000 (17:33 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 15 Nov 2007 23:21:50 +0000 (23:21 +0000)
We have no guarantee by the generic time code that the timer is stopped
when the ->next_event method is called.  Modifying the Timer Initial Count
register while the timer is enabled has UNPREDICTABLE effect according to
the BCM1250/BCM1125/BCM1125H User Manual.  So stop the timer before
reprogramming.

This is a paranoia fix; no ill effects have been observed previously.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/cevt-bcm1480.c
arch/mips/kernel/cevt-sb1250.c

index e54410e5a2cd75a160dfd962874df9cad679c4a1..0a57f86945f1e5be7b85553cc4839ba7348d2371 100644 (file)
@@ -75,6 +75,7 @@ static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd)
        cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
        init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
 
        cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
        init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
 
+       __raw_writeq(0, cfg);
        __raw_writeq(delta - 1, init);
        __raw_writeq(M_SCD_TIMER_ENABLE, cfg);
 
        __raw_writeq(delta - 1, init);
        __raw_writeq(M_SCD_TIMER_ENABLE, cfg);
 
index 8fbb055376807de1c572dfc1ddc0dee377beecee..63ac3ad462bc61cf2aeafe817a6ea1255c3991a0 100644 (file)
@@ -73,6 +73,7 @@ static int sibyte_next_event(unsigned long delta, struct clock_event_device *cd)
        cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
        init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
 
        cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG));
        init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT));
 
+       __raw_writeq(0, cfg);
        __raw_writeq(delta - 1, init);
        __raw_writeq(M_SCD_TIMER_ENABLE, cfg);
 
        __raw_writeq(delta - 1, init);
        __raw_writeq(M_SCD_TIMER_ENABLE, cfg);