[PATCH] ppc64: very basic desktop g5 sound support
[linux-3.10.git] / arch / ppc64 / kernel / pmac_feature.c
index 086abc1bcca1a983fa35105ad5f1186ac3852cb9..98ed2bccab1af06425be213c23242014b8b2af8e 100644 (file)
@@ -64,8 +64,7 @@ static DEFINE_SPINLOCK(feature_lock  __pmacdata);
  */
 struct macio_chip macio_chips[MAX_MACIO_CHIPS]  __pmacdata;
 
-struct macio_chip* __pmac
-macio_find(struct device_node* child, int type)
+struct macio_chip* __pmac macio_find(struct device_node* child, int type)
 {
        while(child) {
                int     i;
@@ -78,6 +77,7 @@ macio_find(struct device_node* child, int type)
        }
        return NULL;
 }
+EXPORT_SYMBOL_GPL(macio_find);
 
 static const char* macio_names[] __pmacdata =
 {
@@ -250,6 +250,30 @@ static long __pmac g5_eth_phy_reset(struct device_node* node, long param, long v
        return 0;
 }
 
+static long __pmac g5_i2s_enable(struct device_node *node, long param, long value)
+{
+       /* Very crude implementation for now */
+       struct macio_chip* macio = &macio_chips[0];
+       unsigned long flags;
+
+       if (value == 0)
+               return 0; /* don't disable yet */
+
+       LOCK(flags);
+       MACIO_BIS(KEYLARGO_FCR3, KL3_CLK45_ENABLE | KL3_CLK49_ENABLE |
+                 KL3_I2S0_CLK18_ENABLE);
+       udelay(10);
+       MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_I2S0_CELL_ENABLE |
+                 K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE);
+       udelay(10);
+       MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_I2S0_RESET);
+       UNLOCK(flags);
+       udelay(10);
+
+       return 0;
+}
+
+
 #ifdef CONFIG_SMP
 static long __pmac g5_reset_cpu(struct device_node* node, long param, long value)
 {
@@ -337,6 +361,7 @@ static struct feature_table_entry g5_features[]  __pmacdata = {
        { PMAC_FTR_READ_GPIO,           g5_read_gpio },
        { PMAC_FTR_WRITE_GPIO,          g5_write_gpio },
        { PMAC_FTR_GMAC_PHY_RESET,      g5_eth_phy_reset },
+       { PMAC_FTR_SOUND_CHIP_ENABLE,   g5_i2s_enable },
 #ifdef CONFIG_SMP
        { PMAC_FTR_RESET_CPU,           g5_reset_cpu },
 #endif /* CONFIG_SMP */