drivers/video/s3c2410fb.c

   1 /*
   2  * linux/drivers/video/s3c2410fb.c
   3  *      Copyright (c) Arnaud Patard, Ben Dooks
   4  *
   5  * This file is subject to the terms and conditions of the GNU General Public
   6  * License.  See the file COPYING in the main directory of this archive for
   7  * more details.
   8  *
   9  *          S3C2410 LCD Controller Frame Buffer Driver
  10  *          based on skeletonfb.c, sa1100fb.c and others
  11  *
  12  * ChangeLog
  13  * 2005-04-07: Arnaud Patard <arnaud.patard@rtp-net.org>
  14  *      - u32 state -> pm_message_t state
  15  *      - S3C2410_{VA,SZ}_LCD -> S3C24XX
  16  *
  17  * 2005-03-15: Arnaud Patard <arnaud.patard@rtp-net.org>
  18  *      - Removed the ioctl
  19  *      - use readl/writel instead of __raw_writel/__raw_readl
  20  *
  21  * 2004-12-04: Arnaud Patard <arnaud.patard@rtp-net.org>
  22  *      - Added the possibility to set on or off the
  23  *      debugging mesaages
  24  *      - Replaced 0 and 1 by on or off when reading the
  25  *      /sys files
  26  *
  27  * 2005-03-23: Ben Dooks <ben-linux@fluff.org>
  28  *      - added non 16bpp modes
  29  *      - updated platform information for range of x/y/bpp
  30  *      - add code to ensure palette is written correctly
  31  *      - add pixel clock divisor control
  32  *
  33  * 2004-11-11: Arnaud Patard <arnaud.patard@rtp-net.org>
  34  *      - Removed the use of currcon as it no more exist
  35  *      - Added LCD power sysfs interface
  36  *
  37  * 2004-11-03: Ben Dooks <ben-linux@fluff.org>
  38  *      - minor cleanups
  39  *      - add suspend/resume support
  40  *      - s3c2410fb_setcolreg() not valid in >8bpp modes
  41  *      - removed last CONFIG_FB_S3C2410_FIXED
  42  *      - ensure lcd controller stopped before cleanup
  43  *      - added sysfs interface for backlight power
  44  *      - added mask for gpio configuration
  45  *      - ensured IRQs disabled during GPIO configuration
  46  *      - disable TPAL before enabling video
  47  *
  48  * 2004-09-20: Arnaud Patard <arnaud.patard@rtp-net.org>
  49  *      - Suppress command line options
  50  *
  51  * 2004-09-15: Arnaud Patard <arnaud.patard@rtp-net.org>
  52  *      - code cleanup
  53  *
  54  * 2004-09-07: Arnaud Patard <arnaud.patard@rtp-net.org>
  55  *      - Renamed from h1940fb.c to s3c2410fb.c
  56  *      - Add support for different devices
  57  *      - Backlight support
  58  *
  59  * 2004-09-05: Herbert Pötzl <herbert@13thfloor.at>
  60  *      - added clock (de-)allocation code
  61  *      - added fixem fbmem option
  62  *
  63  * 2004-07-27: Arnaud Patard <arnaud.patard@rtp-net.org>
  64  *      - code cleanup
  65  *      - added a forgotten return in h1940fb_init
  66  *
  67  * 2004-07-19: Herbert Pötzl <herbert@13thfloor.at>
  68  *      - code cleanup and extended debugging
  69  *
  70  * 2004-07-15: Arnaud Patard <arnaud.patard@rtp-net.org>
  71  *      - First version
  72  */
  73
  74 #include <linux/module.h>
  75 #include <linux/kernel.h>
  76 #include <linux/errno.h>
  77 #include <linux/string.h>
  78 #include <linux/mm.h>
  79 #include <linux/tty.h>
  80 #include <linux/slab.h>
  81 #include <linux/delay.h>
  82 #include <linux/fb.h>
  83 #include <linux/init.h>
  84 #include <linux/dma-mapping.h>
  85 #include <linux/string.h>
  86 #include <linux/interrupt.h>
  87 #include <linux/workqueue.h>
  88 #include <linux/wait.h>
  89 #include <linux/platform_device.h>
  90 #include <linux/clk.h>
  91
  92 #include <asm/io.h>
  93 #include <asm/uaccess.h>
  94 #include <asm/div64.h>
  95
  96 #include <asm/mach/map.h>
  97 #include <asm/arch/regs-lcd.h>
  98 #include <asm/arch/regs-gpio.h>
  99 #include <asm/arch/fb.h>
 100
 101 #ifdef CONFIG_PM
 102 #include <linux/pm.h>
 103 #endif
 104
 105 #include "s3c2410fb.h"
 106
 107
 108 static struct s3c2410fb_mach_info *mach_info;
 109
 110 /* Debugging stuff */
 111 #ifdef CONFIG_FB_S3C2410_DEBUG
 112 static int debug           = 1;
 113 #else
 114 static int debug           = 0;
 115 #endif
 116
 117 #define dprintk(msg...) if (debug) { printk(KERN_DEBUG "s3c2410fb: " msg); }
 118
 119 /* useful functions */
 120
 121 /* s3c2410fb_set_lcdaddr
 122  *
 123  * initialise lcd controller address pointers
 124 */
 125
 126 static void s3c2410fb_set_lcdaddr(struct s3c2410fb_info *fbi)
 127 {
 128         struct fb_var_screeninfo *var = &fbi->fb->var;
 129         unsigned long saddr1, saddr2, saddr3;
 130
 131         saddr1  = fbi->fb->fix.smem_start >> 1;
 132         saddr2  = fbi->fb->fix.smem_start;
 133         saddr2 += (var->xres * var->yres * var->bits_per_pixel)/8;
 134         saddr2>>= 1;
 135
 136         saddr3 =  S3C2410_OFFSIZE(0) | S3C2410_PAGEWIDTH(var->xres);
 137
 138         dprintk("LCDSADDR1 = 0x%08lx\n", saddr1);
 139         dprintk("LCDSADDR2 = 0x%08lx\n", saddr2);
 140         dprintk("LCDSADDR3 = 0x%08lx\n", saddr3);
 141
 142         writel(saddr1, S3C2410_LCDSADDR1);
 143         writel(saddr2, S3C2410_LCDSADDR2);
 144         writel(saddr3, S3C2410_LCDSADDR3);
 145 }
 146
 147 /* s3c2410fb_calc_pixclk()
 148  *
 149  * calculate divisor for clk->pixclk
 150 */
 151
 152 static unsigned int s3c2410fb_calc_pixclk(struct s3c2410fb_info *fbi,
 153                                           unsigned long pixclk)
 154 {
 155         unsigned long clk = clk_get_rate(fbi->clk);
 156         unsigned long long div;
 157
 158         /* pixclk is in picoseoncds, our clock is in Hz
 159          *
 160          * Hz -> picoseconds is / 10^-12
 161          */
 162
 163         div = (unsigned long long)clk * pixclk;
 164         do_div(div,1000000UL);
 165         do_div(div,1000000UL);
 166
 167         dprintk("pixclk %ld, divisor is %ld\n", pixclk, (long)div);
 168         return div;
 169 }
 170
 171 /*
 172  *      s3c2410fb_check_var():
 173  *      Get the video params out of 'var'. If a value doesn't fit, round it up,
 174  *      if it's too big, return -EINVAL.
 175  *
 176  */
 177 static int s3c2410fb_check_var(struct fb_var_screeninfo *var,
 178                                struct fb_info *info)
 179 {
 180         struct s3c2410fb_info *fbi = info->par;
 181
 182         dprintk("check_var(var=%p, info=%p)\n", var, info);
 183
 184         /* validate x/y resolution */
 185
 186         if (var->yres > fbi->mach_info->yres.max)
 187                 var->yres = fbi->mach_info->yres.max;
 188         else if (var->yres < fbi->mach_info->yres.min)
 189                 var->yres = fbi->mach_info->yres.min;
 190
 191         if (var->xres > fbi->mach_info->xres.max)
 192                 var->yres = fbi->mach_info->xres.max;
 193         else if (var->xres < fbi->mach_info->xres.min)
 194                 var->xres = fbi->mach_info->xres.min;
 195
 196         /* validate bpp */
 197
 198         if (var->bits_per_pixel > fbi->mach_info->bpp.max)
 199                 var->bits_per_pixel = fbi->mach_info->bpp.max;
 200         else if (var->bits_per_pixel < fbi->mach_info->bpp.min)
 201                 var->bits_per_pixel = fbi->mach_info->bpp.min;
 202
 203         /* set r/g/b positions */
 204
 205         if (var->bits_per_pixel == 16) {
 206                 var->red.offset         = 11;
 207                 var->green.offset       = 5;
 208                 var->blue.offset        = 0;
 209                 var->red.length         = 5;
 210                 var->green.length       = 6;
 211                 var->blue.length        = 5;
 212                 var->transp.length      = 0;
 213         } else {
 214                 var->red.length         = var->bits_per_pixel;
 215                 var->red.offset         = 0;
 216                 var->green.length       = var->bits_per_pixel;
 217                 var->green.offset       = 0;
 218                 var->blue.length        = var->bits_per_pixel;
 219                 var->blue.offset        = 0;
 220                 var->transp.length      = 0;
 221         }
 222
 223         return 0;
 224 }
 225
 226 /* s3c2410fb_activate_var
 227  *
 228  * activate (set) the controller from the given framebuffer
 229  * information
 230 */
 231
 232 static void s3c2410fb_activate_var(struct s3c2410fb_info *fbi,
 233                                    struct fb_var_screeninfo *var)
 234 {
 235         fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_MODEMASK;
 236
 237         dprintk("%s: var->xres  = %d\n", __FUNCTION__, var->xres);
 238         dprintk("%s: var->yres  = %d\n", __FUNCTION__, var->yres);
 239         dprintk("%s: var->bpp   = %d\n", __FUNCTION__, var->bits_per_pixel);
 240
 241         switch (var->bits_per_pixel) {
 242         case 1:
 243                 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT1BPP;
 244                 break;
 245         case 2:
 246                 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT2BPP;
 247                 break;
 248         case 4:
 249                 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT4BPP;
 250                 break;
 251         case 8:
 252                 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT8BPP;
 253                 break;
 254         case 16:
 255                 fbi->regs.lcdcon1 |= S3C2410_LCDCON1_TFT16BPP;
 256                 break;
 257         }
 258
 259         /* check to see if we need to update sync/borders */
 260
 261         if (!fbi->mach_info->fixed_syncs) {
 262                 dprintk("setting vert: up=%d, low=%d, sync=%d\n",
 263                         var->upper_margin, var->lower_margin,
 264                         var->vsync_len);
 265
 266                 dprintk("setting horz: lft=%d, rt=%d, sync=%d\n",
 267                         var->left_margin, var->right_margin,
 268                         var->hsync_len);
 269
 270                 fbi->regs.lcdcon2 =
 271                         S3C2410_LCDCON2_VBPD(var->upper_margin - 1) |
 272                         S3C2410_LCDCON2_VFPD(var->lower_margin - 1) |
 273                         S3C2410_LCDCON2_VSPW(var->vsync_len - 1);
 274
 275                 fbi->regs.lcdcon3 =
 276                         S3C2410_LCDCON3_HBPD(var->right_margin - 1) |
 277                         S3C2410_LCDCON3_HFPD(var->left_margin - 1);
 278
 279                 fbi->regs.lcdcon4 &= ~S3C2410_LCDCON4_HSPW(0xff);
 280                 fbi->regs.lcdcon4 |=  S3C2410_LCDCON4_HSPW(var->hsync_len - 1);
 281         }
 282
 283         /* update X/Y info */
 284
 285         fbi->regs.lcdcon2 &= ~S3C2410_LCDCON2_LINEVAL(0x3ff);
 286         fbi->regs.lcdcon2 |=  S3C2410_LCDCON2_LINEVAL(var->yres - 1);
 287
 288         fbi->regs.lcdcon3 &= ~S3C2410_LCDCON3_HOZVAL(0x7ff);
 289         fbi->regs.lcdcon3 |=  S3C2410_LCDCON3_HOZVAL(var->xres - 1);
 290
 291         if (var->pixclock > 0) {
 292                 int clkdiv = s3c2410fb_calc_pixclk(fbi, var->pixclock);
 293
 294                 clkdiv = (clkdiv / 2) -1;
 295                 if (clkdiv < 0)
 296                         clkdiv = 0;
 297
 298                 fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_CLKVAL(0x3ff);
 299                 fbi->regs.lcdcon1 |=  S3C2410_LCDCON1_CLKVAL(clkdiv);
 300         }
 301
 302         /* write new registers */
 303
 304         dprintk("new register set:\n");
 305         dprintk("lcdcon[1] = 0x%08lx\n", fbi->regs.lcdcon1);
 306         dprintk("lcdcon[2] = 0x%08lx\n", fbi->regs.lcdcon2);
 307         dprintk("lcdcon[3] = 0x%08lx\n", fbi->regs.lcdcon3);
 308         dprintk("lcdcon[4] = 0x%08lx\n", fbi->regs.lcdcon4);
 309         dprintk("lcdcon[5] = 0x%08lx\n", fbi->regs.lcdcon5);
 310
 311         writel(fbi->regs.lcdcon1 & ~S3C2410_LCDCON1_ENVID, S3C2410_LCDCON1);
 312         writel(fbi->regs.lcdcon2, S3C2410_LCDCON2);
 313         writel(fbi->regs.lcdcon3, S3C2410_LCDCON3);
 314         writel(fbi->regs.lcdcon4, S3C2410_LCDCON4);
 315         writel(fbi->regs.lcdcon5, S3C2410_LCDCON5);
 316
 317         /* set lcd address pointers */
 318         s3c2410fb_set_lcdaddr(fbi);
 319
 320         writel(fbi->regs.lcdcon1, S3C2410_LCDCON1);
 321 }
 322
 323
 324 /*
 325  *      s3c2410fb_set_par - Optional function. Alters the hardware state.
 326  *      @info: frame buffer structure that represents a single frame buffer
 327  *
 328  */
 329 static int s3c2410fb_set_par(struct fb_info *info)
 330 {
 331         struct s3c2410fb_info *fbi = info->par;
 332         struct fb_var_screeninfo *var = &info->var;
 333
 334         if (var->bits_per_pixel == 16)
 335                 fbi->fb->fix.visual = FB_VISUAL_TRUECOLOR;
 336         else
 337                 fbi->fb->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 338
 339         fbi->fb->fix.line_length     = (var->width*var->bits_per_pixel)/8;
 340
 341         /* activate this new configuration */
 342
 343         s3c2410fb_activate_var(fbi, var);
 344         return 0;
 345 }
 346
 347 static void schedule_palette_update(struct s3c2410fb_info *fbi,
 348                                     unsigned int regno, unsigned int val)
 349 {
 350         unsigned long flags;
 351         unsigned long irqen;
 352
 353         local_irq_save(flags);
 354
 355         fbi->palette_buffer[regno] = val;
 356
 357         if (!fbi->palette_ready) {
 358                 fbi->palette_ready = 1;
 359
 360                 /* enable IRQ */
 361                 irqen = readl(S3C2410_LCDINTMSK);
 362                 irqen &= ~S3C2410_LCDINT_FRSYNC;
 363                 writel(irqen, S3C2410_LCDINTMSK);
 364         }
 365
 366         local_irq_restore(flags);
 367 }
 368
 369 /* from pxafb.c */
 370 static inline unsigned int chan_to_field(unsigned int chan, struct fb_bitfield *bf)
 371 {
 372         chan &= 0xffff;
 373         chan >>= 16 - bf->length;
 374         return chan << bf->offset;
 375 }
 376
 377 static int s3c2410fb_setcolreg(unsigned regno,
 378                                unsigned red, unsigned green, unsigned blue,
 379                                unsigned transp, struct fb_info *info)
 380 {
 381         struct s3c2410fb_info *fbi = info->par;
 382         unsigned int val;
 383
 384         /* dprintk("setcol: regno=%d, rgb=%d,%d,%d\n", regno, red, green, blue); */
 385
 386         switch (fbi->fb->fix.visual) {
 387         case FB_VISUAL_TRUECOLOR:
 388                 /* true-colour, use pseuo-palette */
 389
 390                 if (regno < 16) {
 391                         u32 *pal = fbi->fb->pseudo_palette;
 392
 393                         val  = chan_to_field(red,   &fbi->fb->var.red);
 394                         val |= chan_to_field(green, &fbi->fb->var.green);
 395                         val |= chan_to_field(blue,  &fbi->fb->var.blue);
 396
 397                         pal[regno] = val;
 398                 }
 399                 break;
 400
 401         case FB_VISUAL_PSEUDOCOLOR:
 402                 if (regno < 256) {
 403                         /* currently assume RGB 5-6-5 mode */
 404
 405                         val  = ((red   >>  0) & 0xf800);
 406                         val |= ((green >>  5) & 0x07e0);
 407                         val |= ((blue  >> 11) & 0x001f);
 408
 409                         writel(val, S3C2410_TFTPAL(regno));
 410                         schedule_palette_update(fbi, regno, val);
 411                 }
 412
 413                 break;
 414
 415         default:
 416                 return 1;   /* unknown type */
 417         }
 418
 419         return 0;
 420 }
 421
 422
 423 /**
 424  *      s3c2410fb_blank
 425  *      @blank_mode: the blank mode we want.
 426  *      @info: frame buffer structure that represents a single frame buffer
 427  *
 428  *      Blank the screen if blank_mode != 0, else unblank. Return 0 if
 429  *      blanking succeeded, != 0 if un-/blanking failed due to e.g. a
 430  *      video mode which doesn't support it. Implements VESA suspend
 431  *      and powerdown modes on hardware that supports disabling hsync/vsync:
 432  *      blank_mode == 2: suspend vsync
 433  *      blank_mode == 3: suspend hsync
 434  *      blank_mode == 4: powerdown
 435  *
 436  *      Returns negative errno on error, or zero on success.
 437  *
 438  */
 439 static int s3c2410fb_blank(int blank_mode, struct fb_info *info)
 440 {
 441         dprintk("blank(mode=%d, info=%p)\n", blank_mode, info);
 442
 443         if (mach_info == NULL)
 444                 return -EINVAL;
 445
 446         if (blank_mode == FB_BLANK_UNBLANK)
 447                 writel(0x0, S3C2410_TPAL);
 448         else {
 449                 dprintk("setting TPAL to output 0x000000\n");
 450                 writel(S3C2410_TPAL_EN, S3C2410_TPAL);
 451         }
 452
 453         return 0;
 454 }
 455
 456 static int s3c2410fb_debug_show(struct device *dev, struct device_attribute *attr, char *buf)
 457 {
 458         return snprintf(buf, PAGE_SIZE, "%s\n", debug ? "on" : "off");
 459 }
 460 static int s3c2410fb_debug_store(struct device *dev, struct device_attribute *attr,
 461                                            const char *buf, size_t len)
 462 {
 463         if (mach_info == NULL)
 464                 return -EINVAL;
 465
 466         if (len < 1)
 467                 return -EINVAL;
 468
 469         if (strnicmp(buf, "on", 2) == 0 ||
 470             strnicmp(buf, "1", 1) == 0) {
 471                 debug = 1;
 472                 printk(KERN_DEBUG "s3c2410fb: Debug On");
 473         } else if (strnicmp(buf, "off", 3) == 0 ||
 474                    strnicmp(buf, "0", 1) == 0) {
 475                 debug = 0;
 476                 printk(KERN_DEBUG "s3c2410fb: Debug Off");
 477         } else {
 478                 return -EINVAL;
 479         }
 480
 481         return len;
 482 }
 483
 484
 485 static DEVICE_ATTR(debug, 0666,
 486                    s3c2410fb_debug_show,
 487                    s3c2410fb_debug_store);
 488
 489 static struct fb_ops s3c2410fb_ops = {
 490         .owner          = THIS_MODULE,
 491         .fb_check_var   = s3c2410fb_check_var,
 492         .fb_set_par     = s3c2410fb_set_par,
 493         .fb_blank       = s3c2410fb_blank,
 494         .fb_setcolreg   = s3c2410fb_setcolreg,
 495         .fb_fillrect    = cfb_fillrect,
 496         .fb_copyarea    = cfb_copyarea,
 497         .fb_imageblit   = cfb_imageblit,
 498 };
 499
 500
 501 /*
 502  * s3c2410fb_map_video_memory():
 503  *      Allocates the DRAM memory for the frame buffer.  This buffer is
 504  *      remapped into a non-cached, non-buffered, memory region to
 505  *      allow palette and pixel writes to occur without flushing the
 506  *      cache.  Once this area is remapped, all virtual memory
 507  *      access to the video memory should occur at the new region.
 508  */
 509 static int __init s3c2410fb_map_video_memory(struct s3c2410fb_info *fbi)
 510 {
 511         dprintk("map_video_memory(fbi=%p)\n", fbi);
 512
 513         fbi->map_size = PAGE_ALIGN(fbi->fb->fix.smem_len + PAGE_SIZE);
 514         fbi->map_cpu  = dma_alloc_writecombine(fbi->dev, fbi->map_size,
 515                                                &fbi->map_dma, GFP_KERNEL);
 516
 517         fbi->map_size = fbi->fb->fix.smem_len;
 518
 519         if (fbi->map_cpu) {
 520                 /* prevent initial garbage on screen */
 521                 dprintk("map_video_memory: clear %p:%08x\n",
 522                         fbi->map_cpu, fbi->map_size);
 523                 memset(fbi->map_cpu, 0xf0, fbi->map_size);
 524
 525                 fbi->screen_dma         = fbi->map_dma;
 526                 fbi->fb->screen_base    = fbi->map_cpu;
 527                 fbi->fb->fix.smem_start  = fbi->screen_dma;
 528
 529                 dprintk("map_video_memory: dma=%08x cpu=%p size=%08x\n",
 530                         fbi->map_dma, fbi->map_cpu, fbi->fb->fix.smem_len);
 531         }
 532
 533         return fbi->map_cpu ? 0 : -ENOMEM;
 534 }
 535
 536 static inline void s3c2410fb_unmap_video_memory(struct s3c2410fb_info *fbi)
 537 {
 538         dma_free_writecombine(fbi->dev,fbi->map_size,fbi->map_cpu, fbi->map_dma);
 539 }
 540
 541 static inline void modify_gpio(void __iomem *reg,
 542                                unsigned long set, unsigned long mask)
 543 {
 544         unsigned long tmp;
 545
 546         tmp = readl(reg) & ~mask;
 547         writel(tmp | set, reg);
 548 }
 549
 550
 551 /*
 552  * s3c2410fb_init_registers - Initialise all LCD-related registers
 553  */
 554
 555 static int s3c2410fb_init_registers(struct s3c2410fb_info *fbi)
 556 {
 557         unsigned long flags;
 558
 559         /* Initialise LCD with values from haret */
 560
 561         local_irq_save(flags);
 562
 563         /* modify the gpio(s) with interrupts set (bjd) */
 564
 565         modify_gpio(S3C2410_GPCUP,  mach_info->gpcup,  mach_info->gpcup_mask);
 566         modify_gpio(S3C2410_GPCCON, mach_info->gpccon, mach_info->gpccon_mask);
 567         modify_gpio(S3C2410_GPDUP,  mach_info->gpdup,  mach_info->gpdup_mask);
 568         modify_gpio(S3C2410_GPDCON, mach_info->gpdcon, mach_info->gpdcon_mask);
 569
 570         local_irq_restore(flags);
 571
 572         writel(fbi->regs.lcdcon1, S3C2410_LCDCON1);
 573         writel(fbi->regs.lcdcon2, S3C2410_LCDCON2);
 574         writel(fbi->regs.lcdcon3, S3C2410_LCDCON3);
 575         writel(fbi->regs.lcdcon4, S3C2410_LCDCON4);
 576         writel(fbi->regs.lcdcon5, S3C2410_LCDCON5);
 577
 578         s3c2410fb_set_lcdaddr(fbi);
 579
 580         dprintk("LPCSEL    = 0x%08lx\n", mach_info->lpcsel);
 581         writel(mach_info->lpcsel, S3C2410_LPCSEL);
 582
 583         dprintk("replacing TPAL %08x\n", readl(S3C2410_TPAL));
 584
 585         /* ensure temporary palette disabled */
 586         writel(0x00, S3C2410_TPAL);
 587
 588         /* Enable video by setting the ENVID bit to 1 */
 589         fbi->regs.lcdcon1 |= S3C2410_LCDCON1_ENVID;
 590         writel(fbi->regs.lcdcon1, S3C2410_LCDCON1);
 591         return 0;
 592 }
 593
 594 static void s3c2410fb_write_palette(struct s3c2410fb_info *fbi)
 595 {
 596         unsigned int i;
 597         unsigned long ent;
 598
 599         fbi->palette_ready = 0;
 600
 601         for (i = 0; i < 256; i++) {
 602                 if ((ent = fbi->palette_buffer[i]) == PALETTE_BUFF_CLEAR)
 603                         continue;
 604
 605                 writel(ent, S3C2410_TFTPAL(i));
 606
 607                 /* it seems the only way to know exactly
 608                  * if the palette wrote ok, is to check
 609                  * to see if the value verifies ok
 610                  */
 611
 612                 if (readw(S3C2410_TFTPAL(i)) == ent)
 613                         fbi->palette_buffer[i] = PALETTE_BUFF_CLEAR;
 614                 else
 615                         fbi->palette_ready = 1;   /* retry */
 616         }
 617 }
 618
 619 static irqreturn_t s3c2410fb_irq(int irq, void *dev_id, struct pt_regs *r)
 620 {
 621         struct s3c2410fb_info *fbi = dev_id;
 622         unsigned long lcdirq = readl(S3C2410_LCDINTPND);
 623
 624         if (lcdirq & S3C2410_LCDINT_FRSYNC) {
 625                 if (fbi->palette_ready)
 626                         s3c2410fb_write_palette(fbi);
 627
 628                 writel(S3C2410_LCDINT_FRSYNC, S3C2410_LCDINTPND);
 629                 writel(S3C2410_LCDINT_FRSYNC, S3C2410_LCDSRCPND);
 630         }
 631
 632         return IRQ_HANDLED;
 633 }
 634
 635 static char driver_name[]="s3c2410fb";
 636
 637 static int __init s3c2410fb_probe(struct platform_device *pdev)
 638 {
 639         struct s3c2410fb_info *info;
 640         struct fb_info     *fbinfo;
 641         struct s3c2410fb_hw *mregs;
 642         int ret;
 643         int irq;
 644         int i;
 645
 646         mach_info = pdev->dev.platform_data;
 647         if (mach_info == NULL) {
 648                 dev_err(&pdev->dev,"no platform data for lcd, cannot attach\n");
 649                 return -EINVAL;
 650         }
 651
 652         mregs = &mach_info->regs;
 653
 654         irq = platform_get_irq(pdev, 0);
 655         if (irq < 0) {
 656                 dev_err(&pdev->dev, "no irq for device\n");
 657                 return -ENOENT;
 658         }
 659
 660         fbinfo = framebuffer_alloc(sizeof(struct s3c2410fb_info), &pdev->dev);
 661         if (!fbinfo) {
 662                 return -ENOMEM;
 663         }
 664
 665
 666         info = fbinfo->par;
 667         info->fb = fbinfo;
 668         platform_set_drvdata(pdev, fbinfo);
 669
 670         dprintk("devinit\n");
 671
 672         strcpy(fbinfo->fix.id, driver_name);
 673
 674         memcpy(&info->regs, &mach_info->regs, sizeof(info->regs));
 675
 676         info->mach_info             = pdev->dev.platform_data;
 677
 678         fbinfo->fix.type            = FB_TYPE_PACKED_PIXELS;
 679         fbinfo->fix.type_aux        = 0;
 680         fbinfo->fix.xpanstep        = 0;
 681         fbinfo->fix.ypanstep        = 0;
 682         fbinfo->fix.ywrapstep       = 0;
 683         fbinfo->fix.accel           = FB_ACCEL_NONE;
 684
 685         fbinfo->var.nonstd          = 0;
 686         fbinfo->var.activate        = FB_ACTIVATE_NOW;
 687         fbinfo->var.height          = mach_info->height;
 688         fbinfo->var.width           = mach_info->width;
 689         fbinfo->var.accel_flags     = 0;
 690         fbinfo->var.vmode           = FB_VMODE_NONINTERLACED;
 691
 692         fbinfo->fbops               = &s3c2410fb_ops;
 693         fbinfo->flags               = FBINFO_FLAG_DEFAULT;
 694         fbinfo->pseudo_palette      = &info->pseudo_pal;
 695
 696         fbinfo->var.xres            = mach_info->xres.defval;
 697         fbinfo->var.xres_virtual    = mach_info->xres.defval;
 698         fbinfo->var.yres            = mach_info->yres.defval;
 699         fbinfo->var.yres_virtual    = mach_info->yres.defval;
 700         fbinfo->var.bits_per_pixel  = mach_info->bpp.defval;
 701
 702         fbinfo->var.upper_margin    = S3C2410_LCDCON2_GET_VBPD(mregs->lcdcon2) + 1;
 703         fbinfo->var.lower_margin    = S3C2410_LCDCON2_GET_VFPD(mregs->lcdcon2) + 1;
 704         fbinfo->var.vsync_len       = S3C2410_LCDCON2_GET_VSPW(mregs->lcdcon2) + 1;
 705
 706         fbinfo->var.left_margin     = S3C2410_LCDCON3_GET_HFPD(mregs->lcdcon3) + 1;
 707         fbinfo->var.right_margin    = S3C2410_LCDCON3_GET_HBPD(mregs->lcdcon3) + 1;
 708         fbinfo->var.hsync_len       = S3C2410_LCDCON4_GET_HSPW(mregs->lcdcon4) + 1;
 709
 710         fbinfo->var.red.offset      = 11;
 711         fbinfo->var.green.offset    = 5;
 712         fbinfo->var.blue.offset     = 0;
 713         fbinfo->var.transp.offset   = 0;
 714         fbinfo->var.red.length      = 5;
 715         fbinfo->var.green.length    = 6;
 716         fbinfo->var.blue.length     = 5;
 717         fbinfo->var.transp.length   = 0;
 718         fbinfo->fix.smem_len        =   mach_info->xres.max *
 719                                         mach_info->yres.max *
 720                                         mach_info->bpp.max / 8;
 721
 722         for (i = 0; i < 256; i++)
 723                 info->palette_buffer[i] = PALETTE_BUFF_CLEAR;
 724
 725         if (!request_mem_region((unsigned long)S3C24XX_VA_LCD, SZ_1M, "s3c2410-lcd")) {
 726                 ret = -EBUSY;
 727                 goto dealloc_fb;
 728         }
 729
 730
 731         dprintk("got LCD region\n");
 732
 733         ret = request_irq(irq, s3c2410fb_irq, SA_INTERRUPT, pdev->name, info);
 734         if (ret) {
 735                 dev_err(&pdev->dev, "cannot get irq %d - err %d\n", irq, ret);
 736                 ret = -EBUSY;
 737                 goto release_mem;
 738         }
 739
 740         info->clk = clk_get(NULL, "lcd");
 741         if (!info->clk || IS_ERR(info->clk)) {
 742                 printk(KERN_ERR "failed to get lcd clock source\n");
 743                 ret = -ENOENT;
 744                 goto release_irq;
 745         }
 746
 747         clk_enable(info->clk);
 748         dprintk("got and enabled clock\n");
 749
 750         msleep(1);
 751
 752         /* Initialize video memory */
 753         ret = s3c2410fb_map_video_memory(info);
 754         if (ret) {
 755                 printk( KERN_ERR "Failed to allocate video RAM: %d\n", ret);
 756                 ret = -ENOMEM;
 757                 goto release_clock;
 758         }
 759         dprintk("got video memory\n");
 760
 761         ret = s3c2410fb_init_registers(info);
 762
 763         ret = s3c2410fb_check_var(&fbinfo->var, fbinfo);
 764
 765         ret = register_framebuffer(fbinfo);
 766         if (ret < 0) {
 767                 printk(KERN_ERR "Failed to register framebuffer device: %d\n", ret);
 768                 goto free_video_memory;
 769         }
 770
 771         /* create device files */
 772         device_create_file(&pdev->dev, &dev_attr_debug);
 773
 774         printk(KERN_INFO "fb%d: %s frame buffer device\n",
 775                 fbinfo->node, fbinfo->fix.id);
 776
 777         return 0;
 778
 779 free_video_memory:
 780         s3c2410fb_unmap_video_memory(info);
 781 release_clock:
 782         clk_disable(info->clk);
 783         clk_put(info->clk);
 784 release_irq:
 785         free_irq(irq,info);
 786 release_mem:
 787         release_mem_region((unsigned long)S3C24XX_VA_LCD, S3C24XX_SZ_LCD);
 788 dealloc_fb:
 789         framebuffer_release(fbinfo);
 790         return ret;
 791 }
 792
 793 /* s3c2410fb_stop_lcd
 794  *
 795  * shutdown the lcd controller
 796 */
 797
 798 static void s3c2410fb_stop_lcd(void)
 799 {
 800         unsigned long flags;
 801         unsigned long tmp;
 802
 803         local_irq_save(flags);
 804
 805         tmp = readl(S3C2410_LCDCON1);
 806         writel(tmp & ~S3C2410_LCDCON1_ENVID, S3C2410_LCDCON1);
 807
 808         local_irq_restore(flags);
 809 }
 810
 811 /*
 812  *  Cleanup
 813  */
 814 static int s3c2410fb_remove(struct platform_device *pdev)
 815 {
 816         struct fb_info     *fbinfo = platform_get_drvdata(pdev);
 817         struct s3c2410fb_info *info = fbinfo->par;
 818         int irq;
 819
 820         s3c2410fb_stop_lcd();
 821         msleep(1);
 822
 823         s3c2410fb_unmap_video_memory(info);
 824
 825         if (info->clk) {
 826                 clk_disable(info->clk);
 827                 clk_put(info->clk);
 828                 info->clk = NULL;
 829         }
 830
 831         irq = platform_get_irq(pdev, 0);
 832         free_irq(irq,info);
 833         release_mem_region((unsigned long)S3C24XX_VA_LCD, S3C24XX_SZ_LCD);
 834         unregister_framebuffer(fbinfo);
 835
 836         return 0;
 837 }
 838
 839 #ifdef CONFIG_PM
 840
 841 /* suspend and resume support for the lcd controller */
 842
 843 static int s3c2410fb_suspend(struct platform_device *dev, pm_message_t state)
 844 {
 845         struct fb_info     *fbinfo = platform_get_drvdata(dev);
 846         struct s3c2410fb_info *info = fbinfo->par;
 847
 848         s3c2410fb_stop_lcd();
 849
 850         /* sleep before disabling the clock, we need to ensure
 851          * the LCD DMA engine is not going to get back on the bus
 852          * before the clock goes off again (bjd) */
 853
 854         msleep(1);
 855         clk_disable(info->clk);
 856
 857         return 0;
 858 }
 859
 860 static int s3c2410fb_resume(struct platform_device *dev)
 861 {
 862         struct fb_info     *fbinfo = platform_get_drvdata(dev);
 863         struct s3c2410fb_info *info = fbinfo->par;
 864
 865         clk_enable(info->clk);
 866         msleep(1);
 867
 868         s3c2410fb_init_registers(info);
 869
 870         return 0;
 871 }
 872
 873 #else
 874 #define s3c2410fb_suspend NULL
 875 #define s3c2410fb_resume  NULL
 876 #endif
 877
 878 static struct platform_driver s3c2410fb_driver = {
 879         .probe          = s3c2410fb_probe,
 880         .remove         = s3c2410fb_remove,
 881         .suspend        = s3c2410fb_suspend,
 882         .resume         = s3c2410fb_resume,
 883         .driver         = {
 884                 .name   = "s3c2410-lcd",
 885                 .owner  = THIS_MODULE,
 886         },
 887 };
 888
 889 int __devinit s3c2410fb_init(void)
 890 {
 891         return platform_driver_register(&s3c2410fb_driver);
 892 }
 893
 894 static void __exit s3c2410fb_cleanup(void)
 895 {
 896         platform_driver_unregister(&s3c2410fb_driver);
 897 }
 898
 899
 900 module_init(s3c2410fb_init);
 901 module_exit(s3c2410fb_cleanup);
 902
 903 MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>, Ben Dooks <ben-linux@fluff.org>");
 904 MODULE_DESCRIPTION("Framebuffer driver for the s3c2410");
 905 MODULE_LICENSE("GPL");