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[PATCH] fix u32 vs. pm_message_t in drivers/
[linux-3.10.git] / drivers / serial / vr41xx_siu.c
1 /*
2  *  Driver for NEC VR4100 series Serial Interface Unit.
3  *
4  *  Copyright (C) 2004-2005  Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
5  *
6  *  Based on drivers/serial/8250.c, by Russell King.
7  *
8  *  This program is free software; you can redistribute it and/or modify
9  *  it under the terms of the GNU General Public License as published by
10  *  the Free Software Foundation; either version 2 of the License, or
11  *  (at your option) any later version.
12  *
13  *  This program is distributed in the hope that it will be useful,
14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *  GNU General Public License for more details.
17  *
18  *  You should have received a copy of the GNU General Public License
19  *  along with this program; if not, write to the Free Software
20  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21  */
22 #include <linux/config.h>
23
24 #if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
25 #define SUPPORT_SYSRQ
26 #endif
27
28 #include <linux/console.h>
29 #include <linux/device.h>
30 #include <linux/err.h>
31 #include <linux/ioport.h>
32 #include <linux/init.h>
33 #include <linux/interrupt.h>
34 #include <linux/module.h>
35 #include <linux/serial.h>
36 #include <linux/serial_core.h>
37 #include <linux/serial_reg.h>
38 #include <linux/tty.h>
39 #include <linux/tty_flip.h>
40
41 #include <asm/io.h>
42 #include <asm/vr41xx/siu.h>
43 #include <asm/vr41xx/vr41xx.h>
44
45 #define SIU_PORTS_MAX   2
46 #define SIU_BAUD_BASE   1152000
47 #define SIU_MAJOR       204
48 #define SIU_MINOR_BASE  82
49
50 #define RX_MAX_COUNT    256
51 #define TX_MAX_COUNT    15
52
53 #define SIUIRSEL        0x08
54  #define TMICMODE       0x20
55  #define TMICTX         0x10
56  #define IRMSEL         0x0c
57  #define IRMSEL_HP      0x08
58  #define IRMSEL_TEMIC   0x04
59  #define IRMSEL_SHARP   0x00
60  #define IRUSESEL       0x02
61  #define SIRSEL         0x01
62
63 struct siu_port {
64         unsigned int type;
65         unsigned int irq;
66         unsigned long start;
67 };
68
69 static const struct siu_port siu_type1_ports[] = {
70         {       .type           = PORT_VR41XX_SIU,
71                 .irq            = SIU_IRQ,
72                 .start          = 0x0c000000UL,         },
73 };
74
75 #define SIU_TYPE1_NR_PORTS      (sizeof(siu_type1_ports) / sizeof(struct siu_port))
76
77 static const struct siu_port siu_type2_ports[] = {
78         {       .type           = PORT_VR41XX_SIU,
79                 .irq            = SIU_IRQ,
80                 .start          = 0x0f000800UL,         },
81         {       .type           = PORT_VR41XX_DSIU,
82                 .irq            = DSIU_IRQ,
83                 .start          = 0x0f000820UL,         },
84 };
85
86 #define SIU_TYPE2_NR_PORTS      (sizeof(siu_type2_ports) / sizeof(struct siu_port))
87
88 static struct uart_port siu_uart_ports[SIU_PORTS_MAX];
89 static uint8_t lsr_break_flag[SIU_PORTS_MAX];
90
91 #define siu_read(port, offset)          readb((port)->membase + (offset))
92 #define siu_write(port, offset, value)  writeb((value), (port)->membase + (offset))
93
94 void vr41xx_select_siu_interface(siu_interface_t interface)
95 {
96         struct uart_port *port;
97         unsigned long flags;
98         uint8_t irsel;
99
100         port = &siu_uart_ports[0];
101
102         spin_lock_irqsave(&port->lock, flags);
103
104         irsel = siu_read(port, SIUIRSEL);
105         if (interface == SIU_INTERFACE_IRDA)
106                 irsel |= SIRSEL;
107         else
108                 irsel &= ~SIRSEL;
109         siu_write(port, SIUIRSEL, irsel);
110
111         spin_unlock_irqrestore(&port->lock, flags);
112 }
113
114 EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
115
116 void vr41xx_use_irda(irda_use_t use)
117 {
118         struct uart_port *port;
119         unsigned long flags;
120         uint8_t irsel;
121
122         port = &siu_uart_ports[0];
123
124         spin_lock_irqsave(&port->lock, flags);
125
126         irsel = siu_read(port, SIUIRSEL);
127         if (use == FIR_USE_IRDA)
128                 irsel |= IRUSESEL;
129         else
130                 irsel &= ~IRUSESEL;
131         siu_write(port, SIUIRSEL, irsel);
132
133         spin_unlock_irqrestore(&port->lock, flags);
134 }
135
136 EXPORT_SYMBOL_GPL(vr41xx_use_irda);
137
138 void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
139 {
140         struct uart_port *port;
141         unsigned long flags;
142         uint8_t irsel;
143
144         port = &siu_uart_ports[0];
145
146         spin_lock_irqsave(&port->lock, flags);
147
148         irsel = siu_read(port, SIUIRSEL);
149         irsel &= ~(IRMSEL | TMICTX | TMICMODE);
150         switch (module) {
151         case SHARP_IRDA:
152                 irsel |= IRMSEL_SHARP;
153                 break;
154         case TEMIC_IRDA:
155                 irsel |= IRMSEL_TEMIC | TMICMODE;
156                 if (speed == IRDA_TX_4MBPS)
157                         irsel |= TMICTX;
158                 break;
159         case HP_IRDA:
160                 irsel |= IRMSEL_HP;
161                 break;
162         default:
163                 break;
164         }
165         siu_write(port, SIUIRSEL, irsel);
166
167         spin_unlock_irqrestore(&port->lock, flags);
168 }
169
170 EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
171
172 static inline void siu_clear_fifo(struct uart_port *port)
173 {
174         siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
175         siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
176                                   UART_FCR_CLEAR_XMIT);
177         siu_write(port, UART_FCR, 0);
178 }
179
180 static inline int siu_probe_ports(void)
181 {
182         switch (current_cpu_data.cputype) {
183         case CPU_VR4111:
184         case CPU_VR4121:
185                 return SIU_TYPE1_NR_PORTS;
186         case CPU_VR4122:
187         case CPU_VR4131:
188         case CPU_VR4133:
189                 return SIU_TYPE2_NR_PORTS;
190         }
191
192         return 0;
193 }
194
195 static inline unsigned long siu_port_size(struct uart_port *port)
196 {
197         switch (port->type) {
198         case PORT_VR41XX_SIU:
199                 return 11UL;
200         case PORT_VR41XX_DSIU:
201                 return 8UL;
202         }
203
204         return 0;
205 }
206
207 static inline unsigned int siu_check_type(struct uart_port *port)
208 {
209         switch (current_cpu_data.cputype) {
210         case CPU_VR4111:
211         case CPU_VR4121:
212                 if (port->line == 0)
213                         return PORT_VR41XX_SIU;
214                 break;
215         case CPU_VR4122:
216         case CPU_VR4131:
217         case CPU_VR4133:
218                 if (port->line == 0)
219                         return PORT_VR41XX_SIU;
220                 else if (port->line == 1)
221                         return PORT_VR41XX_DSIU;
222                 break;
223         }
224
225         return PORT_UNKNOWN;
226 }
227
228 static inline const char *siu_type_name(struct uart_port *port)
229 {
230         switch (port->type) {
231         case PORT_VR41XX_SIU:
232                 return "SIU";
233         case PORT_VR41XX_DSIU:
234                 return "DSIU";
235         }
236
237         return "unknown";
238 }
239
240 static unsigned int siu_tx_empty(struct uart_port *port)
241 {
242         uint8_t lsr;
243
244         lsr = siu_read(port, UART_LSR);
245         if (lsr & UART_LSR_TEMT)
246                 return TIOCSER_TEMT;
247
248         return 0;
249 }
250
251 static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
252 {
253         uint8_t mcr = 0;
254
255         if (mctrl & TIOCM_DTR)
256                 mcr |= UART_MCR_DTR;
257         if (mctrl & TIOCM_RTS)
258                 mcr |= UART_MCR_RTS;
259         if (mctrl & TIOCM_OUT1)
260                 mcr |= UART_MCR_OUT1;
261         if (mctrl & TIOCM_OUT2)
262                 mcr |= UART_MCR_OUT2;
263         if (mctrl & TIOCM_LOOP)
264                 mcr |= UART_MCR_LOOP;
265
266         siu_write(port, UART_MCR, mcr);
267 }
268
269 static unsigned int siu_get_mctrl(struct uart_port *port)
270 {
271         uint8_t msr;
272         unsigned int mctrl = 0;
273
274         msr = siu_read(port, UART_MSR);
275         if (msr & UART_MSR_DCD)
276                 mctrl |= TIOCM_CAR;
277         if (msr & UART_MSR_RI)
278                 mctrl |= TIOCM_RNG;
279         if (msr & UART_MSR_DSR)
280                 mctrl |= TIOCM_DSR;
281         if (msr & UART_MSR_CTS)
282                 mctrl |= TIOCM_CTS;
283
284         return mctrl;
285 }
286
287 static void siu_stop_tx(struct uart_port *port, unsigned int tty_stop)
288 {
289         unsigned long flags;
290         uint8_t ier;
291
292         spin_lock_irqsave(&port->lock, flags);
293
294         ier = siu_read(port, UART_IER);
295         ier &= ~UART_IER_THRI;
296         siu_write(port, UART_IER, ier);
297
298         spin_unlock_irqrestore(&port->lock, flags);
299 }
300
301 static void siu_start_tx(struct uart_port *port, unsigned int tty_start)
302 {
303         unsigned long flags;
304         uint8_t ier;
305
306         spin_lock_irqsave(&port->lock, flags);
307
308         ier = siu_read(port, UART_IER);
309         ier |= UART_IER_THRI;
310         siu_write(port, UART_IER, ier);
311
312         spin_unlock_irqrestore(&port->lock, flags);
313 }
314
315 static void siu_stop_rx(struct uart_port *port)
316 {
317         unsigned long flags;
318         uint8_t ier;
319
320         spin_lock_irqsave(&port->lock, flags);
321
322         ier = siu_read(port, UART_IER);
323         ier &= ~UART_IER_RLSI;
324         siu_write(port, UART_IER, ier);
325
326         port->read_status_mask &= ~UART_LSR_DR;
327
328         spin_unlock_irqrestore(&port->lock, flags);
329 }
330
331 static void siu_enable_ms(struct uart_port *port)
332 {
333         unsigned long flags;
334         uint8_t ier;
335
336         spin_lock_irqsave(&port->lock, flags);
337
338         ier = siu_read(port, UART_IER);
339         ier |= UART_IER_MSI;
340         siu_write(port, UART_IER, ier);
341
342         spin_unlock_irqrestore(&port->lock, flags);
343 }
344
345 static void siu_break_ctl(struct uart_port *port, int ctl)
346 {
347         unsigned long flags;
348         uint8_t lcr;
349
350         spin_lock_irqsave(&port->lock, flags);
351
352         lcr = siu_read(port, UART_LCR);
353         if (ctl == -1)
354                 lcr |= UART_LCR_SBC;
355         else
356                 lcr &= ~UART_LCR_SBC;
357         siu_write(port, UART_LCR, lcr);
358
359         spin_unlock_irqrestore(&port->lock, flags);
360 }
361
362 static inline void receive_chars(struct uart_port *port, uint8_t *status,
363                                  struct pt_regs *regs)
364 {
365         struct tty_struct *tty;
366         uint8_t lsr, ch;
367         char flag;
368         int max_count = RX_MAX_COUNT;
369
370         tty = port->info->tty;
371         lsr = *status;
372
373         do {
374                 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
375                         if (tty->low_latency)
376                                 tty_flip_buffer_push(tty);
377                 }
378
379                 ch = siu_read(port, UART_RX);
380                 port->icount.rx++;
381                 flag = TTY_NORMAL;
382
383 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
384                 lsr |= lsr_break_flag[port->line];
385                 lsr_break_flag[port->line] = 0;
386 #endif
387                 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
388                                     UART_LSR_PE | UART_LSR_OE))) {
389                         if (lsr & UART_LSR_BI) {
390                                 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
391                                 port->icount.brk++;
392
393                                 if (uart_handle_break(port))
394                                         goto ignore_char;
395                         }
396
397                         if (lsr & UART_LSR_FE)
398                                 port->icount.frame++;
399                         if (lsr & UART_LSR_PE)
400                                 port->icount.parity++;
401                         if (lsr & UART_LSR_OE)
402                                 port->icount.overrun++;
403
404                         lsr &= port->read_status_mask;
405                         if (lsr & UART_LSR_BI)
406                                 flag = TTY_BREAK;
407                         if (lsr & UART_LSR_FE)
408                                 flag = TTY_FRAME;
409                         if (lsr & UART_LSR_PE)
410                                 flag = TTY_PARITY;
411                 }
412
413                 if (uart_handle_sysrq_char(port, ch, regs))
414                         goto ignore_char;
415                 if ((lsr & port->ignore_status_mask) == 0)
416                         tty_insert_flip_char(tty, ch, flag);
417                 if ((lsr & UART_LSR_OE) && (tty->flip.count < TTY_FLIPBUF_SIZE))
418                         tty_insert_flip_char(tty, 0, TTY_OVERRUN);
419
420         ignore_char:
421                 lsr = siu_read(port, UART_LSR);
422         } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
423
424         tty_flip_buffer_push(tty);
425
426         *status = lsr;
427 }
428
429 static inline void check_modem_status(struct uart_port *port)
430 {
431         uint8_t msr;
432
433         msr = siu_read(port, UART_MSR);
434         if ((msr & UART_MSR_ANY_DELTA) == 0)
435                 return;
436         if (msr & UART_MSR_DDCD)
437                 uart_handle_dcd_change(port, msr & UART_MSR_DCD);
438         if (msr & UART_MSR_TERI)
439                 port->icount.rng++;
440         if (msr & UART_MSR_DDSR)
441                 port->icount.dsr++;
442         if (msr & UART_MSR_DCTS)
443                 uart_handle_cts_change(port, msr & UART_MSR_CTS);
444
445         wake_up_interruptible(&port->info->delta_msr_wait);
446 }
447
448 static inline void transmit_chars(struct uart_port *port)
449 {
450         struct circ_buf *xmit;
451         int max_count = TX_MAX_COUNT;
452
453         xmit = &port->info->xmit;
454
455         if (port->x_char) {
456                 siu_write(port, UART_TX, port->x_char);
457                 port->icount.tx++;
458                 port->x_char = 0;
459                 return;
460         }
461
462         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
463                 siu_stop_tx(port, 0);
464                 return;
465         }
466
467         do {
468                 siu_write(port, UART_TX, xmit->buf[xmit->tail]);
469                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
470                 port->icount.tx++;
471                 if (uart_circ_empty(xmit))
472                         break;
473         } while (max_count-- > 0);
474
475         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
476                 uart_write_wakeup(port);
477
478         if (uart_circ_empty(xmit))
479                 siu_stop_tx(port, 0);
480 }
481
482 static irqreturn_t siu_interrupt(int irq, void *dev_id, struct pt_regs *regs)
483 {
484         struct uart_port *port;
485         uint8_t iir, lsr;
486
487         if (dev_id == NULL)
488                 return IRQ_NONE;
489
490         port = (struct uart_port *)dev_id;
491
492         iir = siu_read(port, UART_IIR);
493         if (iir & UART_IIR_NO_INT)
494                 return IRQ_NONE;
495
496         lsr = siu_read(port, UART_LSR);
497         if (lsr & UART_LSR_DR)
498                 receive_chars(port, &lsr, regs);
499
500         check_modem_status(port);
501
502         if (lsr & UART_LSR_THRE)
503                 transmit_chars(port);
504
505         return IRQ_HANDLED;
506 }
507
508 static int siu_startup(struct uart_port *port)
509 {
510         int retval;
511
512         siu_clear_fifo(port);
513
514         (void)siu_read(port, UART_LSR);
515         (void)siu_read(port, UART_RX);
516         (void)siu_read(port, UART_IIR);
517         (void)siu_read(port, UART_MSR);
518
519         if (siu_read(port, UART_LSR) == 0xff)
520                 return -ENODEV;
521
522         retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
523         if (retval)
524                 return retval;
525
526         if (port->type == PORT_VR41XX_DSIU)
527                 vr41xx_enable_dsiuint(DSIUINT_ALL);
528
529         siu_write(port, UART_LCR, UART_LCR_WLEN8);
530
531         spin_lock_irq(&port->lock);
532         siu_set_mctrl(port, port->mctrl);
533         spin_unlock_irq(&port->lock);
534
535         siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
536
537         (void)siu_read(port, UART_LSR);
538         (void)siu_read(port, UART_RX);
539         (void)siu_read(port, UART_IIR);
540         (void)siu_read(port, UART_MSR);
541
542         return 0;
543 }
544
545 static void siu_shutdown(struct uart_port *port)
546 {
547         unsigned long flags;
548         uint8_t lcr;
549
550         if (port->membase == NULL)
551                 return;
552
553         siu_write(port, UART_IER, 0);
554
555         spin_lock_irqsave(&port->lock, flags);
556
557         port->mctrl &= ~TIOCM_OUT2;
558         siu_set_mctrl(port, port->mctrl);
559
560         spin_unlock_irqrestore(&port->lock, flags);
561
562         lcr = siu_read(port, UART_LCR);
563         lcr &= ~UART_LCR_SBC;
564         siu_write(port, UART_LCR, lcr);
565
566         siu_clear_fifo(port);
567
568         (void)siu_read(port, UART_RX);
569
570         if (port->type == PORT_VR41XX_DSIU)
571                 vr41xx_disable_dsiuint(DSIUINT_ALL);
572
573         free_irq(port->irq, port);
574 }
575
576 static void siu_set_termios(struct uart_port *port, struct termios *new,
577                             struct termios *old)
578 {
579         tcflag_t c_cflag, c_iflag;
580         uint8_t lcr, fcr, ier;
581         unsigned int baud, quot;
582         unsigned long flags;
583
584         c_cflag = new->c_cflag;
585         switch (c_cflag & CSIZE) {
586         case CS5:
587                 lcr = UART_LCR_WLEN5;
588                 break;
589         case CS6:
590                 lcr = UART_LCR_WLEN6;
591                 break;
592         case CS7:
593                 lcr = UART_LCR_WLEN7;
594                 break;
595         default:
596                 lcr = UART_LCR_WLEN8;
597                 break;
598         }
599
600         if (c_cflag & CSTOPB)
601                 lcr |= UART_LCR_STOP;
602         if (c_cflag & PARENB)
603                 lcr |= UART_LCR_PARITY;
604         if ((c_cflag & PARODD) != PARODD)
605                 lcr |= UART_LCR_EPAR;
606         if (c_cflag & CMSPAR)
607                 lcr |= UART_LCR_SPAR;
608
609         baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
610         quot = uart_get_divisor(port, baud);
611
612         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
613
614         spin_lock_irqsave(&port->lock, flags);
615
616         uart_update_timeout(port, c_cflag, baud);
617
618         c_iflag = new->c_iflag;
619
620         port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
621         if (c_iflag & INPCK)
622                 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
623         if (c_iflag & (BRKINT | PARMRK))
624                 port->read_status_mask |= UART_LSR_BI;
625
626         port->ignore_status_mask = 0;
627         if (c_iflag & IGNPAR)
628                 port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
629         if (c_iflag & IGNBRK) {
630                 port->ignore_status_mask |= UART_LSR_BI;
631                 if (c_iflag & IGNPAR)
632                         port->ignore_status_mask |= UART_LSR_OE;
633         }
634
635         if ((c_cflag & CREAD) == 0)
636                 port->ignore_status_mask |= UART_LSR_DR;
637
638         ier = siu_read(port, UART_IER);
639         ier &= ~UART_IER_MSI;
640         if (UART_ENABLE_MS(port, c_cflag))
641                 ier |= UART_IER_MSI;
642         siu_write(port, UART_IER, ier);
643
644         siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
645
646         siu_write(port, UART_DLL, (uint8_t)quot);
647         siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
648
649         siu_write(port, UART_LCR, lcr);
650
651         siu_write(port, UART_FCR, fcr);
652
653         siu_set_mctrl(port, port->mctrl);
654
655         spin_unlock_irqrestore(&port->lock, flags);
656 }
657
658 static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
659 {
660         switch (state) {
661         case 0:
662                 switch (port->type) {
663                 case PORT_VR41XX_SIU:
664                         vr41xx_supply_clock(SIU_CLOCK);
665                         break;
666                 case PORT_VR41XX_DSIU:
667                         vr41xx_supply_clock(DSIU_CLOCK);
668                         break;
669                 }
670                 break;
671         case 3:
672                 switch (port->type) {
673                 case PORT_VR41XX_SIU:
674                         vr41xx_mask_clock(SIU_CLOCK);
675                         break;
676                 case PORT_VR41XX_DSIU:
677                         vr41xx_mask_clock(DSIU_CLOCK);
678                         break;
679                 }
680                 break;
681         }
682 }
683
684 static const char *siu_type(struct uart_port *port)
685 {
686         return siu_type_name(port);
687 }
688
689 static void siu_release_port(struct uart_port *port)
690 {
691         unsigned long size;
692
693         if (port->flags & UPF_IOREMAP) {
694                 iounmap(port->membase);
695                 port->membase = NULL;
696         }
697
698         size = siu_port_size(port);
699         release_mem_region(port->mapbase, size);
700 }
701
702 static int siu_request_port(struct uart_port *port)
703 {
704         unsigned long size;
705         struct resource *res;
706
707         size = siu_port_size(port);
708         res = request_mem_region(port->mapbase, size, siu_type_name(port));
709         if (res == NULL)
710                 return -EBUSY;
711
712         if (port->flags & UPF_IOREMAP) {
713                 port->membase = ioremap(port->mapbase, size);
714                 if (port->membase == NULL) {
715                         release_resource(res);
716                         return -ENOMEM;
717                 }
718         }
719
720         return 0;
721 }
722
723 static void siu_config_port(struct uart_port *port, int flags)
724 {
725         if (flags & UART_CONFIG_TYPE) {
726                 port->type = siu_check_type(port);
727                 (void)siu_request_port(port);
728         }
729 }
730
731 static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
732 {
733         if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
734                 return -EINVAL;
735         if (port->irq != serial->irq)
736                 return -EINVAL;
737         if (port->iotype != serial->io_type)
738                 return -EINVAL;
739         if (port->mapbase != (unsigned long)serial->iomem_base)
740                 return -EINVAL;
741
742         return 0;
743 }
744
745 static struct uart_ops siu_uart_ops = {
746         .tx_empty       = siu_tx_empty,
747         .set_mctrl      = siu_set_mctrl,
748         .get_mctrl      = siu_get_mctrl,
749         .stop_tx        = siu_stop_tx,
750         .start_tx       = siu_start_tx,
751         .stop_rx        = siu_stop_rx,
752         .enable_ms      = siu_enable_ms,
753         .break_ctl      = siu_break_ctl,
754         .startup        = siu_startup,
755         .shutdown       = siu_shutdown,
756         .set_termios    = siu_set_termios,
757         .pm             = siu_pm,
758         .type           = siu_type,
759         .release_port   = siu_release_port,
760         .request_port   = siu_request_port,
761         .config_port    = siu_config_port,
762         .verify_port    = siu_verify_port,
763 };
764
765 static int siu_init_ports(void)
766 {
767         const struct siu_port *siu;
768         struct uart_port *port;
769         int i, num;
770
771         switch (current_cpu_data.cputype) {
772         case CPU_VR4111:
773         case CPU_VR4121:
774                 siu = siu_type1_ports;
775                 break;
776         case CPU_VR4122:
777         case CPU_VR4131:
778         case CPU_VR4133:
779                 siu = siu_type2_ports;
780                 break;
781         default:
782                 return 0;
783         }
784
785         port = siu_uart_ports;
786         num = siu_probe_ports();
787         for (i = 0; i < num; i++) {
788                 spin_lock_init(&port->lock);
789                 port->irq = siu->irq;
790                 port->uartclk = SIU_BAUD_BASE * 16;
791                 port->fifosize = 16;
792                 port->regshift = 0;
793                 port->iotype = UPIO_MEM;
794                 port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
795                 port->type = siu->type;
796                 port->line = i;
797                 port->mapbase = siu->start;
798                 siu++;
799                 port++;
800         }
801
802         return num;
803 }
804
805 #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
806
807 static void early_set_termios(struct uart_port *port, struct termios *new,
808                               struct termios *old)
809 {
810         tcflag_t c_cflag;
811         uint8_t lcr;
812         unsigned int baud, quot;
813
814         c_cflag = new->c_cflag;
815         switch (c_cflag & CSIZE) {
816         case CS5:
817                 lcr = UART_LCR_WLEN5;
818                 break;
819         case CS6:
820                 lcr = UART_LCR_WLEN6;
821                 break;
822         case CS7:
823                 lcr = UART_LCR_WLEN7;
824                 break;
825         default:
826                 lcr = UART_LCR_WLEN8;
827                 break;
828         }
829
830         if (c_cflag & CSTOPB)
831                 lcr |= UART_LCR_STOP;
832         if (c_cflag & PARENB)
833                 lcr |= UART_LCR_PARITY;
834         if ((c_cflag & PARODD) != PARODD)
835                 lcr |= UART_LCR_EPAR;
836         if (c_cflag & CMSPAR)
837                 lcr |= UART_LCR_SPAR;
838
839         baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
840         quot = uart_get_divisor(port, baud);
841
842         siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
843
844         siu_write(port, UART_DLL, (uint8_t)quot);
845         siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
846
847         siu_write(port, UART_LCR, lcr);
848 }
849
850 static struct uart_ops early_uart_ops = {
851         .set_termios    = early_set_termios,
852 };
853
854 #define BOTH_EMPTY      (UART_LSR_TEMT | UART_LSR_THRE)
855
856 static void wait_for_xmitr(struct uart_port *port)
857 {
858         int timeout = 10000;
859         uint8_t lsr, msr;
860
861         do {
862                 lsr = siu_read(port, UART_LSR);
863                 if (lsr & UART_LSR_BI)
864                         lsr_break_flag[port->line] = UART_LSR_BI;
865
866                 if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
867                         break;
868         } while (timeout-- > 0);
869
870         if (port->flags & UPF_CONS_FLOW) {
871                 timeout = 1000000;
872
873                 do {
874                         msr = siu_read(port, UART_MSR);
875                         if ((msr & UART_MSR_CTS) != 0)
876                                 break;
877                 } while (timeout-- > 0);
878         }
879 }
880
881 static void siu_console_write(struct console *con, const char *s, unsigned count)
882 {
883         struct uart_port *port;
884         uint8_t ier;
885         unsigned i;
886
887         port = &siu_uart_ports[con->index];
888
889         ier = siu_read(port, UART_IER);
890         siu_write(port, UART_IER, 0);
891
892         for (i = 0; i < count && *s != '\0'; i++, s++) {
893                 wait_for_xmitr(port);
894                 siu_write(port, UART_TX, *s);
895                 if (*s == '\n') {
896                         wait_for_xmitr(port);
897                         siu_write(port, UART_TX, '\r');
898                 }
899         }
900
901         wait_for_xmitr(port);
902         siu_write(port, UART_IER, ier);
903 }
904
905 static int siu_console_setup(struct console *con, char *options)
906 {
907         struct uart_port *port;
908         int baud = 9600;
909         int parity = 'n';
910         int bits = 8;
911         int flow = 'n';
912
913         if (con->index >= SIU_PORTS_MAX)
914                 con->index = 0;
915
916         port = &siu_uart_ports[con->index];
917         if (port->membase == NULL) {
918                 if (port->mapbase == 0)
919                         return -ENODEV;
920                 port->membase = (unsigned char __iomem *)KSEG1ADDR(port->mapbase);
921         }
922
923         vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
924
925         if (options != NULL)
926                 uart_parse_options(options, &baud, &parity, &bits, &flow);
927
928         return uart_set_options(port, con, baud, parity, bits, flow);
929 }
930
931 static struct uart_driver siu_uart_driver;
932
933 static struct console siu_console = {
934         .name   = "ttyVR",
935         .write  = siu_console_write,
936         .device = uart_console_device,
937         .setup  = siu_console_setup,
938         .flags  = CON_PRINTBUFFER,
939         .index  = -1,
940         .data   = &siu_uart_driver,
941 };
942
943 static int __devinit siu_console_init(void)
944 {
945         struct uart_port *port;
946         int num, i;
947
948         num = siu_init_ports();
949         if (num <= 0)
950                 return -ENODEV;
951
952         for (i = 0; i < num; i++) {
953                 port = &siu_uart_ports[i];
954                 port->ops = &early_uart_ops;
955         }
956
957         register_console(&siu_console);
958
959         return 0;
960 }
961
962 console_initcall(siu_console_init);
963
964 #define SERIAL_VR41XX_CONSOLE   &siu_console
965 #else
966 #define SERIAL_VR41XX_CONSOLE   NULL
967 #endif
968
969 static struct uart_driver siu_uart_driver = {
970         .owner          = THIS_MODULE,
971         .driver_name    = "SIU",
972         .dev_name       = "ttyVR",
973         .devfs_name     = "ttvr/",
974         .major          = SIU_MAJOR,
975         .minor          = SIU_MINOR_BASE,
976         .cons           = SERIAL_VR41XX_CONSOLE,
977 };
978
979 static int siu_probe(struct device *dev)
980 {
981         struct uart_port *port;
982         int num, i, retval;
983
984         num = siu_init_ports();
985         if (num <= 0)
986                 return -ENODEV;
987
988         siu_uart_driver.nr = num;
989         retval = uart_register_driver(&siu_uart_driver);
990         if (retval)
991                 return retval;
992
993         for (i = 0; i < num; i++) {
994                 port = &siu_uart_ports[i];
995                 port->ops = &siu_uart_ops;
996                 port->dev = dev;
997
998                 retval = uart_add_one_port(&siu_uart_driver, port);
999                 if (retval)
1000                         break;
1001         }
1002
1003         if (i == 0 && retval < 0) {
1004                 uart_unregister_driver(&siu_uart_driver);
1005                 return retval;
1006         }
1007
1008         return 0;
1009 }
1010
1011 static int siu_remove(struct device *dev)
1012 {
1013         struct uart_port *port;
1014         int i;
1015
1016         for (i = 0; i < siu_uart_driver.nr; i++) {
1017                 port = &siu_uart_ports[i];
1018                 if (port->dev == dev) {
1019                         uart_remove_one_port(&siu_uart_driver, port);
1020                         port->dev = NULL;
1021                 }
1022         }
1023
1024         uart_unregister_driver(&siu_uart_driver);
1025
1026         return 0;
1027 }
1028
1029 static int siu_suspend(struct device *dev, pm_message_t state, u32 level)
1030 {
1031         struct uart_port *port;
1032         int i;
1033
1034         if (level != SUSPEND_DISABLE)
1035                 return 0;
1036
1037         for (i = 0; i < siu_uart_driver.nr; i++) {
1038                 port = &siu_uart_ports[i];
1039                 if ((port->type == PORT_VR41XX_SIU ||
1040                      port->type == PORT_VR41XX_DSIU) && port->dev == dev)
1041                         uart_suspend_port(&siu_uart_driver, port);
1042
1043         }
1044
1045         return 0;
1046 }
1047
1048 static int siu_resume(struct device *dev, u32 level)
1049 {
1050         struct uart_port *port;
1051         int i;
1052
1053         if (level != RESUME_ENABLE)
1054                 return 0;
1055
1056         for (i = 0; i < siu_uart_driver.nr; i++) {
1057                 port = &siu_uart_ports[i];
1058                 if ((port->type == PORT_VR41XX_SIU ||
1059                      port->type == PORT_VR41XX_DSIU) && port->dev == dev)
1060                         uart_resume_port(&siu_uart_driver, port);
1061         }
1062
1063         return 0;
1064 }
1065
1066 static struct platform_device *siu_platform_device;
1067
1068 static struct device_driver siu_device_driver = {
1069         .name           = "SIU",
1070         .bus            = &platform_bus_type,
1071         .probe          = siu_probe,
1072         .remove         = siu_remove,
1073         .suspend        = siu_suspend,
1074         .resume         = siu_resume,
1075 };
1076
1077 static int __devinit vr41xx_siu_init(void)
1078 {
1079         int retval;
1080
1081         siu_platform_device = platform_device_register_simple("SIU", -1, NULL, 0);
1082         if (IS_ERR(siu_platform_device))
1083                 return PTR_ERR(siu_platform_device);
1084
1085         retval = driver_register(&siu_device_driver);
1086         if (retval < 0)
1087                 platform_device_unregister(siu_platform_device);
1088
1089         return retval;
1090 }
1091
1092 static void __devexit vr41xx_siu_exit(void)
1093 {
1094         driver_unregister(&siu_device_driver);
1095
1096         platform_device_unregister(siu_platform_device);
1097 }
1098
1099 module_init(vr41xx_siu_init);
1100 module_exit(vr41xx_siu_exit);