Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
[linux-3.10.git] / drivers / net / wireless / iwlwifi / iwl-3945.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24  *
25  *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <linux/firmware.h>
38 #include <net/mac80211.h>
39
40 #include <linux/etherdevice.h>
41
42 #define IWL 3945
43
44 #include "iwlwifi.h"
45 #include "iwl-helpers.h"
46 #include "iwl-3945.h"
47 #include "iwl-3945-rs.h"
48
49 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
50         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
51                                     IWL_RATE_##r##M_IEEE,   \
52                                     IWL_RATE_##ip##M_INDEX, \
53                                     IWL_RATE_##in##M_INDEX, \
54                                     IWL_RATE_##rp##M_INDEX, \
55                                     IWL_RATE_##rn##M_INDEX, \
56                                     IWL_RATE_##pp##M_INDEX, \
57                                     IWL_RATE_##np##M_INDEX }
58
59 /*
60  * Parameter order:
61  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
62  *
63  * If there isn't a valid next or previous rate then INV is used which
64  * maps to IWL_RATE_INVALID
65  *
66  */
67 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
68         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
69         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
70         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
71         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
72         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
73         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
74         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
75         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
76         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
77         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
78         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
79         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
80 };
81
82 /* 1 = enable the iwl_disable_events() function */
83 #define IWL_EVT_DISABLE (0)
84 #define IWL_EVT_DISABLE_SIZE (1532/32)
85
86 /**
87  * iwl_disable_events - Disable selected events in uCode event log
88  *
89  * Disable an event by writing "1"s into "disable"
90  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
91  *   Default values of 0 enable uCode events to be logged.
92  * Use for only special debugging.  This function is just a placeholder as-is,
93  *   you'll need to provide the special bits! ...
94  *   ... and set IWL_EVT_DISABLE to 1. */
95 void iwl_disable_events(struct iwl_priv *priv)
96 {
97         int rc;
98         int i;
99         u32 base;               /* SRAM address of event log header */
100         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
101         u32 array_size;         /* # of u32 entries in array */
102         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
103                 0x00000000,     /*   31 -    0  Event id numbers */
104                 0x00000000,     /*   63 -   32 */
105                 0x00000000,     /*   95 -   64 */
106                 0x00000000,     /*  127 -   96 */
107                 0x00000000,     /*  159 -  128 */
108                 0x00000000,     /*  191 -  160 */
109                 0x00000000,     /*  223 -  192 */
110                 0x00000000,     /*  255 -  224 */
111                 0x00000000,     /*  287 -  256 */
112                 0x00000000,     /*  319 -  288 */
113                 0x00000000,     /*  351 -  320 */
114                 0x00000000,     /*  383 -  352 */
115                 0x00000000,     /*  415 -  384 */
116                 0x00000000,     /*  447 -  416 */
117                 0x00000000,     /*  479 -  448 */
118                 0x00000000,     /*  511 -  480 */
119                 0x00000000,     /*  543 -  512 */
120                 0x00000000,     /*  575 -  544 */
121                 0x00000000,     /*  607 -  576 */
122                 0x00000000,     /*  639 -  608 */
123                 0x00000000,     /*  671 -  640 */
124                 0x00000000,     /*  703 -  672 */
125                 0x00000000,     /*  735 -  704 */
126                 0x00000000,     /*  767 -  736 */
127                 0x00000000,     /*  799 -  768 */
128                 0x00000000,     /*  831 -  800 */
129                 0x00000000,     /*  863 -  832 */
130                 0x00000000,     /*  895 -  864 */
131                 0x00000000,     /*  927 -  896 */
132                 0x00000000,     /*  959 -  928 */
133                 0x00000000,     /*  991 -  960 */
134                 0x00000000,     /* 1023 -  992 */
135                 0x00000000,     /* 1055 - 1024 */
136                 0x00000000,     /* 1087 - 1056 */
137                 0x00000000,     /* 1119 - 1088 */
138                 0x00000000,     /* 1151 - 1120 */
139                 0x00000000,     /* 1183 - 1152 */
140                 0x00000000,     /* 1215 - 1184 */
141                 0x00000000,     /* 1247 - 1216 */
142                 0x00000000,     /* 1279 - 1248 */
143                 0x00000000,     /* 1311 - 1280 */
144                 0x00000000,     /* 1343 - 1312 */
145                 0x00000000,     /* 1375 - 1344 */
146                 0x00000000,     /* 1407 - 1376 */
147                 0x00000000,     /* 1439 - 1408 */
148                 0x00000000,     /* 1471 - 1440 */
149                 0x00000000,     /* 1503 - 1472 */
150         };
151
152         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
153         if (!iwl_hw_valid_rtc_data_addr(base)) {
154                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
155                 return;
156         }
157
158         rc = iwl_grab_restricted_access(priv);
159         if (rc) {
160                 IWL_WARNING("Can not read from adapter at this time.\n");
161                 return;
162         }
163
164         disable_ptr = iwl_read_restricted_mem(priv, base + (4 * sizeof(u32)));
165         array_size = iwl_read_restricted_mem(priv, base + (5 * sizeof(u32)));
166         iwl_release_restricted_access(priv);
167
168         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
169                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
170                                disable_ptr);
171                 rc = iwl_grab_restricted_access(priv);
172                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
173                         iwl_write_restricted_mem(priv,
174                                                  disable_ptr +
175                                                  (i * sizeof(u32)),
176                                                  evt_disable[i]);
177
178                 iwl_release_restricted_access(priv);
179         } else {
180                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
181                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
182                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
183                                disable_ptr, array_size);
184         }
185
186 }
187
188 /**
189  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
190  * @priv: eeprom and antenna fields are used to determine antenna flags
191  *
192  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
193  * priv->antenna specifies the antenna diversity mode:
194  *
195  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
196  * IWL_ANTENNA_MAIN      - Force MAIN antenna
197  * IWL_ANTENNA_AUX       - Force AUX antenna
198  */
199 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
200 {
201         switch (priv->antenna) {
202         case IWL_ANTENNA_DIVERSITY:
203                 return 0;
204
205         case IWL_ANTENNA_MAIN:
206                 if (priv->eeprom.antenna_switch_type)
207                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
208                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
209
210         case IWL_ANTENNA_AUX:
211                 if (priv->eeprom.antenna_switch_type)
212                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
213                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
214         }
215
216         /* bad antenna selector value */
217         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
218         return 0;               /* "diversity" is default if error */
219 }
220
221 /*****************************************************************************
222  *
223  * Intel PRO/Wireless 3945ABG/BG Network Connection
224  *
225  *  RX handler implementations
226  *
227  *  Used by iwl-base.c
228  *
229  *****************************************************************************/
230
231 void iwl_hw_rx_statistics(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
232 {
233         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
234         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
235                      (int)sizeof(struct iwl_notif_statistics),
236                      le32_to_cpu(pkt->len));
237
238         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
239
240         priv->last_statistics_time = jiffies;
241 }
242
243 static void iwl3945_handle_data_packet(struct iwl_priv *priv, int is_data,
244                                    struct iwl_rx_mem_buffer *rxb,
245                                    struct ieee80211_rx_status *stats,
246                                    u16 phy_flags)
247 {
248         struct ieee80211_hdr *hdr;
249         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
250         struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
251         struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
252         short len = le16_to_cpu(rx_hdr->len);
253
254         /* We received data from the HW, so stop the watchdog */
255         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
256                 IWL_DEBUG_DROP("Corruption detected!\n");
257                 return;
258         }
259
260         /* We only process data packets if the interface is open */
261         if (unlikely(!priv->is_open)) {
262                 IWL_DEBUG_DROP_LIMIT
263                     ("Dropping packet while interface is not open.\n");
264                 return;
265         }
266         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
267                 if (iwl_param_hwcrypto)
268                         iwl_set_decrypted_flag(priv, rxb->skb,
269                                                le32_to_cpu(rx_end->status),
270                                                stats);
271                 iwl_handle_data_packet_monitor(priv, rxb, IWL_RX_DATA(pkt),
272                                                len, stats, phy_flags);
273                 return;
274         }
275
276         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
277         /* Set the size of the skb to the size of the frame */
278         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
279
280         hdr = (void *)rxb->skb->data;
281
282         if (iwl_param_hwcrypto)
283                 iwl_set_decrypted_flag(priv, rxb->skb,
284                                        le32_to_cpu(rx_end->status), stats);
285
286         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
287         rxb->skb = NULL;
288 }
289
290 static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
291                                 struct iwl_rx_mem_buffer *rxb)
292 {
293         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
294         struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
295         struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
296         struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
297         struct ieee80211_hdr *header;
298         u16 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
299         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
300         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
301         struct ieee80211_rx_status stats = {
302                 .mactime = le64_to_cpu(rx_end->timestamp),
303                 .freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel)),
304                 .channel = le16_to_cpu(rx_hdr->channel),
305                 .phymode = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
306                 MODE_IEEE80211G : MODE_IEEE80211A,
307                 .antenna = 0,
308                 .rate = rx_hdr->rate,
309                 .flag = 0,
310         };
311         u8 network_packet;
312         int snr;
313
314         if ((unlikely(rx_stats->phy_count > 20))) {
315                 IWL_DEBUG_DROP
316                     ("dsp size out of range [0,20]: "
317                      "%d/n", rx_stats->phy_count);
318                 return;
319         }
320
321         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
322             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
323                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
324                 return;
325         }
326
327         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
328                 iwl3945_handle_data_packet(priv, 1, rxb, &stats, phy_flags);
329                 return;
330         }
331
332         /* Convert 3945's rssi indicator to dBm */
333         stats.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
334
335         /* Set default noise value to -127 */
336         if (priv->last_rx_noise == 0)
337                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
338
339         /* 3945 provides noise info for OFDM frames only.
340          * sig_avg and noise_diff are measured by the 3945's digital signal
341          *   processor (DSP), and indicate linear levels of signal level and
342          *   distortion/noise within the packet preamble after
343          *   automatic gain control (AGC).  sig_avg should stay fairly
344          *   constant if the radio's AGC is working well.
345          * Since these values are linear (not dB or dBm), linear
346          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
347          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
348          *   to obtain noise level in dBm.
349          * Calculate stats.signal (quality indicator in %) based on SNR. */
350         if (rx_stats_noise_diff) {
351                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
352                 stats.noise = stats.ssi - iwl_calc_db_from_ratio(snr);
353                 stats.signal = iwl_calc_sig_qual(stats.ssi, stats.noise);
354
355         /* If noise info not available, calculate signal quality indicator (%)
356          *   using just the dBm signal level. */
357         } else {
358                 stats.noise = priv->last_rx_noise;
359                 stats.signal = iwl_calc_sig_qual(stats.ssi, 0);
360         }
361
362
363         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
364                         stats.ssi, stats.noise, stats.signal,
365                         rx_stats_sig_avg, rx_stats_noise_diff);
366
367         stats.freq = ieee80211chan2mhz(stats.channel);
368
369         /* can be covered by iwl_report_frame() in most cases */
370 /*      IWL_DEBUG_RX("RX status: 0x%08X\n", rx_end->status); */
371
372         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
373
374         network_packet = iwl_is_network_packet(priv, header);
375
376 #ifdef CONFIG_IWLWIFI_DEBUG
377         if (iwl_debug_level & IWL_DL_STATS && net_ratelimit())
378                 IWL_DEBUG_STATS
379                     ("[%c] %d RSSI: %d Signal: %u, Noise: %u, Rate: %u\n",
380                      network_packet ? '*' : ' ',
381                      stats.channel, stats.ssi, stats.ssi,
382                      stats.ssi, stats.rate);
383
384         if (iwl_debug_level & (IWL_DL_RX))
385                 /* Set "1" to report good data frames in groups of 100 */
386                 iwl_report_frame(priv, pkt, header, 1);
387 #endif
388
389         if (network_packet) {
390                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
391                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
392                 priv->last_rx_rssi = stats.ssi;
393                 priv->last_rx_noise = stats.noise;
394         }
395
396         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
397         case IEEE80211_FTYPE_MGMT:
398                 switch (le16_to_cpu(header->frame_control) &
399                         IEEE80211_FCTL_STYPE) {
400                 case IEEE80211_STYPE_PROBE_RESP:
401                 case IEEE80211_STYPE_BEACON:{
402                                 /* If this is a beacon or probe response for
403                                  * our network then cache the beacon
404                                  * timestamp */
405                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
406                                       && !compare_ether_addr(header->addr2,
407                                                              priv->bssid)) ||
408                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
409                                       && !compare_ether_addr(header->addr3,
410                                                              priv->bssid)))) {
411                                         struct ieee80211_mgmt *mgmt =
412                                             (struct ieee80211_mgmt *)header;
413                                         __le32 *pos;
414                                         pos =
415                                             (__le32 *) & mgmt->u.beacon.
416                                             timestamp;
417                                         priv->timestamp0 = le32_to_cpu(pos[0]);
418                                         priv->timestamp1 = le32_to_cpu(pos[1]);
419                                         priv->beacon_int = le16_to_cpu(
420                                             mgmt->u.beacon.beacon_int);
421                                         if (priv->call_post_assoc_from_beacon &&
422                                             (priv->iw_mode ==
423                                                 IEEE80211_IF_TYPE_STA))
424                                                 queue_work(priv->workqueue,
425                                                     &priv->post_associate.work);
426
427                                         priv->call_post_assoc_from_beacon = 0;
428                                 }
429
430                                 break;
431                         }
432
433                 case IEEE80211_STYPE_ACTION:
434                         /* TODO: Parse 802.11h frames for CSA... */
435                         break;
436
437                         /*
438                          * TODO: There is no callback function from upper
439                          * stack to inform us when associated status. this
440                          * work around to sniff assoc_resp management frame
441                          * and finish the association process.
442                          */
443                 case IEEE80211_STYPE_ASSOC_RESP:
444                 case IEEE80211_STYPE_REASSOC_RESP:{
445                                 struct ieee80211_mgmt *mgnt =
446                                     (struct ieee80211_mgmt *)header;
447                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
448                                                   le16_to_cpu(mgnt->u.
449                                                               assoc_resp.aid));
450                                 priv->assoc_capability =
451                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
452                                 if (priv->beacon_int)
453                                         queue_work(priv->workqueue,
454                                             &priv->post_associate.work);
455                                 else
456                                         priv->call_post_assoc_from_beacon = 1;
457                                 break;
458                         }
459
460                 case IEEE80211_STYPE_PROBE_REQ:{
461                                 DECLARE_MAC_BUF(mac1);
462                                 DECLARE_MAC_BUF(mac2);
463                                 DECLARE_MAC_BUF(mac3);
464                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
465                                         IWL_DEBUG_DROP
466                                             ("Dropping (non network): %s"
467                                              ", %s, %s\n",
468                                              print_mac(mac1, header->addr1),
469                                              print_mac(mac2, header->addr2),
470                                              print_mac(mac3, header->addr3));
471                                 return;
472                         }
473                 }
474
475                 iwl3945_handle_data_packet(priv, 0, rxb, &stats, phy_flags);
476                 break;
477
478         case IEEE80211_FTYPE_CTL:
479                 break;
480
481         case IEEE80211_FTYPE_DATA: {
482                 DECLARE_MAC_BUF(mac1);
483                 DECLARE_MAC_BUF(mac2);
484                 DECLARE_MAC_BUF(mac3);
485
486                 if (unlikely(is_duplicate_packet(priv, header)))
487                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
488                                        print_mac(mac1, header->addr1),
489                                        print_mac(mac2, header->addr2),
490                                        print_mac(mac3, header->addr3));
491                 else
492                         iwl3945_handle_data_packet(priv, 1, rxb, &stats,
493                                                    phy_flags);
494                 break;
495         }
496         }
497 }
498
499 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
500                                  dma_addr_t addr, u16 len)
501 {
502         int count;
503         u32 pad;
504         struct iwl_tfd_frame *tfd = (struct iwl_tfd_frame *)ptr;
505
506         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
507         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
508
509         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
510                 IWL_ERROR("Error can not send more than %d chunks\n",
511                           NUM_TFD_CHUNKS);
512                 return -EINVAL;
513         }
514
515         tfd->pa[count].addr = cpu_to_le32(addr);
516         tfd->pa[count].len = cpu_to_le32(len);
517
518         count++;
519
520         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
521                                          TFD_CTL_PAD_SET(pad));
522
523         return 0;
524 }
525
526 /**
527  * iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.last_used]
528  *
529  * Does NOT advance any indexes
530  */
531 int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
532 {
533         struct iwl_tfd_frame *bd_tmp = (struct iwl_tfd_frame *)&txq->bd[0];
534         struct iwl_tfd_frame *bd = &bd_tmp[txq->q.last_used];
535         struct pci_dev *dev = priv->pci_dev;
536         int i;
537         int counter;
538
539         /* classify bd */
540         if (txq->q.id == IWL_CMD_QUEUE_NUM)
541                 /* nothing to cleanup after for host commands */
542                 return 0;
543
544         /* sanity check */
545         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
546         if (counter > NUM_TFD_CHUNKS) {
547                 IWL_ERROR("Too many chunks: %i\n", counter);
548                 /* @todo issue fatal error, it is quite serious situation */
549                 return 0;
550         }
551
552         /* unmap chunks if any */
553
554         for (i = 1; i < counter; i++) {
555                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
556                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
557                 if (txq->txb[txq->q.last_used].skb[0]) {
558                         struct sk_buff *skb = txq->txb[txq->q.last_used].skb[0];
559                         if (txq->txb[txq->q.last_used].skb[0]) {
560                                 /* Can be called from interrupt context */
561                                 dev_kfree_skb_any(skb);
562                                 txq->txb[txq->q.last_used].skb[0] = NULL;
563                         }
564                 }
565         }
566         return 0;
567 }
568
569 u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *addr)
570 {
571         int i;
572         int ret = IWL_INVALID_STATION;
573         unsigned long flags;
574         DECLARE_MAC_BUF(mac);
575
576         spin_lock_irqsave(&priv->sta_lock, flags);
577         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
578                 if ((priv->stations[i].used) &&
579                     (!compare_ether_addr
580                      (priv->stations[i].sta.sta.addr, addr))) {
581                         ret = i;
582                         goto out;
583                 }
584
585         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
586                        print_mac(mac, addr), priv->num_stations);
587  out:
588         spin_unlock_irqrestore(&priv->sta_lock, flags);
589         return ret;
590 }
591
592 /**
593  * iwl_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
594  *
595 */
596 void iwl_hw_build_tx_cmd_rate(struct iwl_priv *priv,
597                               struct iwl_cmd *cmd,
598                               struct ieee80211_tx_control *ctrl,
599                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
600 {
601         unsigned long flags;
602         u16 rate_index = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
603         u16 rate_mask;
604         int rate;
605         u8 rts_retry_limit;
606         u8 data_retry_limit;
607         __le32 tx_flags;
608         u16 fc = le16_to_cpu(hdr->frame_control);
609
610         rate = iwl_rates[rate_index].plcp;
611         tx_flags = cmd->cmd.tx.tx_flags;
612
613         /* We need to figure out how to get the sta->supp_rates while
614          * in this running context; perhaps encoding into ctrl->tx_rate? */
615         rate_mask = IWL_RATES_MASK;
616
617         spin_lock_irqsave(&priv->sta_lock, flags);
618
619         priv->stations[sta_id].current_rate.rate_n_flags = rate;
620
621         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
622             (sta_id != IWL3945_BROADCAST_ID) &&
623                 (sta_id != IWL_MULTICAST_ID))
624                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
625
626         spin_unlock_irqrestore(&priv->sta_lock, flags);
627
628         if (tx_id >= IWL_CMD_QUEUE_NUM)
629                 rts_retry_limit = 3;
630         else
631                 rts_retry_limit = 7;
632
633         if (ieee80211_is_probe_response(fc)) {
634                 data_retry_limit = 3;
635                 if (data_retry_limit < rts_retry_limit)
636                         rts_retry_limit = data_retry_limit;
637         } else
638                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
639
640         if (priv->data_retry_limit != -1)
641                 data_retry_limit = priv->data_retry_limit;
642
643         if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
644                 switch (fc & IEEE80211_FCTL_STYPE) {
645                 case IEEE80211_STYPE_AUTH:
646                 case IEEE80211_STYPE_DEAUTH:
647                 case IEEE80211_STYPE_ASSOC_REQ:
648                 case IEEE80211_STYPE_REASSOC_REQ:
649                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
650                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
651                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
652                         }
653                         break;
654                 default:
655                         break;
656                 }
657         }
658
659         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
660         cmd->cmd.tx.data_retry_limit = data_retry_limit;
661         cmd->cmd.tx.rate = rate;
662         cmd->cmd.tx.tx_flags = tx_flags;
663
664         /* OFDM */
665         cmd->cmd.tx.supp_rates[0] = rate_mask & IWL_OFDM_RATES_MASK;
666
667         /* CCK */
668         cmd->cmd.tx.supp_rates[1] = (rate_mask >> 8) & 0xF;
669
670         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
671                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
672                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
673                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
674 }
675
676 u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
677 {
678         unsigned long flags_spin;
679         struct iwl_station_entry *station;
680
681         if (sta_id == IWL_INVALID_STATION)
682                 return IWL_INVALID_STATION;
683
684         spin_lock_irqsave(&priv->sta_lock, flags_spin);
685         station = &priv->stations[sta_id];
686
687         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
688         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
689         station->current_rate.rate_n_flags = tx_rate;
690         station->sta.mode = STA_CONTROL_MODIFY_MSK;
691
692         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
693
694         iwl_send_add_station(priv, &station->sta, flags);
695         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
696                         sta_id, tx_rate);
697         return sta_id;
698 }
699
700 void iwl_hw_card_show_info(struct iwl_priv *priv)
701 {
702         IWL_DEBUG_INFO("3945ABG HW Version %u.%u.%u\n",
703                        ((priv->eeprom.board_revision >> 8) & 0x0F),
704                        ((priv->eeprom.board_revision >> 8) >> 4),
705                        (priv->eeprom.board_revision & 0x00FF));
706
707         IWL_DEBUG_INFO("3945ABG PBA Number %.*s\n",
708                        (int)sizeof(priv->eeprom.board_pba_number),
709                        priv->eeprom.board_pba_number);
710
711         IWL_DEBUG_INFO("EEPROM_ANTENNA_SWITCH_TYPE is 0x%02X\n",
712                        priv->eeprom.antenna_switch_type);
713 }
714
715 static int iwl3945_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
716 {
717         int rc;
718         unsigned long flags;
719
720         spin_lock_irqsave(&priv->lock, flags);
721         rc = iwl_grab_restricted_access(priv);
722         if (rc) {
723                 spin_unlock_irqrestore(&priv->lock, flags);
724                 return rc;
725         }
726
727         if (!pwr_max) {
728                 u32 val;
729
730                 rc = pci_read_config_dword(priv->pci_dev,
731                                 PCI_POWER_SOURCE, &val);
732                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
733                         iwl_set_bits_mask_restricted_reg(priv, APMG_PS_CTRL_REG,
734                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
735                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
736                         iwl_release_restricted_access(priv);
737
738                         iwl_poll_bit(priv, CSR_GPIO_IN,
739                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
740                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
741                 } else
742                         iwl_release_restricted_access(priv);
743         } else {
744                 iwl_set_bits_mask_restricted_reg(priv, APMG_PS_CTRL_REG,
745                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
746                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
747
748                 iwl_release_restricted_access(priv);
749                 iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
750                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
751         }
752         spin_unlock_irqrestore(&priv->lock, flags);
753
754         return rc;
755 }
756
757 static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
758 {
759         int rc;
760         unsigned long flags;
761
762         spin_lock_irqsave(&priv->lock, flags);
763         rc = iwl_grab_restricted_access(priv);
764         if (rc) {
765                 spin_unlock_irqrestore(&priv->lock, flags);
766                 return rc;
767         }
768
769         iwl_write_restricted(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
770         iwl_write_restricted(priv, FH_RCSR_RPTR_ADDR(0),
771                              priv->hw_setting.shared_phys +
772                              offsetof(struct iwl_shared, rx_read_ptr[0]));
773         iwl_write_restricted(priv, FH_RCSR_WPTR(0), 0);
774         iwl_write_restricted(priv, FH_RCSR_CONFIG(0),
775                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
776                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
777                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
778                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
779                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
780                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
781                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
782                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
783
784         /* fake read to flush all prev I/O */
785         iwl_read_restricted(priv, FH_RSSR_CTRL);
786
787         iwl_release_restricted_access(priv);
788         spin_unlock_irqrestore(&priv->lock, flags);
789
790         return 0;
791 }
792
793 static int iwl3945_tx_reset(struct iwl_priv *priv)
794 {
795         int rc;
796         unsigned long flags;
797
798         spin_lock_irqsave(&priv->lock, flags);
799         rc = iwl_grab_restricted_access(priv);
800         if (rc) {
801                 spin_unlock_irqrestore(&priv->lock, flags);
802                 return rc;
803         }
804
805         /* bypass mode */
806         iwl_write_restricted_reg(priv, SCD_MODE_REG, 0x2);
807
808         /* RA 0 is active */
809         iwl_write_restricted_reg(priv, SCD_ARASTAT_REG, 0x01);
810
811         /* all 6 fifo are active */
812         iwl_write_restricted_reg(priv, SCD_TXFACT_REG, 0x3f);
813
814         iwl_write_restricted_reg(priv, SCD_SBYP_MODE_1_REG, 0x010000);
815         iwl_write_restricted_reg(priv, SCD_SBYP_MODE_2_REG, 0x030002);
816         iwl_write_restricted_reg(priv, SCD_TXF4MF_REG, 0x000004);
817         iwl_write_restricted_reg(priv, SCD_TXF5MF_REG, 0x000005);
818
819         iwl_write_restricted(priv, FH_TSSR_CBB_BASE,
820                              priv->hw_setting.shared_phys);
821
822         iwl_write_restricted(priv, FH_TSSR_MSG_CONFIG,
823                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
824                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
825                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
826                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
827                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
828                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
829                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
830
831         iwl_release_restricted_access(priv);
832         spin_unlock_irqrestore(&priv->lock, flags);
833
834         return 0;
835 }
836
837 /**
838  * iwl3945_txq_ctx_reset - Reset TX queue context
839  *
840  * Destroys all DMA structures and initialize them again
841  */
842 static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
843 {
844         int rc;
845         int txq_id, slots_num;
846
847         iwl_hw_txq_ctx_free(priv);
848
849         /* Tx CMD queue */
850         rc = iwl3945_tx_reset(priv);
851         if (rc)
852                 goto error;
853
854         /* Tx queue(s) */
855         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
856                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
857                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
858                 rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
859                                 txq_id);
860                 if (rc) {
861                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
862                         goto error;
863                 }
864         }
865
866         return rc;
867
868  error:
869         iwl_hw_txq_ctx_free(priv);
870         return rc;
871 }
872
873 int iwl_hw_nic_init(struct iwl_priv *priv)
874 {
875         u8 rev_id;
876         int rc;
877         unsigned long flags;
878         struct iwl_rx_queue *rxq = &priv->rxq;
879
880         iwl_power_init_handle(priv);
881
882         spin_lock_irqsave(&priv->lock, flags);
883         iwl_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
884         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
885                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
886
887         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
888         rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
889                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
890                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
891         if (rc < 0) {
892                 spin_unlock_irqrestore(&priv->lock, flags);
893                 IWL_DEBUG_INFO("Failed to init the card\n");
894                 return rc;
895         }
896
897         rc = iwl_grab_restricted_access(priv);
898         if (rc) {
899                 spin_unlock_irqrestore(&priv->lock, flags);
900                 return rc;
901         }
902         iwl_write_restricted_reg(priv, APMG_CLK_EN_REG,
903                                  APMG_CLK_VAL_DMA_CLK_RQT |
904                                  APMG_CLK_VAL_BSM_CLK_RQT);
905         udelay(20);
906         iwl_set_bits_restricted_reg(priv, APMG_PCIDEV_STT_REG,
907                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
908         iwl_release_restricted_access(priv);
909         spin_unlock_irqrestore(&priv->lock, flags);
910
911         /* Determine HW type */
912         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
913         if (rc)
914                 return rc;
915         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
916
917         iwl3945_nic_set_pwr_src(priv, 1);
918         spin_lock_irqsave(&priv->lock, flags);
919
920         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
921                 IWL_DEBUG_INFO("RTP type \n");
922         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
923                 IWL_DEBUG_INFO("ALM-MB type\n");
924                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
925                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB);
926         } else {
927                 IWL_DEBUG_INFO("ALM-MM type\n");
928                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
929                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM);
930         }
931
932         spin_unlock_irqrestore(&priv->lock, flags);
933
934         /* Initialize the EEPROM */
935         rc = iwl_eeprom_init(priv);
936         if (rc)
937                 return rc;
938
939         spin_lock_irqsave(&priv->lock, flags);
940         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
941                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
942                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
943                             CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC);
944         } else
945                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
946
947         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
948                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
949                                priv->eeprom.board_revision);
950                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
951                             CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
952         } else {
953                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
954                                priv->eeprom.board_revision);
955                 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
956                               CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
957         }
958
959         if (priv->eeprom.almgor_m_version <= 1) {
960                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
961                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
962                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
963                                priv->eeprom.almgor_m_version);
964         } else {
965                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
966                                priv->eeprom.almgor_m_version);
967                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
968                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
969         }
970         spin_unlock_irqrestore(&priv->lock, flags);
971
972         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
973                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
974
975         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
976                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
977
978         /* Allocate the RX queue, or reset if it is already allocated */
979         if (!rxq->bd) {
980                 rc = iwl_rx_queue_alloc(priv);
981                 if (rc) {
982                         IWL_ERROR("Unable to initialize Rx queue\n");
983                         return -ENOMEM;
984                 }
985         } else
986                 iwl_rx_queue_reset(priv, rxq);
987
988         iwl_rx_replenish(priv);
989
990         iwl3945_rx_init(priv, rxq);
991
992         spin_lock_irqsave(&priv->lock, flags);
993
994         /* Look at using this instead:
995         rxq->need_update = 1;
996         iwl_rx_queue_update_write_ptr(priv, rxq);
997         */
998
999         rc = iwl_grab_restricted_access(priv);
1000         if (rc) {
1001                 spin_unlock_irqrestore(&priv->lock, flags);
1002                 return rc;
1003         }
1004         iwl_write_restricted(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1005         iwl_release_restricted_access(priv);
1006
1007         spin_unlock_irqrestore(&priv->lock, flags);
1008
1009         rc = iwl3945_txq_ctx_reset(priv);
1010         if (rc)
1011                 return rc;
1012
1013         set_bit(STATUS_INIT, &priv->status);
1014
1015         return 0;
1016 }
1017
1018 /**
1019  * iwl_hw_txq_ctx_free - Free TXQ Context
1020  *
1021  * Destroy all TX DMA queues and structures
1022  */
1023 void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
1024 {
1025         int txq_id;
1026
1027         /* Tx queues */
1028         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1029                 iwl_tx_queue_free(priv, &priv->txq[txq_id]);
1030 }
1031
1032 void iwl_hw_txq_ctx_stop(struct iwl_priv *priv)
1033 {
1034         int queue;
1035         unsigned long flags;
1036
1037         spin_lock_irqsave(&priv->lock, flags);
1038         if (iwl_grab_restricted_access(priv)) {
1039                 spin_unlock_irqrestore(&priv->lock, flags);
1040                 iwl_hw_txq_ctx_free(priv);
1041                 return;
1042         }
1043
1044         /* stop SCD */
1045         iwl_write_restricted_reg(priv, SCD_MODE_REG, 0);
1046
1047         /* reset TFD queues */
1048         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1049                 iwl_write_restricted(priv, FH_TCSR_CONFIG(queue), 0x0);
1050                 iwl_poll_restricted_bit(priv, FH_TSSR_TX_STATUS,
1051                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1052                                 1000);
1053         }
1054
1055         iwl_release_restricted_access(priv);
1056         spin_unlock_irqrestore(&priv->lock, flags);
1057
1058         iwl_hw_txq_ctx_free(priv);
1059 }
1060
1061 int iwl_hw_nic_stop_master(struct iwl_priv *priv)
1062 {
1063         int rc = 0;
1064         u32 reg_val;
1065         unsigned long flags;
1066
1067         spin_lock_irqsave(&priv->lock, flags);
1068
1069         /* set stop master bit */
1070         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1071
1072         reg_val = iwl_read32(priv, CSR_GP_CNTRL);
1073
1074         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1075             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1076                 IWL_DEBUG_INFO("Card in power save, master is already "
1077                                "stopped\n");
1078         else {
1079                 rc = iwl_poll_bit(priv, CSR_RESET,
1080                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1081                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1082                 if (rc < 0) {
1083                         spin_unlock_irqrestore(&priv->lock, flags);
1084                         return rc;
1085                 }
1086         }
1087
1088         spin_unlock_irqrestore(&priv->lock, flags);
1089         IWL_DEBUG_INFO("stop master\n");
1090
1091         return rc;
1092 }
1093
1094 int iwl_hw_nic_reset(struct iwl_priv *priv)
1095 {
1096         int rc;
1097         unsigned long flags;
1098
1099         iwl_hw_nic_stop_master(priv);
1100
1101         spin_lock_irqsave(&priv->lock, flags);
1102
1103         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1104
1105         rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
1106                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1107                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1108
1109         rc = iwl_grab_restricted_access(priv);
1110         if (!rc) {
1111                 iwl_write_restricted_reg(priv, APMG_CLK_CTRL_REG,
1112                                          APMG_CLK_VAL_BSM_CLK_RQT);
1113
1114                 udelay(10);
1115
1116                 iwl_set_bit(priv, CSR_GP_CNTRL,
1117                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1118
1119                 iwl_write_restricted_reg(priv, APMG_RTC_INT_MSK_REG, 0x0);
1120                 iwl_write_restricted_reg(priv, APMG_RTC_INT_STT_REG,
1121                                         0xFFFFFFFF);
1122
1123                 /* enable DMA */
1124                 iwl_write_restricted_reg(priv, APMG_CLK_EN_REG,
1125                                          APMG_CLK_VAL_DMA_CLK_RQT |
1126                                          APMG_CLK_VAL_BSM_CLK_RQT);
1127                 udelay(10);
1128
1129                 iwl_set_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
1130                                 APMG_PS_CTRL_VAL_RESET_REQ);
1131                 udelay(5);
1132                 iwl_clear_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
1133                                 APMG_PS_CTRL_VAL_RESET_REQ);
1134                 iwl_release_restricted_access(priv);
1135         }
1136
1137         /* Clear the 'host command active' bit... */
1138         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1139
1140         wake_up_interruptible(&priv->wait_command_queue);
1141         spin_unlock_irqrestore(&priv->lock, flags);
1142
1143         return rc;
1144 }
1145
1146 /**
1147  * iwl_hw_reg_adjust_power_by_temp - return index delta into power gain settings table
1148  */
1149 static int iwl_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1150 {
1151         return (new_reading - old_reading) * (-11) / 100;
1152 }
1153
1154 /**
1155  * iwl_hw_reg_temp_out_of_range - Keep temperature in sane range
1156  */
1157 static inline int iwl_hw_reg_temp_out_of_range(int temperature)
1158 {
1159         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1160 }
1161
1162 int iwl_hw_get_temperature(struct iwl_priv *priv)
1163 {
1164         return iwl_read32(priv, CSR_UCODE_DRV_GP2);
1165 }
1166
1167 /**
1168  * iwl_hw_reg_txpower_get_temperature - get current temperature by reading from NIC
1169  */
1170 static int iwl_hw_reg_txpower_get_temperature(struct iwl_priv *priv)
1171 {
1172         int temperature;
1173
1174         temperature = iwl_hw_get_temperature(priv);
1175
1176         /* driver's okay range is -260 to +25.
1177          *   human readable okay range is 0 to +285 */
1178         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1179
1180         /* handle insane temp reading */
1181         if (iwl_hw_reg_temp_out_of_range(temperature)) {
1182                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1183
1184                 /* if really really hot(?),
1185                  *   substitute the 3rd band/group's temp measured at factory */
1186                 if (priv->last_temperature > 100)
1187                         temperature = priv->eeprom.groups[2].temperature;
1188                 else /* else use most recent "sane" value from driver */
1189                         temperature = priv->last_temperature;
1190         }
1191
1192         return temperature;     /* raw, not "human readable" */
1193 }
1194
1195 /* Adjust Txpower only if temperature variance is greater than threshold.
1196  *
1197  * Both are lower than older versions' 9 degrees */
1198 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1199
1200 /**
1201  * is_temp_calib_needed - determines if new calibration is needed
1202  *
1203  * records new temperature in tx_mgr->temperature.
1204  * replaces tx_mgr->last_temperature *only* if calib needed
1205  *    (assumes caller will actually do the calibration!). */
1206 static int is_temp_calib_needed(struct iwl_priv *priv)
1207 {
1208         int temp_diff;
1209
1210         priv->temperature = iwl_hw_reg_txpower_get_temperature(priv);
1211         temp_diff = priv->temperature - priv->last_temperature;
1212
1213         /* get absolute value */
1214         if (temp_diff < 0) {
1215                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1216                 temp_diff = -temp_diff;
1217         } else if (temp_diff == 0)
1218                 IWL_DEBUG_POWER("Same temp,\n");
1219         else
1220                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1221
1222         /* if we don't need calibration, *don't* update last_temperature */
1223         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1224                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1225                 return 0;
1226         }
1227
1228         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1229
1230         /* assume that caller will actually do calib ...
1231          *   update the "last temperature" value */
1232         priv->last_temperature = priv->temperature;
1233         return 1;
1234 }
1235
1236 #define IWL_MAX_GAIN_ENTRIES 78
1237 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1238 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1239
1240 /* radio and DSP power table, each step is 1/2 dB.
1241  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1242 static struct iwl_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1243         {
1244          {251, 127},            /* 2.4 GHz, highest power */
1245          {251, 127},
1246          {251, 127},
1247          {251, 127},
1248          {251, 125},
1249          {251, 110},
1250          {251, 105},
1251          {251, 98},
1252          {187, 125},
1253          {187, 115},
1254          {187, 108},
1255          {187, 99},
1256          {243, 119},
1257          {243, 111},
1258          {243, 105},
1259          {243, 97},
1260          {243, 92},
1261          {211, 106},
1262          {211, 100},
1263          {179, 120},
1264          {179, 113},
1265          {179, 107},
1266          {147, 125},
1267          {147, 119},
1268          {147, 112},
1269          {147, 106},
1270          {147, 101},
1271          {147, 97},
1272          {147, 91},
1273          {115, 107},
1274          {235, 121},
1275          {235, 115},
1276          {235, 109},
1277          {203, 127},
1278          {203, 121},
1279          {203, 115},
1280          {203, 108},
1281          {203, 102},
1282          {203, 96},
1283          {203, 92},
1284          {171, 110},
1285          {171, 104},
1286          {171, 98},
1287          {139, 116},
1288          {227, 125},
1289          {227, 119},
1290          {227, 113},
1291          {227, 107},
1292          {227, 101},
1293          {227, 96},
1294          {195, 113},
1295          {195, 106},
1296          {195, 102},
1297          {195, 95},
1298          {163, 113},
1299          {163, 106},
1300          {163, 102},
1301          {163, 95},
1302          {131, 113},
1303          {131, 106},
1304          {131, 102},
1305          {131, 95},
1306          {99, 113},
1307          {99, 106},
1308          {99, 102},
1309          {99, 95},
1310          {67, 113},
1311          {67, 106},
1312          {67, 102},
1313          {67, 95},
1314          {35, 113},
1315          {35, 106},
1316          {35, 102},
1317          {35, 95},
1318          {3, 113},
1319          {3, 106},
1320          {3, 102},
1321          {3, 95} },             /* 2.4 GHz, lowest power */
1322         {
1323          {251, 127},            /* 5.x GHz, highest power */
1324          {251, 120},
1325          {251, 114},
1326          {219, 119},
1327          {219, 101},
1328          {187, 113},
1329          {187, 102},
1330          {155, 114},
1331          {155, 103},
1332          {123, 117},
1333          {123, 107},
1334          {123, 99},
1335          {123, 92},
1336          {91, 108},
1337          {59, 125},
1338          {59, 118},
1339          {59, 109},
1340          {59, 102},
1341          {59, 96},
1342          {59, 90},
1343          {27, 104},
1344          {27, 98},
1345          {27, 92},
1346          {115, 118},
1347          {115, 111},
1348          {115, 104},
1349          {83, 126},
1350          {83, 121},
1351          {83, 113},
1352          {83, 105},
1353          {83, 99},
1354          {51, 118},
1355          {51, 111},
1356          {51, 104},
1357          {51, 98},
1358          {19, 116},
1359          {19, 109},
1360          {19, 102},
1361          {19, 98},
1362          {19, 93},
1363          {171, 113},
1364          {171, 107},
1365          {171, 99},
1366          {139, 120},
1367          {139, 113},
1368          {139, 107},
1369          {139, 99},
1370          {107, 120},
1371          {107, 113},
1372          {107, 107},
1373          {107, 99},
1374          {75, 120},
1375          {75, 113},
1376          {75, 107},
1377          {75, 99},
1378          {43, 120},
1379          {43, 113},
1380          {43, 107},
1381          {43, 99},
1382          {11, 120},
1383          {11, 113},
1384          {11, 107},
1385          {11, 99},
1386          {131, 107},
1387          {131, 99},
1388          {99, 120},
1389          {99, 113},
1390          {99, 107},
1391          {99, 99},
1392          {67, 120},
1393          {67, 113},
1394          {67, 107},
1395          {67, 99},
1396          {35, 120},
1397          {35, 113},
1398          {35, 107},
1399          {35, 99},
1400          {3, 120} }             /* 5.x GHz, lowest power */
1401 };
1402
1403 static inline u8 iwl_hw_reg_fix_power_index(int index)
1404 {
1405         if (index < 0)
1406                 return 0;
1407         if (index >= IWL_MAX_GAIN_ENTRIES)
1408                 return IWL_MAX_GAIN_ENTRIES - 1;
1409         return (u8) index;
1410 }
1411
1412 /* Kick off thermal recalibration check every 60 seconds */
1413 #define REG_RECALIB_PERIOD (60)
1414
1415 /**
1416  * iwl_hw_reg_set_scan_power - Set Tx power for scan probe requests
1417  *
1418  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1419  * or 6 Mbit (OFDM) rates.
1420  */
1421 static void iwl_hw_reg_set_scan_power(struct iwl_priv *priv, u32 scan_tbl_index,
1422                                s32 rate_index, const s8 *clip_pwrs,
1423                                struct iwl_channel_info *ch_info,
1424                                int band_index)
1425 {
1426         struct iwl_scan_power_info *scan_power_info;
1427         s8 power;
1428         u8 power_index;
1429
1430         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1431
1432         /* use this channel group's 6Mbit clipping/saturation pwr,
1433          *   but cap at regulatory scan power restriction (set during init
1434          *   based on eeprom channel data) for this channel.  */
1435         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX]);
1436
1437         /* further limit to user's max power preference.
1438          * FIXME:  Other spectrum management power limitations do not
1439          *   seem to apply?? */
1440         power = min(power, priv->user_txpower_limit);
1441         scan_power_info->requested_power = power;
1442
1443         /* find difference between new scan *power* and current "normal"
1444          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1445          *   current "normal" temperature-compensated Tx power *index* for
1446          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1447          *   *index*. */
1448         power_index = ch_info->power_info[rate_index].power_table_index
1449             - (power - ch_info->power_info
1450                [IWL_RATE_6M_INDEX].requested_power) * 2;
1451
1452         /* store reference index that we use when adjusting *all* scan
1453          *   powers.  So we can accommodate user (all channel) or spectrum
1454          *   management (single channel) power changes "between" temperature
1455          *   feedback compensation procedures.
1456          * don't force fit this reference index into gain table; it may be a
1457          *   negative number.  This will help avoid errors when we're at
1458          *   the lower bounds (highest gains, for warmest temperatures)
1459          *   of the table. */
1460
1461         /* don't exceed table bounds for "real" setting */
1462         power_index = iwl_hw_reg_fix_power_index(power_index);
1463
1464         scan_power_info->power_table_index = power_index;
1465         scan_power_info->tpc.tx_gain =
1466             power_gain_table[band_index][power_index].tx_gain;
1467         scan_power_info->tpc.dsp_atten =
1468             power_gain_table[band_index][power_index].dsp_atten;
1469 }
1470
1471 /**
1472  * iwl_hw_reg_send_txpower - fill in Tx Power command with gain settings
1473  *
1474  * Configures power settings for all rates for the current channel,
1475  * using values from channel info struct, and send to NIC
1476  */
1477 int iwl_hw_reg_send_txpower(struct iwl_priv *priv)
1478 {
1479         int rate_idx;
1480         const struct iwl_channel_info *ch_info = NULL;
1481         struct iwl_txpowertable_cmd txpower = {
1482                 .channel = priv->active_rxon.channel,
1483         };
1484
1485         txpower.band = (priv->phymode == MODE_IEEE80211A) ? 0 : 1;
1486         ch_info = iwl_get_channel_info(priv,
1487                                        priv->phymode,
1488                                        le16_to_cpu(priv->active_rxon.channel));
1489         if (!ch_info) {
1490                 IWL_ERROR
1491                     ("Failed to get channel info for channel %d [%d]\n",
1492                      le16_to_cpu(priv->active_rxon.channel), priv->phymode);
1493                 return -EINVAL;
1494         }
1495
1496         if (!is_channel_valid(ch_info)) {
1497                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1498                                 "non-Tx channel.\n");
1499                 return 0;
1500         }
1501
1502         /* fill cmd with power settings for all rates for current channel */
1503         for (rate_idx = 0; rate_idx < IWL_RATE_COUNT; rate_idx++) {
1504                 txpower.power[rate_idx].tpc = ch_info->power_info[rate_idx].tpc;
1505                 txpower.power[rate_idx].rate = iwl_rates[rate_idx].plcp;
1506
1507                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1508                                 le16_to_cpu(txpower.channel),
1509                                 txpower.band,
1510                                 txpower.power[rate_idx].tpc.tx_gain,
1511                                 txpower.power[rate_idx].tpc.dsp_atten,
1512                                 txpower.power[rate_idx].rate);
1513         }
1514
1515         return iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1516                                 sizeof(struct iwl_txpowertable_cmd), &txpower);
1517
1518 }
1519
1520 /**
1521  * iwl_hw_reg_set_new_power - Configures power tables at new levels
1522  * @ch_info: Channel to update.  Uses power_info.requested_power.
1523  *
1524  * Replace requested_power and base_power_index ch_info fields for
1525  * one channel.
1526  *
1527  * Called if user or spectrum management changes power preferences.
1528  * Takes into account h/w and modulation limitations (clip power).
1529  *
1530  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1531  *
1532  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1533  *       properly fill out the scan powers, and actual h/w gain settings,
1534  *       and send changes to NIC
1535  */
1536 static int iwl_hw_reg_set_new_power(struct iwl_priv *priv,
1537                              struct iwl_channel_info *ch_info)
1538 {
1539         struct iwl_channel_power_info *power_info;
1540         int power_changed = 0;
1541         int i;
1542         const s8 *clip_pwrs;
1543         int power;
1544
1545         /* Get this chnlgrp's rate-to-max/clip-powers table */
1546         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1547
1548         /* Get this channel's rate-to-current-power settings table */
1549         power_info = ch_info->power_info;
1550
1551         /* update OFDM Txpower settings */
1552         for (i = IWL_FIRST_OFDM_RATE; i <= IWL_LAST_OFDM_RATE;
1553              i++, ++power_info) {
1554                 int delta_idx;
1555
1556                 /* limit new power to be no more than h/w capability */
1557                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1558                 if (power == power_info->requested_power)
1559                         continue;
1560
1561                 /* find difference between old and new requested powers,
1562                  *    update base (non-temp-compensated) power index */
1563                 delta_idx = (power - power_info->requested_power) * 2;
1564                 power_info->base_power_index -= delta_idx;
1565
1566                 /* save new requested power value */
1567                 power_info->requested_power = power;
1568
1569                 power_changed = 1;
1570         }
1571
1572         /* update CCK Txpower settings, based on OFDM 12M setting ...
1573          *    ... all CCK power settings for a given channel are the *same*. */
1574         if (power_changed) {
1575                 power =
1576                     ch_info->power_info[IWL_RATE_12M_INDEX].
1577                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1578
1579                 /* do all CCK rates' iwl_channel_power_info structures */
1580                 for (i = IWL_FIRST_CCK_RATE; i <= IWL_LAST_CCK_RATE; i++) {
1581                         power_info->requested_power = power;
1582                         power_info->base_power_index =
1583                             ch_info->power_info[IWL_RATE_12M_INDEX].
1584                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1585                         ++power_info;
1586                 }
1587         }
1588
1589         return 0;
1590 }
1591
1592 /**
1593  * iwl_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1594  *
1595  * NOTE: Returned power limit may be less (but not more) than requested,
1596  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1597  *       (no consideration for h/w clipping limitations).
1598  */
1599 static int iwl_hw_reg_get_ch_txpower_limit(struct iwl_channel_info *ch_info)
1600 {
1601         s8 max_power;
1602
1603 #if 0
1604         /* if we're using TGd limits, use lower of TGd or EEPROM */
1605         if (ch_info->tgd_data.max_power != 0)
1606                 max_power = min(ch_info->tgd_data.max_power,
1607                                 ch_info->eeprom.max_power_avg);
1608
1609         /* else just use EEPROM limits */
1610         else
1611 #endif
1612                 max_power = ch_info->eeprom.max_power_avg;
1613
1614         return min(max_power, ch_info->max_power_avg);
1615 }
1616
1617 /**
1618  * iwl_hw_reg_comp_txpower_temp - Compensate for temperature
1619  *
1620  * Compensate txpower settings of *all* channels for temperature.
1621  * This only accounts for the difference between current temperature
1622  *   and the factory calibration temperatures, and bases the new settings
1623  *   on the channel's base_power_index.
1624  *
1625  * If RxOn is "associated", this sends the new Txpower to NIC!
1626  */
1627 static int iwl_hw_reg_comp_txpower_temp(struct iwl_priv *priv)
1628 {
1629         struct iwl_channel_info *ch_info = NULL;
1630         int delta_index;
1631         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1632         u8 a_band;
1633         u8 rate_index;
1634         u8 scan_tbl_index;
1635         u8 i;
1636         int ref_temp;
1637         int temperature = priv->temperature;
1638
1639         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1640         for (i = 0; i < priv->channel_count; i++) {
1641                 ch_info = &priv->channel_info[i];
1642                 a_band = is_channel_a_band(ch_info);
1643
1644                 /* Get this chnlgrp's factory calibration temperature */
1645                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1646                     temperature;
1647
1648                 /* get power index adjustment based on curr and factory
1649                  * temps */
1650                 delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
1651                                                               ref_temp);
1652
1653                 /* set tx power value for all rates, OFDM and CCK */
1654                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1655                      rate_index++) {
1656                         int power_idx =
1657                             ch_info->power_info[rate_index].base_power_index;
1658
1659                         /* temperature compensate */
1660                         power_idx += delta_index;
1661
1662                         /* stay within table range */
1663                         power_idx = iwl_hw_reg_fix_power_index(power_idx);
1664                         ch_info->power_info[rate_index].
1665                             power_table_index = (u8) power_idx;
1666                         ch_info->power_info[rate_index].tpc =
1667                             power_gain_table[a_band][power_idx];
1668                 }
1669
1670                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1671                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1672
1673                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1674                 for (scan_tbl_index = 0;
1675                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1676                         s32 actual_index = (scan_tbl_index == 0) ?
1677                             IWL_RATE_1M_INDEX : IWL_RATE_6M_INDEX;
1678                         iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
1679                                            actual_index, clip_pwrs,
1680                                            ch_info, a_band);
1681                 }
1682         }
1683
1684         /* send Txpower command for current channel to ucode */
1685         return iwl_hw_reg_send_txpower(priv);
1686 }
1687
1688 int iwl_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1689 {
1690         struct iwl_channel_info *ch_info;
1691         s8 max_power;
1692         u8 a_band;
1693         u8 i;
1694
1695         if (priv->user_txpower_limit == power) {
1696                 IWL_DEBUG_POWER("Requested Tx power same as current "
1697                                 "limit: %ddBm.\n", power);
1698                 return 0;
1699         }
1700
1701         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1702         priv->user_txpower_limit = power;
1703
1704         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1705
1706         for (i = 0; i < priv->channel_count; i++) {
1707                 ch_info = &priv->channel_info[i];
1708                 a_band = is_channel_a_band(ch_info);
1709
1710                 /* find minimum power of all user and regulatory constraints
1711                  *    (does not consider h/w clipping limitations) */
1712                 max_power = iwl_hw_reg_get_ch_txpower_limit(ch_info);
1713                 max_power = min(power, max_power);
1714                 if (max_power != ch_info->curr_txpow) {
1715                         ch_info->curr_txpow = max_power;
1716
1717                         /* this considers the h/w clipping limitations */
1718                         iwl_hw_reg_set_new_power(priv, ch_info);
1719                 }
1720         }
1721
1722         /* update txpower settings for all channels,
1723          *   send to NIC if associated. */
1724         is_temp_calib_needed(priv);
1725         iwl_hw_reg_comp_txpower_temp(priv);
1726
1727         return 0;
1728 }
1729
1730 /* will add 3945 channel switch cmd handling later */
1731 int iwl_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1732 {
1733         return 0;
1734 }
1735
1736 /**
1737  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1738  *
1739  * -- reset periodic timer
1740  * -- see if temp has changed enough to warrant re-calibration ... if so:
1741  *     -- correct coeffs for temp (can reset temp timer)
1742  *     -- save this temp as "last",
1743  *     -- send new set of gain settings to NIC
1744  * NOTE:  This should continue working, even when we're not associated,
1745  *   so we can keep our internal table of scan powers current. */
1746 void iwl3945_reg_txpower_periodic(struct iwl_priv *priv)
1747 {
1748         /* This will kick in the "brute force"
1749          * iwl_hw_reg_comp_txpower_temp() below */
1750         if (!is_temp_calib_needed(priv))
1751                 goto reschedule;
1752
1753         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1754          * This is based *only* on current temperature,
1755          * ignoring any previous power measurements */
1756         iwl_hw_reg_comp_txpower_temp(priv);
1757
1758  reschedule:
1759         queue_delayed_work(priv->workqueue,
1760                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1761 }
1762
1763 void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1764 {
1765         struct iwl_priv *priv = container_of(work, struct iwl_priv,
1766                                              thermal_periodic.work);
1767
1768         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1769                 return;
1770
1771         mutex_lock(&priv->mutex);
1772         iwl3945_reg_txpower_periodic(priv);
1773         mutex_unlock(&priv->mutex);
1774 }
1775
1776 /**
1777  * iwl_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1778  *                                 for the channel.
1779  *
1780  * This function is used when initializing channel-info structs.
1781  *
1782  * NOTE: These channel groups do *NOT* match the bands above!
1783  *       These channel groups are based on factory-tested channels;
1784  *       on A-band, EEPROM's "group frequency" entries represent the top
1785  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1786  */
1787 static u16 iwl_hw_reg_get_ch_grp_index(struct iwl_priv *priv,
1788                                        const struct iwl_channel_info *ch_info)
1789 {
1790         struct iwl_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
1791         u8 group;
1792         u16 group_index = 0;    /* based on factory calib frequencies */
1793         u8 grp_channel;
1794
1795         /* Find the group index for the channel ... don't use index 1(?) */
1796         if (is_channel_a_band(ch_info)) {
1797                 for (group = 1; group < 5; group++) {
1798                         grp_channel = ch_grp[group].group_channel;
1799                         if (ch_info->channel <= grp_channel) {
1800                                 group_index = group;
1801                                 break;
1802                         }
1803                 }
1804                 /* group 4 has a few channels *above* its factory cal freq */
1805                 if (group == 5)
1806                         group_index = 4;
1807         } else
1808                 group_index = 0;        /* 2.4 GHz, group 0 */
1809
1810         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
1811                         group_index);
1812         return group_index;
1813 }
1814
1815 /**
1816  * iwl_hw_reg_get_matched_power_index - Interpolate to get nominal index
1817  *
1818  * Interpolate to get nominal (i.e. at factory calibration temperature) index
1819  *   into radio/DSP gain settings table for requested power.
1820  */
1821 static int iwl_hw_reg_get_matched_power_index(struct iwl_priv *priv,
1822                                        s8 requested_power,
1823                                        s32 setting_index, s32 *new_index)
1824 {
1825         const struct iwl_eeprom_txpower_group *chnl_grp = NULL;
1826         s32 index0, index1;
1827         s32 power = 2 * requested_power;
1828         s32 i;
1829         const struct iwl_eeprom_txpower_sample *samples;
1830         s32 gains0, gains1;
1831         s32 res;
1832         s32 denominator;
1833
1834         chnl_grp = &priv->eeprom.groups[setting_index];
1835         samples = chnl_grp->samples;
1836         for (i = 0; i < 5; i++) {
1837                 if (power == samples[i].power) {
1838                         *new_index = samples[i].gain_index;
1839                         return 0;
1840                 }
1841         }
1842
1843         if (power > samples[1].power) {
1844                 index0 = 0;
1845                 index1 = 1;
1846         } else if (power > samples[2].power) {
1847                 index0 = 1;
1848                 index1 = 2;
1849         } else if (power > samples[3].power) {
1850                 index0 = 2;
1851                 index1 = 3;
1852         } else {
1853                 index0 = 3;
1854                 index1 = 4;
1855         }
1856
1857         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
1858         if (denominator == 0)
1859                 return -EINVAL;
1860         gains0 = (s32) samples[index0].gain_index * (1 << 19);
1861         gains1 = (s32) samples[index1].gain_index * (1 << 19);
1862         res = gains0 + (gains1 - gains0) *
1863             ((s32) power - (s32) samples[index0].power) / denominator +
1864             (1 << 18);
1865         *new_index = res >> 19;
1866         return 0;
1867 }
1868
1869 static void iwl_hw_reg_init_channel_groups(struct iwl_priv *priv)
1870 {
1871         u32 i;
1872         s32 rate_index;
1873         const struct iwl_eeprom_txpower_group *group;
1874
1875         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
1876
1877         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
1878                 s8 *clip_pwrs;  /* table of power levels for each rate */
1879                 s8 satur_pwr;   /* saturation power for each chnl group */
1880                 group = &priv->eeprom.groups[i];
1881
1882                 /* sanity check on factory saturation power value */
1883                 if (group->saturation_power < 40) {
1884                         IWL_WARNING("Error: saturation power is %d, "
1885                                     "less than minimum expected 40\n",
1886                                     group->saturation_power);
1887                         return;
1888                 }
1889
1890                 /*
1891                  * Derive requested power levels for each rate, based on
1892                  *   hardware capabilities (saturation power for band).
1893                  * Basic value is 3dB down from saturation, with further
1894                  *   power reductions for highest 3 data rates.  These
1895                  *   backoffs provide headroom for high rate modulation
1896                  *   power peaks, without too much distortion (clipping).
1897                  */
1898                 /* we'll fill in this array with h/w max power levels */
1899                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
1900
1901                 /* divide factory saturation power by 2 to find -3dB level */
1902                 satur_pwr = (s8) (group->saturation_power >> 1);
1903
1904                 /* fill in channel group's nominal powers for each rate */
1905                 for (rate_index = 0;
1906                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
1907                         switch (rate_index) {
1908                         case IWL_RATE_36M_INDEX:
1909                                 if (i == 0)     /* B/G */
1910                                         *clip_pwrs = satur_pwr;
1911                                 else    /* A */
1912                                         *clip_pwrs = satur_pwr - 5;
1913                                 break;
1914                         case IWL_RATE_48M_INDEX:
1915                                 if (i == 0)
1916                                         *clip_pwrs = satur_pwr - 7;
1917                                 else
1918                                         *clip_pwrs = satur_pwr - 10;
1919                                 break;
1920                         case IWL_RATE_54M_INDEX:
1921                                 if (i == 0)
1922                                         *clip_pwrs = satur_pwr - 9;
1923                                 else
1924                                         *clip_pwrs = satur_pwr - 12;
1925                                 break;
1926                         default:
1927                                 *clip_pwrs = satur_pwr;
1928                                 break;
1929                         }
1930                 }
1931         }
1932 }
1933
1934 /**
1935  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
1936  *
1937  * Second pass (during init) to set up priv->channel_info
1938  *
1939  * Set up Tx-power settings in our channel info database for each VALID
1940  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
1941  * and current temperature.
1942  *
1943  * Since this is based on current temperature (at init time), these values may
1944  * not be valid for very long, but it gives us a starting/default point,
1945  * and allows us to active (i.e. using Tx) scan.
1946  *
1947  * This does *not* write values to NIC, just sets up our internal table.
1948  */
1949 int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv)
1950 {
1951         struct iwl_channel_info *ch_info = NULL;
1952         struct iwl_channel_power_info *pwr_info;
1953         int delta_index;
1954         u8 rate_index;
1955         u8 scan_tbl_index;
1956         const s8 *clip_pwrs;    /* array of power levels for each rate */
1957         u8 gain, dsp_atten;
1958         s8 power;
1959         u8 pwr_index, base_pwr_index, a_band;
1960         u8 i;
1961         int temperature;
1962
1963         /* save temperature reference,
1964          *   so we can determine next time to calibrate */
1965         temperature = iwl_hw_reg_txpower_get_temperature(priv);
1966         priv->last_temperature = temperature;
1967
1968         iwl_hw_reg_init_channel_groups(priv);
1969
1970         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
1971         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
1972              i++, ch_info++) {
1973                 a_band = is_channel_a_band(ch_info);
1974                 if (!is_channel_valid(ch_info))
1975                         continue;
1976
1977                 /* find this channel's channel group (*not* "band") index */
1978                 ch_info->group_index =
1979                         iwl_hw_reg_get_ch_grp_index(priv, ch_info);
1980
1981                 /* Get this chnlgrp's rate->max/clip-powers table */
1982                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1983
1984                 /* calculate power index *adjustment* value according to
1985                  *  diff between current temperature and factory temperature */
1986                 delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
1987                                 priv->eeprom.groups[ch_info->group_index].
1988                                 temperature);
1989
1990                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
1991                                 ch_info->channel, delta_index, temperature +
1992                                 IWL_TEMP_CONVERT);
1993
1994                 /* set tx power value for all OFDM rates */
1995                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
1996                      rate_index++) {
1997                         s32 power_idx;
1998                         int rc;
1999
2000                         /* use channel group's clip-power table,
2001                          *   but don't exceed channel's max power */
2002                         s8 pwr = min(ch_info->max_power_avg,
2003                                      clip_pwrs[rate_index]);
2004
2005                         pwr_info = &ch_info->power_info[rate_index];
2006
2007                         /* get base (i.e. at factory-measured temperature)
2008                          *    power table index for this rate's power */
2009                         rc = iwl_hw_reg_get_matched_power_index(priv, pwr,
2010                                                          ch_info->group_index,
2011                                                          &power_idx);
2012                         if (rc) {
2013                                 IWL_ERROR("Invalid power index\n");
2014                                 return rc;
2015                         }
2016                         pwr_info->base_power_index = (u8) power_idx;
2017
2018                         /* temperature compensate */
2019                         power_idx += delta_index;
2020
2021                         /* stay within range of gain table */
2022                         power_idx = iwl_hw_reg_fix_power_index(power_idx);
2023
2024                         /* fill 1 OFDM rate's iwl_channel_power_info struct */
2025                         pwr_info->requested_power = pwr;
2026                         pwr_info->power_table_index = (u8) power_idx;
2027                         pwr_info->tpc.tx_gain =
2028                             power_gain_table[a_band][power_idx].tx_gain;
2029                         pwr_info->tpc.dsp_atten =
2030                             power_gain_table[a_band][power_idx].dsp_atten;
2031                 }
2032
2033                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2034                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX];
2035                 power = pwr_info->requested_power +
2036                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2037                 pwr_index = pwr_info->power_table_index +
2038                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2039                 base_pwr_index = pwr_info->base_power_index +
2040                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2041
2042                 /* stay within table range */
2043                 pwr_index = iwl_hw_reg_fix_power_index(pwr_index);
2044                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2045                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2046
2047                 /* fill each CCK rate's iwl_channel_power_info structure
2048                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2049                  * NOTE:  CCK rates start at end of OFDM rates! */
2050                 for (rate_index = IWL_OFDM_RATES;
2051                      rate_index < IWL_RATE_COUNT; rate_index++) {
2052                         pwr_info = &ch_info->power_info[rate_index];
2053                         pwr_info->requested_power = power;
2054                         pwr_info->power_table_index = pwr_index;
2055                         pwr_info->base_power_index = base_pwr_index;
2056                         pwr_info->tpc.tx_gain = gain;
2057                         pwr_info->tpc.dsp_atten = dsp_atten;
2058                 }
2059
2060                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2061                 for (scan_tbl_index = 0;
2062                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2063                         s32 actual_index = (scan_tbl_index == 0) ?
2064                                 IWL_RATE_1M_INDEX : IWL_RATE_6M_INDEX;
2065                         iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
2066                                 actual_index, clip_pwrs, ch_info, a_band);
2067                 }
2068         }
2069
2070         return 0;
2071 }
2072
2073 int iwl_hw_rxq_stop(struct iwl_priv *priv)
2074 {
2075         int rc;
2076         unsigned long flags;
2077
2078         spin_lock_irqsave(&priv->lock, flags);
2079         rc = iwl_grab_restricted_access(priv);
2080         if (rc) {
2081                 spin_unlock_irqrestore(&priv->lock, flags);
2082                 return rc;
2083         }
2084
2085         iwl_write_restricted(priv, FH_RCSR_CONFIG(0), 0);
2086         rc = iwl_poll_restricted_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2087         if (rc < 0)
2088                 IWL_ERROR("Can't stop Rx DMA.\n");
2089
2090         iwl_release_restricted_access(priv);
2091         spin_unlock_irqrestore(&priv->lock, flags);
2092
2093         return 0;
2094 }
2095
2096 int iwl_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2097 {
2098         int rc;
2099         unsigned long flags;
2100         int txq_id = txq->q.id;
2101
2102         struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2103
2104         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2105
2106         spin_lock_irqsave(&priv->lock, flags);
2107         rc = iwl_grab_restricted_access(priv);
2108         if (rc) {
2109                 spin_unlock_irqrestore(&priv->lock, flags);
2110                 return rc;
2111         }
2112         iwl_write_restricted(priv, FH_CBCC_CTRL(txq_id), 0);
2113         iwl_write_restricted(priv, FH_CBCC_BASE(txq_id), 0);
2114
2115         iwl_write_restricted(priv, FH_TCSR_CONFIG(txq_id),
2116                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2117                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2118                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2119                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2120                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2121         iwl_release_restricted_access(priv);
2122
2123         /* fake read to flush all prev. writes */
2124         iwl_read32(priv, FH_TSSR_CBB_BASE);
2125         spin_unlock_irqrestore(&priv->lock, flags);
2126
2127         return 0;
2128 }
2129
2130 int iwl_hw_get_rx_read(struct iwl_priv *priv)
2131 {
2132         struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2133
2134         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2135 }
2136
2137 /**
2138  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2139  */
2140 int iwl3945_init_hw_rate_table(struct iwl_priv *priv)
2141 {
2142         int rc, i;
2143         struct iwl_rate_scaling_cmd rate_cmd = {
2144                 .reserved = {0, 0, 0},
2145         };
2146         struct iwl_rate_scaling_info *table = rate_cmd.table;
2147
2148         for (i = 0; i < ARRAY_SIZE(iwl_rates); i++) {
2149                 table[i].rate_n_flags =
2150                         iwl_hw_set_rate_n_flags(iwl_rates[i].plcp, 0);
2151                 table[i].try_cnt = priv->retry_rate;
2152                 table[i].next_rate_index = iwl_get_prev_ieee_rate(i);
2153         }
2154
2155         switch (priv->phymode) {
2156         case MODE_IEEE80211A:
2157                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2158                 /* If one of the following CCK rates is used,
2159                  * have it fall back to the 6M OFDM rate */
2160                 for (i = IWL_FIRST_CCK_RATE; i <= IWL_LAST_CCK_RATE; i++)
2161                         table[i].next_rate_index = IWL_FIRST_OFDM_RATE;
2162
2163                 /* Don't fall back to CCK rates */
2164                 table[IWL_RATE_12M_INDEX].next_rate_index = IWL_RATE_9M_INDEX;
2165
2166                 /* Don't drop out of OFDM rates */
2167                 table[IWL_FIRST_OFDM_RATE].next_rate_index =
2168                     IWL_FIRST_OFDM_RATE;
2169                 break;
2170
2171         case MODE_IEEE80211B:
2172                 IWL_DEBUG_RATE("Select B mode rate scale\n");
2173                 /* If an OFDM rate is used, have it fall back to the
2174                  * 1M CCK rates */
2175                 for (i = IWL_FIRST_OFDM_RATE; i <= IWL_LAST_OFDM_RATE; i++)
2176                         table[i].next_rate_index = IWL_FIRST_CCK_RATE;
2177
2178                 /* CCK shouldn't fall back to OFDM... */
2179                 table[IWL_RATE_11M_INDEX].next_rate_index = IWL_RATE_5M_INDEX;
2180                 break;
2181
2182         default:
2183                 IWL_DEBUG_RATE("Select G mode rate scale\n");
2184                 break;
2185         }
2186
2187         /* Update the rate scaling for control frame Tx */
2188         rate_cmd.table_id = 0;
2189         rc = iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2190                               &rate_cmd);
2191         if (rc)
2192                 return rc;
2193
2194         /* Update the rate scaling for data frame Tx */
2195         rate_cmd.table_id = 1;
2196         return iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2197                                 &rate_cmd);
2198 }
2199
2200 int iwl_hw_set_hw_setting(struct iwl_priv *priv)
2201 {
2202         memset((void *)&priv->hw_setting, 0,
2203                sizeof(struct iwl_driver_hw_info));
2204
2205         priv->hw_setting.shared_virt =
2206             pci_alloc_consistent(priv->pci_dev,
2207                                  sizeof(struct iwl_shared),
2208                                  &priv->hw_setting.shared_phys);
2209
2210         if (!priv->hw_setting.shared_virt) {
2211                 IWL_ERROR("failed to allocate pci memory\n");
2212                 mutex_unlock(&priv->mutex);
2213                 return -ENOMEM;
2214         }
2215
2216         priv->hw_setting.ac_queue_count = AC_NUM;
2217         priv->hw_setting.rx_buffer_size = IWL_RX_BUF_SIZE;
2218         priv->hw_setting.tx_cmd_len = sizeof(struct iwl_tx_cmd);
2219         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2220         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2221         priv->hw_setting.cck_flag = 0;
2222         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2223         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2224         return 0;
2225 }
2226
2227 unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
2228                           struct iwl_frame *frame, u8 rate)
2229 {
2230         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
2231         unsigned int frame_size;
2232
2233         tx_beacon_cmd = (struct iwl_tx_beacon_cmd *)&frame->u;
2234         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2235
2236         tx_beacon_cmd->tx.sta_id = IWL3945_BROADCAST_ID;
2237         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2238
2239         frame_size = iwl_fill_beacon_frame(priv,
2240                                 tx_beacon_cmd->frame,
2241                                 BROADCAST_ADDR,
2242                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2243
2244         BUG_ON(frame_size > MAX_MPDU_SIZE);
2245         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2246
2247         tx_beacon_cmd->tx.rate = rate;
2248         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2249                                       TX_CMD_FLG_TSF_MSK);
2250
2251         /* supp_rates[0] == OFDM  */
2252         tx_beacon_cmd->tx.supp_rates[0] = IWL_OFDM_BASIC_RATES_MASK;
2253
2254         /* supp_rates[1] == CCK
2255          *
2256          * NOTE:  IWL_*_RATES_MASK are not in the order that supp_rates
2257          * expects so we have to shift them around.
2258          *
2259          * supp_rates expects:
2260          * CCK rates are bit0..3
2261          *
2262          * However IWL_*_RATES_MASK has:
2263          * CCK rates are bit8..11
2264          */
2265         tx_beacon_cmd->tx.supp_rates[1] =
2266                 (IWL_CCK_BASIC_RATES_MASK >> 8) & 0xF;
2267
2268         return (sizeof(struct iwl_tx_beacon_cmd) + frame_size);
2269 }
2270
2271 void iwl_hw_rx_handler_setup(struct iwl_priv *priv)
2272 {
2273         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2274 }
2275
2276 void iwl_hw_setup_deferred_work(struct iwl_priv *priv)
2277 {
2278         INIT_DELAYED_WORK(&priv->thermal_periodic,
2279                           iwl3945_bg_reg_txpower_periodic);
2280 }
2281
2282 void iwl_hw_cancel_deferred_work(struct iwl_priv *priv)
2283 {
2284         cancel_delayed_work(&priv->thermal_periodic);
2285 }
2286
2287 struct pci_device_id iwl_hw_card_ids[] = {
2288         {0x8086, 0x4222, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2289         {0x8086, 0x4227, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2290         {0}
2291 };
2292
2293 inline int iwl_eeprom_aqcuire_semaphore(struct iwl_priv *priv)
2294 {
2295         _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2296         return 0;
2297 }
2298
2299 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);