[PATCH] tulip: add return to ULI526X clause in tulip_mdio_write
[linux-3.10.git] / drivers / net / tulip / media.c
1 /*
2         drivers/net/tulip/media.c
3
4         Maintained by Jeff Garzik <jgarzik@pobox.com>
5         Copyright 2000,2001  The Linux Kernel Team
6         Written/copyright 1994-2001 by Donald Becker.
7
8         This software may be used and distributed according to the terms
9         of the GNU General Public License, incorporated herein by reference.
10
11         Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
12         for more information on this driver, or visit the project
13         Web page at http://sourceforge.net/projects/tulip/
14
15 */
16
17 #include <linux/kernel.h>
18 #include <linux/mii.h>
19 #include <linux/init.h>
20 #include <linux/delay.h>
21 #include <linux/pci.h>
22 #include "tulip.h"
23
24
25 /* The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
26    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
27    "overclocking" issues or future 66Mhz PCI. */
28 #define mdio_delay() ioread32(mdio_addr)
29
30 /* Read and write the MII registers using software-generated serial
31    MDIO protocol.  It is just different enough from the EEPROM protocol
32    to not share code.  The maxium data clock rate is 2.5 Mhz. */
33 #define MDIO_SHIFT_CLK          0x10000
34 #define MDIO_DATA_WRITE0        0x00000
35 #define MDIO_DATA_WRITE1        0x20000
36 #define MDIO_ENB                0x00000 /* Ignore the 0x02000 databook setting. */
37 #define MDIO_ENB_IN             0x40000
38 #define MDIO_DATA_READ          0x80000
39
40 static const unsigned char comet_miireg2offset[32] = {
41         0xB4, 0xB8, 0xBC, 0xC0,  0xC4, 0xC8, 0xCC, 0,  0,0,0,0,  0,0,0,0,
42         0,0xD0,0,0,  0,0,0,0,  0,0,0,0, 0, 0xD4, 0xD8, 0xDC, };
43
44
45 /* MII transceiver control section.
46    Read and write the MII registers using software-generated serial
47    MDIO protocol.  See the MII specifications or DP83840A data sheet
48    for details. */
49
50 int tulip_mdio_read(struct net_device *dev, int phy_id, int location)
51 {
52         struct tulip_private *tp = netdev_priv(dev);
53         int i;
54         int read_cmd = (0xf6 << 10) | ((phy_id & 0x1f) << 5) | location;
55         int retval = 0;
56         void __iomem *ioaddr = tp->base_addr;
57         void __iomem *mdio_addr = ioaddr + CSR9;
58         unsigned long flags;
59
60         if (location & ~0x1f)
61                 return 0xffff;
62
63         if (tp->chip_id == COMET  &&  phy_id == 30) {
64                 if (comet_miireg2offset[location])
65                         return ioread32(ioaddr + comet_miireg2offset[location]);
66                 return 0xffff;
67         }
68
69         spin_lock_irqsave(&tp->mii_lock, flags);
70         if (tp->chip_id == LC82C168) {
71                 int i = 1000;
72                 iowrite32(0x60020000 + (phy_id<<23) + (location<<18), ioaddr + 0xA0);
73                 ioread32(ioaddr + 0xA0);
74                 ioread32(ioaddr + 0xA0);
75                 while (--i > 0) {
76                         barrier();
77                         if ( ! ((retval = ioread32(ioaddr + 0xA0)) & 0x80000000))
78                                 break;
79                 }
80                 spin_unlock_irqrestore(&tp->mii_lock, flags);
81                 return retval & 0xffff;
82         }
83
84         if(tp->chip_id == ULI526X && tp->revision >= 0x40) {
85                 int value;
86                 int i = 1000;
87                 
88                 value = ioread32(ioaddr + CSR9);
89                 iowrite32(value & 0xFFEFFFFF, ioaddr + CSR9);
90                 
91                 value = (phy_id << 21) | (location << 16) | 0x08000000;
92                 iowrite32(value, ioaddr + CSR10);
93                 
94                 while(--i > 0) {
95                         mdio_delay();
96                         if(ioread32(ioaddr + CSR10) & 0x10000000)
97                                 break;
98                 }
99                 retval = ioread32(ioaddr + CSR10);
100                 spin_unlock_irqrestore(&tp->mii_lock, flags);
101                 return retval & 0xFFFF;
102         }
103         /* Establish sync by sending at least 32 logic ones. */
104         for (i = 32; i >= 0; i--) {
105                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
106                 mdio_delay();
107                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
108                 mdio_delay();
109         }
110         /* Shift the read command bits out. */
111         for (i = 15; i >= 0; i--) {
112                 int dataval = (read_cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
113
114                 iowrite32(MDIO_ENB | dataval, mdio_addr);
115                 mdio_delay();
116                 iowrite32(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
117                 mdio_delay();
118         }
119         /* Read the two transition, 16 data, and wire-idle bits. */
120         for (i = 19; i > 0; i--) {
121                 iowrite32(MDIO_ENB_IN, mdio_addr);
122                 mdio_delay();
123                 retval = (retval << 1) | ((ioread32(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
124                 iowrite32(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
125                 mdio_delay();
126         }
127
128         spin_unlock_irqrestore(&tp->mii_lock, flags);
129         return (retval>>1) & 0xffff;
130 }
131
132 void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int val)
133 {
134         struct tulip_private *tp = netdev_priv(dev);
135         int i;
136         int cmd = (0x5002 << 16) | ((phy_id & 0x1f) << 23) | (location<<18) | (val & 0xffff);
137         void __iomem *ioaddr = tp->base_addr;
138         void __iomem *mdio_addr = ioaddr + CSR9;
139         unsigned long flags;
140
141         if (location & ~0x1f)
142                 return;
143
144         if (tp->chip_id == COMET && phy_id == 30) {
145                 if (comet_miireg2offset[location])
146                         iowrite32(val, ioaddr + comet_miireg2offset[location]);
147                 return;
148         }
149
150         spin_lock_irqsave(&tp->mii_lock, flags);
151         if (tp->chip_id == LC82C168) {
152                 int i = 1000;
153                 iowrite32(cmd, ioaddr + 0xA0);
154                 do {
155                         barrier();
156                         if ( ! (ioread32(ioaddr + 0xA0) & 0x80000000))
157                                 break;
158                 } while (--i > 0);
159                 spin_unlock_irqrestore(&tp->mii_lock, flags);
160                 return;
161         }
162         if (tp->chip_id == ULI526X && tp->revision >= 0x40) {
163                 int value;
164                 int i = 1000;
165                 
166                 value = ioread32(ioaddr + CSR9);
167                 iowrite32(value & 0xFFEFFFFF, ioaddr + CSR9);
168                 
169                 value = (phy_id << 21) | (location << 16) | 0x04000000 | (val & 0xFFFF);
170                 iowrite32(value, ioaddr + CSR10);
171                 
172                 while(--i > 0) {
173                         if (ioread32(ioaddr + CSR10) & 0x10000000)
174                                 break;
175                 }
176                 spin_unlock_irqrestore(&tp->mii_lock, flags);
177                 return;
178         }
179                 
180         /* Establish sync by sending 32 logic ones. */
181         for (i = 32; i >= 0; i--) {
182                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
183                 mdio_delay();
184                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
185                 mdio_delay();
186         }
187         /* Shift the command bits out. */
188         for (i = 31; i >= 0; i--) {
189                 int dataval = (cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
190                 iowrite32(MDIO_ENB | dataval, mdio_addr);
191                 mdio_delay();
192                 iowrite32(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
193                 mdio_delay();
194         }
195         /* Clear out extra bits. */
196         for (i = 2; i > 0; i--) {
197                 iowrite32(MDIO_ENB_IN, mdio_addr);
198                 mdio_delay();
199                 iowrite32(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
200                 mdio_delay();
201         }
202
203         spin_unlock_irqrestore(&tp->mii_lock, flags);
204 }
205
206
207 /* Set up the transceiver control registers for the selected media type. */
208 void tulip_select_media(struct net_device *dev, int startup)
209 {
210         struct tulip_private *tp = netdev_priv(dev);
211         void __iomem *ioaddr = tp->base_addr;
212         struct mediatable *mtable = tp->mtable;
213         u32 new_csr6;
214         int i;
215
216         if (mtable) {
217                 struct medialeaf *mleaf = &mtable->mleaf[tp->cur_index];
218                 unsigned char *p = mleaf->leafdata;
219                 switch (mleaf->type) {
220                 case 0:                                 /* 21140 non-MII xcvr. */
221                         if (tulip_debug > 1)
222                                 printk(KERN_DEBUG "%s: Using a 21140 non-MII transceiver"
223                                            " with control setting %2.2x.\n",
224                                            dev->name, p[1]);
225                         dev->if_port = p[0];
226                         if (startup)
227                                 iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
228                         iowrite32(p[1], ioaddr + CSR12);
229                         new_csr6 = 0x02000000 | ((p[2] & 0x71) << 18);
230                         break;
231                 case 2: case 4: {
232                         u16 setup[5];
233                         u32 csr13val, csr14val, csr15dir, csr15val;
234                         for (i = 0; i < 5; i++)
235                                 setup[i] = get_u16(&p[i*2 + 1]);
236
237                         dev->if_port = p[0] & MEDIA_MASK;
238                         if (tulip_media_cap[dev->if_port] & MediaAlwaysFD)
239                                 tp->full_duplex = 1;
240
241                         if (startup && mtable->has_reset) {
242                                 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
243                                 unsigned char *rst = rleaf->leafdata;
244                                 if (tulip_debug > 1)
245                                         printk(KERN_DEBUG "%s: Resetting the transceiver.\n",
246                                                    dev->name);
247                                 for (i = 0; i < rst[0]; i++)
248                                         iowrite32(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
249                         }
250                         if (tulip_debug > 1)
251                                 printk(KERN_DEBUG "%s: 21143 non-MII %s transceiver control "
252                                            "%4.4x/%4.4x.\n",
253                                            dev->name, medianame[dev->if_port], setup[0], setup[1]);
254                         if (p[0] & 0x40) {      /* SIA (CSR13-15) setup values are provided. */
255                                 csr13val = setup[0];
256                                 csr14val = setup[1];
257                                 csr15dir = (setup[3]<<16) | setup[2];
258                                 csr15val = (setup[4]<<16) | setup[2];
259                                 iowrite32(0, ioaddr + CSR13);
260                                 iowrite32(csr14val, ioaddr + CSR14);
261                                 iowrite32(csr15dir, ioaddr + CSR15);    /* Direction */
262                                 iowrite32(csr15val, ioaddr + CSR15);    /* Data */
263                                 iowrite32(csr13val, ioaddr + CSR13);
264                         } else {
265                                 csr13val = 1;
266                                 csr14val = 0;
267                                 csr15dir = (setup[0]<<16) | 0x0008;
268                                 csr15val = (setup[1]<<16) | 0x0008;
269                                 if (dev->if_port <= 4)
270                                         csr14val = t21142_csr14[dev->if_port];
271                                 if (startup) {
272                                         iowrite32(0, ioaddr + CSR13);
273                                         iowrite32(csr14val, ioaddr + CSR14);
274                                 }
275                                 iowrite32(csr15dir, ioaddr + CSR15);    /* Direction */
276                                 iowrite32(csr15val, ioaddr + CSR15);    /* Data */
277                                 if (startup) iowrite32(csr13val, ioaddr + CSR13);
278                         }
279                         if (tulip_debug > 1)
280                                 printk(KERN_DEBUG "%s:  Setting CSR15 to %8.8x/%8.8x.\n",
281                                            dev->name, csr15dir, csr15val);
282                         if (mleaf->type == 4)
283                                 new_csr6 = 0x82020000 | ((setup[2] & 0x71) << 18);
284                         else
285                                 new_csr6 = 0x82420000;
286                         break;
287                 }
288                 case 1: case 3: {
289                         int phy_num = p[0];
290                         int init_length = p[1];
291                         u16 *misc_info, tmp_info;
292
293                         dev->if_port = 11;
294                         new_csr6 = 0x020E0000;
295                         if (mleaf->type == 3) { /* 21142 */
296                                 u16 *init_sequence = (u16*)(p+2);
297                                 u16 *reset_sequence = &((u16*)(p+3))[init_length];
298                                 int reset_length = p[2 + init_length*2];
299                                 misc_info = reset_sequence + reset_length;
300                                 if (startup)
301                                         for (i = 0; i < reset_length; i++)
302                                                 iowrite32(get_u16(&reset_sequence[i]) << 16, ioaddr + CSR15);
303                                 for (i = 0; i < init_length; i++)
304                                         iowrite32(get_u16(&init_sequence[i]) << 16, ioaddr + CSR15);
305                         } else {
306                                 u8 *init_sequence = p + 2;
307                                 u8 *reset_sequence = p + 3 + init_length;
308                                 int reset_length = p[2 + init_length];
309                                 misc_info = (u16*)(reset_sequence + reset_length);
310                                 if (startup) {
311                                         iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
312                                         for (i = 0; i < reset_length; i++)
313                                                 iowrite32(reset_sequence[i], ioaddr + CSR12);
314                                 }
315                                 for (i = 0; i < init_length; i++)
316                                         iowrite32(init_sequence[i], ioaddr + CSR12);
317                         }
318                         tmp_info = get_u16(&misc_info[1]);
319                         if (tmp_info)
320                                 tp->advertising[phy_num] = tmp_info | 1;
321                         if (tmp_info && startup < 2) {
322                                 if (tp->mii_advertise == 0)
323                                         tp->mii_advertise = tp->advertising[phy_num];
324                                 if (tulip_debug > 1)
325                                         printk(KERN_DEBUG "%s:  Advertising %4.4x on MII %d.\n",
326                                                dev->name, tp->mii_advertise, tp->phys[phy_num]);
327                                 tulip_mdio_write(dev, tp->phys[phy_num], 4, tp->mii_advertise);
328                         }
329                         break;
330                 }
331                 case 5: case 6: {
332                         u16 setup[5];
333
334                         new_csr6 = 0; /* FIXME */
335
336                         for (i = 0; i < 5; i++)
337                                 setup[i] = get_u16(&p[i*2 + 1]);
338
339                         if (startup && mtable->has_reset) {
340                                 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
341                                 unsigned char *rst = rleaf->leafdata;
342                                 if (tulip_debug > 1)
343                                         printk(KERN_DEBUG "%s: Resetting the transceiver.\n",
344                                                    dev->name);
345                                 for (i = 0; i < rst[0]; i++)
346                                         iowrite32(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
347                         }
348
349                         break;
350                 }
351                 default:
352                         printk(KERN_DEBUG "%s:  Invalid media table selection %d.\n",
353                                            dev->name, mleaf->type);
354                         new_csr6 = 0x020E0000;
355                 }
356                 if (tulip_debug > 1)
357                         printk(KERN_DEBUG "%s: Using media type %s, CSR12 is %2.2x.\n",
358                                    dev->name, medianame[dev->if_port],
359                                    ioread32(ioaddr + CSR12) & 0xff);
360         } else if (tp->chip_id == LC82C168) {
361                 if (startup && ! tp->medialock)
362                         dev->if_port = tp->mii_cnt ? 11 : 0;
363                 if (tulip_debug > 1)
364                         printk(KERN_DEBUG "%s: PNIC PHY status is %3.3x, media %s.\n",
365                                    dev->name, ioread32(ioaddr + 0xB8), medianame[dev->if_port]);
366                 if (tp->mii_cnt) {
367                         new_csr6 = 0x810C0000;
368                         iowrite32(0x0001, ioaddr + CSR15);
369                         iowrite32(0x0201B07A, ioaddr + 0xB8);
370                 } else if (startup) {
371                         /* Start with 10mbps to do autonegotiation. */
372                         iowrite32(0x32, ioaddr + CSR12);
373                         new_csr6 = 0x00420000;
374                         iowrite32(0x0001B078, ioaddr + 0xB8);
375                         iowrite32(0x0201B078, ioaddr + 0xB8);
376                 } else if (dev->if_port == 3  ||  dev->if_port == 5) {
377                         iowrite32(0x33, ioaddr + CSR12);
378                         new_csr6 = 0x01860000;
379                         /* Trigger autonegotiation. */
380                         iowrite32(startup ? 0x0201F868 : 0x0001F868, ioaddr + 0xB8);
381                 } else {
382                         iowrite32(0x32, ioaddr + CSR12);
383                         new_csr6 = 0x00420000;
384                         iowrite32(0x1F078, ioaddr + 0xB8);
385                 }
386         } else {                                        /* Unknown chip type with no media table. */
387                 if (tp->default_port == 0)
388                         dev->if_port = tp->mii_cnt ? 11 : 3;
389                 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
390                         new_csr6 = 0x020E0000;
391                 } else if (tulip_media_cap[dev->if_port] & MediaIsFx) {
392                         new_csr6 = 0x02860000;
393                 } else
394                         new_csr6 = 0x03860000;
395                 if (tulip_debug > 1)
396                         printk(KERN_DEBUG "%s: No media description table, assuming "
397                                    "%s transceiver, CSR12 %2.2x.\n",
398                                    dev->name, medianame[dev->if_port],
399                                    ioread32(ioaddr + CSR12));
400         }
401
402         tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0);
403         return;
404 }
405
406 /*
407   Check the MII negotiated duplex and change the CSR6 setting if
408   required.
409   Return 0 if everything is OK.
410   Return < 0 if the transceiver is missing or has no link beat.
411   */
412 int tulip_check_duplex(struct net_device *dev)
413 {
414         struct tulip_private *tp = netdev_priv(dev);
415         unsigned int bmsr, lpa, negotiated, new_csr6;
416
417         bmsr = tulip_mdio_read(dev, tp->phys[0], MII_BMSR);
418         lpa = tulip_mdio_read(dev, tp->phys[0], MII_LPA);
419         if (tulip_debug > 1)
420                 printk(KERN_INFO "%s: MII status %4.4x, Link partner report "
421                            "%4.4x.\n", dev->name, bmsr, lpa);
422         if (bmsr == 0xffff)
423                 return -2;
424         if ((bmsr & BMSR_LSTATUS) == 0) {
425                 int new_bmsr = tulip_mdio_read(dev, tp->phys[0], MII_BMSR);
426                 if ((new_bmsr & BMSR_LSTATUS) == 0) {
427                         if (tulip_debug  > 1)
428                                 printk(KERN_INFO "%s: No link beat on the MII interface,"
429                                            " status %4.4x.\n", dev->name, new_bmsr);
430                         return -1;
431                 }
432         }
433         negotiated = lpa & tp->advertising[0];
434         tp->full_duplex = mii_duplex(tp->full_duplex_lock, negotiated);
435
436         new_csr6 = tp->csr6;
437
438         if (negotiated & LPA_100) new_csr6 &= ~TxThreshold;
439         else                      new_csr6 |= TxThreshold;
440         if (tp->full_duplex) new_csr6 |= FullDuplex;
441         else                 new_csr6 &= ~FullDuplex;
442
443         if (new_csr6 != tp->csr6) {
444                 tp->csr6 = new_csr6;
445                 tulip_restart_rxtx(tp);
446
447                 if (tulip_debug > 0)
448                         printk(KERN_INFO "%s: Setting %s-duplex based on MII"
449                                    "#%d link partner capability of %4.4x.\n",
450                                    dev->name, tp->full_duplex ? "full" : "half",
451                                    tp->phys[0], lpa);
452                 return 1;
453         }
454
455         return 0;
456 }
457
458 void __devinit tulip_find_mii (struct net_device *dev, int board_idx)
459 {
460         struct tulip_private *tp = netdev_priv(dev);
461         int phyn, phy_idx = 0;
462         int mii_reg0;
463         int mii_advert;
464         unsigned int to_advert, new_bmcr, ane_switch;
465
466         /* Find the connected MII xcvrs.
467            Doing this in open() would allow detecting external xcvrs later,
468            but takes much time. */
469         for (phyn = 1; phyn <= 32 && phy_idx < sizeof (tp->phys); phyn++) {
470                 int phy = phyn & 0x1f;
471                 int mii_status = tulip_mdio_read (dev, phy, MII_BMSR);
472                 if ((mii_status & 0x8301) == 0x8001 ||
473                     ((mii_status & BMSR_100BASE4) == 0
474                      && (mii_status & 0x7800) != 0)) {
475                         /* preserve Becker logic, gain indentation level */
476                 } else {
477                         continue;
478                 }
479
480                 mii_reg0 = tulip_mdio_read (dev, phy, MII_BMCR);
481                 mii_advert = tulip_mdio_read (dev, phy, MII_ADVERTISE);
482                 ane_switch = 0;
483
484                 /* if not advertising at all, gen an
485                  * advertising value from the capability
486                  * bits in BMSR
487                  */
488                 if ((mii_advert & ADVERTISE_ALL) == 0) {
489                         unsigned int tmpadv = tulip_mdio_read (dev, phy, MII_BMSR);
490                         mii_advert = ((tmpadv >> 6) & 0x3e0) | 1;
491                 }
492
493                 if (tp->mii_advertise) {
494                         tp->advertising[phy_idx] =
495                         to_advert = tp->mii_advertise;
496                 } else if (tp->advertising[phy_idx]) {
497                         to_advert = tp->advertising[phy_idx];
498                 } else {
499                         tp->advertising[phy_idx] =
500                         tp->mii_advertise =
501                         to_advert = mii_advert;
502                 }
503
504                 tp->phys[phy_idx++] = phy;
505
506                 printk (KERN_INFO "tulip%d:  MII transceiver #%d "
507                         "config %4.4x status %4.4x advertising %4.4x.\n",
508                         board_idx, phy, mii_reg0, mii_status, mii_advert);
509
510                 /* Fixup for DLink with miswired PHY. */
511                 if (mii_advert != to_advert) {
512                         printk (KERN_DEBUG "tulip%d:  Advertising %4.4x on PHY %d,"
513                                 " previously advertising %4.4x.\n",
514                                 board_idx, to_advert, phy, mii_advert);
515                         tulip_mdio_write (dev, phy, 4, to_advert);
516                 }
517
518                 /* Enable autonegotiation: some boards default to off. */
519                 if (tp->default_port == 0) {
520                         new_bmcr = mii_reg0 | BMCR_ANENABLE;
521                         if (new_bmcr != mii_reg0) {
522                                 new_bmcr |= BMCR_ANRESTART;
523                                 ane_switch = 1;
524                         }
525                 }
526                 /* ...or disable nway, if forcing media */
527                 else {
528                         new_bmcr = mii_reg0 & ~BMCR_ANENABLE;
529                         if (new_bmcr != mii_reg0)
530                                 ane_switch = 1;
531                 }
532
533                 /* clear out bits we never want at this point */
534                 new_bmcr &= ~(BMCR_CTST | BMCR_FULLDPLX | BMCR_ISOLATE |
535                               BMCR_PDOWN | BMCR_SPEED100 | BMCR_LOOPBACK |
536                               BMCR_RESET);
537
538                 if (tp->full_duplex)
539                         new_bmcr |= BMCR_FULLDPLX;
540                 if (tulip_media_cap[tp->default_port] & MediaIs100)
541                         new_bmcr |= BMCR_SPEED100;
542
543                 if (new_bmcr != mii_reg0) {
544                         /* some phys need the ANE switch to
545                          * happen before forced media settings
546                          * will "take."  However, we write the
547                          * same value twice in order not to
548                          * confuse the sane phys.
549                          */
550                         if (ane_switch) {
551                                 tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr);
552                                 udelay (10);
553                         }
554                         tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr);
555                 }
556         }
557         tp->mii_cnt = phy_idx;
558         if (tp->mtable && tp->mtable->has_mii && phy_idx == 0) {
559                 printk (KERN_INFO "tulip%d: ***WARNING***: No MII transceiver found!\n",
560                         board_idx);
561                 tp->phys[0] = 1;
562         }
563 }