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[linux-3.10.git] / arch / xtensa / kernel / setup.c
1 /*
2  * arch/xtensa/kernel/setup.c
3  *
4  * This file is subject to the terms and conditions of the GNU General Public
5  * License.  See the file "COPYING" in the main directory of this archive
6  * for more details.
7  *
8  * Copyright (C) 1995  Linus Torvalds
9  * Copyright (C) 2001 - 2005  Tensilica Inc.
10  *
11  * Chris Zankel <chris@zankel.net>
12  * Joe Taylor   <joe@tensilica.com, joetylr@yahoo.com>
13  * Kevin Chea
14  * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
15  */
16
17 #include <linux/errno.h>
18 #include <linux/init.h>
19 #include <linux/proc_fs.h>
20 #include <linux/screen_info.h>
21 #include <linux/bootmem.h>
22 #include <linux/kernel.h>
23
24 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
25 # include <linux/console.h>
26 #endif
27
28 #ifdef CONFIG_RTC
29 # include <linux/timex.h>
30 #endif
31
32 #ifdef CONFIG_PROC_FS
33 # include <linux/seq_file.h>
34 #endif
35
36 #include <asm/system.h>
37 #include <asm/bootparam.h>
38 #include <asm/pgtable.h>
39 #include <asm/processor.h>
40 #include <asm/timex.h>
41 #include <asm/platform.h>
42 #include <asm/page.h>
43 #include <asm/setup.h>
44 #include <asm/param.h>
45
46 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
47 struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
48 #endif
49
50 #ifdef CONFIG_BLK_DEV_FD
51 extern struct fd_ops no_fd_ops;
52 struct fd_ops *fd_ops;
53 #endif
54
55 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
56 extern struct ide_ops no_ide_ops;
57 struct ide_ops *ide_ops;
58 #endif
59
60 extern struct rtc_ops no_rtc_ops;
61 struct rtc_ops *rtc_ops;
62
63 #ifdef CONFIG_PC_KEYB
64 extern struct kbd_ops no_kbd_ops;
65 struct kbd_ops *kbd_ops;
66 #endif
67
68 #ifdef CONFIG_BLK_DEV_INITRD
69 extern void *initrd_start;
70 extern void *initrd_end;
71 extern void *__initrd_start;
72 extern void *__initrd_end;
73 int initrd_is_mapped = 0;
74 extern int initrd_below_start_ok;
75 #endif
76
77 unsigned char aux_device_present;
78 extern unsigned long loops_per_jiffy;
79
80 /* Command line specified as configuration option. */
81
82 static char __initdata command_line[COMMAND_LINE_SIZE];
83
84 #ifdef CONFIG_CMDLINE_BOOL
85 static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
86 #endif
87
88 sysmem_info_t __initdata sysmem;
89
90 #ifdef CONFIG_BLK_DEV_INITRD
91 int initrd_is_mapped;
92 #endif
93
94 extern void init_mmu(void);
95
96 /*
97  * Boot parameter parsing.
98  *
99  * The Xtensa port uses a list of variable-sized tags to pass data to
100  * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
101  * to be recognised. The list is terminated with a zero-sized
102  * BP_TAG_LAST tag.
103  */
104
105 typedef struct tagtable {
106         u32 tag;
107         int (*parse)(const bp_tag_t*);
108 } tagtable_t;
109
110 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn           \
111         __attribute__((unused, __section__(".taglist"))) = { tag, fn }
112
113 /* parse current tag */
114
115 static int __init parse_tag_mem(const bp_tag_t *tag)
116 {
117         meminfo_t *mi = (meminfo_t*)(tag->data);
118
119         if (mi->type != MEMORY_TYPE_CONVENTIONAL)
120                 return -1;
121
122         if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
123                 printk(KERN_WARNING
124                        "Ignoring memory bank 0x%08lx size %ldKB\n",
125                        (unsigned long)mi->start,
126                        (unsigned long)mi->end - (unsigned long)mi->start);
127                 return -EINVAL;
128         }
129         sysmem.bank[sysmem.nr_banks].type  = mi->type;
130         sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start);
131         sysmem.bank[sysmem.nr_banks].end   = mi->end & PAGE_SIZE;
132         sysmem.nr_banks++;
133
134         return 0;
135 }
136
137 __tagtable(BP_TAG_MEMORY, parse_tag_mem);
138
139 #ifdef CONFIG_BLK_DEV_INITRD
140
141 static int __init parse_tag_initrd(const bp_tag_t* tag)
142 {
143         meminfo_t* mi;
144         mi = (meminfo_t*)(tag->data);
145         initrd_start = (void*)(mi->start);
146         initrd_end = (void*)(mi->end);
147
148         return 0;
149 }
150
151 __tagtable(BP_TAG_INITRD, parse_tag_initrd);
152
153 #endif /* CONFIG_BLK_DEV_INITRD */
154
155 static int __init parse_tag_cmdline(const bp_tag_t* tag)
156 {
157         strncpy(command_line, (char*)(tag->data), COMMAND_LINE_SIZE);
158         command_line[COMMAND_LINE_SIZE - 1] = '\0';
159         return 0;
160 }
161
162 __tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);
163
164 static int __init parse_bootparam(const bp_tag_t* tag)
165 {
166         extern tagtable_t __tagtable_begin, __tagtable_end;
167         tagtable_t *t;
168
169         /* Boot parameters must start with a BP_TAG_FIRST tag. */
170
171         if (tag->id != BP_TAG_FIRST) {
172                 printk(KERN_WARNING "Invalid boot parameters!\n");
173                 return 0;
174         }
175
176         tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);
177
178         /* Parse all tags. */
179
180         while (tag != NULL && tag->id != BP_TAG_LAST) {
181                 for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
182                         if (tag->id == t->tag) {
183                                 t->parse(tag);
184                                 break;
185                         }
186                 }
187                 if (t == &__tagtable_end)
188                         printk(KERN_WARNING "Ignoring tag "
189                                "0x%08x\n", tag->id);
190                 tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
191         }
192
193         return 0;
194 }
195
196 /*
197  * Initialize architecture. (Early stage)
198  */
199
200 void __init init_arch(bp_tag_t *bp_start)
201 {
202
203 #ifdef CONFIG_BLK_DEV_INITRD
204         initrd_start = &__initrd_start;
205         initrd_end = &__initrd_end;
206 #endif
207
208         sysmem.nr_banks = 0;
209
210 #ifdef CONFIG_CMDLINE_BOOL
211         strcpy(command_line, default_command_line);
212 #endif
213
214         /* Parse boot parameters */
215
216         if (bp_start)
217           parse_bootparam(bp_start);
218
219         if (sysmem.nr_banks == 0) {
220                 sysmem.nr_banks = 1;
221                 sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
222                 sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
223                                      + PLATFORM_DEFAULT_MEM_SIZE;
224         }
225
226         /* Early hook for platforms */
227
228         platform_init(bp_start);
229
230         /* Initialize MMU. */
231
232         init_mmu();
233 }
234
235 /*
236  * Initialize system. Setup memory and reserve regions.
237  */
238
239 extern char _end;
240 extern char _stext;
241 extern char _WindowVectors_text_start;
242 extern char _WindowVectors_text_end;
243 extern char _DebugInterruptVector_literal_start;
244 extern char _DebugInterruptVector_text_end;
245 extern char _KernelExceptionVector_literal_start;
246 extern char _KernelExceptionVector_text_end;
247 extern char _UserExceptionVector_literal_start;
248 extern char _UserExceptionVector_text_end;
249 extern char _DoubleExceptionVector_literal_start;
250 extern char _DoubleExceptionVector_text_end;
251
252 void __init setup_arch(char **cmdline_p)
253 {
254         extern int mem_reserve(unsigned long, unsigned long, int);
255         extern void bootmem_init(void);
256
257         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
258         boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
259         *cmdline_p = command_line;
260
261         /* Reserve some memory regions */
262
263 #ifdef CONFIG_BLK_DEV_INITRD
264         if (initrd_start < initrd_end) {
265                 initrd_is_mapped = mem_reserve(__pa(initrd_start),
266                                                __pa(initrd_end), 0);
267                 initrd_below_start_ok = 1;
268         } else {
269                 initrd_start = 0;
270         }
271 #endif
272
273         mem_reserve(__pa(&_stext),__pa(&_end), 1);
274
275         mem_reserve(__pa(&_WindowVectors_text_start),
276                     __pa(&_WindowVectors_text_end), 0);
277
278         mem_reserve(__pa(&_DebugInterruptVector_literal_start),
279                     __pa(&_DebugInterruptVector_text_end), 0);
280
281         mem_reserve(__pa(&_KernelExceptionVector_literal_start),
282                     __pa(&_KernelExceptionVector_text_end), 0);
283
284         mem_reserve(__pa(&_UserExceptionVector_literal_start),
285                     __pa(&_UserExceptionVector_text_end), 0);
286
287         mem_reserve(__pa(&_DoubleExceptionVector_literal_start),
288                     __pa(&_DoubleExceptionVector_text_end), 0);
289
290         bootmem_init();
291
292         platform_setup(cmdline_p);
293
294
295         paging_init();
296
297 #ifdef CONFIG_VT
298 # if defined(CONFIG_VGA_CONSOLE)
299         conswitchp = &vga_con;
300 # elif defined(CONFIG_DUMMY_CONSOLE)
301         conswitchp = &dummy_con;
302 # endif
303 #endif
304
305 #ifdef CONFIG_PCI
306         platform_pcibios_init();
307 #endif
308 }
309
310 void machine_restart(char * cmd)
311 {
312         platform_restart();
313 }
314
315 void machine_halt(void)
316 {
317         platform_halt();
318         while (1);
319 }
320
321 void machine_power_off(void)
322 {
323         platform_power_off();
324         while (1);
325 }
326 #ifdef CONFIG_PROC_FS
327
328 /*
329  * Display some core information through /proc/cpuinfo.
330  */
331
332 static int
333 c_show(struct seq_file *f, void *slot)
334 {
335         /* high-level stuff */
336         seq_printf(f,"processor\t: 0\n"
337                      "vendor_id\t: Tensilica\n"
338                      "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n"
339                      "core ID\t\t: " XCHAL_CORE_ID "\n"
340                      "build ID\t: 0x%x\n"
341                      "byte order\t: %s\n"
342                      "cpu MHz\t\t: %lu.%02lu\n"
343                      "bogomips\t: %lu.%02lu\n",
344                      XCHAL_BUILD_UNIQUE_ID,
345                      XCHAL_HAVE_BE ?  "big" : "little",
346                      CCOUNT_PER_JIFFY/(1000000/HZ),
347                      (CCOUNT_PER_JIFFY/(10000/HZ)) % 100,
348                      loops_per_jiffy/(500000/HZ),
349                      (loops_per_jiffy/(5000/HZ)) % 100);
350
351         seq_printf(f,"flags\t\t: "
352 #if XCHAL_HAVE_NMI
353                      "nmi "
354 #endif
355 #if XCHAL_HAVE_DEBUG
356                      "debug "
357 # if XCHAL_HAVE_OCD
358                      "ocd "
359 # endif
360 #endif
361 #if XCHAL_HAVE_DENSITY
362                      "density "
363 #endif
364 #if XCHAL_HAVE_BOOLEANS
365                      "boolean "
366 #endif
367 #if XCHAL_HAVE_LOOPS
368                      "loop "
369 #endif
370 #if XCHAL_HAVE_NSA
371                      "nsa "
372 #endif
373 #if XCHAL_HAVE_MINMAX
374                      "minmax "
375 #endif
376 #if XCHAL_HAVE_SEXT
377                      "sext "
378 #endif
379 #if XCHAL_HAVE_CLAMPS
380                      "clamps "
381 #endif
382 #if XCHAL_HAVE_MAC16
383                      "mac16 "
384 #endif
385 #if XCHAL_HAVE_MUL16
386                      "mul16 "
387 #endif
388 #if XCHAL_HAVE_MUL32
389                      "mul32 "
390 #endif
391 #if XCHAL_HAVE_MUL32_HIGH
392                      "mul32h "
393 #endif
394 #if XCHAL_HAVE_FP
395                      "fpu "
396 #endif
397                      "\n");
398
399         /* Registers. */
400         seq_printf(f,"physical aregs\t: %d\n"
401                      "misc regs\t: %d\n"
402                      "ibreak\t\t: %d\n"
403                      "dbreak\t\t: %d\n",
404                      XCHAL_NUM_AREGS,
405                      XCHAL_NUM_MISC_REGS,
406                      XCHAL_NUM_IBREAK,
407                      XCHAL_NUM_DBREAK);
408
409
410         /* Interrupt. */
411         seq_printf(f,"num ints\t: %d\n"
412                      "ext ints\t: %d\n"
413                      "int levels\t: %d\n"
414                      "timers\t\t: %d\n"
415                      "debug level\t: %d\n",
416                      XCHAL_NUM_INTERRUPTS,
417                      XCHAL_NUM_EXTINTERRUPTS,
418                      XCHAL_NUM_INTLEVELS,
419                      XCHAL_NUM_TIMERS,
420                      XCHAL_DEBUGLEVEL);
421
422         /* Cache */
423         seq_printf(f,"icache line size: %d\n"
424                      "icache ways\t: %d\n"
425                      "icache size\t: %d\n"
426                      "icache flags\t: "
427 #if XCHAL_ICACHE_LINE_LOCKABLE
428                      "lock"
429 #endif
430                      "\n"
431                      "dcache line size: %d\n"
432                      "dcache ways\t: %d\n"
433                      "dcache size\t: %d\n"
434                      "dcache flags\t: "
435 #if XCHAL_DCACHE_IS_WRITEBACK
436                      "writeback"
437 #endif
438 #if XCHAL_DCACHE_LINE_LOCKABLE
439                      "lock"
440 #endif
441                      "\n",
442                      XCHAL_ICACHE_LINESIZE,
443                      XCHAL_ICACHE_WAYS,
444                      XCHAL_ICACHE_SIZE,
445                      XCHAL_DCACHE_LINESIZE,
446                      XCHAL_DCACHE_WAYS,
447                      XCHAL_DCACHE_SIZE);
448
449         return 0;
450 }
451
452 /*
453  * We show only CPU #0 info.
454  */
455 static void *
456 c_start(struct seq_file *f, loff_t *pos)
457 {
458         return (void *) ((*pos == 0) ? (void *)1 : NULL);
459 }
460
461 static void *
462 c_next(struct seq_file *f, void *v, loff_t *pos)
463 {
464         return NULL;
465 }
466
467 static void
468 c_stop(struct seq_file *f, void *v)
469 {
470 }
471
472 struct seq_operations cpuinfo_op =
473 {
474         start:  c_start,
475         next:   c_next,
476         stop:   c_stop,
477         show:   c_show
478 };
479
480 #endif /* CONFIG_PROC_FS */
481