KVM: Add PV MSR to enable asynchronous page faults delivery.
[linux-3.10.git] / arch / x86 / kvm / x86.c
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * derived from drivers/kvm/kvm_main.c
5  *
6  * Copyright (C) 2006 Qumranet, Inc.
7  * Copyright (C) 2008 Qumranet, Inc.
8  * Copyright IBM Corporation, 2008
9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10  *
11  * Authors:
12  *   Avi Kivity   <avi@qumranet.com>
13  *   Yaniv Kamay  <yaniv@qumranet.com>
14  *   Amit Shah    <amit.shah@qumranet.com>
15  *   Ben-Ami Yassour <benami@il.ibm.com>
16  *
17  * This work is licensed under the terms of the GNU GPL, version 2.  See
18  * the COPYING file in the top-level directory.
19  *
20  */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
48
49 #define CREATE_TRACE_POINTS
50 #include "trace.h"
51
52 #include <asm/debugreg.h>
53 #include <asm/msr.h>
54 #include <asm/desc.h>
55 #include <asm/mtrr.h>
56 #include <asm/mce.h>
57 #include <asm/i387.h>
58 #include <asm/xcr.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
61
62 #define MAX_IO_MSRS 256
63 #define CR0_RESERVED_BITS                                               \
64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
67 #define CR4_RESERVED_BITS                                               \
68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
71                           | X86_CR4_OSXSAVE \
72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
73
74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
75
76 #define KVM_MAX_MCE_BANKS 32
77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
78
79 /* EFER defaults:
80  * - enable syscall per default because its emulated by KVM
81  * - enable LME and LMA per default on 64 bit KVM
82  */
83 #ifdef CONFIG_X86_64
84 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
85 #else
86 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
87 #endif
88
89 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
90 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
91
92 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
93 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
94                                     struct kvm_cpuid_entry2 __user *entries);
95
96 struct kvm_x86_ops *kvm_x86_ops;
97 EXPORT_SYMBOL_GPL(kvm_x86_ops);
98
99 int ignore_msrs = 0;
100 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
101
102 #define KVM_NR_SHARED_MSRS 16
103
104 struct kvm_shared_msrs_global {
105         int nr;
106         u32 msrs[KVM_NR_SHARED_MSRS];
107 };
108
109 struct kvm_shared_msrs {
110         struct user_return_notifier urn;
111         bool registered;
112         struct kvm_shared_msr_values {
113                 u64 host;
114                 u64 curr;
115         } values[KVM_NR_SHARED_MSRS];
116 };
117
118 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
119 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
120
121 struct kvm_stats_debugfs_item debugfs_entries[] = {
122         { "pf_fixed", VCPU_STAT(pf_fixed) },
123         { "pf_guest", VCPU_STAT(pf_guest) },
124         { "tlb_flush", VCPU_STAT(tlb_flush) },
125         { "invlpg", VCPU_STAT(invlpg) },
126         { "exits", VCPU_STAT(exits) },
127         { "io_exits", VCPU_STAT(io_exits) },
128         { "mmio_exits", VCPU_STAT(mmio_exits) },
129         { "signal_exits", VCPU_STAT(signal_exits) },
130         { "irq_window", VCPU_STAT(irq_window_exits) },
131         { "nmi_window", VCPU_STAT(nmi_window_exits) },
132         { "halt_exits", VCPU_STAT(halt_exits) },
133         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
134         { "hypercalls", VCPU_STAT(hypercalls) },
135         { "request_irq", VCPU_STAT(request_irq_exits) },
136         { "irq_exits", VCPU_STAT(irq_exits) },
137         { "host_state_reload", VCPU_STAT(host_state_reload) },
138         { "efer_reload", VCPU_STAT(efer_reload) },
139         { "fpu_reload", VCPU_STAT(fpu_reload) },
140         { "insn_emulation", VCPU_STAT(insn_emulation) },
141         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
142         { "irq_injections", VCPU_STAT(irq_injections) },
143         { "nmi_injections", VCPU_STAT(nmi_injections) },
144         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
145         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
146         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
147         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
148         { "mmu_flooded", VM_STAT(mmu_flooded) },
149         { "mmu_recycled", VM_STAT(mmu_recycled) },
150         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
151         { "mmu_unsync", VM_STAT(mmu_unsync) },
152         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
153         { "largepages", VM_STAT(lpages) },
154         { NULL }
155 };
156
157 u64 __read_mostly host_xcr0;
158
159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
160 {
161         int i;
162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
163                 vcpu->arch.apf.gfns[i] = ~0;
164 }
165
166 static void kvm_on_user_return(struct user_return_notifier *urn)
167 {
168         unsigned slot;
169         struct kvm_shared_msrs *locals
170                 = container_of(urn, struct kvm_shared_msrs, urn);
171         struct kvm_shared_msr_values *values;
172
173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
174                 values = &locals->values[slot];
175                 if (values->host != values->curr) {
176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
177                         values->curr = values->host;
178                 }
179         }
180         locals->registered = false;
181         user_return_notifier_unregister(urn);
182 }
183
184 static void shared_msr_update(unsigned slot, u32 msr)
185 {
186         struct kvm_shared_msrs *smsr;
187         u64 value;
188
189         smsr = &__get_cpu_var(shared_msrs);
190         /* only read, and nobody should modify it at this time,
191          * so don't need lock */
192         if (slot >= shared_msrs_global.nr) {
193                 printk(KERN_ERR "kvm: invalid MSR slot!");
194                 return;
195         }
196         rdmsrl_safe(msr, &value);
197         smsr->values[slot].host = value;
198         smsr->values[slot].curr = value;
199 }
200
201 void kvm_define_shared_msr(unsigned slot, u32 msr)
202 {
203         if (slot >= shared_msrs_global.nr)
204                 shared_msrs_global.nr = slot + 1;
205         shared_msrs_global.msrs[slot] = msr;
206         /* we need ensured the shared_msr_global have been updated */
207         smp_wmb();
208 }
209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
210
211 static void kvm_shared_msr_cpu_online(void)
212 {
213         unsigned i;
214
215         for (i = 0; i < shared_msrs_global.nr; ++i)
216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
217 }
218
219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
220 {
221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
222
223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
224                 return;
225         smsr->values[slot].curr = value;
226         wrmsrl(shared_msrs_global.msrs[slot], value);
227         if (!smsr->registered) {
228                 smsr->urn.on_user_return = kvm_on_user_return;
229                 user_return_notifier_register(&smsr->urn);
230                 smsr->registered = true;
231         }
232 }
233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
234
235 static void drop_user_return_notifiers(void *ignore)
236 {
237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
238
239         if (smsr->registered)
240                 kvm_on_user_return(&smsr->urn);
241 }
242
243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
244 {
245         if (irqchip_in_kernel(vcpu->kvm))
246                 return vcpu->arch.apic_base;
247         else
248                 return vcpu->arch.apic_base;
249 }
250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
251
252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
253 {
254         /* TODO: reserve bits check */
255         if (irqchip_in_kernel(vcpu->kvm))
256                 kvm_lapic_set_base(vcpu, data);
257         else
258                 vcpu->arch.apic_base = data;
259 }
260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
261
262 #define EXCPT_BENIGN            0
263 #define EXCPT_CONTRIBUTORY      1
264 #define EXCPT_PF                2
265
266 static int exception_class(int vector)
267 {
268         switch (vector) {
269         case PF_VECTOR:
270                 return EXCPT_PF;
271         case DE_VECTOR:
272         case TS_VECTOR:
273         case NP_VECTOR:
274         case SS_VECTOR:
275         case GP_VECTOR:
276                 return EXCPT_CONTRIBUTORY;
277         default:
278                 break;
279         }
280         return EXCPT_BENIGN;
281 }
282
283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
284                 unsigned nr, bool has_error, u32 error_code,
285                 bool reinject)
286 {
287         u32 prev_nr;
288         int class1, class2;
289
290         kvm_make_request(KVM_REQ_EVENT, vcpu);
291
292         if (!vcpu->arch.exception.pending) {
293         queue:
294                 vcpu->arch.exception.pending = true;
295                 vcpu->arch.exception.has_error_code = has_error;
296                 vcpu->arch.exception.nr = nr;
297                 vcpu->arch.exception.error_code = error_code;
298                 vcpu->arch.exception.reinject = reinject;
299                 return;
300         }
301
302         /* to check exception */
303         prev_nr = vcpu->arch.exception.nr;
304         if (prev_nr == DF_VECTOR) {
305                 /* triple fault -> shutdown */
306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
307                 return;
308         }
309         class1 = exception_class(prev_nr);
310         class2 = exception_class(nr);
311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
313                 /* generate double fault per SDM Table 5-5 */
314                 vcpu->arch.exception.pending = true;
315                 vcpu->arch.exception.has_error_code = true;
316                 vcpu->arch.exception.nr = DF_VECTOR;
317                 vcpu->arch.exception.error_code = 0;
318         } else
319                 /* replace previous exception with a new one in a hope
320                    that instruction re-execution will regenerate lost
321                    exception */
322                 goto queue;
323 }
324
325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
326 {
327         kvm_multiple_exception(vcpu, nr, false, 0, false);
328 }
329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
330
331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
332 {
333         kvm_multiple_exception(vcpu, nr, false, 0, true);
334 }
335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
336
337 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
338 {
339         unsigned error_code = vcpu->arch.fault.error_code;
340
341         ++vcpu->stat.pf_guest;
342         vcpu->arch.cr2 = vcpu->arch.fault.address;
343         kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
344 }
345
346 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
347 {
348         if (mmu_is_nested(vcpu) && !vcpu->arch.fault.nested)
349                 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
350         else
351                 vcpu->arch.mmu.inject_page_fault(vcpu);
352
353         vcpu->arch.fault.nested = false;
354 }
355
356 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
357 {
358         kvm_make_request(KVM_REQ_EVENT, vcpu);
359         vcpu->arch.nmi_pending = 1;
360 }
361 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
362
363 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
364 {
365         kvm_multiple_exception(vcpu, nr, true, error_code, false);
366 }
367 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
368
369 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
370 {
371         kvm_multiple_exception(vcpu, nr, true, error_code, true);
372 }
373 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
374
375 /*
376  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
377  * a #GP and return false.
378  */
379 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
380 {
381         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
382                 return true;
383         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
384         return false;
385 }
386 EXPORT_SYMBOL_GPL(kvm_require_cpl);
387
388 /*
389  * This function will be used to read from the physical memory of the currently
390  * running guest. The difference to kvm_read_guest_page is that this function
391  * can read from guest physical or from the guest's guest physical memory.
392  */
393 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
394                             gfn_t ngfn, void *data, int offset, int len,
395                             u32 access)
396 {
397         gfn_t real_gfn;
398         gpa_t ngpa;
399
400         ngpa     = gfn_to_gpa(ngfn);
401         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
402         if (real_gfn == UNMAPPED_GVA)
403                 return -EFAULT;
404
405         real_gfn = gpa_to_gfn(real_gfn);
406
407         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
408 }
409 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
410
411 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
412                                void *data, int offset, int len, u32 access)
413 {
414         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
415                                        data, offset, len, access);
416 }
417
418 /*
419  * Load the pae pdptrs.  Return true is they are all valid.
420  */
421 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
422 {
423         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
424         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
425         int i;
426         int ret;
427         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
428
429         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
430                                       offset * sizeof(u64), sizeof(pdpte),
431                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
432         if (ret < 0) {
433                 ret = 0;
434                 goto out;
435         }
436         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
437                 if (is_present_gpte(pdpte[i]) &&
438                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
439                         ret = 0;
440                         goto out;
441                 }
442         }
443         ret = 1;
444
445         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
446         __set_bit(VCPU_EXREG_PDPTR,
447                   (unsigned long *)&vcpu->arch.regs_avail);
448         __set_bit(VCPU_EXREG_PDPTR,
449                   (unsigned long *)&vcpu->arch.regs_dirty);
450 out:
451
452         return ret;
453 }
454 EXPORT_SYMBOL_GPL(load_pdptrs);
455
456 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
457 {
458         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
459         bool changed = true;
460         int offset;
461         gfn_t gfn;
462         int r;
463
464         if (is_long_mode(vcpu) || !is_pae(vcpu))
465                 return false;
466
467         if (!test_bit(VCPU_EXREG_PDPTR,
468                       (unsigned long *)&vcpu->arch.regs_avail))
469                 return true;
470
471         gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
472         offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
473         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
474                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
475         if (r < 0)
476                 goto out;
477         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
478 out:
479
480         return changed;
481 }
482
483 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
484 {
485         unsigned long old_cr0 = kvm_read_cr0(vcpu);
486         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
487                                     X86_CR0_CD | X86_CR0_NW;
488
489         cr0 |= X86_CR0_ET;
490
491 #ifdef CONFIG_X86_64
492         if (cr0 & 0xffffffff00000000UL)
493                 return 1;
494 #endif
495
496         cr0 &= ~CR0_RESERVED_BITS;
497
498         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
499                 return 1;
500
501         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
502                 return 1;
503
504         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
505 #ifdef CONFIG_X86_64
506                 if ((vcpu->arch.efer & EFER_LME)) {
507                         int cs_db, cs_l;
508
509                         if (!is_pae(vcpu))
510                                 return 1;
511                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
512                         if (cs_l)
513                                 return 1;
514                 } else
515 #endif
516                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
517                                                  vcpu->arch.cr3))
518                         return 1;
519         }
520
521         kvm_x86_ops->set_cr0(vcpu, cr0);
522
523         if ((cr0 ^ old_cr0) & update_bits)
524                 kvm_mmu_reset_context(vcpu);
525         return 0;
526 }
527 EXPORT_SYMBOL_GPL(kvm_set_cr0);
528
529 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
530 {
531         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
532 }
533 EXPORT_SYMBOL_GPL(kvm_lmsw);
534
535 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
536 {
537         u64 xcr0;
538
539         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
540         if (index != XCR_XFEATURE_ENABLED_MASK)
541                 return 1;
542         xcr0 = xcr;
543         if (kvm_x86_ops->get_cpl(vcpu) != 0)
544                 return 1;
545         if (!(xcr0 & XSTATE_FP))
546                 return 1;
547         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
548                 return 1;
549         if (xcr0 & ~host_xcr0)
550                 return 1;
551         vcpu->arch.xcr0 = xcr0;
552         vcpu->guest_xcr0_loaded = 0;
553         return 0;
554 }
555
556 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
557 {
558         if (__kvm_set_xcr(vcpu, index, xcr)) {
559                 kvm_inject_gp(vcpu, 0);
560                 return 1;
561         }
562         return 0;
563 }
564 EXPORT_SYMBOL_GPL(kvm_set_xcr);
565
566 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
567 {
568         struct kvm_cpuid_entry2 *best;
569
570         best = kvm_find_cpuid_entry(vcpu, 1, 0);
571         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
572 }
573
574 static void update_cpuid(struct kvm_vcpu *vcpu)
575 {
576         struct kvm_cpuid_entry2 *best;
577
578         best = kvm_find_cpuid_entry(vcpu, 1, 0);
579         if (!best)
580                 return;
581
582         /* Update OSXSAVE bit */
583         if (cpu_has_xsave && best->function == 0x1) {
584                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
585                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
586                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
587         }
588 }
589
590 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
591 {
592         unsigned long old_cr4 = kvm_read_cr4(vcpu);
593         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
594
595         if (cr4 & CR4_RESERVED_BITS)
596                 return 1;
597
598         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
599                 return 1;
600
601         if (is_long_mode(vcpu)) {
602                 if (!(cr4 & X86_CR4_PAE))
603                         return 1;
604         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
605                    && ((cr4 ^ old_cr4) & pdptr_bits)
606                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
607                 return 1;
608
609         if (cr4 & X86_CR4_VMXE)
610                 return 1;
611
612         kvm_x86_ops->set_cr4(vcpu, cr4);
613
614         if ((cr4 ^ old_cr4) & pdptr_bits)
615                 kvm_mmu_reset_context(vcpu);
616
617         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
618                 update_cpuid(vcpu);
619
620         return 0;
621 }
622 EXPORT_SYMBOL_GPL(kvm_set_cr4);
623
624 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
625 {
626         if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
627                 kvm_mmu_sync_roots(vcpu);
628                 kvm_mmu_flush_tlb(vcpu);
629                 return 0;
630         }
631
632         if (is_long_mode(vcpu)) {
633                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
634                         return 1;
635         } else {
636                 if (is_pae(vcpu)) {
637                         if (cr3 & CR3_PAE_RESERVED_BITS)
638                                 return 1;
639                         if (is_paging(vcpu) &&
640                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
641                                 return 1;
642                 }
643                 /*
644                  * We don't check reserved bits in nonpae mode, because
645                  * this isn't enforced, and VMware depends on this.
646                  */
647         }
648
649         /*
650          * Does the new cr3 value map to physical memory? (Note, we
651          * catch an invalid cr3 even in real-mode, because it would
652          * cause trouble later on when we turn on paging anyway.)
653          *
654          * A real CPU would silently accept an invalid cr3 and would
655          * attempt to use it - with largely undefined (and often hard
656          * to debug) behavior on the guest side.
657          */
658         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
659                 return 1;
660         vcpu->arch.cr3 = cr3;
661         vcpu->arch.mmu.new_cr3(vcpu);
662         return 0;
663 }
664 EXPORT_SYMBOL_GPL(kvm_set_cr3);
665
666 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
667 {
668         if (cr8 & CR8_RESERVED_BITS)
669                 return 1;
670         if (irqchip_in_kernel(vcpu->kvm))
671                 kvm_lapic_set_tpr(vcpu, cr8);
672         else
673                 vcpu->arch.cr8 = cr8;
674         return 0;
675 }
676
677 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
678 {
679         if (__kvm_set_cr8(vcpu, cr8))
680                 kvm_inject_gp(vcpu, 0);
681 }
682 EXPORT_SYMBOL_GPL(kvm_set_cr8);
683
684 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
685 {
686         if (irqchip_in_kernel(vcpu->kvm))
687                 return kvm_lapic_get_cr8(vcpu);
688         else
689                 return vcpu->arch.cr8;
690 }
691 EXPORT_SYMBOL_GPL(kvm_get_cr8);
692
693 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
694 {
695         switch (dr) {
696         case 0 ... 3:
697                 vcpu->arch.db[dr] = val;
698                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
699                         vcpu->arch.eff_db[dr] = val;
700                 break;
701         case 4:
702                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
703                         return 1; /* #UD */
704                 /* fall through */
705         case 6:
706                 if (val & 0xffffffff00000000ULL)
707                         return -1; /* #GP */
708                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
709                 break;
710         case 5:
711                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
712                         return 1; /* #UD */
713                 /* fall through */
714         default: /* 7 */
715                 if (val & 0xffffffff00000000ULL)
716                         return -1; /* #GP */
717                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
718                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
719                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
720                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
721                 }
722                 break;
723         }
724
725         return 0;
726 }
727
728 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
729 {
730         int res;
731
732         res = __kvm_set_dr(vcpu, dr, val);
733         if (res > 0)
734                 kvm_queue_exception(vcpu, UD_VECTOR);
735         else if (res < 0)
736                 kvm_inject_gp(vcpu, 0);
737
738         return res;
739 }
740 EXPORT_SYMBOL_GPL(kvm_set_dr);
741
742 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
743 {
744         switch (dr) {
745         case 0 ... 3:
746                 *val = vcpu->arch.db[dr];
747                 break;
748         case 4:
749                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
750                         return 1;
751                 /* fall through */
752         case 6:
753                 *val = vcpu->arch.dr6;
754                 break;
755         case 5:
756                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
757                         return 1;
758                 /* fall through */
759         default: /* 7 */
760                 *val = vcpu->arch.dr7;
761                 break;
762         }
763
764         return 0;
765 }
766
767 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
768 {
769         if (_kvm_get_dr(vcpu, dr, val)) {
770                 kvm_queue_exception(vcpu, UD_VECTOR);
771                 return 1;
772         }
773         return 0;
774 }
775 EXPORT_SYMBOL_GPL(kvm_get_dr);
776
777 /*
778  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
779  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
780  *
781  * This list is modified at module load time to reflect the
782  * capabilities of the host cpu. This capabilities test skips MSRs that are
783  * kvm-specific. Those are put in the beginning of the list.
784  */
785
786 #define KVM_SAVE_MSRS_BEGIN     8
787 static u32 msrs_to_save[] = {
788         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
789         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
790         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
791         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
792         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
793         MSR_STAR,
794 #ifdef CONFIG_X86_64
795         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
796 #endif
797         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
798 };
799
800 static unsigned num_msrs_to_save;
801
802 static u32 emulated_msrs[] = {
803         MSR_IA32_MISC_ENABLE,
804         MSR_IA32_MCG_STATUS,
805         MSR_IA32_MCG_CTL,
806 };
807
808 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
809 {
810         u64 old_efer = vcpu->arch.efer;
811
812         if (efer & efer_reserved_bits)
813                 return 1;
814
815         if (is_paging(vcpu)
816             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
817                 return 1;
818
819         if (efer & EFER_FFXSR) {
820                 struct kvm_cpuid_entry2 *feat;
821
822                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
823                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
824                         return 1;
825         }
826
827         if (efer & EFER_SVME) {
828                 struct kvm_cpuid_entry2 *feat;
829
830                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
831                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
832                         return 1;
833         }
834
835         efer &= ~EFER_LMA;
836         efer |= vcpu->arch.efer & EFER_LMA;
837
838         kvm_x86_ops->set_efer(vcpu, efer);
839
840         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
841
842         /* Update reserved bits */
843         if ((efer ^ old_efer) & EFER_NX)
844                 kvm_mmu_reset_context(vcpu);
845
846         return 0;
847 }
848
849 void kvm_enable_efer_bits(u64 mask)
850 {
851        efer_reserved_bits &= ~mask;
852 }
853 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
854
855
856 /*
857  * Writes msr value into into the appropriate "register".
858  * Returns 0 on success, non-0 otherwise.
859  * Assumes vcpu_load() was already called.
860  */
861 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
862 {
863         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
864 }
865
866 /*
867  * Adapt set_msr() to msr_io()'s calling convention
868  */
869 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
870 {
871         return kvm_set_msr(vcpu, index, *data);
872 }
873
874 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
875 {
876         int version;
877         int r;
878         struct pvclock_wall_clock wc;
879         struct timespec boot;
880
881         if (!wall_clock)
882                 return;
883
884         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
885         if (r)
886                 return;
887
888         if (version & 1)
889                 ++version;  /* first time write, random junk */
890
891         ++version;
892
893         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
894
895         /*
896          * The guest calculates current wall clock time by adding
897          * system time (updated by kvm_guest_time_update below) to the
898          * wall clock specified here.  guest system time equals host
899          * system time for us, thus we must fill in host boot time here.
900          */
901         getboottime(&boot);
902
903         wc.sec = boot.tv_sec;
904         wc.nsec = boot.tv_nsec;
905         wc.version = version;
906
907         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
908
909         version++;
910         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
911 }
912
913 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
914 {
915         uint32_t quotient, remainder;
916
917         /* Don't try to replace with do_div(), this one calculates
918          * "(dividend << 32) / divisor" */
919         __asm__ ( "divl %4"
920                   : "=a" (quotient), "=d" (remainder)
921                   : "0" (0), "1" (dividend), "r" (divisor) );
922         return quotient;
923 }
924
925 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
926                                s8 *pshift, u32 *pmultiplier)
927 {
928         uint64_t scaled64;
929         int32_t  shift = 0;
930         uint64_t tps64;
931         uint32_t tps32;
932
933         tps64 = base_khz * 1000LL;
934         scaled64 = scaled_khz * 1000LL;
935         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
936                 tps64 >>= 1;
937                 shift--;
938         }
939
940         tps32 = (uint32_t)tps64;
941         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
942                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
943                         scaled64 >>= 1;
944                 else
945                         tps32 <<= 1;
946                 shift++;
947         }
948
949         *pshift = shift;
950         *pmultiplier = div_frac(scaled64, tps32);
951
952         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
953                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
954 }
955
956 static inline u64 get_kernel_ns(void)
957 {
958         struct timespec ts;
959
960         WARN_ON(preemptible());
961         ktime_get_ts(&ts);
962         monotonic_to_bootbased(&ts);
963         return timespec_to_ns(&ts);
964 }
965
966 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
967 unsigned long max_tsc_khz;
968
969 static inline int kvm_tsc_changes_freq(void)
970 {
971         int cpu = get_cpu();
972         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
973                   cpufreq_quick_get(cpu) != 0;
974         put_cpu();
975         return ret;
976 }
977
978 static inline u64 nsec_to_cycles(u64 nsec)
979 {
980         u64 ret;
981
982         WARN_ON(preemptible());
983         if (kvm_tsc_changes_freq())
984                 printk_once(KERN_WARNING
985                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
986         ret = nsec * __get_cpu_var(cpu_tsc_khz);
987         do_div(ret, USEC_PER_SEC);
988         return ret;
989 }
990
991 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
992 {
993         /* Compute a scale to convert nanoseconds in TSC cycles */
994         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
995                            &kvm->arch.virtual_tsc_shift,
996                            &kvm->arch.virtual_tsc_mult);
997         kvm->arch.virtual_tsc_khz = this_tsc_khz;
998 }
999
1000 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1001 {
1002         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1003                                       vcpu->kvm->arch.virtual_tsc_mult,
1004                                       vcpu->kvm->arch.virtual_tsc_shift);
1005         tsc += vcpu->arch.last_tsc_write;
1006         return tsc;
1007 }
1008
1009 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1010 {
1011         struct kvm *kvm = vcpu->kvm;
1012         u64 offset, ns, elapsed;
1013         unsigned long flags;
1014         s64 sdiff;
1015
1016         spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1017         offset = data - native_read_tsc();
1018         ns = get_kernel_ns();
1019         elapsed = ns - kvm->arch.last_tsc_nsec;
1020         sdiff = data - kvm->arch.last_tsc_write;
1021         if (sdiff < 0)
1022                 sdiff = -sdiff;
1023
1024         /*
1025          * Special case: close write to TSC within 5 seconds of
1026          * another CPU is interpreted as an attempt to synchronize
1027          * The 5 seconds is to accomodate host load / swapping as
1028          * well as any reset of TSC during the boot process.
1029          *
1030          * In that case, for a reliable TSC, we can match TSC offsets,
1031          * or make a best guest using elapsed value.
1032          */
1033         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1034             elapsed < 5ULL * NSEC_PER_SEC) {
1035                 if (!check_tsc_unstable()) {
1036                         offset = kvm->arch.last_tsc_offset;
1037                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1038                 } else {
1039                         u64 delta = nsec_to_cycles(elapsed);
1040                         offset += delta;
1041                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1042                 }
1043                 ns = kvm->arch.last_tsc_nsec;
1044         }
1045         kvm->arch.last_tsc_nsec = ns;
1046         kvm->arch.last_tsc_write = data;
1047         kvm->arch.last_tsc_offset = offset;
1048         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1049         spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1050
1051         /* Reset of TSC must disable overshoot protection below */
1052         vcpu->arch.hv_clock.tsc_timestamp = 0;
1053         vcpu->arch.last_tsc_write = data;
1054         vcpu->arch.last_tsc_nsec = ns;
1055 }
1056 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1057
1058 static int kvm_guest_time_update(struct kvm_vcpu *v)
1059 {
1060         unsigned long flags;
1061         struct kvm_vcpu_arch *vcpu = &v->arch;
1062         void *shared_kaddr;
1063         unsigned long this_tsc_khz;
1064         s64 kernel_ns, max_kernel_ns;
1065         u64 tsc_timestamp;
1066
1067         /* Keep irq disabled to prevent changes to the clock */
1068         local_irq_save(flags);
1069         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1070         kernel_ns = get_kernel_ns();
1071         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1072
1073         if (unlikely(this_tsc_khz == 0)) {
1074                 local_irq_restore(flags);
1075                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1076                 return 1;
1077         }
1078
1079         /*
1080          * We may have to catch up the TSC to match elapsed wall clock
1081          * time for two reasons, even if kvmclock is used.
1082          *   1) CPU could have been running below the maximum TSC rate
1083          *   2) Broken TSC compensation resets the base at each VCPU
1084          *      entry to avoid unknown leaps of TSC even when running
1085          *      again on the same CPU.  This may cause apparent elapsed
1086          *      time to disappear, and the guest to stand still or run
1087          *      very slowly.
1088          */
1089         if (vcpu->tsc_catchup) {
1090                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1091                 if (tsc > tsc_timestamp) {
1092                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1093                         tsc_timestamp = tsc;
1094                 }
1095         }
1096
1097         local_irq_restore(flags);
1098
1099         if (!vcpu->time_page)
1100                 return 0;
1101
1102         /*
1103          * Time as measured by the TSC may go backwards when resetting the base
1104          * tsc_timestamp.  The reason for this is that the TSC resolution is
1105          * higher than the resolution of the other clock scales.  Thus, many
1106          * possible measurments of the TSC correspond to one measurement of any
1107          * other clock, and so a spread of values is possible.  This is not a
1108          * problem for the computation of the nanosecond clock; with TSC rates
1109          * around 1GHZ, there can only be a few cycles which correspond to one
1110          * nanosecond value, and any path through this code will inevitably
1111          * take longer than that.  However, with the kernel_ns value itself,
1112          * the precision may be much lower, down to HZ granularity.  If the
1113          * first sampling of TSC against kernel_ns ends in the low part of the
1114          * range, and the second in the high end of the range, we can get:
1115          *
1116          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1117          *
1118          * As the sampling errors potentially range in the thousands of cycles,
1119          * it is possible such a time value has already been observed by the
1120          * guest.  To protect against this, we must compute the system time as
1121          * observed by the guest and ensure the new system time is greater.
1122          */
1123         max_kernel_ns = 0;
1124         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1125                 max_kernel_ns = vcpu->last_guest_tsc -
1126                                 vcpu->hv_clock.tsc_timestamp;
1127                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1128                                     vcpu->hv_clock.tsc_to_system_mul,
1129                                     vcpu->hv_clock.tsc_shift);
1130                 max_kernel_ns += vcpu->last_kernel_ns;
1131         }
1132
1133         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1134                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1135                                    &vcpu->hv_clock.tsc_shift,
1136                                    &vcpu->hv_clock.tsc_to_system_mul);
1137                 vcpu->hw_tsc_khz = this_tsc_khz;
1138         }
1139
1140         if (max_kernel_ns > kernel_ns)
1141                 kernel_ns = max_kernel_ns;
1142
1143         /* With all the info we got, fill in the values */
1144         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1145         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1146         vcpu->last_kernel_ns = kernel_ns;
1147         vcpu->last_guest_tsc = tsc_timestamp;
1148         vcpu->hv_clock.flags = 0;
1149
1150         /*
1151          * The interface expects us to write an even number signaling that the
1152          * update is finished. Since the guest won't see the intermediate
1153          * state, we just increase by 2 at the end.
1154          */
1155         vcpu->hv_clock.version += 2;
1156
1157         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1158
1159         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1160                sizeof(vcpu->hv_clock));
1161
1162         kunmap_atomic(shared_kaddr, KM_USER0);
1163
1164         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1165         return 0;
1166 }
1167
1168 static bool msr_mtrr_valid(unsigned msr)
1169 {
1170         switch (msr) {
1171         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1172         case MSR_MTRRfix64K_00000:
1173         case MSR_MTRRfix16K_80000:
1174         case MSR_MTRRfix16K_A0000:
1175         case MSR_MTRRfix4K_C0000:
1176         case MSR_MTRRfix4K_C8000:
1177         case MSR_MTRRfix4K_D0000:
1178         case MSR_MTRRfix4K_D8000:
1179         case MSR_MTRRfix4K_E0000:
1180         case MSR_MTRRfix4K_E8000:
1181         case MSR_MTRRfix4K_F0000:
1182         case MSR_MTRRfix4K_F8000:
1183         case MSR_MTRRdefType:
1184         case MSR_IA32_CR_PAT:
1185                 return true;
1186         case 0x2f8:
1187                 return true;
1188         }
1189         return false;
1190 }
1191
1192 static bool valid_pat_type(unsigned t)
1193 {
1194         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1195 }
1196
1197 static bool valid_mtrr_type(unsigned t)
1198 {
1199         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1200 }
1201
1202 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1203 {
1204         int i;
1205
1206         if (!msr_mtrr_valid(msr))
1207                 return false;
1208
1209         if (msr == MSR_IA32_CR_PAT) {
1210                 for (i = 0; i < 8; i++)
1211                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1212                                 return false;
1213                 return true;
1214         } else if (msr == MSR_MTRRdefType) {
1215                 if (data & ~0xcff)
1216                         return false;
1217                 return valid_mtrr_type(data & 0xff);
1218         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1219                 for (i = 0; i < 8 ; i++)
1220                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1221                                 return false;
1222                 return true;
1223         }
1224
1225         /* variable MTRRs */
1226         return valid_mtrr_type(data & 0xff);
1227 }
1228
1229 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1230 {
1231         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1232
1233         if (!mtrr_valid(vcpu, msr, data))
1234                 return 1;
1235
1236         if (msr == MSR_MTRRdefType) {
1237                 vcpu->arch.mtrr_state.def_type = data;
1238                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1239         } else if (msr == MSR_MTRRfix64K_00000)
1240                 p[0] = data;
1241         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1242                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1243         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1244                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1245         else if (msr == MSR_IA32_CR_PAT)
1246                 vcpu->arch.pat = data;
1247         else {  /* Variable MTRRs */
1248                 int idx, is_mtrr_mask;
1249                 u64 *pt;
1250
1251                 idx = (msr - 0x200) / 2;
1252                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1253                 if (!is_mtrr_mask)
1254                         pt =
1255                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1256                 else
1257                         pt =
1258                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1259                 *pt = data;
1260         }
1261
1262         kvm_mmu_reset_context(vcpu);
1263         return 0;
1264 }
1265
1266 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1267 {
1268         u64 mcg_cap = vcpu->arch.mcg_cap;
1269         unsigned bank_num = mcg_cap & 0xff;
1270
1271         switch (msr) {
1272         case MSR_IA32_MCG_STATUS:
1273                 vcpu->arch.mcg_status = data;
1274                 break;
1275         case MSR_IA32_MCG_CTL:
1276                 if (!(mcg_cap & MCG_CTL_P))
1277                         return 1;
1278                 if (data != 0 && data != ~(u64)0)
1279                         return -1;
1280                 vcpu->arch.mcg_ctl = data;
1281                 break;
1282         default:
1283                 if (msr >= MSR_IA32_MC0_CTL &&
1284                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1285                         u32 offset = msr - MSR_IA32_MC0_CTL;
1286                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1287                          * some Linux kernels though clear bit 10 in bank 4 to
1288                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1289                          * this to avoid an uncatched #GP in the guest
1290                          */
1291                         if ((offset & 0x3) == 0 &&
1292                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1293                                 return -1;
1294                         vcpu->arch.mce_banks[offset] = data;
1295                         break;
1296                 }
1297                 return 1;
1298         }
1299         return 0;
1300 }
1301
1302 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1303 {
1304         struct kvm *kvm = vcpu->kvm;
1305         int lm = is_long_mode(vcpu);
1306         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1307                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1308         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1309                 : kvm->arch.xen_hvm_config.blob_size_32;
1310         u32 page_num = data & ~PAGE_MASK;
1311         u64 page_addr = data & PAGE_MASK;
1312         u8 *page;
1313         int r;
1314
1315         r = -E2BIG;
1316         if (page_num >= blob_size)
1317                 goto out;
1318         r = -ENOMEM;
1319         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1320         if (!page)
1321                 goto out;
1322         r = -EFAULT;
1323         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1324                 goto out_free;
1325         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1326                 goto out_free;
1327         r = 0;
1328 out_free:
1329         kfree(page);
1330 out:
1331         return r;
1332 }
1333
1334 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1335 {
1336         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1337 }
1338
1339 static bool kvm_hv_msr_partition_wide(u32 msr)
1340 {
1341         bool r = false;
1342         switch (msr) {
1343         case HV_X64_MSR_GUEST_OS_ID:
1344         case HV_X64_MSR_HYPERCALL:
1345                 r = true;
1346                 break;
1347         }
1348
1349         return r;
1350 }
1351
1352 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1353 {
1354         struct kvm *kvm = vcpu->kvm;
1355
1356         switch (msr) {
1357         case HV_X64_MSR_GUEST_OS_ID:
1358                 kvm->arch.hv_guest_os_id = data;
1359                 /* setting guest os id to zero disables hypercall page */
1360                 if (!kvm->arch.hv_guest_os_id)
1361                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1362                 break;
1363         case HV_X64_MSR_HYPERCALL: {
1364                 u64 gfn;
1365                 unsigned long addr;
1366                 u8 instructions[4];
1367
1368                 /* if guest os id is not set hypercall should remain disabled */
1369                 if (!kvm->arch.hv_guest_os_id)
1370                         break;
1371                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1372                         kvm->arch.hv_hypercall = data;
1373                         break;
1374                 }
1375                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1376                 addr = gfn_to_hva(kvm, gfn);
1377                 if (kvm_is_error_hva(addr))
1378                         return 1;
1379                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1380                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1381                 if (copy_to_user((void __user *)addr, instructions, 4))
1382                         return 1;
1383                 kvm->arch.hv_hypercall = data;
1384                 break;
1385         }
1386         default:
1387                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1388                           "data 0x%llx\n", msr, data);
1389                 return 1;
1390         }
1391         return 0;
1392 }
1393
1394 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1395 {
1396         switch (msr) {
1397         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1398                 unsigned long addr;
1399
1400                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1401                         vcpu->arch.hv_vapic = data;
1402                         break;
1403                 }
1404                 addr = gfn_to_hva(vcpu->kvm, data >>
1405                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1406                 if (kvm_is_error_hva(addr))
1407                         return 1;
1408                 if (clear_user((void __user *)addr, PAGE_SIZE))
1409                         return 1;
1410                 vcpu->arch.hv_vapic = data;
1411                 break;
1412         }
1413         case HV_X64_MSR_EOI:
1414                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1415         case HV_X64_MSR_ICR:
1416                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1417         case HV_X64_MSR_TPR:
1418                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1419         default:
1420                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1421                           "data 0x%llx\n", msr, data);
1422                 return 1;
1423         }
1424
1425         return 0;
1426 }
1427
1428 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1429 {
1430         gpa_t gpa = data & ~0x3f;
1431
1432         /* Bits 1:5 are resrved, Should be zero */
1433         if (data & 0x3e)
1434                 return 1;
1435
1436         vcpu->arch.apf.msr_val = data;
1437
1438         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1439                 kvm_clear_async_pf_completion_queue(vcpu);
1440                 kvm_async_pf_hash_reset(vcpu);
1441                 return 0;
1442         }
1443
1444         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1445                 return 1;
1446
1447         kvm_async_pf_wakeup_all(vcpu);
1448         return 0;
1449 }
1450
1451 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1452 {
1453         switch (msr) {
1454         case MSR_EFER:
1455                 return set_efer(vcpu, data);
1456         case MSR_K7_HWCR:
1457                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1458                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1459                 if (data != 0) {
1460                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1461                                 data);
1462                         return 1;
1463                 }
1464                 break;
1465         case MSR_FAM10H_MMIO_CONF_BASE:
1466                 if (data != 0) {
1467                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1468                                 "0x%llx\n", data);
1469                         return 1;
1470                 }
1471                 break;
1472         case MSR_AMD64_NB_CFG:
1473                 break;
1474         case MSR_IA32_DEBUGCTLMSR:
1475                 if (!data) {
1476                         /* We support the non-activated case already */
1477                         break;
1478                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1479                         /* Values other than LBR and BTF are vendor-specific,
1480                            thus reserved and should throw a #GP */
1481                         return 1;
1482                 }
1483                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1484                         __func__, data);
1485                 break;
1486         case MSR_IA32_UCODE_REV:
1487         case MSR_IA32_UCODE_WRITE:
1488         case MSR_VM_HSAVE_PA:
1489         case MSR_AMD64_PATCH_LOADER:
1490                 break;
1491         case 0x200 ... 0x2ff:
1492                 return set_msr_mtrr(vcpu, msr, data);
1493         case MSR_IA32_APICBASE:
1494                 kvm_set_apic_base(vcpu, data);
1495                 break;
1496         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1497                 return kvm_x2apic_msr_write(vcpu, msr, data);
1498         case MSR_IA32_MISC_ENABLE:
1499                 vcpu->arch.ia32_misc_enable_msr = data;
1500                 break;
1501         case MSR_KVM_WALL_CLOCK_NEW:
1502         case MSR_KVM_WALL_CLOCK:
1503                 vcpu->kvm->arch.wall_clock = data;
1504                 kvm_write_wall_clock(vcpu->kvm, data);
1505                 break;
1506         case MSR_KVM_SYSTEM_TIME_NEW:
1507         case MSR_KVM_SYSTEM_TIME: {
1508                 if (vcpu->arch.time_page) {
1509                         kvm_release_page_dirty(vcpu->arch.time_page);
1510                         vcpu->arch.time_page = NULL;
1511                 }
1512
1513                 vcpu->arch.time = data;
1514                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1515
1516                 /* we verify if the enable bit is set... */
1517                 if (!(data & 1))
1518                         break;
1519
1520                 /* ...but clean it before doing the actual write */
1521                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1522
1523                 vcpu->arch.time_page =
1524                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1525
1526                 if (is_error_page(vcpu->arch.time_page)) {
1527                         kvm_release_page_clean(vcpu->arch.time_page);
1528                         vcpu->arch.time_page = NULL;
1529                 }
1530                 break;
1531         }
1532         case MSR_KVM_ASYNC_PF_EN:
1533                 if (kvm_pv_enable_async_pf(vcpu, data))
1534                         return 1;
1535                 break;
1536         case MSR_IA32_MCG_CTL:
1537         case MSR_IA32_MCG_STATUS:
1538         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1539                 return set_msr_mce(vcpu, msr, data);
1540
1541         /* Performance counters are not protected by a CPUID bit,
1542          * so we should check all of them in the generic path for the sake of
1543          * cross vendor migration.
1544          * Writing a zero into the event select MSRs disables them,
1545          * which we perfectly emulate ;-). Any other value should be at least
1546          * reported, some guests depend on them.
1547          */
1548         case MSR_P6_EVNTSEL0:
1549         case MSR_P6_EVNTSEL1:
1550         case MSR_K7_EVNTSEL0:
1551         case MSR_K7_EVNTSEL1:
1552         case MSR_K7_EVNTSEL2:
1553         case MSR_K7_EVNTSEL3:
1554                 if (data != 0)
1555                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1556                                 "0x%x data 0x%llx\n", msr, data);
1557                 break;
1558         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1559          * so we ignore writes to make it happy.
1560          */
1561         case MSR_P6_PERFCTR0:
1562         case MSR_P6_PERFCTR1:
1563         case MSR_K7_PERFCTR0:
1564         case MSR_K7_PERFCTR1:
1565         case MSR_K7_PERFCTR2:
1566         case MSR_K7_PERFCTR3:
1567                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1568                         "0x%x data 0x%llx\n", msr, data);
1569                 break;
1570         case MSR_K7_CLK_CTL:
1571                 /*
1572                  * Ignore all writes to this no longer documented MSR.
1573                  * Writes are only relevant for old K7 processors,
1574                  * all pre-dating SVM, but a recommended workaround from
1575                  * AMD for these chips. It is possible to speicify the
1576                  * affected processor models on the command line, hence
1577                  * the need to ignore the workaround.
1578                  */
1579                 break;
1580         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1581                 if (kvm_hv_msr_partition_wide(msr)) {
1582                         int r;
1583                         mutex_lock(&vcpu->kvm->lock);
1584                         r = set_msr_hyperv_pw(vcpu, msr, data);
1585                         mutex_unlock(&vcpu->kvm->lock);
1586                         return r;
1587                 } else
1588                         return set_msr_hyperv(vcpu, msr, data);
1589                 break;
1590         default:
1591                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1592                         return xen_hvm_config(vcpu, data);
1593                 if (!ignore_msrs) {
1594                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1595                                 msr, data);
1596                         return 1;
1597                 } else {
1598                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1599                                 msr, data);
1600                         break;
1601                 }
1602         }
1603         return 0;
1604 }
1605 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1606
1607
1608 /*
1609  * Reads an msr value (of 'msr_index') into 'pdata'.
1610  * Returns 0 on success, non-0 otherwise.
1611  * Assumes vcpu_load() was already called.
1612  */
1613 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1614 {
1615         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1616 }
1617
1618 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1619 {
1620         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1621
1622         if (!msr_mtrr_valid(msr))
1623                 return 1;
1624
1625         if (msr == MSR_MTRRdefType)
1626                 *pdata = vcpu->arch.mtrr_state.def_type +
1627                          (vcpu->arch.mtrr_state.enabled << 10);
1628         else if (msr == MSR_MTRRfix64K_00000)
1629                 *pdata = p[0];
1630         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1631                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1632         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1633                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1634         else if (msr == MSR_IA32_CR_PAT)
1635                 *pdata = vcpu->arch.pat;
1636         else {  /* Variable MTRRs */
1637                 int idx, is_mtrr_mask;
1638                 u64 *pt;
1639
1640                 idx = (msr - 0x200) / 2;
1641                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1642                 if (!is_mtrr_mask)
1643                         pt =
1644                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1645                 else
1646                         pt =
1647                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1648                 *pdata = *pt;
1649         }
1650
1651         return 0;
1652 }
1653
1654 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1655 {
1656         u64 data;
1657         u64 mcg_cap = vcpu->arch.mcg_cap;
1658         unsigned bank_num = mcg_cap & 0xff;
1659
1660         switch (msr) {
1661         case MSR_IA32_P5_MC_ADDR:
1662         case MSR_IA32_P5_MC_TYPE:
1663                 data = 0;
1664                 break;
1665         case MSR_IA32_MCG_CAP:
1666                 data = vcpu->arch.mcg_cap;
1667                 break;
1668         case MSR_IA32_MCG_CTL:
1669                 if (!(mcg_cap & MCG_CTL_P))
1670                         return 1;
1671                 data = vcpu->arch.mcg_ctl;
1672                 break;
1673         case MSR_IA32_MCG_STATUS:
1674                 data = vcpu->arch.mcg_status;
1675                 break;
1676         default:
1677                 if (msr >= MSR_IA32_MC0_CTL &&
1678                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1679                         u32 offset = msr - MSR_IA32_MC0_CTL;
1680                         data = vcpu->arch.mce_banks[offset];
1681                         break;
1682                 }
1683                 return 1;
1684         }
1685         *pdata = data;
1686         return 0;
1687 }
1688
1689 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1690 {
1691         u64 data = 0;
1692         struct kvm *kvm = vcpu->kvm;
1693
1694         switch (msr) {
1695         case HV_X64_MSR_GUEST_OS_ID:
1696                 data = kvm->arch.hv_guest_os_id;
1697                 break;
1698         case HV_X64_MSR_HYPERCALL:
1699                 data = kvm->arch.hv_hypercall;
1700                 break;
1701         default:
1702                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1703                 return 1;
1704         }
1705
1706         *pdata = data;
1707         return 0;
1708 }
1709
1710 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1711 {
1712         u64 data = 0;
1713
1714         switch (msr) {
1715         case HV_X64_MSR_VP_INDEX: {
1716                 int r;
1717                 struct kvm_vcpu *v;
1718                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1719                         if (v == vcpu)
1720                                 data = r;
1721                 break;
1722         }
1723         case HV_X64_MSR_EOI:
1724                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1725         case HV_X64_MSR_ICR:
1726                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1727         case HV_X64_MSR_TPR:
1728                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1729         default:
1730                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1731                 return 1;
1732         }
1733         *pdata = data;
1734         return 0;
1735 }
1736
1737 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1738 {
1739         u64 data;
1740
1741         switch (msr) {
1742         case MSR_IA32_PLATFORM_ID:
1743         case MSR_IA32_UCODE_REV:
1744         case MSR_IA32_EBL_CR_POWERON:
1745         case MSR_IA32_DEBUGCTLMSR:
1746         case MSR_IA32_LASTBRANCHFROMIP:
1747         case MSR_IA32_LASTBRANCHTOIP:
1748         case MSR_IA32_LASTINTFROMIP:
1749         case MSR_IA32_LASTINTTOIP:
1750         case MSR_K8_SYSCFG:
1751         case MSR_K7_HWCR:
1752         case MSR_VM_HSAVE_PA:
1753         case MSR_P6_PERFCTR0:
1754         case MSR_P6_PERFCTR1:
1755         case MSR_P6_EVNTSEL0:
1756         case MSR_P6_EVNTSEL1:
1757         case MSR_K7_EVNTSEL0:
1758         case MSR_K7_PERFCTR0:
1759         case MSR_K8_INT_PENDING_MSG:
1760         case MSR_AMD64_NB_CFG:
1761         case MSR_FAM10H_MMIO_CONF_BASE:
1762                 data = 0;
1763                 break;
1764         case MSR_MTRRcap:
1765                 data = 0x500 | KVM_NR_VAR_MTRR;
1766                 break;
1767         case 0x200 ... 0x2ff:
1768                 return get_msr_mtrr(vcpu, msr, pdata);
1769         case 0xcd: /* fsb frequency */
1770                 data = 3;
1771                 break;
1772                 /*
1773                  * MSR_EBC_FREQUENCY_ID
1774                  * Conservative value valid for even the basic CPU models.
1775                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1776                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1777                  * and 266MHz for model 3, or 4. Set Core Clock
1778                  * Frequency to System Bus Frequency Ratio to 1 (bits
1779                  * 31:24) even though these are only valid for CPU
1780                  * models > 2, however guests may end up dividing or
1781                  * multiplying by zero otherwise.
1782                  */
1783         case MSR_EBC_FREQUENCY_ID:
1784                 data = 1 << 24;
1785                 break;
1786         case MSR_IA32_APICBASE:
1787                 data = kvm_get_apic_base(vcpu);
1788                 break;
1789         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1790                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1791                 break;
1792         case MSR_IA32_MISC_ENABLE:
1793                 data = vcpu->arch.ia32_misc_enable_msr;
1794                 break;
1795         case MSR_IA32_PERF_STATUS:
1796                 /* TSC increment by tick */
1797                 data = 1000ULL;
1798                 /* CPU multiplier */
1799                 data |= (((uint64_t)4ULL) << 40);
1800                 break;
1801         case MSR_EFER:
1802                 data = vcpu->arch.efer;
1803                 break;
1804         case MSR_KVM_WALL_CLOCK:
1805         case MSR_KVM_WALL_CLOCK_NEW:
1806                 data = vcpu->kvm->arch.wall_clock;
1807                 break;
1808         case MSR_KVM_SYSTEM_TIME:
1809         case MSR_KVM_SYSTEM_TIME_NEW:
1810                 data = vcpu->arch.time;
1811                 break;
1812         case MSR_KVM_ASYNC_PF_EN:
1813                 data = vcpu->arch.apf.msr_val;
1814                 break;
1815         case MSR_IA32_P5_MC_ADDR:
1816         case MSR_IA32_P5_MC_TYPE:
1817         case MSR_IA32_MCG_CAP:
1818         case MSR_IA32_MCG_CTL:
1819         case MSR_IA32_MCG_STATUS:
1820         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1821                 return get_msr_mce(vcpu, msr, pdata);
1822         case MSR_K7_CLK_CTL:
1823                 /*
1824                  * Provide expected ramp-up count for K7. All other
1825                  * are set to zero, indicating minimum divisors for
1826                  * every field.
1827                  *
1828                  * This prevents guest kernels on AMD host with CPU
1829                  * type 6, model 8 and higher from exploding due to
1830                  * the rdmsr failing.
1831                  */
1832                 data = 0x20000000;
1833                 break;
1834         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1835                 if (kvm_hv_msr_partition_wide(msr)) {
1836                         int r;
1837                         mutex_lock(&vcpu->kvm->lock);
1838                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1839                         mutex_unlock(&vcpu->kvm->lock);
1840                         return r;
1841                 } else
1842                         return get_msr_hyperv(vcpu, msr, pdata);
1843                 break;
1844         default:
1845                 if (!ignore_msrs) {
1846                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1847                         return 1;
1848                 } else {
1849                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1850                         data = 0;
1851                 }
1852                 break;
1853         }
1854         *pdata = data;
1855         return 0;
1856 }
1857 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1858
1859 /*
1860  * Read or write a bunch of msrs. All parameters are kernel addresses.
1861  *
1862  * @return number of msrs set successfully.
1863  */
1864 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1865                     struct kvm_msr_entry *entries,
1866                     int (*do_msr)(struct kvm_vcpu *vcpu,
1867                                   unsigned index, u64 *data))
1868 {
1869         int i, idx;
1870
1871         idx = srcu_read_lock(&vcpu->kvm->srcu);
1872         for (i = 0; i < msrs->nmsrs; ++i)
1873                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1874                         break;
1875         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1876
1877         return i;
1878 }
1879
1880 /*
1881  * Read or write a bunch of msrs. Parameters are user addresses.
1882  *
1883  * @return number of msrs set successfully.
1884  */
1885 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1886                   int (*do_msr)(struct kvm_vcpu *vcpu,
1887                                 unsigned index, u64 *data),
1888                   int writeback)
1889 {
1890         struct kvm_msrs msrs;
1891         struct kvm_msr_entry *entries;
1892         int r, n;
1893         unsigned size;
1894
1895         r = -EFAULT;
1896         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1897                 goto out;
1898
1899         r = -E2BIG;
1900         if (msrs.nmsrs >= MAX_IO_MSRS)
1901                 goto out;
1902
1903         r = -ENOMEM;
1904         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1905         entries = kmalloc(size, GFP_KERNEL);
1906         if (!entries)
1907                 goto out;
1908
1909         r = -EFAULT;
1910         if (copy_from_user(entries, user_msrs->entries, size))
1911                 goto out_free;
1912
1913         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1914         if (r < 0)
1915                 goto out_free;
1916
1917         r = -EFAULT;
1918         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1919                 goto out_free;
1920
1921         r = n;
1922
1923 out_free:
1924         kfree(entries);
1925 out:
1926         return r;
1927 }
1928
1929 int kvm_dev_ioctl_check_extension(long ext)
1930 {
1931         int r;
1932
1933         switch (ext) {
1934         case KVM_CAP_IRQCHIP:
1935         case KVM_CAP_HLT:
1936         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1937         case KVM_CAP_SET_TSS_ADDR:
1938         case KVM_CAP_EXT_CPUID:
1939         case KVM_CAP_CLOCKSOURCE:
1940         case KVM_CAP_PIT:
1941         case KVM_CAP_NOP_IO_DELAY:
1942         case KVM_CAP_MP_STATE:
1943         case KVM_CAP_SYNC_MMU:
1944         case KVM_CAP_REINJECT_CONTROL:
1945         case KVM_CAP_IRQ_INJECT_STATUS:
1946         case KVM_CAP_ASSIGN_DEV_IRQ:
1947         case KVM_CAP_IRQFD:
1948         case KVM_CAP_IOEVENTFD:
1949         case KVM_CAP_PIT2:
1950         case KVM_CAP_PIT_STATE2:
1951         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1952         case KVM_CAP_XEN_HVM:
1953         case KVM_CAP_ADJUST_CLOCK:
1954         case KVM_CAP_VCPU_EVENTS:
1955         case KVM_CAP_HYPERV:
1956         case KVM_CAP_HYPERV_VAPIC:
1957         case KVM_CAP_HYPERV_SPIN:
1958         case KVM_CAP_PCI_SEGMENT:
1959         case KVM_CAP_DEBUGREGS:
1960         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1961         case KVM_CAP_XSAVE:
1962         case KVM_CAP_ASYNC_PF:
1963                 r = 1;
1964                 break;
1965         case KVM_CAP_COALESCED_MMIO:
1966                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1967                 break;
1968         case KVM_CAP_VAPIC:
1969                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1970                 break;
1971         case KVM_CAP_NR_VCPUS:
1972                 r = KVM_MAX_VCPUS;
1973                 break;
1974         case KVM_CAP_NR_MEMSLOTS:
1975                 r = KVM_MEMORY_SLOTS;
1976                 break;
1977         case KVM_CAP_PV_MMU:    /* obsolete */
1978                 r = 0;
1979                 break;
1980         case KVM_CAP_IOMMU:
1981                 r = iommu_found();
1982                 break;
1983         case KVM_CAP_MCE:
1984                 r = KVM_MAX_MCE_BANKS;
1985                 break;
1986         case KVM_CAP_XCRS:
1987                 r = cpu_has_xsave;
1988                 break;
1989         default:
1990                 r = 0;
1991                 break;
1992         }
1993         return r;
1994
1995 }
1996
1997 long kvm_arch_dev_ioctl(struct file *filp,
1998                         unsigned int ioctl, unsigned long arg)
1999 {
2000         void __user *argp = (void __user *)arg;
2001         long r;
2002
2003         switch (ioctl) {
2004         case KVM_GET_MSR_INDEX_LIST: {
2005                 struct kvm_msr_list __user *user_msr_list = argp;
2006                 struct kvm_msr_list msr_list;
2007                 unsigned n;
2008
2009                 r = -EFAULT;
2010                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2011                         goto out;
2012                 n = msr_list.nmsrs;
2013                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2014                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2015                         goto out;
2016                 r = -E2BIG;
2017                 if (n < msr_list.nmsrs)
2018                         goto out;
2019                 r = -EFAULT;
2020                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2021                                  num_msrs_to_save * sizeof(u32)))
2022                         goto out;
2023                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2024                                  &emulated_msrs,
2025                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2026                         goto out;
2027                 r = 0;
2028                 break;
2029         }
2030         case KVM_GET_SUPPORTED_CPUID: {
2031                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2032                 struct kvm_cpuid2 cpuid;
2033
2034                 r = -EFAULT;
2035                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2036                         goto out;
2037                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2038                                                       cpuid_arg->entries);
2039                 if (r)
2040                         goto out;
2041
2042                 r = -EFAULT;
2043                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2044                         goto out;
2045                 r = 0;
2046                 break;
2047         }
2048         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2049                 u64 mce_cap;
2050
2051                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2052                 r = -EFAULT;
2053                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2054                         goto out;
2055                 r = 0;
2056                 break;
2057         }
2058         default:
2059                 r = -EINVAL;
2060         }
2061 out:
2062         return r;
2063 }
2064
2065 static void wbinvd_ipi(void *garbage)
2066 {
2067         wbinvd();
2068 }
2069
2070 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2071 {
2072         return vcpu->kvm->arch.iommu_domain &&
2073                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2074 }
2075
2076 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2077 {
2078         /* Address WBINVD may be executed by guest */
2079         if (need_emulate_wbinvd(vcpu)) {
2080                 if (kvm_x86_ops->has_wbinvd_exit())
2081                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2082                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2083                         smp_call_function_single(vcpu->cpu,
2084                                         wbinvd_ipi, NULL, 1);
2085         }
2086
2087         kvm_x86_ops->vcpu_load(vcpu, cpu);
2088         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2089                 /* Make sure TSC doesn't go backwards */
2090                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2091                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2092                 if (tsc_delta < 0)
2093                         mark_tsc_unstable("KVM discovered backwards TSC");
2094                 if (check_tsc_unstable()) {
2095                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2096                         vcpu->arch.tsc_catchup = 1;
2097                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2098                 }
2099                 if (vcpu->cpu != cpu)
2100                         kvm_migrate_timers(vcpu);
2101                 vcpu->cpu = cpu;
2102         }
2103 }
2104
2105 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2106 {
2107         kvm_x86_ops->vcpu_put(vcpu);
2108         kvm_put_guest_fpu(vcpu);
2109         vcpu->arch.last_host_tsc = native_read_tsc();
2110 }
2111
2112 static int is_efer_nx(void)
2113 {
2114         unsigned long long efer = 0;
2115
2116         rdmsrl_safe(MSR_EFER, &efer);
2117         return efer & EFER_NX;
2118 }
2119
2120 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2121 {
2122         int i;
2123         struct kvm_cpuid_entry2 *e, *entry;
2124
2125         entry = NULL;
2126         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2127                 e = &vcpu->arch.cpuid_entries[i];
2128                 if (e->function == 0x80000001) {
2129                         entry = e;
2130                         break;
2131                 }
2132         }
2133         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2134                 entry->edx &= ~(1 << 20);
2135                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2136         }
2137 }
2138
2139 /* when an old userspace process fills a new kernel module */
2140 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2141                                     struct kvm_cpuid *cpuid,
2142                                     struct kvm_cpuid_entry __user *entries)
2143 {
2144         int r, i;
2145         struct kvm_cpuid_entry *cpuid_entries;
2146
2147         r = -E2BIG;
2148         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2149                 goto out;
2150         r = -ENOMEM;
2151         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2152         if (!cpuid_entries)
2153                 goto out;
2154         r = -EFAULT;
2155         if (copy_from_user(cpuid_entries, entries,
2156                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2157                 goto out_free;
2158         for (i = 0; i < cpuid->nent; i++) {
2159                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2160                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2161                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2162                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2163                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2164                 vcpu->arch.cpuid_entries[i].index = 0;
2165                 vcpu->arch.cpuid_entries[i].flags = 0;
2166                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2167                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2168                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2169         }
2170         vcpu->arch.cpuid_nent = cpuid->nent;
2171         cpuid_fix_nx_cap(vcpu);
2172         r = 0;
2173         kvm_apic_set_version(vcpu);
2174         kvm_x86_ops->cpuid_update(vcpu);
2175         update_cpuid(vcpu);
2176
2177 out_free:
2178         vfree(cpuid_entries);
2179 out:
2180         return r;
2181 }
2182
2183 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2184                                      struct kvm_cpuid2 *cpuid,
2185                                      struct kvm_cpuid_entry2 __user *entries)
2186 {
2187         int r;
2188
2189         r = -E2BIG;
2190         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2191                 goto out;
2192         r = -EFAULT;
2193         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2194                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2195                 goto out;
2196         vcpu->arch.cpuid_nent = cpuid->nent;
2197         kvm_apic_set_version(vcpu);
2198         kvm_x86_ops->cpuid_update(vcpu);
2199         update_cpuid(vcpu);
2200         return 0;
2201
2202 out:
2203         return r;
2204 }
2205
2206 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2207                                      struct kvm_cpuid2 *cpuid,
2208                                      struct kvm_cpuid_entry2 __user *entries)
2209 {
2210         int r;
2211
2212         r = -E2BIG;
2213         if (cpuid->nent < vcpu->arch.cpuid_nent)
2214                 goto out;
2215         r = -EFAULT;
2216         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2217                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2218                 goto out;
2219         return 0;
2220
2221 out:
2222         cpuid->nent = vcpu->arch.cpuid_nent;
2223         return r;
2224 }
2225
2226 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2227                            u32 index)
2228 {
2229         entry->function = function;
2230         entry->index = index;
2231         cpuid_count(entry->function, entry->index,
2232                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2233         entry->flags = 0;
2234 }
2235
2236 #define F(x) bit(X86_FEATURE_##x)
2237
2238 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2239                          u32 index, int *nent, int maxnent)
2240 {
2241         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2242 #ifdef CONFIG_X86_64
2243         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2244                                 ? F(GBPAGES) : 0;
2245         unsigned f_lm = F(LM);
2246 #else
2247         unsigned f_gbpages = 0;
2248         unsigned f_lm = 0;
2249 #endif
2250         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2251
2252         /* cpuid 1.edx */
2253         const u32 kvm_supported_word0_x86_features =
2254                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2255                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2256                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2257                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2258                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2259                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2260                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2261                 0 /* HTT, TM, Reserved, PBE */;
2262         /* cpuid 0x80000001.edx */
2263         const u32 kvm_supported_word1_x86_features =
2264                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2265                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2266                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2267                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2268                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2269                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2270                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2271                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2272         /* cpuid 1.ecx */
2273         const u32 kvm_supported_word4_x86_features =
2274                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2275                 0 /* DS-CPL, VMX, SMX, EST */ |
2276                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2277                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2278                 0 /* Reserved, DCA */ | F(XMM4_1) |
2279                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2280                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2281                 F(F16C);
2282         /* cpuid 0x80000001.ecx */
2283         const u32 kvm_supported_word6_x86_features =
2284                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2285                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2286                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2287                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2288
2289         /* all calls to cpuid_count() should be made on the same cpu */
2290         get_cpu();
2291         do_cpuid_1_ent(entry, function, index);
2292         ++*nent;
2293
2294         switch (function) {
2295         case 0:
2296                 entry->eax = min(entry->eax, (u32)0xd);
2297                 break;
2298         case 1:
2299                 entry->edx &= kvm_supported_word0_x86_features;
2300                 entry->ecx &= kvm_supported_word4_x86_features;
2301                 /* we support x2apic emulation even if host does not support
2302                  * it since we emulate x2apic in software */
2303                 entry->ecx |= F(X2APIC);
2304                 break;
2305         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2306          * may return different values. This forces us to get_cpu() before
2307          * issuing the first command, and also to emulate this annoying behavior
2308          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2309         case 2: {
2310                 int t, times = entry->eax & 0xff;
2311
2312                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2313                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2314                 for (t = 1; t < times && *nent < maxnent; ++t) {
2315                         do_cpuid_1_ent(&entry[t], function, 0);
2316                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2317                         ++*nent;
2318                 }
2319                 break;
2320         }
2321         /* function 4 and 0xb have additional index. */
2322         case 4: {
2323                 int i, cache_type;
2324
2325                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2326                 /* read more entries until cache_type is zero */
2327                 for (i = 1; *nent < maxnent; ++i) {
2328                         cache_type = entry[i - 1].eax & 0x1f;
2329                         if (!cache_type)
2330                                 break;
2331                         do_cpuid_1_ent(&entry[i], function, i);
2332                         entry[i].flags |=
2333                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2334                         ++*nent;
2335                 }
2336                 break;
2337         }
2338         case 0xb: {
2339                 int i, level_type;
2340
2341                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2342                 /* read more entries until level_type is zero */
2343                 for (i = 1; *nent < maxnent; ++i) {
2344                         level_type = entry[i - 1].ecx & 0xff00;
2345                         if (!level_type)
2346                                 break;
2347                         do_cpuid_1_ent(&entry[i], function, i);
2348                         entry[i].flags |=
2349                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2350                         ++*nent;
2351                 }
2352                 break;
2353         }
2354         case 0xd: {
2355                 int i;
2356
2357                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2358                 for (i = 1; *nent < maxnent; ++i) {
2359                         if (entry[i - 1].eax == 0 && i != 2)
2360                                 break;
2361                         do_cpuid_1_ent(&entry[i], function, i);
2362                         entry[i].flags |=
2363                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2364                         ++*nent;
2365                 }
2366                 break;
2367         }
2368         case KVM_CPUID_SIGNATURE: {
2369                 char signature[12] = "KVMKVMKVM\0\0";
2370                 u32 *sigptr = (u32 *)signature;
2371                 entry->eax = 0;
2372                 entry->ebx = sigptr[0];
2373                 entry->ecx = sigptr[1];
2374                 entry->edx = sigptr[2];
2375                 break;
2376         }
2377         case KVM_CPUID_FEATURES:
2378                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2379                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2380                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2381                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2382                 entry->ebx = 0;
2383                 entry->ecx = 0;
2384                 entry->edx = 0;
2385                 break;
2386         case 0x80000000:
2387                 entry->eax = min(entry->eax, 0x8000001a);
2388                 break;
2389         case 0x80000001:
2390                 entry->edx &= kvm_supported_word1_x86_features;
2391                 entry->ecx &= kvm_supported_word6_x86_features;
2392                 break;
2393         }
2394
2395         kvm_x86_ops->set_supported_cpuid(function, entry);
2396
2397         put_cpu();
2398 }
2399
2400 #undef F
2401
2402 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2403                                      struct kvm_cpuid_entry2 __user *entries)
2404 {
2405         struct kvm_cpuid_entry2 *cpuid_entries;
2406         int limit, nent = 0, r = -E2BIG;
2407         u32 func;
2408
2409         if (cpuid->nent < 1)
2410                 goto out;
2411         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2412                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2413         r = -ENOMEM;
2414         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2415         if (!cpuid_entries)
2416                 goto out;
2417
2418         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2419         limit = cpuid_entries[0].eax;
2420         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2421                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2422                              &nent, cpuid->nent);
2423         r = -E2BIG;
2424         if (nent >= cpuid->nent)
2425                 goto out_free;
2426
2427         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2428         limit = cpuid_entries[nent - 1].eax;
2429         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2430                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2431                              &nent, cpuid->nent);
2432
2433
2434
2435         r = -E2BIG;
2436         if (nent >= cpuid->nent)
2437                 goto out_free;
2438
2439         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2440                      cpuid->nent);
2441
2442         r = -E2BIG;
2443         if (nent >= cpuid->nent)
2444                 goto out_free;
2445
2446         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2447                      cpuid->nent);
2448
2449         r = -E2BIG;
2450         if (nent >= cpuid->nent)
2451                 goto out_free;
2452
2453         r = -EFAULT;
2454         if (copy_to_user(entries, cpuid_entries,
2455                          nent * sizeof(struct kvm_cpuid_entry2)))
2456                 goto out_free;
2457         cpuid->nent = nent;
2458         r = 0;
2459
2460 out_free:
2461         vfree(cpuid_entries);
2462 out:
2463         return r;
2464 }
2465
2466 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2467                                     struct kvm_lapic_state *s)
2468 {
2469         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2470
2471         return 0;
2472 }
2473
2474 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2475                                     struct kvm_lapic_state *s)
2476 {
2477         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2478         kvm_apic_post_state_restore(vcpu);
2479         update_cr8_intercept(vcpu);
2480
2481         return 0;
2482 }
2483
2484 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2485                                     struct kvm_interrupt *irq)
2486 {
2487         if (irq->irq < 0 || irq->irq >= 256)
2488                 return -EINVAL;
2489         if (irqchip_in_kernel(vcpu->kvm))
2490                 return -ENXIO;
2491
2492         kvm_queue_interrupt(vcpu, irq->irq, false);
2493         kvm_make_request(KVM_REQ_EVENT, vcpu);
2494
2495         return 0;
2496 }
2497
2498 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2499 {
2500         kvm_inject_nmi(vcpu);
2501
2502         return 0;
2503 }
2504
2505 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2506                                            struct kvm_tpr_access_ctl *tac)
2507 {
2508         if (tac->flags)
2509                 return -EINVAL;
2510         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2511         return 0;
2512 }
2513
2514 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2515                                         u64 mcg_cap)
2516 {
2517         int r;
2518         unsigned bank_num = mcg_cap & 0xff, bank;
2519
2520         r = -EINVAL;
2521         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2522                 goto out;
2523         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2524                 goto out;
2525         r = 0;
2526         vcpu->arch.mcg_cap = mcg_cap;
2527         /* Init IA32_MCG_CTL to all 1s */
2528         if (mcg_cap & MCG_CTL_P)
2529                 vcpu->arch.mcg_ctl = ~(u64)0;
2530         /* Init IA32_MCi_CTL to all 1s */
2531         for (bank = 0; bank < bank_num; bank++)
2532                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2533 out:
2534         return r;
2535 }
2536
2537 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2538                                       struct kvm_x86_mce *mce)
2539 {
2540         u64 mcg_cap = vcpu->arch.mcg_cap;
2541         unsigned bank_num = mcg_cap & 0xff;
2542         u64 *banks = vcpu->arch.mce_banks;
2543
2544         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2545                 return -EINVAL;
2546         /*
2547          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2548          * reporting is disabled
2549          */
2550         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2551             vcpu->arch.mcg_ctl != ~(u64)0)
2552                 return 0;
2553         banks += 4 * mce->bank;
2554         /*
2555          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2556          * reporting is disabled for the bank
2557          */
2558         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2559                 return 0;
2560         if (mce->status & MCI_STATUS_UC) {
2561                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2562                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2563                         printk(KERN_DEBUG "kvm: set_mce: "
2564                                "injects mce exception while "
2565                                "previous one is in progress!\n");
2566                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2567                         return 0;
2568                 }
2569                 if (banks[1] & MCI_STATUS_VAL)
2570                         mce->status |= MCI_STATUS_OVER;
2571                 banks[2] = mce->addr;
2572                 banks[3] = mce->misc;
2573                 vcpu->arch.mcg_status = mce->mcg_status;
2574                 banks[1] = mce->status;
2575                 kvm_queue_exception(vcpu, MC_VECTOR);
2576         } else if (!(banks[1] & MCI_STATUS_VAL)
2577                    || !(banks[1] & MCI_STATUS_UC)) {
2578                 if (banks[1] & MCI_STATUS_VAL)
2579                         mce->status |= MCI_STATUS_OVER;
2580                 banks[2] = mce->addr;
2581                 banks[3] = mce->misc;
2582                 banks[1] = mce->status;
2583         } else
2584                 banks[1] |= MCI_STATUS_OVER;
2585         return 0;
2586 }
2587
2588 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2589                                                struct kvm_vcpu_events *events)
2590 {
2591         events->exception.injected =
2592                 vcpu->arch.exception.pending &&
2593                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2594         events->exception.nr = vcpu->arch.exception.nr;
2595         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2596         events->exception.pad = 0;
2597         events->exception.error_code = vcpu->arch.exception.error_code;
2598
2599         events->interrupt.injected =
2600                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2601         events->interrupt.nr = vcpu->arch.interrupt.nr;
2602         events->interrupt.soft = 0;
2603         events->interrupt.shadow =
2604                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2605                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2606
2607         events->nmi.injected = vcpu->arch.nmi_injected;
2608         events->nmi.pending = vcpu->arch.nmi_pending;
2609         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2610         events->nmi.pad = 0;
2611
2612         events->sipi_vector = vcpu->arch.sipi_vector;
2613
2614         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2615                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2616                          | KVM_VCPUEVENT_VALID_SHADOW);
2617         memset(&events->reserved, 0, sizeof(events->reserved));
2618 }
2619
2620 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2621                                               struct kvm_vcpu_events *events)
2622 {
2623         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2624                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2625                               | KVM_VCPUEVENT_VALID_SHADOW))
2626                 return -EINVAL;
2627
2628         vcpu->arch.exception.pending = events->exception.injected;
2629         vcpu->arch.exception.nr = events->exception.nr;
2630         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2631         vcpu->arch.exception.error_code = events->exception.error_code;
2632
2633         vcpu->arch.interrupt.pending = events->interrupt.injected;
2634         vcpu->arch.interrupt.nr = events->interrupt.nr;
2635         vcpu->arch.interrupt.soft = events->interrupt.soft;
2636         if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2637                 kvm_pic_clear_isr_ack(vcpu->kvm);
2638         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2639                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2640                                                   events->interrupt.shadow);
2641
2642         vcpu->arch.nmi_injected = events->nmi.injected;
2643         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2644                 vcpu->arch.nmi_pending = events->nmi.pending;
2645         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2646
2647         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2648                 vcpu->arch.sipi_vector = events->sipi_vector;
2649
2650         kvm_make_request(KVM_REQ_EVENT, vcpu);
2651
2652         return 0;
2653 }
2654
2655 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2656                                              struct kvm_debugregs *dbgregs)
2657 {
2658         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2659         dbgregs->dr6 = vcpu->arch.dr6;
2660         dbgregs->dr7 = vcpu->arch.dr7;
2661         dbgregs->flags = 0;
2662         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2663 }
2664
2665 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2666                                             struct kvm_debugregs *dbgregs)
2667 {
2668         if (dbgregs->flags)
2669                 return -EINVAL;
2670
2671         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2672         vcpu->arch.dr6 = dbgregs->dr6;
2673         vcpu->arch.dr7 = dbgregs->dr7;
2674
2675         return 0;
2676 }
2677
2678 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2679                                          struct kvm_xsave *guest_xsave)
2680 {
2681         if (cpu_has_xsave)
2682                 memcpy(guest_xsave->region,
2683                         &vcpu->arch.guest_fpu.state->xsave,
2684                         xstate_size);
2685         else {
2686                 memcpy(guest_xsave->region,
2687                         &vcpu->arch.guest_fpu.state->fxsave,
2688                         sizeof(struct i387_fxsave_struct));
2689                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2690                         XSTATE_FPSSE;
2691         }
2692 }
2693
2694 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2695                                         struct kvm_xsave *guest_xsave)
2696 {
2697         u64 xstate_bv =
2698                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2699
2700         if (cpu_has_xsave)
2701                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2702                         guest_xsave->region, xstate_size);
2703         else {
2704                 if (xstate_bv & ~XSTATE_FPSSE)
2705                         return -EINVAL;
2706                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2707                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2708         }
2709         return 0;
2710 }
2711
2712 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2713                                         struct kvm_xcrs *guest_xcrs)
2714 {
2715         if (!cpu_has_xsave) {
2716                 guest_xcrs->nr_xcrs = 0;
2717                 return;
2718         }
2719
2720         guest_xcrs->nr_xcrs = 1;
2721         guest_xcrs->flags = 0;
2722         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2723         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2724 }
2725
2726 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2727                                        struct kvm_xcrs *guest_xcrs)
2728 {
2729         int i, r = 0;
2730
2731         if (!cpu_has_xsave)
2732                 return -EINVAL;
2733
2734         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2735                 return -EINVAL;
2736
2737         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2738                 /* Only support XCR0 currently */
2739                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2740                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2741                                 guest_xcrs->xcrs[0].value);
2742                         break;
2743                 }
2744         if (r)
2745                 r = -EINVAL;
2746         return r;
2747 }
2748
2749 long kvm_arch_vcpu_ioctl(struct file *filp,
2750                          unsigned int ioctl, unsigned long arg)
2751 {
2752         struct kvm_vcpu *vcpu = filp->private_data;
2753         void __user *argp = (void __user *)arg;
2754         int r;
2755         union {
2756                 struct kvm_lapic_state *lapic;
2757                 struct kvm_xsave *xsave;
2758                 struct kvm_xcrs *xcrs;
2759                 void *buffer;
2760         } u;
2761
2762         u.buffer = NULL;
2763         switch (ioctl) {
2764         case KVM_GET_LAPIC: {
2765                 r = -EINVAL;
2766                 if (!vcpu->arch.apic)
2767                         goto out;
2768                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2769
2770                 r = -ENOMEM;
2771                 if (!u.lapic)
2772                         goto out;
2773                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2774                 if (r)
2775                         goto out;
2776                 r = -EFAULT;
2777                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2778                         goto out;
2779                 r = 0;
2780                 break;
2781         }
2782         case KVM_SET_LAPIC: {
2783                 r = -EINVAL;
2784                 if (!vcpu->arch.apic)
2785                         goto out;
2786                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2787                 r = -ENOMEM;
2788                 if (!u.lapic)
2789                         goto out;
2790                 r = -EFAULT;
2791                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2792                         goto out;
2793                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2794                 if (r)
2795                         goto out;
2796                 r = 0;
2797                 break;
2798         }
2799         case KVM_INTERRUPT: {
2800                 struct kvm_interrupt irq;
2801
2802                 r = -EFAULT;
2803                 if (copy_from_user(&irq, argp, sizeof irq))
2804                         goto out;
2805                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2806                 if (r)
2807                         goto out;
2808                 r = 0;
2809                 break;
2810         }
2811         case KVM_NMI: {
2812                 r = kvm_vcpu_ioctl_nmi(vcpu);
2813                 if (r)
2814                         goto out;
2815                 r = 0;
2816                 break;
2817         }
2818         case KVM_SET_CPUID: {
2819                 struct kvm_cpuid __user *cpuid_arg = argp;
2820                 struct kvm_cpuid cpuid;
2821
2822                 r = -EFAULT;
2823                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2824                         goto out;
2825                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2826                 if (r)
2827                         goto out;
2828                 break;
2829         }
2830         case KVM_SET_CPUID2: {
2831                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2832                 struct kvm_cpuid2 cpuid;
2833
2834                 r = -EFAULT;
2835                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2836                         goto out;
2837                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2838                                               cpuid_arg->entries);
2839                 if (r)
2840                         goto out;
2841                 break;
2842         }
2843         case KVM_GET_CPUID2: {
2844                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2845                 struct kvm_cpuid2 cpuid;
2846
2847                 r = -EFAULT;
2848                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2849                         goto out;
2850                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2851                                               cpuid_arg->entries);
2852                 if (r)
2853                         goto out;
2854                 r = -EFAULT;
2855                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2856                         goto out;
2857                 r = 0;
2858                 break;
2859         }
2860         case KVM_GET_MSRS:
2861                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2862                 break;
2863         case KVM_SET_MSRS:
2864                 r = msr_io(vcpu, argp, do_set_msr, 0);
2865                 break;
2866         case KVM_TPR_ACCESS_REPORTING: {
2867                 struct kvm_tpr_access_ctl tac;
2868
2869                 r = -EFAULT;
2870                 if (copy_from_user(&tac, argp, sizeof tac))
2871                         goto out;
2872                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2873                 if (r)
2874                         goto out;
2875                 r = -EFAULT;
2876                 if (copy_to_user(argp, &tac, sizeof tac))
2877                         goto out;
2878                 r = 0;
2879                 break;
2880         };
2881         case KVM_SET_VAPIC_ADDR: {
2882                 struct kvm_vapic_addr va;
2883
2884                 r = -EINVAL;
2885                 if (!irqchip_in_kernel(vcpu->kvm))
2886                         goto out;
2887                 r = -EFAULT;
2888                 if (copy_from_user(&va, argp, sizeof va))
2889                         goto out;
2890                 r = 0;
2891                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2892                 break;
2893         }
2894         case KVM_X86_SETUP_MCE: {
2895                 u64 mcg_cap;
2896
2897                 r = -EFAULT;
2898                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2899                         goto out;
2900                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2901                 break;
2902         }
2903         case KVM_X86_SET_MCE: {
2904                 struct kvm_x86_mce mce;
2905
2906                 r = -EFAULT;
2907                 if (copy_from_user(&mce, argp, sizeof mce))
2908                         goto out;
2909                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2910                 break;
2911         }
2912         case KVM_GET_VCPU_EVENTS: {
2913                 struct kvm_vcpu_events events;
2914
2915                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2916
2917                 r = -EFAULT;
2918                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2919                         break;
2920                 r = 0;
2921                 break;
2922         }
2923         case KVM_SET_VCPU_EVENTS: {
2924                 struct kvm_vcpu_events events;
2925
2926                 r = -EFAULT;
2927                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2928                         break;
2929
2930                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2931                 break;
2932         }
2933         case KVM_GET_DEBUGREGS: {
2934                 struct kvm_debugregs dbgregs;
2935
2936                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2937
2938                 r = -EFAULT;
2939                 if (copy_to_user(argp, &dbgregs,
2940                                  sizeof(struct kvm_debugregs)))
2941                         break;
2942                 r = 0;
2943                 break;
2944         }
2945         case KVM_SET_DEBUGREGS: {
2946                 struct kvm_debugregs dbgregs;
2947
2948                 r = -EFAULT;
2949                 if (copy_from_user(&dbgregs, argp,
2950                                    sizeof(struct kvm_debugregs)))
2951                         break;
2952
2953                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2954                 break;
2955         }
2956         case KVM_GET_XSAVE: {
2957                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2958                 r = -ENOMEM;
2959                 if (!u.xsave)
2960                         break;
2961
2962                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2963
2964                 r = -EFAULT;
2965                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2966                         break;
2967                 r = 0;
2968                 break;
2969         }
2970         case KVM_SET_XSAVE: {
2971                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2972                 r = -ENOMEM;
2973                 if (!u.xsave)
2974                         break;
2975
2976                 r = -EFAULT;
2977                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2978                         break;
2979
2980                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2981                 break;
2982         }
2983         case KVM_GET_XCRS: {
2984                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2985                 r = -ENOMEM;
2986                 if (!u.xcrs)
2987                         break;
2988
2989                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2990
2991                 r = -EFAULT;
2992                 if (copy_to_user(argp, u.xcrs,
2993                                  sizeof(struct kvm_xcrs)))
2994                         break;
2995                 r = 0;
2996                 break;
2997         }
2998         case KVM_SET_XCRS: {
2999                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3000                 r = -ENOMEM;
3001                 if (!u.xcrs)
3002                         break;
3003
3004                 r = -EFAULT;
3005                 if (copy_from_user(u.xcrs, argp,
3006                                    sizeof(struct kvm_xcrs)))
3007                         break;
3008
3009                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3010                 break;
3011         }
3012         default:
3013                 r = -EINVAL;
3014         }
3015 out:
3016         kfree(u.buffer);
3017         return r;
3018 }
3019
3020 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3021 {
3022         int ret;
3023
3024         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3025                 return -1;
3026         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3027         return ret;
3028 }
3029
3030 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3031                                               u64 ident_addr)
3032 {
3033         kvm->arch.ept_identity_map_addr = ident_addr;
3034         return 0;
3035 }
3036
3037 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3038                                           u32 kvm_nr_mmu_pages)
3039 {
3040         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3041                 return -EINVAL;
3042
3043         mutex_lock(&kvm->slots_lock);
3044         spin_lock(&kvm->mmu_lock);
3045
3046         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3047         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3048
3049         spin_unlock(&kvm->mmu_lock);
3050         mutex_unlock(&kvm->slots_lock);
3051         return 0;
3052 }
3053
3054 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3055 {
3056         return kvm->arch.n_max_mmu_pages;
3057 }
3058
3059 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3060 {
3061         int r;
3062
3063         r = 0;
3064         switch (chip->chip_id) {
3065         case KVM_IRQCHIP_PIC_MASTER:
3066                 memcpy(&chip->chip.pic,
3067                         &pic_irqchip(kvm)->pics[0],
3068                         sizeof(struct kvm_pic_state));
3069                 break;
3070         case KVM_IRQCHIP_PIC_SLAVE:
3071                 memcpy(&chip->chip.pic,
3072                         &pic_irqchip(kvm)->pics[1],
3073                         sizeof(struct kvm_pic_state));
3074                 break;
3075         case KVM_IRQCHIP_IOAPIC:
3076                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3077                 break;
3078         default:
3079                 r = -EINVAL;
3080                 break;
3081         }
3082         return r;
3083 }
3084
3085 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3086 {
3087         int r;
3088
3089         r = 0;
3090         switch (chip->chip_id) {
3091         case KVM_IRQCHIP_PIC_MASTER:
3092                 spin_lock(&pic_irqchip(kvm)->lock);
3093                 memcpy(&pic_irqchip(kvm)->pics[0],
3094                         &chip->chip.pic,
3095                         sizeof(struct kvm_pic_state));
3096                 spin_unlock(&pic_irqchip(kvm)->lock);
3097                 break;
3098         case KVM_IRQCHIP_PIC_SLAVE:
3099                 spin_lock(&pic_irqchip(kvm)->lock);
3100                 memcpy(&pic_irqchip(kvm)->pics[1],
3101                         &chip->chip.pic,
3102                         sizeof(struct kvm_pic_state));
3103                 spin_unlock(&pic_irqchip(kvm)->lock);
3104                 break;
3105         case KVM_IRQCHIP_IOAPIC:
3106                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3107                 break;
3108         default:
3109                 r = -EINVAL;
3110                 break;
3111         }
3112         kvm_pic_update_irq(pic_irqchip(kvm));
3113         return r;
3114 }
3115
3116 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3117 {
3118         int r = 0;
3119
3120         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3121         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3122         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3123         return r;
3124 }
3125
3126 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3127 {
3128         int r = 0;
3129
3130         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3131         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3132         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3133         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3134         return r;
3135 }
3136
3137 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3138 {
3139         int r = 0;
3140
3141         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3142         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3143                 sizeof(ps->channels));
3144         ps->flags = kvm->arch.vpit->pit_state.flags;
3145         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3146         memset(&ps->reserved, 0, sizeof(ps->reserved));
3147         return r;
3148 }
3149
3150 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3151 {
3152         int r = 0, start = 0;
3153         u32 prev_legacy, cur_legacy;
3154         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3155         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3156         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3157         if (!prev_legacy && cur_legacy)
3158                 start = 1;
3159         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3160                sizeof(kvm->arch.vpit->pit_state.channels));
3161         kvm->arch.vpit->pit_state.flags = ps->flags;
3162         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3163         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3164         return r;
3165 }
3166
3167 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3168                                  struct kvm_reinject_control *control)
3169 {
3170         if (!kvm->arch.vpit)
3171                 return -ENXIO;
3172         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3173         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3174         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3175         return 0;
3176 }
3177
3178 /*
3179  * Get (and clear) the dirty memory log for a memory slot.
3180  */
3181 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3182                                       struct kvm_dirty_log *log)
3183 {
3184         int r, i;
3185         struct kvm_memory_slot *memslot;
3186         unsigned long n;
3187         unsigned long is_dirty = 0;
3188
3189         mutex_lock(&kvm->slots_lock);
3190
3191         r = -EINVAL;
3192         if (log->slot >= KVM_MEMORY_SLOTS)
3193                 goto out;
3194
3195         memslot = &kvm->memslots->memslots[log->slot];
3196         r = -ENOENT;
3197         if (!memslot->dirty_bitmap)
3198                 goto out;
3199
3200         n = kvm_dirty_bitmap_bytes(memslot);
3201
3202         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3203                 is_dirty = memslot->dirty_bitmap[i];
3204
3205         /* If nothing is dirty, don't bother messing with page tables. */
3206         if (is_dirty) {
3207                 struct kvm_memslots *slots, *old_slots;
3208                 unsigned long *dirty_bitmap;
3209
3210                 r = -ENOMEM;
3211                 dirty_bitmap = vmalloc(n);
3212                 if (!dirty_bitmap)
3213                         goto out;
3214                 memset(dirty_bitmap, 0, n);
3215
3216                 r = -ENOMEM;
3217                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3218                 if (!slots) {
3219                         vfree(dirty_bitmap);
3220                         goto out;
3221                 }
3222                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3223                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3224                 slots->generation++;
3225
3226                 old_slots = kvm->memslots;
3227                 rcu_assign_pointer(kvm->memslots, slots);
3228                 synchronize_srcu_expedited(&kvm->srcu);
3229                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3230                 kfree(old_slots);
3231
3232                 spin_lock(&kvm->mmu_lock);
3233                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3234                 spin_unlock(&kvm->mmu_lock);
3235
3236                 r = -EFAULT;
3237                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3238                         vfree(dirty_bitmap);
3239                         goto out;
3240                 }
3241                 vfree(dirty_bitmap);
3242         } else {
3243                 r = -EFAULT;
3244                 if (clear_user(log->dirty_bitmap, n))
3245                         goto out;
3246         }
3247
3248         r = 0;
3249 out:
3250         mutex_unlock(&kvm->slots_lock);
3251         return r;
3252 }
3253
3254 long kvm_arch_vm_ioctl(struct file *filp,
3255                        unsigned int ioctl, unsigned long arg)
3256 {
3257         struct kvm *kvm = filp->private_data;
3258         void __user *argp = (void __user *)arg;
3259         int r = -ENOTTY;
3260         /*
3261          * This union makes it completely explicit to gcc-3.x
3262          * that these two variables' stack usage should be
3263          * combined, not added together.
3264          */
3265         union {
3266                 struct kvm_pit_state ps;
3267                 struct kvm_pit_state2 ps2;
3268                 struct kvm_pit_config pit_config;
3269         } u;
3270
3271         switch (ioctl) {
3272         case KVM_SET_TSS_ADDR:
3273                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3274                 if (r < 0)
3275                         goto out;
3276                 break;
3277         case KVM_SET_IDENTITY_MAP_ADDR: {
3278                 u64 ident_addr;
3279
3280                 r = -EFAULT;
3281                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3282                         goto out;
3283                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3284                 if (r < 0)
3285                         goto out;
3286                 break;
3287         }
3288         case KVM_SET_NR_MMU_PAGES:
3289                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3290                 if (r)
3291                         goto out;
3292                 break;
3293         case KVM_GET_NR_MMU_PAGES:
3294                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3295                 break;
3296         case KVM_CREATE_IRQCHIP: {
3297                 struct kvm_pic *vpic;
3298
3299                 mutex_lock(&kvm->lock);
3300                 r = -EEXIST;
3301                 if (kvm->arch.vpic)
3302                         goto create_irqchip_unlock;
3303                 r = -ENOMEM;
3304                 vpic = kvm_create_pic(kvm);
3305                 if (vpic) {
3306                         r = kvm_ioapic_init(kvm);
3307                         if (r) {
3308                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3309                                                           &vpic->dev);
3310                                 kfree(vpic);
3311                                 goto create_irqchip_unlock;
3312                         }
3313                 } else
3314                         goto create_irqchip_unlock;
3315                 smp_wmb();
3316                 kvm->arch.vpic = vpic;
3317                 smp_wmb();
3318                 r = kvm_setup_default_irq_routing(kvm);
3319                 if (r) {
3320                         mutex_lock(&kvm->irq_lock);
3321                         kvm_ioapic_destroy(kvm);
3322                         kvm_destroy_pic(kvm);
3323                         mutex_unlock(&kvm->irq_lock);
3324                 }
3325         create_irqchip_unlock:
3326                 mutex_unlock(&kvm->lock);
3327                 break;
3328         }
3329         case KVM_CREATE_PIT:
3330                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3331                 goto create_pit;
3332         case KVM_CREATE_PIT2:
3333                 r = -EFAULT;
3334                 if (copy_from_user(&u.pit_config, argp,
3335                                    sizeof(struct kvm_pit_config)))
3336                         goto out;
3337         create_pit:
3338                 mutex_lock(&kvm->slots_lock);
3339                 r = -EEXIST;
3340                 if (kvm->arch.vpit)
3341                         goto create_pit_unlock;
3342                 r = -ENOMEM;
3343                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3344                 if (kvm->arch.vpit)
3345                         r = 0;
3346         create_pit_unlock:
3347                 mutex_unlock(&kvm->slots_lock);
3348                 break;
3349         case KVM_IRQ_LINE_STATUS:
3350         case KVM_IRQ_LINE: {
3351                 struct kvm_irq_level irq_event;
3352
3353                 r = -EFAULT;
3354                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3355                         goto out;
3356                 r = -ENXIO;
3357                 if (irqchip_in_kernel(kvm)) {
3358                         __s32 status;
3359                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,