[PATCH] iSeries build with newer assemblers and compilers
[linux-3.10.git] / arch / ppc64 / kernel / LparData.c
1 /* 
2  * Copyright 2001 Mike Corrigan, IBM Corp
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version
7  * 2 of the License, or (at your option) any later version.
8  */
9 #include <linux/config.h>
10 #include <linux/types.h>
11 #include <linux/threads.h>
12 #include <linux/module.h>
13 #include <linux/bitops.h>
14 #include <asm/processor.h>
15 #include <asm/ptrace.h>
16 #include <asm/naca.h>
17 #include <asm/abs_addr.h>
18 #include <asm/iSeries/ItLpNaca.h>
19 #include <asm/lppaca.h>
20 #include <asm/iSeries/ItLpRegSave.h>
21 #include <asm/paca.h>
22 #include <asm/iSeries/HvReleaseData.h>
23 #include <asm/iSeries/LparMap.h>
24 #include <asm/iSeries/ItVpdAreas.h>
25 #include <asm/iSeries/ItIplParmsReal.h>
26 #include <asm/iSeries/ItExtVpdPanel.h>
27 #include <asm/iSeries/ItLpQueue.h>
28 #include <asm/iSeries/IoHriProcessorVpd.h>
29 #include <asm/iSeries/ItSpCommArea.h>
30
31
32 /* The HvReleaseData is the root of the information shared between 
33  * the hypervisor and Linux.  
34  */
35 struct HvReleaseData hvReleaseData = {
36         .xDesc = 0xc8a5d9c4,    /* "HvRD" ebcdic */
37         .xSize = sizeof(struct HvReleaseData),
38         .xVpdAreasPtrOffset = offsetof(struct naca_struct, xItVpdAreas),
39         .xSlicNacaAddr = &naca,         /* 64-bit Naca address */
40         .xMsNucDataOffset = LPARMAP_PHYS,
41         .xFlags = HVREL_TAGSINACTIVE    /* tags inactive       */
42                                         /* 64 bit              */
43                                         /* shared processors   */
44                                         /* HMT allowed         */
45                   | 6,                  /* TEMP: This allows non-GA driver */
46         .xVrmIndex = 4,                 /* We are v5r2m0               */
47         .xMinSupportedPlicVrmIndex = 3,         /* v5r1m0 */
48         .xMinCompatablePlicVrmIndex = 3,        /* v5r1m0 */
49         .xVrmName = { 0xd3, 0x89, 0x95, 0xa4,   /* "Linux 2.4.64" ebcdic */
50                 0xa7, 0x40, 0xf2, 0x4b,
51                 0xf4, 0x4b, 0xf6, 0xf4 },
52 };
53
54 extern void system_reset_iSeries(void);
55 extern void machine_check_iSeries(void);
56 extern void data_access_iSeries(void);
57 extern void instruction_access_iSeries(void);
58 extern void hardware_interrupt_iSeries(void);
59 extern void alignment_iSeries(void);
60 extern void program_check_iSeries(void);
61 extern void fp_unavailable_iSeries(void);
62 extern void decrementer_iSeries(void);
63 extern void trap_0a_iSeries(void);
64 extern void trap_0b_iSeries(void);
65 extern void system_call_iSeries(void);
66 extern void single_step_iSeries(void);
67 extern void trap_0e_iSeries(void);
68 extern void performance_monitor_iSeries(void);
69 extern void data_access_slb_iSeries(void);
70 extern void instruction_access_slb_iSeries(void);
71         
72 struct ItLpNaca itLpNaca = {
73         .xDesc = 0xd397d581,            /* "LpNa" ebcdic */
74         .xSize = 0x0400,                /* size of ItLpNaca */
75         .xIntHdlrOffset = 0x0300,       /* offset to int array */
76         .xMaxIntHdlrEntries = 19,       /* # ents */
77         .xPrimaryLpIndex = 0,           /* Part # of primary */
78         .xServiceLpIndex = 0,           /* Part # of serv */
79         .xLpIndex = 0,                  /* Part # of me */
80         .xMaxLpQueues = 0,              /* # of LP queues */
81         .xLpQueueOffset = 0x100,        /* offset of start of LP queues */
82         .xPirEnvironMode = 0,           /* Piranha stuff */
83         .xPirConsoleMode = 0,
84         .xPirDasdMode = 0,
85         .xLparInstalled = 0,
86         .xSysPartitioned = 0,
87         .xHwSyncedTBs = 0,
88         .xIntProcUtilHmt = 0,
89         .xSpVpdFormat = 0,
90         .xIntProcRatio = 0,
91         .xPlicVrmIndex = 0,             /* VRM index of PLIC */
92         .xMinSupportedSlicVrmInd = 0,   /* min supported SLIC */
93         .xMinCompatableSlicVrmInd = 0,  /* min compat SLIC */
94         .xLoadAreaAddr = 0,             /* 64-bit addr of load area */
95         .xLoadAreaChunks = 0,           /* chunks for load area */
96         .xPaseSysCallCRMask = 0,        /* PASE mask */
97         .xSlicSegmentTablePtr = 0,      /* seg table */
98         .xOldLpQueue = { 0 },           /* Old LP Queue */
99         .xInterruptHdlr = {
100                 (u64)system_reset_iSeries,      /* 0x100 System Reset */
101                 (u64)machine_check_iSeries,     /* 0x200 Machine Check */
102                 (u64)data_access_iSeries,       /* 0x300 Data Access */
103                 (u64)instruction_access_iSeries, /* 0x400 Instruction Access */
104                 (u64)hardware_interrupt_iSeries, /* 0x500 External */
105                 (u64)alignment_iSeries,         /* 0x600 Alignment */
106                 (u64)program_check_iSeries,     /* 0x700 Program Check */
107                 (u64)fp_unavailable_iSeries,    /* 0x800 FP Unavailable */
108                 (u64)decrementer_iSeries,       /* 0x900 Decrementer */
109                 (u64)trap_0a_iSeries,           /* 0xa00 Trap 0A */
110                 (u64)trap_0b_iSeries,           /* 0xb00 Trap 0B */
111                 (u64)system_call_iSeries,       /* 0xc00 System Call */
112                 (u64)single_step_iSeries,       /* 0xd00 Single Step */
113                 (u64)trap_0e_iSeries,           /* 0xe00 Trap 0E */
114                 (u64)performance_monitor_iSeries,/* 0xf00 Performance Monitor */
115                 0,                              /* int 0x1000 */
116                 0,                              /* int 0x1010 */
117                 0,                              /* int 0x1020 CPU ctls */
118                 (u64)hardware_interrupt_iSeries, /* SC Ret Hdlr */
119                 (u64)data_access_slb_iSeries,   /* 0x380 D-SLB */
120                 (u64)instruction_access_slb_iSeries /* 0x480 I-SLB */
121         }
122 };
123 EXPORT_SYMBOL(itLpNaca);
124
125 /* May be filled in by the hypervisor so cannot end up in the BSS */
126 struct ItIplParmsReal xItIplParmsReal __attribute__((__section__(".data"))); 
127
128 /* May be filled in by the hypervisor so cannot end up in the BSS */
129 struct ItExtVpdPanel xItExtVpdPanel __attribute__((__section__(".data")));
130 EXPORT_SYMBOL(xItExtVpdPanel);
131
132 #define maxPhysicalProcessors 32
133
134 struct IoHriProcessorVpd xIoHriProcessorVpd[maxPhysicalProcessors] = {
135         {
136                 .xInstCacheOperandSize = 32,
137                 .xDataCacheOperandSize = 32,
138                 .xProcFreq     = 50000000,
139                 .xTimeBaseFreq = 50000000,
140                 .xPVR = 0x3600
141         }
142 };
143         
144 /* Space for Main Store Vpd 27,200 bytes */
145 /* May be filled in by the hypervisor so cannot end up in the BSS */
146 u64    xMsVpd[3400] __attribute__((__section__(".data")));
147
148 /* Space for Recovery Log Buffer */
149 /* May be filled in by the hypervisor so cannot end up in the BSS */
150 u64    xRecoveryLogBuffer[32] __attribute__((__section__(".data")));
151
152 struct SpCommArea xSpCommArea = {
153         .xDesc = 0xE2D7C3C2,
154         .xFormat = 1,
155 };
156
157 /* The LparMap data is now located at offset 0x6000 in head.S
158  * It was put there so that the HvReleaseData could address it
159  * with a 32-bit offset as required by the iSeries hypervisor
160  *
161  * The Naca has a pointer to the ItVpdAreas.  The hypervisor finds
162  * the Naca via the HvReleaseData area.  The HvReleaseData has the
163  * offset into the Naca of the pointer to the ItVpdAreas.
164  */
165 struct ItVpdAreas itVpdAreas = {
166         .xSlicDesc = 0xc9a3e5c1,                /* "ItVA" */
167         .xSlicSize = sizeof(struct ItVpdAreas),
168         .xSlicVpdEntries = ItVpdMaxEntries,     /* # VPD array entries */
169         .xSlicDmaEntries = ItDmaMaxEntries,     /* # DMA array entries */
170         .xSlicMaxLogicalProcs = NR_CPUS * 2,    /* Max logical procs */
171         .xSlicMaxPhysicalProcs = maxPhysicalProcessors, /* Max physical procs */
172         .xSlicDmaToksOffset = offsetof(struct ItVpdAreas, xPlicDmaToks),
173         .xSlicVpdAdrsOffset = offsetof(struct ItVpdAreas, xSlicVpdAdrs),
174         .xSlicDmaLensOffset = offsetof(struct ItVpdAreas, xPlicDmaLens),
175         .xSlicVpdLensOffset = offsetof(struct ItVpdAreas, xSlicVpdLens),
176         .xSlicMaxSlotLabels = 0,                /* max slot labels */
177         .xSlicMaxLpQueues = 1,                  /* max LP queues */
178         .xPlicDmaLens = { 0 },                  /* DMA lengths */
179         .xPlicDmaToks = { 0 },                  /* DMA tokens */
180         .xSlicVpdLens = {                       /* VPD lengths */
181                 0,0,0,                  /*  0 - 2 */
182                 sizeof(xItExtVpdPanel), /*       3 Extended VPD   */
183                 sizeof(struct paca_struct),     /*       4 length of Paca  */
184                 0,                      /*       5 */
185                 sizeof(struct ItIplParmsReal),/* 6 length of IPL parms */
186                 26992,                  /*       7 length of MS VPD */
187                 0,                      /*       8 */
188                 sizeof(struct ItLpNaca),/*       9 length of LP Naca */
189                 0,                      /*      10 */
190                 256,                    /*      11 length of Recovery Log Buf */
191                 sizeof(struct SpCommArea), /*   12 length of SP Comm Area */
192                 0,0,0,                  /* 13 - 15 */
193                 sizeof(struct IoHriProcessorVpd),/* 16 length of Proc Vpd */
194                 0,0,0,0,0,0,            /* 17 - 22  */
195                 sizeof(struct hvlpevent_queue), /* 23 length of Lp Queue */
196                 0,0                     /* 24 - 25 */
197                 },
198         .xSlicVpdAdrs = {                       /* VPD addresses */
199                 0,0,0,                  /*       0 -  2 */
200                 &xItExtVpdPanel,        /*       3 Extended VPD */
201                 &paca[0],               /*       4 first Paca */
202                 0,                      /*       5 */
203                 &xItIplParmsReal,       /*       6 IPL parms */
204                 &xMsVpd,                /*       7 MS Vpd */
205                 0,                      /*       8 */
206                 &itLpNaca,              /*       9 LpNaca */
207                 0,                      /*      10 */
208                 &xRecoveryLogBuffer,    /*      11 Recovery Log Buffer */
209                 &xSpCommArea,           /*      12 SP Comm Area */
210                 0,0,0,                  /* 13 - 15 */
211                 &xIoHriProcessorVpd,    /*      16 Proc Vpd */
212                 0,0,0,0,0,0,            /* 17 - 22 */
213                 &hvlpevent_queue,       /*      23 Lp Queue */
214                 0,0
215         }
216 };
217
218 struct msChunks msChunks;
219 EXPORT_SYMBOL(msChunks);
220
221 /* Depending on whether this is called from iSeries or pSeries setup
222  * code, the location of the msChunks struct may or may not have
223  * to be reloc'd, so we force the caller to do that for us by passing
224  * in a pointer to the structure.
225  */
226 unsigned long
227 msChunks_alloc(unsigned long mem, unsigned long num_chunks, unsigned long chunk_size)
228 {
229         unsigned long offset = reloc_offset();
230         struct msChunks *_msChunks = PTRRELOC(&msChunks);
231
232         _msChunks->num_chunks  = num_chunks;
233         _msChunks->chunk_size  = chunk_size;
234         _msChunks->chunk_shift = __ilog2(chunk_size);
235         _msChunks->chunk_mask  = (1UL<<_msChunks->chunk_shift)-1;
236
237         mem = _ALIGN(mem, sizeof(msChunks_entry));
238         _msChunks->abs = (msChunks_entry *)(mem + offset);
239         mem += num_chunks * sizeof(msChunks_entry);
240
241         return mem;
242 }