2 #include <linux/clk-provider.h>
4 #include <linux/slab.h>
5 #include <linux/kernel.h>
7 #include <mach/common.h>
8 #include <mach/hardware.h>
9 #include <mach/clock.h>
15 * @clk_hw clock source
16 * @parent the parent clock name
17 * @base base address of pll registers
19 * PLL clock version 1, found on i.MX1/21/25/27/31/35
26 #define to_clk_pllv1(clk) (container_of(clk, struct clk_pllv1, clk))
28 static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw,
29 unsigned long parent_rate)
31 struct clk_pllv1 *pll = to_clk_pllv1(hw);
33 return mxc_decode_pll(readl(pll->base), parent_rate);
36 struct clk_ops clk_pllv1_ops = {
37 .recalc_rate = clk_pllv1_recalc_rate,
40 struct clk *imx_clk_pllv1(const char *name, const char *parent,
43 struct clk_pllv1 *pll;
45 struct clk_init_data init;
47 pll = kmalloc(sizeof(*pll), GFP_KERNEL);
49 return ERR_PTR(-ENOMEM);
54 init.ops = &clk_pllv1_ops;
56 init.parent_names = &parent;
61 clk = clk_register(NULL, &pll->hw);