From: Linus Torvalds Date: Mon, 26 Feb 2007 22:17:50 +0000 (-0800) Subject: Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq X-Git-Tag: tegra-9.12.3~16173 X-Git-Url: https://nv-tegra.nvidia.com/r/gitweb?p=linux-2.6.git;a=commitdiff_plain;h=6f8c480f998a619082f18407f8d7f4c29e94dc6e;hp=-c Merge /pub/scm/linux/kernel/git/davej/cpufreq * master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] constify some data tables. [CPUFREQ] constify cpufreq_driver where possible. {rd,wr}msr_on_cpu SMP=n optimization [CPUFREQ] cpufreq_ondemand.c: don't use _WORK_NAR rdmsr_on_cpu, wrmsr_on_cpu [CPUFREQ] Revert default on deprecated config X86_SPEEDSTEP_CENTRINO_ACPI --- 6f8c480f998a619082f18407f8d7f4c29e94dc6e diff --combined arch/x86_64/lib/Makefile index 8d5f835af48,43d051ff1fb..c9432717839 --- a/arch/x86_64/lib/Makefile +++ b/arch/x86_64/lib/Makefile @@@ -5,8 -5,9 +5,9 @@@ CFLAGS_csum-partial.o := -funroll-loops obj-y := io.o iomap_copy.o + obj-$(CONFIG_SMP) += msr-on-cpu.o lib-y := csum-partial.o csum-copy.o csum-wrappers.o delay.o \ usercopy.o getuser.o putuser.o \ thunk.o clear_page.o copy_page.o bitstr.o bitops.o -lib-y += memcpy.o memmove.o memset.o copy_user.o rwlock.o +lib-y += memcpy.o memmove.o memset.o copy_user.o rwlock.o copy_user_nocache.o diff --combined include/asm-i386/msr.h index 6db40d0583f,8c35f3d90a8..ec3b6803fd3 --- a/include/asm-i386/msr.h +++ b/include/asm-i386/msr.h @@@ -83,6 -83,20 +83,20 @@@ static inline void wrmsrl (unsigned lon : "c" (counter)) #endif /* !CONFIG_PARAVIRT */ + #ifdef CONFIG_SMP + void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); + void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); + #else /* CONFIG_SMP */ + static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) + { + rdmsr(msr_no, *l, *h); + } + static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) + { + wrmsr(msr_no, l, h); + } + #endif /* CONFIG_SMP */ + /* symbolic names for some interesting MSRs */ /* Intel defined MSRs. */ #define MSR_IA32_P5_MC_ADDR 0 @@@ -307,7 -321,4 +321,7 @@@ #define MSR_CORE_PERF_GLOBAL_CTRL 0x38f #define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x390 +/* Geode defined MSRs */ +#define MSR_GEODE_BUSCONT_CONF0 0x1900 + #endif /* __ASM_MSR_H */