Merge branch 'omap-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind...
authorRussell King <rmk@dyn-67.arm.linux.org.uk>
Sat, 17 May 2008 21:56:08 +0000 (22:56 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sat, 17 May 2008 21:56:29 +0000 (22:56 +0100)
349 files changed:
Documentation/s390/CommonIO
arch/arm/common/locomo.c
arch/arm/kernel/armksyms.c
arch/arm/kernel/arthur.c
arch/arm/mach-ep93xx/core.c
arch/arm/mach-ns9xxx/irq.c
arch/arm/mach-orion5x/addr-map.c
arch/arm/mach-orion5x/common.c
arch/arm/mach-orion5x/common.h
arch/arm/mach-orion5x/dns323-setup.c
arch/arm/mach-orion5x/kurobox_pro-setup.c
arch/arm/mach-pxa/Makefile
arch/arm/mach-pxa/colibri.c
arch/arm/mach-pxa/corgi.c
arch/arm/mach-pxa/cpu-pxa.c
arch/arm/mach-pxa/lubbock.c
arch/arm/mach-pxa/pm.c
arch/arm/mach-pxa/poodle.c
arch/arm/mach-pxa/pxa25x.c
arch/arm/mach-pxa/pxa27x.c
arch/arm/mach-pxa/pxa3xx.c
arch/arm/mach-pxa/spitz.c
arch/arm/mach-pxa/spitz_pm.c
arch/arm/mach-pxa/tosa.c
arch/arm/mach-sa1100/pm.c
arch/arm/mm/proc-arm925.S
arch/arm/mm/proc-arm926.S
arch/arm/mm/proc-arm940.S
arch/arm/mm/proc-arm946.S
arch/arm/plat-s3c24xx/clock.c
arch/blackfin/Kconfig
arch/blackfin/kernel/asm-offsets.c
arch/blackfin/kernel/fixed_code.S
arch/blackfin/kernel/module.c
arch/blackfin/kernel/process.c
arch/blackfin/kernel/ptrace.c
arch/blackfin/kernel/signal.c
arch/blackfin/kernel/time-ts.c
arch/blackfin/mach-bf527/boards/ezkit.c
arch/blackfin/mach-bf533/boards/cm_bf533.c
arch/blackfin/mach-bf533/boards/ezkit.c
arch/blackfin/mach-bf533/boards/stamp.c
arch/blackfin/mach-bf537/boards/cm_bf537.c
arch/blackfin/mach-bf537/boards/stamp.c
arch/blackfin/mach-bf548/boards/cm_bf548.c
arch/blackfin/mach-bf548/boards/ezkit.c
arch/blackfin/mach-bf561/boards/cm_bf561.c
arch/blackfin/mach-bf561/boards/ezkit.c
arch/blackfin/mach-common/Makefile
arch/blackfin/mach-common/cpufreq.c
arch/blackfin/mach-common/dpmc.c [new file with mode: 0644]
arch/blackfin/mach-common/dpmc_modes.S [moved from arch/blackfin/mach-common/dpmc.S with 82% similarity]
arch/blackfin/mach-common/entry.S
arch/cris/kernel/sys_cris.c
arch/m32r/kernel/sys_m32r.c
arch/mn10300/Kconfig
arch/powerpc/boot/dts/sequoia.dts
arch/powerpc/kernel/btext.c
arch/powerpc/kernel/cputable.c
arch/powerpc/kernel/head_44x.S
arch/powerpc/kernel/head_64.S
arch/powerpc/kernel/isa-bridge.c
arch/powerpc/kernel/setup_64.c
arch/powerpc/platforms/cell/interrupt.c
arch/powerpc/platforms/cell/spu_base.c
arch/powerpc/platforms/cell/spu_priv1_mmio.c
arch/powerpc/platforms/cell/spufs/fault.c
arch/powerpc/platforms/cell/spufs/inode.c
arch/powerpc/platforms/cell/spufs/run.c
arch/powerpc/platforms/cell/spufs/sched.c
arch/powerpc/platforms/cell/spufs/spufs.h
arch/powerpc/platforms/cell/spufs/switch.c
arch/powerpc/platforms/chrp/pegasos_eth.c
arch/powerpc/sysdev/mv64x60_dev.c
arch/powerpc/sysdev/ppc4xx_pci.c
arch/powerpc/xmon/xmon.c
arch/ppc/syslib/mv64x60.c
arch/s390/Kconfig
arch/s390/kernel/compat_wrapper.S
arch/s390/kernel/entry.S
arch/s390/kernel/entry64.S
arch/s390/kernel/ptrace.c
arch/s390/kvm/Kconfig
arch/s390/kvm/intercept.c
arch/s390/kvm/kvm-s390.c
arch/s390/mm/Makefile
arch/s390/mm/init.c
arch/s390/mm/page-states.c [new file with mode: 0644]
arch/sh/Kconfig
arch/sh/Kconfig.debug
arch/sh/Makefile
arch/sh/boards/mpc1211/Makefile [deleted file]
arch/sh/boards/mpc1211/pci.c [deleted file]
arch/sh/boards/mpc1211/rtc.c [deleted file]
arch/sh/boards/mpc1211/setup.c [deleted file]
arch/sh/boards/renesas/migor/setup.c
arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
arch/sh/boards/renesas/r7780rp/setup.c
arch/sh/boards/renesas/rts7751r2d/setup.c
arch/sh/boards/se/7206/setup.c
arch/sh/boards/se/7722/setup.c
arch/sh/boot/compressed/Makefile_32
arch/sh/boot/compressed/Makefile_64
arch/sh/kernel/cpu/irq/intc-sh5.c
arch/sh/kernel/cpu/irq/intc.c
arch/sh/kernel/cpu/sh2a/fpu.c
arch/sh/kernel/cpu/sh3/Makefile
arch/sh/kernel/cpu/sh3/setup-sh3.c [new file with mode: 0644]
arch/sh/kernel/cpu/sh3/setup-sh7705.c
arch/sh/kernel/cpu/sh3/setup-sh770x.c
arch/sh/kernel/cpu/sh3/setup-sh7710.c
arch/sh/kernel/cpu/sh3/setup-sh7720.c
arch/sh/kernel/cpu/sh5/entry.S
arch/sh/kernel/cpu/sh5/probe.c
arch/sh/kernel/early_printk.c
arch/sh/kernel/setup.c
arch/sh/kernel/sh_ksyms_32.c
arch/sh/kernel/sh_ksyms_64.c
arch/sh/kernel/time_64.c
arch/sh/lib64/dbg.c
arch/sh/mm/Makefile_64
arch/sh/mm/cache-sh5.c
arch/sh/mm/ioremap_64.c
arch/sh/mm/numa.c
arch/sh/tools/mach-types
arch/sparc/kernel/signal.c
arch/sparc64/kernel/signal.c
arch/sparc64/kernel/signal32.c
arch/um/drivers/line.c
arch/um/include/line.h
arch/x86/Kconfig
arch/x86/kernel/Makefile
arch/x86/kernel/cpu/addon_cpuid_features.c
arch/x86/kernel/cpu/common.c
arch/x86/kernel/geode_32.c
arch/x86/kernel/i387.c
arch/x86/kernel/setup.c
arch/x86/kernel/setup_32.c
arch/x86/kernel/setup_64.c
arch/x86/mm/pat.c
arch/x86/pci/common.c
arch/x86/pci/k8-bus_64.c
block/blk-core.c
block/blk-ioc.c
block/blk-merge.c
block/blk-sysfs.c
block/blk-tag.c
block/cfq-iosched.c
crypto/hmac.c
drivers/accessibility/Kconfig
drivers/block/aoe/aoecmd.c
drivers/char/sx.c
drivers/char/vt.c
drivers/infiniband/hw/cxgb3/cxio_hal.c
drivers/infiniband/hw/cxgb3/cxio_hal.h
drivers/infiniband/hw/cxgb3/cxio_resource.c
drivers/infiniband/hw/cxgb3/iwch_mem.c
drivers/infiniband/hw/cxgb3/iwch_provider.c
drivers/infiniband/hw/cxgb3/iwch_provider.h
drivers/infiniband/hw/ehca/ehca_classes.h
drivers/infiniband/hw/ehca/ehca_irq.c
drivers/infiniband/hw/ehca/ehca_qp.c
drivers/infiniband/hw/ipath/ipath_driver.c
drivers/infiniband/hw/ipath/ipath_file_ops.c
drivers/infiniband/hw/ipath/ipath_iba7220.c
drivers/infiniband/hw/ipath/ipath_init_chip.c
drivers/infiniband/hw/ipath/ipath_intr.c
drivers/infiniband/hw/ipath/ipath_kernel.h
drivers/infiniband/hw/ipath/ipath_rc.c
drivers/infiniband/hw/ipath/ipath_ruc.c
drivers/infiniband/hw/ipath/ipath_sdma.c
drivers/infiniband/hw/ipath/ipath_verbs.c
drivers/input/misc/Kconfig
drivers/input/serio/i8042-io.h
drivers/md/raid10.c
drivers/media/Makefile
drivers/media/video/cx18/cx18-driver.c
drivers/media/video/saa7134/saa7134-video.c
drivers/mmc/host/mmci.c
drivers/mtd/maps/Kconfig
drivers/mtd/maps/Makefile
drivers/mtd/maps/mpc1211.c [deleted file]
drivers/net/3c59x.c
drivers/net/Kconfig
drivers/net/appletalk/cops.c
drivers/net/bonding/bond_main.c
drivers/net/bonding/bond_sysfs.c
drivers/net/cxgb3/cxgb3_main.c
drivers/net/e1000e/defines.h
drivers/net/e1000e/e1000.h
drivers/net/e1000e/ethtool.c
drivers/net/e1000e/hw.h
drivers/net/e1000e/ich8lan.c
drivers/net/e1000e/netdev.c
drivers/net/e1000e/phy.c
drivers/net/eexpress.c
drivers/net/fs_enet/mii-fec.c
drivers/net/gianfar.c
drivers/net/gianfar.h
drivers/net/gianfar_sysfs.c
drivers/net/macvlan.c
drivers/net/mv643xx_eth.c
drivers/net/pcnet32.c
drivers/net/phy/phy.c
drivers/net/tulip/uli526x.c
drivers/net/ucc_geth.c
drivers/net/ucc_geth.h
drivers/net/ucc_geth_ethtool.c
drivers/net/ucc_geth_mii.c
drivers/net/usb/asix.c
drivers/rtc/rtc-ds1511.c
drivers/rtc/rtc-sh.c
drivers/s390/char/tty3270.c
drivers/s390/cio/blacklist.c
drivers/s390/cio/cio.c
drivers/s390/cio/cio.h
drivers/s390/cio/cio_debug.h
drivers/s390/cio/css.c
drivers/s390/cio/device.c
drivers/s390/cio/device_fsm.c
drivers/s390/cio/device_id.c
drivers/s390/cio/device_pgid.c
drivers/s390/s390mach.c
drivers/scsi/dpt_i2o.c
drivers/scsi/dpti.h
drivers/serial/bfin_5xx.c
drivers/serial/serial_core.c
drivers/serial/sh-sci.c
drivers/serial/sh-sci.h
drivers/usb/serial/iuu_phoenix.c
drivers/video/pxafb.c
fs/bio.c
fs/cifs/CHANGES
fs/cifs/asn1.c
fs/cifs/cifs_dfs_ref.c
fs/cifs/cifsacl.c
fs/cifs/cifsfs.c
fs/cifs/cifsfs.h
fs/cifs/cifsglob.h
fs/cifs/cifspdu.h
fs/cifs/cifsproto.h
fs/cifs/cifssmb.c
fs/cifs/connect.c
fs/cifs/dir.c
fs/cifs/dns_resolve.c
fs/cifs/fcntl.c
fs/cifs/file.c
fs/cifs/inode.c
fs/cifs/link.c
fs/cifs/misc.c
fs/cifs/netmisc.c
fs/cifs/readdir.c
fs/cifs/smbencrypt.c
fs/cifs/xattr.c
fs/pipe.c
fs/proc/task_mmu.c
fs/splice.c
fs/udf/namei.c
fs/udf/partition.c
fs/udf/super.c
fs/udf/udfdecl.h
include/asm-arm/arch-omap/control.h
include/asm-arm/arch-pxa/pm.h
include/asm-arm/arch-pxa/system.h
include/asm-arm/arch-sa1100/irqs.h
include/asm-arm/hardware/locomo.h
include/asm-blackfin/dpmc.h
include/asm-blackfin/entry.h
include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
include/asm-blackfin/mach-bf533/defBF532.h
include/asm-blackfin/mach-bf533/irq.h
include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
include/asm-blackfin/mach-bf537/irq.h
include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
include/asm-blackfin/mach-bf548/defBF54x_base.h
include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
include/asm-blackfin/mach-bf561/defBF561.h
include/asm-blackfin/mach-bf561/irq.h
include/asm-blackfin/mach-common/context.S
include/asm-blackfin/time.h
include/asm-mn10300/processor.h
include/asm-powerpc/pgtable-ppc32.h
include/asm-powerpc/spu.h
include/asm-powerpc/spu_csa.h
include/asm-s390/kvm_host.h
include/asm-s390/page.h
include/asm-s390/ptrace.h
include/asm-s390/system.h
include/asm-sh/cpu-sh3/dma.h
include/asm-sh/hw_irq.h
include/asm-sh/io.h
include/asm-sh/keyboard.h [deleted file]
include/asm-sh/mmu_context.h
include/asm-sh/mmzone.h
include/asm-sh/mpc1211/dma.h [deleted file]
include/asm-sh/mpc1211/io.h [deleted file]
include/asm-sh/mpc1211/keyboard.h [deleted file]
include/asm-sh/mpc1211/m1543c.h [deleted file]
include/asm-sh/mpc1211/mc146818rtc.h [deleted file]
include/asm-sh/mpc1211/mpc1211.h [deleted file]
include/asm-sh/mpc1211/pci.h [deleted file]
include/asm-sh/r7780rp.h
include/asm-sh/tlb_64.h
include/asm-sh/topology.h
include/asm-sh/uaccess_64.h
include/asm-x86/bitops.h
include/asm-x86/geode.h
include/asm-x86/i387.h
include/asm-x86/pat.h
include/asm-x86/spinlock.h
include/asm-x86/topology.h
include/linux/compiler.h
include/linux/exportfs.h
include/linux/fs.h
include/linux/genhd.h
include/linux/hardirq.h
include/linux/ioprio.h
include/linux/mv643xx_eth.h
include/linux/netfilter/nf_conntrack_sip.h
include/linux/of_i2c.h
include/linux/phy.h
include/linux/rcupdate.h
include/linux/vermagic.h
init/Kconfig
kernel/cpuset.c
kernel/module.c
kernel/relay.c
kernel/sched.c
kernel/sched_fair.c
lib/kernel_lock.c
mm/filemap.c
mm/slub.c
net/can/af_can.c
net/core/dev.c
net/ipv4/ip_input.c
net/ipv4/tcp_input.c
net/ipv6/sit.c
net/mac80211/rc80211_pid_debugfs.c
net/netfilter/Kconfig
net/netfilter/nf_conntrack_sip.c
net/sunrpc/svc.c
net/tipc/core.h
sound/drivers/Kconfig
sound/oss/kahlua.c
sound/soc/at91/at91-pcm.c
sound/soc/at91/at91-ssc.c

index 8fbc0a852870f2a972b4d17adae71ba866bc5975..bf0baa19ec24e875716e09490a2afeaecb86b5e2 100644 (file)
@@ -8,17 +8,6 @@ Command line parameters
 
   Enable logging of debug information in case of ccw device timeouts.
 
-
-* cio_msg = yes | no
-  
-  Determines whether information on found devices and sensed device 
-  characteristics should be shown during startup or when new devices are
-  found, i. e. messages of the types "Detected device 0.0.4711 on subchannel
-  0.0.0042" and "SenseID: Device 0.0.4711 reports: ...".
-
-  Default is off.
-
-
 * cio_ignore = {all} |
               {<device> | <range of devices>} |
               {!<device> | !<range of devices>}
index ae21755872ed2c8e8d6ad4bdaef3207d1fcb09f9..d973c986f721aec8822f8ef0db8eeb97b0ec199e 100644 (file)
@@ -321,11 +321,42 @@ static void locomo_gpio_unmask_irq(unsigned int irq)
        locomo_writel(r, mapbase + LOCOMO_GIE);
 }
 
+static int GPIO_IRQ_rising_edge;
+static int GPIO_IRQ_falling_edge;
+
+static int locomo_gpio_type(unsigned int irq, unsigned int type)
+{
+       unsigned int mask;
+       void __iomem *mapbase = get_irq_chip_data(irq);
+
+       mask = 1 << (irq - LOCOMO_IRQ_GPIO_START);
+
+       if (type == IRQT_PROBE) {
+               if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask)
+                       return 0;
+               type = __IRQT_RISEDGE | __IRQT_FALEDGE;
+       }
+
+       if (type & __IRQT_RISEDGE)
+               GPIO_IRQ_rising_edge |= mask;
+       else
+               GPIO_IRQ_rising_edge &= ~mask;
+       if (type & __IRQT_FALEDGE)
+               GPIO_IRQ_falling_edge |= mask;
+       else
+               GPIO_IRQ_falling_edge &= ~mask;
+       locomo_writel(GPIO_IRQ_rising_edge, mapbase + LOCOMO_GRIE);
+       locomo_writel(GPIO_IRQ_falling_edge, mapbase + LOCOMO_GFIE);
+
+       return 0;
+}
+
 static struct irq_chip locomo_gpio_chip = {
-       .name   = "LOCOMO-gpio",
-       .ack    = locomo_gpio_ack_irq,
-       .mask   = locomo_gpio_mask_irq,
-       .unmask = locomo_gpio_unmask_irq,
+       .name     = "LOCOMO-gpio",
+       .ack      = locomo_gpio_ack_irq,
+       .mask     = locomo_gpio_mask_irq,
+       .unmask   = locomo_gpio_unmask_irq,
+       .set_type = locomo_gpio_type,
 };
 
 static void locomo_lt_handler(unsigned int irq, struct irq_desc *desc)
@@ -450,22 +481,18 @@ static void locomo_setup_irq(struct locomo *lchip)
        set_irq_chip(IRQ_LOCOMO_KEY_BASE, &locomo_chip);
        set_irq_chip_data(IRQ_LOCOMO_KEY_BASE, irqbase);
        set_irq_chained_handler(IRQ_LOCOMO_KEY_BASE, locomo_key_handler);
-       set_irq_flags(IRQ_LOCOMO_KEY_BASE, IRQF_VALID | IRQF_PROBE);
 
        set_irq_chip(IRQ_LOCOMO_GPIO_BASE, &locomo_chip);
        set_irq_chip_data(IRQ_LOCOMO_GPIO_BASE, irqbase);
        set_irq_chained_handler(IRQ_LOCOMO_GPIO_BASE, locomo_gpio_handler);
-       set_irq_flags(IRQ_LOCOMO_GPIO_BASE, IRQF_VALID | IRQF_PROBE);
 
        set_irq_chip(IRQ_LOCOMO_LT_BASE, &locomo_chip);
        set_irq_chip_data(IRQ_LOCOMO_LT_BASE, irqbase);
        set_irq_chained_handler(IRQ_LOCOMO_LT_BASE, locomo_lt_handler);
-       set_irq_flags(IRQ_LOCOMO_LT_BASE, IRQF_VALID | IRQF_PROBE);
 
        set_irq_chip(IRQ_LOCOMO_SPI_BASE, &locomo_chip);
        set_irq_chip_data(IRQ_LOCOMO_SPI_BASE, irqbase);
        set_irq_chained_handler(IRQ_LOCOMO_SPI_BASE, locomo_spi_handler);
-       set_irq_flags(IRQ_LOCOMO_SPI_BASE, IRQF_VALID | IRQF_PROBE);
 
        /* install handlers for IRQ_LOCOMO_KEY_BASE generated interrupts */
        set_irq_chip(LOCOMO_IRQ_KEY_START, &locomo_key_chip);
@@ -488,7 +515,7 @@ static void locomo_setup_irq(struct locomo *lchip)
        set_irq_flags(LOCOMO_IRQ_LT_START, IRQF_VALID | IRQF_PROBE);
 
        /* install handlers for IRQ_LOCOMO_SPI_BASE generated interrupts */
-       for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 3; irq++) {
+       for (irq = LOCOMO_IRQ_SPI_START; irq < LOCOMO_IRQ_SPI_START + 4; irq++) {
                set_irq_chip(irq, &locomo_spi_chip);
                set_irq_chip_data(irq, irqbase);
                set_irq_handler(irq, handle_edge_irq);
@@ -574,20 +601,20 @@ static int locomo_suspend(struct platform_device *dev, pm_message_t state)
 
        save->LCM_GPO     = locomo_readl(lchip->base + LOCOMO_GPO);     /* GPIO */
        locomo_writel(0x00, lchip->base + LOCOMO_GPO);
-       save->LCM_SPICT   = locomo_readl(lchip->base + LOCOMO_SPICT);   /* SPI */
+       save->LCM_SPICT   = locomo_readl(lchip->base + LOCOMO_SPI + LOCOMO_SPICT);      /* SPI */
        locomo_writel(0x40, lchip->base + LOCOMO_SPICT);
        save->LCM_GPE     = locomo_readl(lchip->base + LOCOMO_GPE);     /* GPIO */
        locomo_writel(0x00, lchip->base + LOCOMO_GPE);
        save->LCM_ASD     = locomo_readl(lchip->base + LOCOMO_ASD);     /* ADSTART */
        locomo_writel(0x00, lchip->base + LOCOMO_ASD);
-       save->LCM_SPIMD   = locomo_readl(lchip->base + LOCOMO_SPIMD);   /* SPI */
-       locomo_writel(0x3C14, lchip->base + LOCOMO_SPIMD);
+       save->LCM_SPIMD   = locomo_readl(lchip->base + LOCOMO_SPI + LOCOMO_SPIMD);      /* SPI */
+       locomo_writel(0x3C14, lchip->base + LOCOMO_SPI + LOCOMO_SPIMD);
 
        locomo_writel(0x00, lchip->base + LOCOMO_PAIF);
        locomo_writel(0x00, lchip->base + LOCOMO_DAC);
        locomo_writel(0x00, lchip->base + LOCOMO_BACKLIGHT + LOCOMO_TC);
 
-       if ( (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT0) & 0x88) && (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT1) & 0x88) )
+       if ((locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT0) & 0x88) && (locomo_readl(lchip->base + LOCOMO_LED + LOCOMO_LPT1) & 0x88))
                locomo_writel(0x00, lchip->base + LOCOMO_C32K);         /* CLK32 off */
        else
                /* 18MHz already enabled, so no wait */
@@ -616,10 +643,10 @@ static int locomo_resume(struct platform_device *dev)
        spin_lock_irqsave(&lchip->lock, flags);
 
        locomo_writel(save->LCM_GPO, lchip->base + LOCOMO_GPO);
-       locomo_writel(save->LCM_SPICT, lchip->base + LOCOMO_SPICT);
+       locomo_writel(save->LCM_SPICT, lchip->base + LOCOMO_SPI + LOCOMO_SPICT);
        locomo_writel(save->LCM_GPE, lchip->base + LOCOMO_GPE);
        locomo_writel(save->LCM_ASD, lchip->base + LOCOMO_ASD);
-       locomo_writel(save->LCM_SPIMD, lchip->base + LOCOMO_SPIMD);
+       locomo_writel(save->LCM_SPIMD, lchip->base + LOCOMO_SPI + LOCOMO_SPIMD);
 
        locomo_writel(0x00, lchip->base + LOCOMO_C32K);
        locomo_writel(0x90, lchip->base + LOCOMO_TADC);
@@ -688,9 +715,9 @@ __locomo_probe(struct device *me, struct resource *mem, int irq)
 
        /* GPIO */
        locomo_writel(0, lchip->base + LOCOMO_GPO);
-       locomo_writel( (LOCOMO_GPIO(2) | LOCOMO_GPIO(3) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14))
+       locomo_writel((LOCOMO_GPIO(1) | LOCOMO_GPIO(2) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14))
                        , lchip->base + LOCOMO_GPE);
-       locomo_writel( (LOCOMO_GPIO(2) | LOCOMO_GPIO(3) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14))
+       locomo_writel((LOCOMO_GPIO(1) | LOCOMO_GPIO(2) | LOCOMO_GPIO(13) | LOCOMO_GPIO(14))
                        , lchip->base + LOCOMO_GPD);
        locomo_writel(0, lchip->base + LOCOMO_GIE);
 
@@ -833,7 +860,10 @@ void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir
        spin_lock_irqsave(&lchip->lock, flags);
 
        r = locomo_readl(lchip->base + LOCOMO_GPD);
-       r &= ~bits;
+       if (dir)
+               r |= bits;
+       else
+               r &= ~bits;
        locomo_writel(r, lchip->base + LOCOMO_GPD);
 
        r = locomo_readl(lchip->base + LOCOMO_GPE);
index f73d62e8ab606473b4cc69e4f25775493f3a8af8..688b7b1ee416c54987239740680ffbd29fdeb3b0 100644 (file)
@@ -179,3 +179,5 @@ EXPORT_SYMBOL(_find_next_zero_bit_be);
 EXPORT_SYMBOL(_find_first_bit_be);
 EXPORT_SYMBOL(_find_next_bit_be);
 #endif
+
+EXPORT_SYMBOL(copy_page);
index 0ee2e98196313a6dffaf46e38faaf5b426d80144..321c5291d05f0aea77f326fd05bbb2cd2a5a3b2a 100644 (file)
@@ -90,3 +90,5 @@ static void __exit arthur_exit(void)
 
 module_init(arthur_init);
 module_exit(arthur_exit);
+
+MODULE_LICENSE("GPL");
index 8bc187240542e6611f051809c233796f331fcfef..1d7bca6aa441e3a092a87933a3d87e9c9a2f245f 100644 (file)
@@ -280,7 +280,7 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type)
        const int port = gpio >> 3;
        const int port_mask = 1 << (gpio & 7);
 
-       gpio_direction_output(gpio, gpio_get_value(gpio));
+       gpio_direction_input(gpio);
 
        switch (type) {
        case IRQT_RISING:
index 36e5835e60975127b798b28b8fe756238f354feb..ca85d24cf39f1f11553c2ac856d08b71bb9a9ff9 100644 (file)
@@ -62,7 +62,7 @@ static struct irq_chip ns9xxx_chip = {
 #if 0
 #define handle_irq handle_level_irq
 #else
-void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
+static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
 {
        unsigned int cpu = smp_processor_id();
        struct irqaction *action;
@@ -70,27 +70,35 @@ void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
 
        spin_lock(&desc->lock);
 
-       if (unlikely(desc->status & IRQ_INPROGRESS))
-               goto out_unlock;
+       BUG_ON(desc->status & IRQ_INPROGRESS);
 
        desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
        kstat_cpu(cpu).irqs[irq]++;
 
        action = desc->action;
        if (unlikely(!action || (desc->status & IRQ_DISABLED)))
-               goto out_unlock;
+               goto out_mask;
 
        desc->status |= IRQ_INPROGRESS;
        spin_unlock(&desc->lock);
 
        action_ret = handle_IRQ_event(irq, action);
 
+       /* XXX: There is no direct way to access noirqdebug, so check
+        * unconditionally for spurious irqs...
+        * Maybe this function should go to kernel/irq/chip.c? */
+       note_interrupt(irq, desc, action_ret);
+
        spin_lock(&desc->lock);
        desc->status &= ~IRQ_INPROGRESS;
-       if (!(desc->status & IRQ_DISABLED) && desc->chip->ack)
-               desc->chip->ack(irq);
 
-out_unlock:
+       if (desc->status & IRQ_DISABLED)
+out_mask:
+               desc->chip->mask(irq);
+
+       /* ack unconditionally to unmask lower prio irqs */
+       desc->chip->ack(irq);
+
        spin_unlock(&desc->lock);
 }
 #define handle_irq handle_prio_irq
index 9608503d67f5475eda40eaea8efc252f5c123a9d..e63fb05dc8931e637bbec1f6c0f7398e79ebc09a 100644 (file)
  * Non-CPU Masters address decoding --
  * Unlike the CPU, we setup the access from Orion's master interfaces to DDR
  * banks only (the typical use case).
- * Setup access for each master to DDR is issued by common.c.
- *
- * Note: although orion_setbits() and orion_clrbits() are not atomic
- * no locking is necessary here since code in this file is only called
- * at boot time when there is no concurrency issues.
+ * Setup access for each master to DDR is issued by platform device setup.
  */
 
 /*
 #define TARGET_DEV_BUS         1
 #define TARGET_PCI             3
 #define TARGET_PCIE            4
-#define ATTR_DDR_CS(n)         (((n) ==0) ? 0xe :      \
-                               ((n) == 1) ? 0xd :      \
-                               ((n) == 2) ? 0xb :      \
-                               ((n) == 3) ? 0x7 : 0xf)
 #define ATTR_PCIE_MEM          0x59
 #define ATTR_PCIE_IO           0x51
 #define ATTR_PCIE_WA           0x79
 #define ATTR_DEV_CS1           0x1d
 #define ATTR_DEV_CS2           0x1b
 #define ATTR_DEV_BOOT          0xf
-#define WIN_EN                 1
 
 /*
  * Helpers to get DDR bank info
  */
-#define DDR_BASE_CS(n)         ORION5X_DDR_REG(0x1500 + ((n) * 8))
-#define DDR_SIZE_CS(n)         ORION5X_DDR_REG(0x1504 + ((n) * 8))
-#define DDR_MAX_CS             4
-#define DDR_REG_TO_SIZE(reg)   (((reg) | 0xffffff) + 1)
-#define DDR_REG_TO_BASE(reg)   ((reg) & 0xff000000)
-#define DDR_BANK_EN            1
+#define DDR_BASE_CS(n)         ORION5X_DDR_REG(0x1500 + ((n) << 3))
+#define DDR_SIZE_CS(n)         ORION5X_DDR_REG(0x1504 + ((n) << 3))
 
 /*
  * CPU Address Decode Windows registers
 #define CPU_WIN_REMAP_LO(n)    ORION5X_BRIDGE_REG(0x008 | ((n) << 4))
 #define CPU_WIN_REMAP_HI(n)    ORION5X_BRIDGE_REG(0x00c | ((n) << 4))
 
-/*
- * Gigabit Ethernet Address Decode Windows registers
- */
-#define ETH_WIN_BASE(win)      ORION5X_ETH_REG(0x200 + ((win) * 8))
-#define ETH_WIN_SIZE(win)      ORION5X_ETH_REG(0x204 + ((win) * 8))
-#define ETH_WIN_REMAP(win)     ORION5X_ETH_REG(0x280 + ((win) * 4))
-#define ETH_WIN_EN             ORION5X_ETH_REG(0x290)
-#define ETH_WIN_PROT           ORION5X_ETH_REG(0x294)
-#define ETH_MAX_WIN            6
-#define ETH_MAX_REMAP_WIN      4
-
 
 struct mbus_dram_target_info orion5x_mbus_dram_info;
 
@@ -202,39 +178,3 @@ void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
 {
        setup_cpu_win(7, base, size, TARGET_PCIE, ATTR_PCIE_WA, -1);
 }
-
-void __init orion5x_setup_eth_wins(void)
-{
-       int i;
-
-       /*
-        * First, disable and clear windows
-        */
-       for (i = 0; i < ETH_MAX_WIN; i++) {
-               orion5x_write(ETH_WIN_BASE(i), 0);
-               orion5x_write(ETH_WIN_SIZE(i), 0);
-               orion5x_setbits(ETH_WIN_EN, 1 << i);
-               orion5x_clrbits(ETH_WIN_PROT, 0x3 << (i * 2));
-               if (i < ETH_MAX_REMAP_WIN)
-                       orion5x_write(ETH_WIN_REMAP(i), 0);
-       }
-
-       /*
-        * Setup windows for DDR banks.
-        */
-       for (i = 0; i < DDR_MAX_CS; i++) {
-               u32 base, size;
-               size = orion5x_read(DDR_SIZE_CS(i));
-               base = orion5x_read(DDR_BASE_CS(i));
-               if (size & DDR_BANK_EN) {
-                       base = DDR_REG_TO_BASE(base);
-                       size = DDR_REG_TO_SIZE(size);
-                       orion5x_write(ETH_WIN_SIZE(i), (size-1) & 0xffff0000);
-                       orion5x_write(ETH_WIN_BASE(i), (base & 0xffff0000) |
-                                       (ATTR_DDR_CS(i) << 8) |
-                                       TARGET_DDR);
-                       orion5x_clrbits(ETH_WIN_EN, 1 << i);
-                       orion5x_setbits(ETH_WIN_PROT, 0x3 << (i * 2));
-               }
-       }
-}
index 968deb58be01f7c9dd42905c486897feb5634928..4f13fd037f0421ef039bddd38d47a712abd0a05e 100644 (file)
@@ -190,6 +190,11 @@ static struct platform_device orion5x_ehci1 = {
  * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
  ****************************************************************************/
 
+struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
+       .dram           = &orion5x_mbus_dram_info,
+       .t_clk          = ORION5X_TCLK,
+};
+
 static struct resource orion5x_eth_shared_resources[] = {
        {
                .start  = ORION5X_ETH_PHYS_BASE + 0x2000,
@@ -201,6 +206,9 @@ static struct resource orion5x_eth_shared_resources[] = {
 static struct platform_device orion5x_eth_shared = {
        .name           = MV643XX_ETH_SHARED_NAME,
        .id             = 0,
+       .dev            = {
+               .platform_data  = &orion5x_eth_shared_data,
+       },
        .num_resources  = 1,
        .resource       = orion5x_eth_shared_resources,
 };
@@ -223,7 +231,9 @@ static struct platform_device orion5x_eth = {
 
 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 {
+       eth_data->shared = &orion5x_eth_shared;
        orion5x_eth.dev.platform_data = eth_data;
+
        platform_device_register(&orion5x_eth_shared);
        platform_device_register(&orion5x_eth);
 }
@@ -360,7 +370,6 @@ void __init orion5x_init(void)
         * Setup Orion address map
         */
        orion5x_setup_cpu_mbus_bridge();
-       orion5x_setup_eth_wins();
 
        /*
         * Register devices.
index 14adf8d1a54ac8d96f33e23a8a92b98369faab72..bd0f05de6e18d2698087a5c72393101798477b26 100644 (file)
@@ -22,7 +22,6 @@ void orion5x_setup_dev0_win(u32 base, u32 size);
 void orion5x_setup_dev1_win(u32 base, u32 size);
 void orion5x_setup_dev2_win(u32 base, u32 size);
 void orion5x_setup_pcie_wa_win(u32 base, u32 size);
-void orion5x_setup_eth_wins(void);
 
 /*
  * Shared code used internally by other Orion core functions.
index f9430f5ca9a8891d01ea4a5f2ea57894af0e923e..27ce967ab9e5c3792420bd47badd441ff527950f 100644 (file)
@@ -58,7 +58,7 @@ static int __init dns323_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 }
 
 static struct hw_pci dns323_pci __initdata = {
-       .nr_controllers = 1,
+       .nr_controllers = 2,
        .swizzle        = pci_std_swizzle,
        .setup          = orion5x_pci_sys_setup,
        .scan           = orion5x_pci_sys_scan_bus,
index 88410862feefa6d7b3c2d75b546ad80de62c485e..f5074b877b7fbfbc6dfcfe7eb8d7a1852c66e3cb 100644 (file)
@@ -138,7 +138,7 @@ static int __init kurobox_pro_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 }
 
 static struct hw_pci kurobox_pro_pci __initdata = {
-       .nr_controllers = 1,
+       .nr_controllers = 2,
        .swizzle        = pci_std_swizzle,
        .setup          = orion5x_pci_sys_setup,
        .scan           = orion5x_pci_sys_scan_bus,
index 6a830853aa6a610e532c33040f0ab96544dc8c3e..0e6d05bb81aa9ae806ea6461078dea57679e1445 100644 (file)
@@ -5,6 +5,13 @@
 # Common support (must be linked before board specific support)
 obj-y                          += clock.o devices.o generic.o irq.o dma.o \
                                   time.o gpio.o
+obj-$(CONFIG_PM)               += pm.o sleep.o standby.o
+obj-$(CONFIG_CPU_FREQ)         += cpu-pxa.o
+
+# Generic drivers that other drivers may depend upon
+obj-$(CONFIG_PXA_SSP)          += ssp.o
+
+# SoC-specific code
 obj-$(CONFIG_PXA25x)           += mfp-pxa2xx.o pxa25x.o
 obj-$(CONFIG_PXA27x)           += mfp-pxa2xx.o pxa27x.o
 obj-$(CONFIG_PXA3xx)           += mfp-pxa3xx.o pxa3xx.o smemc.o
@@ -48,11 +55,6 @@ led-$(CONFIG_MACH_TRIZEPS4)  += leds-trizeps4.o
 
 obj-$(CONFIG_LEDS)             += $(led-y)
 
-# Misc features
-obj-$(CONFIG_PM)               += pm.o sleep.o standby.o
-obj-$(CONFIG_CPU_FREQ)         += cpu-pxa.o
-obj-$(CONFIG_PXA_SSP)          += ssp.o
-
 ifeq ($(CONFIG_PCI),y)
 obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o
 endif
index 43bf5a183e90da539d757505a4031d482ed4deb1..574839d7c1328c1c83f4c354b7cb51800c3f8516 100644 (file)
@@ -98,7 +98,7 @@ static struct resource dm9000_resources[] = {
        [2] = {
                .start  = COLIBRI_ETH_IRQ,
                .end    = COLIBRI_ETH_IRQ,
-               .flags  = IORESOURCE_IRQ,
+               .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
        },
 };
 
@@ -119,7 +119,6 @@ static void __init colibri_init(void)
        /* DM9000 LAN */
        pxa_gpio_mode(GPIO78_nCS_2_MD);
        pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
-       set_irq_type(COLIBRI_ETH_IRQ, IRQT_FALLING);
 
        platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices));
 }
index 259ca821e464444d3ae02b0d1bbad9031697cad1..b757dd7566552e6a547eaf1137f1ea3563ed5820 100644 (file)
@@ -493,8 +493,6 @@ static struct platform_device *devices[] __initdata = {
 
 static void corgi_poweroff(void)
 {
-       RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
        if (!machine_is_corgi())
                /* Green LED off tells the bootloader to halt */
                reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
@@ -503,8 +501,6 @@ static void corgi_poweroff(void)
 
 static void corgi_restart(char mode)
 {
-       RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
        if (!machine_is_corgi())
                /* Green LED on tells the bootloader to reboot */
                set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_LED_GREEN);
index 4b21479332ae40c073c1f184b1980a502aca4c40..fb9ba1ab28269bddf4dc938f000f691bdaee1d29 100644 (file)
@@ -49,125 +49,216 @@ MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
 #define freq_debug  0
 #endif
 
+static unsigned int pxa27x_maxfreq;
+module_param(pxa27x_maxfreq, uint, 0);
+MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz"
+                "(typically 624=>pxa270, 416=>pxa271, 520=>pxa272)");
+
 typedef struct {
        unsigned int khz;
        unsigned int membus;
        unsigned int cccr;
        unsigned int div2;
+       unsigned int cclkcfg;
 } pxa_freqs_t;
 
 /* Define the refresh period in mSec for the SDRAM and the number of rows */
-#define SDRAM_TREF          64      /* standard 64ms SDRAM */
-#define SDRAM_ROWS          4096    /* 64MB=8192 32MB=4096 */
-#define MDREFR_DRI(x)       (((x) * SDRAM_TREF) / (SDRAM_ROWS * 32))
-
-#define CCLKCFG_TURBO       0x1
-#define CCLKCFG_FCS         0x2
-#define PXA25x_MIN_FREQ     99500
-#define PXA25x_MAX_FREQ     398100
-#define MDREFR_DB2_MASK     (MDREFR_K2DB2 | MDREFR_K1DB2)
-#define MDREFR_DRI_MASK     0xFFF
+#define SDRAM_TREF     64      /* standard 64ms SDRAM */
+#define SDRAM_ROWS     4096    /* 64MB=8192 32MB=4096 */
 
+#define CCLKCFG_TURBO          0x1
+#define CCLKCFG_FCS            0x2
+#define CCLKCFG_HALFTURBO      0x4
+#define CCLKCFG_FASTBUS                0x8
+#define MDREFR_DB2_MASK                (MDREFR_K2DB2 | MDREFR_K1DB2)
+#define MDREFR_DRI_MASK                0xFFF
 
+/*
+ * PXA255 definitions
+ */
 /* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
+#define CCLKCFG                        CCLKCFG_TURBO | CCLKCFG_FCS
+
 static pxa_freqs_t pxa255_run_freqs[] =
 {
-    /* CPU   MEMBUS  CCCR  DIV2*/
-    { 99500,  99500, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50,  SDRAM=50 */
-    {132700, 132700, 0x123, 1}, /* run=133, turbo=133, PXbus=66,  SDRAM=66 */
-    {199100,  99500, 0x141, 0}, /* run=199, turbo=199, PXbus=99,  SDRAM=99 */
-    {265400, 132700, 0x143, 1}, /* run=265, turbo=265, PXbus=133, SDRAM=66 */
-    {331800, 165900, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */
-    {398100,  99500, 0x161, 0}, /* run=398, turbo=398, PXbus=196, SDRAM=99 */
-    {0,}
+       /* CPU   MEMBUS  CCCR  DIV2 CCLKCFG        run  turbo PXbus SDRAM */
+       { 99500,  99500, 0x121, 1,  CCLKCFG},   /*  99,   99,   50,   50  */
+       {132700, 132700, 0x123, 1,  CCLKCFG},   /* 133,  133,   66,   66  */
+       {199100,  99500, 0x141, 0,  CCLKCFG},   /* 199,  199,   99,   99  */
+       {265400, 132700, 0x143, 1,  CCLKCFG},   /* 265,  265,  133,   66  */
+       {331800, 165900, 0x145, 1,  CCLKCFG},   /* 331,  331,  166,   83  */
+       {398100,  99500, 0x161, 0,  CCLKCFG},   /* 398,  398,  196,   99  */
 };
-#define NUM_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
-
-static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1];
 
 /* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
 static pxa_freqs_t pxa255_turbo_freqs[] =
 {
-    /* CPU   MEMBUS  CCCR  DIV2*/
-    { 99500, 99500,  0x121, 1}, /* run=99,  turbo= 99, PXbus=50, SDRAM=50 */
-    {199100, 99500,  0x221, 0}, /* run=99,  turbo=199, PXbus=50, SDRAM=99 */
-    {298500, 99500,  0x321, 0}, /* run=99,  turbo=287, PXbus=50, SDRAM=99 */
-    {298600, 99500,  0x1c1, 0}, /* run=199, turbo=287, PXbus=99, SDRAM=99 */
-    {398100, 99500,  0x241, 0}, /* run=199, turbo=398, PXbus=99, SDRAM=99 */
-    {0,}
+       /* CPU   MEMBUS  CCCR  DIV2 CCLKCFG        run  turbo PXbus SDRAM */
+       { 99500, 99500,  0x121, 1,  CCLKCFG},   /*  99,   99,   50,   50  */
+       {199100, 99500,  0x221, 0,  CCLKCFG},   /*  99,  199,   50,   99  */
+       {298500, 99500,  0x321, 0,  CCLKCFG},   /*  99,  287,   50,   99  */
+       {298600, 99500,  0x1c1, 0,  CCLKCFG},   /* 199,  287,   99,   99  */
+       {398100, 99500,  0x241, 0,  CCLKCFG},   /* 199,  398,   99,   99  */
+};
+
+#define NUM_PXA25x_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
+#define NUM_PXA25x_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs)
+
+static struct cpufreq_frequency_table
+       pxa255_run_freq_table[NUM_PXA25x_RUN_FREQS+1];
+static struct cpufreq_frequency_table
+       pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1];
+
+/*
+ * PXA270 definitions
+ *
+ * For the PXA27x:
+ * Control variables are A, L, 2N for CCCR; B, HT, T for CLKCFG.
+ *
+ * A = 0 => memory controller clock from table 3-7,
+ * A = 1 => memory controller clock = system bus clock
+ * Run mode frequency  = 13 MHz * L
+ * Turbo mode frequency = 13 MHz * L * N
+ * System bus frequency = 13 MHz * L / (B + 1)
+ *
+ * In CCCR:
+ * A = 1
+ * L = 16        oscillator to run mode ratio
+ * 2N = 6        2 * (turbo mode to run mode ratio)
+ *
+ * In CCLKCFG:
+ * B = 1         Fast bus mode
+ * HT = 0        Half-Turbo mode
+ * T = 1         Turbo mode
+ *
+ * For now, just support some of the combinations in table 3-7 of
+ * PXA27x Processor Family Developer's Manual to simplify frequency
+ * change sequences.
+ */
+#define PXA27x_CCCR(A, L, N2) (A << 25 | N2 << 7 | L)
+#define CCLKCFG2(B, HT, T) \
+  (CCLKCFG_FCS | \
+   ((B)  ? CCLKCFG_FASTBUS : 0) | \
+   ((HT) ? CCLKCFG_HALFTURBO : 0) | \
+   ((T)  ? CCLKCFG_TURBO : 0))
+
+static pxa_freqs_t pxa27x_freqs[] = {
+       {104000, 104000, PXA27x_CCCR(1,  8, 2), 0, CCLKCFG2(1, 0, 1)},
+       {156000, 104000, PXA27x_CCCR(1,  8, 6), 0, CCLKCFG2(1, 1, 1)},
+       {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1)},
+       {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1)},
+       {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1)},
+       {520000, 208000, PXA27x_CCCR(1, 16, 5), 1, CCLKCFG2(1, 0, 1)},
+       {624000, 208000, PXA27x_CCCR(1, 16, 6), 1, CCLKCFG2(1, 0, 1)}
 };
-#define NUM_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs)
 
-static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1];
+#define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs)
+static struct cpufreq_frequency_table
+       pxa27x_freq_table[NUM_PXA27x_FREQS+1];
 
 extern unsigned get_clk_frequency_khz(int info);
 
+static void find_freq_tables(struct cpufreq_policy *policy,
+                            struct cpufreq_frequency_table **freq_table,
+                            pxa_freqs_t **pxa_freqs)
+{
+       if (cpu_is_pxa25x()) {
+               if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
+                       *pxa_freqs = pxa255_run_freqs;
+                       *freq_table = pxa255_run_freq_table;
+               } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
+                       *pxa_freqs = pxa255_turbo_freqs;
+                       *freq_table = pxa255_turbo_freq_table;
+               } else {
+                       printk("CPU PXA: Unknown policy found. "
+                              "Using CPUFREQ_POLICY_PERFORMANCE\n");
+                       *pxa_freqs = pxa255_run_freqs;
+                       *freq_table = pxa255_run_freq_table;
+               }
+       }
+       if (cpu_is_pxa27x()) {
+               *pxa_freqs = pxa27x_freqs;
+               *freq_table = pxa27x_freq_table;
+       }
+}
+
+static void pxa27x_guess_max_freq(void)
+{
+       if (!pxa27x_maxfreq) {
+               pxa27x_maxfreq = 416000;
+               printk(KERN_INFO "PXA CPU 27x max frequency not defined "
+                      "(pxa27x_maxfreq), assuming pxa271 with %dkHz maxfreq\n",
+                      pxa27x_maxfreq);
+       } else {
+               pxa27x_maxfreq *= 1000;
+       }
+}
+
+static u32 mdrefr_dri(unsigned int freq)
+{
+       u32 dri = 0;
+
+       if (cpu_is_pxa25x())
+               dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS * 32));
+       if (cpu_is_pxa27x())
+               dri = ((freq * SDRAM_TREF) / (SDRAM_ROWS - 31)) / 32;
+       return dri;
+}
+
 /* find a valid frequency point */
 static int pxa_verify_policy(struct cpufreq_policy *policy)
 {
        struct cpufreq_frequency_table *pxa_freqs_table;
+       pxa_freqs_t *pxa_freqs;
        int ret;
 
-       if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
-               pxa_freqs_table = pxa255_run_freq_table;
-       } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
-               pxa_freqs_table = pxa255_turbo_freq_table;
-       } else {
-               printk("CPU PXA: Unknown policy found. "
-                      "Using CPUFREQ_POLICY_PERFORMANCE\n");
-               pxa_freqs_table = pxa255_run_freq_table;
-       }
-
+       find_freq_tables(policy, &pxa_freqs_table, &pxa_freqs);
        ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table);
 
        if (freq_debug)
                pr_debug("Verified CPU policy: %dKhz min to %dKhz max\n",
-                      policy->min, policy->max);
+                        policy->min, policy->max);
 
        return ret;
 }
 
+static unsigned int pxa_cpufreq_get(unsigned int cpu)
+{
+       return get_clk_frequency_khz(0);
+}
+
 static int pxa_set_target(struct cpufreq_policy *policy,
-                          unsigned int target_freq,
-                          unsigned int relation)
+                         unsigned int target_freq,
+                         unsigned int relation)
 {
        struct cpufreq_frequency_table *pxa_freqs_table;
        pxa_freqs_t *pxa_freq_settings;
        struct cpufreq_freqs freqs;
        unsigned int idx;
        unsigned long flags;
-       unsigned int unused, preset_mdrefr, postset_mdrefr;
-       void *ramstart = phys_to_virt(0xa0000000);
+       unsigned int new_freq_cpu, new_freq_mem;
+       unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg;
 
        /* Get the current policy */
-       if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
-               pxa_freq_settings = pxa255_run_freqs;
-               pxa_freqs_table   = pxa255_run_freq_table;
-       } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
-               pxa_freq_settings = pxa255_turbo_freqs;
-               pxa_freqs_table   = pxa255_turbo_freq_table;
-       } else {
-               printk("CPU PXA: Unknown policy found. "
-                      "Using CPUFREQ_POLICY_PERFORMANCE\n");
-               pxa_freq_settings = pxa255_run_freqs;
-               pxa_freqs_table   = pxa255_run_freq_table;
-       }
+       find_freq_tables(policy, &pxa_freqs_table, &pxa_freq_settings);
 
        /* Lookup the next frequency */
        if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
-                                          target_freq, relation, &idx)) {
+                                          target_freq, relation, &idx)) {
                return -EINVAL;
        }
 
+       new_freq_cpu = pxa_freq_settings[idx].khz;
+       new_freq_mem = pxa_freq_settings[idx].membus;
        freqs.old = policy->cur;
-       freqs.new = pxa_freq_settings[idx].khz;
+       freqs.new = new_freq_cpu;
        freqs.cpu = policy->cpu;
 
        if (freq_debug)
-               pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
-                      freqs.new / 1000, (pxa_freq_settings[idx].div2) ?
-                      (pxa_freq_settings[idx].membus / 2000) :
-                      (pxa_freq_settings[idx].membus / 1000));
+               pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, "
+                        "(SDRAM %d Mhz)\n",
+                        freqs.new / 1000, (pxa_freq_settings[idx].div2) ?
+                        (new_freq_mem / 2000) : (new_freq_mem / 1000));
 
        /*
         * Tell everyone what we're about to do...
@@ -177,16 +268,16 @@ static int pxa_set_target(struct cpufreq_policy *policy,
        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 
        /* Calculate the next MDREFR.  If we're slowing down the SDRAM clock
-        * we need to preset the smaller DRI before the change.  If we're speeding
-        * up we need to set the larger DRI value after the change.
+        * we need to preset the smaller DRI before the change.  If we're
+        * speeding up we need to set the larger DRI value after the change.
         */
        preset_mdrefr = postset_mdrefr = MDREFR;
-       if ((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {
-               preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |
-                               MDREFR_DRI(pxa_freq_settings[idx].membus);
+       if ((MDREFR & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) {
+               preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK);
+               preset_mdrefr |= mdrefr_dri(new_freq_mem);
        }
-       postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) |
-                           MDREFR_DRI(pxa_freq_settings[idx].membus);
+       postset_mdrefr =
+               (postset_mdrefr & ~MDREFR_DRI_MASK) | mdrefr_dri(new_freq_mem);
 
        /* If we're dividing the memory clock by two for the SDRAM clock, this
         * must be set prior to the change.  Clearing the divide must be done
@@ -201,26 +292,27 @@ static int pxa_set_target(struct cpufreq_policy *policy,
 
        local_irq_save(flags);
 
-       /* Set new the CCCR */
+       /* Set new the CCCR and prepare CCLKCFG */
        CCCR = pxa_freq_settings[idx].cccr;
+       cclkcfg = pxa_freq_settings[idx].cclkcfg;
 
        asm volatile("                                                  \n\
                ldr     r4, [%1]                /* load MDREFR */       \n\
                b       2f                                              \n\
-               .align  5                                               \n\
+               .align  5                                               \n\
 1:                                                                     \n\
-               str     %4, [%1]                /* preset the MDREFR */ \n\
+               str     %3, [%1]                /* preset the MDREFR */ \n\
                mcr     p14, 0, %2, c6, c0, 0   /* set CCLKCFG[FCS] */  \n\
-               str     %5, [%1]                /* postset the MDREFR */ \n\
+               str     %4, [%1]                /* postset the MDREFR */ \n\
                                                                        \n\
                b       3f                                              \n\
 2:             b       1b                                              \n\
 3:             nop                                                     \n\
          "
-         : "=&r" (unused)
-         : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart),
-           "r" (preset_mdrefr), "r" (postset_mdrefr)
-         : "r4", "r5");
+                    : "=&r" (unused)
+                    : "r" (&MDREFR), "r" (cclkcfg),
+                      "r" (preset_mdrefr), "r" (postset_mdrefr)
+                    : "r4", "r5");
        local_irq_restore(flags);
 
        /*
@@ -233,38 +325,57 @@ static int pxa_set_target(struct cpufreq_policy *policy,
        return 0;
 }
 
-static unsigned int pxa_cpufreq_get(unsigned int cpu)
-{
-       return get_clk_frequency_khz(0);
-}
-
-static int pxa_cpufreq_init(struct cpufreq_policy *policy)
+static __init int pxa_cpufreq_init(struct cpufreq_policy *policy)
 {
        int i;
+       unsigned int freq;
+
+       /* try to guess pxa27x cpu */
+       if (cpu_is_pxa27x())
+               pxa27x_guess_max_freq();
 
        /* set default policy and cpuinfo */
        policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
-       policy->policy = CPUFREQ_POLICY_PERFORMANCE;
-       policy->cpuinfo.max_freq = PXA25x_MAX_FREQ;
-       policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
+       if (cpu_is_pxa25x())
+               policy->policy = CPUFREQ_POLICY_PERFORMANCE;
        policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
-       policy->cur = get_clk_frequency_khz(0);    /* current freq */
+       policy->cur = get_clk_frequency_khz(0);    /* current freq */
        policy->min = policy->max = policy->cur;
 
-       /* Generate the run cpufreq_frequency_table struct */
-       for (i = 0; i < NUM_RUN_FREQS; i++) {
+       /* Generate pxa25x the run cpufreq_frequency_table struct */
+       for (i = 0; i < NUM_PXA25x_RUN_FREQS; i++) {
                pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
                pxa255_run_freq_table[i].index = i;
        }
-
        pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
-       /* Generate the turbo cpufreq_frequency_table struct */
-       for (i = 0; i < NUM_TURBO_FREQS; i++) {
-               pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz;
+
+       /* Generate pxa25x the turbo cpufreq_frequency_table struct */
+       for (i = 0; i < NUM_PXA25x_TURBO_FREQS; i++) {
+               pxa255_turbo_freq_table[i].frequency =
+                       pxa255_turbo_freqs[i].khz;
                pxa255_turbo_freq_table[i].index = i;
        }
        pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
 
+       /* Generate the pxa27x cpufreq_frequency_table struct */
+       for (i = 0; i < NUM_PXA27x_FREQS; i++) {
+               freq = pxa27x_freqs[i].khz;
+               if (freq > pxa27x_maxfreq)
+                       break;
+               pxa27x_freq_table[i].frequency = freq;
+               pxa27x_freq_table[i].index = i;
+       }
+       pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END;
+
+       /*
+        * Set the policy's minimum and maximum frequencies from the tables
+        * just constructed.  This sets cpuinfo.mxx_freq, min and max.
+        */
+       if (cpu_is_pxa25x())
+               cpufreq_frequency_table_cpuinfo(policy, pxa255_run_freq_table);
+       else if (cpu_is_pxa27x())
+               cpufreq_frequency_table_cpuinfo(policy, pxa27x_freq_table);
+
        printk(KERN_INFO "PXA CPU frequency change support initialized\n");
 
        return 0;
@@ -275,26 +386,25 @@ static struct cpufreq_driver pxa_cpufreq_driver = {
        .target = pxa_set_target,
        .init   = pxa_cpufreq_init,
        .get    = pxa_cpufreq_get,
-       .name   = "PXA25x",
+       .name   = "PXA2xx",
 };
 
 static int __init pxa_cpu_init(void)
 {
        int ret = -ENODEV;
-       if (cpu_is_pxa25x())
+       if (cpu_is_pxa25x() || cpu_is_pxa27x())
                ret = cpufreq_register_driver(&pxa_cpufreq_driver);
        return ret;
 }
 
 static void __exit pxa_cpu_exit(void)
 {
-       if (cpu_is_pxa25x())
-               cpufreq_unregister_driver(&pxa_cpufreq_driver);
+       cpufreq_unregister_driver(&pxa_cpufreq_driver);
 }
 
 
-MODULE_AUTHOR ("Intrinsyc Software Inc.");
-MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture");
+MODULE_AUTHOR("Intrinsyc Software Inc.");
+MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture");
 MODULE_LICENSE("GPL");
 module_init(pxa_cpu_init);
 module_exit(pxa_cpu_exit);
index 0993f4d1a0bc71bba362a86a2c92aba54f56ee4f..7b9bdd0c66653b5a423b772d7f7e8152975e25ef 100644 (file)
@@ -396,7 +396,7 @@ static struct pxafb_mach_info sharp_lm8v31 = {
        .cmap_inverse   = 0,
        .cmap_static    = 0,
        .lcd_conn       = LCD_COLOR_DSTN_16BPP | LCD_PCLK_EDGE_FALL |
-                         LCD_AC_BIAS_FREQ(255);
+                         LCD_AC_BIAS_FREQ(255),
 };
 
 #define        MMC_POLL_RATE           msecs_to_jiffies(1000)
index ec1bbf333a3ad5a74c8c1cb06c2b0c6613fa277b..7d4debbdcca3feb1c9fa253f0441256d670c6a84 100644 (file)
@@ -42,20 +42,17 @@ int pxa_pm_enter(suspend_state_t state)
        if (state != PM_SUSPEND_STANDBY) {
                pxa_cpu_pm_fns->save(sleep_save);
                /* before sleeping, calculate and save a checksum */
-               for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++)
+               for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
                        sleep_save_checksum += sleep_save[i];
        }
 
-       /* Clear reset status */
-       RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
        /* *** go zzz *** */
        pxa_cpu_pm_fns->enter(state);
        cpu_init();
 
        if (state != PM_SUSPEND_STANDBY) {
                /* after sleeping, validate the checksum */
-               for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++)
+               for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
                        checksum += sleep_save[i];
 
                /* if invalid, display message and wait for a hardware reset */
@@ -101,7 +98,8 @@ static int __init pxa_pm_init(void)
                return -EINVAL;
        }
 
-       sleep_save = kmalloc(pxa_cpu_pm_fns->save_size, GFP_KERNEL);
+       sleep_save = kmalloc(pxa_cpu_pm_fns->save_count * sizeof(unsigned long),
+                            GFP_KERNEL);
        if (!sleep_save) {
                printk(KERN_ERR "failed to alloc memory for pm save\n");
                return -ENOMEM;
index ca5ac196b47b71e3b011281ed5e77dc574df65b7..0b30f25cff3c15020d6363f1469b1c0e75977935 100644 (file)
@@ -326,13 +326,11 @@ static struct platform_device *devices[] __initdata = {
 
 static void poodle_poweroff(void)
 {
-       RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
        arm_machine_restart('h');
 }
 
 static void poodle_restart(char mode)
 {
-       RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
        arm_machine_restart('h');
 }
 
index d9b5450aee5b68e227e1fbf96ad24ad396a3ac88..e5b417d14bb04b772689b431631994c7985899d5 100644 (file)
@@ -150,9 +150,7 @@ static struct clk pxa25x_clks[] = {
  * More ones like CP and general purpose register values are preserved
  * with the stack pointer in sleep.S.
  */
-enum { SLEEP_SAVE_START = 0,
-
-       SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
+enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
 
        SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
        SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
@@ -162,7 +160,7 @@ enum {      SLEEP_SAVE_START = 0,
 
        SLEEP_SAVE_CKEN,
 
-       SLEEP_SAVE_SIZE
+       SLEEP_SAVE_COUNT
 };
 
 
@@ -200,6 +198,9 @@ static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
 
 static void pxa25x_cpu_pm_enter(suspend_state_t state)
 {
+       /* Clear reset status */
+       RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+
        switch (state) {
        case PM_SUSPEND_MEM:
                /* set resume return address */
@@ -210,7 +211,7 @@ static void pxa25x_cpu_pm_enter(suspend_state_t state)
 }
 
 static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
-       .save_size      = SLEEP_SAVE_SIZE,
+       .save_count     = SLEEP_SAVE_COUNT,
        .valid          = suspend_valid_only_mem,
        .save           = pxa25x_cpu_pm_save,
        .restore        = pxa25x_cpu_pm_restore,
index 7a2449dd0fd4f19ebf7ac64c59290b7f4d8bd5b6..7e945836e12924e9e4a5b89a4edd3331f339710a 100644 (file)
@@ -181,9 +181,7 @@ static struct clk pxa27x_clks[] = {
  * More ones like CP and general purpose register values are preserved
  * with the stack pointer in sleep.S.
  */
-enum { SLEEP_SAVE_START = 0,
-
-       SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
+enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
 
        SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
        SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
@@ -198,7 +196,7 @@ enum {      SLEEP_SAVE_START = 0,
        SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
        SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
 
-       SLEEP_SAVE_SIZE
+       SLEEP_SAVE_COUNT
 };
 
 void pxa27x_cpu_pm_save(unsigned long *sleep_save)
@@ -251,6 +249,9 @@ void pxa27x_cpu_pm_enter(suspend_state_t state)
        /* Clear edge-detect status register. */
        PEDR = 0xDF12FE1B;
 
+       /* Clear reset status */
+       RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
+
        switch (state) {
        case PM_SUSPEND_STANDBY:
                pxa_cpu_standby();
@@ -269,7 +270,7 @@ static int pxa27x_cpu_pm_valid(suspend_state_t state)
 }
 
 static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
-       .save_size      = SLEEP_SAVE_SIZE,
+       .save_count     = SLEEP_SAVE_COUNT,
        .save           = pxa27x_cpu_pm_save,
        .restore        = pxa27x_cpu_pm_restore,
        .valid          = pxa27x_cpu_pm_valid,
index b6a6f5fcc77ad56158bbd01b061c973ca4700285..644550bfa330fb8607dc89e3f192f864f5adc95a 100644 (file)
@@ -256,12 +256,11 @@ static unsigned long wakeup_src;
 #define SAVE(x)                sleep_save[SLEEP_SAVE_##x] = x
 #define RESTORE(x)     x = sleep_save[SLEEP_SAVE_##x]
 
-enum { SLEEP_SAVE_START = 0,
-       SLEEP_SAVE_CKENA,
+enum { SLEEP_SAVE_CKENA,
        SLEEP_SAVE_CKENB,
        SLEEP_SAVE_ACCR,
 
-       SLEEP_SAVE_SIZE,
+       SLEEP_SAVE_COUNT,
 };
 
 static void pxa3xx_cpu_pm_save(unsigned long *sleep_save)
@@ -376,7 +375,7 @@ static int pxa3xx_cpu_pm_valid(suspend_state_t state)
 }
 
 static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = {
-       .save_size      = SLEEP_SAVE_SIZE,
+       .save_count     = SLEEP_SAVE_COUNT,
        .save           = pxa3xx_cpu_pm_save,
        .restore        = pxa3xx_cpu_pm_restore,
        .valid          = pxa3xx_cpu_pm_valid,
index 62a02c3927c576e26d0dd016c3518882a5e0778f..dace3820f1eed83dbaff06074eab806cc073e59b 100644 (file)
@@ -38,6 +38,7 @@
 #include <asm/arch/pxa-regs.h>
 #include <asm/arch/pxa2xx-regs.h>
 #include <asm/arch/pxa2xx-gpio.h>
+#include <asm/arch/pxa27x-udc.h>
 #include <asm/arch/irda.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/ohci.h>
@@ -529,8 +530,6 @@ static struct platform_device *devices[] __initdata = {
 
 static void spitz_poweroff(void)
 {
-       RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
        pxa_gpio_mode(SPITZ_GPIO_ON_RESET | GPIO_OUT);
        GPSR(SPITZ_GPIO_ON_RESET) = GPIO_bit(SPITZ_GPIO_ON_RESET);
 
index 7a7f5f947cc557d2a5b4e81796ab92663a09e252..23f050feb2083d152640c43e9d47f6312235cf65 100644 (file)
@@ -119,9 +119,6 @@ static void spitz_presuspend(void)
        /* nRESET_OUT Disable */
        PSLR |= PSLR_SL_ROD;
 
-       /* Clear reset status */
-       RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
        /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
        PCFR = PCFR_GPR_EN | PCFR_OPDE;
 }
index 6458f6d371d966e16399ce61c596df2835f75653..c2cbd66db8147e894b806c9c110996d0996700a6 100644 (file)
@@ -467,8 +467,6 @@ static struct platform_device *devices[] __initdata = {
 
 static void tosa_poweroff(void)
 {
-       RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
-
        pxa_gpio_mode(TOSA_GPIO_ON_RESET | GPIO_OUT);
        GPSR(TOSA_GPIO_ON_RESET) = GPIO_bit(TOSA_GPIO_ON_RESET);
 
index 246c573e7252dc0d833f1325222809bd1782e36d..1693d447a224b6eaf566ae649b9d65082f4656a0 100644 (file)
@@ -43,20 +43,18 @@ extern void sa1100_cpu_resume(void);
  * More ones like CP and general purpose register values are preserved
  * on the stack and then the stack pointer is stored last in sleep.S.
  */
-enum { SLEEP_SAVE_SP = 0,
-
-       SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR,
+enum { SLEEP_SAVE_GPDR, SLEEP_SAVE_GAFR,
        SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR,
 
        SLEEP_SAVE_Ser1SDCR0,
 
-       SLEEP_SAVE_SIZE
+       SLEEP_SAVE_COUNT
 };
 
 
 static int sa11x0_pm_enter(suspend_state_t state)
 {
-       unsigned long gpio, sleep_save[SLEEP_SAVE_SIZE];
+       unsigned long gpio, sleep_save[SLEEP_SAVE_COUNT];
 
        gpio = GPLR;
 
index 065087afb7720375736329576ad0e22968dab533..d045812f33999cc0ef40d03ee95034499fd0cda1 100644 (file)
@@ -332,7 +332,7 @@ ENTRY(arm925_dma_flush_range)
 #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
        mcr     p15, 0, r0, c7, c14, 1          @ clean+invalidate D entry
 #else
-       mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
+       mcr     p15, 0, r0, c7, c6, 1           @ invalidate D entry
 #endif
        add     r0, r0, #CACHE_DLINESIZE
        cmp     r0, r1
index 997db8472b5c3c6aca4b0e99f6baba97036e21b7..4cd33169a7c917235cd8d549d36a2666c0bc32a5 100644 (file)
@@ -295,7 +295,7 @@ ENTRY(arm926_dma_flush_range)
 #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
        mcr     p15, 0, r0, c7, c14, 1          @ clean+invalidate D entry
 #else
-       mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
+       mcr     p15, 0, r0, c7, c6, 1           @ invalidate D entry
 #endif
        add     r0, r0, #CACHE_DLINESIZE
        cmp     r0, r1
index 44ead902bd54f5347aa877f25bb98af2a4547f43..1a3d63df8e908055b83a8a589bbe52231b5a944f 100644 (file)
@@ -222,7 +222,7 @@ ENTRY(arm940_dma_flush_range)
 #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
        mcr     p15, 0, r3, c7, c14, 2          @ clean/flush D entry
 #else
-       mcr     p15, 0, r3, c7, c10, 2          @ clean D entry
+       mcr     p15, 0, r3, c7, c6, 2           @ invalidate D entry
 #endif
        subs    r3, r3, #1 << 26
        bcs     2b                              @ entries 63 to 0
index 2218b0c01330a8f96a5ea4ef6b360cb596ec4ffe..82d579ac9b98f9ed4cb2bad539c7c3e085aa936b 100644 (file)
@@ -265,7 +265,7 @@ ENTRY(arm946_dma_flush_range)
 #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
        mcr     p15, 0, r0, c7, c14, 1          @ clean+invalidate D entry
 #else
-       mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
+       mcr     p15, 0, r0, c7, c6, 1           @ invalidate D entry
 #endif
        add     r0, r0, #CACHE_DLINESIZE
        cmp     r0, r1
index d84167fb33b1fa69df54602a925ffc2f573ed008..3ac8d8d781b3837f4ec47653e2b1ce4b98d25dfe 100644 (file)
@@ -411,7 +411,7 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
 
        clk->parent = parent;
 
-       if (clk == &s3c24xx_dclk0)
+       if (clk == &s3c24xx_clkout0)
                mask = S3C2410_MISCCR_CLK0_MASK;
        else {
                source <<= 4;
@@ -437,7 +437,7 @@ struct clk s3c24xx_dclk0 = {
 struct clk s3c24xx_dclk1 = {
        .name           = "dclk1",
        .id             = -1,
-       .ctrlbit        = S3C2410_DCLKCON_DCLK0EN,
+       .ctrlbit        = S3C2410_DCLKCON_DCLK1EN,
        .enable         = s3c24xx_dclk_enable,
        .set_parent     = s3c24xx_dclk_setparent,
        .set_rate       = s3c24xx_set_dclk_rate,
index 795d0ac67c2192a93c6fd0404bb3e9fed92c45d7..fd5708523f2e6c1469ae91d5e5acf0985a45f5ba 100644 (file)
@@ -832,6 +832,7 @@ config BANK_0
 config BANK_1
        hex "Bank 1"
        default 0x7BB0
+       default 0x5558 if BF54x
 
 config BANK_2
        hex "Bank 2"
@@ -963,21 +964,22 @@ endchoice
 
 endmenu
 
-if (BF537 || BF533 || BF54x)
-
 menu "CPU Frequency scaling"
 
 source "drivers/cpufreq/Kconfig"
 
-config CPU_FREQ
-       bool
+config CPU_VOLTAGE
+       bool "CPU Voltage scaling"
+       depends on EXPERIMENTAL 
+       depends on CPU_FREQ
        default n
        help
-         If you want to enable this option, you should select the
-         DPMC driver from Character Devices.
-endmenu
+         Say Y here if you want CPU voltage scaling according to the CPU frequency.
+         This option violates the PLL BYPASS recommendation in the Blackfin Processor
+         manuals. There is a theoretical risk that during VDDINT transitions 
+         the PLL may unlock.
 
-endif
+endmenu
 
 source "net/Kconfig"
 
index 721f15f3cebf1915d67f2b83ab46574697517155..881afe9082c76744bd9bdb01cc0bcd564a50f973 100644 (file)
@@ -56,9 +56,6 @@ int main(void)
        /* offsets into the thread struct */
        DEFINE(THREAD_KSP, offsetof(struct thread_struct, ksp));
        DEFINE(THREAD_USP, offsetof(struct thread_struct, usp));
-       DEFINE(THREAD_SR, offsetof(struct thread_struct, seqstat));
-       DEFINE(PT_SR, offsetof(struct thread_struct, seqstat));
-       DEFINE(THREAD_ESP0, offsetof(struct thread_struct, esp0));
        DEFINE(THREAD_PC, offsetof(struct thread_struct, pc));
        DEFINE(KERNEL_STACK_SIZE, THREAD_SIZE);
 
index 5ed47228a39075a284e99801d7c79165f6b7367f..4b03ba025488edd4ec55d0f2cc9c92d3d9c2313b 100644 (file)
@@ -1,6 +1,6 @@
 /*
  * This file contains sequences of code that will be copied to a
- * fixed location, defined in <asm/atomic_seq.h>.  The interrupt
+ * fixed location, defined in <asm/fixed_code.h>.  The interrupt
  * handlers ensure that these sequences appear to be atomic when
  * executed from userspace.
  * These are aligned to 16 bytes, so that we have some space to replace
index 8b9fe29d03f4f4a02c91f3a2585b703bfa7b3bc9..14a42848f37f70d453807bf3cbe7b1a3346e98e1 100644 (file)
@@ -160,6 +160,13 @@ int
 module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
                          char *secstrings, struct module *mod)
 {
+       /*
+        * XXX: sechdrs are vmalloced in kernel/module.c
+        * and would be vfreed just after module is loaded,
+        * so we hack to keep the only information we needed
+        * in mod->arch to correctly free L1 I/D sram later.
+        * NOTE: this breaks the semantic of mod->arch structure.
+        */
        Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
        void *dest = NULL;
 
@@ -167,8 +174,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
                if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) ||
                    ((strcmp(".text", secstrings + s->sh_name) == 0) &&
                     (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) {
-                       mod->arch.text_l1 = s;
                        dest = l1_inst_sram_alloc(s->sh_size);
+                       mod->arch.text_l1 = dest;
                        if (dest == NULL) {
                                printk(KERN_ERR
                                       "module %s: L1 instruction memory allocation failed\n",
@@ -182,8 +189,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
                if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) ||
                    ((strcmp(".data", secstrings + s->sh_name) == 0) &&
                     (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
-                       mod->arch.data_a_l1 = s;
                        dest = l1_data_sram_alloc(s->sh_size);
+                       mod->arch.data_a_l1 = dest;
                        if (dest == NULL) {
                                printk(KERN_ERR
                                        "module %s: L1 data memory allocation failed\n",
@@ -197,8 +204,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
                if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 ||
                    ((strcmp(".bss", secstrings + s->sh_name) == 0) &&
                     (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
-                       mod->arch.bss_a_l1 = s;
                        dest = l1_data_sram_alloc(s->sh_size);
+                       mod->arch.bss_a_l1 = dest;
                        if (dest == NULL) {
                                printk(KERN_ERR
                                        "module %s: L1 data memory allocation failed\n",
@@ -210,8 +217,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
                        s->sh_addr = (unsigned long)dest;
                }
                if (strcmp(".l1.data.B", secstrings + s->sh_name) == 0) {
-                       mod->arch.data_b_l1 = s;
                        dest = l1_data_B_sram_alloc(s->sh_size);
+                       mod->arch.data_b_l1 = dest;
                        if (dest == NULL) {
                                printk(KERN_ERR
                                        "module %s: L1 data memory allocation failed\n",
@@ -223,8 +230,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
                        s->sh_addr = (unsigned long)dest;
                }
                if (strcmp(".l1.bss.B", secstrings + s->sh_name) == 0) {
-                       mod->arch.bss_b_l1 = s;
                        dest = l1_data_B_sram_alloc(s->sh_size);
+                       mod->arch.bss_b_l1 = dest;
                        if (dest == NULL) {
                                printk(KERN_ERR
                                        "module %s: L1 data memory allocation failed\n",
@@ -416,14 +423,14 @@ module_finalize(const Elf_Ehdr * hdr,
 
 void module_arch_cleanup(struct module *mod)
 {
-       if ((mod->arch.text_l1) && (mod->arch.text_l1->sh_addr))
-               l1_inst_sram_free((void *)mod->arch.text_l1->sh_addr);
-       if ((mod->arch.data_a_l1) && (mod->arch.data_a_l1->sh_addr))
-               l1_data_sram_free((void *)mod->arch.data_a_l1->sh_addr);
-       if ((mod->arch.bss_a_l1) && (mod->arch.bss_a_l1->sh_addr))
-               l1_data_sram_free((void *)mod->arch.bss_a_l1->sh_addr);
-       if ((mod->arch.data_b_l1) && (mod->arch.data_b_l1->sh_addr))
-               l1_data_B_sram_free((void *)mod->arch.data_b_l1->sh_addr);
-       if ((mod->arch.bss_b_l1) && (mod->arch.bss_b_l1->sh_addr))
-               l1_data_B_sram_free((void *)mod->arch.bss_b_l1->sh_addr);
+       if (mod->arch.text_l1)
+               l1_inst_sram_free((void *)mod->arch.text_l1);
+       if (mod->arch.data_a_l1)
+               l1_data_sram_free((void *)mod->arch.data_a_l1);
+       if (mod->arch.bss_a_l1)
+               l1_data_sram_free((void *)mod->arch.bss_a_l1);
+       if (mod->arch.data_b_l1)
+               l1_data_B_sram_free((void *)mod->arch.data_b_l1);
+       if (mod->arch.bss_b_l1)
+               l1_data_B_sram_free((void *)mod->arch.bss_b_l1);
 }
index be9fdd00d7cb2c55ef0dcd1d83a9c0bb9beb6c85..53c2cd255441ff5a23a55ce9cc8e5702ef1ec966 100644 (file)
@@ -245,7 +245,7 @@ unsigned long get_wchan(struct task_struct *p)
 
 void finish_atomic_sections (struct pt_regs *regs)
 {
-       int __user *up0 = (int __user *)&regs->p0;
+       int __user *up0 = (int __user *)regs->p0;
 
        if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END)
                return;
index b4f062c172c69042e192b73352c21805ef4a7abe..f51ab088098ec1e16162c2c4a62c4c20a42b4b17 100644 (file)
@@ -185,8 +185,8 @@ void ptrace_disable(struct task_struct *child)
 {
        unsigned long tmp;
        /* make sure the single step bit is not set. */
-       tmp = get_reg(child, PT_SR) & ~(TRACE_BITS << 16);
-       put_reg(child, PT_SR, tmp);
+       tmp = get_reg(child, PT_SYSCFG) & ~TRACE_BITS;
+       put_reg(child, PT_SYSCFG, tmp);
 }
 
 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
index cb9d883d493c4b3ad30dbefed9766de9980faf0e..dbc3bbf846be2f4cf7197644fa287c5e9f8ed070 100644 (file)
@@ -42,6 +42,9 @@
 
 #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
 
+/* Location of the trace bit in SYSCFG. */
+#define TRACE_BITS 0x0001
+
 struct fdpic_func_descriptor {
        unsigned long   text;
        unsigned long   GOT;
@@ -225,6 +228,16 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
        regs->r1 = (unsigned long)(&frame->info);
        regs->r2 = (unsigned long)(&frame->uc);
 
+       /*
+        * Clear the trace flag when entering the signal handler, but
+        * notify any tracer that was single-stepping it. The tracer
+        * may want to single-step inside the handler too.
+        */
+       if (regs->syscfg & TRACE_BITS) {
+               regs->syscfg &= ~TRACE_BITS;
+               ptrace_notify(SIGTRAP);
+       }
+
        return 0;
 
  give_sigsegv:
index 4482c47c09e5c728891bd453c9a1bfeb8a8823c5..e887efc86c29e8215d544dcba262128b65343008 100644 (file)
@@ -60,7 +60,7 @@ static inline unsigned long long cycles_2_ns(cycle_t cyc)
 
 static cycle_t read_cycles(void)
 {
-       return get_cycles();
+       return __bfin_cycles_off + (get_cycles() << __bfin_cycles_mod);
 }
 
 unsigned long long sched_clock(void)
@@ -117,7 +117,7 @@ static void bfin_timer_set_mode(enum clock_event_mode mode,
                break;
        }
        case CLOCK_EVT_MODE_ONESHOT:
-               bfin_write_TSCALE(0);
+               bfin_write_TSCALE(TIME_SCALE - 1);
                bfin_write_TCOUNT(0);
                bfin_write_TCNTL(TMPWR | TMREN);
                CSYNC();
@@ -183,10 +183,14 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
 
 static int __init bfin_clockevent_init(void)
 {
+       unsigned long timer_clk;
+
+       timer_clk = get_cclk() / TIME_SCALE;
+
        setup_irq(IRQ_CORETMR, &bfin_timer_irq);
        bfin_timer_init();
 
-       clockevent_bfin.mult = div_sc(get_cclk(), NSEC_PER_SEC, clockevent_bfin.shift);
+       clockevent_bfin.mult = div_sc(timer_clk, NSEC_PER_SEC, clockevent_bfin.shift);
        clockevent_bfin.max_delta_ns = clockevent_delta2ns(-1, &clockevent_bfin);
        clockevent_bfin.min_delta_ns = clockevent_delta2ns(100, &clockevent_bfin);
        clockevents_register_device(&clockevent_bfin);
index 583d53811f0364fb4ae28c3654c5736489e853dd..8aa49f8042289865568d22f4deeade8d18f67ed8 100644 (file)
 #include <linux/platform_device.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 #include <linux/usb/isp1362.h>
 #endif
 #include <linux/ata_platform.h>
+#include <linux/i2c.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
 #include <linux/usb/sl811.h>
@@ -50,6 +52,7 @@
 #include <asm/reboot.h>
 #include <asm/nand.h>
 #include <asm/portmux.h>
+#include <asm/dpmc.h>
 #include <linux/spi/ad7877.h>
 
 /*
@@ -171,6 +174,46 @@ static struct platform_device bf52x_t350mcqb_device = {
 };
 #endif
 
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+static struct mtd_partition ezkit_partitions[] = {
+       {
+               .name       = "Bootloader",
+               .size       = 0x40000,
+               .offset     = 0,
+       }, {
+               .name       = "Kernel",
+               .size       = 0x1C0000,
+               .offset     = MTDPART_OFS_APPEND,
+       }, {
+               .name       = "RootFS",
+               .size       = MTDPART_SIZ_FULL,
+               .offset     = MTDPART_OFS_APPEND,
+       }
+};
+
+static struct physmap_flash_data ezkit_flash_data = {
+       .width      = 2,
+       .parts      = ezkit_partitions,
+       .nr_parts   = ARRAY_SIZE(ezkit_partitions),
+};
+
+static struct resource ezkit_flash_resource = {
+       .start = 0x20000000,
+       .end   = 0x203fffff,
+       .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ezkit_flash_device = {
+       .name          = "physmap-flash",
+       .id            = 0,
+       .dev = {
+               .platform_data = &ezkit_flash_data,
+       },
+       .num_resources = 1,
+       .resource      = &ezkit_flash_resource,
+};
+#endif
+
 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 static struct mtd_partition partition_info[] = {
        {
@@ -420,11 +463,7 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
                .offset = 0,
                .mask_flags = MTD_CAP_ROM
        }, {
-               .name = "kernel",
-               .size = 0xe0000,
-               .offset = MTDPART_OFS_APPEND,
-       }, {
-               .name = "file system",
+               .name = "linux kernel",
                .size = MTDPART_SIZ_FULL,
                .offset = MTDPART_OFS_APPEND,
        }
@@ -434,7 +473,7 @@ static struct flash_platform_data bfin_spi_flash_data = {
        .name = "m25p80",
        .parts = bfin_spi_flash_partitions,
        .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
-       .type = "m25p64",
+       .type = "m25p16",
 };
 
 /* SPI flash chip (m25p64) */
@@ -755,6 +794,24 @@ static struct platform_device i2c_bfin_twi_device = {
 };
 #endif
 
+#ifdef CONFIG_I2C_BOARDINFO
+static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
+#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
+       {
+               I2C_BOARD_INFO("pcf8574_lcd", 0x22),
+               .type = "pcf8574_lcd",
+       },
+#endif
+#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
+       {
+               I2C_BOARD_INFO("pcf8574_keypad", 0x27),
+               .type = "pcf8574_keypad",
+               .irq = IRQ_PF8,
+       },
+#endif
+};
+#endif
+
 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 static struct platform_device bfin_sport0_uart_device = {
        .name = "bfin-sport-uart",
@@ -839,7 +896,32 @@ static struct platform_device bfin_gpios_device = {
        .resource = &bfin_gpios_resources,
 };
 
+static const unsigned int cclk_vlev_datasheet[] =
+{
+       VRPAIR(VLEV_100, 400000000),
+       VRPAIR(VLEV_105, 426000000),
+       VRPAIR(VLEV_110, 500000000),
+       VRPAIR(VLEV_115, 533000000),
+       VRPAIR(VLEV_120, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+       .tuple_tab = cclk_vlev_datasheet,
+       .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+       .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+       .name = "bfin dpmc",
+       .dev = {
+               .platform_data = &bfin_dmpc_vreg_data,
+       },
+};
+
 static struct platform_device *stamp_devices[] __initdata = {
+
+       &bfin_dpmc,
+
 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
        &bf5xx_nand_device,
 #endif
@@ -921,12 +1003,22 @@ static struct platform_device *stamp_devices[] __initdata = {
        &bfin_device_gpiokeys,
 #endif
 
+#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
+       &ezkit_flash_device,
+#endif
+
        &bfin_gpios_device,
 };
 
 static int __init stamp_init(void)
 {
        printk(KERN_INFO "%s(): registering device resources\n", __func__);
+
+#ifdef CONFIG_I2C_BOARDINFO
+       i2c_register_board_info(0, bfin_i2c_board_info,
+                               ARRAY_SIZE(bfin_i2c_board_info));
+#endif
+
        platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
        spi_register_board_info(bfin_spi_board_info,
index a03149c72681adb2fdf9e2f2c29c3ed005c59fc2..ed2b0b8f5dc93f4673accc7013329fa67baaf748 100644 (file)
 #include <linux/mtd/partitions.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 #include <linux/usb/isp1362.h>
+#endif
 #include <linux/ata_platform.h>
 #include <linux/irq.h>
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/portmux.h>
+#include <asm/dpmc.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -341,7 +344,37 @@ static struct platform_device bfin_pata_device = {
 };
 #endif
 
+static const unsigned int cclk_vlev_datasheet[] =
+{
+       VRPAIR(VLEV_085, 250000000),
+       VRPAIR(VLEV_090, 376000000),
+       VRPAIR(VLEV_095, 426000000),
+       VRPAIR(VLEV_100, 426000000),
+       VRPAIR(VLEV_105, 476000000),
+       VRPAIR(VLEV_110, 476000000),
+       VRPAIR(VLEV_115, 476000000),
+       VRPAIR(VLEV_120, 600000000),
+       VRPAIR(VLEV_125, 600000000),
+       VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+       .tuple_tab = cclk_vlev_datasheet,
+       .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+       .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+       .name = "bfin dpmc",
+       .dev = {
+               .platform_data = &bfin_dmpc_vreg_data,
+       },
+};
+
 static struct platform_device *cm_bf533_devices[] __initdata = {
+
+       &bfin_dpmc,
+
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
        &bfin_uart_device,
 #endif
index 08a7943949aef477b5fb2820c6d70d059ded82b3..9d28415163ea67064a1085a0b5c9c63e005a4560 100644 (file)
@@ -42,6 +42,7 @@
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/portmux.h>
+#include <asm/dpmc.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -350,7 +351,37 @@ static struct platform_device i2c_gpio_device = {
 };
 #endif
 
+static const unsigned int cclk_vlev_datasheet[] =
+{
+       VRPAIR(VLEV_085, 250000000),
+       VRPAIR(VLEV_090, 376000000),
+       VRPAIR(VLEV_095, 426000000),
+       VRPAIR(VLEV_100, 426000000),
+       VRPAIR(VLEV_105, 476000000),
+       VRPAIR(VLEV_110, 476000000),
+       VRPAIR(VLEV_115, 476000000),
+       VRPAIR(VLEV_120, 600000000),
+       VRPAIR(VLEV_125, 600000000),
+       VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+       .tuple_tab = cclk_vlev_datasheet,
+       .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+       .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+       .name = "bfin dpmc",
+       .dev = {
+               .platform_data = &bfin_dmpc_vreg_data,
+       },
+};
+
 static struct platform_device *ezkit_devices[] __initdata = {
+
+       &bfin_dpmc,
+
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
        &smc91x_device,
 #endif
index 024f418ae5430b36951c67072ac312e5c139c58c..7fd35fb32fd52a0206e157893608eab0fd53766b 100644 (file)
@@ -45,6 +45,7 @@
 #include <asm/bfin5xx_spi.h>
 #include <asm/reboot.h>
 #include <asm/portmux.h>
+#include <asm/dpmc.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -516,7 +517,37 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 };
 #endif
 
+static const unsigned int cclk_vlev_datasheet[] =
+{
+       VRPAIR(VLEV_085, 250000000),
+       VRPAIR(VLEV_090, 376000000),
+       VRPAIR(VLEV_095, 426000000),
+       VRPAIR(VLEV_100, 426000000),
+       VRPAIR(VLEV_105, 476000000),
+       VRPAIR(VLEV_110, 476000000),
+       VRPAIR(VLEV_115, 476000000),
+       VRPAIR(VLEV_120, 600000000),
+       VRPAIR(VLEV_125, 600000000),
+       VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+       .tuple_tab = cclk_vlev_datasheet,
+       .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+       .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+       .name = "bfin dpmc",
+       .dev = {
+               .platform_data = &bfin_dmpc_vreg_data,
+       },
+};
+
 static struct platform_device *stamp_devices[] __initdata = {
+
+       &bfin_dpmc,
+
 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
        &rtc_device,
 #endif
index d8a23cd9b9ed9f860ae22ccfba85ff1d2c4b175f..73f2142875e241d5257c92b860179b33b3207050 100644 (file)
 #include <linux/mtd/partitions.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 #include <linux/usb/isp1362.h>
+#endif
 #include <linux/ata_platform.h>
 #include <linux/irq.h>
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/portmux.h>
+#include <asm/dpmc.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -428,7 +431,37 @@ static struct platform_device bfin_pata_device = {
 };
 #endif
 
+static const unsigned int cclk_vlev_datasheet[] =
+{
+       VRPAIR(VLEV_085, 250000000),
+       VRPAIR(VLEV_090, 376000000),
+       VRPAIR(VLEV_095, 426000000),
+       VRPAIR(VLEV_100, 426000000),
+       VRPAIR(VLEV_105, 476000000),
+       VRPAIR(VLEV_110, 476000000),
+       VRPAIR(VLEV_115, 476000000),
+       VRPAIR(VLEV_120, 500000000),
+       VRPAIR(VLEV_125, 533000000),
+       VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+       .tuple_tab = cclk_vlev_datasheet,
+       .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+       .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+       .name = "bfin dpmc",
+       .dev = {
+               .platform_data = &bfin_dmpc_vreg_data,
+       },
+};
+
 static struct platform_device *cm_bf537_devices[] __initdata = {
+
+       &bfin_dpmc,
+
 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
        &hitachi_fb_device,
 #endif
index d3727b7c2d7d94da933ec76834c2a2378764b407..9a756d1f3d73f19f52c0688b834952d2baa716f0 100644 (file)
@@ -47,6 +47,7 @@
 #include <asm/bfin5xx_spi.h>
 #include <asm/reboot.h>
 #include <asm/portmux.h>
+#include <asm/dpmc.h>
 #include <linux/spi/ad7877.h>
 
 /*
@@ -817,7 +818,37 @@ static struct platform_device bfin_pata_device = {
 };
 #endif
 
+static const unsigned int cclk_vlev_datasheet[] =
+{
+       VRPAIR(VLEV_085, 250000000),
+       VRPAIR(VLEV_090, 376000000),
+       VRPAIR(VLEV_095, 426000000),
+       VRPAIR(VLEV_100, 426000000),
+       VRPAIR(VLEV_105, 476000000),
+       VRPAIR(VLEV_110, 476000000),
+       VRPAIR(VLEV_115, 476000000),
+       VRPAIR(VLEV_120, 500000000),
+       VRPAIR(VLEV_125, 533000000),
+       VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+       .tuple_tab = cclk_vlev_datasheet,
+       .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+       .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+       .name = "bfin dpmc",
+       .dev = {
+               .platform_data = &bfin_dmpc_vreg_data,
+       },
+};
+
 static struct platform_device *stamp_devices[] __initdata = {
+
+       &bfin_dpmc,
+
 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
        &bfin_pcmcia_cf_device,
 #endif
index e3e8479fffb5bf28731f2ba195ad0e640872a8c0..3b74f96d3590d04a728bf8970dd2199e2799e8d3 100644 (file)
@@ -36,7 +36,9 @@
 #include <linux/spi/flash.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
+#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 #include <linux/usb/musb.h>
+#endif
 #include <asm/bfin5xx_spi.h>
 #include <asm/cplb.h>
 #include <asm/dma.h>
@@ -44,6 +46,7 @@
 #include <asm/nand.h>
 #include <asm/portmux.h>
 #include <asm/mach/bf54x_keys.h>
+#include <asm/dpmc.h>
 #include <linux/input.h>
 #include <linux/spi/ad7877.h>
 
@@ -590,7 +593,38 @@ static struct platform_device bfin_device_gpiokeys = {
 };
 #endif
 
+static const unsigned int cclk_vlev_datasheet[] =
+{
+/*
+ * Internal VLEV BF54XSBBC1533
+ ****temporarily using these values until data sheet is updated
+ */
+       VRPAIR(VLEV_085, 150000000),
+       VRPAIR(VLEV_090, 250000000),
+       VRPAIR(VLEV_110, 276000000),
+       VRPAIR(VLEV_115, 301000000),
+       VRPAIR(VLEV_120, 525000000),
+       VRPAIR(VLEV_125, 550000000),
+       VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+       .tuple_tab = cclk_vlev_datasheet,
+       .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+       .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+       .name = "bfin dpmc",
+       .dev = {
+               .platform_data = &bfin_dmpc_vreg_data,
+       },
+};
+
 static struct platform_device *cm_bf548_devices[] __initdata = {
+
+       &bfin_dpmc,
+
 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
        &rtc_device,
 #endif
index b00f68ac6bc991e972a765fe670bfff67bcc5ea8..d1682bb37509937646237df1bf6fa019995a5400 100644 (file)
@@ -46,6 +46,7 @@
 #include <asm/dma.h>
 #include <asm/gpio.h>
 #include <asm/nand.h>
+#include <asm/dpmc.h>
 #include <asm/portmux.h>
 #include <asm/mach/bf54x_keys.h>
 #include <linux/input.h>
@@ -689,7 +690,38 @@ static struct platform_device bfin_gpios_device = {
        .resource = &bfin_gpios_resources,
 };
 
+static const unsigned int cclk_vlev_datasheet[] =
+{
+/*
+ * Internal VLEV BF54XSBBC1533
+ ****temporarily using these values until data sheet is updated
+ */
+       VRPAIR(VLEV_085, 150000000),
+       VRPAIR(VLEV_090, 250000000),
+       VRPAIR(VLEV_110, 276000000),
+       VRPAIR(VLEV_115, 301000000),
+       VRPAIR(VLEV_120, 525000000),
+       VRPAIR(VLEV_125, 550000000),
+       VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+       .tuple_tab = cclk_vlev_datasheet,
+       .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+       .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+       .name = "bfin dpmc",
+       .dev = {
+               .platform_data = &bfin_dmpc_vreg_data,
+       },
+};
+
 static struct platform_device *ezkit_devices[] __initdata = {
+
+       &bfin_dpmc,
+
 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
        &rtc_device,
 #endif
index 9fd580952fd891cc0a64808f22fdf43fb154473b..466ef5929a254d76d62333fc198554d41245cfd7 100644 (file)
 #include <linux/mtd/partitions.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
+#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 #include <linux/usb/isp1362.h>
+#endif
 #include <linux/ata_platform.h>
 #include <linux/irq.h>
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/portmux.h>
+#include <asm/dpmc.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -339,8 +342,37 @@ static struct platform_device bfin_pata_device = {
 };
 #endif
 
+static const unsigned int cclk_vlev_datasheet[] =
+{
+       VRPAIR(VLEV_085, 250000000),
+       VRPAIR(VLEV_090, 300000000),
+       VRPAIR(VLEV_095, 313000000),
+       VRPAIR(VLEV_100, 350000000),
+       VRPAIR(VLEV_105, 400000000),
+       VRPAIR(VLEV_110, 444000000),
+       VRPAIR(VLEV_115, 450000000),
+       VRPAIR(VLEV_120, 475000000),
+       VRPAIR(VLEV_125, 500000000),
+       VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+       .tuple_tab = cclk_vlev_datasheet,
+       .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+       .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+       .name = "bfin dpmc",
+       .dev = {
+               .platform_data = &bfin_dmpc_vreg_data,
+       },
+};
+
 static struct platform_device *cm_bf561_devices[] __initdata = {
 
+       &bfin_dpmc,
+
 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
        &hitachi_fb_device,
 #endif
index 0d74b7d99209e7460c5af87f9926d9ea1c32c32e..61d8f7648b247da40f771d252ecfd759c20e29bf 100644 (file)
@@ -39,6 +39,7 @@
 #include <asm/dma.h>
 #include <asm/bfin5xx_spi.h>
 #include <asm/portmux.h>
+#include <asm/dpmc.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -443,7 +444,37 @@ static struct platform_device i2c_gpio_device = {
 };
 #endif
 
+static const unsigned int cclk_vlev_datasheet[] =
+{
+       VRPAIR(VLEV_085, 250000000),
+       VRPAIR(VLEV_090, 300000000),
+       VRPAIR(VLEV_095, 313000000),
+       VRPAIR(VLEV_100, 350000000),
+       VRPAIR(VLEV_105, 400000000),
+       VRPAIR(VLEV_110, 444000000),
+       VRPAIR(VLEV_115, 450000000),
+       VRPAIR(VLEV_120, 475000000),
+       VRPAIR(VLEV_125, 500000000),
+       VRPAIR(VLEV_130, 600000000),
+};
+
+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
+       .tuple_tab = cclk_vlev_datasheet,
+       .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
+       .vr_settling_time = 25 /* us */,
+};
+
+static struct platform_device bfin_dpmc = {
+       .name = "bfin dpmc",
+       .dev = {
+               .platform_data = &bfin_dmpc_vreg_data,
+       },
+};
+
 static struct platform_device *ezkit_devices[] __initdata = {
+
+       &bfin_dpmc,
+
 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
        &smc91x_device,
 #endif
index 393081e9b6804316b4d61c6d4f25ef9fbe13bb3d..422bfee34adcec22b834a41a36b55f9e3337dffa 100644 (file)
@@ -6,5 +6,6 @@ obj-y := \
        cache.o cacheinit.o entry.o \
        interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o
 
-obj-$(CONFIG_PM)         += pm.o dpmc.o
-obj-$(CONFIG_CPU_FREQ)   += cpufreq.o
+obj-$(CONFIG_PM)          += pm.o dpmc_modes.o
+obj-$(CONFIG_CPU_FREQ)    += cpufreq.o
+obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o
index ed81e00d20e172cd8c14e9966d77211fc00f2c49..75cdad291e889be2b3b1a761c6304d9308d46118 100644 (file)
@@ -62,6 +62,14 @@ static struct bfin_dpm_state {
        unsigned int tscale; /* change the divider on the core timer interrupt */
 } dpm_state_table[3];
 
+/*
+   normalized to maximum frequncy offset for CYCLES,
+   used in time-ts cycles clock source, but could be used
+   somewhere also.
+ */
+unsigned long long __bfin_cycles_off;
+unsigned int __bfin_cycles_mod;
+
 /**************************************************************************/
 
 static unsigned int bfin_getfreq(unsigned int cpu)
@@ -80,6 +88,7 @@ static int bfin_target(struct cpufreq_policy *policy,
        unsigned int index, plldiv, tscale;
        unsigned long flags, cclk_hz;
        struct cpufreq_freqs freqs;
+       cycles_t cycles;
 
        if (cpufreq_frequency_table_target(policy, bfin_freq_table,
                 target_freq, relation, &index))
@@ -101,8 +110,14 @@ static int bfin_target(struct cpufreq_policy *policy,
                bfin_write_PLL_DIV(plldiv);
                /* we have to adjust the core timer, because it is using cclk */
                bfin_write_TSCALE(tscale);
+               cycles = get_cycles();
                SSYNC();
+       cycles += 10; /* ~10 cycles we loose after get_cycles() */
+       __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index);
+       __bfin_cycles_mod = index;
        local_irq_restore(flags);
+       /* TODO: just test case for cycles clock source, remove later */
+       pr_debug("cpufreq: done\n");
        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 
        return 0;
@@ -119,22 +134,13 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy)
        unsigned long cclk, sclk, csel, min_cclk;
        int index;
 
-#ifdef CONFIG_CYCLES_CLOCKSOURCE
-/*
- * Clocksource CYCLES is still CONTINUOUS but not longer MONOTONIC in case we enable
- * CPU frequency scaling, since CYCLES runs off Core Clock.
- */
-       printk(KERN_WARNING "CPU frequency scaling not supported: Clocksource not suitable\n"
-               return -ENODEV;
-#endif
-
        if (policy->cpu != 0)
                return -EINVAL;
 
        cclk = get_cclk();
        sclk = get_sclk();
 
-#if ANOMALY_05000273
+#if ANOMALY_05000273 || (!defined(CONFIG_BF54x) && defined(CONFIG_BFIN_DCACHE))
        min_cclk = sclk * 2;
 #else
        min_cclk = sclk;
diff --git a/arch/blackfin/mach-common/dpmc.c b/arch/blackfin/mach-common/dpmc.c
new file mode 100644 (file)
index 0000000..02c7efd
--- /dev/null
@@ -0,0 +1,137 @@
+/*
+ * Copyright 2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/cdev.h>
+#include <linux/device.h>
+#include <linux/errno.h>
+#include <linux/fs.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+#include <linux/cpufreq.h>
+
+#include <asm/delay.h>
+#include <asm/dpmc.h>
+
+#define DRIVER_NAME "bfin dpmc"
+
+#define dprintk(msg...) \
+       cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, DRIVER_NAME, msg)
+
+struct bfin_dpmc_platform_data *pdata;
+
+/**
+ *     bfin_set_vlev - Update VLEV field in VR_CTL Reg.
+ *                     Avoid BYPASS sequence
+ */
+static void bfin_set_vlev(unsigned int vlev)
+{
+       unsigned pll_lcnt;
+
+       pll_lcnt = bfin_read_PLL_LOCKCNT();
+
+       bfin_write_PLL_LOCKCNT(1);
+       bfin_write_VR_CTL((bfin_read_VR_CTL() & ~VLEV) | vlev);
+       bfin_write_PLL_LOCKCNT(pll_lcnt);
+}
+
+/**
+ *     bfin_get_vlev - Get CPU specific VLEV from platform device data
+ */
+static unsigned int bfin_get_vlev(unsigned int freq)
+{
+       int i;
+
+       if (!pdata)
+               goto err_out;
+
+       freq >>= 16;
+
+       for (i = 0; i < pdata->tabsize; i++)
+               if (freq <= (pdata->tuple_tab[i] & 0xFFFF))
+                       return pdata->tuple_tab[i] >> 16;
+
+err_out:
+       printk(KERN_WARNING "DPMC: No suitable CCLK VDDINT voltage pair found\n");
+       return VLEV_120;
+}
+
+#ifdef CONFIG_CPU_FREQ
+static int
+vreg_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
+{
+       struct cpufreq_freqs *freq = data;
+
+       if (val == CPUFREQ_PRECHANGE && freq->old < freq->new) {
+               bfin_set_vlev(bfin_get_vlev(freq->new));
+               udelay(pdata->vr_settling_time); /* Wait until Volatge settled */
+
+       } else if (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)
+               bfin_set_vlev(bfin_get_vlev(freq->new));
+
+       return 0;
+}
+
+static struct notifier_block vreg_cpufreq_notifier_block = {
+       .notifier_call  = vreg_cpufreq_notifier
+};
+#endif /* CONFIG_CPU_FREQ */
+
+/**
+ *     bfin_dpmc_probe -
+ *
+ */
+static int __devinit bfin_dpmc_probe(struct platform_device *pdev)
+{
+       if (pdev->dev.platform_data)
+               pdata = pdev->dev.platform_data;
+       else
+               return -EINVAL;
+
+       return cpufreq_register_notifier(&vreg_cpufreq_notifier_block,
+                                        CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+/**
+ *     bfin_dpmc_remove -
+ */
+static int __devexit bfin_dpmc_remove(struct platform_device *pdev)
+{
+       pdata = NULL;
+       return cpufreq_unregister_notifier(&vreg_cpufreq_notifier_block,
+                                        CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+struct platform_driver bfin_dpmc_device_driver = {
+       .probe   = bfin_dpmc_probe,
+       .remove  = __devexit_p(bfin_dpmc_remove),
+       .driver  = {
+               .name = DRIVER_NAME,
+       }
+};
+
+/**
+ *     bfin_dpmc_init - Init driver
+ */
+static int __init bfin_dpmc_init(void)
+{
+       return platform_driver_register(&bfin_dpmc_device_driver);
+}
+module_init(bfin_dpmc_init);
+
+/**
+ *     bfin_dpmc_exit - break down driver
+ */
+static void __exit bfin_dpmc_exit(void)
+{
+       platform_driver_unregister(&bfin_dpmc_device_driver);
+}
+module_exit(bfin_dpmc_exit);
+
+MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
+MODULE_DESCRIPTION("cpu power management driver for Blackfin");
+MODULE_LICENSE("GPL");
similarity index 82%
rename from arch/blackfin/mach-common/dpmc.S
rename to arch/blackfin/mach-common/dpmc_modes.S
index 9d45aa3265b19a399e403045c1cda8ad3cac5130..b7981d31c39212b42ea0d1ce56017e9a1867cb43 100644 (file)
@@ -1,30 +1,7 @@
 /*
- * File:         arch/blackfin/mach-common/dpmc.S
- * Based on:
- * Author:       LG Soft India
+ * Copyright 2004-2008 Analog Devices Inc.
  *
- * Created:      ?
- * Description:  Watchdog Timer APIs
- *
- * Modified:
- *               Copyright 2004-2006 Analog Devices Inc.
- *
- * Bugs:         Enter bugs at http://blackfin.uclinux.org/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, see the file COPYING, or write
- * to the Free Software Foundation, Inc.,
- * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ * Licensed under the GPL-2 or later.
  */
 
 #include <linux/linkage.h>
index f2fb87e9a46e29edfb5f04f2190ff337717e35da..038f70e0be65cb4adcb1ada19b07f6d75eba7d8b 100644 (file)
@@ -151,26 +151,62 @@ ENTRY(_ex_soft_bp)
 ENDPROC(_ex_soft_bp)
 
 ENTRY(_ex_single_step)
+       /* If we just returned from an interrupt, the single step event is
+          for the RTI instruction.  */
        r7 = retx;
        r6 = reti;
        cc = r7 == r6;
-       if cc jump _bfin_return_from_exception
-       r7 = syscfg;
-       bitclr (r7, 0);
-       syscfg = R7;
+       if cc jump _bfin_return_from_exception;
 
+       /* If we were in user mode, do the single step normally.  */
        p5.l = lo(IPEND);
        p5.h = hi(IPEND);
        r6 = [p5];
-       cc = bittst(r6, 5);
-       if !cc jump _ex_trap_c;
-       p4.l = lo(EVT5);
-       p4.h = hi(EVT5);
-       r6.h = _exception_to_level5;
-       r6.l = _exception_to_level5;
-       r7 = [p4];
-       cc = r6 == r7;
-       if !cc jump _ex_trap_c;
+       r7 = 0xffe0 (z);
+       r7 = r7 & r6;
+       cc = r7 == 0;
+       if !cc jump 1f;
+
+       /* Single stepping only a single instruction, so clear the trace
+        * bit here.  */
+       r7 = syscfg;
+       bitclr (r7, 0);
+       syscfg = R7;
+       jump _ex_trap_c;
+
+1:
+       /*
+        * We were in an interrupt handler.  By convention, all of them save
+        * SYSCFG with their first instruction, so by checking whether our
+        * RETX points at the entry point, we can determine whether to allow
+        * a single step, or whether to clear SYSCFG.
+        *
+        * First, find out the interrupt level and the event vector for it.
+        */
+       p5.l = lo(EVT0);
+       p5.h = hi(EVT0);
+       p5 += -4;
+2:
+       r7 = rot r7 by -1;
+       p5 += 4;
+       if !cc jump 2b;
+
+       /* What we actually do is test for the _second_ instruction in the
+        * IRQ handler.  That way, if there are insns following the restore
+        * of SYSCFG after leaving the handler, we will not turn off SYSCFG
+        * for them.  */
+
+       r7 = [p5];
+       r7 += 2;
+       r6 = RETX;
+       cc = R7 == R6;
+       if !cc jump _bfin_return_from_exception;
+
+       r7 = syscfg;
+       bitclr (r7, 0);
+       syscfg = R7;
+
+       /* Fall through to _bfin_return_from_exception.  */
 ENDPROC(_ex_single_step)
 
 ENTRY(_bfin_return_from_exception)
@@ -234,20 +270,26 @@ ENTRY(_ex_trap_c)
        p5.l = _saved_icplb_fault_addr;
        [p5] = r7;
 
-       p4.l = __retx;
-       p4.h = __retx;
+       p4.l = _excpt_saved_stuff;
+       p4.h = _excpt_saved_stuff;
+
        r6 = retx;
        [p4] = r6;
-       p4.l = lo(SAFE_USER_INSTRUCTION);
-       p4.h = hi(SAFE_USER_INSTRUCTION);
-       retx = p4;
+
+       r6 = SYSCFG;
+       [p4 + 4] = r6;
+       BITCLR(r6, 0);
+       SYSCFG = r6;
 
        /* Disable all interrupts, but make sure level 5 is enabled so
         * we can switch to that level.  Save the old mask.  */
        cli r6;
-       p4.l = _excpt_saved_imask;
-       p4.h = _excpt_saved_imask;
-       [p4] = r6;
+       [p4 + 8] = r6;
+
+       p4.l = lo(SAFE_USER_INSTRUCTION);
+       p4.h = hi(SAFE_USER_INSTRUCTION);
+       retx = p4;
+
        r6 = 0x3f;
        sti r6;
 
@@ -295,6 +337,11 @@ ENTRY(_double_fault)
          */
         SAVE_ALL_SYS
 
+       /* The dumping functions expect the return address in the RETI
+        * slot.  */
+       r6 = retx;
+       [sp + PT_PC] = r6;
+
         r0 = sp;        /* stack frame pt_regs pointer argument ==> r0 */
         SP += -12;
         call _double_fault_c;
@@ -307,16 +354,17 @@ ENDPROC(_double_fault)
 ENTRY(_exception_to_level5)
        SAVE_ALL_SYS
 
-       p4.l = __retx;
-       p4.h = __retx;
+       p4.l = _excpt_saved_stuff;
+       p4.h = _excpt_saved_stuff;
        r6 = [p4];
        [sp + PT_PC] = r6;
 
+       r6 = [p4 + 4];
+       [sp + PT_SYSCFG] = r6;
+
        /* Restore interrupt mask.  We haven't pushed RETI, so this
         * doesn't enable interrupts until we return from this handler.  */
-       p4.l = _excpt_saved_imask;
-       p4.h = _excpt_saved_imask;
-       r6 = [p4];
+       r6 = [p4 + 8];
        sti r6;
 
        /* Restore the hardware error vector.  */
@@ -1344,7 +1392,14 @@ ENTRY(_sys_call_table)
        .rept NR_syscalls-(.-_sys_call_table)/4
        .long _sys_ni_syscall
        .endr
-_excpt_saved_imask:
+
+       /*
+        * Used to save the real RETX, IMASK and SYSCFG when temporarily
+        * storing safe values across the transition from exception to IRQ5.
+        */
+_excpt_saved_stuff:
+       .long 0;
+       .long 0;
        .long 0;
 
 _exception_stack:
@@ -1358,7 +1413,3 @@ _exception_stack_top:
 _last_cplb_fault_retx:
        .long 0;
 #endif
-       /* Used to save the real RETX when temporarily storing a safe
-        * return address.  */
-__retx:
-       .long 0;
index 8b9984197edcc57878356a56848c237ea06aa109..a79fbd87021b02cf03663f7a06d680a58a24ceac 100644 (file)
 #include <asm/uaccess.h>
 #include <asm/segment.h>
 
-/*
- * sys_pipe() is the normal C calling standard for creating
- * a pipe. It's not the way Unix traditionally does this, though.
- */
-asmlinkage int sys_pipe(unsigned long __user * fildes)
-{
-        int fd[2];
-        int error;
-
-        lock_kernel();
-        error = do_pipe(fd);
-        unlock_kernel();
-        if (!error) {
-                if (copy_to_user(fildes, fd, 2*sizeof(int)))
-                        error = -EFAULT;
-        }
-        return error;
-}
-
 /* common code for old and new mmaps */
 static inline long
 do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
index 6d7a80fdad488676b8e69c43b0db180e68baf823..305ac852bbed417dda77de7a9b100c6a401bc75d 100644 (file)
@@ -76,26 +76,6 @@ asmlinkage int sys_tas(int __user *addr)
        return oldval;
 }
 
-/*
- * sys_pipe() is the normal C calling standard for creating
- * a pipe. It's not the way Unix traditionally does this, though.
- */
-asmlinkage int
-sys_pipe(unsigned long r0, unsigned long r1, unsigned long r2,
-       unsigned long r3, unsigned long r4, unsigned long r5,
-       unsigned long r6, struct pt_regs regs)
-{
-       int fd[2];
-       int error;
-
-       error = do_pipe(fd);
-       if (!error) {
-               if (copy_to_user((void __user *)r0, fd, 2*sizeof(int)))
-                       error = -EFAULT;
-       }
-       return error;
-}
-
 asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
        unsigned long prot, unsigned long flags,
        unsigned long fd, unsigned long pgoff)
index 6a6409adc56403c34ced10eee3d51c638c8314e2..e856218da90d36098e719602be9ffaa78c28f606 100644 (file)
@@ -186,17 +186,6 @@ config PREEMPT
          Say Y here if you are building a kernel for a desktop, embedded
          or real-time system.  Say N if you are unsure.
 
-config PREEMPT_BKL
-       bool "Preempt The Big Kernel Lock"
-       depends on PREEMPT
-       default y
-       help
-         This option reduces the latency of the kernel by making the
-         big kernel lock preemptible.
-
-         Say Y here if you are building a kernel for a desktop system.
-         Say N if you are unsure.
-
 config MN10300_CURRENT_IN_E2
        bool "Hold current task address in E2 register"
        default y
index a1ae4d6ec9908c3a86dc1900b39086ec8d08c995..72d67564bdfc6302a3d48185761aa5abeadd67ce 100644 (file)
                        /* Outbound ranges, one memory and one IO,
                         * later cannot be changed. Chip supports a second
                         * IO range but we don't use it for now
+                        * From the 440EPx user manual:
+                        * PCI 1 Memory     1 8000 0000     1 BFFF FFFF     1GB
+                        * I/O              1 E800 0000     1 E800 FFFF     64KB
+                        * I/O              1 E880 0000     1 EBFF FFFF     56MB
                         */
-                       ranges = <02000000 0 80000000 1 80000000 0 10000000
-                               01000000 0 00000000 1 e8000000 0 00100000>;
+                       ranges = <02000000 0 80000000 1 80000000 0 40000000
+                               01000000 0 00000000 1 e8000000 0 00010000
+                               01000000 0 00000000 1 e8800000 0 03800000>;
 
                        /* Inbound 2GB range starting at 0 */
                        dma-ranges = <42000000 0 0 0 0 0 80000000>;
index 9f9377745490d966ff434f728bc1e15581c3dace..d8f0329b13444b73be463ea06c71169a193d180f 100644 (file)
@@ -16,7 +16,6 @@
 #include <asm/mmu.h>
 #include <asm/pgtable.h>
 #include <asm/io.h>
-#include <asm/prom.h>
 #include <asm/processor.h>
 #include <asm/udbg.h>
 
index 36080d4d1922ba1d47621916f84fa528fe615816..81738a4b3c3ac040312e0517aafb6e02dab5b500 100644 (file)
@@ -1208,6 +1208,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .machine_check          = machine_check_4xx,
                .platform               = "ppc405",
        },
+       {       /* default match */
+               .pvr_mask               = 0x00000000,
+               .pvr_value              = 0x00000000,
+               .cpu_name               = "(generic 40x PPC)",
+               .cpu_features           = CPU_FTRS_40X,
+               .cpu_user_features      = PPC_FEATURE_32 |
+                       PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .machine_check          = machine_check_4xx,
+               .platform               = "ppc405",
+       }
 
 #endif /* CONFIG_40x */
 #ifdef CONFIG_44x
@@ -1421,8 +1433,18 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .machine_check          = machine_check_440A,
                .platform               = "ppc440",
        },
+       {       /* default match */
+               .pvr_mask               = 0x00000000,
+               .pvr_value              = 0x00000000,
+               .cpu_name               = "(generic 44x PPC)",
+               .cpu_features           = CPU_FTRS_44X,
+               .cpu_user_features      = COMMON_USER_BOOKE,
+               .icache_bsize           = 32,
+               .dcache_bsize           = 32,
+               .machine_check          = machine_check_4xx,
+               .platform               = "ppc440",
+       }
 #endif /* CONFIG_44x */
-#ifdef CONFIG_FSL_BOOKE
 #ifdef CONFIG_E200
        {       /* e200z5 */
                .pvr_mask               = 0xfff00000,
@@ -1451,7 +1473,19 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .machine_check          = machine_check_e200,
                .platform               = "ppc5554",
        },
-#elif defined(CONFIG_E500)
+       {       /* default match */
+               .pvr_mask               = 0x00000000,
+               .pvr_value              = 0x00000000,
+               .cpu_name               = "(generic E200 PPC)",
+               .cpu_features           = CPU_FTRS_E200,
+               .cpu_user_features      = COMMON_USER_BOOKE |
+                       PPC_FEATURE_HAS_EFP_SINGLE |
+                       PPC_FEATURE_UNIFIED_CACHE,
+               .dcache_bsize           = 32,
+               .machine_check          = machine_check_e200,
+               .platform               = "ppc5554",
+#endif /* CONFIG_E200 */
+#ifdef CONFIG_E500
        {       /* e500 */
                .pvr_mask               = 0xffff0000,
                .pvr_value              = 0x80200000,
@@ -1487,20 +1521,19 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .machine_check          = machine_check_e500,
                .platform               = "ppc8548",
        },
-#endif
-#endif
-#if !CLASSIC_PPC
        {       /* default match */
                .pvr_mask               = 0x00000000,
                .pvr_value              = 0x00000000,
-               .cpu_name               = "(generic PPC)",
-               .cpu_features           = CPU_FTRS_GENERIC_32,
-               .cpu_user_features      = PPC_FEATURE_32,
+               .cpu_name               = "(generic E500 PPC)",
+               .cpu_features           = CPU_FTRS_E500,
+               .cpu_user_features      = COMMON_USER_BOOKE |
+                       PPC_FEATURE_HAS_SPE_COMP |
+                       PPC_FEATURE_HAS_EFP_SINGLE_COMP,
                .icache_bsize           = 32,
                .dcache_bsize           = 32,
+               .machine_check          = machine_check_e500,
                .platform               = "powerpc",
-       }
-#endif /* !CLASSIC_PPC */
+#endif /* CONFIG_E500 */
 #endif /* CONFIG_PPC32 */
 };
 
index b84ec6a2fc94c06a4374647344e0c4ce6c87e01c..c2b9dc4fce5d24a4021972f5337d66828faca918 100644 (file)
@@ -653,7 +653,14 @@ finish_tlb_load:
        rlwimi  r10, r11, 0, 26, 26             /* UX = HWEXEC & USER */
 
        rlwimi  r12, r10, 0, 26, 31             /* Insert static perms */
-       rlwinm  r12, r12, 0, 20, 15             /* Clear U0-U3 */
+
+       /*
+        * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
+        * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
+        * include/asm-powerpc/pgtable-ppc32.h for details).
+        */
+       rlwinm  r12, r12, 0, 20, 10
+
        tlbwe   r12, r13, PPC44x_TLB_ATTRIB     /* Write ATTRIB */
 
        /* Done...restore registers and get out of here.
index 024805e1747df86a9c1e58f71b581932b70ddae7..25e84c0e116695e37d416296e34eb6f8cfc28ba6 100644 (file)
@@ -1517,10 +1517,6 @@ _INIT_STATIC(start_here_multiplatform)
        addi    r2,r2,0x4000
        add     r2,r2,r26
 
-       /* Set initial ptr to current */
-       LOAD_REG_IMMEDIATE(r4, init_task)
-       std     r4,PACACURRENT(r13)
-
        /* Do very early kernel initializations, including initial hash table,
         * stab and slb setup before we turn on relocation.     */
 
index 289af348978dac142638703e630bdaf367001068..4d5731b2429aa605f6776a8674d6c7e4a40d5520 100644 (file)
@@ -108,9 +108,6 @@ static void __devinit pci_process_ISA_OF_ranges(struct device_node *isa_node,
        if (size > 0x10000)
                size = 0x10000;
 
-       printk(KERN_ERR "no ISA IO ranges or unexpected isa range, "
-              "mapping 64k\n");
-
        __ioremap_at(phb_io_base_phys, (void *)ISA_IO_BASE,
                     size, _PAGE_NO_CACHE|_PAGE_GUARDED);
        return;
index 25e3fd8606ab589ebae8ee51143e39a517d32505..098fd96a394aa4df6947a2cad11146458de2b29f 100644 (file)
@@ -170,6 +170,8 @@ void __init setup_paca(int cpu)
 
 void __init early_setup(unsigned long dt_ptr)
 {
+       /* -------- printk is _NOT_ safe to use here ! ------- */
+
        /* Fill in any unititialised pacas */
        initialise_pacas();
 
@@ -179,12 +181,14 @@ void __init early_setup(unsigned long dt_ptr)
        /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
        setup_paca(0);
 
-       /* Enable early debugging if any specified (see udbg.h) */
-       udbg_early_init();
-
        /* Initialize lockdep early or else spinlocks will blow */
        lockdep_init();
 
+       /* -------- printk is now safe to use ------- */
+
+       /* Enable early debugging if any specified (see udbg.h) */
+       udbg_early_init();
+
        DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
 
        /*
index 04f74f9f9ab67dcae27a706a7c3de449bab22ac6..5bf7df14602288b1d4daafb79e1116ac92066864 100644 (file)
@@ -35,6 +35,7 @@
 #include <linux/percpu.h>
 #include <linux/types.h>
 #include <linux/ioport.h>
+#include <linux/kernel_stat.h>
 
 #include <asm/io.h>
 #include <asm/pgtable.h>
@@ -231,6 +232,54 @@ static int iic_host_match(struct irq_host *h, struct device_node *node)
                                    "IBM,CBEA-Internal-Interrupt-Controller");
 }
 
+extern int noirqdebug;
+
+static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
+{
+       const unsigned int cpu = smp_processor_id();
+
+       spin_lock(&desc->lock);
+
+       desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
+
+       /*
+        * If we're currently running this IRQ, or its disabled,
+        * we shouldn't process the IRQ. Mark it pending, handle
+        * the necessary masking and go out
+        */
+       if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
+                   !desc->action)) {
+               desc->status |= IRQ_PENDING;
+               goto out_eoi;
+       }
+
+       kstat_cpu(cpu).irqs[irq]++;
+
+       /* Mark the IRQ currently in progress.*/
+       desc->status |= IRQ_INPROGRESS;
+
+       do {
+               struct irqaction *action = desc->action;
+               irqreturn_t action_ret;
+
+               if (unlikely(!action))
+                       goto out_eoi;
+
+               desc->status &= ~IRQ_PENDING;
+               spin_unlock(&desc->lock);
+               action_ret = handle_IRQ_event(irq, action);
+               if (!noirqdebug)
+                       note_interrupt(irq, desc, action_ret);
+               spin_lock(&desc->lock);
+
+       } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
+
+       desc->status &= ~IRQ_INPROGRESS;
+out_eoi:
+       desc->chip->eoi(irq);
+       spin_unlock(&desc->lock);
+}
+
 static int iic_host_map(struct irq_host *h, unsigned int virq,
                        irq_hw_number_t hw)
 {
@@ -240,10 +289,10 @@ static int iic_host_map(struct irq_host *h, unsigned int virq,
                break;
        case IIC_IRQ_TYPE_IOEXC:
                set_irq_chip_and_handler(virq, &iic_ioexc_chip,
-                                        handle_fasteoi_irq);
+                                        handle_iic_irq);
                break;
        default:
-               set_irq_chip_and_handler(virq, &iic_chip, handle_fasteoi_irq);
+               set_irq_chip_and_handler(virq, &iic_chip, handle_iic_irq);
        }
        return 0;
 }
index 6bab44b7716b2d525bff0720c0c6a0f436a55acb..70c660121ec4d0d2da4a36071d851a1acd3e7870 100644 (file)
@@ -141,6 +141,10 @@ static void spu_restart_dma(struct spu *spu)
 
        if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
                out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
+       else {
+               set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
+               mb();
+       }
 }
 
 static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
@@ -226,11 +230,13 @@ static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
                return 0;
        }
 
-       spu->class_0_pending = 0;
-       spu->dar = ea;
-       spu->dsisr = dsisr;
+       spu->class_1_dar = ea;
+       spu->class_1_dsisr = dsisr;
+
+       spu->stop_callback(spu, 1);
 
-       spu->stop_callback(spu);
+       spu->class_1_dar = 0;
+       spu->class_1_dsisr = 0;
 
        return 0;
 }
@@ -318,11 +324,15 @@ spu_irq_class_0(int irq, void *data)
        stat = spu_int_stat_get(spu, 0) & mask;
 
        spu->class_0_pending |= stat;
-       spu->dsisr = spu_mfc_dsisr_get(spu);
-       spu->dar = spu_mfc_dar_get(spu);
+       spu->class_0_dsisr = spu_mfc_dsisr_get(spu);
+       spu->class_0_dar = spu_mfc_dar_get(spu);
        spin_unlock(&spu->register_lock);
 
-       spu->stop_callback(spu);
+       spu->stop_callback(spu, 0);
+
+       spu->class_0_pending = 0;
+       spu->class_0_dsisr = 0;
+       spu->class_0_dar = 0;
 
        spu_int_stat_clear(spu, 0, stat);
 
@@ -363,6 +373,9 @@ spu_irq_class_1(int irq, void *data)
        if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
                ;
 
+       spu->class_1_dsisr = 0;
+       spu->class_1_dar = 0;
+
        return stat ? IRQ_HANDLED : IRQ_NONE;
 }
 
@@ -396,10 +409,10 @@ spu_irq_class_2(int irq, void *data)
                spu->ibox_callback(spu);
 
        if (stat & CLASS2_SPU_STOP_INTR)
-               spu->stop_callback(spu);
+               spu->stop_callback(spu, 2);
 
        if (stat & CLASS2_SPU_HALT_INTR)
-               spu->stop_callback(spu);
+               spu->stop_callback(spu, 2);
 
        if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
                spu->mfc_callback(spu);
index 67fa7247b80a4e0dac21d6702c2fcc0c1d6b1867..906a0a2a9fe18fc4273be7916f18df118c824dc1 100644 (file)
@@ -28,6 +28,7 @@
 #include <linux/io.h>
 #include <linux/mutex.h>
 #include <linux/device.h>
+#include <linux/sched.h>
 
 #include <asm/spu.h>
 #include <asm/spu_priv1.h>
@@ -75,8 +76,19 @@ static u64 int_stat_get(struct spu *spu, int class)
 
 static void cpu_affinity_set(struct spu *spu, int cpu)
 {
-       u64 target = iic_get_target_id(cpu);
-       u64 route = target << 48 | target << 32 | target << 16;
+       u64 target;
+       u64 route;
+
+       if (nr_cpus_node(spu->node)) {
+               cpumask_t spumask = node_to_cpumask(spu->node);
+               cpumask_t cpumask = node_to_cpumask(cpu_to_node(cpu));
+
+               if (!cpus_intersects(spumask, cpumask))
+                       return;
+       }
+
+       target = iic_get_target_id(cpu);
+       route = target << 48 | target << 32 | target << 16;
        out_be64(&spu->priv1->int_route_RW, route);
 }
 
index e46d300e21a5e18cf3b612b214a11af5f9562805..f093a581ac7410792a9126b2b0bbc87f665e9fdc 100644 (file)
@@ -83,13 +83,18 @@ int spufs_handle_class0(struct spu_context *ctx)
                return 0;
 
        if (stat & CLASS0_DMA_ALIGNMENT_INTR)
-               spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_DMA_ALIGNMENT);
+               spufs_handle_event(ctx, ctx->csa.class_0_dar,
+                       SPE_EVENT_DMA_ALIGNMENT);
 
        if (stat & CLASS0_INVALID_DMA_COMMAND_INTR)
-               spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_INVALID_DMA);
+               spufs_handle_event(ctx, ctx->csa.class_0_dar,
+                       SPE_EVENT_INVALID_DMA);
 
        if (stat & CLASS0_SPU_ERROR_INTR)
-               spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_SPE_ERROR);
+               spufs_handle_event(ctx, ctx->csa.class_0_dar,
+                       SPE_EVENT_SPE_ERROR);
+
+       ctx->csa.class_0_pending = 0;
 
        return -EIO;
 }
@@ -119,8 +124,8 @@ int spufs_handle_class1(struct spu_context *ctx)
         * in time, we can still expect to get the same fault
         * the immediately after the context restore.
         */
-       ea = ctx->csa.dar;
-       dsisr = ctx->csa.dsisr;
+       ea = ctx->csa.class_1_dar;
+       dsisr = ctx->csa.class_1_dsisr;
 
        if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)))
                return 0;
@@ -158,7 +163,7 @@ int spufs_handle_class1(struct spu_context *ctx)
         * time slicing will not preempt the context while the page fault
         * handler is running. Context switch code removes mappings.
         */
-       ctx->csa.dar = ctx->csa.dsisr = 0;
+       ctx->csa.class_1_dar = ctx->csa.class_1_dsisr = 0;
 
        /*
         * If we handled the fault successfully and are in runnable
index 0c32a05ab068a1487485d8871ce26a847d50a784..f407b24718554f474a153dc9a66e93d88518739f 100644 (file)
@@ -23,6 +23,7 @@
 
 #include <linux/file.h>
 #include <linux/fs.h>
+#include <linux/fsnotify.h>
 #include <linux/backing-dev.h>
 #include <linux/init.h>
 #include <linux/ioctl.h>
@@ -223,7 +224,7 @@ static int spufs_dir_close(struct inode *inode, struct file *file)
        parent = dir->d_parent->d_inode;
        ctx = SPUFS_I(dir->d_inode)->i_ctx;
 
-       mutex_lock(&parent->i_mutex);
+       mutex_lock_nested(&parent->i_mutex, I_MUTEX_PARENT);
        ret = spufs_rmdir(parent, dir);
        mutex_unlock(&parent->i_mutex);
        WARN_ON(ret);
@@ -618,12 +619,15 @@ long spufs_create(struct nameidata *nd, unsigned int flags, mode_t mode,
        mode &= ~current->fs->umask;
 
        if (flags & SPU_CREATE_GANG)
-               return spufs_create_gang(nd->path.dentry->d_inode,
+               ret = spufs_create_gang(nd->path.dentry->d_inode,
                                         dentry, nd->path.mnt, mode);
        else
-               return spufs_create_context(nd->path.dentry->d_inode,
+               ret = spufs_create_context(nd->path.dentry->d_inode,
                                            dentry, nd->path.mnt, flags, mode,
                                            filp);
+       if (ret >= 0)
+               fsnotify_mkdir(nd->path.dentry->d_inode, dentry);
+       return ret;
 
 out_dput:
        dput(dentry);
index a9c35b7b719fda3bd3850dc1dfdaa74d2e5acc6b..b7493b86581228d0edf8b0c0b691582e706bac58 100644 (file)
@@ -11,7 +11,7 @@
 #include "spufs.h"
 
 /* interrupt-level stop callback function. */
-void spufs_stop_callback(struct spu *spu)
+void spufs_stop_callback(struct spu *spu, int irq)
 {
        struct spu_context *ctx = spu->ctx;
 
@@ -24,9 +24,19 @@ void spufs_stop_callback(struct spu *spu)
         */
        if (ctx) {
                /* Copy exception arguments into module specific structure */
-               ctx->csa.class_0_pending = spu->class_0_pending;
-               ctx->csa.dsisr = spu->dsisr;
-               ctx->csa.dar = spu->dar;
+               switch(irq) {
+               case 0 :
+                       ctx->csa.class_0_pending = spu->class_0_pending;
+                       ctx->csa.class_0_dsisr = spu->class_0_dsisr;
+                       ctx->csa.class_0_dar = spu->class_0_dar;
+                       break;
+               case 1 :
+                       ctx->csa.class_1_dsisr = spu->class_1_dsisr;
+                       ctx->csa.class_1_dar = spu->class_1_dar;
+                       break;
+               case 2 :
+                       break;
+               }
 
                /* ensure that the exception status has hit memory before a
                 * thread waiting on the context's stop queue is woken */
@@ -34,11 +44,6 @@ void spufs_stop_callback(struct spu *spu)
 
                wake_up_all(&ctx->stop_wq);
        }
-
-       /* Clear callback arguments from spu structure */
-       spu->class_0_pending = 0;
-       spu->dsisr = 0;
-       spu->dar = 0;
 }
 
 int spu_stopped(struct spu_context *ctx, u32 *stat)
@@ -56,7 +61,11 @@ int spu_stopped(struct spu_context *ctx, u32 *stat)
        if (!(*stat & SPU_STATUS_RUNNING) && (*stat & stopped))
                return 1;
 
-       dsisr = ctx->csa.dsisr;
+       dsisr = ctx->csa.class_0_dsisr;
+       if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
+               return 1;
+
+       dsisr = ctx->csa.class_1_dsisr;
        if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
                return 1;
 
@@ -294,7 +303,7 @@ static int spu_process_callback(struct spu_context *ctx)
        u32 ls_pointer, npc;
        void __iomem *ls;
        long spu_ret;
-       int ret, ret2;
+       int ret;
 
        /* get syscall block from local store */
        npc = ctx->ops->npc_read(ctx) & ~3;
@@ -316,11 +325,9 @@ static int spu_process_callback(struct spu_context *ctx)
                if (spu_ret <= -ERESTARTSYS) {
                        ret = spu_handle_restartsys(ctx, &spu_ret, &npc);
                }
-               ret2 = spu_acquire(ctx);
+               mutex_lock(&ctx->state_mutex);
                if (ret == -ERESTARTSYS)
                        return ret;
-               if (ret2)
-                       return -EINTR;
        }
 
        /* need to re-get the ls, as it may have changed when we released the
@@ -343,13 +350,14 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
        if (mutex_lock_interruptible(&ctx->run_mutex))
                return -ERESTARTSYS;
 
-       spu_enable_spu(ctx);
        ctx->event_return = 0;
 
        ret = spu_acquire(ctx);
        if (ret)
                goto out_unlock;
 
+       spu_enable_spu(ctx);
+
        spu_update_sched_info(ctx);
 
        ret = spu_run_init(ctx, npc);
index 7298e7db2c8365cf83f8519350f917a01a35c8c3..2e411f23462b47417e50f965905a62f947c73f8f 100644 (file)
@@ -140,6 +140,9 @@ void __spu_update_sched_info(struct spu_context *ctx)
         * if it is timesliced or preempted.
         */
        ctx->cpus_allowed = current->cpus_allowed;
+
+       /* Save the current cpu id for spu interrupt routing. */
+       ctx->last_ran = raw_smp_processor_id();
 }
 
 void spu_update_sched_info(struct spu_context *ctx)
@@ -243,7 +246,6 @@ static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
        spu_switch_log_notify(spu, ctx, SWITCH_LOG_START, 0);
        spu_restore(&ctx->csa, spu);
        spu->timestamp = jiffies;
-       spu_cpu_affinity_set(spu, raw_smp_processor_id());
        spu_switch_notify(spu, ctx);
        ctx->state = SPU_STATE_RUNNABLE;
 
@@ -657,7 +659,8 @@ static struct spu *find_victim(struct spu_context *ctx)
 
                        victim->stats.invol_ctx_switch++;
                        spu->stats.invol_ctx_switch++;
-                       spu_add_to_rq(victim);
+                       if (test_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags))
+                               spu_add_to_rq(victim);
 
                        mutex_unlock(&victim->state_mutex);
 
index 7312745b7540d4586fd72c7e4b57e9b5a9abd641..454c277c1457deaf4034b084cf95e438241c295c 100644 (file)
@@ -121,6 +121,7 @@ struct spu_context {
        cpumask_t cpus_allowed;
        int policy;
        int prio;
+       int last_ran;
 
        /* statistics */
        struct {
@@ -331,7 +332,7 @@ size_t spu_ibox_read(struct spu_context *ctx, u32 *data);
 /* irq callback funcs. */
 void spufs_ibox_callback(struct spu *spu);
 void spufs_wbox_callback(struct spu *spu);
-void spufs_stop_callback(struct spu *spu);
+void spufs_stop_callback(struct spu *spu, int irq);
 void spufs_mfc_callback(struct spu *spu);
 void spufs_dma_callback(struct spu *spu, int type);
 
index d2a1249d36dd2a7bc018727e09c3b7c57b88cf1c..3df9a36eb2f58efe6bcda41f7d27cf5861ac4e5b 100644 (file)
@@ -132,6 +132,14 @@ static inline void disable_interrupts(struct spu_state *csa, struct spu *spu)
        spu_int_mask_set(spu, 2, 0ul);
        eieio();
        spin_unlock_irq(&spu->register_lock);
+
+       /*
+        * This flag needs to be set before calling synchronize_irq so
+        * that the update will be visible to the relevant handlers
+        * via a simple load.
+        */
+       set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
+       clear_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
        synchronize_irq(spu->irqs[0]);
        synchronize_irq(spu->irqs[1]);
        synchronize_irq(spu->irqs[2]);
@@ -166,9 +174,8 @@ static inline void set_switch_pending(struct spu_state *csa, struct spu *spu)
        /* Save, Step 7:
         * Restore, Step 5:
         *     Set a software context switch pending flag.
+        *     Done above in Step 3 - disable_interrupts().
         */
-       set_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
-       mb();
 }
 
 static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
@@ -186,20 +193,21 @@ static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
                                 MFC_CNTL_SUSPEND_COMPLETE);
                /* fall through */
        case MFC_CNTL_SUSPEND_COMPLETE:
-               if (csa) {
+               if (csa)
                        csa->priv2.mfc_control_RW =
-                               MFC_CNTL_SUSPEND_MASK |
+                               in_be64(&priv2->mfc_control_RW) |
                                MFC_CNTL_SUSPEND_DMA_QUEUE;
-               }
                break;
        case MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION:
                out_be64(&priv2->mfc_control_RW, MFC_CNTL_SUSPEND_DMA_QUEUE);
                POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
                                  MFC_CNTL_SUSPEND_DMA_STATUS_MASK) ==
                                 MFC_CNTL_SUSPEND_COMPLETE);
-               if (csa) {
-                       csa->priv2.mfc_control_RW = 0;
-               }
+               if (csa)
+                       csa->priv2.mfc_control_RW =
+                               in_be64(&priv2->mfc_control_RW) &
+                               ~MFC_CNTL_SUSPEND_DMA_QUEUE &
+                               ~MFC_CNTL_SUSPEND_MASK;
                break;
        }
 }
@@ -249,16 +257,21 @@ static inline void save_spu_status(struct spu_state *csa, struct spu *spu)
        }
 }
 
-static inline void save_mfc_decr(struct spu_state *csa, struct spu *spu)
+static inline void save_mfc_stopped_status(struct spu_state *csa,
+               struct spu *spu)
 {
        struct spu_priv2 __iomem *priv2 = spu->priv2;
+       const u64 mask = MFC_CNTL_DECREMENTER_RUNNING |
+                       MFC_CNTL_DMA_QUEUES_EMPTY;
 
        /* Save, Step 12:
         *     Read MFC_CNTL[Ds].  Update saved copy of
         *     CSA.MFC_CNTL[Ds].
+        *
+        * update: do the same with MFC_CNTL[Q].
         */
-       csa->priv2.mfc_control_RW |=
-               in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DECREMENTER_RUNNING;
+       csa->priv2.mfc_control_RW &= ~mask;
+       csa->priv2.mfc_control_RW |= in_be64(&priv2->mfc_control_RW) & mask;
 }
 
 static inline void halt_mfc_decr(struct spu_state *csa, struct spu *spu)
@@ -462,7 +475,9 @@ static inline void purge_mfc_queue(struct spu_state *csa, struct spu *spu)
         * Restore, Step 14.
         *     Write MFC_CNTL[Pc]=1 (purge queue).
         */
-       out_be64(&priv2->mfc_control_RW, MFC_CNTL_PURGE_DMA_REQUEST);
+       out_be64(&priv2->mfc_control_RW,
+                       MFC_CNTL_PURGE_DMA_REQUEST |
+                       MFC_CNTL_SUSPEND_MASK);
        eieio();
 }
 
@@ -725,10 +740,14 @@ static inline void set_switch_active(struct spu_state *csa, struct spu *spu)
        /* Save, Step 48:
         * Restore, Step 23.
         *     Change the software context switch pending flag
-        *     to context switch active.
+        *     to context switch active.  This implementation does
+        *     not uses a switch active flag.
         *
-        *     This implementation does not uses a switch active flag.
+        * Now that we have saved the mfc in the csa, we can add in the
+        * restart command if an exception occurred.
         */
+       if (test_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags))
+               csa->priv2.mfc_control_RW |= MFC_CNTL_RESTART_DMA_COMMAND;
        clear_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags);
        mb();
 }
@@ -1690,6 +1709,13 @@ static inline void restore_mfc_sr1(struct spu_state *csa, struct spu *spu)
        eieio();
 }
 
+static inline void set_int_route(struct spu_state *csa, struct spu *spu)
+{
+       struct spu_context *ctx = spu->ctx;
+
+       spu_cpu_affinity_set(spu, ctx->last_ran);
+}
+
 static inline void restore_other_spu_access(struct spu_state *csa,
                                            struct spu *spu)
 {
@@ -1721,15 +1747,15 @@ static inline void restore_mfc_cntl(struct spu_state *csa, struct spu *spu)
         */
        out_be64(&priv2->mfc_control_RW, csa->priv2.mfc_control_RW);
        eieio();
+
        /*
-        * FIXME: this is to restart a DMA that we were processing
-        *        before the save. better remember the fault information
-        *        in the csa instead.
+        * The queue is put back into the same state that was evident prior to
+        * the context switch. The suspend flag is added to the saved state in
+        * the csa, if the operational state was suspending or suspended. In
+        * this case, the code that suspended the mfc is responsible for
+        * continuing it. Note that SPE faults do not change the operational
+        * state of the spu.
         */
-       if ((csa->priv2.mfc_control_RW & MFC_CNTL_SUSPEND_DMA_QUEUE_MASK)) {
-               out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
-               eieio();
-       }
 }
 
 static inline void enable_user_access(struct spu_state *csa, struct spu *spu)
@@ -1788,7 +1814,7 @@ static int quiece_spu(struct spu_state *prev, struct spu *spu)
        save_spu_runcntl(prev, spu);            /* Step 9. */
        save_mfc_sr1(prev, spu);                /* Step 10. */
        save_spu_status(prev, spu);             /* Step 11. */
-       save_mfc_decr(prev, spu);               /* Step 12. */
+       save_mfc_stopped_status(prev, spu);     /* Step 12. */
        halt_mfc_decr(prev, spu);               /* Step 13. */
        save_timebase(prev, spu);               /* Step 14. */
        remove_other_spu_access(prev, spu);     /* Step 15. */
@@ -2000,6 +2026,7 @@ static void restore_csa(struct spu_state *next, struct spu *spu)
        check_ppuint_mb_stat(next, spu);        /* Step 67. */
        spu_invalidate_slbs(spu);               /* Modified Step 68. */
        restore_mfc_sr1(next, spu);             /* Step 69. */
+       set_int_route(next, spu);               /* NEW      */
        restore_other_spu_access(next, spu);    /* Step 70. */
        restore_spu_runcntl(next, spu);         /* Step 71. */
        restore_mfc_cntl(next, spu);            /* Step 72. */
index 5bcc58d9a4dd39ad451785b36ad00d1ecb8e3e70..130ff72d99dd4366bfe5062d3842e894f04b9883 100644 (file)
@@ -58,7 +58,9 @@ static struct resource mv643xx_eth0_resources[] = {
 
 
 static struct mv643xx_eth_platform_data eth0_pd = {
+       .shared         = &mv643xx_eth_shared_device,
        .port_number    = 0,
+
        .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0,
        .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
        .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
@@ -88,7 +90,9 @@ static struct resource mv643xx_eth1_resources[] = {
 };
 
 static struct mv643xx_eth_platform_data eth1_pd = {
+       .shared         = &mv643xx_eth_shared_device,
        .port_number    = 1,
+
        .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1,
        .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
        .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
index 41af1223e2a0f058036d7c4a11af9cf8d5a21937..a132e0de8ca5a056ac1f7803c7fe5925a037cf31 100644 (file)
@@ -239,6 +239,8 @@ static int __init mv64x60_eth_device_setup(struct device_node *np, int id,
 
        memset(&pdata, 0, sizeof(pdata));
 
+       pdata.shared = shared_pdev;
+
        prop = of_get_property(np, "reg", NULL);
        if (!prop)
                return -ENODEV;
index 1814adbd22363c13f79f8e2744f41cf9f14e1f5d..b4a54c52e8805cac1fb32af31d85d0168ff41bda 100644 (file)
@@ -1387,28 +1387,59 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port,
        resource_size_t size = res->end - res->start + 1;
        u64 sa;
 
-       /* Calculate window size */
-       sa = (0xffffffffffffffffull << ilog2(size));;
-       if (res->flags & IORESOURCE_PREFETCH)
-               sa |= 0x8;
+       if (port->endpoint) {
+               resource_size_t ep_addr = 0;
+               resource_size_t ep_size = 32 << 20;
+
+               /* Currently we map a fixed 64MByte window to PLB address
+                * 0 (SDRAM). This should probably be configurable via a dts
+                * property.
+                */
+
+               /* Calculate window size */
+               sa = (0xffffffffffffffffull << ilog2(ep_size));;
+
+               /* Setup BAR0 */
+               out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
+               out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa) |
+                        PCI_BASE_ADDRESS_MEM_TYPE_64);
 
-       out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
-       out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
+               /* Disable BAR1 & BAR2 */
+               out_le32(mbase + PECFG_BAR1MPA, 0);
+               out_le32(mbase + PECFG_BAR2HMPA, 0);
+               out_le32(mbase + PECFG_BAR2LMPA, 0);
 
-       /* The setup of the split looks weird to me ... let's see if it works */
-       out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
-       out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
-       out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
-       out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
-       out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
-       out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
+               out_le32(mbase + PECFG_PIM01SAH, RES_TO_U32_HIGH(sa));
+               out_le32(mbase + PECFG_PIM01SAL, RES_TO_U32_LOW(sa));
+
+               out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(ep_addr));
+               out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(ep_addr));
+       } else {
+               /* Calculate window size */
+               sa = (0xffffffffffffffffull << ilog2(size));;
+               if (res->flags & IORESOURCE_PREFETCH)
+                       sa |= 0x8;
+
+               out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));
+               out_le32(mbase + PECFG_BAR0LMPA, RES_TO_U32_LOW(sa));
+
+               /* The setup of the split looks weird to me ... let's see
+                * if it works
+                */
+               out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
+               out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
+               out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
+               out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
+               out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
+               out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
+
+               out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
+               out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
+       }
 
        /* Enable inbound mapping */
        out_le32(mbase + PECFG_PIMEN, 0x1);
 
-       out_le32(mbase + PCI_BASE_ADDRESS_0, RES_TO_U32_LOW(res->start));
-       out_le32(mbase + PCI_BASE_ADDRESS_1, RES_TO_U32_HIGH(res->start));
-
        /* Enable I/O, Mem, and Busmaster cycles */
        out_le16(mbase + PCI_COMMAND,
                 in_le16(mbase + PCI_COMMAND) |
@@ -1422,13 +1453,8 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
        const int *bus_range;
        int primary = 0, busses;
        void __iomem *mbase = NULL, *cfg_data = NULL;
-
-       /* XXX FIXME: Handle endpoint mode properly */
-       if (port->endpoint) {
-               printk(KERN_WARNING "PCIE%d: Port in endpoint mode !\n",
-                      port->index);
-               return;
-       }
+       const u32 *pval;
+       u32 val;
 
        /* Check if primary bridge */
        if (of_get_property(port->node, "primary", NULL))
@@ -1462,21 +1488,30 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
                hose->last_busno = hose->first_busno + busses;
        }
 
-       /* We map the external config space in cfg_data and the host config
-        * space in cfg_addr. External space is 1M per bus, internal space
-        * is 4K
+       if (!port->endpoint) {
+               /* Only map the external config space in cfg_data for
+                * PCIe root-complexes. External space is 1M per bus
+                */
+               cfg_data = ioremap(port->cfg_space.start +
+                                  (hose->first_busno + 1) * 0x100000,
+                                  busses * 0x100000);
+               if (cfg_data == NULL) {
+                       printk(KERN_ERR "%s: Can't map external config space !",
+                              port->node->full_name);
+                       goto fail;
+               }
+               hose->cfg_data = cfg_data;
+       }
+
+       /* Always map the host config space in cfg_addr.
+        * Internal space is 4K
         */
-       cfg_data = ioremap(port->cfg_space.start +
-                                (hose->first_busno + 1) * 0x100000,
-                                busses * 0x100000);
        mbase = ioremap(port->cfg_space.start + 0x10000000, 0x1000);
-       if (cfg_data == NULL || mbase == NULL) {
-               printk(KERN_ERR "%s: Can't map config space !",
+       if (mbase == NULL) {
+               printk(KERN_ERR "%s: Can't map internal config space !",
                       port->node->full_name);
                goto fail;
        }
-
-       hose->cfg_data = cfg_data;
        hose->cfg_addr = mbase;
 
        pr_debug("PCIE %s, bus %d..%d\n", port->node->full_name,
@@ -1489,12 +1524,14 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
        port->hose = hose;
        mbase = (void __iomem *)hose->cfg_addr;
 
-       /*
-        * Set bus numbers on our root port
-        */
-       out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
-       out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
-       out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
+       if (!port->endpoint) {
+               /*
+                * Set bus numbers on our root port
+                */
+               out_8(mbase + PCI_PRIMARY_BUS, hose->first_busno);
+               out_8(mbase + PCI_SECONDARY_BUS, hose->first_busno + 1);
+               out_8(mbase + PCI_SUBORDINATE_BUS, hose->last_busno);
+       }
 
        /*
         * OMRs are already reset, also disable PIMs
@@ -1515,17 +1552,49 @@ static void __init ppc4xx_pciex_port_setup_hose(struct ppc4xx_pciex_port *port)
        ppc4xx_configure_pciex_PIMs(port, hose, mbase, &dma_window);
 
        /* The root complex doesn't show up if we don't set some vendor
-        * and device IDs into it. Those are the same bogus one that the
-        * initial code in arch/ppc add. We might want to change that.
+        * and device IDs into it. The defaults below are the same bogus
+        * one that the initial code in arch/ppc had. This can be
+        * overwritten by setting the "vendor-id/device-id" properties
+        * in the pciex node.
         */
-       out_le16(mbase + 0x200, 0xaaa0 + port->index);
-       out_le16(mbase + 0x202, 0xbed0 + port->index);
 
-       /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
-       out_le32(mbase + 0x208, 0x06040001);
+       /* Get the (optional) vendor-/device-id from the device-tree */
+       pval = of_get_property(port->node, "vendor-id", NULL);
+       if (pval) {
+               val = *pval;
+       } else {
+               if (!port->endpoint)
+                       val = 0xaaa0 + port->index;
+               else
+                       val = 0xeee0 + port->index;
+       }
+       out_le16(mbase + 0x200, val);
+
+       pval = of_get_property(port->node, "device-id", NULL);
+       if (pval) {
+               val = *pval;
+       } else {
+               if (!port->endpoint)
+                       val = 0xbed0 + port->index;
+               else
+                       val = 0xfed0 + port->index;
+       }
+       out_le16(mbase + 0x202, val);
+
+       if (!port->endpoint) {
+               /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
+               out_le32(mbase + 0x208, 0x06040001);
+
+               printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
+                      port->index);
+       } else {
+               /* Set Class Code to Processor/PPC */
+               out_le32(mbase + 0x208, 0x0b200001);
+
+               printk(KERN_INFO "PCIE%d: successfully set as endpoint\n",
+                      port->index);
+       }
 
-       printk(KERN_INFO "PCIE%d: successfully set as root-complex\n",
-              port->index);
        return;
  fail:
        if (hose)
@@ -1542,6 +1611,7 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
        const u32 *pval;
        int portno;
        unsigned int dcrs;
+       const char *val;
 
        /* First, proceed to core initialization as we assume there's
         * only one PCIe core in the system
@@ -1573,8 +1643,20 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
        }
        port->sdr_base = *pval;
 
-       /* XXX Currently, we only support root complex mode */
-       port->endpoint = 0;
+       /* Check if device_type property is set to "pci" or "pci-endpoint".
+        * Resulting from this setup this PCIe port will be configured
+        * as root-complex or as endpoint.
+        */
+       val = of_get_property(port->node, "device_type", NULL);
+       if (!strcmp(val, "pci-endpoint")) {
+               port->endpoint = 1;
+       } else if (!strcmp(val, "pci")) {
+               port->endpoint = 0;
+       } else {
+               printk(KERN_ERR "PCIE: missing or incorrect device_type for %s\n",
+                      np->full_name);
+               return;
+       }
 
        /* Fetch config space registers address */
        if (of_address_to_resource(np, 0, &port->cfg_space)) {
index 52c74780f403c420c47bbcf13640173b6992852e..1702de9395eeee96b02d686e20550dbc98b8d63d 100644 (file)
@@ -2842,9 +2842,11 @@ static void dump_spu_fields(struct spu *spu)
        DUMP_FIELD(spu, "0x%lx", ls_size);
        DUMP_FIELD(spu, "0x%x", node);
        DUMP_FIELD(spu, "0x%lx", flags);
-       DUMP_FIELD(spu, "0x%lx", dar);
-       DUMP_FIELD(spu, "0x%lx", dsisr);
        DUMP_FIELD(spu, "%d", class_0_pending);
+       DUMP_FIELD(spu, "0x%lx", class_0_dar);
+       DUMP_FIELD(spu, "0x%lx", class_0_dsisr);
+       DUMP_FIELD(spu, "0x%lx", class_1_dar);
+       DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
        DUMP_FIELD(spu, "0x%lx", irqs[0]);
        DUMP_FIELD(spu, "0x%lx", irqs[1]);
        DUMP_FIELD(spu, "0x%lx", irqs[2]);
index 90fe904d36141623c5f81f922647b4ac96af171a..418f3053de529274fb996fc61c731a8ee2efa1a2 100644 (file)
@@ -341,6 +341,7 @@ static struct resource mv64x60_eth0_resources[] = {
 };
 
 static struct mv643xx_eth_platform_data eth0_pd = {
+       .shared         = &mv64x60_eth_shared_device;
        .port_number    = 0,
 };
 
@@ -366,6 +367,7 @@ static struct resource mv64x60_eth1_resources[] = {
 };
 
 static struct mv643xx_eth_platform_data eth1_pd = {
+       .shared         = &mv64x60_eth_shared_device;
        .port_number    = 1,
 };
 
@@ -391,6 +393,7 @@ static struct resource mv64x60_eth2_resources[] = {
 };
 
 static struct mv643xx_eth_platform_data eth2_pd = {
+       .shared         = &mv64x60_eth_shared_device;
        .port_number    = 2,
 };
 
index 29a7940f284f62fa1f9e27508bc7d55f9b50aca4..1d035082e78eb15fc73f8f3b7b939af19eaa23ba 100644 (file)
@@ -430,6 +430,13 @@ config CMM_IUCV
          Select this option to enable the special message interface to
          the cooperative memory management.
 
+config PAGE_STATES
+       bool "Unused page notification"
+       help
+         This enables the notification of unused pages to the
+         hypervisor. The ESSA instruction is used to do the states
+         changes between a page that has content and the unused state.
+
 config VIRT_TIMER
        bool "Virtual CPU timer support"
        help
index 743d54f0b8dbb01e93c17f51be274bece0005f48..d003a6e16afb807df2ecbbcc6066de49f0784c33 100644 (file)
@@ -121,7 +121,7 @@ sys32_ptrace_wrapper:
        lgfr    %r3,%r3                 # long
        llgtr   %r4,%r4                 # long
        llgfr   %r5,%r5                 # long
-       jg      sys_ptrace              # branch to system call
+       jg      compat_sys_ptrace       # branch to system call
 
        .globl  sys32_alarm_wrapper
 sys32_alarm_wrapper:
index bdbb3bcd78a5d7088ed4cfd39f7fb444e2f15814..708cf9cf9a355e175d5b1cf4fbdc2b96732e7084 100644 (file)
@@ -279,8 +279,6 @@ sysc_do_restart:
        st      %r2,SP_R2(%r15)   # store return value (change R2 on stack)
 
 sysc_return:
-       tm      SP_PSW+1(%r15),0x01     # returning to user ?
-       bno     BASED(sysc_restore)
        tm      __TI_flags+3(%r9),_TIF_WORK_SVC
        bnz     BASED(sysc_work)  # there is work to do (signals etc.)
 sysc_restore:
@@ -312,6 +310,8 @@ sysc_work_loop:
 # One of the work bits is on. Find out which one.
 #
 sysc_work:
+       tm      SP_PSW+1(%r15),0x01     # returning to user ?
+       bno     BASED(sysc_restore)
        tm      __TI_flags+3(%r9),_TIF_MCCK_PENDING
        bo      BASED(sysc_mcck_pending)
        tm      __TI_flags+3(%r9),_TIF_NEED_RESCHED
@@ -602,12 +602,6 @@ io_no_vtime:
        la      %r2,SP_PTREGS(%r15)     # address of register-save area
        basr    %r14,%r1                # branch to standard irq handler
 io_return:
-       tm      SP_PSW+1(%r15),0x01     # returning to user ?
-#ifdef CONFIG_PREEMPT
-       bno     BASED(io_preempt)       # no -> check for preemptive scheduling
-#else
-       bno     BASED(io_restore)       # no-> skip resched & signal
-#endif
        tm      __TI_flags+3(%r9),_TIF_WORK_INT
        bnz     BASED(io_work)          # there is work to do (signals etc.)
 io_restore:
@@ -629,10 +623,18 @@ io_restore_trace_psw:
        .long   0, io_restore_trace + 0x80000000
 #endif
 
-#ifdef CONFIG_PREEMPT
-io_preempt:
+#
+# switch to kernel stack, then check the TIF bits
+#
+io_work:
+       tm      SP_PSW+1(%r15),0x01     # returning to user ?
+#ifndef CONFIG_PREEMPT
+       bno     BASED(io_restore)       # no-> skip resched & signal
+#else
+       bnz     BASED(io_work_user)     # no -> check for preemptive scheduling
+       # check for preemptive scheduling
        icm     %r0,15,__TI_precount(%r9)
-       bnz     BASED(io_restore)
+       bnz     BASED(io_restore)       # preemption disabled
        l       %r1,SP_R15(%r15)
        s       %r1,BASED(.Lc_spsize)
        mvc     SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
@@ -646,10 +648,7 @@ io_resume_loop:
        br      %r1                     # call schedule
 #endif
 
-#
-# switch to kernel stack, then check the TIF bits
-#
-io_work:
+io_work_user:
        l       %r1,__LC_KERNEL_STACK
        s       %r1,BASED(.Lc_spsize)
        mvc     SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
index 5a4a7bcd2bbad8e92e95eb529fb11559977c0dd9..fee10177dbfcf67a175c7d82f1839886ef509ff4 100644 (file)
@@ -271,8 +271,6 @@ sysc_noemu:
        stg     %r2,SP_R2(%r15) # store return value (change R2 on stack)
 
 sysc_return:
-       tm      SP_PSW+1(%r15),0x01     # returning to user ?
-       jno     sysc_restore
        tm      __TI_flags+7(%r9),_TIF_WORK_SVC
        jnz     sysc_work       # there is work to do (signals etc.)
 sysc_restore:
@@ -304,6 +302,8 @@ sysc_work_loop:
 # One of the work bits is on. Find out which one.
 #
 sysc_work:
+       tm      SP_PSW+1(%r15),0x01     # returning to user ?
+       jno     sysc_restore
        tm      __TI_flags+7(%r9),_TIF_MCCK_PENDING
        jo      sysc_mcck_pending
        tm      __TI_flags+7(%r9),_TIF_NEED_RESCHED
@@ -585,12 +585,6 @@ io_no_vtime:
        la      %r2,SP_PTREGS(%r15)     # address of register-save area
        brasl   %r14,do_IRQ             # call standard irq handler
 io_return:
-       tm      SP_PSW+1(%r15),0x01     # returning to user ?
-#ifdef CONFIG_PREEMPT
-       jno     io_preempt              # no -> check for preemptive scheduling
-#else
-       jno     io_restore              # no-> skip resched & signal
-#endif
        tm      __TI_flags+7(%r9),_TIF_WORK_INT
        jnz     io_work                 # there is work to do (signals etc.)
 io_restore:
@@ -612,10 +606,41 @@ io_restore_trace_psw:
        .quad   0, io_restore_trace
 #endif
 
-#ifdef CONFIG_PREEMPT
-io_preempt:
+#
+# There is work todo, we need to check if we return to userspace, then
+# check, if we are in SIE, if yes leave it
+#
+io_work:
+       tm      SP_PSW+1(%r15),0x01     # returning to user ?
+#ifndef CONFIG_PREEMPT
+#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
+       jnz     io_work_user            # yes -> no need to check for SIE
+       la      %r1, BASED(sie_opcode)  # we return to kernel here
+       lg      %r2, SP_PSW+8(%r15)
+       clc     0(2,%r1), 0(%r2)        # is current instruction = SIE?
+       jne     io_restore              # no-> return to kernel
+       lg      %r1, SP_PSW+8(%r15)     # yes-> add 4 bytes to leave SIE
+       aghi    %r1, 4
+       stg     %r1, SP_PSW+8(%r15)
+       j       io_restore              # return to kernel
+#else
+       jno     io_restore              # no-> skip resched & signal
+#endif
+#else
+       jnz     io_work_user            # yes -> do resched & signal
+#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
+       la      %r1, BASED(sie_opcode)
+       lg      %r2, SP_PSW+8(%r15)
+       clc     0(2,%r1), 0(%r2)        # is current instruction = SIE?
+       jne     0f                      # no -> leave PSW alone
+       lg      %r1, SP_PSW+8(%r15)     # yes-> add 4 bytes to leave SIE
+       aghi    %r1, 4
+       stg     %r1, SP_PSW+8(%r15)
+0:
+#endif
+       # check for preemptive scheduling
        icm     %r0,15,__TI_precount(%r9)
-       jnz     io_restore
+       jnz     io_restore              # preemption is disabled
        # switch to kernel stack
        lg      %r1,SP_R15(%r15)
        aghi    %r1,-SP_SIZE
@@ -629,10 +654,7 @@ io_resume_loop:
        jg      preempt_schedule_irq
 #endif
 
-#
-# switch to kernel stack, then check TIF bits
-#
-io_work:
+io_work_user:
        lg      %r1,__LC_KERNEL_STACK
        aghi    %r1,-SP_SIZE
        mvc     SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
@@ -653,6 +675,11 @@ io_work_loop:
        j       io_restore
 io_work_done:
 
+#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
+sie_opcode:
+       .long 0xb2140000
+#endif
+
 #
 # _TIF_MCCK_PENDING is set, call handler
 #
index 7f4270163744b1ea5af37b6a68ca69e2cef89437..35827b9bd4d1827f102f79f3e999bbb69c52f5ab 100644 (file)
@@ -292,8 +292,7 @@ poke_user(struct task_struct *child, addr_t addr, addr_t data)
        return 0;
 }
 
-static int
-do_ptrace_normal(struct task_struct *child, long request, long addr, long data)
+long arch_ptrace(struct task_struct *child, long request, long addr, long data)
 {
        ptrace_area parea; 
        int copied, ret;
@@ -529,35 +528,19 @@ poke_user_emu31(struct task_struct *child, addr_t addr, addr_t data)
        return 0;
 }
 
-static int
-do_ptrace_emu31(struct task_struct *child, long request, long addr, long data)
+long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
+                       compat_ulong_t caddr, compat_ulong_t cdata)
 {
-       unsigned int tmp;  /* 4 bytes !! */
+       unsigned long addr = caddr;
+       unsigned long data = cdata;
        ptrace_area_emu31 parea; 
        int copied, ret;
 
        switch (request) {
-       case PTRACE_PEEKTEXT:
-       case PTRACE_PEEKDATA:
-               /* read word at location addr. */
-               copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
-               if (copied != sizeof(tmp))
-                       return -EIO;
-               return put_user(tmp, (unsigned int __force __user *) data);
-
        case PTRACE_PEEKUSR:
                /* read the word at location addr in the USER area. */
                return peek_user_emu31(child, addr, data);
 
-       case PTRACE_POKETEXT:
-       case PTRACE_POKEDATA:
-               /* write the word at location addr. */
-               tmp = data;
-               copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 1);
-               if (copied != sizeof(tmp))
-                       return -EIO;
-               return 0;
-
        case PTRACE_POKEUSR:
                /* write the word at location addr in the USER area */
                return poke_user_emu31(child, addr, data);
@@ -587,82 +570,11 @@ do_ptrace_emu31(struct task_struct *child, long request, long addr, long data)
                        copied += sizeof(unsigned int);
                }
                return 0;
-       case PTRACE_GETEVENTMSG:
-               return put_user((__u32) child->ptrace_message,
-                               (unsigned int __force __user *) data);
-       case PTRACE_GETSIGINFO:
-               if (child->last_siginfo == NULL)
-                       return -EINVAL;
-               return copy_siginfo_to_user32((compat_siginfo_t
-                                              __force __user *) data,
-                                             child->last_siginfo);
-       case PTRACE_SETSIGINFO:
-               if (child->last_siginfo == NULL)
-                       return -EINVAL;
-               return copy_siginfo_from_user32(child->last_siginfo,
-                                               (compat_siginfo_t
-                                                __force __user *) data);
        }
-       return ptrace_request(child, request, addr, data);
+       return compat_ptrace_request(child, request, addr, data);
 }
 #endif
 
-long arch_ptrace(struct task_struct *child, long request, long addr, long data)
-{
-       switch (request) {
-       case PTRACE_SYSCALL:
-               /* continue and stop at next (return from) syscall */
-       case PTRACE_CONT:
-               /* restart after signal. */
-               if (!valid_signal(data))
-                       return -EIO;
-               if (request == PTRACE_SYSCALL)
-                       set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-               else
-                       clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-               child->exit_code = data;
-               /* make sure the single step bit is not set. */
-               user_disable_single_step(child);
-               wake_up_process(child);
-               return 0;
-
-       case PTRACE_KILL:
-               /*
-                * make the child exit.  Best I can do is send it a sigkill. 
-                * perhaps it should be put in the status that it wants to 
-                * exit.
-                */
-               if (child->exit_state == EXIT_ZOMBIE) /* already dead */
-                       return 0;
-               child->exit_code = SIGKILL;
-               /* make sure the single step bit is not set. */
-               user_disable_single_step(child);
-               wake_up_process(child);
-               return 0;
-
-       case PTRACE_SINGLESTEP:
-               /* set the trap flag. */
-               if (!valid_signal(data))
-                       return -EIO;
-               clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-               child->exit_code = data;
-               user_enable_single_step(child);
-               /* give it a chance to run. */
-               wake_up_process(child);
-               return 0;
-
-       /* Do requests that differ for 31/64 bit */
-       default:
-#ifdef CONFIG_COMPAT
-               if (test_thread_flag(TIF_31BIT))
-                       return do_ptrace_emu31(child, request, addr, data);
-#endif
-               return do_ptrace_normal(child, request, addr, data);
-       }
-       /* Not reached.  */
-       return -EIO;
-}
-
 asmlinkage void
 syscall_trace(struct pt_regs *regs, int entryexit)
 {
index 1761b74d639be88e3fbc870cda7a4942c7b50ac9..e051cad1f1e09d9f880b91f0d23b7738e10a5a57 100644 (file)
@@ -22,7 +22,6 @@ config KVM
        select PREEMPT_NOTIFIERS
        select ANON_INODES
        select S390_SWITCH_AMODE
-       select PREEMPT
        ---help---
          Support hosting paravirtualized guest machines using the SIE
          virtualization capability on the mainframe. This should work
index 349581a2610344f23c1af6873dc57d6c23761b47..47a0b642174c1ef807ca5d16774f9d10c6584197 100644 (file)
@@ -105,6 +105,9 @@ static intercept_handler_t instruction_handlers[256] = {
 static int handle_noop(struct kvm_vcpu *vcpu)
 {
        switch (vcpu->arch.sie_block->icptcode) {
+       case 0x0:
+               vcpu->stat.exit_null++;
+               break;
        case 0x10:
                vcpu->stat.exit_external_request++;
                break;
index 98d1e73e01f11f31cdac4d693f54c1bfddedc871..0ac36a649eba9a2823189d3bb31dcb68b0ec6055 100644 (file)
@@ -31,6 +31,7 @@
 
 struct kvm_stats_debugfs_item debugfs_entries[] = {
        { "userspace_handled", VCPU_STAT(exit_userspace) },
+       { "exit_null", VCPU_STAT(exit_null) },
        { "exit_validity", VCPU_STAT(exit_validity) },
        { "exit_stop_request", VCPU_STAT(exit_stop_request) },
        { "exit_external_request", VCPU_STAT(exit_external_request) },
@@ -221,10 +222,6 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
        vcpu->arch.guest_fpregs.fpc &= FPC_VALID_MASK;
        restore_fp_regs(&vcpu->arch.guest_fpregs);
        restore_access_regs(vcpu->arch.guest_acrs);
-
-       if (signal_pending(current))
-               atomic_set_mask(CPUSTAT_STOP_INT,
-                       &vcpu->arch.sie_block->cpuflags);
 }
 
 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
index fb988a48a754ff541d161ba341a108e10a2a15e1..2a745813454410cb35ff525e837efc9f29c0dd95 100644 (file)
@@ -5,3 +5,4 @@
 obj-y   := init.o fault.o extmem.o mmap.o vmem.o pgtable.o
 obj-$(CONFIG_CMM) += cmm.o
 obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
+obj-$(CONFIG_PAGE_STATES) += page-states.o
index fa31de6ae97aef1577b99d0f9afb04cf257334ce..29f3a63806b976ee8847dd3efd84292697ba53db 100644 (file)
@@ -126,6 +126,9 @@ void __init mem_init(void)
         /* clear the zero-page */
         memset(empty_zero_page, 0, PAGE_SIZE);
 
+       /* Setup guest page hinting */
+       cmma_init();
+
        /* this will put all low memory onto the freelists */
        totalram_pages += free_all_bootmem();
 
diff --git a/arch/s390/mm/page-states.c b/arch/s390/mm/page-states.c
new file mode 100644 (file)
index 0000000..fc0ad73
--- /dev/null
@@ -0,0 +1,79 @@
+/*
+ * arch/s390/mm/page-states.c
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Guest page hinting for unused pages.
+ *
+ * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/init.h>
+
+#define ESSA_SET_STABLE                1
+#define ESSA_SET_UNUSED                2
+
+static int cmma_flag;
+
+static int __init cmma(char *str)
+{
+       char *parm;
+       parm = strstrip(str);
+       if (strcmp(parm, "yes") == 0 || strcmp(parm, "on") == 0) {
+               cmma_flag = 1;
+               return 1;
+       }
+       cmma_flag = 0;
+       if (strcmp(parm, "no") == 0 || strcmp(parm, "off") == 0)
+               return 1;
+       return 0;
+}
+
+__setup("cmma=", cmma);
+
+void __init cmma_init(void)
+{
+       register unsigned long tmp asm("0") = 0;
+       register int rc asm("1") = -EOPNOTSUPP;
+
+       if (!cmma_flag)
+               return;
+       asm volatile(
+               "       .insn rrf,0xb9ab0000,%1,%1,0,0\n"
+               "0:     la      %0,0\n"
+               "1:\n"
+               EX_TABLE(0b,1b)
+               : "+&d" (rc), "+&d" (tmp));
+       if (rc)
+               cmma_flag = 0;
+}
+
+void arch_free_page(struct page *page, int order)
+{
+       int i, rc;
+
+       if (!cmma_flag)
+               return;
+       for (i = 0; i < (1 << order); i++)
+               asm volatile(".insn rrf,0xb9ab0000,%0,%1,%2,0"
+                            : "=&d" (rc)
+                            : "a" ((page_to_pfn(page) + i) << PAGE_SHIFT),
+                              "i" (ESSA_SET_UNUSED));
+}
+
+void arch_alloc_page(struct page *page, int order)
+{
+       int i, rc;
+
+       if (!cmma_flag)
+               return;
+       for (i = 0; i < (1 << order); i++)
+               asm volatile(".insn rrf,0xb9ab0000,%0,%1,%2,0"
+                            : "=&d" (rc)
+                            : "a" ((page_to_pfn(page) + i) << PAGE_SHIFT),
+                              "i" (ESSA_SET_STABLE));
+}
index 6a679c3e15e817d14adcee8d6771c9e3c89e5b30..8a68160079a90cb5c77411f410960d59899abd5a 100644 (file)
@@ -448,14 +448,6 @@ config SH_DREAMCAST
          Select Dreamcast if configuring for a SEGA Dreamcast.
          More information at <http://www.linux-sh.org>
 
-config SH_MPC1211
-       bool "Interface MPC1211"
-       depends on CPU_SUBTYPE_SH7751 && BROKEN
-       help
-         CTP/PCI-SH02 is a CPU module computer that is produced
-         by Interface Corporation.
-         More information at <http://www.interface.co.jp>
-
 config SH_SH03
        bool "Interface CTP/PCI-SH03"
        depends on CPU_SUBTYPE_SH7751
@@ -657,8 +649,7 @@ source "arch/sh/drivers/Kconfig"
 endmenu
 
 config ISA_DMA_API
-       def_bool y
-       depends on SH_MPC1211
+       bool
 
 menu "Kernel features"
 
@@ -666,7 +657,7 @@ source kernel/Kconfig.hz
 
 config KEXEC
        bool "kexec system call (EXPERIMENTAL)"
-       depends on EXPERIMENTAL
+       depends on SUPERH32 && EXPERIMENTAL
        help
          kexec is a system call that implements the ability to shutdown your
          current kernel, and to start another kernel.  It is like a reboot
@@ -683,7 +674,7 @@ config KEXEC
 
 config CRASH_DUMP
        bool "kernel crash dumps (EXPERIMENTAL)"
-       depends on EXPERIMENTAL
+       depends on SUPERH32 && EXPERIMENTAL
        help
          Generate crash dump after being started by kexec.
          This should be normally only set in special crash dump kernels
@@ -763,7 +754,7 @@ menu "Boot options"
 
 config ZERO_PAGE_OFFSET
        hex "Zero page offset"
-       default "0x00004000" if SH_MPC1211 || SH_SH03
+       default "0x00004000" if SH_SH03
        default "0x00010000" if PAGE_SIZE_64KB
        default "0x00002000" if PAGE_SIZE_8KB
        default "0x00001000"
index d9d28f9dd0db5fbd990a1262d07898017e73cc04..0d2ef1e9a6fdd45cf483f61b33ccc96d2e71ce04 100644 (file)
@@ -7,6 +7,7 @@ source "lib/Kconfig.debug"
 
 config SH_STANDARD_BIOS
        bool "Use LinuxSH standard BIOS"
+       depends on SUPERH32
        help
          Say Y here if your target has the gdb-sh-stub
          package from www.m17n.org (or any conforming standard LinuxSH BIOS)
index bb06f83e6239c648e138a1d820f0d3e6dab7fa51..8050b03d51fca42823063b2c31cf12984572728b 100644 (file)
@@ -110,7 +110,6 @@ machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE)   += se/7343
 machdir-$(CONFIG_SH_7721_SOLUTION_ENGINE)      += se/7721
 machdir-$(CONFIG_SH_HP6XX)                     += hp6xx
 machdir-$(CONFIG_SH_DREAMCAST)                 += dreamcast
-machdir-$(CONFIG_SH_MPC1211)                   += mpc1211
 machdir-$(CONFIG_SH_SH03)                      += sh03
 machdir-$(CONFIG_SH_SECUREEDGE5410)            += snapgear
 machdir-$(CONFIG_SH_RTS7751R2D)                        += renesas/rts7751r2d
diff --git a/arch/sh/boards/mpc1211/Makefile b/arch/sh/boards/mpc1211/Makefile
deleted file mode 100644 (file)
index 8cd31b5..0000000
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for the Interface (CTP/PCI/MPC-SH02) specific parts of the kernel
-#
-
-obj-y   := setup.o rtc.o
-
-obj-$(CONFIG_PCI) += pci.o
-
diff --git a/arch/sh/boards/mpc1211/pci.c b/arch/sh/boards/mpc1211/pci.c
deleted file mode 100644 (file)
index 23849f7..0000000
+++ /dev/null
@@ -1,295 +0,0 @@
-/*
- *     Low-Level PCI Support for the MPC-1211(CTP/PCI/MPC-SH02)
- *
- *  (c) 2002-2003 Saito.K & Jeanne
- *
- *  Dustin McIntire (dustin@sensoria.com)
- *     Derived from arch/i386/kernel/pci-*.c which bore the message:
- *     (c) 1999--2000 Martin Mares <mj@ucw.cz>
- *     
- *  May be copied or modified under the terms of the GNU General Public
- *  License.  See linux/COPYING for more information.
- *
- */
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/errno.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-
-#include <asm/machvec.h>
-#include <asm/io.h>
-#include <asm/mpc1211/pci.h>
-
-static struct resource mpcpci_io_resource = {
-       "MPCPCI IO",
-       0x00000000,
-       0xffffffff,
-       IORESOURCE_IO
-};
-
-static struct resource mpcpci_mem_resource = {
-       "MPCPCI mem",
-       0x00000000,
-       0xffffffff,
-       IORESOURCE_MEM
-};
-
-static struct pci_ops pci_direct_conf1;
-struct pci_channel board_pci_channels[] = {
-       {&pci_direct_conf1, &mpcpci_io_resource, &mpcpci_mem_resource, 0, 256},
-       {NULL, NULL, NULL, 0, 0},
-};
-
-/*
- * Direct access to PCI hardware...
- */
-
-
-#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
-
-/*
- * Functions for accessing PCI configuration space with type 1 accesses
- */
-static int pci_conf1_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
-{
-       u32 word;
-       unsigned long flags;
-
-       /* 
-        * PCIPDR may only be accessed as 32 bit words, 
-        * so we must do byte alignment by hand 
-        */
-       local_irq_save(flags);
-       writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
-       word = readl(PCIPDR);
-       local_irq_restore(flags);
-
-       switch (size) {
-       case 1:
-               switch (where & 0x3) {
-               case 3:
-                       *value = (u8)(word >> 24);
-                       break;
-               case 2:
-                       *value = (u8)(word >> 16);
-                       break;
-               case 1:
-                       *value = (u8)(word >> 8);
-                       break;
-               default:
-                       *value = (u8)word;
-                       break;
-               }
-               break;
-       case 2:
-               switch (where & 0x3) {
-               case 3:
-                       *value = (u16)(word >> 24);
-                       local_irq_save(flags);
-                       writel(CONFIG_CMD(bus,devfn,(where+1)), PCIPAR);
-                       word = readl(PCIPDR);
-                       local_irq_restore(flags);
-                       *value |= ((word & 0xff) << 8);
-                       break;
-               case 2:
-                       *value = (u16)(word >> 16);
-                       break;
-               case 1:
-                       *value = (u16)(word >> 8);
-                       break;
-               default:
-                       *value = (u16)word;
-                       break;
-               }
-               break;
-       case 4:
-               *value = word;
-               break;
-       }
-       PCIDBG(4,"pci_conf1_read@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),*value); 
-       return PCIBIOS_SUCCESSFUL;    
-}
-
-/* 
- * Since MPC-1211 only does 32bit access we'll have to do a read,mask,write operation.  
- * We'll allow an odd byte offset, though it should be illegal.
- */ 
-static int pci_conf1_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
-{
-       u32 word,mask = 0;
-       unsigned long flags;
-       u32 shift = (where & 3) * 8;
-
-       if(size == 1) {
-               mask = ((1 << 8) - 1) << shift;  // create the byte mask
-       } else if(size == 2){
-               if(shift == 24)
-                       return PCIBIOS_BAD_REGISTER_NUMBER;           
-               mask = ((1 << 16) - 1) << shift;  // create the word mask
-       }
-       local_irq_save(flags);
-       writel(CONFIG_CMD(bus,devfn,where), PCIPAR);
-       if(size == 4){
-               writel(value, PCIPDR);
-               local_irq_restore(flags);
-               PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),value);
-               return PCIBIOS_SUCCESSFUL;
-       }
-       word = readl(PCIPDR);
-       word &= ~mask;
-       word |= ((value << shift) & mask);
-       writel(word, PCIPDR);
-       local_irq_restore(flags);
-       PCIDBG(4,"pci_conf1_write@0x%08x=0x%x\n", CONFIG_CMD(bus,devfn,where),word);
-       return PCIBIOS_SUCCESSFUL;
-}
-
-#undef CONFIG_CMD
-
-static struct pci_ops pci_direct_conf1 = {
-       .read =         pci_conf1_read,
-       .write =        pci_conf1_write,
-};
-
-static void __devinit quirk_ali_ide_ports(struct pci_dev *dev)
-{
-        dev->resource[0].start = 0x1f0;
-       dev->resource[0].end   = 0x1f7;
-       dev->resource[0].flags = IORESOURCE_IO;
-        dev->resource[1].start = 0x3f6;
-       dev->resource[1].end   = 0x3f6;
-       dev->resource[1].flags = IORESOURCE_IO;
-        dev->resource[2].start = 0x170;
-       dev->resource[2].end   = 0x177;
-       dev->resource[2].flags = IORESOURCE_IO;
-        dev->resource[3].start = 0x376;
-       dev->resource[3].end   = 0x376;
-       dev->resource[3].flags = IORESOURCE_IO;
-        dev->resource[4].start = 0xf000;
-       dev->resource[4].end   = 0xf00f;
-       dev->resource[4].flags = IORESOURCE_IO;
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, quirk_ali_ide_ports);
-
-char * __devinit pcibios_setup(char *str)
-{
-       return str;
-}
-
-/*
- *  Called after each bus is probed, but before its children
- *  are examined.
- */
-
-void __devinit pcibios_fixup_bus(struct pci_bus *b)
-{
-       pci_read_bridge_bases(b);
-}
-
-/* 
- *     IRQ functions 
- */
-static inline u8 bridge_swizzle(u8 pin, u8 slot)
-{
-        return (((pin-1) + slot) % 4) + 1;
-}
-
-static inline u8 bridge_swizzle_pci_1(u8 pin, u8 slot)
-{
-        return (((pin-1) - slot) & 3) + 1;
-}
-
-static u8 __init mpc1211_swizzle(struct pci_dev *dev, u8 *pinp)
-{
-       unsigned long flags;
-        u8 pin = *pinp;
-       u32 word;
-
-       for ( ; dev->bus->self; dev = dev->bus->self) {
-               if (!pin)
-                       continue;
-
-               if (dev->bus->number == 1) {
-                       local_irq_save(flags);
-                       writel(0x80000000 | 0x2c, PCIPAR);
-                       word = readl(PCIPDR);
-                       local_irq_restore(flags);
-                       word >>= 16;
-
-                       if (word == 0x0001)
-                               pin = bridge_swizzle_pci_1(pin, PCI_SLOT(dev->devfn));
-                       else
-                               pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
-               } else
-                       pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
-       }
-
-       *pinp = pin;
-
-       return PCI_SLOT(dev->devfn);
-}
-
-static int __init map_mpc1211_irq(struct pci_dev *dev, u8 slot, u8 pin)
-{
-       int irq = -1;
-
-       /* now lookup the actual IRQ on a platform specific basis (pci-'platform'.c) */
-       if (dev->bus->number == 0) {
-               switch (slot) {
-               case 13:   irq =  9; break;   /* USB */
-               case 22:   irq = 10; break;   /* LAN */
-               default:   irq =  0; break;
-               }
-       } else {
-               switch (pin) {
-               case 0:   irq =  0; break;
-               case 1:   irq =  7; break;
-               case 2:   irq =  9; break;
-               case 3:   irq = 10; break;
-               case 4:   irq = 11; break;
-               }
-       }
-
-       if( irq < 0 ) {
-               PCIDBG(3, "PCI: Error mapping IRQ on device %s\n", pci_name(dev));
-               return irq;
-       }
-       
-       PCIDBG(2, "Setting IRQ for slot %s to %d\n", pci_name(dev), irq);
-
-       return irq;
-}
-
-void __init pcibios_fixup_irqs(void)
-{
-       pci_fixup_irqs(mpc1211_swizzle, map_mpc1211_irq);
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
-                           resource_size_t size, resource_size_t align)
-{
-       resource_size_t start = res->start;
-
-       if (res->flags & IORESOURCE_IO) {
-               if (start >= 0x10000UL) {
-                       if ((start & 0xffffUL) < 0x4000UL) {
-                               start = (start & 0xffff0000UL) + 0x4000UL;
-                       } else if ((start & 0xffffUL) >= 0xf000UL) {
-                               start = (start & 0xffff0000UL) + 0x10000UL;
-                       }
-                       res->start = start;
-               } else {
-                       if (start & 0x300) {
-                               start = (start + 0x3ff) & ~0x3ff;
-                               res->start = start;
-                       }
-               }
-       }
-}
-
diff --git a/arch/sh/boards/mpc1211/rtc.c b/arch/sh/boards/mpc1211/rtc.c
deleted file mode 100644 (file)
index 03b123a..0000000
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * linux/arch/sh/kernel/rtc-mpc1211.c -- MPC-1211 on-chip RTC support
- *
- *  Copyright (C) 2002  Saito.K & Jeanne
- *
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/time.h>
-#include <linux/bcd.h>
-#include <linux/mc146818rtc.h>
-
-unsigned long get_cmos_time(void)
-{
-       unsigned int year, mon, day, hour, min, sec;
-
-       spin_lock(&rtc_lock);
-
-       do {
-               sec = CMOS_READ(RTC_SECONDS);
-               min = CMOS_READ(RTC_MINUTES);
-               hour = CMOS_READ(RTC_HOURS);
-               day = CMOS_READ(RTC_DAY_OF_MONTH);
-               mon = CMOS_READ(RTC_MONTH);
-               year = CMOS_READ(RTC_YEAR);
-       } while (sec != CMOS_READ(RTC_SECONDS));
-
-       if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
-               BCD_TO_BIN(sec);
-               BCD_TO_BIN(min);
-               BCD_TO_BIN(hour);
-               BCD_TO_BIN(day);
-               BCD_TO_BIN(mon);
-               BCD_TO_BIN(year);
-       }
-
-       spin_unlock(&rtc_lock);
-
-       year += 1900;
-       if (year < 1970)
-               year += 100;
-
-       return mktime(year, mon, day, hour, min, sec);
-}
-
-void mpc1211_rtc_gettimeofday(struct timeval *tv)
-{
-
-       tv->tv_sec = get_cmos_time();
-       tv->tv_usec = 0;
-}
-
-/* arc/i386/kernel/time.c */
-/*
- * In order to set the CMOS clock precisely, set_rtc_mmss has to be
- * called 500 ms after the second nowtime has started, because when
- * nowtime is written into the registers of the CMOS clock, it will
- * jump to the next second precisely 500 ms later. Check the Motorola
- * MC146818A or Dallas DS12887 data sheet for details.
- *
- * BUG: This routine does not handle hour overflow properly; it just
- *      sets the minutes. Usually you'll only notice that after reboot!
- */
-static int set_rtc_mmss(unsigned long nowtime)
-{
-       int retval = 0;
-       int real_seconds, real_minutes, cmos_minutes;
-       unsigned char save_control, save_freq_select;
-
-       /* gets recalled with irq locally disabled */
-       spin_lock(&rtc_lock);
-       save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
-       CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
-
-       save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
-       CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
-
-       cmos_minutes = CMOS_READ(RTC_MINUTES);
-       if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
-               BCD_TO_BIN(cmos_minutes);
-
-       /*
-        * since we're only adjusting minutes and seconds,
-        * don't interfere with hour overflow. This avoids
-        * messing with unknown time zones but requires your
-        * RTC not to be off by more than 15 minutes
-        */
-       real_seconds = nowtime % 60;
-       real_minutes = nowtime / 60;
-       if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
-               real_minutes += 30;             /* correct for half hour time zone */
-       real_minutes %= 60;
-
-       if (abs(real_minutes - cmos_minutes) < 30) {
-               if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
-                       BIN_TO_BCD(real_seconds);
-                       BIN_TO_BCD(real_minutes);
-               }
-               CMOS_WRITE(real_seconds,RTC_SECONDS);
-               CMOS_WRITE(real_minutes,RTC_MINUTES);
-       } else {
-               printk(KERN_WARNING
-                      "set_rtc_mmss: can't update from %d to %d\n",
-                      cmos_minutes, real_minutes);
-               retval = -1;
-       }
-
-       /* The following flags have to be released exactly in this order,
-        * otherwise the DS12887 (popular MC146818A clone with integrated
-        * battery and quartz) will not reset the oscillator and will not
-        * update precisely 500 ms later. You won't find this mentioned in
-        * the Dallas Semiconductor data sheets, but who believes data
-        * sheets anyway ...                           -- Markus Kuhn
-        */
-       CMOS_WRITE(save_control, RTC_CONTROL);
-       CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
-       spin_unlock(&rtc_lock);
-
-       return retval;
-}
-
-int mpc1211_rtc_settimeofday(const struct timeval *tv)
-{
-       unsigned long nowtime = tv->tv_sec;
-
-       return set_rtc_mmss(nowtime);
-}
-
-void mpc1211_time_init(void)
-{
-       rtc_sh_get_time = mpc1211_rtc_gettimeofday;
-       rtc_sh_set_time = mpc1211_rtc_settimeofday;
-}
-
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
deleted file mode 100644 (file)
index fede363..0000000
+++ /dev/null
@@ -1,347 +0,0 @@
-/*
- * linux/arch/sh/boards/mpc1211/setup.c
- *
- * Copyright (C) 2002  Saito.K & Jeanne,  Fujii.Y
- *
- */
-
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/hdreg.h>
-#include <linux/ide.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <asm/io.h>
-#include <asm/machvec.h>
-#include <asm/mpc1211/mpc1211.h>
-#include <asm/mpc1211/pci.h>
-#include <asm/mpc1211/m1543c.h>
-
-/* ALI15X3 SMBus address offsets */
-#define SMBHSTSTS   (0 + 0x3100)
-#define SMBHSTCNT   (1 + 0x3100)
-#define SMBHSTSTART (2 + 0x3100)
-#define SMBHSTCMD   (7 + 0x3100)
-#define SMBHSTADD   (3 + 0x3100)
-#define SMBHSTDAT0  (4 + 0x3100)
-#define SMBHSTDAT1  (5 + 0x3100)
-#define SMBBLKDAT   (6 + 0x3100)
-
-/* Other settings */
-#define MAX_TIMEOUT 500                /* times 1/100 sec */
-
-/* ALI15X3 command constants */
-#define ALI15X3_ABORT      0x04
-#define ALI15X3_T_OUT      0x08
-#define ALI15X3_QUICK      0x00
-#define ALI15X3_BYTE       0x10
-#define ALI15X3_BYTE_DATA  0x20
-#define ALI15X3_WORD_DATA  0x30
-#define ALI15X3_BLOCK_DATA 0x40
-#define ALI15X3_BLOCK_CLR  0x80
-
-/* ALI15X3 status register bits */
-#define ALI15X3_STS_IDLE       0x04
-#define ALI15X3_STS_BUSY       0x08
-#define ALI15X3_STS_DONE       0x10
-#define ALI15X3_STS_DEV                0x20    /* device error */
-#define ALI15X3_STS_COLL       0x40    /* collision or no response */
-#define ALI15X3_STS_TERM       0x80    /* terminated by abort */
-#define ALI15X3_STS_ERR                0xE0    /* all the bad error bits */
-
-static void __init pci_write_config(unsigned long busNo,
-                                   unsigned long devNo,
-                                   unsigned long fncNo,
-                                   unsigned long cnfAdd,
-                                   unsigned long cnfData)
-{
-       ctrl_outl((0x80000000 
-                + ((busNo & 0xff) << 16) 
-                + ((devNo & 0x1f) << 11) 
-                + ((fncNo & 0x07) <<  8) 
-               + (cnfAdd & 0xfc)), PCIPAR);
-
-        ctrl_outl(cnfData, PCIPDR);
-}
-
-/*
-  Initialize IRQ setting
-*/
-
-static unsigned char m_irq_mask = 0xfb;
-static unsigned char s_irq_mask = 0xff;
-
-static void disable_mpc1211_irq(unsigned int irq)
-{
-       if( irq < 8) {
-               m_irq_mask |= (1 << irq);
-               outb(m_irq_mask,I8259_M_MR);
-       } else {
-               s_irq_mask |= (1 << (irq - 8));
-               outb(s_irq_mask,I8259_S_MR);
-       }
-
-}
-
-static void enable_mpc1211_irq(unsigned int irq)
-{
-       if( irq < 8) {
-               m_irq_mask &= ~(1 << irq);
-               outb(m_irq_mask,I8259_M_MR);
-       } else {
-               s_irq_mask &= ~(1 << (irq - 8));
-               outb(s_irq_mask,I8259_S_MR);
-       }
-}
-
-static inline int mpc1211_irq_real(unsigned int irq)
-{
-       int value;
-       int irqmask;
-
-       if ( irq < 8) {
-               irqmask = 1<<irq;
-               outb(0x0b,I8259_M_CR);          /* ISR register */
-               value = inb(I8259_M_CR) & irqmask;
-               outb(0x0a,I8259_M_CR);          /* back ro the IPR reg */
-               return value;
-       }
-       irqmask = 1<<(irq - 8);
-       outb(0x0b,I8259_S_CR);          /* ISR register */
-       value = inb(I8259_S_CR) & irqmask;
-       outb(0x0a,I8259_S_CR);          /* back ro the IPR reg */
-       return value;
-}
-
-static void mask_and_ack_mpc1211(unsigned int irq)
-{
-       if(irq < 8) {
-               if(m_irq_mask & (1<<irq)){
-                 if(!mpc1211_irq_real(irq)){
-                   atomic_inc(&irq_err_count)
-                   printk("spurious 8259A interrupt: IRQ %x\n",irq);
-                  }
-               } else {
-                       m_irq_mask |= (1<<irq);
-               }
-               inb(I8259_M_MR);                /* DUMMY */
-               outb(m_irq_mask,I8259_M_MR);    /* disable */
-               outb(0x60+irq,I8259_M_CR);      /* EOI */
-               
-       } else {
-               if(s_irq_mask & (1<<(irq - 8))){
-                 if(!mpc1211_irq_real(irq)){
-                   atomic_inc(&irq_err_count);
-                   printk("spurious 8259A interrupt: IRQ %x\n",irq);
-                 }
-               } else {
-                       s_irq_mask |= (1<<(irq - 8));
-               }
-               inb(I8259_S_MR);                /* DUMMY */
-               outb(s_irq_mask,I8259_S_MR);    /* disable */
-               outb(0x60+(irq-8),I8259_S_CR);  /* EOI */
-               outb(0x60+2,I8259_M_CR);
-       }
-}
-
-static void end_mpc1211_irq(unsigned int irq)
-{
-       enable_mpc1211_irq(irq);
-}
-
-static unsigned int startup_mpc1211_irq(unsigned int irq)
-{
-       enable_mpc1211_irq(irq);
-       return 0;
-}
-
-static void shutdown_mpc1211_irq(unsigned int irq)
-{
-       disable_mpc1211_irq(irq);
-}
-
-static struct hw_interrupt_type mpc1211_irq_type = {
-       .typename       = "MPC1211-IRQ",
-       .startup        = startup_mpc1211_irq,
-       .shutdown       = shutdown_mpc1211_irq,
-       .enable         = enable_mpc1211_irq,
-       .disable        = disable_mpc1211_irq,
-       .ack            = mask_and_ack_mpc1211,
-       .end            = end_mpc1211_irq
-};
-
-static void make_mpc1211_irq(unsigned int irq)
-{
-       irq_desc[irq].chip = &mpc1211_irq_type;
-       irq_desc[irq].status  = IRQ_DISABLED;
-       irq_desc[irq].action  = 0;
-       irq_desc[irq].depth   = 1;
-       disable_mpc1211_irq(irq);
-}
-
-int mpc1211_irq_demux(int irq)
-{
-       unsigned int poll;
-
-       if( irq == 2 ) {
-               outb(0x0c,I8259_M_CR);
-               poll = inb(I8259_M_CR);
-               if(poll & 0x80) {
-                       irq = (poll & 0x07);
-               }
-               if( irq == 2) {
-                       outb(0x0c,I8259_S_CR);
-                       poll = inb(I8259_S_CR);
-                       irq = (poll & 0x07) + 8;
-               }
-       }
-       return irq;
-}
-
-static void __init init_mpc1211_IRQ(void)
-{
-       int i;
-       /*
-        * Super I/O (Just mimic PC):
-        *  1: keyboard
-        *  3: serial 1
-        *  4: serial 0
-        *  5: printer
-        *  6: floppy
-        *  8: rtc
-        * 10: lan
-        * 12: mouse
-        * 14: ide0
-        * 15: ide1
-        */
-
-       pci_write_config(0,0,0,0x54, 0xb0b0002d);
-       outb(0x11, I8259_M_CR);         /* mater icw1 edge trigger  */
-       outb(0x11, I8259_S_CR);         /* slave icw1 edge trigger  */
-       outb(0x20, I8259_M_MR);         /* m icw2 base vec 0x08     */
-       outb(0x28, I8259_S_MR);         /* s icw2 base vec 0x70     */
-       outb(0x04, I8259_M_MR);         /* m icw3 slave irq2        */
-       outb(0x02, I8259_S_MR);         /* s icw3 slave id          */
-       outb(0x01, I8259_M_MR);         /* m icw4 non buf normal eoi*/
-       outb(0x01, I8259_S_MR);         /* s icw4 non buf normal eo1*/
-       outb(0xfb, I8259_M_MR);         /* disable irq0--irq7  */
-       outb(0xff, I8259_S_MR);         /* disable irq8--irq15 */
-
-       for ( i=0; i < 16; i++) {
-               if(i != 2) {
-                       make_mpc1211_irq(i);
-               }
-       }
-}
-
-static void delay1000(void)
-{
-       int i;
-
-       for (i=0; i<1000; i++)
-               ctrl_delay();
-}
-
-static int put_smb_blk(unsigned char *p, int address, int command, int no)
-{
-       int temp;
-       int timeout;
-       int i;
-
-       outb(0xff, SMBHSTSTS);
-       temp = inb(SMBHSTSTS);
-       for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); timeout++) {
-               delay1000();
-               temp = inb(SMBHSTSTS);
-       }
-       if (timeout >= MAX_TIMEOUT){
-               return -1;
-       }
-
-       outb(((address & 0x7f) << 1), SMBHSTADD);
-       outb(0xc0, SMBHSTCNT);
-       outb(command & 0xff, SMBHSTCMD);
-       outb(no & 0x1f, SMBHSTDAT0);
-
-       for(i = 1; i <= no; i++) {
-               outb(*p++, SMBBLKDAT);
-       }
-       outb(0xff, SMBHSTSTART);
-
-       temp = inb(SMBHSTSTS);
-       for (timeout = 0; (timeout < MAX_TIMEOUT) && !(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)); timeout++) {
-               delay1000();
-               temp = inb(SMBHSTSTS);
-       }
-       if (timeout >= MAX_TIMEOUT) {
-               return -2;
-       }
-       if ( temp & ALI15X3_STS_ERR ){
-               return -3;
-       }
-       return 0;
-}
-
-static struct resource heartbeat_resources[] = {
-       [0] = {
-               .start  = 0xa2000000,
-               .end    = 0xa2000000,
-               .flags  = IORESOURCE_MEM,
-       },
-};
-
-static struct platform_device heartbeat_device = {
-       .name           = "heartbeat",
-       .id             = -1,
-       .num_resources  = ARRAY_SIZE(heartbeat_resources),
-       .resource       = heartbeat_resources,
-};
-
-static struct platform_device *mpc1211_devices[] __initdata = {
-       &heartbeat_device,
-};
-
-static int __init mpc1211_devices_setup(void)
-{
-       return platform_add_devices(mpc1211_devices,
-                                   ARRAY_SIZE(mpc1211_devices));
-}
-__initcall(mpc1211_devices_setup);
-
-/* arch/sh/boards/mpc1211/rtc.c */
-void mpc1211_time_init(void);
-
-static void __init mpc1211_setup(char **cmdline_p)
-{
-       unsigned char spd_buf[128];
-
-       __set_io_port_base(PA_PCI_IO);
-
-       pci_write_config(0,0,0,0x54, 0xb0b00000);
-
-       do {
-               outb(ALI15X3_ABORT, SMBHSTCNT);
-               spd_buf[0] = 0x0c;
-               spd_buf[1] = 0x43;
-               spd_buf[2] = 0x7f;
-               spd_buf[3] = 0x03;
-               spd_buf[4] = 0x00;
-               spd_buf[5] = 0x03;
-               spd_buf[6] = 0x00;
-       } while (put_smb_blk(spd_buf, 0x69, 0, 7) < 0);
-
-       board_time_init = mpc1211_time_init;
-
-       return 0;
-}
-
-/*
- * The Machine Vector
- */
-static struct sh_machine_vector mv_mpc1211 __initmv = {
-       .mv_name                = "Interface MPC-1211(CTP/PCI/MPC-SH02)",
-       .mv_setup               = mpc1211_setup,
-       .mv_nr_irqs             = 48,
-       .mv_irq_demux           = mpc1211_irq_demux,
-       .mv_init_irq            = init_mpc1211_IRQ,
-};
index e7c150d4970297629be13c17fefa543f5cfe9ac5..01af44245b57761c5f4f5004d3b438a93e7fcc07 100644 (file)
@@ -14,6 +14,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/mtd/nand.h>
 #include <linux/i2c.h>
+#include <linux/smc91x.h>
 #include <asm/machvec.h>
 #include <asm/io.h>
 #include <asm/sh_keysc.h>
  * 0x18000000       8GB    8   NAND Flash (K9K8G08U0A)
  */
 
+static struct smc91x_platdata smc91x_info = {
+       .flags = SMC91X_USE_16BIT,
+       .irq_flags = IRQF_TRIGGER_HIGH,
+};
+
 static struct resource smc91x_eth_resources[] = {
        [0] = {
                .name   = "SMC91C111" ,
@@ -36,7 +42,7 @@ static struct resource smc91x_eth_resources[] = {
        },
        [1] = {
                .start  = 32, /* IRQ0 */
-               .flags  = IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
+               .flags  = IORESOURCE_IRQ,
        },
 };
 
@@ -44,6 +50,9 @@ static struct platform_device smc91x_eth_device = {
        .name           = "smc91x",
        .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
        .resource       = smc91x_eth_resources,
+       .dev    = {
+               .platform_data  = &smc91x_info,
+       },
 };
 
 static struct sh_keysc_info sh_keysc_info = {
index 68f0ad1b637dd3335243e7e101761fe34cd08688..ae1cfcb297008f76f8cb003872cf2ba87c6a8aa0 100644 (file)
@@ -62,7 +62,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
                         NULL, mask_registers, NULL, NULL);
 
-unsigned char * __init highlander_init_irq_r7780mp(void)
+unsigned char * __init highlander_plat_irq_setup(void)
 {
        if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) {
                printk(KERN_INFO "Using r7780mp interrupt controller.\n");
index bd34048ed0e1f95c6b042a77d7a17486d13663e0..9d3921fe27c0b4506322ad5a3a0837c652a63c02 100644 (file)
@@ -55,7 +55,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
                         NULL, mask_registers, NULL, NULL);
 
-unsigned char * __init highlander_init_irq_r7780rp(void)
+unsigned char * __init highlander_plat_irq_setup(void)
 {
        if (ctrl_inw(0xa5000600)) {
                printk(KERN_INFO "Using r7780rp interrupt controller.\n");
index bf7ec107fbc63b4515e871a7858e6dfb7086e176..896c045aa39d63ab66ebc4eceed0b38f00911b59 100644 (file)
@@ -64,7 +64,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
                         NULL, mask_registers, NULL, NULL);
 
-unsigned char * __init highlander_init_irq_r7785rp(void)
+unsigned char * __init highlander_plat_irq_setup(void)
 {
        if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
                return NULL;
index ac0a96522e45e3f9387ae578149fe9ec05e34578..bc79afb6fc4c04c7c13335b9ae03e4938ec51939 100644 (file)
@@ -316,7 +316,7 @@ static void __init highlander_setup(char **cmdline_p)
 
 static unsigned char irl2irq[HL_NR_IRL];
 
-int highlander_irq_demux(int irq)
+static int highlander_irq_demux(int irq)
 {
        if (irq >= HL_NR_IRL || !irl2irq[irq])
                return irq;
@@ -324,27 +324,9 @@ int highlander_irq_demux(int irq)
        return irl2irq[irq];
 }
 
-void __init highlander_init_irq(void)
+static void __init highlander_init_irq(void)
 {
-       unsigned char *ucp = NULL;
-
-       do {
-#ifdef CONFIG_SH_R7780MP
-               ucp = highlander_init_irq_r7780mp();
-               if (ucp)
-                       break;
-#endif
-#ifdef CONFIG_SH_R7785RP
-               ucp = highlander_init_irq_r7785rp();
-               if (ucp)
-                       break;
-#endif
-#ifdef CONFIG_SH_R7780RP
-               ucp = highlander_init_irq_r7780rp();
-               if (ucp)
-                       break;
-#endif
-       } while (0);
+       unsigned char *ucp = highlander_plat_irq_setup();
 
        if (ucp) {
                plat_irq_setup_pins(IRQ_MODE_IRL3210);
index f21ee49ef3a5c842c540c8e4a0780b113d666c2a..452d0d6459a40ee0da3a1f1050d8525ac66367ee 100644 (file)
@@ -109,7 +109,6 @@ static struct platform_device heartbeat_device = {
        .resource       = heartbeat_resources,
 };
 
-#ifdef CONFIG_MFD_SM501
 static struct plat_serial8250_port uart_platform_data[] = {
        {
                .membase    &n