]> nv-tegra.nvidia Code Review - linux-2.6.git/commitdiff
[PATCH] m68knommu: allow for SDRAM and GPIO differences on 5270/1 and 5274/5 processors
authorGreg Ungerer <gerg@snapgear.com>
Mon, 12 Sep 2005 01:18:10 +0000 (11:18 +1000)
committerLinus Torvalds <torvalds@g5.osdl.org>
Mon, 12 Sep 2005 03:43:47 +0000 (20:43 -0700)
Allow for differences in the SDRAM controller setup and GPIO pin setup
of the 5270/1 and 5274/5 parts. With separate config options for each
now this no longer needs to be board specific.

Signed-off-by: Greg Ungerer <gerg@uclinux.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
include/asm-m68knommu/m527xsim.h

index d280d013da032c0e3992b98a5b01c2267791441e..e7878d0f7d7a57d94003a0c9788fc858cbec88e9 100644 (file)
 /*
  *     SDRAM configuration registers.
  */
-#ifdef CONFIG_M5271EVB
+#ifdef CONFIG_M5271
 #define        MCFSIM_DCR              0x40            /* SDRAM control */
 #define        MCFSIM_DACR0            0x48            /* SDRAM base address 0 */
 #define        MCFSIM_DMR0             0x4c            /* SDRAM address mask 0 */
 #define        MCFSIM_DACR1            0x50            /* SDRAM base address 1 */
 #define        MCFSIM_DMR1             0x54            /* SDRAM address mask 1 */
-#else
+#endif
+#ifdef CONFIG_M5275
 #define        MCFSIM_DMR              0x40            /* SDRAM mode */
 #define        MCFSIM_DCR              0x44            /* SDRAM control */
 #define        MCFSIM_DCFG1            0x48            /* SDRAM configuration 1 */
 #define        MCFSIM_DMR1             0x5c            /* SDRAM address mask 1 */
 #endif
 
+/*
+ *     GPIO pins setups to enable the UARTs.
+ */
+#ifdef CONFIG_M5271
+#define MCF_GPIO_PAR_UART      0x100048        /* PAR UART address */
+#define UART0_ENABLE_MASK      0x000f
+#define UART1_ENABLE_MASK      0x0ff0
+#define UART2_ENABLE_MASK      0x3000
+#endif
+#ifdef CONFIG_M5275
+#define MCF_GPIO_PAR_UART      0x10007c        /* PAR UART address */
+#define UART0_ENABLE_MASK      0x000f
+#define UART1_ENABLE_MASK      0x00f0
+#define UART2_ENABLE_MASK      0x3f00 
+#endif
+
 /****************************************************************************/
 #endif /* m527xsim_h */