]> nv-tegra.nvidia Code Review - linux-2.6.git/commitdiff
Merge master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-for-linus-2.6
authorLinus Torvalds <torvalds@g5.osdl.org>
Fri, 11 Nov 2005 22:04:37 +0000 (14:04 -0800)
committerLinus Torvalds <torvalds@g5.osdl.org>
Fri, 11 Nov 2005 22:04:37 +0000 (14:04 -0800)
621 files changed:
Documentation/networking/dccp.txt [new file with mode: 0644]
Documentation/networking/ip-sysctl.txt
MAINTAINERS
Makefile
arch/arm/Kconfig
arch/arm/Makefile
arch/arm/common/locomo.c
arch/arm/common/sa1111.c
arch/arm/common/scoop.c
arch/arm/configs/omap_h2_1610_defconfig
arch/arm/lib/csumpartial.S
arch/arm/mach-ixp4xx/Kconfig
arch/arm/mach-ixp4xx/Makefile
arch/arm/mach-ixp4xx/nslu2-pci.c [new file with mode: 0644]
arch/arm/mach-ixp4xx/nslu2-power.c [new file with mode: 0644]
arch/arm/mach-ixp4xx/nslu2-setup.c [new file with mode: 0644]
arch/arm/mach-omap1/Kconfig
arch/arm/mach-omap1/Makefile
arch/arm/mach-omap1/board-generic.c
arch/arm/mach-omap1/board-h2.c
arch/arm/mach-omap1/board-h3.c
arch/arm/mach-omap1/board-innovator.c
arch/arm/mach-omap1/board-netstar.c
arch/arm/mach-omap1/board-osk.c
arch/arm/mach-omap1/board-palmte.c [new file with mode: 0644]
arch/arm/mach-omap1/board-perseus2.c
arch/arm/mach-omap1/board-voiceblue.c
arch/arm/mach-omap1/clock.c [new file with mode: 0644]
arch/arm/mach-omap1/clock.h [new file with mode: 0644]
arch/arm/mach-omap1/devices.c
arch/arm/mach-omap1/id.c
arch/arm/mach-omap1/io.c
arch/arm/mach-omap1/irq.c
arch/arm/mach-omap1/leds-h2p2-debug.c
arch/arm/mach-omap1/leds.c
arch/arm/mach-omap1/mux.c [new file with mode: 0644]
arch/arm/mach-omap1/serial.c
arch/arm/mach-omap1/time.c
arch/arm/mach-omap2/Kconfig [new file with mode: 0644]
arch/arm/mach-omap2/Makefile [new file with mode: 0644]
arch/arm/mach-omap2/Makefile.boot [new file with mode: 0644]
arch/arm/mach-omap2/board-generic.c [new file with mode: 0644]
arch/arm/mach-omap2/board-h4.c [new file with mode: 0644]
arch/arm/mach-omap2/clock.c [new file with mode: 0644]
arch/arm/mach-omap2/clock.h [new file with mode: 0644]
arch/arm/mach-omap2/devices.c [new file with mode: 0644]
arch/arm/mach-omap2/id.c [new file with mode: 0644]
arch/arm/mach-omap2/io.c [new file with mode: 0644]
arch/arm/mach-omap2/irq.c [new file with mode: 0644]
arch/arm/mach-omap2/mux.c [new file with mode: 0644]
arch/arm/mach-omap2/prcm.h [new file with mode: 0644]
arch/arm/mach-omap2/serial.c [new file with mode: 0644]
arch/arm/mach-omap2/sram-fn.S [new file with mode: 0644]
arch/arm/mach-omap2/timer-gp.c [new file with mode: 0644]
arch/arm/mach-pxa/Kconfig
arch/arm/mach-pxa/Makefile
arch/arm/mach-pxa/corgi_ssp.c
arch/arm/mach-pxa/sharpsl.h
arch/arm/mach-pxa/sharpsl_pm.c [new file with mode: 0644]
arch/arm/mach-pxa/ssp.c
arch/arm/mach-sa1100/neponset.c
arch/arm/mm/Kconfig
arch/arm/plat-omap/Makefile
arch/arm/plat-omap/clock.c
arch/arm/plat-omap/clock.h [deleted file]
arch/arm/plat-omap/common.c
arch/arm/plat-omap/devices.c [new file with mode: 0644]
arch/arm/plat-omap/dma.c
arch/arm/plat-omap/gpio.c
arch/arm/plat-omap/mcbsp.c
arch/arm/plat-omap/mux.c
arch/arm/plat-omap/pm.c
arch/arm/plat-omap/sleep.S
arch/arm/plat-omap/sram.c
arch/arm/plat-omap/sram.h [deleted file]
arch/arm/plat-omap/usb.c
arch/i386/pci/fixup.c
arch/ia64/kernel/efi.c
arch/ia64/kernel/kprobes.c
arch/ia64/kernel/mca.c
arch/ia64/kernel/mca_drv.c
arch/ia64/kernel/process.c
arch/ia64/kernel/setup.c
arch/ia64/kernel/signal.c
arch/ia64/kernel/traps.c
arch/ia64/mm/discontig.c
arch/ia64/mm/tlb.c
arch/ia64/pci/pci.c
arch/ia64/sn/kernel/io_init.c
arch/ia64/sn/kernel/xpc.h
arch/ia64/sn/kernel/xpc_main.c
arch/ia64/sn/kernel/xpc_partition.c
arch/ia64/sn/pci/tioce_provider.c
arch/powerpc/Kconfig
arch/powerpc/kernel/Makefile
arch/powerpc/kernel/asm-offsets.c
arch/powerpc/kernel/cpu_setup_power4.S [moved from arch/ppc64/kernel/cpu_setup_power4.S with 99% similarity]
arch/powerpc/kernel/cputable.c
arch/powerpc/kernel/firmware.c [moved from arch/ppc64/kernel/firmware.c with 97% similarity]
arch/powerpc/kernel/fpu.S
arch/powerpc/kernel/head_32.S
arch/powerpc/kernel/head_64.S
arch/powerpc/kernel/ioctl32.c [moved from arch/ppc64/kernel/ioctl32.c with 99% similarity]
arch/powerpc/kernel/irq.c [moved from arch/ppc64/kernel/irq.c with 70% similarity]
arch/powerpc/kernel/lparcfg.c [moved from arch/ppc64/kernel/lparcfg.c with 96% similarity]
arch/powerpc/kernel/misc_32.S
arch/powerpc/kernel/misc_64.S
arch/powerpc/kernel/paca.c [moved from arch/ppc64/kernel/pacaData.c with 95% similarity]
arch/powerpc/kernel/ppc_ksyms.c
arch/powerpc/kernel/proc_ppc64.c [moved from arch/ppc64/kernel/proc_ppc64.c with 95% similarity]
arch/powerpc/kernel/prom.c
arch/powerpc/kernel/prom_init.c
arch/powerpc/kernel/rtas-proc.c
arch/powerpc/kernel/rtas.c
arch/powerpc/kernel/rtas_pci.c [moved from arch/ppc64/kernel/rtas_pci.c with 93% similarity]
arch/powerpc/kernel/setup-common.c
arch/powerpc/kernel/setup.h [new file with mode: 0644]
arch/powerpc/kernel/setup_32.c
arch/powerpc/kernel/setup_64.c
arch/powerpc/kernel/signal_32.c
arch/powerpc/kernel/smp.c
arch/powerpc/kernel/sys_ppc32.c
arch/powerpc/kernel/sysfs.c [moved from arch/ppc64/kernel/sysfs.c with 99% similarity]
arch/powerpc/kernel/time.c
arch/powerpc/kernel/traps.c
arch/powerpc/kernel/udbg.c [moved from arch/ppc64/kernel/udbg.c with 100% similarity]
arch/powerpc/kernel/udbg_16550.c [moved from arch/ppc64/kernel/udbg_16550.c with 100% similarity]
arch/powerpc/kernel/udbg_scc.c [moved from arch/ppc64/kernel/udbg_scc.c with 100% similarity]
arch/powerpc/kernel/vdso.c [new file with mode: 0644]
arch/powerpc/kernel/vdso32/Makefile [moved from arch/ppc64/kernel/vdso32/Makefile with 91% similarity]
arch/powerpc/kernel/vdso32/cacheflush.S [moved from arch/ppc64/kernel/vdso32/cacheflush.S with 100% similarity]
arch/powerpc/kernel/vdso32/datapage.S [moved from arch/ppc64/kernel/vdso32/datapage.S with 82% similarity]
arch/powerpc/kernel/vdso32/gettimeofday.S [new file with mode: 0644]
arch/powerpc/kernel/vdso32/note.S [moved from arch/ppc64/kernel/vdso32/note.S with 100% similarity]
arch/powerpc/kernel/vdso32/sigtramp.S [moved from arch/ppc64/kernel/vdso32/sigtramp.S with 100% similarity]
arch/powerpc/kernel/vdso32/vdso32.lds.S [moved from arch/ppc64/kernel/vdso32/vdso32.lds.S with 97% similarity]
arch/powerpc/kernel/vdso32/vdso32_wrapper.S [moved from arch/ppc64/kernel/vdso32/vdso32_wrapper.S with 79% similarity]
arch/powerpc/kernel/vdso64/Makefile [moved from arch/ppc64/kernel/vdso64/Makefile with 100% similarity]
arch/powerpc/kernel/vdso64/cacheflush.S [moved from arch/ppc64/kernel/vdso64/cacheflush.S with 100% similarity]
arch/powerpc/kernel/vdso64/datapage.S [moved from arch/ppc64/kernel/vdso64/datapage.S with 84% similarity]
arch/powerpc/kernel/vdso64/gettimeofday.S [new file with mode: 0644]
arch/powerpc/kernel/vdso64/note.S [moved from arch/ppc64/kernel/vdso64/note.S with 100% similarity]
arch/powerpc/kernel/vdso64/sigtramp.S [moved from arch/ppc64/kernel/vdso64/sigtramp.S with 100% similarity]
arch/powerpc/kernel/vdso64/vdso64.lds.S [moved from arch/ppc64/kernel/vdso64/vdso64.lds.S with 97% similarity]
arch/powerpc/kernel/vdso64/vdso64_wrapper.S [moved from arch/ppc64/kernel/vdso64/vdso64_wrapper.S with 79% similarity]
arch/powerpc/lib/bitops.c
arch/powerpc/mm/hash_utils_64.c
arch/powerpc/mm/init_32.c
arch/powerpc/mm/init_64.c
arch/powerpc/mm/mem.c
arch/powerpc/mm/numa.c
arch/powerpc/mm/pgtable_64.c
arch/powerpc/mm/stab.c
arch/powerpc/oprofile/op_model_power4.c
arch/powerpc/platforms/chrp/setup.c
arch/powerpc/platforms/iseries/irq.c
arch/powerpc/platforms/iseries/misc.S
arch/powerpc/platforms/iseries/setup.c
arch/powerpc/platforms/maple/pci.c
arch/powerpc/platforms/powermac/pci.c
arch/powerpc/platforms/powermac/pic.c
arch/powerpc/platforms/powermac/smp.c
arch/powerpc/platforms/pseries/Makefile
arch/powerpc/platforms/pseries/eeh.c [moved from arch/ppc64/kernel/eeh.c with 63% similarity]
arch/powerpc/platforms/pseries/eeh_event.c [new file with mode: 0644]
arch/powerpc/platforms/pseries/iommu.c
arch/powerpc/platforms/pseries/pci.c
arch/powerpc/platforms/pseries/reconfig.c
arch/powerpc/platforms/pseries/rtasd.c
arch/powerpc/platforms/pseries/scanlog.c [moved from arch/ppc64/kernel/scanlog.c with 100% similarity]
arch/powerpc/platforms/pseries/setup.c
arch/powerpc/platforms/pseries/smp.c
arch/powerpc/platforms/pseries/xics.c
arch/powerpc/sysdev/u3_iommu.c
arch/powerpc/xmon/Makefile
arch/powerpc/xmon/nonstdio.c [new file with mode: 0644]
arch/powerpc/xmon/nonstdio.h
arch/powerpc/xmon/setjmp.S
arch/powerpc/xmon/start_32.c
arch/powerpc/xmon/start_64.c
arch/powerpc/xmon/start_8xx.c
arch/powerpc/xmon/subr_prf.c [deleted file]
arch/powerpc/xmon/xmon.c
arch/ppc/boot/include/of1275.h
arch/ppc/boot/of1275/Makefile
arch/ppc/boot/of1275/call_prom.c [new file with mode: 0644]
arch/ppc/boot/of1275/claim.c
arch/ppc/boot/of1275/finddevice.c
arch/ppc/boot/openfirmware/Makefile
arch/ppc/kernel/Makefile
arch/ppc/kernel/asm-offsets.c
arch/ppc/kernel/head_booke.h
arch/ppc/kernel/irq.c [deleted file]
arch/ppc/kernel/misc.S
arch/ppc/kernel/pci.c
arch/ppc/kernel/ppc_ksyms.c
arch/ppc/kernel/setup.c
arch/ppc/platforms/pmac_pic.c
arch/ppc/platforms/prep_setup.c
arch/ppc/syslib/cpm2_pic.c
arch/ppc64/Kconfig
arch/ppc64/boot/addRamDisk.c
arch/ppc64/kernel/Makefile
arch/ppc64/kernel/asm-offsets.c
arch/ppc64/kernel/head.S
arch/ppc64/kernel/idle.c
arch/ppc64/kernel/misc.S
arch/ppc64/kernel/nvram.c
arch/ppc64/kernel/pci.c
arch/ppc64/kernel/pci_dn.c
arch/ppc64/kernel/prom.c
arch/ppc64/kernel/prom_init.c
arch/ppc64/kernel/vdso.c
arch/ppc64/kernel/vdso32/gettimeofday.S [deleted file]
arch/ppc64/kernel/vdso64/gettimeofday.S [deleted file]
arch/sparc64/kernel/setup.c
arch/sparc64/kernel/smp.c
arch/um/drivers/net_kern.c
arch/um/drivers/ubd_kern.c
arch/xtensa/platform-iss/network.c
drivers/acpi/glue.c
drivers/atm/horizon.c
drivers/base/platform.c
drivers/char/agp/ali-agp.c
drivers/char/agp/amd-k7-agp.c
drivers/char/agp/amd64-agp.c
drivers/char/agp/ati-agp.c
drivers/char/agp/efficeon-agp.c
drivers/char/agp/i460-agp.c
drivers/char/agp/intel-agp.c
drivers/char/agp/nvidia-agp.c
drivers/char/agp/sis-agp.c
drivers/char/agp/sworks-agp.c
drivers/char/agp/uninorth-agp.c
drivers/char/agp/via-agp.c
drivers/char/epca.c
drivers/char/ipmi/ipmi_msghandler.c
drivers/char/s3c2410-rtc.c
drivers/char/sonypi.c
drivers/char/synclink.c
drivers/char/synclinkmp.c
drivers/char/tb0219.c
drivers/char/vr41xx_giu.c
drivers/char/vr41xx_rtc.c
drivers/char/watchdog/mpcore_wdt.c
drivers/char/watchdog/mv64x60_wdt.c
drivers/char/watchdog/pcwd_pci.c
drivers/char/watchdog/s3c2410_wdt.c
drivers/char/watchdog/wdt_pci.c
drivers/hwmon/hdaps.c
drivers/i2c/busses/i2c-ali1535.c
drivers/i2c/busses/i2c-ali1563.c
drivers/i2c/busses/i2c-ali15x3.c
drivers/i2c/busses/i2c-amd756.c
drivers/i2c/busses/i2c-amd8111.c
drivers/i2c/busses/i2c-hydra.c
drivers/i2c/busses/i2c-i801.c
drivers/i2c/busses/i2c-i810.c
drivers/i2c/busses/i2c-iop3xx.c
drivers/i2c/busses/i2c-ixp2000.c
drivers/i2c/busses/i2c-ixp4xx.c
drivers/i2c/busses/i2c-mpc.c
drivers/i2c/busses/i2c-mv64xxx.c
drivers/i2c/busses/i2c-nforce2.c
drivers/i2c/busses/i2c-piix4.c
drivers/i2c/busses/i2c-prosavage.c
drivers/i2c/busses/i2c-pxa.c
drivers/i2c/busses/i2c-s3c2410.c
drivers/i2c/busses/i2c-savage4.c
drivers/i2c/busses/i2c-sis5595.c
drivers/i2c/busses/i2c-sis630.c
drivers/i2c/busses/i2c-sis96x.c
drivers/i2c/busses/i2c-via.c
drivers/i2c/busses/i2c-viapro.c
drivers/i2c/busses/i2c-voodoo3.c
drivers/i2c/chips/isp1301_omap.c
drivers/ide/setup-pci.c
drivers/infiniband/core/user_mad.c
drivers/infiniband/core/uverbs_cmd.c
drivers/infiniband/core/verbs.c
drivers/infiniband/hw/mthca/mthca_catas.c
drivers/infiniband/hw/mthca/mthca_cmd.c
drivers/infiniband/hw/mthca/mthca_cq.c
drivers/infiniband/hw/mthca/mthca_dev.h
drivers/infiniband/hw/mthca/mthca_main.c
drivers/infiniband/hw/mthca/mthca_provider.c
drivers/infiniband/hw/mthca/mthca_provider.h
drivers/infiniband/hw/mthca/mthca_qp.c
drivers/infiniband/hw/mthca/mthca_srq.c
drivers/infiniband/hw/mthca/mthca_wqe.h
drivers/infiniband/ulp/ipoib/ipoib.h
drivers/infiniband/ulp/ipoib/ipoib_fs.c
drivers/infiniband/ulp/ipoib/ipoib_main.c
drivers/infiniband/ulp/ipoib/ipoib_multicast.c
drivers/infiniband/ulp/ipoib/ipoib_vlan.c
drivers/input/keyboard/corgikbd.c
drivers/input/keyboard/spitzkbd.c
drivers/input/serio/i8042.c
drivers/input/serio/rpckbd.c
drivers/input/touchscreen/corgi_ts.c
drivers/mfd/mcp-sa11x0.c
drivers/misc/hdpuftrs/hdpu_cpustate.c
drivers/misc/hdpuftrs/hdpu_nexus.c
drivers/mmc/pxamci.c
drivers/mmc/wbsd.c
drivers/mtd/maps/bast-flash.c
drivers/mtd/maps/integrator-flash.c
drivers/mtd/maps/ixp2000.c
drivers/mtd/maps/ixp4xx.c
drivers/mtd/maps/omap_nor.c
drivers/mtd/maps/plat-ram.c
drivers/mtd/maps/sa1100-flash.c
drivers/mtd/nand/s3c2410.c
drivers/net/Kconfig
drivers/net/bnx2.c
drivers/net/depca.c
drivers/net/dm9000.c
drivers/net/forcedeth.c
drivers/net/fs_enet/fs_enet-main.c
drivers/net/fs_enet/mac-fcc.c
drivers/net/fs_enet/mac-fec.c
drivers/net/fs_enet/mac-scc.c
drivers/net/gianfar.c
drivers/net/gianfar_mii.c
drivers/net/gt96100eth.c
drivers/net/ibmveth.c
drivers/net/irda/sa1100_ir.c
drivers/net/irda/smsc-ircc2.c
drivers/net/jazzsonic.c
drivers/net/macsonic.c
drivers/net/mv643xx_eth.c
drivers/net/saa9730.c
drivers/net/smc91x.c
drivers/net/smc91x.h
drivers/net/spider_net.c
drivers/net/tokenring/proteon.c
drivers/net/tokenring/skisa.c
drivers/net/wireless/Kconfig
drivers/net/wireless/atmel.c
drivers/net/wireless/atmel.h
drivers/net/wireless/atmel_cs.c
drivers/net/wireless/atmel_pci.c
drivers/pci/access.c
drivers/pci/hotplug/pciehp.h
drivers/pci/hotplug/pciehp_core.c
drivers/pci/hotplug/pciehp_ctrl.c
drivers/pci/hotplug/pciehp_hpc.c
drivers/pci/hotplug/pciehp_pci.c
drivers/pci/hotplug/pciehprm.h [deleted file]
drivers/pci/hotplug/pciehprm_acpi.c
drivers/pci/hotplug/pciehprm_nonacpi.c
drivers/pci/hotplug/pciehprm_nonacpi.h [deleted file]
drivers/pci/hotplug/rpadlpar_core.c
drivers/pci/hotplug/rpaphp.h
drivers/pci/hotplug/rpaphp_pci.c
drivers/pci/hotplug/shpchp_pci.c
drivers/pci/msi.c
drivers/pci/pci-acpi.c
drivers/pci/pci-driver.c
drivers/pci/pci.c
drivers/pci/quirks.c
drivers/pcmcia/Kconfig
drivers/pcmcia/Makefile
drivers/pcmcia/au1000_db1x00.c
drivers/pcmcia/au1000_generic.h
drivers/pcmcia/au1000_pb1x00.c
drivers/pcmcia/au1000_xxs1500.c
drivers/pcmcia/i82365.c
drivers/pcmcia/m8xx_pcmcia.c
drivers/s390/net/lcs.c
drivers/s390/net/qeth.h
drivers/s390/net/qeth_main.c
drivers/s390/net/qeth_mpc.c
drivers/s390/net/qeth_mpc.h
drivers/s390/net/qeth_sys.c
drivers/s390/net/qeth_tso.h
drivers/sbus/char/display7seg.c
drivers/scsi/ahci.c
drivers/scsi/ata_piix.c
drivers/scsi/libata-core.c
drivers/scsi/libata-scsi.c
drivers/scsi/lpfc/lpfc_init.c
drivers/scsi/pdc_adma.c
drivers/scsi/sata_mv.c
drivers/scsi/sata_nv.c
drivers/scsi/sata_promise.c
drivers/scsi/sata_qstor.c
drivers/scsi/sata_sil.c
drivers/scsi/sata_sil24.c
drivers/scsi/sata_sis.c
drivers/scsi/sata_svw.c
drivers/scsi/sata_sx4.c
drivers/scsi/sata_uli.c
drivers/scsi/sata_via.c
drivers/scsi/sata_vsc.c
drivers/serial/8250.c
drivers/serial/imx.c
drivers/serial/mpc52xx_uart.c
drivers/serial/mpsc.c
drivers/serial/pxa.c
drivers/serial/s3c2410.c
drivers/serial/sa1100.c
drivers/serial/vr41xx_siu.c
drivers/usb/gadget/dummy_hcd.c
drivers/usb/gadget/goku_udc.c
drivers/usb/gadget/lh7a40x_udc.c
drivers/usb/gadget/net2280.c
drivers/usb/gadget/omap_udc.c
drivers/usb/gadget/pxa2xx_udc.c
drivers/usb/host/ehci-pci.c
drivers/usb/host/isp116x-hcd.c
drivers/usb/host/ohci-au1xxx.c
drivers/usb/host/ohci-lh7a404.c
drivers/usb/host/ohci-omap.c
drivers/usb/host/ohci-pci.c
drivers/usb/host/ohci-ppc-soc.c
drivers/usb/host/ohci-pxa27x.c
drivers/usb/host/ohci-s3c2410.c
drivers/usb/host/sl811-hcd.c
drivers/usb/host/uhci-hcd.c
drivers/video/acornfb.c
drivers/video/arcfb.c
drivers/video/backlight/corgi_bl.c
drivers/video/dnfb.c
drivers/video/epson1355fb.c
drivers/video/gbefb.c
drivers/video/imxfb.c
drivers/video/pxafb.c
drivers/video/q40fb.c
drivers/video/s1d13xxxfb.c
drivers/video/s3c2410fb.c
drivers/video/sa1100fb.c
drivers/video/sgivwfb.c
drivers/video/vesafb.c
drivers/video/vfb.c
drivers/video/w100fb.c
fs/Kconfig
fs/cifs/CHANGES
fs/cifs/cifs_unicode.c
fs/cifs/cifsfs.c
fs/cifs/cifsproto.h
fs/cifs/cifssmb.c
fs/cifs/cn_cifs.h [new file with mode: 0644]
fs/cifs/connect.c
fs/cifs/inode.c
include/asm-arm/arch-ixp4xx/hardware.h
include/asm-arm/arch-ixp4xx/irqs.h
include/asm-arm/arch-ixp4xx/nslu2.h [new file with mode: 0644]
include/asm-arm/arch-omap/board-h4.h
include/asm-arm/arch-omap/board-innovator.h
include/asm-arm/arch-omap/clock.h [new file with mode: 0644]
include/asm-arm/arch-omap/common.h
include/asm-arm/arch-omap/cpu.h
include/asm-arm/arch-omap/dma.h
include/asm-arm/arch-omap/entry-macro.S
include/asm-arm/arch-omap/fpga.h
include/asm-arm/arch-omap/gpio.h
include/asm-arm/arch-omap/hardware.h
include/asm-arm/arch-omap/io.h
include/asm-arm/arch-omap/irqs.h
include/asm-arm/arch-omap/memory.h
include/asm-arm/arch-omap/menelaus.h [new file with mode: 0644]
include/asm-arm/arch-omap/mux.h
include/asm-arm/arch-omap/omap1510.h
include/asm-arm/arch-omap/omap24xx.h
include/asm-arm/arch-omap/omapfb.h [new file with mode: 0644]
include/asm-arm/arch-omap/pm.h
include/asm-arm/arch-omap/prcm.h [new file with mode: 0644]
include/asm-arm/arch-omap/sram.h [new file with mode: 0644]
include/asm-arm/arch-omap/system.h
include/asm-arm/arch-omap/timex.h
include/asm-arm/arch-omap/uncompress.h
include/asm-arm/arch-pxa/sharpsl.h
include/asm-arm/arch-pxa/ssp.h
include/asm-i386/msi.h
include/asm-i386/smp.h
include/asm-ia64/kdebug.h
include/asm-ia64/mmu_context.h
include/asm-ia64/msi.h
include/asm-ia64/tlbflush.h
include/asm-powerpc/abs_addr.h [moved from include/asm-ppc64/abs_addr.h with 94% similarity]
include/asm-powerpc/asm-compat.h [new file with mode: 0644]
include/asm-powerpc/atomic.h
include/asm-powerpc/auxvec.h
include/asm-powerpc/bitops.h
include/asm-powerpc/bug.h
include/asm-powerpc/cache.h [new file with mode: 0644]
include/asm-powerpc/cacheflush.h [moved from include/asm-ppc64/cacheflush.h with 56% similarity]
include/asm-powerpc/compat.h [moved from include/asm-ppc64/compat.h with 97% similarity]
include/asm-powerpc/cputable.h
include/asm-powerpc/current.h [new file with mode: 0644]
include/asm-powerpc/eeh_event.h [new file with mode: 0644]
include/asm-powerpc/elf.h
include/asm-powerpc/firmware.h
include/asm-powerpc/futex.h
include/asm-powerpc/hvcall.h [moved from include/asm-ppc64/hvcall.h with 97% similarity]
include/asm-powerpc/hw_irq.h
include/asm-powerpc/irq.h
include/asm-powerpc/lppaca.h [moved from include/asm-ppc64/lppaca.h with 98% similarity]
include/asm-powerpc/paca.h [moved from include/asm-ppc64/paca.h with 95% similarity]
include/asm-powerpc/ppc-pci.h
include/asm-powerpc/ppc_asm.h
include/asm-powerpc/processor.h
include/asm-powerpc/reg.h
include/asm-powerpc/reg_8xx.h [moved from include/asm-ppc/cache.h with 50% similarity]
include/asm-powerpc/signal.h [moved from include/asm-ppc/signal.h with 82% similarity]
include/asm-powerpc/sparsemem.h
include/asm-powerpc/system.h
include/asm-powerpc/tce.h [moved from include/asm-ppc64/tce.h with 96% similarity]
include/asm-powerpc/topology.h
include/asm-powerpc/uaccess.h
include/asm-powerpc/udbg.h [moved from include/asm-ppc64/udbg.h with 90% similarity]
include/asm-powerpc/vdso.h [moved from include/asm-ppc64/vdso.h with 100% similarity]
include/asm-powerpc/vdso_datapage.h [new file with mode: 0644]
include/asm-powerpc/xmon.h
include/asm-ppc/cacheflush.h [deleted file]
include/asm-ppc/current.h [deleted file]
include/asm-ppc/page.h
include/asm-ppc64/cache.h [deleted file]
include/asm-ppc64/current.h [deleted file]
include/asm-ppc64/eeh.h
include/asm-ppc64/mmu.h
include/asm-ppc64/mmzone.h
include/asm-ppc64/page.h
include/asm-ppc64/pci-bridge.h
include/asm-ppc64/pgalloc.h
include/asm-ppc64/prom.h
include/asm-ppc64/signal.h [deleted file]
include/asm-ppc64/system.h
include/asm-ppc64/systemcfg.h [deleted file]
include/asm-x86_64/msi.h
include/asm-x86_64/smp.h
include/linux/connector.h
include/linux/ide.h
include/linux/if_ether.h
include/linux/libata.h
include/linux/netdevice.h
include/linux/pci-acpi.h
include/linux/pci.h
include/linux/platform_device.h
include/linux/skbuff.h
include/linux/sysctl.h
include/linux/tcp.h
include/net/sock.h
include/net/tcp.h
include/rdma/ib_user_verbs.h
include/rdma/ib_verbs.h
kernel/signal.c
kernel/sys.c
mm/page_alloc.c
net/core/datagram.c
net/core/dev.c
net/core/netpoll.c
net/decnet/af_decnet.c
net/ipv4/icmp.c
net/ipv4/igmp.c
net/ipv4/ip_gre.c
net/ipv4/netfilter/ip_conntrack_proto_icmp.c
net/ipv4/sysctl_net_ipv4.c
net/ipv4/tcp.c
net/ipv4/tcp_bic.c
net/ipv4/tcp_cong.c
net/ipv4/tcp_highspeed.c
net/ipv4/tcp_htcp.c
net/ipv4/tcp_hybla.c
net/ipv4/tcp_input.c
net/ipv4/tcp_ipv4.c
net/ipv4/tcp_minisocks.c
net/ipv4/tcp_output.c
net/ipv4/tcp_scalable.c
net/ipv4/tcp_timer.c
net/ipv4/tcp_vegas.c
net/ipv4/udp.c
net/ipv6/icmp.c
net/ipv6/raw.c
net/ipv6/tcp_ipv6.c
net/ipv6/udp.c
net/rxrpc/transport.c
net/sunrpc/socklib.c
net/sunrpc/svcsock.c
sound/arm/pxa2xx-ac97.c
sound/core/init.c
sound/core/sound.c
sound/pci/ad1889.c
sound/pci/ali5451/ali5451.c
sound/pci/als4000.c
sound/pci/atiixp.c
sound/pci/atiixp_modem.c
sound/pci/au88x0/au88x0.c
sound/pci/azt3328.c
sound/pci/bt87x.c
sound/pci/ca0106/ca0106_main.c
sound/pci/cmipci.c
sound/pci/cs4281.c
sound/pci/cs46xx/cs46xx.c
sound/pci/emu10k1/emu10k1.c
sound/pci/emu10k1/emu10k1x.c
sound/pci/ens1370.c
sound/pci/es1938.c
sound/pci/es1968.c
sound/pci/fm801.c
sound/pci/hda/hda_intel.c
sound/pci/ice1712/ice1712.c
sound/pci/ice1712/ice1724.c
sound/pci/intel8x0.c
sound/pci/intel8x0m.c
sound/pci/korg1212/korg1212.c
sound/pci/maestro3.c
sound/pci/mixart/mixart.c
sound/pci/nm256/nm256.c
sound/pci/rme32.c
sound/pci/rme96.c
sound/pci/rme9652/hdsp.c
sound/pci/rme9652/hdspm.c
sound/pci/rme9652/rme9652.c
sound/pci/sonicvibes.c
sound/pci/trident/trident.c
sound/pci/via82xx.c
sound/pci/via82xx_modem.c
sound/pci/vx222/vx222.c
sound/pci/ymfpci/ymfpci.c

diff --git a/Documentation/networking/dccp.txt b/Documentation/networking/dccp.txt
new file mode 100644 (file)
index 0000000..c45daab
--- /dev/null
@@ -0,0 +1,56 @@
+DCCP protocol
+============
+
+Last updated: 10 November 2005
+
+Contents
+========
+
+- Introduction
+- Missing features
+- Socket options
+- Notes
+
+Introduction
+============
+
+Datagram Congestion Control Protocol (DCCP) is an unreliable, connection
+based protocol designed to solve issues present in UDP and TCP particularly
+for real time and multimedia traffic.
+
+It has a base protocol and pluggable congestion control IDs (CCIDs).
+
+It is at draft RFC status and the homepage for DCCP as a protocol is at:
+       http://www.icir.org/kohler/dcp/
+
+Missing features
+================
+
+The DCCP implementation does not currently have all the features that are in
+the draft RFC.
+
+In particular the following are missing:
+- CCID2 support
+- feature negotiation
+
+When testing against other implementations it appears that elapsed time
+options are not coded compliant to the specification.
+
+Socket options
+==============
+
+DCCP_SOCKOPT_PACKET_SIZE is used for CCID3 to set default packet size for
+calculations.
+
+DCCP_SOCKOPT_SERVICE sets the service. This is compulsory as per the
+specification. If you don't set it you will get EPROTO.
+
+Notes
+=====
+
+SELinux does not yet have support for DCCP. You will need to turn it off or
+else you will get EACCES.
+
+DCCP does not travel through NAT successfully at present. This is because
+the checksum covers the psuedo-header as per TCP and UDP. It should be
+relatively trivial to add Linux NAT support for DCCP.
index 65895bb514146b58d5857d26fd3336c16c65adf3..ebc09a159f6220d995ab39c3bbff812291f4659d 100644 (file)
@@ -78,6 +78,11 @@ inet_peer_gc_maxtime - INTEGER
 
 TCP variables: 
 
+tcp_abc - INTEGER
+       Controls Appropriate Byte Count defined in RFC3465. If set to
+       0 then does congestion avoid once per ack. 1 is conservative
+       value, and 2 is more agressive.
+
 tcp_syn_retries - INTEGER
        Number of times initial SYNs for an active TCP connection attempt
        will be retransmitted. Should not be higher than 255. Default value
index 5541f9970b879de1c93902c54fb22efafe62a11b..0b03a88e88be8e384929248a00e9af3d5a3503b1 100644 (file)
@@ -707,7 +707,7 @@ DCCP PROTOCOL
 P:     Arnaldo Carvalho de Melo
 M:     acme@mandriva.com
 L:     dccp@vger.kernel.org
-W:     http://www.wlug.org.nz/DCCP
+W:     http://linux-net.osdl.org/index.php/DCCP
 S:     Maintained
 
 DECnet NETWORK LAYER
index ea96da1572d595de19daeda44b2364416e9bd3a0..6d1f727f43999f81ddd08088625b977d39e1b76e 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -347,7 +347,7 @@ AFLAGS_KERNEL       =
 # Needed to be compatible with the O= option
 LINUXINCLUDE    := -Iinclude \
                    $(if $(KBUILD_SRC),-Iinclude2 -I$(srctree)/include) \
-                  -imacros include/linux/autoconf.h
+                  -include include/linux/autoconf.h
 
 CPPFLAGS        := -D__KERNEL__ $(LINUXINCLUDE)
 
@@ -407,7 +407,7 @@ outputmakefile:
 # of make so .config is not included in this case either (for *config).
 
 no-dot-config-targets := clean mrproper distclean \
-                        cscope TAGS tags help %docs check%
+                        cscope TAGS tags help %docs check% kernelrelease
 
 config-targets := 0
 mixed-targets  := 0
index ec77721507cb746c238afe4d4ed56a62b97f4b38..3df7cbd924a10c0b859cfecb0ce708ccf531d9cd 100644 (file)
@@ -239,6 +239,8 @@ source "arch/arm/plat-omap/Kconfig"
 
 source "arch/arm/mach-omap1/Kconfig"
 
+source "arch/arm/mach-omap2/Kconfig"
+
 source "arch/arm/mach-s3c2410/Kconfig"
 
 source "arch/arm/mach-lh7a40x/Kconfig"
index 114cda7f1b73fc1520cf3e197f27d2aca0e59019..81bd2193fe6d696799bef4c8a58f08961a8675e0 100644 (file)
@@ -93,6 +93,7 @@ textaddr-$(CONFIG_ARCH_FORTUNET)   := 0xc0008000
  machine-$(CONFIG_ARCH_IXP4XX)    := ixp4xx
  machine-$(CONFIG_ARCH_IXP2000)    := ixp2000
  machine-$(CONFIG_ARCH_OMAP1)     := omap1
+ machine-$(CONFIG_ARCH_OMAP2)     := omap2
   incdir-$(CONFIG_ARCH_OMAP)      := omap
  machine-$(CONFIG_ARCH_S3C2410)           := s3c2410
  machine-$(CONFIG_ARCH_LH7A40X)           := lh7a40x
index ad55680726ed5b10fac7efb9852d9294d940cf26..557e52c1c869d9b15341955965f7122d37ddc355 100644 (file)
@@ -550,9 +550,9 @@ struct locomo_save_data {
        u16     LCM_SPIMD;
 };
 
-static int locomo_suspend(struct device *dev, pm_message_t state)
+static int locomo_suspend(struct platform_device *dev, pm_message_t state)
 {
-       struct locomo *lchip = dev_get_drvdata(dev);
+       struct locomo *lchip = platform_get_drvdata(dev);
        struct locomo_save_data *save;
        unsigned long flags;
 
@@ -560,7 +560,7 @@ static int locomo_suspend(struct device *dev, pm_message_t state)
        if (!save)
                return -ENOMEM;
 
-       dev->power.saved_state = (void *) save;
+       dev->dev.power.saved_state = (void *) save;
 
        spin_lock_irqsave(&lchip->lock, flags);
 
@@ -594,14 +594,14 @@ static int locomo_suspend(struct device *dev, pm_message_t state)
        return 0;
 }
 
-static int locomo_resume(struct device *dev)
+static int locomo_resume(struct platform_device *dev)
 {
-       struct locomo *lchip = dev_get_drvdata(dev);
+       struct locomo *lchip = platform_get_drvdata(dev);
        struct locomo_save_data *save;
        unsigned long r;
        unsigned long flags;
        
-       save = (struct locomo_save_data *) dev->power.saved_state;
+       save = (struct locomo_save_data *) dev->dev.power.saved_state;
        if (!save)
                return 0;
 
@@ -760,27 +760,26 @@ static void __locomo_remove(struct locomo *lchip)
        kfree(lchip);
 }
 
-static int locomo_probe(struct device *dev)
+static int locomo_probe(struct platform_device *dev)
 {
-       struct platform_device *pdev = to_platform_device(dev);
        struct resource *mem;
        int irq;
 
-       mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       mem = platform_get_resource(dev, IORESOURCE_MEM, 0);
        if (!mem)
                return -EINVAL;
-       irq = platform_get_irq(pdev, 0);
+       irq = platform_get_irq(dev, 0);
 
-       return __locomo_probe(dev, mem, irq);
+       return __locomo_probe(&dev->dev, mem, irq);
 }
 
-static int locomo_remove(struct device *dev)
+static int locomo_remove(struct platform_device *dev)
 {
-       struct locomo *lchip = dev_get_drvdata(dev);
+       struct locomo *lchip = platform__get_drvdata(dev);
 
        if (lchip) {
                __locomo_remove(lchip);
-               dev_set_drvdata(dev, NULL);
+               platform_set_drvdata(dev, NULL);
        }
 
        return 0;
@@ -792,15 +791,16 @@ static int locomo_remove(struct device *dev)
  *     the per-machine level, and then have this driver pick
  *     up the registered devices.
  */
-static struct device_driver locomo_device_driver = {
-       .name           = "locomo",
-       .bus            = &platform_bus_type,
+static struct platform_driver locomo_device_driver = {
        .probe          = locomo_probe,
        .remove         = locomo_remove,
 #ifdef CONFIG_PM
        .suspend        = locomo_suspend,
        .resume         = locomo_resume,
 #endif
+       .driver         = {
+               .name   = "locomo",
+       },
 };
 
 /*
@@ -1126,13 +1126,13 @@ static int __init locomo_init(void)
 {
        int ret = bus_register(&locomo_bus_type);
        if (ret == 0)
-               driver_register(&locomo_device_driver);
+               platform_driver_register(&locomo_device_driver);
        return ret;
 }
 
 static void __exit locomo_exit(void)
 {
-       driver_unregister(&locomo_device_driver);
+       platform_driver_unregister(&locomo_device_driver);
        bus_unregister(&locomo_bus_type);
 }
 
index 174aa86ee816b49b2e41dcd2e2cfca64b2c3abbf..7b07acb03f3ba35acad08a2241cd5a3b62619999 100644 (file)
@@ -801,9 +801,9 @@ struct sa1111_save_data {
 
 #ifdef CONFIG_PM
 
-static int sa1111_suspend(struct device *dev, pm_message_t state)
+static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
 {
-       struct sa1111 *sachip = dev_get_drvdata(dev);
+       struct sa1111 *sachip = platform_get_drvdata(dev);
        struct sa1111_save_data *save;
        unsigned long flags;
        unsigned int val;
@@ -812,7 +812,7 @@ static int sa1111_suspend(struct device *dev, pm_message_t state)
        save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
        if (!save)
                return -ENOMEM;
-       dev->power.saved_state = save;
+       dev->dev.power.saved_state = save;
 
        spin_lock_irqsave(&sachip->lock, flags);
 
@@ -859,14 +859,14 @@ static int sa1111_suspend(struct device *dev, pm_message_t state)
  *     restored by their respective drivers, and must be called
  *     via LDM after this function.
  */
-static int sa1111_resume(struct device *dev)
+static int sa1111_resume(struct platform_device *dev)
 {
-       struct sa1111 *sachip = dev_get_drvdata(dev);
+       struct sa1111 *sachip = platform_get_drvdata(dev);
        struct sa1111_save_data *save;
        unsigned long flags, id;
        void __iomem *base;
 
-       save = (struct sa1111_save_data *)dev->power.saved_state;
+       save = (struct sa1111_save_data *)dev->dev.power.saved_state;
        if (!save)
                return 0;
 
@@ -879,7 +879,7 @@ static int sa1111_resume(struct device *dev)
        id = sa1111_readl(sachip->base + SA1111_SKID);
        if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
                __sa1111_remove(sachip);
-               dev_set_drvdata(dev, NULL);
+               platform_set_drvdata(dev, NULL);
                kfree(save);
                return 0;
        }
@@ -911,7 +911,7 @@ static int sa1111_resume(struct device *dev)
 
        spin_unlock_irqrestore(&sachip->lock, flags);
 
-       dev->power.saved_state = NULL;
+       dev->dev.power.saved_state = NULL;
        kfree(save);
 
        return 0;
@@ -922,9 +922,8 @@ static int sa1111_resume(struct device *dev)
 #define sa1111_resume  NULL
 #endif
 
-static int sa1111_probe(struct device *dev)
+static int sa1111_probe(struct platform_device *pdev)
 {
-       struct platform_device *pdev = to_platform_device(dev);
        struct resource *mem;
        int irq;
 
@@ -933,20 +932,20 @@ static int sa1111_probe(struct device *dev)
                return -EINVAL;
        irq = platform_get_irq(pdev, 0);
 
-       return __sa1111_probe(dev, mem, irq);
+       return __sa1111_probe(&pdev->dev, mem, irq);
 }
 
-static int sa1111_remove(struct device *dev)
+static int sa1111_remove(struct platform_device *pdev)
 {
-       struct sa1111 *sachip = dev_get_drvdata(dev);
+       struct sa1111 *sachip = platform_get_drvdata(pdev);
 
        if (sachip) {
                __sa1111_remove(sachip);
-               dev_set_drvdata(dev, NULL);
+               platform_set_drvdata(pdev, NULL);
 
 #ifdef CONFIG_PM
-               kfree(dev->power.saved_state);
-               dev->power.saved_state = NULL;
+               kfree(pdev->dev.power.saved_state);
+               pdev->dev.power.saved_state = NULL;
 #endif
        }
 
@@ -962,13 +961,14 @@ static int sa1111_remove(struct device *dev)
  *     We also need to handle the SDRAM configuration for
  *     PXA250/SA1110 machine classes.
  */
-static struct device_driver sa1111_device_driver = {
-       .name           = "sa1111",
-       .bus            = &platform_bus_type,
+static struct platform_driver sa1111_device_driver = {
        .probe          = sa1111_probe,
        .remove         = sa1111_remove,
        .suspend        = sa1111_suspend,
        .resume         = sa1111_resume,
+       .driver         = {
+               .name   = "sa1111",
+       },
 };
 
 /*
@@ -1256,13 +1256,13 @@ static int __init sa1111_init(void)
 {
        int ret = bus_register(&sa1111_bus_type);
        if (ret == 0)
-               driver_register(&sa1111_device_driver);
+               platform_driver_register(&sa1111_device_driver);
        return ret;
 }
 
 static void __exit sa1111_exit(void)
 {
-       driver_unregister(&sa1111_device_driver);
+       platform_driver_unregister(&sa1111_device_driver);
        bus_unregister(&sa1111_bus_type);
 }
 
index c7fdf390cef9cbf20325431ea092d07c658f7f18..32924c6714fe54217f8db47b1cfe6684e8f3bb37 100644 (file)
@@ -98,9 +98,9 @@ static void check_scoop_reg(struct scoop_dev *sdev)
 }
 
 #ifdef CONFIG_PM
-static int scoop_suspend(struct device *dev, pm_message_t state)
+static int scoop_suspend(struct platform_device *dev, pm_message_t state)
 {
-       struct scoop_dev *sdev = dev_get_drvdata(dev);
+       struct scoop_dev *sdev = platform_get_drvdata(dev);
 
        check_scoop_reg(sdev);
        sdev->scoop_gpwr = SCOOP_REG(sdev->base, SCOOP_GPWR);
@@ -109,9 +109,9 @@ static int scoop_suspend(struct device *dev, pm_message_t state)
        return 0;
 }
 
-static int scoop_resume(struct device *dev)
+static int scoop_resume(struct platform_device *dev)
 {
-       struct scoop_dev *sdev = dev_get_drvdata(dev);
+       struct scoop_dev *sdev = platform_get_drvdata(dev);
 
        check_scoop_reg(sdev);
        SCOOP_REG(sdev->base,SCOOP_GPWR) = sdev->scoop_gpwr;
@@ -123,11 +123,10 @@ static int scoop_resume(struct device *dev)
 #define scoop_resume   NULL
 #endif
 
-int __init scoop_probe(struct device *dev)
+int __init scoop_probe(struct platform_device *pdev)
 {
        struct scoop_dev *devptr;
        struct scoop_config *inf;
-       struct platform_device *pdev = to_platform_device(dev);
        struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 
        if (!mem)
@@ -141,7 +140,7 @@ int __init scoop_probe(struct device *dev)
        memset(devptr, 0, sizeof(struct scoop_dev));
        spin_lock_init(&devptr->scoop_lock);
 
-       inf = dev->platform_data;
+       inf = pdev->dev.platform_data;
        devptr->base = ioremap(mem->start, mem->end - mem->start + 1);
 
        if (!devptr->base) {
@@ -149,7 +148,7 @@ int __init scoop_probe(struct device *dev)
                return -ENOMEM;
        }
 
-       dev_set_drvdata(dev, devptr);
+       platform_set_drvdata(pdev, devptr);
 
        printk("Sharp Scoop Device found at 0x%08x -> 0x%08x\n",(unsigned int)mem->start,(unsigned int)devptr->base);
 
@@ -164,29 +163,30 @@ int __init scoop_probe(struct device *dev)
        return 0;
 }
 
-static int scoop_remove(struct device *dev)
+static int scoop_remove(struct platform_device *pdev)
 {
-       struct scoop_dev *sdev = dev_get_drvdata(dev);
+       struct scoop_dev *sdev = platform_get_drvdata(pdev);
        if (sdev) {
                iounmap(sdev->base);
                kfree(sdev);
-               dev_set_drvdata(dev, NULL);
+               platform_set_drvdata(pdev, NULL);
        }
        return 0;
 }
 
-static struct device_driver scoop_driver = {
-       .name           = "sharp-scoop",
-       .bus            = &platform_bus_type,
+static struct platform_driver scoop_driver = {
        .probe          = scoop_probe,
        .remove         = scoop_remove,
        .suspend        = scoop_suspend,
        .resume         = scoop_resume,
+       .driver         = {
+               .name   = "sharp-scoop",
+       },
 };
 
 int __init scoop_init(void)
 {
-       return driver_register(&scoop_driver);
+       return platform_driver_register(&scoop_driver);
 }
 
 subsys_initcall(scoop_init);
index 4198677cd394c81cebbd5eb068e82fb4fc02e9fa..529f0f72e1e9ca60d5fde4cabf9ff2d9fa4543ef 100644 (file)
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.13
-# Mon Sep  5 18:07:12 2005
+# Linux kernel version: 2.6.14
+# Wed Nov  9 18:53:40 2005
 #
 CONFIG_ARM=y
 CONFIG_MMU=y
@@ -22,6 +22,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
 # General setup
 #
 CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 # CONFIG_POSIX_MQUEUE is not set
@@ -31,6 +32,7 @@ CONFIG_SYSCTL=y
 # CONFIG_HOTPLUG is not set
 CONFIG_KOBJECT_UEVENT=y
 # CONFIG_IKCONFIG is not set
+CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_EMBEDDED is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
@@ -59,6 +61,23 @@ CONFIG_OBSOLETE_MODPARM=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 # CONFIG_KMOD is not set
 
+#
+# Block layer
+#
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
 #
 # System Type
 #
@@ -81,6 +100,7 @@ CONFIG_OBSOLETE_MODPARM=y
 # CONFIG_ARCH_LH7A40X is not set
 CONFIG_ARCH_OMAP=y
 # CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_IMX is not set
 # CONFIG_ARCH_H720X is not set
 # CONFIG_ARCH_AAEC2000 is not set
@@ -112,7 +132,7 @@ CONFIG_OMAP_SERIAL_WAKE=y
 # OMAP Core Type
 #
 # CONFIG_ARCH_OMAP730 is not set
-# CONFIG_ARCH_OMAP1510 is not set
+# CONFIG_ARCH_OMAP15XX is not set
 CONFIG_ARCH_OMAP16XX=y
 
 #
@@ -177,6 +197,8 @@ CONFIG_FLATMEM_MANUAL=y
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
 # CONFIG_LEDS is not set
 CONFIG_ALIGNMENT_TRAP=y
 
@@ -258,13 +280,18 @@ CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_ESP is not set
 # CONFIG_INET_IPCOMP is not set
 # CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
 # CONFIG_TCP_CONG_ADVANCED is not set
 CONFIG_TCP_CONG_BIC=y
 # CONFIG_IPV6 is not set
 # CONFIG_NETFILTER is not set
 
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
 #
 # SCTP Configuration (EXPERIMENTAL)
 #
@@ -281,6 +308,10 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_NET_DIVERT is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
 # CONFIG_NET_SCHED is not set
 # CONFIG_NET_CLS_ROUTE is not set
 
@@ -291,6 +322,7 @@ CONFIG_TCP_CONG_BIC=y
 # CONFIG_HAMRADIO is not set
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
 
 #
 # Device Drivers
@@ -328,21 +360,13 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
 # CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
 CONFIG_ATA_OVER_ETH=m
 
 #
 # SCSI device support
 #
+# CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_PROC_FS=y
 
@@ -369,10 +393,12 @@ CONFIG_SCSI_PROC_FS=y
 # CONFIG_SCSI_SPI_ATTRS is not set
 # CONFIG_SCSI_FC_ATTRS is not set
 # CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
 
 #
 # SCSI low-level drivers
 #
+# CONFIG_ISCSI_TCP is not set
 # CONFIG_SCSI_SATA is not set
 # CONFIG_SCSI_DEBUG is not set
 
@@ -403,6 +429,11 @@ CONFIG_NETDEVICES=y
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
 
+#
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+
 #
 # Ethernet (10 or 100Mbit)
 #
@@ -439,6 +470,7 @@ CONFIG_PPP=y
 # CONFIG_PPP_SYNC_TTY is not set
 # CONFIG_PPP_DEFLATE is not set
 # CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPP_MPPE is not set
 # CONFIG_PPPOE is not set
 CONFIG_SLIP=y
 CONFIG_SLIP_COMPRESSED=y
@@ -541,24 +573,28 @@ CONFIG_WATCHDOG_NOWAYOUT=y
 #
 # TPM devices
 #
+# CONFIG_TELCLOCK is not set
 
 #
 # I2C support
 #
 # CONFIG_I2C is not set
-# CONFIG_I2C_SENSOR is not set
-CONFIG_ISP1301_OMAP=y
 
 #
 # Hardware Monitoring support
 #
 CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
 # CONFIG_HWMON_DEBUG_CHIP is not set
 
 #
 # Misc devices
 #
 
+#
+# Multimedia Capabilities Port drivers
+#
+
 #
 # Multimedia devices
 #
@@ -576,7 +612,6 @@ CONFIG_FB=y
 # CONFIG_FB_CFB_FILLRECT is not set
 # CONFIG_FB_CFB_COPYAREA is not set
 # CONFIG_FB_CFB_IMAGEBLIT is not set
-# CONFIG_FB_SOFT_CURSOR is not set
 # CONFIG_FB_MACMODES is not set
 CONFIG_FB_MODE_HELPERS=y
 # CONFIG_FB_TILEBLITTING is not set
@@ -589,6 +624,7 @@ CONFIG_FB_MODE_HELPERS=y
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
 CONFIG_FONTS=y
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
@@ -600,6 +636,7 @@ CONFIG_FONT_8x16=y
 # CONFIG_FONT_SUN8x16 is not set
 # CONFIG_FONT_SUN12x22 is not set
 # CONFIG_FONT_10x18 is not set
+# CONFIG_FONT_RL is not set
 
 #
 # Logo configuration
@@ -624,10 +661,10 @@ CONFIG_SOUND=y
 # Open Sound System
 #
 CONFIG_SOUND_PRIME=y
+# CONFIG_OBSOLETE_OSS_DRIVER is not set
 # CONFIG_SOUND_MSNDCLAS is not set
 # CONFIG_SOUND_MSNDPIN is not set
 # CONFIG_SOUND_OSS is not set
-# CONFIG_SOUND_AD1980 is not set
 
 #
 # USB support
@@ -636,23 +673,22 @@ CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
 # CONFIG_USB is not set
 
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
 #
 # USB Gadget Support
 #
-CONFIG_USB_GADGET=y
-# CONFIG_USB_GADGET_DEBUG_FILES is not set
-CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET is not set
 # CONFIG_USB_GADGET_NET2280 is not set
 # CONFIG_USB_GADGET_PXA2XX is not set
 # CONFIG_USB_GADGET_GOKU is not set
 # CONFIG_USB_GADGET_LH7A40X is not set
-CONFIG_USB_GADGET_OMAP=y
-CONFIG_USB_OMAP=y
+# CONFIG_USB_GADGET_OMAP is not set
 # CONFIG_USB_GADGET_DUMMY_HCD is not set
-# CONFIG_USB_GADGET_DUALSPEED is not set
 # CONFIG_USB_ZERO is not set
-CONFIG_USB_ETH=y
-CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_ETH is not set
 # CONFIG_USB_GADGETFS is not set
 # CONFIG_USB_FILE_STORAGE is not set
 # CONFIG_USB_G_SERIAL is not set
@@ -673,10 +709,6 @@ CONFIG_EXT2_FS=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
 # CONFIG_FS_POSIX_ACL is not set
-
-#
-# XFS support
-#
 # CONFIG_XFS_FS is not set
 # CONFIG_MINIX_FS is not set
 CONFIG_ROMFS_FS=y
@@ -685,6 +717,7 @@ CONFIG_INOTIFY=y
 CONFIG_DNOTIFY=y
 # CONFIG_AUTOFS_FS is not set
 # CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
 
 #
 # CD-ROM/DVD Filesystems
@@ -706,10 +739,10 @@ CONFIG_FAT_DEFAULT_CODEPAGE=437
 #
 CONFIG_PROC_FS=y
 CONFIG_SYSFS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
 # CONFIG_TMPFS is not set
 # CONFIG_HUGETLB_PAGE is not set
 CONFIG_RAMFS=y
+# CONFIG_RELAYFS_FS is not set
 
 #
 # Miscellaneous filesystems
@@ -750,6 +783,7 @@ CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_NCP_FS is not set
 # CONFIG_CODA_FS is not set
 # CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
 
 #
 # Partition Types
@@ -859,6 +893,7 @@ CONFIG_CRYPTO_DES=y
 # Library routines
 #
 # CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
 CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
index cb5e3708f118bcf9b01d65ffa9deac1381b2561f..fe797cf320bb488646d187c041452deac0223a14 100644 (file)
@@ -39,6 +39,7 @@ td3   .req    lr
 
                /* we must have at least one byte. */
                tst     buf, #1                 @ odd address?
+               movne   sum, sum, ror #8
                ldrneb  td0, [buf], #1
                subne   len, len, #1
                adcnes  sum, sum, td0, put_byte_1
@@ -103,6 +104,9 @@ ENTRY(csum_partial)
                cmp     len, #8                 @ Ensure that we have at least
                blo     .less8                  @ 8 bytes to copy.
 
+               tst     buf, #1
+               movne   sum, sum, ror #8
+
                adds    sum, sum, #0            @ C = 0
                tst     buf, #3                 @ Test destination alignment
                blne    .not_aligned            @ aligh destination, return here
index 89762a26495c02d1a3abb05a5cfcee69ab0110ee..385285851cb5cd6561f48cdd228201a3ffe94b76 100644 (file)
@@ -8,6 +8,16 @@ menu "Intel IXP4xx Implementation Options"
 
 comment "IXP4xx Platforms"
 
+# This entry is placed on top because otherwise it would have
+# been shown as a submenu.
+config MACH_NSLU2
+       bool
+       prompt "NSLU2" if !(MACH_IXDP465 || MACH_IXDPG425 || ARCH_IXDP425 || ARCH_ADI_COYOTE || ARCH_AVILA || ARCH_IXCDP1100 || ARCH_PRPMC1100 || MACH_GTWX5715)
+       help
+         Say 'Y' here if you want your kernel to support Linksys's
+         NSLU2 NAS device. For more information on this platform,
+         see http://www.nslu2-linux.org
+
 config ARCH_AVILA
        bool "Avila"
        help
index ddecbda4a633ee93f8a19d3c3ed56ab9cbd2275c..7a15629c18d0bd397fdbb09d928133b2c5a28774 100644 (file)
@@ -8,4 +8,5 @@ obj-$(CONFIG_ARCH_IXDP4XX)      += ixdp425-pci.o ixdp425-setup.o
 obj-$(CONFIG_MACH_IXDPG425)    += ixdpg425-pci.o coyote-setup.o
 obj-$(CONFIG_ARCH_ADI_COYOTE)  += coyote-pci.o coyote-setup.o
 obj-$(CONFIG_MACH_GTWX5715)    += gtwx5715-pci.o gtwx5715-setup.o
+obj-$(CONFIG_MACH_NSLU2)       += nslu2-pci.o nslu2-setup.o nslu2-power.o
 
diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c
new file mode 100644 (file)
index 0000000..a575f2e
--- /dev/null
@@ -0,0 +1,77 @@
+/*
+ * arch/arm/mach-ixp4xx/nslu2-pci.c
+ *
+ * NSLU2 board-level PCI initialization
+ *
+ * based on ixdp425-pci.c:
+ *     Copyright (C) 2002 Intel Corporation.
+ *     Copyright (C) 2003-2004 MontaVista Software, Inc.
+ *
+ * Maintainer: http://www.nslu2-linux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+
+#include <asm/mach/pci.h>
+#include <asm/mach-types.h>
+
+void __init nslu2_pci_preinit(void)
+{
+       set_irq_type(IRQ_NSLU2_PCI_INTA, IRQT_LOW);
+       set_irq_type(IRQ_NSLU2_PCI_INTB, IRQT_LOW);
+       set_irq_type(IRQ_NSLU2_PCI_INTC, IRQT_LOW);
+
+       gpio_line_isr_clear(NSLU2_PCI_INTA_PIN);
+       gpio_line_isr_clear(NSLU2_PCI_INTB_PIN);
+       gpio_line_isr_clear(NSLU2_PCI_INTC_PIN);
+
+       /* INTD is not configured as GPIO is used
+        * for the power input button.
+        */
+
+       ixp4xx_pci_preinit();
+}
+
+static int __init nslu2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+       static int pci_irq_table[NSLU2_PCI_IRQ_LINES] = {
+               IRQ_NSLU2_PCI_INTA,
+               IRQ_NSLU2_PCI_INTB,
+               IRQ_NSLU2_PCI_INTC,
+       };
+
+       int irq = -1;
+
+       if (slot >= 1 && slot <= NSLU2_PCI_MAX_DEV &&
+               pin >= 1 && pin <= NSLU2_PCI_IRQ_LINES) {
+                       irq = pci_irq_table[(slot + pin - 2) % NSLU2_PCI_IRQ_LINES];
+       }
+
+       return irq;
+}
+
+struct hw_pci __initdata nslu2_pci = {
+       .nr_controllers = 1,
+       .preinit        = nslu2_pci_preinit,
+       .swizzle        = pci_std_swizzle,
+       .setup          = ixp4xx_setup,
+       .scan           = ixp4xx_scan_bus,
+       .map_irq        = nslu2_map_irq,
+};
+
+int __init nslu2_pci_init(void) /* monkey see, monkey do */
+{
+       if (machine_is_nslu2())
+               pci_common_init(&nslu2_pci);
+
+       return 0;
+}
+
+subsys_initcall(nslu2_pci_init);
diff --git a/arch/arm/mach-ixp4xx/nslu2-power.c b/arch/arm/mach-ixp4xx/nslu2-power.c
new file mode 100644 (file)
index 0000000..18fbc8c
--- /dev/null
@@ -0,0 +1,92 @@
+/*
+ * arch/arm/mach-ixp4xx/nslu2-power.c
+ *
+ * NSLU2 Power/Reset driver
+ *
+ * Copyright (C) 2005 Tower Technologies
+ *
+ * based on nslu2-io.c
+ *  Copyright (C) 2004 Karen Spearel
+ *
+ * Author: Alessandro Zummo <a.zummo@towertech.it>
+ * Maintainers: http://www.nslu2-linux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/reboot.h>
+#include <linux/interrupt.h>
+
+#include <asm/mach-types.h>
+
+extern void ctrl_alt_del(void);
+
+static irqreturn_t nslu2_power_handler(int irq, void *dev_id, struct pt_regs *regs)
+{
+       /* Signal init to do the ctrlaltdel action, this will bypass init if
+        * it hasn't started and do a kernel_restart.
+        */
+       ctrl_alt_del();
+
+       return IRQ_HANDLED;
+}
+
+static irqreturn_t nslu2_reset_handler(int irq, void *dev_id, struct pt_regs *regs)
+{
+       /* This is the paper-clip reset, it shuts the machine down directly.
+        */
+       machine_power_off();
+
+       return IRQ_HANDLED;
+}
+
+static int __init nslu2_power_init(void)
+{
+       if (!(machine_is_nslu2()))
+               return 0;
+
+       *IXP4XX_GPIO_GPISR = 0x20400000;        /* read the 2 irqs to clr */
+
+       set_irq_type(NSLU2_RB_IRQ, IRQT_LOW);
+       set_irq_type(NSLU2_PB_IRQ, IRQT_HIGH);
+
+       gpio_line_isr_clear(NSLU2_RB_GPIO);
+       gpio_line_isr_clear(NSLU2_PB_GPIO);
+
+       if (request_irq(NSLU2_RB_IRQ, &nslu2_reset_handler,
+               SA_INTERRUPT, "NSLU2 reset button", NULL) < 0) {
+
+               printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
+                       NSLU2_RB_IRQ);
+
+               return -EIO;
+       }
+
+       if (request_irq(NSLU2_PB_IRQ, &nslu2_power_handler,
+               SA_INTERRUPT, "NSLU2 power button", NULL) < 0) {
+
+               printk(KERN_DEBUG "Power Button IRQ %d not available\n",
+                       NSLU2_PB_IRQ);
+
+               return -EIO;
+       }
+
+       return 0;
+}
+
+static void __exit nslu2_power_exit(void)
+{
+       free_irq(NSLU2_RB_IRQ, NULL);
+       free_irq(NSLU2_PB_IRQ, NULL);
+}
+
+module_init(nslu2_power_init);
+module_exit(nslu2_power_exit);
+
+MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
+MODULE_DESCRIPTION("NSLU2 Power/Reset driver");
+MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-ixp4xx/nslu2-setup.c b/arch/arm/mach-ixp4xx/nslu2-setup.c
new file mode 100644 (file)
index 0000000..289e94c
--- /dev/null
@@ -0,0 +1,134 @@
+/*
+ * arch/arm/mach-ixp4xx/nslu2-setup.c
+ *
+ * NSLU2 board-setup
+ *
+ * based ixdp425-setup.c:
+ *      Copyright (C) 2003-2004 MontaVista Software, Inc.
+ *
+ * Author: Mark Rakes <mrakes at mac.com>
+ * Maintainers: http://www.nslu2-linux.org/
+ *
+ * Fixed missing init_time in MACHINE_START kas11 10/22/04
+ * Changed to conform to new style __init ixdp425 kas11 10/22/04
+ */
+
+#include <linux/kernel.h>
+#include <linux/serial.h>
+#include <linux/serial_8250.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/flash.h>
+
+static struct flash_platform_data nslu2_flash_data = {
+       .map_name               = "cfi_probe",
+       .width                  = 2,
+};
+
+static struct resource nslu2_flash_resource = {
+       .start                  = NSLU2_FLASH_BASE,
+       .end                    = NSLU2_FLASH_BASE + NSLU2_FLASH_SIZE,
+       .flags                  = IORESOURCE_MEM,
+};
+
+static struct platform_device nslu2_flash = {
+       .name                   = "IXP4XX-Flash",
+       .id                     = 0,
+       .dev.platform_data      = &nslu2_flash_data,
+       .num_resources          = 1,
+       .resource               = &nslu2_flash_resource,
+};
+
+static struct ixp4xx_i2c_pins nslu2_i2c_gpio_pins = {
+       .sda_pin                = NSLU2_SDA_PIN,
+       .scl_pin                = NSLU2_SCL_PIN,
+};
+
+static struct platform_device nslu2_i2c_controller = {
+       .name                   = "IXP4XX-I2C",
+       .id                     = 0,
+       .dev.platform_data      = &nslu2_i2c_gpio_pins,
+       .num_resources          = 0,
+};
+
+static struct resource nslu2_uart_resources[] = {
+       {
+               .start          = IXP4XX_UART1_BASE_PHYS,
+               .end            = IXP4XX_UART1_BASE_PHYS + 0x0fff,
+               .flags          = IORESOURCE_MEM,
+       },
+       {
+               .start          = IXP4XX_UART2_BASE_PHYS,
+               .end            = IXP4XX_UART2_BASE_PHYS + 0x0fff,
+               .flags          = IORESOURCE_MEM,
+       }
+};
+
+static struct plat_serial8250_port nslu2_uart_data[] = {
+       {
+               .mapbase        = IXP4XX_UART1_BASE_PHYS,
+               .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
+               .irq            = IRQ_IXP4XX_UART1,
+               .flags          = UPF_BOOT_AUTOCONF,
+               .iotype         = UPIO_MEM,
+               .regshift       = 2,
+               .uartclk        = IXP4XX_UART_XTAL,
+       },
+       {
+               .mapbase        = IXP4XX_UART2_BASE_PHYS,
+               .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
+               .irq            = IRQ_IXP4XX_UART2,
+               .flags          = UPF_BOOT_AUTOCONF,
+               .iotype         = UPIO_MEM,
+               .regshift       = 2,
+               .uartclk        = IXP4XX_UART_XTAL,
+       },
+       { }
+};
+
+static struct platform_device nslu2_uart = {
+       .name                   = "serial8250",
+       .id                     = PLAT8250_DEV_PLATFORM,
+       .dev.platform_data      = nslu2_uart_data,
+       .num_resources          = 2,
+       .resource               = nslu2_uart_resources,
+};
+
+static struct platform_device *nslu2_devices[] __initdata = {
+       &nslu2_i2c_controller,
+       &nslu2_flash,
+       &nslu2_uart,
+};
+
+static void nslu2_power_off(void)
+{
+       /* This causes the box to drop the power and go dead. */
+
+       /* enable the pwr cntl gpio */
+       gpio_line_config(NSLU2_PO_GPIO, IXP4XX_GPIO_OUT);
+
+       /* do the deed */
+       gpio_line_set(NSLU2_PO_GPIO, IXP4XX_GPIO_HIGH);
+}
+
+static void __init nslu2_init(void)
+{
+       ixp4xx_sys_init();
+
+       pm_power_off = nslu2_power_off;
+
+       platform_add_devices(nslu2_devices, ARRAY_SIZE(nslu2_devices));
+}
+
+MACHINE_START(NSLU2, "Linksys NSLU2")
+       /* Maintainer: www.nslu2-linux.org */
+       .phys_ram       = PHYS_OFFSET,
+       .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
+       .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
+       .boot_params    = 0x00000100,
+       .map_io         = ixp4xx_map_io,
+       .init_irq       = ixp4xx_init_irq,
+       .timer          = &ixp4xx_timer,
+       .init_machine   = nslu2_init,
+MACHINE_END
index 27fc2e8e5fca6d07cfa6659bc9562279de7084ac..86a0f0d14345c345f392502f8e93ae9977e5e15f 100644 (file)
@@ -6,10 +6,10 @@ config ARCH_OMAP730
        bool "OMAP730 Based System"
        select ARCH_OMAP_OTG
 
-config ARCH_OMAP1510
+config ARCH_OMAP15XX
        depends on ARCH_OMAP1
        default y
-       bool "OMAP1510 Based System"
+       bool "OMAP15xx Based System"
 
 config ARCH_OMAP16XX
        depends on ARCH_OMAP1
@@ -21,7 +21,7 @@ comment "OMAP Board Type"
 
 config MACH_OMAP_INNOVATOR
        bool "TI Innovator"
-       depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX)
+       depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX)
        help
           TI OMAP 1510 or 1610 Innovator board support. Say Y here if you
           have such a board.
@@ -64,20 +64,30 @@ config MACH_OMAP_PERSEUS2
 
 config MACH_VOICEBLUE
        bool "Voiceblue"
-       depends on ARCH_OMAP1 && ARCH_OMAP1510
+       depends on ARCH_OMAP1 && ARCH_OMAP15XX
        help
          Support for Voiceblue GSM/VoIP gateway. Say Y here if you have
          such a board.
 
 config MACH_NETSTAR
        bool "NetStar"
-       depends on ARCH_OMAP1 && ARCH_OMAP1510
+       depends on ARCH_OMAP1 && ARCH_OMAP15XX
        help
          Support for NetStar PBX. Say Y here if you have such a board.
 
+config MACH_OMAP_PALMTE
+       bool "Palm Tungsten E"
+       depends on ARCH_OMAP1 && ARCH_OMAP15XX
+       help
+          Support for the Palm Tungsten E PDA. Currently only the LCD panel
+          is supported. To boot the kernel, you'll need a PalmOS compatible
+          bootloader; check out http://palmtelinux.sourceforge.net for more
+          informations.
+          Say Y here if you have such a PDA, say NO otherwise.
+
 config MACH_OMAP_GENERIC
        bool "Generic OMAP board"
-       depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX)
+       depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX)
        help
           Support for generic OMAP-1510, 1610 or 1710 board with
           no FPGA. Can be used as template for porting Linux to
@@ -121,32 +131,32 @@ config OMAP_ARM_182MHZ
 
 config OMAP_ARM_168MHZ
        bool "OMAP ARM 168 MHz CPU"
-       depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+       depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
        help
           Enable 168MHz clock for OMAP CPU. If unsure, say N.
 
 config OMAP_ARM_150MHZ
        bool "OMAP ARM 150 MHz CPU"
-       depends on ARCH_OMAP1 && ARCH_OMAP1510
+       depends on ARCH_OMAP1 && ARCH_OMAP15XX
        help
          Enable 150MHz clock for OMAP CPU. If unsure, say N.
 
 config OMAP_ARM_120MHZ
        bool "OMAP ARM 120 MHz CPU"
-       depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+       depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
        help
           Enable 120MHz clock for OMAP CPU. If unsure, say N.
 
 config OMAP_ARM_60MHZ
        bool "OMAP ARM 60 MHz CPU"
-       depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+       depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
         default y
        help
           Enable 60MHz clock for OMAP CPU. If unsure, say Y.
 
 config OMAP_ARM_30MHZ
        bool "OMAP ARM 30 MHz CPU"
-       depends on ARCH_OMAP1 && (ARCH_OMAP1510 || ARCH_OMAP16XX || ARCH_OMAP730)
+       depends on ARCH_OMAP1 && (ARCH_OMAP15XX || ARCH_OMAP16XX || ARCH_OMAP730)
        help
           Enable 30MHz clock for OMAP CPU. If unsure, say N.
 
index 181a93deaaee4fa9cca5cbd5fbbca498e0930f3f..b0b00156faaefbaf00296bdc0856a427b13596d8 100644 (file)
@@ -3,7 +3,7 @@
 #
 
 # Common support
-obj-y := io.o id.o irq.o time.o serial.o devices.o
+obj-y := io.o id.o clock.o irq.o time.o mux.o serial.o devices.o
 led-y := leds.o
 
 # Specific board support
@@ -15,8 +15,9 @@ obj-$(CONFIG_MACH_OMAP_OSK)           += board-osk.o
 obj-$(CONFIG_MACH_OMAP_H3)             += board-h3.o
 obj-$(CONFIG_MACH_VOICEBLUE)           += board-voiceblue.o
 obj-$(CONFIG_MACH_NETSTAR)             += board-netstar.o
+obj-$(CONFIG_MACH_OMAP_PALMTE)         += board-palmte.o
 
-ifeq ($(CONFIG_ARCH_OMAP1510),y)
+ifeq ($(CONFIG_ARCH_OMAP15XX),y)
 # Innovator-1510 FPGA
 obj-$(CONFIG_MACH_OMAP_INNOVATOR)      += fpga.o
 endif
index c209c7172a9aedf295c725e5ecf79bbb0b8ea02f..4b292e93fbe23563e2a6d8297cad7a3d68427581 100644 (file)
@@ -15,7 +15,7 @@
 
 #include <linux/kernel.h>
 #include <linux/init.h>
-#include <linux/device.h>
+#include <linux/platform_device.h>
 
 #include <asm/hardware.h>
 #include <asm/mach-types.h>
@@ -28,8 +28,6 @@
 #include <asm/arch/board.h>
 #include <asm/arch/common.h>
 
-static int __initdata generic_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
-
 static void __init omap_generic_init_irq(void)
 {
        omap_init_irq();
@@ -37,7 +35,7 @@ static void __init omap_generic_init_irq(void)
 
 /* assume no Mini-AB port */
 
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 static struct omap_usb_config generic1510_usb_config __initdata = {
        .register_host  = 1,
        .register_dev   = 1,
@@ -76,21 +74,19 @@ static struct omap_mmc_config generic_mmc_config __initdata = {
 
 #endif
 
+static struct omap_uart_config generic_uart_config __initdata = {
+       .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+
 static struct omap_board_config_kernel generic_config[] = {
        { OMAP_TAG_USB,           NULL },
        { OMAP_TAG_MMC,           &generic_mmc_config },
+       { OMAP_TAG_UART,        &generic_uart_config },
 };
 
 static void __init omap_generic_init(void)
 {
-       const struct omap_uart_config *uart_conf;
-
-       /*
-        * Make sure the serial ports are muxed on at this point.
-        * You have to mux them off in device drivers later on
-        * if not needed.
-        */
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                generic_config[0].data = &generic1510_usb_config;
        }
@@ -101,20 +97,9 @@ static void __init omap_generic_init(void)
        }
 #endif
 
-       uart_conf = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
-       if (uart_conf != NULL) {
-               unsigned int enabled_ports, i;
-
-               enabled_ports = uart_conf->enabled_uarts;
-               for (i = 0; i < 3; i++) {
-                       if (!(enabled_ports & (1 << i)))
-                               generic_serial_ports[i] = 0;
-               }
-       }
-
        omap_board_config = generic_config;
        omap_board_config_size = ARRAY_SIZE(generic_config);
-       omap_serial_init(generic_serial_ports);
+       omap_serial_init();
 }
 
 static void __init omap_generic_map_io(void)
index 4ee6bd8a50b8b105699e4c5698883bcd4526647f..a07e2c9307fa338896ecca300dc88033a8922885 100644 (file)
@@ -40,8 +40,6 @@
 
 extern int omap_gpio_init(void);
 
-static int __initdata h2_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
-
 static struct mtd_partition h2_partitions[] = {
        /* bootloader (U-Boot, etc) in first sector */
        {
@@ -160,9 +158,20 @@ static struct omap_mmc_config h2_mmc_config __initdata = {
        },
 };
 
+static struct omap_uart_config h2_uart_config __initdata = {
+       .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+
+static struct omap_lcd_config h2_lcd_config __initdata = {
+       .panel_name     = "h2",
+       .ctrl_name      = "internal",
+};
+
 static struct omap_board_config_kernel h2_config[] = {
        { OMAP_TAG_USB,           &h2_usb_config },
        { OMAP_TAG_MMC,           &h2_mmc_config },
+       { OMAP_TAG_UART,        &h2_uart_config },
+       { OMAP_TAG_LCD,         &h2_lcd_config },
 };
 
 static void __init h2_init(void)
@@ -180,12 +189,12 @@ static void __init h2_init(void)
        platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
        omap_board_config = h2_config;
        omap_board_config_size = ARRAY_SIZE(h2_config);
+       omap_serial_init();
 }
 
 static void __init h2_map_io(void)
 {
        omap_map_common_io();
-       omap_serial_init(h2_serial_ports);
 }
 
 MACHINE_START(OMAP_H2, "TI-H2")
index fc824361430d86951f184e8b23f82cee8ee07928..668e278433c28701762f28b9531b0ecc489406f8 100644 (file)
@@ -41,8 +41,6 @@
 
 extern int omap_gpio_init(void);
 
-static int __initdata h3_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
-
 static struct mtd_partition h3_partitions[] = {
        /* bootloader (U-Boot, etc) in first sector */
        {
@@ -168,9 +166,20 @@ static struct omap_mmc_config h3_mmc_config __initdata = {
        },
 };
 
+static struct omap_uart_config h3_uart_config __initdata = {
+       .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+
+static struct omap_lcd_config h3_lcd_config __initdata = {
+       .panel_name     = "h3",
+       .ctrl_name      = "internal",
+};
+
 static struct omap_board_config_kernel h3_config[] = {
-       { OMAP_TAG_USB,  &h3_usb_config },
-       { OMAP_TAG_MMC,  &h3_mmc_config },
+       { OMAP_TAG_USB,         &h3_usb_config },
+       { OMAP_TAG_MMC,         &h3_mmc_config },
+       { OMAP_TAG_UART,        &h3_uart_config },
+       { OMAP_TAG_LCD,         &h3_lcd_config },
 };
 
 static void __init h3_init(void)
@@ -180,6 +189,7 @@ static void __init h3_init(void)
        (void) platform_add_devices(devices, ARRAY_SIZE(devices));
        omap_board_config = h3_config;
        omap_board_config_size = ARRAY_SIZE(h3_config);
+       omap_serial_init();
 }
 
 static void __init h3_init_smc91x(void)
@@ -201,7 +211,6 @@ void h3_init_irq(void)
 static void __init h3_map_io(void)
 {
        omap_map_common_io();
-       omap_serial_init(h3_serial_ports);
 }
 
 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
index a2eac853b2da863fe0f0a59c4bfc90dafa6c092f..95f1ff36cdcbc0b3e81ee5a2f7f298bcf35c7d05 100644 (file)
@@ -36,8 +36,6 @@
 #include <asm/arch/usb.h>
 #include <asm/arch/common.h>
 
-static int __initdata innovator_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
-
 static struct mtd_partition innovator_partitions[] = {
        /* bootloader (U-Boot, etc) in first sector */
        {
@@ -99,7 +97,7 @@ static struct platform_device innovator_flash_device = {
        .resource       = &innovator_flash_resource,
 };
 
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 
 /* Only FPGA needs to be mapped here. All others are done with ioremap */
 static struct map_desc innovator1510_io_desc[] __initdata = {
@@ -136,7 +134,7 @@ static struct platform_device *innovator1510_devices[] __initdata = {
        &innovator1510_smc91x_device,
 };
 
-#endif /* CONFIG_ARCH_OMAP1510 */
+#endif /* CONFIG_ARCH_OMAP15XX */
 
 #ifdef CONFIG_ARCH_OMAP16XX
 
@@ -185,7 +183,7 @@ void innovator_init_irq(void)
 {
        omap_init_irq();
        omap_gpio_init();
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                omap1510_fpga_init_irq();
        }
@@ -193,7 +191,7 @@ void innovator_init_irq(void)
        innovator_init_smc91x();
 }
 
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 static struct omap_usb_config innovator1510_usb_config __initdata = {
        /* for bundled non-standard host and peripheral cables */
        .hmc_mode       = 4,
@@ -205,6 +203,11 @@ static struct omap_usb_config innovator1510_usb_config __initdata = {
        .register_dev   = 1,
        .pins[0]        = 2,
 };
+
+static struct omap_lcd_config innovator1510_lcd_config __initdata = {
+       .panel_name     = "inn1510",
+       .ctrl_name      = "internal",
+};
 #endif
 
 #ifdef CONFIG_ARCH_OMAP16XX
@@ -222,6 +225,11 @@ static struct omap_usb_config h2_usb_config __initdata = {
 
        .pins[1]        = 3,
 };
+
+static struct omap_lcd_config innovator1610_lcd_config __initdata = {
+       .panel_name     = "inn1610",
+       .ctrl_name      = "internal",
+};
 #endif
 
 static struct omap_mmc_config innovator_mmc_config __initdata = {
@@ -234,14 +242,20 @@ static struct omap_mmc_config innovator_mmc_config __initdata = {
        },
 };
 
+static struct omap_uart_config innovator_uart_config __initdata = {
+       .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+
 static struct omap_board_config_kernel innovator_config[] = {
        { OMAP_TAG_USB,         NULL },
+       { OMAP_TAG_LCD,         NULL },
        { OMAP_TAG_MMC,         &innovator_mmc_config },
+       { OMAP_TAG_UART,        &innovator_uart_config },
 };
 
 static void __init innovator_init(void)
 {
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                platform_add_devices(innovator1510_devices, ARRAY_SIZE(innovator1510_devices));
        }
@@ -252,23 +266,28 @@ static void __init innovator_init(void)
        }
 #endif
 
-#ifdef CONFIG_ARCH_OMAP1510
-       if (cpu_is_omap1510())
+#ifdef CONFIG_ARCH_OMAP15XX
+       if (cpu_is_omap1510()) {
                innovator_config[0].data = &innovator1510_usb_config;
+               innovator_config[1].data = &innovator1510_lcd_config;
+       }
 #endif
 #ifdef CONFIG_ARCH_OMAP16XX
-       if (cpu_is_omap1610())
+       if (cpu_is_omap1610()) {
                innovator_config[0].data = &h2_usb_config;
+               innovator_config[1].data = &innovator1610_lcd_config;
+       }
 #endif
        omap_board_config = innovator_config;
        omap_board_config_size = ARRAY_SIZE(innovator_config);
+       omap_serial_init();
 }
 
 static void __init innovator_map_io(void)
 {
        omap_map_common_io();
 
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                iotable_init(innovator1510_io_desc, ARRAY_SIZE(innovator1510_io_desc));
                udelay(10);     /* Delay needed for FPGA */
@@ -280,7 +299,6 @@ static void __init innovator_map_io(void)
                       fpga_read(OMAP1510_FPGA_BOARD_REV));
        }
 #endif
-       omap_serial_init(innovator_serial_ports);
 }
 
 MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
index c851c2e4dfcb74cc97f988feb93308f53d159500..0448fa7de8a416a48cd1977f29858be54e67c078 100644 (file)
@@ -55,6 +55,14 @@ static struct platform_device *netstar_devices[] __initdata = {
        &netstar_smc91x_device,
 };
 
+static struct omap_uart_config netstar_uart_config __initdata = {
+       .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+
+static struct omap_board_config_kernel netstar_config[] = {
+       { OMAP_TAG_UART,        &netstar_uart_config },
+};
+
 static void __init netstar_init_irq(void)
 {
        omap_init_irq();
@@ -92,14 +100,15 @@ static void __init netstar_init(void)
        /* Switch off red LED */
        omap_writeb(0x00, OMAP_LPG1_PMR);       /* Disable clock */
        omap_writeb(0x80, OMAP_LPG1_LCR);
-}
 
-static int __initdata omap_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
+       omap_board_config = netstar_config;
+       omap_board_config_size = ARRAY_SIZE(netstar_config);
+       omap_serial_init();
+}
 
 static void __init netstar_map_io(void)
 {
        omap_map_common_io();
-       omap_serial_init(omap_serial_ports);
 }
 
 #define MACHINE_PANICED                1
index a88524e7c315ba1f95a423f5408d5250214cf540..e990e1bc16696cea8e0b53e1b48409c72e33fbb5 100644 (file)
@@ -46,8 +46,6 @@
 #include <asm/arch/tc.h>
 #include <asm/arch/common.h>
 
-static int __initdata osk_serial_ports[OMAP_MAX_NR_PORTS] = {1, 0, 0};
-
 static struct mtd_partition osk_partitions[] = {
        /* bootloader (U-Boot, etc) in first sector */
        {
@@ -155,7 +153,7 @@ static void __init osk_init_smc91x(void)
        }
 
        /* Check EMIFS wait states to fix errors with SMC_GET_PKT_HDR */
-       EMIFS_CCS(1) |= 0x2;
+       EMIFS_CCS(1) |= 0x3;
 }
 
 static void __init osk_init_cf(void)
@@ -193,8 +191,19 @@ static struct omap_usb_config osk_usb_config __initdata = {
        .pins[0]        = 2,
 };
 
+static struct omap_uart_config osk_uart_config __initdata = {
+       .enabled_uarts = (1 << 0),
+};
+
+static struct omap_lcd_config osk_lcd_config __initdata = {
+       .panel_name     = "osk",
+       .ctrl_name      = "internal",
+};
+
 static struct omap_board_config_kernel osk_config[] = {
        { OMAP_TAG_USB,           &osk_usb_config },
+       { OMAP_TAG_UART,                &osk_uart_config },
+       { OMAP_TAG_LCD,                 &osk_lcd_config },
 };
 
 #ifdef CONFIG_OMAP_OSK_MISTRAL
@@ -254,13 +263,13 @@ static void __init osk_init(void)
        omap_board_config_size = ARRAY_SIZE(osk_config);
        USB_TRANSCEIVER_CTRL_REG |= (3 << 1);
 
+       omap_serial_init();
        osk_mistral_init();
 }
 
 static void __init osk_map_io(void)
 {
        omap_map_common_io();
-       omap_serial_init(osk_serial_ports);
 }
 
 MACHINE_START(OMAP_OSK, "TI-OSK")
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
new file mode 100644 (file)
index 0000000..540b20d
--- /dev/null
@@ -0,0 +1,87 @@
+/*
+ * linux/arch/arm/mach-omap1/board-palmte.c
+ *
+ * Modified from board-generic.c
+ *
+ * Support for the Palm Tungsten E PDA.
+ *
+ * Original version : Laurent Gonzalez
+ *
+ * Maintainters : http://palmtelinux.sf.net
+ *                palmtelinux-developpers@lists.sf.net
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/notifier.h>
+
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/gpio.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/usb.h>
+#include <asm/arch/board.h>
+#include <asm/arch/common.h>
+#include <asm/hardware/clock.h>
+
+static void __init omap_generic_init_irq(void)
+{
+       omap_init_irq();
+}
+
+static struct omap_usb_config palmte_usb_config __initdata = {
+       .register_dev   = 1,
+       .hmc_mode       = 0,
+       .pins[0]        = 3,
+};
+
+static struct omap_mmc_config palmte_mmc_config __initdata = {
+       .mmc [0] = {
+               .enabled        = 1,
+               .wire4          = 1,
+               .wp_pin         = OMAP_MPUIO(3),
+               .power_pin      = -1,
+               .switch_pin     = -1,
+       },
+};
+
+static struct omap_lcd_config palmte_lcd_config __initdata = {
+       .panel_name     = "palmte",
+       .ctrl_name      = "internal",
+};
+
+static struct omap_board_config_kernel palmte_config[] = {
+       { OMAP_TAG_USB, &palmte_usb_config },
+       { OMAP_TAG_MMC, &palmte_mmc_config },
+       { OMAP_TAG_LCD, &palmte_lcd_config },
+};
+
+static void __init omap_generic_init(void)
+{
+       omap_board_config = palmte_config;
+       omap_board_config_size = ARRAY_SIZE(palmte_config);
+}
+
+static void __init omap_generic_map_io(void)
+{
+       omap_map_common_io();
+}
+
+MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
+       .phys_ram       = 0x10000000,
+       .phys_io        = 0xfff00000,
+       .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
+       .boot_params    = 0x10000100,
+       .map_io         = omap_generic_map_io,
+       .init_irq       = omap_generic_init_irq,
+       .init_machine   = omap_generic_init,
+       .timer          = &omap_timer,
+MACHINE_END
index 354b157acb3a2071193c450630e846618db69020..bd900b7ab33cfdde0335252d376ad3209db16732 100644 (file)
@@ -29,6 +29,7 @@
 #include <asm/arch/mux.h>
 #include <asm/arch/fpga.h>
 #include <asm/arch/common.h>
+#include <asm/arch/board.h>
 
 static struct resource smc91x_resources[] = {
        [0] = {
@@ -43,8 +44,6 @@ static struct resource smc91x_resources[] = {
        },
 };
 
-static int __initdata p2_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 0};
-
 static struct mtd_partition p2_partitions[] = {
        /* bootloader (U-Boot, etc) in first sector */
        {
@@ -111,9 +110,27 @@ static struct platform_device *devices[] __initdata = {
        &smc91x_device,
 };
 
+static struct omap_uart_config perseus2_uart_config __initdata = {
+       .enabled_uarts = ((1 << 0) | (1 << 1)),
+};
+
+static struct omap_lcd_config perseus2_lcd_config __initdata = {
+       .panel_name     = "p2",
+       .ctrl_name      = "internal",
+};
+
+static struct omap_board_config_kernel perseus2_config[] = {
+       { OMAP_TAG_UART,        &perseus2_uart_config },
+       { OMAP_TAG_LCD,         &perseus2_lcd_config },
+};
+
 static void __init omap_perseus2_init(void)
 {
        (void) platform_add_devices(devices, ARRAY_SIZE(devices));
+
+       omap_board_config = perseus2_config;
+       omap_board_config_size = ARRAY_SIZE(perseus2_config);
+       omap_serial_init();
 }
 
 static void __init perseus2_init_smc91x(void)
@@ -131,7 +148,6 @@ void omap_perseus2_init_irq(void)
        omap_gpio_init();
        perseus2_init_smc91x();
 }
-
 /* Only FPGA needs to be mapped here. All others are done with ioremap */
 static struct map_desc omap_perseus2_io_desc[] __initdata = {
        {
@@ -179,7 +195,6 @@ static void __init omap_perseus2_map_io(void)
         * It is used as the Ethernet controller interrupt
         */
        omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
-       omap_serial_init(p2_serial_ports);
 }
 
 MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
index 3f018b296861e4def60cd01df13fb470a4fefd54..6f9a6220e78ac587254162fcb92651af2f4bdd42 100644 (file)
@@ -150,9 +150,14 @@ static struct omap_mmc_config voiceblue_mmc_config __initdata = {
        },
 };
 
+static struct omap_uart_config voiceblue_uart_config __initdata = {
+       .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
+};
+
 static struct omap_board_config_kernel voiceblue_config[] = {
        { OMAP_TAG_USB, &voiceblue_usb_config },
        { OMAP_TAG_MMC, &voiceblue_mmc_config },
+       { OMAP_TAG_UART,        &voiceblue_uart_config },
 };
 
 static void __init voiceblue_init_irq(void)
@@ -191,6 +196,7 @@ static void __init voiceblue_init(void)
        platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
        omap_board_config = voiceblue_config;
        omap_board_config_size = ARRAY_SIZE(voiceblue_config);
+       omap_serial_init();
 
        /* There is a good chance board is going up, so enable power LED
         * (it is connected through invertor) */
@@ -198,12 +204,9 @@ static void __init voiceblue_init(void)
        omap_writeb(0x00, OMAP_LPG1_PMR);       /* Disable clock */
 }
 
-static int __initdata omap_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 1};
-
 static void __init voiceblue_map_io(void)
 {
        omap_map_common_io();
-       omap_serial_init(omap_serial_ports);
 }
 
 #define MACHINE_PANICED                1
diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c
new file mode 100644 (file)
index 0000000..4277eee
--- /dev/null
@@ -0,0 +1,792 @@
+/*
+ *  linux/arch/arm/mach-omap1/clock.c
+ *
+ *  Copyright (C) 2004 - 2005 Nokia corporation
+ *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
+ *
+ *  Modified to use omap shared clock framework by
+ *  Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+
+#include <asm/io.h>
+#include <asm/hardware/clock.h>
+
+#include <asm/arch/usb.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sram.h>
+
+#include "clock.h"
+
+__u32 arm_idlect1_mask;
+
+/*-------------------------------------------------------------------------
+ * Omap1 specific clock functions
+ *-------------------------------------------------------------------------*/
+
+static void omap1_watchdog_recalc(struct clk * clk)
+{
+       clk->rate = clk->parent->rate / 14;
+}
+
+static void omap1_uart_recalc(struct clk * clk)
+{
+       unsigned int val = omap_readl(clk->enable_reg);
+       if (val & clk->enable_bit)
+               clk->rate = 48000000;
+       else
+               clk->rate = 12000000;
+}
+
+static int omap1_clk_enable_dsp_domain(struct clk *clk)
+{
+       int retval;
+
+       retval = omap1_clk_use(&api_ck.clk);
+       if (!retval) {
+               retval = omap1_clk_enable(clk);
+               omap1_clk_unuse(&api_ck.clk);
+       }
+
+       return retval;
+}
+
+static void omap1_clk_disable_dsp_domain(struct clk *clk)
+{
+       if (omap1_clk_use(&api_ck.clk) == 0) {
+               omap1_clk_disable(clk);
+               omap1_clk_unuse(&api_ck.clk);
+       }
+}
+
+static int omap1_clk_enable_uart_functional(struct clk *clk)
+{
+       int ret;
+       struct uart_clk *uclk;
+
+       ret = omap1_clk_enable(clk);
+       if (ret == 0) {
+               /* Set smart idle acknowledgement mode */
+               uclk = (struct uart_clk *)clk;
+               omap_writeb((omap_readb(uclk->sysc_addr) & ~0x10) | 8,
+                           uclk->sysc_addr);
+       }
+
+       return ret;
+}
+
+static void omap1_clk_disable_uart_functional(struct clk *clk)
+{
+       struct uart_clk *uclk;
+
+       /* Set force idle acknowledgement mode */
+       uclk = (struct uart_clk *)clk;
+       omap_writeb((omap_readb(uclk->sysc_addr) & ~0x18), uclk->sysc_addr);
+
+       omap1_clk_disable(clk);
+}
+
+static void omap1_clk_allow_idle(struct clk *clk)
+{
+       struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
+
+       if (!(clk->flags & CLOCK_IDLE_CONTROL))
+               return;
+
+       if (iclk->no_idle_count > 0 && !(--iclk->no_idle_count))
+               arm_idlect1_mask |= 1 << iclk->idlect_shift;
+}
+
+static void omap1_clk_deny_idle(struct clk *clk)
+{
+       struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk;
+
+       if (!(clk->flags & CLOCK_IDLE_CONTROL))
+               return;
+
+       if (iclk->no_idle_count++ == 0)
+               arm_idlect1_mask &= ~(1 << iclk->idlect_shift);
+}
+
+static __u16 verify_ckctl_value(__u16 newval)
+{
+       /* This function checks for following limitations set
+        * by the hardware (all conditions must be true):
+        * DSPMMU_CK == DSP_CK  or  DSPMMU_CK == DSP_CK/2
+        * ARM_CK >= TC_CK
+        * DSP_CK >= TC_CK
+        * DSPMMU_CK >= TC_CK
+        *
+        * In addition following rules are enforced:
+        * LCD_CK <= TC_CK
+        * ARMPER_CK <= TC_CK
+        *
+        * However, maximum frequencies are not checked for!
+        */
+       __u8 per_exp;
+       __u8 lcd_exp;
+       __u8 arm_exp;
+       __u8 dsp_exp;
+       __u8 tc_exp;
+       __u8 dspmmu_exp;
+
+       per_exp = (newval >> CKCTL_PERDIV_OFFSET) & 3;
+       lcd_exp = (newval >> CKCTL_LCDDIV_OFFSET) & 3;
+       arm_exp = (newval >> CKCTL_ARMDIV_OFFSET) & 3;
+       dsp_exp = (newval >> CKCTL_DSPDIV_OFFSET) & 3;
+       tc_exp = (newval >> CKCTL_TCDIV_OFFSET) & 3;
+       dspmmu_exp = (newval >> CKCTL_DSPMMUDIV_OFFSET) & 3;
+
+       if (dspmmu_exp < dsp_exp)
+               dspmmu_exp = dsp_exp;
+       if (dspmmu_exp > dsp_exp+1)
+               dspmmu_exp = dsp_exp+1;
+       if (tc_exp < arm_exp)
+               tc_exp = arm_exp;
+       if (tc_exp < dspmmu_exp)
+               tc_exp = dspmmu_exp;
+       if (tc_exp > lcd_exp)
+               lcd_exp = tc_exp;
+       if (tc_exp > per_exp)
+               per_exp = tc_exp;
+
+       newval &= 0xf000;
+       newval |= per_exp << CKCTL_PERDIV_OFFSET;
+       newval |= lcd_exp << CKCTL_LCDDIV_OFFSET;
+       newval |= arm_exp << CKCTL_ARMDIV_OFFSET;
+       newval |= dsp_exp << CKCTL_DSPDIV_OFFSET;
+       newval |= tc_exp << CKCTL_TCDIV_OFFSET;
+       newval |= dspmmu_exp << CKCTL_DSPMMUDIV_OFFSET;
+
+       return newval;
+}
+
+static int calc_dsor_exp(struct clk *clk, unsigned long rate)
+{
+       /* Note: If target frequency is too low, this function will return 4,
+        * which is invalid value. Caller must check for this value and act
+        * accordingly.
+        *
+        * Note: This function does not check for following limitations set
+        * by the hardware (all conditions must be true):
+        * DSPMMU_CK == DSP_CK  or  DSPMMU_CK == DSP_CK/2
+        * ARM_CK >= TC_CK
+        * DSP_CK >= TC_CK
+        * DSPMMU_CK >= TC_CK
+        */
+       unsigned long realrate;
+       struct clk * parent;
+       unsigned  dsor_exp;
+
+       if (unlikely(!(clk->flags & RATE_CKCTL)))
+               return -EINVAL;
+
+       parent = clk->parent;
+       if (unlikely(parent == 0))
+               return -EIO;
+
+       realrate = parent->rate;
+       for (dsor_exp=0; dsor_exp<4; dsor_exp++) {
+               if (realrate <= rate)
+                       break;
+
+               realrate /= 2;
+       }
+
+       return dsor_exp;
+}
+
+static void omap1_ckctl_recalc(struct clk * clk)
+{
+       int dsor;
+
+       /* Calculate divisor encoded as 2-bit exponent */
+       dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset));
+
+       if (unlikely(clk->rate == clk->parent->rate / dsor))
+               return; /* No change, quick exit */
+       clk->rate = clk->parent->rate / dsor;
+
+       if (unlikely(clk->flags & RATE_PROPAGATES))
+               propagate_rate(clk);
+}
+
+static void omap1_ckctl_recalc_dsp_domain(struct clk * clk)
+{
+       int dsor;
+
+       /* Calculate divisor encoded as 2-bit exponent
+        *
+        * The clock control bits are in DSP domain,
+        * so api_ck is needed for access.
+        * Note that DSP_CKCTL virt addr = phys addr, so
+        * we must use __raw_readw() instead of omap_readw().
+        */
+       omap1_clk_use(&api_ck.clk);
+       dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset));
+       omap1_clk_unuse(&api_ck.clk);
+
+       if (unlikely(clk->rate == clk->parent->rate / dsor))
+               return; /* No change, quick exit */
+       clk->rate = clk->parent->rate / dsor;
+
+       if (unlikely(clk->flags & RATE_PROPAGATES))
+               propagate_rate(clk);
+}
+
+/* MPU virtual clock functions */
+static int omap1_select_table_rate(struct clk * clk, unsigned long rate)
+{
+       /* Find the highest supported frequency <= rate and switch to it */
+       struct mpu_rate * ptr;
+
+       if (clk != &virtual_ck_mpu)
+               return -EINVAL;
+
+       for (ptr = rate_table; ptr->rate; ptr++) {
+               if (ptr->xtal != ck_ref.rate)
+                       continue;
+
+               /* DPLL1 cannot be reprogrammed without risking system crash */
+               if (likely(ck_dpll1.rate!=0) && ptr->pll_rate != ck_dpll1.rate)
+                       continue;
+
+               /* Can check only after xtal frequency check */
+               if (ptr->rate <= rate)
+                       break;
+       }
+
+       if (!ptr->rate)
+               return -EINVAL;
+
+       /*
+        * In most cases we should not need to reprogram DPLL.
+        * Reprogramming the DPLL is tricky, it must be done from SRAM.
+        */
+       omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val);
+
+       ck_dpll1.rate = ptr->pll_rate;
+       propagate_rate(&ck_dpll1);
+       return 0;
+}
+
+static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate)
+{
+       int  ret = -EINVAL;
+       int  dsor_exp;
+       __u16  regval;
+
+       if (clk->flags & RATE_CKCTL) {
+               dsor_exp = calc_dsor_exp(clk, rate);
+               if (dsor_exp > 3)
+                       dsor_exp = -EINVAL;
+               if (dsor_exp < 0)
+                       return dsor_exp;
+
+               regval = __raw_readw(DSP_CKCTL);
+               regval &= ~(3 << clk->rate_offset);
+               regval |= dsor_exp << clk->rate_offset;
+               __raw_writew(regval, DSP_CKCTL);
+               clk->rate = clk->parent->rate / (1 << dsor_exp);
+               ret = 0;
+       }
+
+       if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
+               propagate_rate(clk);
+
+       return ret;
+}
+
+static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate)
+{
+       /* Find the highest supported frequency <= rate */
+       struct mpu_rate * ptr;
+       long  highest_rate;
+
+       if (clk != &virtual_ck_mpu)
+               return -EINVAL;
+
+       highest_rate = -EINVAL;
+
+       for (ptr = rate_table; ptr->rate; ptr++) {
+               if (ptr->xtal != ck_ref.rate)
+                       continue;
+
+               highest_rate = ptr->rate;
+
+               /* Can check only after xtal frequency check */
+               if (ptr->rate <= rate)
+                       break;
+       }
+
+       return highest_rate;
+}
+
+static unsigned calc_ext_dsor(unsigned long rate)
+{
+       unsigned dsor;
+
+       /* MCLK and BCLK divisor selection is not linear:
+        * freq = 96MHz / dsor
+        *
+        * RATIO_SEL range: dsor <-> RATIO_SEL
+        * 0..6: (RATIO_SEL+2) <-> (dsor-2)
+        * 6..48:  (8+(RATIO_SEL-6)*2) <-> ((dsor-8)/2+6)
+        * Minimum dsor is 2 and maximum is 96. Odd divisors starting from 9
+        * can not be used.
+        */
+       for (dsor = 2; dsor < 96; ++dsor) {
+               if ((dsor & 1) && dsor > 8)
+                       continue;
+               if (rate >= 96000000 / dsor)
+                       break;
+       }
+       return dsor;
+}
+
+/* Only needed on 1510 */
+static int omap1_set_uart_rate(struct clk * clk, unsigned long rate)
+{
+       unsigned int val;
+
+       val = omap_readl(clk->enable_reg);
+       if (rate == 12000000)
+               val &= ~(1 << clk->enable_bit);
+       else if (rate == 48000000)
+               val |= (1 << clk->enable_bit);
+       else
+               return -EINVAL;
+       omap_writel(val, clk->enable_reg);
+       clk->rate = rate;
+
+       return 0;
+}
+
+/* External clock (MCLK & BCLK) functions */
+static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate)
+{
+       unsigned dsor;
+       __u16 ratio_bits;
+
+       dsor = calc_ext_dsor(rate);
+       clk->rate = 96000000 / dsor;
+       if (dsor > 8)
+               ratio_bits = ((dsor - 8) / 2 + 6) << 2;
+       else
+               ratio_bits = (dsor - 2) << 2;
+
+       ratio_bits |= omap_readw(clk->enable_reg) & ~0xfd;
+       omap_writew(ratio_bits, clk->enable_reg);
+
+       return 0;
+}
+
+static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate)
+{
+       return 96000000 / calc_ext_dsor(rate);
+}
+
+static void omap1_init_ext_clk(struct clk * clk)
+{
+       unsigned dsor;
+       __u16 ratio_bits;
+
+       /* Determine current rate and ensure clock is based on 96MHz APLL */
+       ratio_bits = omap_readw(clk->enable_reg) & ~1;
+       omap_writew(ratio_bits, clk->enable_reg);
+
+       ratio_bits = (ratio_bits & 0xfc) >> 2;
+       if (ratio_bits > 6)
+               dsor = (ratio_bits - 6) * 2 + 8;
+       else
+               dsor = ratio_bits + 2;
+
+       clk-> rate = 96000000 / dsor;
+}
+
+static int omap1_clk_use(struct clk *clk)
+{
+       int ret = 0;
+       if (clk->usecount++ == 0) {
+               if (likely(clk->parent)) {
+                       ret = omap1_clk_use(clk->parent);
+
+                       if (unlikely(ret != 0)) {
+                               clk->usecount--;
+                               return ret;
+                       }
+
+                       if (clk->flags & CLOCK_NO_IDLE_PARENT)
+                               if (!cpu_is_omap24xx())
+                                       omap1_clk_deny_idle(clk->parent);
+               }
+
+               ret = clk->enable(clk);
+
+               if (unlikely(ret != 0) && clk->parent) {
+                       omap1_clk_unuse(clk->parent);
+                       clk->usecount--;
+               }
+       }
+
+       return ret;
+}
+
+static void omap1_clk_unuse(struct clk *clk)
+{
+       if (clk->usecount > 0 && !(--clk->usecount)) {
+               clk->disable(clk);
+               if (likely(clk->parent)) {
+                       omap1_clk_unuse(clk->parent);
+                       if (clk->flags & CLOCK_NO_IDLE_PARENT)
+                               if (!cpu_is_omap24xx())
+                                       omap1_clk_allow_idle(clk->parent);
+               }
+       }
+}
+
+static int omap1_clk_enable(struct clk *clk)
+{
+       __u16 regval16;
+       __u32 regval32;
+
+       if (clk->flags & ALWAYS_ENABLED)
+               return 0;
+
+       if (unlikely(clk->enable_reg == 0)) {
+               printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
+                      clk->name);
+               return 0;
+       }
+
+       if (clk->flags & ENABLE_REG_32BIT) {
+               if (clk->flags & VIRTUAL_IO_ADDRESS) {
+                       regval32 = __raw_readl(clk->enable_reg);
+                       regval32 |= (1 << clk->enable_bit);
+                       __raw_writel(regval32, clk->enable_reg);
+               } else {
+                       regval32 = omap_readl(clk->enable_reg);
+                       regval32 |= (1 << clk->enable_bit);
+                       omap_writel(regval32, clk->enable_reg);
+               }
+       } else {
+               if (clk->flags & VIRTUAL_IO_ADDRESS) {
+                       regval16 = __raw_readw(clk->enable_reg);
+                       regval16 |= (1 << clk->enable_bit);
+                       __raw_writew(regval16, clk->enable_reg);
+               } else {
+                       regval16 = omap_readw(clk->enable_reg);
+                       regval16 |= (1 << clk->enable_bit);
+                       omap_writew(regval16, clk->enable_reg);
+               }
+       }
+
+       return 0;
+}
+
+static void omap1_clk_disable(struct clk *clk)
+{
+       __u16 regval16;
+       __u32 regval32;
+
+       if (clk->enable_reg == 0)
+               return;
+
+       if (clk->flags & ENABLE_REG_32BIT) {
+               if (clk->flags & VIRTUAL_IO_ADDRESS) {
+                       regval32 = __raw_readl(clk->enable_reg);
+                       regval32 &= ~(1 << clk->enable_bit);
+                       __raw_writel(regval32, clk->enable_reg);
+               } else {
+                       regval32 = omap_readl(clk->enable_reg);
+                       regval32 &= ~(1 << clk->enable_bit);
+                       omap_writel(regval32, clk->enable_reg);
+               }
+       } else {
+               if (clk->flags & VIRTUAL_IO_ADDRESS) {
+                       regval16 = __raw_readw(clk->enable_reg);
+                       regval16 &= ~(1 << clk->enable_bit);
+                       __raw_writew(regval16, clk->enable_reg);
+               } else {
+                       regval16 = omap_readw(clk->enable_reg);
+                       regval16 &= ~(1 << clk->enable_bit);
+                       omap_writew(regval16, clk->enable_reg);
+               }
+       }
+}
+
+static long omap1_clk_round_rate(struct clk *clk, unsigned long rate)
+{
+       int dsor_exp;
+
+       if (clk->flags & RATE_FIXED)
+               return clk->rate;
+
+       if (clk->flags & RATE_CKCTL) {
+               dsor_exp = calc_dsor_exp(clk, rate);
+               if (dsor_exp < 0)
+                       return dsor_exp;
+               if (dsor_exp > 3)
+                       dsor_exp = 3;
+               return clk->parent->rate / (1 << dsor_exp);
+       }
+
+       if(clk->round_rate != 0)
+               return clk->round_rate(clk, rate);
+
+       return clk->rate;
+}
+
+static int omap1_clk_set_rate(struct clk *clk, unsigned long rate)
+{
+       int  ret = -EINVAL;
+       int  dsor_exp;
+       __u16  regval;
+
+       if (clk->set_rate)
+               ret = clk->set_rate(clk, rate);
+       else if (clk->flags & RATE_CKCTL) {
+               dsor_exp = calc_dsor_exp(clk, rate);
+               if (dsor_exp > 3)
+                       dsor_exp = -EINVAL;
+               if (dsor_exp < 0)
+                       return dsor_exp;
+
+               regval = omap_readw(ARM_CKCTL);
+               regval &= ~(3 << clk->rate_offset);
+               regval |= dsor_exp << clk->rate_offset;
+               regval = verify_ckctl_value(regval);
+               omap_writew(regval, ARM_CKCTL);
+               clk->rate = clk->parent->rate / (1 << dsor_exp);
+               ret = 0;
+       }
+
+       if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES)))
+               propagate_rate(clk);
+
+       return ret;
+}
+
+/*-------------------------------------------------------------------------
+ * Omap1 clock reset and init functions
+ *-------------------------------------------------------------------------*/
+
+#ifdef CONFIG_OMAP_RESET_CLOCKS
+/*
+ * Resets some clocks that may be left on from bootloader,
+ * but leaves serial clocks on. See also omap_late_clk_reset().
+ */
+static inline void omap1_early_clk_reset(void)
+{
+       //omap_writel(0x3 << 29, MOD_CONF_CTRL_0);
+}
+
+static int __init omap1_late_clk_reset(void)
+{
+       /* Turn off all unused clocks */
+       struct clk *p;
+       __u32 regval32;
+
+       /* USB_REQ_EN will be disabled later if necessary (usb_dc_ck) */
+       regval32 = omap_readw(SOFT_REQ_REG) & (1 << 4);
+       omap_writew(regval32, SOFT_REQ_REG);
+       omap_writew(0, SOFT_REQ_REG2);
+
+       list_for_each_entry(p, &clocks, node) {
+               if (p->usecount > 0 || (p->flags & ALWAYS_ENABLED) ||
+                       p->enable_reg == 0)
+                       continue;
+
+               /* Clocks in the DSP domain need api_ck. Just assume bootloader
+                * has not enabled any DSP clocks */
+               if ((u32)p->enable_reg == DSP_IDLECT2) {
+                       printk(KERN_INFO "Skipping reset check for DSP domain "
+                              "clock \"%s\"\n", p->name);
+                       continue;
+               }
+
+               /* Is the clock already disabled? */
+               if (p->flags & ENABLE_REG_32BIT) {
+                       if (p->flags & VIRTUAL_IO_ADDRESS)
+                               regval32 = __raw_readl(p->enable_reg);
+                       else
+                               regval32 = omap_readl(p->enable_reg);
+               } else {
+                       if (p->flags & VIRTUAL_IO_ADDRESS)
+                               regval32 = __raw_readw(p->enable_reg);
+                       else
+                               regval32 = omap_readw(p->enable_reg);
+               }
+
+               if ((regval32 & (1 << p->enable_bit)) == 0)
+                       continue;
+
+               /* FIXME: This clock seems to be necessary but no-one
+                * has asked for its activation. */
+               if (p == &tc2_ck         // FIX: pm.c (SRAM), CCP, Camera
+                   || p == &ck_dpll1out.clk // FIX: SoSSI, SSR
+                   || p == &arm_gpio_ck // FIX: GPIO code for 1510
+                   ) {
+                       printk(KERN_INFO "FIXME: Clock \"%s\" seems unused\n",
+                              p->name);
+                       continue;
+               }
+
+               printk(KERN_INFO "Disabling unused clock \"%s\"... ", p->name);
+               p->disable(p);
+               printk(" done\n");
+       }
+
+       return 0;
+}
+late_initcall(omap1_late_clk_reset);
+
+#else
+#define omap1_early_clk_reset()        {}
+#endif
+
+static struct clk_functions omap1_clk_functions = {
+       .clk_use                = omap1_clk_use,
+       .clk_unuse              = omap1_clk_unuse,
+       .clk_round_rate         = omap1_clk_round_rate,
+       .clk_set_rate           = omap1_clk_set_rate,
+};
+
+int __init omap1_clk_init(void)
+{
+       struct clk ** clkp;
+       const struct omap_clock_config *info;
+       int crystal_type = 0; /* Default 12 MHz */
+
+       omap1_early_clk_reset();
+       clk_init(&omap1_clk_functions);
+
+       /* By default all idlect1 clocks are allowed to idle */
+       arm_idlect1_mask = ~0;
+
+       for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) {
+               if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) {
+                       clk_register(*clkp);
+                       continue;
+               }
+
+               if (((*clkp)->flags &CLOCK_IN_OMAP16XX) && cpu_is_omap16xx()) {
+                       clk_register(*clkp);
+                       continue;
+               }
+
+               if (((*clkp)->flags &CLOCK_IN_OMAP730) && cpu_is_omap730()) {
+                       clk_register(*clkp);
+                       continue;
+               }
+       }
+
+       info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
+       if (info != NULL) {
+               if (!cpu_is_omap1510())
+                       crystal_type = info->system_clock_type;
+       }
+
+#if defined(CONFIG_ARCH_OMAP730)
+       ck_ref.rate = 13000000;
+#elif defined(CONFIG_ARCH_OMAP16XX)
+       if (crystal_type == 2)
+               ck_ref.rate = 19200000;
+#endif
+
+       printk("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n",
+              omap_readw(ARM_SYSST), omap_readw(DPLL_CTL),
+              omap_readw(ARM_CKCTL));
+
+       /* We want to be in syncronous scalable mode */
+       omap_writew(0x1000, ARM_SYSST);
+
+#ifdef CONFIG_OMAP_CLOCKS_SET_BY_BOOTLOADER
+       /* Use values set by bootloader. Determine PLL rate and recalculate
+        * dependent clocks as if kernel had changed PLL or divisors.
+        */
+       {
+               unsigned pll_ctl_val = omap_readw(DPLL_CTL);
+
+               ck_dpll1.rate = ck_ref.rate; /* Base xtal rate */
+               if (pll_ctl_val & 0x10) {
+                       /* PLL enabled, apply multiplier and divisor */
+                       if (pll_ctl_val & 0xf80)
+                               ck_dpll1.rate *= (pll_ctl_val & 0xf80) >> 7;
+                       ck_dpll1.rate /= ((pll_ctl_val & 0x60) >> 5) + 1;
+               } else {
+                       /* PLL disabled, apply bypass divisor */
+                       switch (pll_ctl_val & 0xc) {
+                       case 0:
+                               break;
+                       case 0x4:
+                               ck_dpll1.rate /= 2;
+                               break;
+                       default:
+                               ck_dpll1.rate /= 4;
+                               break;
+                       }
+               }
+       }
+       propagate_rate(&ck_dpll1);
+#else
+       /* Find the highest supported frequency and enable it */
+       if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
+               printk(KERN_ERR "System frequencies not set. Check your config.\n");
+               /* Guess sane values (60MHz) */
+               omap_writew(0x2290, DPLL_CTL);
+               omap_writew(0x1005, ARM_CKCTL);
+               ck_dpll1.rate = 60000000;
+               propagate_rate(&ck_dpll1);
+       }
+#endif
+       /* Cache rates for clocks connected to ck_ref (not dpll1) */
+       propagate_rate(&ck_ref);
+       printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): "
+               "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n",
+              ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10,
+              ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10,
+              arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10);
+
+#ifdef CONFIG_MACH_OMAP_PERSEUS2
+       /* Select slicer output as OMAP input clock */
+       omap_writew(omap_readw(OMAP730_PCC_UPLD_CTRL) & ~0x1, OMAP730_PCC_UPLD_CTRL);
+#endif
+
+       /* Turn off DSP and ARM_TIMXO. Make sure ARM_INTHCK is not divided */
+       omap_writew(omap_readw(ARM_CKCTL) & 0x0fff, ARM_CKCTL);
+
+       /* Put DSP/MPUI into reset until needed */
+       omap_writew(0, ARM_RSTCT1);
+       omap_writew(1, ARM_RSTCT2);
+       omap_writew(0x400, ARM_IDLECT1);
+
+       /*
+        * According to OMAP5910 Erratum SYS_DMA_1, bit DMACK_REQ (bit 8)
+        * of the ARM_IDLECT2 register must be set to zero. The power-on
+        * default value of this bit is one.
+        */
+       omap_writew(0x0000, ARM_IDLECT2);       /* Turn LCD clock off also */
+
+       /*
+        * Only enable those clocks we will need, let the drivers
+        * enable other clocks as necessary
+        */
+       clk_use(&armper_ck.clk);
+       clk_use(&armxor_ck.clk);
+       clk_use(&armtim_ck.clk); /* This should be done by timer code */
+
+       if (cpu_is_omap1510())
+               clk_enable(&arm_gpio_ck);
+
+       return 0;
+}
+
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
new file mode 100644 (file)
index 0000000..f3bdfb5
--- /dev/null
@@ -0,0 +1,768 @@
+/*
+ *  linux/arch/arm/mach-omap1/clock.h
+ *
+ *  Copyright (C) 2004 - 2005 Nokia corporation
+ *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
+ *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H
+#define __ARCH_ARM_MACH_OMAP1_CLOCK_H
+
+static int omap1_clk_enable(struct clk * clk);
+static void omap1_clk_disable(struct clk * clk);
+static void omap1_ckctl_recalc(struct clk * clk);
+static void omap1_watchdog_recalc(struct clk * clk);
+static void omap1_ckctl_recalc_dsp_domain(struct clk * clk);
+static int omap1_clk_enable_dsp_domain(struct clk * clk);
+static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate);
+static void omap1_clk_disable_dsp_domain(struct clk * clk);
+static int omap1_set_uart_rate(struct clk * clk, unsigned long rate);
+static void omap1_uart_recalc(struct clk * clk);
+static int omap1_clk_enable_uart_functional(struct clk * clk);
+static void omap1_clk_disable_uart_functional(struct clk * clk);
+static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate);
+static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate);
+static void omap1_init_ext_clk(struct clk * clk);
+static int omap1_select_table_rate(struct clk * clk, unsigned long rate);
+static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate);
+static int omap1_clk_use(struct clk *clk);
+static void omap1_clk_unuse(struct clk *clk);
+
+struct mpu_rate {
+       unsigned long           rate;
+       unsigned long           xtal;
+       unsigned long           pll_rate;
+       __u16                   ckctl_val;
+       __u16                   dpllctl_val;
+};
+
+struct uart_clk {
+       struct clk      clk;
+       unsigned long   sysc_addr;
+};
+
+/* Provide a method for preventing idling some ARM IDLECT clocks */
+struct arm_idlect1_clk {
+       struct clk      clk;
+       unsigned long   no_idle_count;
+       __u8            idlect_shift;
+};
+
+/* ARM_CKCTL bit shifts */
+#define CKCTL_PERDIV_OFFSET    0
+#define CKCTL_LCDDIV_OFFSET    2
+#define CKCTL_ARMDIV_OFFSET    4
+#define CKCTL_DSPDIV_OFFSET    6
+#define CKCTL_TCDIV_OFFSET     8
+#define CKCTL_DSPMMUDIV_OFFSET 10
+/*#define ARM_TIMXO            12*/
+#define EN_DSPCK               13
+/*#define ARM_INTHCK_SEL       14*/ /* Divide-by-2 for mpu inth_ck */
+/* DSP_CKCTL bit shifts */
+#define CKCTL_DSPPERDIV_OFFSET 0
+
+/* ARM_IDLECT2 bit shifts */
+#define EN_WDTCK       0
+#define EN_XORPCK      1
+#define EN_PERCK       2
+#define EN_LCDCK       3
+#define EN_LBCK                4 /* Not on 1610/1710 */
+/*#define EN_HSABCK    5*/
+#define EN_APICK       6
+#define EN_TIMCK       7
+#define DMACK_REQ      8
+#define EN_GPIOCK      9 /* Not on 1610/1710 */
+/*#define EN_LBFREECK  10*/
+#define EN_CKOUT_ARM   11
+
+/* ARM_IDLECT3 bit shifts */
+#define EN_OCPI_CK     0
+#define EN_TC1_CK      2
+#define EN_TC2_CK      4
+
+/* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */
+#define EN_DSPTIMCK    5
+
+/* Various register defines for clock controls scattered around OMAP chip */
+#define USB_MCLK_EN_BIT                4       /* In ULPD_CLKC_CTRL */
+#define USB_HOST_HHC_UHOST_EN  9       /* In MOD_CONF_CTRL_0 */
+#define SWD_ULPD_PLL_CLK_REQ   1       /* In SWD_CLK_DIV_CTRL_SEL */
+#define COM_ULPD_PLL_CLK_REQ   1       /* In COM_CLK_DIV_CTRL_SEL */
+#define SWD_CLK_DIV_CTRL_SEL   0xfffe0874
+#define COM_CLK_DIV_CTRL_SEL   0xfffe0878
+#define SOFT_REQ_REG           0xfffe0834
+#define SOFT_REQ_REG2          0xfffe0880
+
+/*-------------------------------------------------------------------------
+ * Omap1 MPU rate table
+ *-------------------------------------------------------------------------*/
+static struct mpu_rate rate_table[] = {
+       /* MPU MHz, xtal MHz, dpll1 MHz, CKCTL, DPLL_CTL
+        * NOTE: Comment order here is different from bits in CKCTL value:
+        * armdiv, dspdiv, dspmmu, tcdiv, perdiv, lcddiv
+        */
+#if defined(CONFIG_OMAP_ARM_216MHZ)
+       { 216000000, 12000000, 216000000, 0x050d, 0x2910 }, /* 1/1/2/2/2/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_195MHZ)
+       { 195000000, 13000000, 195000000, 0x050e, 0x2790 }, /* 1/1/2/2/4/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_192MHZ)
+       { 192000000, 19200000, 192000000, 0x050f, 0x2510 }, /* 1/1/2/2/8/8 */
+       { 192000000, 12000000, 192000000, 0x050f, 0x2810 }, /* 1/1/2/2/8/8 */
+       {  96000000, 12000000, 192000000, 0x055f, 0x2810 }, /* 2/2/2/2/8/8 */
+       {  48000000, 12000000, 192000000, 0x0baf, 0x2810 }, /* 4/4/4/8/8/8 */
+       {  24000000, 12000000, 192000000, 0x0fff, 0x2810 }, /* 8/8/8/8/8/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_182MHZ)
+       { 182000000, 13000000, 182000000, 0x050e, 0x2710 }, /* 1/1/2/2/4/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_168MHZ)
+       { 168000000, 12000000, 168000000, 0x010f, 0x2710 }, /* 1/1/1/2/8/8 */
+#endif
+#if defined(CONFIG_OMAP_ARM_150MHZ)
+       { 150000000, 12000000, 150000000, 0x010a, 0x2cb0 }, /* 1/1/1/2/4/4 */
+#endif
+#if defined(CONFIG_OMAP_ARM_120MHZ)
+       { 120000000, 12000000, 120000000, 0x010a, 0x2510 }, /* 1/1/1/2/4/4 */
+#endif
+#if defined(CONFIG_OMAP_ARM_96MHZ)
+       {  96000000, 12000000,  96000000, 0x0005, 0x2410 }, /* 1/1/1/1/2/2 */
+#endif
+#if defined(CONFIG_OMAP_ARM_60MHZ)
+       {  60000000, 12000000,  60000000, 0x0005, 0x2290 }, /* 1/1/1/1/2/2 */
+#endif
+#if defined(CONFIG_OMAP_ARM_30MHZ)
+       {  30000000, 12000000,  60000000, 0x0555, 0x2290 }, /* 2/2/2/2/2/2 */
+#endif
+       { 0, 0, 0, 0, 0 },
+};
+
+/*-------------------------------------------------------------------------
+ * Omap1 clocks
+ *-------------------------------------------------------------------------*/
+
+static struct clk ck_ref = {
+       .name           = "ck_ref",
+       .rate           = 12000000,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         ALWAYS_ENABLED,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk ck_dpll1 = {
+       .name           = "ck_dpll1",
+       .parent         = &ck_ref,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         RATE_PROPAGATES | ALWAYS_ENABLED,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct arm_idlect1_clk ck_dpll1out = {
+       .clk = {
+               .name           = "ck_dpll1out",
+               .parent         = &ck_dpll1,
+               .flags          = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL,
+               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_bit     = EN_CKOUT_ARM,
+               .recalc         = &followparent_recalc,
+               .enable         = &omap1_clk_enable,
+               .disable        = &omap1_clk_disable,
+       },
+       .idlect_shift   = 12,
+};
+
+static struct clk arm_ck = {
+       .name           = "arm_ck",
+       .parent         = &ck_dpll1,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED,
+       .rate_offset    = CKCTL_ARMDIV_OFFSET,
+       .recalc         = &omap1_ckctl_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct arm_idlect1_clk armper_ck = {
+       .clk = {
+               .name           = "armper_ck",
+               .parent         = &ck_dpll1,
+               .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                 RATE_CKCTL | CLOCK_IDLE_CONTROL,
+               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_bit     = EN_PERCK,
+               .rate_offset    = CKCTL_PERDIV_OFFSET,
+               .recalc         = &omap1_ckctl_recalc,
+               .enable         = &omap1_clk_enable,
+               .disable        = &omap1_clk_disable,
+       },
+       .idlect_shift   = 2,
+};
+
+static struct clk arm_gpio_ck = {
+       .name           = "arm_gpio_ck",
+       .parent         = &ck_dpll1,
+       .flags          = CLOCK_IN_OMAP1510,
+       .enable_reg     = (void __iomem *)ARM_IDLECT2,
+       .enable_bit     = EN_GPIOCK,
+       .recalc         = &followparent_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct arm_idlect1_clk armxor_ck = {
+       .clk = {
+               .name           = "armxor_ck",
+               .parent         = &ck_ref,
+               .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                 CLOCK_IDLE_CONTROL,
+               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_bit     = EN_XORPCK,
+               .recalc         = &followparent_recalc,
+               .enable         = &omap1_clk_enable,
+               .disable        = &omap1_clk_disable,
+       },
+       .idlect_shift   = 1,
+};
+
+static struct arm_idlect1_clk armtim_ck = {
+       .clk = {
+               .name           = "armtim_ck",
+               .parent         = &ck_ref,
+               .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                 CLOCK_IDLE_CONTROL,
+               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_bit     = EN_TIMCK,
+               .recalc         = &followparent_recalc,
+               .enable         = &omap1_clk_enable,
+               .disable        = &omap1_clk_disable,
+       },
+       .idlect_shift   = 9,
+};
+
+static struct arm_idlect1_clk armwdt_ck = {
+       .clk = {
+               .name           = "armwdt_ck",
+               .parent         = &ck_ref,
+               .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                 CLOCK_IDLE_CONTROL,
+               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_bit     = EN_WDTCK,
+               .recalc         = &omap1_watchdog_recalc,
+               .enable         = &omap1_clk_enable,
+               .disable        = &omap1_clk_disable,
+       },
+       .idlect_shift   = 0,
+};
+
+static struct clk arminth_ck16xx = {
+       .name           = "arminth_ck",
+       .parent         = &arm_ck,
+       .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+       .recalc         = &followparent_recalc,
+       /* Note: On 16xx the frequency can be divided by 2 by programming
+        * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
+        *
+        * 1510 version is in TC clocks.
+        */
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk dsp_ck = {
+       .name           = "dsp_ck",
+       .parent         = &ck_dpll1,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         RATE_CKCTL,
+       .enable_reg     = (void __iomem *)ARM_CKCTL,
+       .enable_bit     = EN_DSPCK,
+       .rate_offset    = CKCTL_DSPDIV_OFFSET,
+       .recalc         = &omap1_ckctl_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk dspmmu_ck = {
+       .name           = "dspmmu_ck",
+       .parent         = &ck_dpll1,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         RATE_CKCTL | ALWAYS_ENABLED,
+       .rate_offset    = CKCTL_DSPMMUDIV_OFFSET,
+       .recalc         = &omap1_ckctl_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk dspper_ck = {
+       .name           = "dspper_ck",
+       .parent         = &ck_dpll1,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         RATE_CKCTL | VIRTUAL_IO_ADDRESS,
+       .enable_reg     = (void __iomem *)DSP_IDLECT2,
+       .enable_bit     = EN_PERCK,
+       .rate_offset    = CKCTL_PERDIV_OFFSET,
+       .recalc         = &omap1_ckctl_recalc_dsp_domain,
+       .set_rate       = &omap1_clk_set_rate_dsp_domain,
+       .enable         = &omap1_clk_enable_dsp_domain,
+       .disable        = &omap1_clk_disable_dsp_domain,
+};
+
+static struct clk dspxor_ck = {
+       .name           = "dspxor_ck",
+       .parent         = &ck_ref,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         VIRTUAL_IO_ADDRESS,
+       .enable_reg     = (void __iomem *)DSP_IDLECT2,
+       .enable_bit     = EN_XORPCK,
+       .recalc         = &followparent_recalc,
+       .enable         = &omap1_clk_enable_dsp_domain,
+       .disable        = &omap1_clk_disable_dsp_domain,
+};
+
+static struct clk dsptim_ck = {
+       .name           = "dsptim_ck",
+       .parent         = &ck_ref,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         VIRTUAL_IO_ADDRESS,
+       .enable_reg     = (void __iomem *)DSP_IDLECT2,
+       .enable_bit     = EN_DSPTIMCK,
+       .recalc         = &followparent_recalc,
+       .enable         = &omap1_clk_enable_dsp_domain,
+       .disable        = &omap1_clk_disable_dsp_domain,
+};
+
+/* Tie ARM_IDLECT1:IDLIF_ARM to this logical clock structure */
+static struct arm_idlect1_clk tc_ck = {
+       .clk = {
+               .name           = "tc_ck",
+               .parent         = &ck_dpll1,
+               .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                 CLOCK_IN_OMAP730 | RATE_CKCTL |
+                                 RATE_PROPAGATES | ALWAYS_ENABLED |
+                                 CLOCK_IDLE_CONTROL,
+               .rate_offset    = CKCTL_TCDIV_OFFSET,
+               .recalc         = &omap1_ckctl_recalc,
+               .enable         = &omap1_clk_enable,
+               .disable        = &omap1_clk_disable,
+       },
+       .idlect_shift   = 6,
+};
+
+static struct clk arminth_ck1510 = {
+       .name           = "arminth_ck",
+       .parent         = &tc_ck.clk,
+       .flags          = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
+       .recalc         = &followparent_recalc,
+       /* Note: On 1510 the frequency follows TC_CK
+        *
+        * 16xx version is in MPU clocks.
+        */
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk tipb_ck = {
+       /* No-idle controlled by "tc_ck" */
+       .name           = "tibp_ck",
+       .parent         = &tc_ck.clk,
+       .flags          = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED,
+       .recalc         = &followparent_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk l3_ocpi_ck = {
+       /* No-idle controlled by "tc_ck" */
+       .name           = "l3_ocpi_ck",
+       .parent         = &tc_ck.clk,
+       .flags          = CLOCK_IN_OMAP16XX,
+       .enable_reg     = (void __iomem *)ARM_IDLECT3,
+       .enable_bit     = EN_OCPI_CK,
+       .recalc         = &followparent_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk tc1_ck = {
+       .name           = "tc1_ck",
+       .parent         = &tc_ck.clk,
+       .flags          = CLOCK_IN_OMAP16XX,
+       .enable_reg     = (void __iomem *)ARM_IDLECT3,
+       .enable_bit     = EN_TC1_CK,
+       .recalc         = &followparent_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk tc2_ck = {
+       .name           = "tc2_ck",
+       .parent         = &tc_ck.clk,
+       .flags          = CLOCK_IN_OMAP16XX,
+       .enable_reg     = (void __iomem *)ARM_IDLECT3,
+       .enable_bit     = EN_TC2_CK,
+       .recalc         = &followparent_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk dma_ck = {
+       /* No-idle controlled by "tc_ck" */
+       .name           = "dma_ck",
+       .parent         = &tc_ck.clk,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         ALWAYS_ENABLED,
+       .recalc         = &followparent_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk dma_lcdfree_ck = {
+       .name           = "dma_lcdfree_ck",
+       .parent         = &tc_ck.clk,
+       .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+       .recalc         = &followparent_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct arm_idlect1_clk api_ck = {
+       .clk = {
+               .name           = "api_ck",
+               .parent         = &tc_ck.clk,
+               .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                                 CLOCK_IDLE_CONTROL,
+               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_bit     = EN_APICK,
+               .recalc         = &followparent_recalc,
+               .enable         = &omap1_clk_enable,
+               .disable        = &omap1_clk_disable,
+       },
+       .idlect_shift   = 8,
+};
+
+static struct arm_idlect1_clk lb_ck = {
+       .clk = {
+               .name           = "lb_ck",
+               .parent         = &tc_ck.clk,
+               .flags          = CLOCK_IN_OMAP1510 | CLOCK_IDLE_CONTROL,
+               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_bit     = EN_LBCK,
+               .recalc         = &followparent_recalc,
+               .enable         = &omap1_clk_enable,
+               .disable        = &omap1_clk_disable,
+       },
+       .idlect_shift   = 4,
+};
+
+static struct clk rhea1_ck = {
+       .name           = "rhea1_ck",
+       .parent         = &tc_ck.clk,
+       .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+       .recalc         = &followparent_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk rhea2_ck = {
+       .name           = "rhea2_ck",
+       .parent         = &tc_ck.clk,
+       .flags          = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
+       .recalc         = &followparent_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk lcd_ck_16xx = {
+       .name           = "lcd_ck",
+       .parent         = &ck_dpll1,
+       .flags          = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730 | RATE_CKCTL,
+       .enable_reg     = (void __iomem *)ARM_IDLECT2,
+       .enable_bit     = EN_LCDCK,
+       .rate_offset    = CKCTL_LCDDIV_OFFSET,
+       .recalc         = &omap1_ckctl_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct arm_idlect1_clk lcd_ck_1510 = {
+       .clk = {
+               .name           = "lcd_ck",
+               .parent         = &ck_dpll1,
+               .flags          = CLOCK_IN_OMAP1510 | RATE_CKCTL |
+                                 CLOCK_IDLE_CONTROL,
+               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_bit     = EN_LCDCK,
+               .rate_offset    = CKCTL_LCDDIV_OFFSET,
+               .recalc         = &omap1_ckctl_recalc,
+               .enable         = &omap1_clk_enable,
+               .disable        = &omap1_clk_disable,
+       },
+       .idlect_shift   = 3,
+};
+
+static struct clk uart1_1510 = {
+       .name           = "uart1_ck",
+       /* Direct from ULPD, no real parent */
+       .parent         = &armper_ck.clk,
+       .rate           = 12000000,
+       .flags          = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT |
+                         ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
+       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_bit     = 29,   /* Chooses between 12MHz and 48MHz */
+       .set_rate       = &omap1_set_uart_rate,
+       .recalc         = &omap1_uart_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct uart_clk uart1_16xx = {
+       .clk    = {
+               .name           = "uart1_ck",
+               /* Direct from ULPD, no real parent */
+               .parent         = &armper_ck.clk,
+               .rate           = 48000000,
+               .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED |
+                                 ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+               .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+               .enable_bit     = 29,
+               .enable         = &omap1_clk_enable_uart_functional,
+               .disable        = &omap1_clk_disable_uart_functional,
+       },
+       .sysc_addr      = 0xfffb0054,
+};
+
+static struct clk uart2_ck = {
+       .name           = "uart2_ck",
+       /* Direct from ULPD, no real parent */
+       .parent         = &armper_ck.clk,
+       .rate           = 12000000,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         ENABLE_REG_32BIT | ALWAYS_ENABLED |
+                         CLOCK_NO_IDLE_PARENT,
+       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_bit     = 30,   /* Chooses between 12MHz and 48MHz */
+       .set_rate       = &omap1_set_uart_rate,
+       .recalc         = &omap1_uart_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk uart3_1510 = {
+       .name           = "uart3_ck",
+       /* Direct from ULPD, no real parent */
+       .parent         = &armper_ck.clk,
+       .rate           = 12000000,
+       .flags          = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT |
+                         ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
+       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_bit     = 31,   /* Chooses between 12MHz and 48MHz */
+       .set_rate       = &omap1_set_uart_rate,
+       .recalc         = &omap1_uart_recalc,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct uart_clk uart3_16xx = {
+       .clk    = {
+               .name           = "uart3_ck",
+               /* Direct from ULPD, no real parent */
+               .parent         = &armper_ck.clk,
+               .rate           = 48000000,
+               .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED |
+                                 ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+               .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+               .enable_bit     = 31,
+               .enable         = &omap1_clk_enable_uart_functional,
+               .disable        = &omap1_clk_disable_uart_functional,
+       },
+       .sysc_addr      = 0xfffb9854,
+};
+
+static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
+       .name           = "usb_clko",
+       /* Direct from ULPD, no parent */
+       .rate           = 6000000,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         RATE_FIXED | ENABLE_REG_32BIT,
+       .enable_reg     = (void __iomem *)ULPD_CLOCK_CTRL,
+       .enable_bit     = USB_MCLK_EN_BIT,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk usb_hhc_ck1510 = {
+       .name           = "usb_hhc_ck",
+       /* Direct from ULPD, no parent */
+       .rate           = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
+       .flags          = CLOCK_IN_OMAP1510 |
+                         RATE_FIXED | ENABLE_REG_32BIT,
+       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_bit     = USB_HOST_HHC_UHOST_EN,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk usb_hhc_ck16xx = {
+       .name           = "usb_hhc_ck",
+       /* Direct from ULPD, no parent */
+       .rate           = 48000000,
+       /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
+       .flags          = CLOCK_IN_OMAP16XX |
+                         RATE_FIXED | ENABLE_REG_32BIT,
+       .enable_reg     = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */,
+       .enable_bit     = 8 /* UHOST_EN */,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk usb_dc_ck = {
+       .name           = "usb_dc_ck",
+       /* Direct from ULPD, no parent */
+       .rate           = 48000000,
+       .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED,
+       .enable_reg     = (void __iomem *)SOFT_REQ_REG,
+       .enable_bit     = 4,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk mclk_1510 = {
+       .name           = "mclk",
+       /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+       .rate           = 12000000,
+       .flags          = CLOCK_IN_OMAP1510 | RATE_FIXED,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk mclk_16xx = {
+       .name           = "mclk",
+       /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+       .flags          = CLOCK_IN_OMAP16XX,
+       .enable_reg     = (void __iomem *)COM_CLK_DIV_CTRL_SEL,
+       .enable_bit     = COM_ULPD_PLL_CLK_REQ,
+       .set_rate       = &omap1_set_ext_clk_rate,
+       .round_rate     = &omap1_round_ext_clk_rate,
+       .init           = &omap1_init_ext_clk,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk bclk_1510 = {
+       .name           = "bclk",
+       /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+       .rate           = 12000000,
+       .flags          = CLOCK_IN_OMAP1510 | RATE_FIXED,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk bclk_16xx = {
+       .name           = "bclk",
+       /* Direct from ULPD, no parent. May be enabled by ext hardware. */
+       .flags          = CLOCK_IN_OMAP16XX,
+       .enable_reg     = (void __iomem *)SWD_CLK_DIV_CTRL_SEL,
+       .enable_bit     = SWD_ULPD_PLL_CLK_REQ,
+       .set_rate       = &omap1_set_ext_clk_rate,
+       .round_rate     = &omap1_round_ext_clk_rate,
+       .init           = &omap1_init_ext_clk,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk mmc1_ck = {
+       .name           = "mmc1_ck",
+       /* Functional clock is direct from ULPD, interface clock is ARMPER */
+       .parent         = &armper_ck.clk,
+       .rate           = 48000000,
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_bit     = 23,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk mmc2_ck = {
+       .name           = "mmc2_ck",
+       /* Functional clock is direct from ULPD, interface clock is ARMPER */
+       .parent         = &armper_ck.clk,
+       .rate           = 48000000,
+       .flags          = CLOCK_IN_OMAP16XX |
+                         RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_bit     = 20,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk virtual_ck_mpu = {
+       .name           = "mpu",
+       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         VIRTUAL_CLOCK | ALWAYS_ENABLED,
+       .parent         = &arm_ck, /* Is smarter alias for */
+       .recalc         = &followparent_recalc,
+       .set_rate       = &omap1_select_table_rate,
+       .round_rate     = &omap1_round_to_table_rate,
+       .enable         = &omap1_clk_enable,
+       .disable        = &omap1_clk_disable,
+};
+
+static struct clk * onchip_clks[] = {
+       /* non-ULPD clocks */
+       &ck_ref,
+       &ck_dpll1,
+       /* CK_GEN1 clocks */
+       &ck_dpll1out.clk,
+       &arm_ck,
+       &armper_ck.clk,
+       &arm_gpio_ck,
+       &armxor_ck.clk,
+       &armtim_ck.clk,
+       &armwdt_ck.clk,
+       &arminth_ck1510,  &arminth_ck16xx,
+       /* CK_GEN2 clocks */
+       &dsp_ck,
+       &dspmmu_ck,
+       &dspper_ck,
+       &dspxor_ck,
+       &dsptim_ck,
+       /* CK_GEN3 clocks */
+       &tc_ck.clk,
+       &tipb_ck,
+       &l3_ocpi_ck,
+       &tc1_ck,
+       &tc2_ck,
+       &dma_ck,
+       &dma_lcdfree_ck,
+       &api_ck.clk,
+       &lb_ck.clk,
+       &rhea1_ck,
+       &rhea2_ck,
+       &lcd_ck_16xx,
+       &lcd_ck_1510.clk,
+       /* ULPD clocks */
+       &uart1_1510,
+       &uart1_16xx.clk,
+       &uart2_ck,
+       &uart3_1510,
+       &uart3_16xx.clk,
+       &usb_clko,
+       &usb_hhc_ck1510, &usb_hhc_ck16xx,
+       &usb_dc_ck,
+       &mclk_1510,  &mclk_16xx,
+       &bclk_1510,  &bclk_16xx,
+       &mmc1_ck,
+       &mmc2_ck,
+       /* Virtual clocks */
+       &virtual_ck_mpu,
+};
+
+#endif
index 3c5d901efeaa88d94b17be82c029c3ba082dab31..ecbc47514adc6b4f51f148750d44d6d4778618a7 100644 (file)
 #include <asm/arch/mux.h>
 #include <asm/arch/gpio.h>
 
-
-static void omap_nop_release(struct device *dev)
-{
-        /* Nothing */
-}
-
-/*-------------------------------------------------------------------------*/
-
-#if    defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
-
-#define        OMAP_I2C_BASE           0xfffb3800
-
-static struct resource i2c_resources[] = {
-       {
-               .start          = OMAP_I2C_BASE,
-               .end            = OMAP_I2C_BASE + 0x3f,
-               .flags          = IORESOURCE_MEM,
-       },
-       {
-               .start          = INT_I2C,
-               .flags          = IORESOURCE_IRQ,
-       },
-};
-
-/* DMA not used; works around erratum writing to non-empty i2c fifo */
-
-static struct platform_device omap_i2c_device = {
-        .name           = "i2c_omap",
-        .id             = -1,
-        .dev = {
-                .release        = omap_nop_release,
-        },
-       .num_resources  = ARRAY_SIZE(i2c_resources),
-       .resource       = i2c_resources,
-};
-
-static void omap_init_i2c(void)
-{
-       /* FIXME define and use a boot tag, in case of boards that
-        * either don't wire up I2C, or chips that mux it differently...
-        * it can include clocking and address info, maybe more.
-        */
-       omap_cfg_reg(I2C_SCL);
-       omap_cfg_reg(I2C_SDA);
-
-       (void) platform_device_register(&omap_i2c_device);
-}
-#else
-static inline void omap_init_i2c(void) {}
-#endif
+extern void omap_nop_release(struct device *dev);
 
 /*-------------------------------------------------------------------------*/
 
@@ -110,137 +61,6 @@ static inline void omap_init_irda(void) {}
 
 /*-------------------------------------------------------------------------*/
 
-#if    defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
-
-#define        OMAP_MMC1_BASE          0xfffb7800
-#define        OMAP_MMC2_BASE          0xfffb7c00      /* omap16xx only */
-
-static struct omap_mmc_conf mmc1_conf;
-
-static u64 mmc1_dmamask = 0xffffffff;
-
-static struct resource mmc1_resources[] = {
-       {
-               .start          = IO_ADDRESS(OMAP_MMC1_BASE),
-               .end            = IO_ADDRESS(OMAP_MMC1_BASE) + 0x7f,
-               .flags          = IORESOURCE_MEM,
-       },
-       {
-               .start          = INT_MMC,
-               .flags          = IORESOURCE_IRQ,
-       },
-};
-
-static struct platform_device mmc_omap_device1 = {
-       .name           = "mmci-omap",
-       .id             = 1,
-       .dev = {
-               .release        = omap_nop_release,
-               .dma_mask       = &mmc1_dmamask,
-               .platform_data  = &mmc1_conf,
-       },
-       .num_resources  = ARRAY_SIZE(mmc1_resources),
-       .resource       = mmc1_resources,
-};
-
-#ifdef CONFIG_ARCH_OMAP16XX
-
-static struct omap_mmc_conf mmc2_conf;
-
-static u64 mmc2_dmamask = 0xffffffff;
-
-static struct resource mmc2_resources[] = {
-       {
-               .start          = IO_ADDRESS(OMAP_MMC2_BASE),
-               .end            = IO_ADDRESS(OMAP_MMC2_BASE) + 0x7f,
-               .flags          = IORESOURCE_MEM,
-       },
-       {
-               .start          = INT_1610_MMC2,
-               .flags          = IORESOURCE_IRQ,
-       },
-};
-
-static struct platform_device mmc_omap_device2 = {
-       .name           = "mmci-omap",
-       .id             = 2,
-       .dev = {
-               .release        = omap_nop_release,
-               .dma_mask       = &mmc2_dmamask,
-               .platform_data  = &mmc2_conf,
-       },
-       .num_resources  = ARRAY_SIZE(mmc2_resources),
-       .resource       = mmc2_resources,
-};
-#endif
-
-static void __init omap_init_mmc(void)
-{
-       const struct omap_mmc_config    *mmc_conf;
-       const struct omap_mmc_conf      *mmc;
-
-       /* NOTE:  assumes MMC was never (wrongly) enabled */
-       mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
-       if (!mmc_conf)
-               return;
-
-       /* block 1 is always available and has just one pinout option */
-       mmc = &mmc_conf->mmc[0];
-       if (mmc->enabled) {
-               omap_cfg_reg(MMC_CMD);
-               omap_cfg_reg(MMC_CLK);
-               omap_cfg_reg(MMC_DAT0);
-               if (cpu_is_omap1710()) {
-                     omap_cfg_reg(M15_1710_MMC_CLKI);
-                     omap_cfg_reg(P19_1710_MMC_CMDDIR);
-                     omap_cfg_reg(P20_1710_MMC_DATDIR0);
-               }
-               if (mmc->wire4) {
-                       omap_cfg_reg(MMC_DAT1);
-                       /* NOTE:  DAT2 can be on W10 (here) or M15 */
-                       if (!mmc->nomux)
-                               omap_cfg_reg(MMC_DAT2);
-                       omap_cfg_reg(MMC_DAT3);
-               }
-               mmc1_conf = *mmc;
-               (void) platform_device_register(&mmc_omap_device1);
-       }
-
-#ifdef CONFIG_ARCH_OMAP16XX
-       /* block 2 is on newer chips, and has many pinout options */
-       mmc = &mmc_conf->mmc[1];
-       if (mmc->enabled) {
-               if (!mmc->nomux) {
-                       omap_cfg_reg(Y8_1610_MMC2_CMD);
-                       omap_cfg_reg(Y10_1610_MMC2_CLK);
-                       omap_cfg_reg(R18_1610_MMC2_CLKIN);
-                       omap_cfg_reg(W8_1610_MMC2_DAT0);
-                       if (mmc->wire4) {
-                               omap_cfg_reg(V8_1610_MMC2_DAT1);
-                               omap_cfg_reg(W15_1610_MMC2_DAT2);
-                               omap_cfg_reg(R10_1610_MMC2_DAT3);
-                       }
-
-                       /* These are needed for the level shifter */
-                       omap_cfg_reg(V9_1610_MMC2_CMDDIR);
-                       omap_cfg_reg(V5_1610_MMC2_DATDIR0);
-                       omap_cfg_reg(W19_1610_MMC2_DATDIR1);
-               }
-
-               /* Feedback clock must be set on OMAP-1710 MMC2 */
-               if (cpu_is_omap1710())
-                       omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
-                                    MOD_CONF_CTRL_1);
-               mmc2_conf = *mmc;
-               (void) platform_device_register(&mmc_omap_device2);
-       }
-#endif
-       return;
-}
-#else
-static inline void omap_init_mmc(void) {}
-#endif
-
 #if    defined(CONFIG_OMAP_RTC) || defined(CONFIG_OMAP_RTC)
 
 #define        OMAP_RTC_BASE           0xfffb4800
@@ -279,38 +99,6 @@ static void omap_init_rtc(void)
 static inline void omap_init_rtc(void) {}
 #endif
 
-/*-------------------------------------------------------------------------*/
-
-#if    defined(CONFIG_OMAP16XX_WATCHDOG) || defined(CONFIG_OMAP16XX_WATCHDOG_MODULE)
-
-#define        OMAP_WDT_BASE           0xfffeb000
-
-static struct resource wdt_resources[] = {
-       {
-               .start          = OMAP_WDT_BASE,
-               .end            = OMAP_WDT_BASE + 0x4f,
-               .flags          = IORESOURCE_MEM,
-       },
-};
-
-static struct platform_device omap_wdt_device = {
-       .name      = "omap1610_wdt",
-       .id          = -1,
-       .dev = {
-               .release        = omap_nop_release,
-       },
-       .num_resources  = ARRAY_SIZE(wdt_resources),
-       .resource       = wdt_resources,
-};
-
-static void omap_init_wdt(void)
-{
-       (void) platform_device_register(&omap_wdt_device);
-}
-#else
-static inline void omap_init_wdt(void) {}
-#endif
-
 
 /*-------------------------------------------------------------------------*/
 
@@ -334,18 +122,15 @@ static inline void omap_init_wdt(void) {}
  * may be handled by the boot loader, and drivers should expect it will
  * normally have been done by the time they're probed.
  */
-static int __init omap_init_devices(void)
+static int __init omap1_init_devices(void)
 {
        /* please keep these calls, and their implementations above,
         * in alphabetical order so they're easier to sort through.
         */
-       omap_init_i2c();
        omap_init_irda();
-       omap_init_mmc();
        omap_init_rtc();
-       omap_init_wdt();
 
        return 0;
 }
-arch_initcall(omap_init_devices);
+arch_initcall(omap1_init_devices);
 
index 986c3b7e09bbf464d35052febf3d62e5c0842d09..5c637c0483688d9ef1a6172ad6a5fd437ba3cad2 100644 (file)
 
 #include <asm/io.h>
 
+#define OMAP_DIE_ID_0          0xfffe1800
+#define OMAP_DIE_ID_1          0xfffe1804
+#define OMAP_PRODUCTION_ID_0   0xfffe2000
+#define OMAP_PRODUCTION_ID_1   0xfffe2004
+#define OMAP32_ID_0            0xfffed400
+#define OMAP32_ID_1            0xfffed404
+
 struct omap_id {
        u16     jtag_id;        /* Used to determine OMAP type */
        u8      die_rev;        /* Processor revision */
@@ -27,6 +34,7 @@ struct omap_id {
 
 /* Register values to detect the OMAP version */
 static struct omap_id omap_ids[] __initdata = {
+       { .jtag_id = 0xb574, .die_rev = 0x2, .omap_id = 0x03310315, .type = 0x03100000},
        { .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
        { .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
        { .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
@@ -164,6 +172,7 @@ void __init omap_check_revision(void)
        case 0x07:
                system_rev |= 0x07;
                break;
+       case 0x03:
        case 0x15:
                system_rev |= 0x15;
                break;
index 79fb86535ebcb122baca48d47ee14a867c1706ae..a7a19f75b9e1ad119434cb001c96d5c4a79b28f2 100644 (file)
 
 #include <asm/mach/map.h>
 #include <asm/io.h>
+#include <asm/arch/mux.h>
 #include <asm/arch/tc.h>
 
-extern int clk_init(void);
+extern int omap1_clk_init(void);
 extern void omap_check_revision(void);
 extern void omap_sram_init(void);
 
@@ -50,7 +51,7 @@ static struct map_desc omap730_io_desc[] __initdata = {
 };
 #endif
 
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 static struct map_desc omap1510_io_desc[] __initdata = {
        {
                .virtual        = OMAP1510_DSP_BASE,
@@ -98,7 +99,7 @@ static void __init _omap_map_io(void)
                iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
        }
 #endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
        }
@@ -119,7 +120,7 @@ static void __init _omap_map_io(void)
 
        /* Must init clocks early to assure that timer interrupt works
         */
-       clk_init();
+       omap1_clk_init();
 }
 
 /*
@@ -127,7 +128,9 @@ static void __init _omap_map_io(void)
  */
 void __init omap_map_common_io(void)
 {
-       if (!initialized)
+       if (!initialized) {
                _omap_map_io();
+               omap1_mux_init();
+       }
 }
 
index 192ce6055faabb13f31c6e49c6c4b3b05b3dda9e..ed65a7d2e941cf9228658b323564925ceca3aa2c 100644 (file)
@@ -47,6 +47,7 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/arch/gpio.h>
+#include <asm/arch/cpu.h>
 
 #include <asm/io.h>
 
@@ -147,11 +148,15 @@ static struct omap_irq_bank omap730_irq_banks[] = {
 };
 #endif
 
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
 static struct omap_irq_bank omap1510_irq_banks[] = {
        { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3febfff },
        { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0xffbfffed },
 };
+static struct omap_irq_bank omap310_irq_banks[] = {
+       { .base_reg = OMAP_IH1_BASE,            .trigger_map = 0xb3faefc3 },
+       { .base_reg = OMAP_IH2_BASE,            .trigger_map = 0x65b3c061 },
+};
 #endif
 
 #if defined(CONFIG_ARCH_OMAP16XX)
@@ -181,11 +186,15 @@ void __init omap_init_irq(void)
                irq_bank_count = ARRAY_SIZE(omap730_irq_banks);
        }
 #endif
-#ifdef CONFIG_ARCH_OMAP1510
+#ifdef CONFIG_ARCH_OMAP15XX
        if (cpu_is_omap1510()) {
                irq_banks = omap1510_irq_banks;
                irq_bank_count = ARRAY_SIZE(omap1510_irq_banks);
        }
+       if (cpu_is_omap310()) {
+               irq_banks = omap310_irq_banks;
+               irq_bank_count = ARRAY_SIZE(omap310_irq_banks);
+       }
 #endif
 #if defined(CONFIG_ARCH_OMAP16XX)
        if (cpu_is_omap16xx()) {
@@ -226,9 +235,11 @@ void __init omap_init_irq(void)
        }
 
        /* Unmask level 2 handler */
-       if (cpu_is_omap730()) {
+
+       if (cpu_is_omap730())
                omap_unmask_irq(INT_730_IH2_IRQ);
-       } else {
-               omap_unmask_irq(INT_IH2_IRQ);
-       }
+       else if (cpu_is_omap1510())
+               omap_unmask_irq(INT_1510_IH2_IRQ);
+       else if (cpu_is_omap16xx())
+               omap_unmask_irq(INT_1610_IH2_IRQ);
 }
index 399010c140369e31d40c85cca9166d260de8dd76..6506508159157129e85ccc8400119849f448fc6e 100644 (file)
@@ -18,6 +18,7 @@
 #include <asm/hardware.h>
 #include <asm/leds.h>
 #include <asm/system.h>
+#include <asm/mach-types.h>
 
 #include <asm/arch/fpga.h>
 #include <asm/arch/gpio.h>
@@ -63,14 +64,19 @@ void h2p2_dbg_leds_event(led_event_t evt)
        case led_stop:
        case led_halted:
                /* all leds off during suspend or shutdown */
-               omap_set_gpio_dataout(GPIO_TIMER, 0);
-               omap_set_gpio_dataout(GPIO_IDLE, 0);
+
+               if (! machine_is_omap_perseus2()) {
+                       omap_set_gpio_dataout(GPIO_TIMER, 0);
+                       omap_set_gpio_dataout(GPIO_IDLE, 0);
+               }
+
                __raw_writew(~0, &fpga->leds);
                led_state &= ~LED_STATE_ENABLED;
                if (evt == led_halted) {
                        iounmap(fpga);
                        fpga = NULL;
                }
+
                goto done;
 
        case led_claim:
@@ -85,18 +91,37 @@ void h2p2_dbg_leds_event(led_event_t evt)
 #ifdef CONFIG_LEDS_TIMER
        case led_timer:
                led_state ^= LED_TIMER_ON;
-               omap_set_gpio_dataout(GPIO_TIMER, led_state & LED_TIMER_ON);
-               goto done;
+
+               if (machine_is_omap_perseus2())
+                       hw_led_state ^= H2P2_DBG_FPGA_P2_LED_TIMER;
+               else {
+                       omap_set_gpio_dataout(GPIO_TIMER, led_state & LED_TIMER_ON);
+                       goto done;
+               }
+
+               break;
 #endif
 
 #ifdef CONFIG_LEDS_CPU
        case led_idle_start:
-               omap_set_gpio_dataout(GPIO_IDLE, 1);
-               goto done;
+               if (machine_is_omap_perseus2())
+                       hw_led_state |= H2P2_DBG_FPGA_P2_LED_IDLE;
+               else {
+                       omap_set_gpio_dataout(GPIO_IDLE, 1);
+                       goto done;
+               }
+
+               break;
 
        case led_idle_end:
-               omap_set_gpio_dataout(GPIO_IDLE, 0);
-               goto done;
+               if (machine_is_omap_perseus2())
+                       hw_led_state &= ~H2P2_DBG_FPGA_P2_LED_IDLE;
+               else {
+                       omap_set_gpio_dataout(GPIO_IDLE, 0);
+                       goto done;
+               }
+
+               break;
 #endif
 
        case led_green_on:
@@ -135,7 +160,7 @@ void h2p2_dbg_leds_event(led_event_t evt)
        /*
         *  Actually burn the LEDs
         */
-       if (led_state & LED_STATE_CLAIMED)
+       if (led_state & LED_STATE_ENABLED)
                __raw_writew(~hw_led_state, &fpga->leds);
 
 done:
index 5c6b1bb6e722deda5bf715e5435498b2846c7228..3f9dcac4fd41abbee1b17346ffee28d06346f8ad 100644 (file)
@@ -33,7 +33,6 @@ omap_leds_init(void)
 
        if (machine_is_omap_h2()
                        || machine_is_omap_h3()
-                       || machine_is_omap_perseus2()
 #ifdef CONFIG_OMAP_OSK_MISTRAL
                        || machine_is_omap_osk()
 #endif
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
new file mode 100644 (file)
index 0000000..d4b8d62
--- /dev/null
@@ -0,0 +1,289 @@
+/*
+ * linux/arch/arm/mach-omap1/mux.c
+ *
+ * OMAP1 pin multiplexing configurations
+ *
+ * Copyright (C) 2003 - 2005 Nokia Corporation
+ *
+ * Written by Tony Lindgren <tony.lindgren@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <linux/spinlock.h>
+
+#include <asm/arch/mux.h>
+
+#ifdef CONFIG_OMAP_MUX
+
+#ifdef CONFIG_ARCH_OMAP730
+struct pin_config __initdata_or_module omap730_pins[] = {
+MUX_CFG_730("E2_730_KBR0",     12,   21,    0,   0,   20,   1,   NA,    0,  0)
+MUX_CFG_730("J7_730_KBR1",     12,   25,    0,   0,   24,   1,   NA,    0,  0)
+MUX_CFG_730("E1_730_KBR2",     12,   29,    0,   0,   28,   1,   NA,    0,  0)
+MUX_CFG_730("F3_730_KBR3",     13,    1,    0,   0,   0,    1,   NA,    0,  0)
+MUX_CFG_730("D2_730_KBR4",     13,    5,    0,   0,   4,    1,   NA,    0,  0)
+MUX_CFG_730("C2_730_KBC0",     13,    9,    0,   0,    8,   1,   NA,    0,  0)
+MUX_CFG_730("D3_730_KBC1",     13,   13,    0,   0,   12,   1,   NA,    0,  0)
+MUX_CFG_730("E4_730_KBC2",     13,   17,    0,   0,   16,   1,   NA,    0,  0)
+MUX_CFG_730("F4_730_KBC3",     13,   21,    0,   0,   20,   1,   NA,    0,  0)
+MUX_CFG_730("E3_730_KBC4",     13,   25,    0,   0,   24,   1,   NA,    0,  0)
+};
+#endif
+
+#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
+struct pin_config __initdata_or_module omap1xxx_pins[] = {
+/*
+ *      description            mux  mode   mux  pull pull  pull  pu_pd  pu  dbg
+ *                             reg  offset mode reg  bit   ena   reg
+ */
+MUX_CFG("UART1_TX",             9,   21,    1,   2,   3,   0,   NA,     0,  0)
+MUX_CFG("UART1_RTS",            9,   12,    1,   2,   0,   0,   NA,     0,  0)
+
+/* UART2 (COM_UART_GATING), conflicts with USB2 */
+MUX_CFG("UART2_TX",             C,   27,    1,   3,   3,   0,   NA,     0,  0)
+MUX_CFG("UART2_RX",             C,   18,    0,   3,   1,   1,   NA,     0,  0)
+MUX_CFG("UART2_CTS",            C,   21,    0,   3,   1,   1,   NA,     0,  0)
+MUX_CFG("UART2_RTS",            C,   24,    1,   3,   2,   0,   NA,     0,  0)
+
+/* UART3 (GIGA_UART_GATING) */
+MUX_CFG("UART3_TX",             6,    0,    1,   0,  30,   0,   NA,     0,  0)
+MUX_CFG("UART3_RX",             6,    3,    0,   0,  31,   1,   NA,     0,  0)
+MUX_CFG("UART3_CTS",            5,   12,    2,   0,  24,   0,   NA,     0,  0)
+MUX_CFG("UART3_RTS",            5,   15,    2,   0,  25,   0,   NA,     0,  0)
+MUX_CFG("UART3_CLKREQ",                 9,   27,    0,   2,   5,   0,   NA,     0,  0)
+MUX_CFG("UART3_BCLK",           A,    0,    0,   2,   6,   0,   NA,     0,  0)
+MUX_CFG("Y15_1610_UART3_RTS",   A,    0,    1,   2,   6,   0,   NA,     0,  0)
+
+/* PWT & PWL, conflicts with UART3 */
+MUX_CFG("PWT",                  6,    0,    2,   0,  30,   0,   NA,     0,  0)
+MUX_CFG("PWL",                  6,    3,    1,   0,  31,   1,   NA,     0,  0)
+
+/* USB internal master generic */
+MUX_CFG("R18_USB_VBUS",                 7,    9,    2,   1,  11,   0,   NA,     0,  1)
+MUX_CFG("R18_1510_USB_GPIO0",   7,    9,    0,   1,  11,   1,   NA,     0,  1)
+/* works around erratum:  W4_USB_PUEN and W4_USB_PUDIS are switched! */
+MUX_CFG("W4_USB_PUEN",          D,    3,    3,   3,   5,   1,   NA,     0,  1)
+MUX_CFG("W4_USB_CLKO",          D,    3,    1,   3,   5,   0,   NA,     0,  1)
+MUX_CFG("W4_USB_HIGHZ",                 D,    3,    4,   3,   5,   0,    3,     0,  1)
+MUX_CFG("W4_GPIO58",            D,    3,    7,   3,   5,   0,    3,     0,  1)
+
+/* USB1 master */
+MUX_CFG("USB1_SUSP",            8,   27,    2,   1,  27,   0,   NA,     0,  1)
+MUX_CFG("USB1_SE0",             9,    0,    2,   1,  28,   0,   NA,     0,  1)
+MUX_CFG("W13_1610_USB1_SE0",    9,    0,    4,   1,  28,   0,   NA,     0,  1)
+MUX_CFG("USB1_TXEN",            9,    3,    2,   1,  29,   0,   NA,     0,  1)
+MUX_CFG("USB1_TXD",             9,   24,    1,   2,   4,   0,   NA,     0,  1)
+MUX_CFG("USB1_VP",              A,    3,    1,   2,   7,   0,   NA,     0,  1)
+MUX_CFG("USB1_VM",              A,    6,    1,   2,   8,   0,   NA,     0,  1)
+MUX_CFG("USB1_RCV",             A,    9,    1,   2,   9,   0,   NA,     0,  1)
+MUX_CFG("USB1_SPEED",           A,   12,    2,   2,  10,   0,   NA,     0,  1)
+MUX_CFG("R13_1610_USB1_SPEED",  A,   12,    5,   2,  10,   0,   NA,     0,  1)
+MUX_CFG("R13_1710_USB1_SEO",    A,   12,    5,   2,  10,   0,   NA,     0,  1)
+
+/* USB2 master */
+MUX_CFG("USB2_SUSP",            B,    3,    1,   2,  17,   0,   NA,     0,  1)
+MUX_CFG("USB2_VP",              B,    6,    1,   2,  18,   0,   NA,     0,  1)
+MUX_CFG("USB2_TXEN",            B,    9,    1,   2,  19,   0,   NA,     0,  1)
+MUX_CFG("USB2_VM",              C,   18,    1,   3,   0,   0,   NA,     0,  1)
+MUX_CFG("USB2_RCV",             C,   21,    1,   3,   1,   0,   NA,     0,  1)
+MUX_CFG("USB2_SE0",             C,   24,    2,   3,   2,   0,   NA,     0,  1)
+MUX_CFG("USB2_TXD",             C,   27,    2,   3,   3,   0,   NA,     0,  1)
+
+/* OMAP-1510 GPIO */
+MUX_CFG("R18_1510_GPIO0",       7,    9,    0,   1,  11,   1,    0,     0,  1)
+MUX_CFG("R19_1510_GPIO1",       7,    6,    0,   1,  10,   1,    0,     0,  1)
+MUX_CFG("M14_1510_GPIO2",       7,    3,    0,   1,   9,   1,    0,     0,  1)
+
+/* OMAP1610 GPIO */
+MUX_CFG("P18_1610_GPIO3",       7,    0,    0,   1,   8,   0,   NA,     0,  1)
+MUX_CFG("Y15_1610_GPIO17",      A,    0,    7,   2,   6,   0,   NA,     0,  1)
+
+/* OMAP-1710 GPIO */
+MUX_CFG("R18_1710_GPIO0",        7,    9,    0,   1,  11,   1,    1,     1,  1)
+MUX_CFG("V2_1710_GPIO10",        F,   27,    1,   4,   3,   1,    4,     1,  1)
+MUX_CFG("N21_1710_GPIO14",       6,    9,    0,   1,   1,   1,    1,     1,  1)
+MUX_CFG("W15_1710_GPIO40",       9,   27,    7,   2,   5,   1,    2,     1,  1)
+
+/* MPUIO */
+MUX_CFG("MPUIO2",               7,   18,    0,   1,  14,   1,   NA,     0,  1)
+MUX_CFG("N15_1610_MPUIO2",      7,   18,    0,   1,  14,   1,    1,     0,  1)
+MUX_CFG("MPUIO4",               7,   15,    0,   1,  13,   1,   NA,     0,  1)
+MUX_CFG("MPUIO5",               7,   12,    0,   1,  12,   1,   NA,     0,  1)
+
+MUX_CFG("T20_1610_MPUIO5",      7,   12,    0,   1,  12,   0,    3,     0,  1)
+MUX_CFG("W11_1610_MPUIO6",     10,   15,    2,   3,   8,   0,    3,     0,  1)
+MUX_CFG("V10_1610_MPUIO7",      A,   24,    2,   2,  14,   0,    2,     0,  1)
+MUX_CFG("W11_1610_MPUIO9",     10,   15,    1,   3,   8,   0,    3,     0,  1)
+MUX_CFG("V10_1610_MPUIO10",     A,   24,    1,   2,  14,   0,    2,     0,  1)
+MUX_CFG("W10_1610_MPUIO11",     A,   18,    2,   2,  11,   0,    2,     0,  1)
+MUX_CFG("E20_1610_MPUIO13",     3,   21,    1,   0,   7,   0,    0,     0,  1)
+MUX_CFG("U20_1610_MPUIO14",     9,    6,    6,   0,  30,   0,    0,     0,  1)
+MUX_CFG("E19_1610_MPUIO15",     3,   18,    1,   0,   6,   0,    0,     0,  1)
+
+/* MCBSP2 */
+MUX_CFG("MCBSP2_CLKR",          C,    6,    0,   2,  27,   1,   NA,     0,  1)
+MUX_CFG("MCBSP2_CLKX",          C,    9,    0,   2,  29,   1,   NA,     0,  1)
+MUX_CFG("MCBSP2_DR",            C,    0,    0,   2,  26,   1,   NA,     0,  1)
+MUX_CFG("MCBSP2_DX",            C,   15,    0,   2,  31,   1,   NA,     0,  1)
+MUX_CFG("MCBSP2_FSR",           C,   12,    0,   2,  30,   1,   NA,     0,  1)
+MUX_CFG("MCBSP2_FSX",           C,    3,    0,   2,  27,   1,   NA,     0,  1)
+
+/* MCBSP3 NOTE: Mode must 1 for clock */
+MUX_CFG("MCBSP3_CLKX",          9,    3,    1,   1,  29,   0,   NA,     0,  1)
+
+/* Misc ballouts */
+MUX_CFG("BALLOUT_V8_ARMIO3",    B,   18,    0,   2,  25,   1,   NA,     0,  1)
+MUX_CFG("N20_HDQ",            6,   18,    1,   1,   4,   0,    1,     4,  0)
+
+/* OMAP-1610 MMC2 */
+MUX_CFG("W8_1610_MMC2_DAT0",    B,   21,    6,   2,  23,   1,    2,     1,  1)
+MUX_CFG("V8_1610_MMC2_DAT1",    B,   27,    6,   2,  25,   1,    2,     1,  1)
+MUX_CFG("W15_1610_MMC2_DAT2",   9,   12,    6,   2,   5,   1,    2,     1,  1)
+MUX_CFG("R10_1610_MMC2_DAT3",   B,   18,    6,   2,  22,   1,    2,     1,  1)
+MUX_CFG("Y10_1610_MMC2_CLK",    B,    3,    6,   2,  17,   0,    2,     0,  1)
+MUX_CFG("Y8_1610_MMC2_CMD",     B,   24,    6,   2,  24,   1,    2,     1,  1)
+MUX_CFG("V9_1610_MMC2_CMDDIR",  B,   12,    6,   2,  20,   0,    2,     1,  1)
+MUX_CFG("V5_1610_MMC2_DATDIR0",         B,   15,    6,   2,  21,   0,    2,     1,  1)
+MUX_CFG("W19_1610_MMC2_DATDIR1", 8,   15,    6,          1,  23,   0,    1,     1,  1)
+MUX_CFG("R18_1610_MMC2_CLKIN",  7,    9,    6,   1,  11,   0,    1,    11,  1)
+
+/* OMAP-1610 External Trace Interface */
+MUX_CFG("M19_1610_ETM_PSTAT0",  5,   27,    1,   0,  29,   0,    0,     0,  1)
+MUX_CFG("L15_1610_ETM_PSTAT1",  5,   24,    1,   0,  28,   0,    0,     0,  1)
+MUX_CFG("L18_1610_ETM_PSTAT2",  5,   21,    1,   0,  27,   0,    0,     0,  1)
+MUX_CFG("L19_1610_ETM_D0",      5,   18,    1,   0,  26,   0,    0,     0,  1)
+MUX_CFG("J19_1610_ETM_D6",      5,    0,    1,   0,  20,   0,    0,     0,  1)
+MUX_CFG("J18_1610_ETM_D7",      5,   27,    1,   0,  19,   0,    0,     0,  1)
+
+/* OMAP16XX GPIO */
+MUX_CFG("P20_1610_GPIO4",       6,   27,    0,   1,   7,   0,    1,     1,  1)
+MUX_CFG("V9_1610_GPIO7",        B,   12,    1,   2,  20,   0,    2,     1,  1)
+MUX_CFG("W8_1610_GPIO9",        B,   21,    0,   2,  23,   0,    2,     1,  1)
+MUX_CFG("N20_1610_GPIO11",       6,   18,    0,   1,   4,   0,    1,     1,  1)
+MUX_CFG("N19_1610_GPIO13",      6,   12,    0,   1,   2,   0,    1,     1,  1)
+MUX_CFG("P10_1610_GPIO22",      C,    0,    7,   2,  26,   0,    2,     1,  1)
+MUX_CFG("V5_1610_GPIO24",       B,   15,    7,   2,  21,   0,    2,     1,  1)
+MUX_CFG("AA20_1610_GPIO_41",    9,    9,    7,   1,  31,   0,    1,     1,  1)
+MUX_CFG("W19_1610_GPIO48",      8,   15,    7,   1,  23,   1,    1,     0,  1)
+MUX_CFG("M7_1610_GPIO62",      10,    0,    0,   4,  24,   0,    4,     0,  1)
+MUX_CFG("V14_16XX_GPIO37",      9,   18,    7,   2,   2,   0,    2,     2,  0)
+MUX_CFG("R9_16XX_GPIO18",       C,   18,    7,   3,   0,   0,    3,     0,  0)
+MUX_CFG("L14_16XX_GPIO49",      6,    3,    7,   0,  31,   0,    0,    31,  0)
+
+/* OMAP-1610 uWire */
+MUX_CFG("V19_1610_UWIRE_SCLK",  8,    6,    0,   1,  20,   0,    1,     1,  1)
+MUX_CFG("U18_1610_UWIRE_SDI",   8,    0,    0,   1,  18,   0,    1,     1,  1)
+MUX_CFG("W21_1610_UWIRE_SDO",   8,    3,    0,   1,  19,   0,    1,     1,  1)
+MUX_CFG("N14_1610_UWIRE_CS0",   8,    9,    1,   1,  21,   0,    1,     1,  1)
+MUX_CFG("P15_1610_UWIRE_CS3",   8,   12,    1,   1,  22,   0,    1,     1,  1)
+MUX_CFG("N15_1610_UWIRE_CS1",   7,   18,    2,   1,  14,   0,   NA,     0,  1)
+
+/* OMAP-1610 Flash */
+MUX_CFG("L3_1610_FLASH_CS2B_OE",10,    6,    1,         NA,   0,   0,   NA,     0,  1)
+MUX_CFG("M8_1610_FLASH_CS2B_WE",10,    3,    1,         NA,   0,   0,   NA,     0,  1)
+
+/* First MMC interface, same on 1510, 1610 and 1710 */
+MUX_CFG("MMC_CMD",              A,   27,    0,   2,  15,   1,    2,     1,  1)
+MUX_CFG("MMC_DAT1",             A,   24,    0,   2,  14,   1,    2,     1,  1)
+MUX_CFG("MMC_DAT2",             A,   18,    0,   2,  12,   1,    2,     1,  1)
+MUX_CFG("MMC_DAT0",             B,    0,    0,   2,  16,   1,    2,     1,  1)
+MUX_CFG("MMC_CLK",              A,   21,    0,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("MMC_DAT3",            10,   15,    0,   3,   8,   1,    3,     1,  1)
+MUX_CFG("M15_1710_MMC_CLKI",    6,   21,    2,   0,   0,   0,   NA,     0,  1)
+MUX_CFG("P19_1710_MMC_CMDDIR",  6,   24,    6,   0,   0,   0,   NA,     0,  1)
+MUX_CFG("P20_1710_MMC_DATDIR0",         6,   27,    5,   0,   0,   0,   NA,     0,  1)
+
+/* OMAP-1610 USB0 alternate configuration */
+MUX_CFG("W9_USB0_TXEN",                 B,   9,     5,   2,  19,   0,    2,     0,  1)
+MUX_CFG("AA9_USB0_VP",          B,   6,     5,   2,  18,   0,    2,     0,  1)
+MUX_CFG("Y5_USB0_RCV",          C,  21,     5,   3,   1,   0,    1,     0,  1)
+MUX_CFG("R9_USB0_VM",           C,  18,     5,   3,   0,   0,    3,     0,  1)
+MUX_CFG("V6_USB0_TXD",          C,  27,     5,   3,   3,   0,    3,     0,  1)
+MUX_CFG("W5_USB0_SE0",          C,  24,     5,   3,   2,   0,    3,     0,  1)
+MUX_CFG("V9_USB0_SPEED",        B,  12,     5,   2,  20,   0,    2,     0,  1)
+MUX_CFG("Y10_USB0_SUSP",        B,   3,     5,   2,  17,   0,    2,     0,  1)
+
+/* USB2 interface */
+MUX_CFG("W9_USB2_TXEN",                 B,   9,     1,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("AA9_USB2_VP",          B,   6,     1,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("Y5_USB2_RCV",          C,  21,     1,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("R9_USB2_VM",           C,  18,     1,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("V6_USB2_TXD",          C,  27,     2,  NA,   0,   0,   NA,     0,  1)
+MUX_CFG("W5_USB2_SE0",          C,  24,     2,  NA,   0,   0,   NA,     0,  1)
+
+/* 16XX UART */
+MUX_CFG("R13_1610_UART1_TX",    A,  12,     6,   2,  10,   0,    2,    10,  1)
+MUX_CFG("V14_16XX_UART1_RX",    9,  18,     0,   2,   2,   0,    2,     2,  1)
+MUX_CFG("R14_1610_UART1_CTS",   9,  15,     0,   2,   1,   0,    2,     1,  1)
+MUX_CFG("AA15_1610_UART1_RTS",  9,  12,     1,   2,   0,   0,    2,     0,  1)
+MUX_CFG("R9_16XX_UART2_RX",     C,  18,     0,   3,   0,   0,    3,     0,  1)
+MUX_CFG("L14_16XX_UART3_RX",    6,   3,     0,   0,  31,   0,    0,    31,  1)
+
+/* I2C interface */
+MUX_CFG("I2C_SCL",              7,  24,     0,  NA,   0,   0,   NA,     0,  0)
+MUX_CFG("I2C_SDA",              7,  27,     0,  NA,   0,   0,   NA,     0,  0)
+
+/* Keypad */
+MUX_CFG("F18_1610_KBC0",        3,  15,     0,   0,   5,   1,    0,     0,  0)
+MUX_CFG("D20_1610_KBC1",        3,  12,     0,   0,   4,   1,    0,     0,  0)
+MUX_CFG("D19_1610_KBC2",        3,   9,     0,   0,   3,   1,    0,     0,  0)
+MUX_CFG("E18_1610_KBC3",        3,   6,     0,   0,   2,   1,    0,     0,  0)
+MUX_CFG("C21_1610_KBC4",        3,   3,     0,   0,   1,   1,    0,     0,  0)
+MUX_CFG("G18_1610_KBR0",        4,   0,     0,   0,   10,  1,    0,     1,  0)
+MUX_CFG("F19_1610_KBR1",        3,   27,    0,   0,   9,   1,    0,     1,  0)
+MUX_CFG("H14_1610_KBR2",        3,   24,    0,   0,   8,   1,    0,     1,  0)
+MUX_CFG("E20_1610_KBR3",        3,   21,    0,   0,   7,   1,    0,     1,  0)
+MUX_CFG("E19_1610_KBR4",        3,   18,    0,   0,   6,   1,    0,     1,  0)
+MUX_CFG("N19_1610_KBR5",        6,  12,     1,   1,   2,   1,    1,     1,  0)
+
+/* Power management */
+MUX_CFG("T20_1610_LOW_PWR",     7,   12,    1,   NA,   0,   0,   NA,    0,  0)
+
+/* MCLK Settings */
+MUX_CFG("V5_1710_MCLK_ON",      B,   15,    0,   NA,   0,   0,   NA,    0,  0)
+MUX_CFG("V5_1710_MCLK_OFF",     B,   15,    6,   NA,   0,   0,   NA,    0,  0)
+MUX_CFG("R10_1610_MCLK_ON",     B,   18,    0,   NA,  22,   0,   NA,    1,  0)
+MUX_CFG("R10_1610_MCLK_OFF",    B,   18,    6,   2,   22,   1,   2,     1,  1)
+
+/* CompactFlash controller, conflicts with MMC1 */
+MUX_CFG("P11_1610_CF_CD2",      A,   27,    3,   2,   15,   1,   2,     1,  1)
+MUX_CFG("R11_1610_CF_IOIS16",   B,    0,    3,   2,   16,   1,   2,     1,  1)
+MUX_CFG("V10_1610_CF_IREQ",     A,   24,    3,   2,   14,   0,   2,     0,  1)
+MUX_CFG("W10_1610_CF_RESET",    A,   18,    3,   2,   12,   1,   2,     1,  1)
+MUX_CFG("W11_1610_CF_CD1",     10,   15,    3,   3,    8,   1,   3,     1,  1)
+};
+#endif /* CONFIG_ARCH_OMAP15XX || CONFIG_ARCH_OMAP16XX */
+
+int __init omap1_mux_init(void)
+{
+
+#ifdef CONFIG_ARCH_OMAP730
+       omap_mux_register(omap730_pins, ARRAY_SIZE(omap730_pins));
+#endif
+
+#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
+       omap_mux_register(omap1xxx_pins, ARRAY_SIZE(omap1xxx_pins));
+#endif
+
+       return 0;
+}
+
+#endif
index 40c4f7c40e73369d6b7f052ca66e966012b99d67..6810cfb84462827c1e90718c359909e3ed2e9d5f 100644 (file)
@@ -109,9 +109,10 @@ static struct platform_device serial_device = {
  * By default UART2 does not work on Innovator-1510 if you have
  * USB OHCI enabled. To use UART2, you must disable USB2 first.
  */
-void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
+void __init omap_serial_init(void)
 {
        int i;
+       const struct omap_uart_config *info;
 
        if (cpu_is_omap730()) {
                serial_platform_data[0].regshift = 0;
@@ -126,10 +127,14 @@ void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
                serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
        }
 
+       info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
+       if (info == NULL)
+               return;
+
        for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
                unsigned char reg;
 
-               if (ports[i] == 0) {
+               if (!((1 << i) & info->enabled_uarts)) {
                        serial_platform_data[i].membase = NULL;
                        serial_platform_data[i].mapbase = 0;
                        continue;
index 191a9b1ee9b7168f1ef3b561b08f732e55b4c2bf..cdbf4d7620c6ce49df6f813d8f398c96fd084862 100644 (file)
@@ -226,8 +226,8 @@ unsigned long long sched_clock(void)
 
 #ifdef CONFIG_OMAP_32K_TIMER
 
-#ifdef CONFIG_ARCH_OMAP1510
-#error OMAP 32KHz timer does not currently work on 1510!
+#ifdef CONFIG_ARCH_OMAP15XX
+#error OMAP 32KHz timer does not currently work on 15XX!
 #endif
 
 /*
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
new file mode 100644 (file)
index 0000000..5788809
--- /dev/null
@@ -0,0 +1,22 @@
+comment "OMAP Core Type"
+       depends on ARCH_OMAP2
+
+config ARCH_OMAP24XX
+       bool "OMAP24xx Based System"
+       depends on ARCH_OMAP2
+
+config ARCH_OMAP2420
+       bool "OMAP2420 support"
+       depends on ARCH_OMAP24XX
+
+comment "OMAP Board Type"
+       depends on ARCH_OMAP2
+
+config MACH_OMAP_GENERIC
+       bool "Generic OMAP board"
+       depends on ARCH_OMAP2 && ARCH_OMAP24XX
+
+config MACH_OMAP_H4
+       bool "OMAP 2420 H4 board"
+       depends on ARCH_OMAP2 && ARCH_OMAP24XX
+
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
new file mode 100644 (file)
index 0000000..4204116
--- /dev/null
@@ -0,0 +1,13 @@
+#
+# Makefile for the linux kernel.
+#
+
+# Common support
+obj-y := irq.o id.o io.o sram-fn.o clock.o mux.o devices.o serial.o
+
+obj-$(CONFIG_OMAP_MPU_TIMER)           += timer-gp.o
+
+# Specific board support
+obj-$(CONFIG_MACH_OMAP_GENERIC)                += board-generic.o
+obj-$(CONFIG_MACH_OMAP_H4)             += board-h4.o
+
diff --git a/arch/arm/mach-omap2/Makefile.boot b/arch/arm/mach-omap2/Makefile.boot
new file mode 100644 (file)
index 0000000..565aff7
--- /dev/null
@@ -0,0 +1,3 @@
+  zreladdr-y           := 0x80008000
+params_phys-y          := 0x80000100
+initrd_phys-y          := 0x80800000
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
new file mode 100644 (file)
index 0000000..c602e7a
--- /dev/null
@@ -0,0 +1,80 @@
+/*
+ * linux/arch/arm/mach-omap/omap2/board-generic.c
+ *
+ * Copyright (C) 2005 Nokia Corporation
+ * Author: Paul Mundt <paul.mundt@nokia.com>
+ *
+ * Modified from mach-omap/omap1/board-generic.c
+ *
+ * Code for generic OMAP2 board. Should work on many OMAP2 systems where
+ * the bootloader passes the board-specific data to the kernel.
+ * Do not put any board specific code to this&n