Pull sem2mutex into release branch
authorLen Brown <len.brown@intel.com>
Fri, 16 Jun 2006 01:31:47 +0000 (21:31 -0400)
committerLen Brown <len.brown@intel.com>
Fri, 16 Jun 2006 01:31:47 +0000 (21:31 -0400)
731 files changed:
CREDITS
Documentation/devices.txt
Documentation/dvb/get_dvb_firmware
Documentation/feature-removal-schedule.txt
Documentation/firmware_class/README
Documentation/firmware_class/firmware_sample_driver.c
Documentation/kernel-parameters.txt
Documentation/memory-barriers.txt
Documentation/serial/driver
Documentation/spi/pxa2xx [new file with mode: 0644]
Documentation/spi/spi-summary
Documentation/watchdog/watchdog-api.txt
MAINTAINERS
Makefile
arch/alpha/Kconfig
arch/alpha/kernel/alpha_ksyms.c
arch/alpha/kernel/process.c
arch/alpha/kernel/smp.c
arch/alpha/kernel/sys_titan.c
arch/arm/Kconfig.debug
arch/arm/kernel/asm-offsets.c
arch/arm/kernel/dma-isa.c
arch/arm/kernel/process.c
arch/arm/lib/backtrace.S
arch/arm/lib/div64.S
arch/arm/mach-ep93xx/ts72xx.c
arch/arm/mach-imx/irq.c
arch/arm/mach-integrator/integrator_cp.c
arch/arm/mach-ixp23xx/core.c
arch/arm/mach-ixp4xx/Kconfig
arch/arm/mach-pxa/mainstone.c
arch/arm/mach-pxa/spitz.c
arch/arm/mach-realview/realview_eb.c
arch/arm/mach-s3c2410/Kconfig
arch/arm/mach-s3c2410/sleep.S
arch/arm/mach-sa1100/neponset.c
arch/arm/mach-versatile/core.c
arch/arm/mm/ioremap.c
arch/arm/mm/mm-armv.c
arch/arm/mm/proc-xsc3.S
arch/i386/Kconfig
arch/i386/kernel/acpi/boot.c
arch/i386/kernel/acpi/earlyquirk.c
arch/i386/kernel/apic.c
arch/i386/kernel/setup.c
arch/i386/kernel/syscall_table.S
arch/i386/kernel/traps.c
arch/i386/mach-generic/probe.c
arch/i386/mm/init.c
arch/i386/oprofile/nmi_int.c
arch/i386/power/cpu.c
arch/ia64/Kconfig
arch/ia64/configs/sn2_defconfig
arch/ia64/hp/common/sba_iommu.c
arch/ia64/kernel/acpi.c
arch/ia64/kernel/iosapic.c
arch/ia64/kernel/irq.c
arch/ia64/mm/init.c
arch/mips/Kconfig
arch/mips/au1000/common/irq.c
arch/mips/au1000/common/prom.c
arch/mips/au1000/common/sleeper.S
arch/mips/au1000/common/time.c
arch/mips/ddb5xxx/ddb5476/dbg_io.c
arch/mips/ddb5xxx/ddb5477/kgdb_io.c
arch/mips/gt64120/ev64120/serialGT.c
arch/mips/gt64120/momenco_ocelot/dbg_io.c
arch/mips/ite-boards/generic/dbg_io.c
arch/mips/kernel/asm-offsets.c
arch/mips/kernel/cpu-bugs64.c
arch/mips/kernel/cpu-probe.c
arch/mips/kernel/entry.S
arch/mips/kernel/gdb-low.S
arch/mips/kernel/module.c
arch/mips/kernel/proc.c
arch/mips/kernel/scall64-o32.S
arch/mips/kernel/setup.c
arch/mips/kernel/signal-common.h
arch/mips/kernel/smp.c
arch/mips/kernel/syscall.c
arch/mips/kernel/traps.c
arch/mips/kernel/vmlinux.lds.S
arch/mips/math-emu/dp_fint.c
arch/mips/math-emu/dp_flong.c
arch/mips/math-emu/sp_fint.c
arch/mips/math-emu/sp_flong.c
arch/mips/mm/c-r4k.c
arch/mips/mm/init.c
arch/mips/mm/pg-r4k.c
arch/mips/mm/tlbex.c
arch/mips/momentum/jaguar_atx/dbg_io.c
arch/mips/momentum/ocelot_c/dbg_io.c
arch/mips/momentum/ocelot_g/dbg_io.c
arch/mips/oprofile/common.c
arch/mips/oprofile/op_model_mipsxx.c
arch/mips/oprofile/op_model_rm9000.c
arch/mips/sgi-ip32/ip32-irq.c
arch/powerpc/kernel/prom_init.c
arch/powerpc/kernel/signal_32.c
arch/powerpc/kernel/signal_64.c
arch/powerpc/kernel/systbl.S
arch/powerpc/platforms/cell/setup.c
arch/powerpc/platforms/cell/spu_callbacks.c
arch/powerpc/platforms/powermac/low_i2c.c
arch/powerpc/platforms/powermac/pfunc_core.c
arch/powerpc/platforms/powermac/setup.c
arch/powerpc/platforms/pseries/setup.c
arch/ppc/kernel/asm-offsets.c
arch/ppc/platforms/mpc8272ads_setup.c
arch/ppc/syslib/pq2_devices.c
arch/ppc/syslib/pq2_sys.c
arch/s390/kernel/compat_wrapper.S
arch/s390/kernel/syscalls.S
arch/s390/kernel/time.c
arch/sparc/kernel/ioport.c
arch/sparc/kernel/module.c
arch/sparc/kernel/smp.c
arch/sparc/kernel/sparc_ksyms.c
arch/sparc/kernel/systbls.S
arch/sparc64/defconfig
arch/sparc64/kernel/head.S
arch/sparc64/kernel/module.c
arch/sparc64/kernel/pci_iommu.c
arch/sparc64/kernel/pci_sun4v.c
arch/sparc64/kernel/setup.c
arch/sparc64/kernel/smp.c
arch/sparc64/kernel/sparc64_ksyms.c
arch/sparc64/kernel/systbls.S
arch/sparc64/kernel/traps.c
arch/sparc64/lib/checksum.S
arch/sparc64/lib/csum_copy.S
arch/um/Makefile-i386
arch/um/include/kern_util.h
arch/um/kernel/time_kern.c
arch/um/os-Linux/main.c
arch/um/os-Linux/time.c
arch/um/sys-i386/syscalls.c
arch/um/sys-x86_64/signal.c
arch/um/sys-x86_64/syscalls.c
arch/x86_64/Kconfig
arch/x86_64/ia32/ia32_binfmt.c
arch/x86_64/kernel/acpi/Makefile
arch/x86_64/kernel/acpi/processor.c [deleted file]
arch/x86_64/kernel/e820.c
arch/x86_64/kernel/entry.S
arch/x86_64/kernel/io_apic.c
arch/x86_64/kernel/kprobes.c
arch/x86_64/kernel/pci-dma.c
arch/x86_64/kernel/pci-gart.c
arch/x86_64/kernel/pci-nommu.c
arch/x86_64/kernel/pmtimer.c
arch/x86_64/kernel/setup.c
arch/x86_64/kernel/traps.c
arch/x86_64/mm/srat.c
block/as-iosched.c
block/cfq-iosched.c
block/deadline-iosched.c
block/elevator.c
block/genhd.c
block/ll_rw_blk.c
block/noop-iosched.c
drivers/acpi/Kconfig
drivers/acpi/acpi_memhotplug.c
drivers/acpi/asus_acpi.c
drivers/acpi/bus.c
drivers/acpi/dispatcher/dsfield.c
drivers/acpi/dispatcher/dsinit.c
drivers/acpi/dispatcher/dsmethod.c
drivers/acpi/dispatcher/dsmthdat.c
drivers/acpi/dispatcher/dsobject.c
drivers/acpi/dispatcher/dsopcode.c
drivers/acpi/dispatcher/dsutils.c
drivers/acpi/dispatcher/dswexec.c
drivers/acpi/dispatcher/dswload.c
drivers/acpi/dispatcher/dswscope.c
drivers/acpi/dispatcher/dswstate.c
drivers/acpi/ec.c
drivers/acpi/events/evevent.c
drivers/acpi/events/evgpe.c
drivers/acpi/events/evgpeblk.c
drivers/acpi/events/evmisc.c
drivers/acpi/events/evregion.c
drivers/acpi/events/evrgnini.c
drivers/acpi/events/evsci.c
drivers/acpi/events/evxface.c
drivers/acpi/events/evxfevnt.c
drivers/acpi/events/evxfregn.c
drivers/acpi/executer/exconfig.c
drivers/acpi/executer/exconvrt.c
drivers/acpi/executer/excreate.c
drivers/acpi/executer/exdump.c
drivers/acpi/executer/exfield.c
drivers/acpi/executer/exfldio.c
drivers/acpi/executer/exmisc.c
drivers/acpi/executer/exmutex.c
drivers/acpi/executer/exnames.c
drivers/acpi/executer/exoparg1.c
drivers/acpi/executer/exoparg2.c
drivers/acpi/executer/exoparg3.c
drivers/acpi/executer/exoparg6.c
drivers/acpi/executer/exprep.c
drivers/acpi/executer/exregion.c
drivers/acpi/executer/exresnte.c
drivers/acpi/executer/exresolv.c
drivers/acpi/executer/exresop.c
drivers/acpi/executer/exstore.c
drivers/acpi/executer/exstoren.c
drivers/acpi/executer/exstorob.c
drivers/acpi/executer/exsystem.c
drivers/acpi/executer/exutils.c
drivers/acpi/hardware/hwacpi.c
drivers/acpi/hardware/hwgpe.c
drivers/acpi/hardware/hwregs.c
drivers/acpi/hardware/hwsleep.c
drivers/acpi/hardware/hwtimer.c
drivers/acpi/hotkey.c
drivers/acpi/motherboard.c
drivers/acpi/namespace/nsaccess.c
drivers/acpi/namespace/nsalloc.c
drivers/acpi/namespace/nsdump.c
drivers/acpi/namespace/nsdumpdv.c
drivers/acpi/namespace/nseval.c
drivers/acpi/namespace/nsinit.c
drivers/acpi/namespace/nsload.c
drivers/acpi/namespace/nsnames.c
drivers/acpi/namespace/nsobject.c
drivers/acpi/namespace/nsparse.c
drivers/acpi/namespace/nssearch.c
drivers/acpi/namespace/nsutils.c
drivers/acpi/namespace/nswalk.c
drivers/acpi/namespace/nsxfeval.c
drivers/acpi/namespace/nsxfname.c
drivers/acpi/namespace/nsxfobj.c
drivers/acpi/osl.c
drivers/acpi/parser/psargs.c
drivers/acpi/parser/psloop.c
drivers/acpi/parser/psopcode.c
drivers/acpi/parser/psparse.c
drivers/acpi/parser/psscope.c
drivers/acpi/parser/pstree.c
drivers/acpi/parser/psutils.c
drivers/acpi/parser/pswalk.c
drivers/acpi/parser/psxface.c
drivers/acpi/processor_core.c
drivers/acpi/processor_idle.c
drivers/acpi/processor_perflib.c
drivers/acpi/resources/rscalc.c
drivers/acpi/resources/rscreate.c
drivers/acpi/resources/rsdump.c
drivers/acpi/resources/rsinfo.c
drivers/acpi/resources/rslist.c
drivers/acpi/resources/rsmisc.c
drivers/acpi/resources/rsutils.c
drivers/acpi/resources/rsxface.c
drivers/acpi/scan.c
drivers/acpi/sleep/wakeup.c
drivers/acpi/system.c
drivers/acpi/tables.c
drivers/acpi/tables/tbconvrt.c
drivers/acpi/tables/tbget.c
drivers/acpi/tables/tbgetall.c
drivers/acpi/tables/tbinstal.c
drivers/acpi/tables/tbrsdt.c
drivers/acpi/tables/tbutils.c
drivers/acpi/tables/tbxface.c
drivers/acpi/tables/tbxfroot.c
drivers/acpi/thermal.c
drivers/acpi/utilities/utalloc.c
drivers/acpi/utilities/utcache.c
drivers/acpi/utilities/utcopy.c
drivers/acpi/utilities/utdebug.c
drivers/acpi/utilities/utdelete.c
drivers/acpi/utilities/uteval.c
drivers/acpi/utilities/utglobal.c
drivers/acpi/utilities/utinit.c
drivers/acpi/utilities/utmath.c
drivers/acpi/utilities/utmisc.c
drivers/acpi/utilities/utmutex.c
drivers/acpi/utilities/utobject.c
drivers/acpi/utilities/utresrc.c
drivers/acpi/utilities/utstate.c
drivers/acpi/utilities/utxface.c
drivers/acpi/utils.c
drivers/acpi/video.c
drivers/base/firmware_class.c
drivers/base/power/suspend.c
drivers/block/ub.c
drivers/char/Kconfig
drivers/char/Makefile
drivers/char/agp/Kconfig
drivers/char/agp/amd64-agp.c
drivers/char/agp/hp-agp.c
drivers/char/agp/via-agp.c
drivers/char/hpet.c
drivers/char/ipmi/ipmi_si_intf.c
drivers/char/n_tty.c
drivers/char/pcmcia/cm4000_cs.c
drivers/char/rio/host.h
drivers/char/rio/rioboot.c
drivers/char/rio/rioctrl.c
drivers/char/rio/rioioctl.h
drivers/char/sonypi.c
drivers/char/tpm/Kconfig
drivers/char/tpm/tpm.h
drivers/char/tpm/tpm_bios.c
drivers/char/tpm/tpm_tis.c
drivers/char/tty_io.c
drivers/char/vt.c
drivers/char/watchdog/i8xx_tco.c
drivers/char/watchdog/s3c2410_wdt.c
drivers/char/watchdog/sc1200wdt.c
drivers/i2c/busses/scx200_acb.c
drivers/ide/legacy/ide-cs.c
drivers/ide/pci/sgiioc4.c
drivers/ide/ppc/pmac.c
drivers/ieee1394/ohci1394.c
drivers/ieee1394/sbp2.c
drivers/ieee1394/sbp2.h
drivers/infiniband/core/cm.c
drivers/infiniband/core/mad.c
drivers/infiniband/core/mad_priv.h
drivers/infiniband/core/mad_rmpp.c
drivers/infiniband/core/ucm.c
drivers/infiniband/core/uverbs_mem.c
drivers/infiniband/hw/ipath/ipath_driver.c
drivers/infiniband/hw/ipath/ipath_eeprom.c
drivers/infiniband/hw/ipath/ipath_file_ops.c
drivers/infiniband/hw/ipath/ipath_ht400.c
drivers/infiniband/hw/ipath/ipath_init_chip.c
drivers/infiniband/hw/ipath/ipath_kernel.h
drivers/infiniband/hw/ipath/ipath_keys.c
drivers/infiniband/hw/ipath/ipath_layer.c
drivers/infiniband/hw/ipath/ipath_pe800.c
drivers/infiniband/hw/ipath/ipath_qp.c
drivers/infiniband/hw/ipath/ipath_rc.c
drivers/infiniband/hw/ipath/ipath_ruc.c
drivers/infiniband/hw/ipath/ipath_verbs.c
drivers/infiniband/hw/mthca/mthca_cmd.c
drivers/infiniband/hw/mthca/mthca_qp.c
drivers/infiniband/hw/mthca/mthca_srq.c
drivers/infiniband/ulp/ipoib/ipoib_ib.c
drivers/infiniband/ulp/srp/ib_srp.c
drivers/input/joystick/sidewinder.c
drivers/input/keyboard/corgikbd.c
drivers/input/keyboard/spitzkbd.c
drivers/input/misc/wistron_btns.c
drivers/input/mouse/alps.c
drivers/input/mouse/lifebook.c
drivers/input/mouse/logips2pp.c
drivers/input/touchscreen/ads7846.c
drivers/isdn/capi/capi.c
drivers/isdn/gigaset/usb-gigaset.c
drivers/isdn/i4l/isdn_tty.c
drivers/leds/Kconfig
drivers/leds/led-class.c
drivers/leds/ledtrig-timer.c
drivers/md/md.c
drivers/md/raid0.c
drivers/media/Kconfig
drivers/media/common/Kconfig
drivers/media/dvb/Kconfig
drivers/media/dvb/b2c2/Kconfig
drivers/media/dvb/bt8xx/Kconfig
drivers/media/dvb/bt8xx/dvb-bt8xx.c
drivers/media/dvb/cinergyT2/cinergyT2.c
drivers/media/dvb/dvb-core/dvb_frontend.c
drivers/media/dvb/dvb-core/dvbdev.c
drivers/media/dvb/dvb-usb/Kconfig
drivers/media/dvb/dvb-usb/cxusb.c
drivers/media/dvb/frontends/cx24123.c
drivers/media/dvb/frontends/dvb-pll.c
drivers/media/dvb/pluto2/Kconfig
drivers/media/dvb/pluto2/Makefile
drivers/media/dvb/ttpci/Kconfig
drivers/media/dvb/ttpci/budget-av.c
drivers/media/dvb/ttpci/budget-ci.c
drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
drivers/media/radio/Kconfig
drivers/media/video/Kconfig
drivers/media/video/Makefile
drivers/media/video/bt8xx/Kconfig
drivers/media/video/bt8xx/Makefile
drivers/media/video/bt8xx/bttv-cards.c
drivers/media/video/bt8xx/bttv-risc.c
drivers/media/video/cx25840/cx25840-firmware.c
drivers/media/video/cx88/cx88-cards.c
drivers/media/video/cx88/cx88-core.c
drivers/media/video/cx88/cx88-dvb.c
drivers/media/video/cx88/cx88-video.c
drivers/media/video/em28xx/Kconfig
drivers/media/video/em28xx/em28xx-video.c
drivers/media/video/et61x251/Kconfig
drivers/media/video/pwc/Kconfig
drivers/media/video/pwc/Makefile
drivers/media/video/saa7127.c
drivers/media/video/saa7134/saa7134-cards.c
drivers/media/video/saa7134/saa7134-core.c
drivers/media/video/saa7134/saa7134-video.c
drivers/media/video/sn9c102/Kconfig
drivers/media/video/tuner-types.c
drivers/media/video/tveeprom.c
drivers/media/video/usbvideo/Kconfig
drivers/media/video/vivi.c
drivers/media/video/zc0301/Kconfig
drivers/message/fusion/mptbase.c
drivers/message/fusion/mptspi.c
drivers/message/i2o/exec-osm.c
drivers/message/i2o/iop.c
drivers/mmc/Kconfig
drivers/mmc/au1xmmc.c
drivers/mmc/imxmmc.c
drivers/mmc/mmc.c
drivers/mmc/mmc_block.c
drivers/mmc/pxamci.c
drivers/mmc/wbsd.c
drivers/net/b44.c
drivers/net/bnx2.c
drivers/net/dl2k.c
drivers/net/e1000/e1000_ethtool.c
drivers/net/e1000/e1000_main.c
drivers/net/forcedeth.c
drivers/net/irda/Kconfig
drivers/net/ixp2000/enp2611.c
drivers/net/ixp2000/pm3386.c
drivers/net/ixp2000/pm3386.h
drivers/net/netconsole.c
drivers/net/pcmcia/axnet_cs.c
drivers/net/pcmcia/nmclan_cs.c
drivers/net/pcnet32.c
drivers/net/pppoe.c
drivers/net/skge.c
drivers/net/sky2.c
drivers/net/sky2.h
drivers/net/tg3.c
drivers/net/tg3.h
drivers/net/tulip/winbond-840.c
drivers/net/via-rhine.c
drivers/net/wireless/arlan-main.c
drivers/net/wireless/bcm43xx/bcm43xx_dma.c
drivers/net/wireless/bcm43xx/bcm43xx_main.c
drivers/net/wireless/orinoco.c
drivers/net/wireless/wavelan.c
drivers/pci/pci-acpi.c
drivers/pci/pci-driver.c
drivers/pci/pci.c
drivers/pci/quirks.c
drivers/pcmcia/ds.c
drivers/pcmcia/pcmcia_ioctl.c
drivers/pcmcia/pd6729.c
drivers/pnp/pnpacpi/rsparser.c
drivers/rtc/rtc-dev.c
drivers/rtc/rtc-m48t86.c
drivers/rtc/rtc-sa1100.c
drivers/rtc/rtc-test.c
drivers/rtc/rtc-vr41xx.c
drivers/s390/cio/css.h
drivers/s390/cio/device_fsm.c
drivers/s390/net/ctcmain.c
drivers/s390/net/ctctty.c
drivers/s390/net/cu3088.c
drivers/s390/net/iucv.c
drivers/s390/net/iucv.h
drivers/s390/net/lcs.c
drivers/s390/net/lcs.h
drivers/s390/net/netiucv.c
drivers/s390/net/qeth.h
drivers/s390/net/qeth_eddp.c
drivers/s390/net/qeth_fs.h
drivers/s390/net/qeth_main.c
drivers/s390/net/qeth_mpc.h
drivers/s390/net/qeth_proc.c
drivers/s390/net/qeth_sys.c
drivers/s390/net/qeth_tso.h
drivers/sbus/char/openprom.c
drivers/scsi/libata-core.c
drivers/scsi/ppa.c
drivers/scsi/sata_mv.c
drivers/scsi/sata_sil24.c
drivers/scsi/scsi_devinfo.c
drivers/scsi/scsi_lib.c
drivers/scsi/scsi_transport_sas.c
drivers/scsi/st.c
drivers/serial/cpm_uart/cpm_uart_core.c
drivers/serial/cpm_uart/cpm_uart_cpm2.c
drivers/serial/serial_core.c
drivers/serial/sunsu.c
drivers/spi/Kconfig
drivers/spi/Makefile
drivers/spi/pxa2xx_spi.c [new file with mode: 0644]
drivers/spi/spi.c
drivers/spi/spi_bitbang.c
drivers/spi/spi_butterfly.c
drivers/spi/spi_mpc83xx.c [new file with mode: 0644]
drivers/spi/spi_s3c24xx.c [new file with mode: 0644]
drivers/spi/spi_s3c24xx_gpio.c [new file with mode: 0644]
drivers/usb/atm/speedtch.c
drivers/usb/atm/usbatm.c
drivers/usb/core/hcd.c
drivers/usb/core/hub.c
drivers/usb/host/ohci-hcd.c
drivers/usb/host/ohci-pxa27x.c
drivers/usb/input/hid-core.c
drivers/usb/input/hiddev.c
drivers/usb/misc/emi26.c
drivers/usb/misc/emi62.c
drivers/usb/net/pegasus.c
drivers/usb/serial/Kconfig
drivers/usb/serial/Makefile
drivers/usb/serial/airprime.c
drivers/usb/serial/ark3116.c [new file with mode: 0644]
drivers/usb/serial/ftdi_sio.c
drivers/usb/serial/ftdi_sio.h
drivers/usb/serial/generic.c
drivers/usb/serial/omninet.c
drivers/usb/serial/usb-serial.c
drivers/video/au1100fb.c
drivers/video/backlight/backlight.c
drivers/video/backlight/lcd.c
drivers/video/console/fbcon.c
drivers/video/i810/i810_main.c
drivers/video/matrox/g450_pll.c
drivers/video/matrox/matroxfb_DAC1064.h
drivers/video/matrox/matroxfb_base.h
drivers/video/maxinefb.c
fs/9p/fcall.c
fs/9p/mux.c
fs/9p/mux.h
fs/9p/vfs_file.c
fs/9p/vfs_inode.c
fs/Makefile
fs/affs/namei.c
fs/autofs4/autofs_i.h
fs/autofs4/root.c
fs/autofs4/waitq.c
fs/binfmt_flat.c
fs/bio.c
fs/cifs/CHANGES
fs/cifs/cifsfs.h
fs/cifs/cifsproto.h
fs/cifs/cifssmb.c
fs/cifs/connect.c
fs/cifs/file.c
fs/compat.c
fs/configfs/dir.c
fs/debugfs/inode.c
fs/exportfs/expfs.c
fs/ext3/resize.c
fs/inotify.c
fs/jffs2/nodelist.c
fs/jfs/jfs_metapage.c
fs/locks.c
fs/namei.c
fs/namespace.c
fs/nfsd/export.c
fs/nfsd/vfs.c
fs/ocfs2/aops.c
fs/ocfs2/aops.h
fs/ocfs2/extent_map.c
fs/ocfs2/file.c
fs/ocfs2/journal.c
fs/ocfs2/uptodate.c
fs/ocfs2/vote.c
fs/open.c
fs/partitions/check.c
fs/smbfs/dir.c
fs/smbfs/request.c
include/acpi/acconfig.h
include/acpi/acdisasm.h
include/acpi/acdispat.h
include/acpi/acevents.h
include/acpi/acexcep.h
include/acpi/acglobal.h
include/acpi/aclocal.h
include/acpi/acmacros.h
include/acpi/acnamesp.h
include/acpi/acobject.h
include/acpi/acopcode.h
include/acpi/acoutput.h
include/acpi/acparser.h
include/acpi/acpi_bus.h
include/acpi/acpiosxf.h
include/acpi/acpixf.h
include/acpi/acresrc.h
include/acpi/acstruct.h
include/acpi/actables.h
include/acpi/actbl.h
include/acpi/actbl1.h
include/acpi/actbl2.h
include/acpi/actypes.h
include/acpi/acutils.h
include/acpi/amlcode.h
include/acpi/amlresrc.h
include/acpi/platform/acenv.h
include/acpi/platform/aclinux.h
include/asm-alpha/smp.h
include/asm-alpha/termbits.h
include/asm-arm/arch-ixp23xx/memory.h
include/asm-arm/arch-l7200/serial_l7200.h
include/asm-arm/arch-l7200/uncompress.h
include/asm-arm/arch-pxa/ohci.h
include/asm-arm/arch-pxa/pxa2xx_spi.h [new file with mode: 0644]
include/asm-arm/arch-s3c2410/spi-gpio.h [new file with mode: 0644]
include/asm-arm/arch-s3c2410/spi.h [new file with mode: 0644]
include/asm-arm/procinfo.h
include/asm-arm/spinlock.h
include/asm-arm/system.h
include/asm-generic/pgtable.h
include/asm-i386/apicdef.h
include/asm-mips/addrspace.h
include/asm-mips/cpu.h
include/asm-mips/delay.h
include/asm-mips/futex.h
include/asm-mips/inst.h
include/asm-mips/mipsregs.h
include/asm-mips/page.h
include/asm-mips/pgtable-32.h
include/asm-mips/pgtable-64.h
include/asm-mips/pgtable.h
include/asm-mips/sigcontext.h
include/asm-mips/smp.h
include/asm-mips/sparsemem.h [new file with mode: 0644]
include/asm-powerpc/termbits.h
include/asm-powerpc/unistd.h
include/asm-s390/futex.h
include/asm-s390/lowcore.h
include/asm-s390/unistd.h
include/asm-sparc/unistd.h
include/asm-sparc64/dma-mapping.h
include/asm-sparc64/pci.h
include/asm-sparc64/pgtable.h
include/asm-sparc64/unistd.h
include/asm-um/irqflags.h [new file with mode: 0644]
include/asm-um/uaccess.h
include/asm-x86_64/acpi.h
include/asm-x86_64/apicdef.h
include/asm-x86_64/elf.h
include/linux/elevator.h
include/linux/firmware.h
include/linux/fs.h
include/linux/fsl_devices.h
include/linux/i2o.h
include/linux/input.h
include/linux/kernel.h
include/linux/m48t86.h
include/linux/mempolicy.h
include/linux/mmc/mmc.h
include/linux/mmzone.h
include/linux/pci-acpi.h
include/linux/pci_ids.h
include/linux/rcupdate.h
include/linux/slab.h
include/linux/spi/spi.h
include/linux/spi/spi_bitbang.h
include/linux/swap.h
include/linux/syscalls.h
include/linux/videodev2.h
include/linux/vt_kern.h
include/net/compat.h
include/net/irda/irlmp.h
include/net/neighbour.h
include/net/sctp/command.h
include/net/sctp/sctp.h
init/do_mounts.c
init/initramfs.c
kernel/cpuset.c
kernel/extable.c
kernel/hrtimer.c
kernel/module.c
kernel/rcupdate.c
kernel/sched.c
kernel/timer.c
lib/Kconfig.debug
lib/kobject.c
mm/memory_hotplug.c
mm/page_alloc.c
mm/shmem.c
mm/slab.c
mm/sparse.c
mm/vmscan.c
net/802/tr.c
net/atm/clip.c
net/bridge/br.c
net/bridge/br_if.c
net/bridge/netfilter/ebt_log.c
net/core/dev.c
net/core/neighbour.c
net/dccp/ackvec.c
net/ethernet/Makefile
net/ethernet/sysctl_net_ether.c [deleted file]
net/ipv4/ip_forward.c
net/ipv4/ipcomp.c
net/ipv4/netfilter/Kconfig
net/ipv4/netfilter/arp_tables.c
net/ipv4/netfilter/ip_conntrack_core.c
net/ipv4/netfilter/ip_conntrack_helper_h323_asn1.c
net/ipv4/netfilter/ip_conntrack_helper_pptp.c
net/ipv4/netfilter/ip_nat_proto_gre.c
net/ipv4/netfilter/ip_nat_snmp_basic.c
net/ipv4/netfilter/ipt_LOG.c
net/ipv4/netfilter/ipt_recent.c
net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c
net/ipv4/tcp_highspeed.c
net/ipv4/tcp_input.c
net/ipv4/tcp_output.c
net/ipv4/xfrm4_policy.c
net/ipv6/ipcomp6.c
net/ipv6/netfilter/ip6_tables.c
net/ipv6/netfilter/ip6t_LOG.c
net/ipv6/netfilter/ip6t_eui64.c
net/ipv6/route.c
net/ipx/af_ipx.c
net/ipx/ipx_route.c
net/irda/iriap.c
net/irda/irlap.c
net/netfilter/nfnetlink_log.c
net/sched/sch_generic.c
net/sctp/input.c
net/sctp/sm_sideeffect.c
net/sctp/sm_statefuns.c
net/sctp/socket.c
net/sunrpc/cache.c
net/sysctl_net.c
net/xfrm/xfrm_input.c
scripts/mod/modpost.c
scripts/mod/modpost.h
security/selinux/hooks.c
security/selinux/ss/services.c
sound/drivers/mpu401/mpu401.c
sound/isa/es18xx.c
sound/oss/ad1848.c
sound/oss/nm256_audio.c

diff --git a/CREDITS b/CREDITS
index 6f50be37fa0f81dbcccd5929b0c92c4f59775dd6..9bf714a1c7d97e92a634161c3538ee93e30f07d3 100644 (file)
--- a/CREDITS
+++ b/CREDITS
@@ -3241,14 +3241,9 @@ S: 12725 SW Millikan Way, Suite 400
 S: Beaverton, Oregon 97005
 S: USA
 
-N: Marcelo W. Tosatti
-E: marcelo.tosatti@cyclades.com
-D: Miscellaneous kernel hacker
+N: Marcelo Tosatti
+E: marcelo@kvack.org
 D: v2.4 kernel maintainer
-D: Current pc300/cyclades maintainer
-S: Cyclades Corporation
-S: Av Cristovao Colombo, 462. Floresta.
-S: Porto Alegre
 S: Brazil
 
 N: Stefan Traby
index 3c406acd4dfae8c65e4f88ab5552416972c98276..b369a8c46a7311c8d5561d730a95a6049cee2ff2 100644 (file)
@@ -1721,11 +1721,6 @@ Your cooperation is appreciated.
                These devices support the same API as the generic SCSI
                devices.
 
- 97 block      Packet writing for CD/DVD devices
-                 0 = /dev/pktcdvd0     First packet-writing module
-                 1 = /dev/pktcdvd1     Second packet-writing module
-                   ...
-
  98 char       Control and Measurement Device (comedi)
                  0 = /dev/comedi0      First comedi device
                  1 = /dev/comedi1      Second comedi device
index 15fc8fbef67e3fa48a8d68365b1852103e501115..4820366b6ae899667cf0589b789661d990eda7cc 100644 (file)
@@ -259,9 +259,9 @@ sub dibusb {
 }
 
 sub nxt2002 {
-    my $sourcefile = "Broadband4PC_4_2_11.zip";
+    my $sourcefile = "Technisat_DVB-PC_4_4_COMPACT.zip";
     my $url = "http://www.bbti.us/download/windows/$sourcefile";
-    my $hash = "c6d2ea47a8f456d887ada0cfb718ff2a";
+    my $hash = "476befae8c7c1bb9648954060b1eec1f";
     my $outfile = "dvb-fe-nxt2002.fw";
     my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 1);
 
@@ -269,8 +269,8 @@ sub nxt2002 {
 
     wgetfile($sourcefile, $url);
     unzip($sourcefile, $tmpdir);
-    verify("$tmpdir/SkyNETU.sys", $hash);
-    extract("$tmpdir/SkyNETU.sys", 375832, 5908, $outfile);
+    verify("$tmpdir/SkyNET.sys", $hash);
+    extract("$tmpdir/SkyNET.sys", 331624, 5908, $outfile);
 
     $outfile;
 }
index 421bcfff6ad21be680fcf819243ca9d750fa8ab2..43ab119963d5ef706f1f5c602526a4a9caf28ae9 100644 (file)
@@ -57,6 +57,15 @@ Who: Jody McIntyre <scjody@steamballoon.com>
 
 ---------------------------
 
+What:  sbp2: module parameter "force_inquiry_hack"
+When:  July 2006
+Why:   Superceded by parameter "workarounds". Both parameters are meant to be
+       used ad-hoc and for single devices only, i.e. not in modprobe.conf,
+       therefore the impact of this feature replacement should be low.
+Who:   Stefan Richter <stefanr@s5r6.in-berlin.de>
+
+---------------------------
+
 What:  Video4Linux API 1 ioctls and video_decoder.h from Video devices.
 When:  July 2006
 Why:   V4L1 AP1 was replaced by V4L2 API. during migration from 2.4 to 2.6
index 43e836c07ae89ee817ad75fe33e9cd37ea5b44ae..e9cc8bb26f7d0952b0226c66e6a43abe8e00a211 100644 (file)
    on the setup, so I think that the choice on what firmware to make
    persistent should be left to userspace.
 
- - Why register_firmware()+__init can be useful:
-       - For boot devices needing firmware.
-       - To make the transition easier:
-               The firmware can be declared __init and register_firmware()
-               called on module_init. Then the firmware is warranted to be
-               there even if "firmware hotplug userspace" is not there yet or
-               it doesn't yet provide the needed firmware.
-               Once the firmware is widely available in userspace, it can be
-               removed from the kernel. Or made optional (CONFIG_.*_FIRMWARE).
-
-       In either case, if firmware hotplug support is there, it can move the
-       firmware out of kernel memory into the real filesystem for later
-       usage.
-
-       Note: If persistence is implemented on top of initramfs,
-       register_firmware() may not be appropriate.
-
index ad3edaba4533cf33d5452e5b4bb877455000c05b..87feccdb5c9f8f67b2739358edca07c76a9a24a1 100644 (file)
@@ -5,8 +5,6 @@
  *
  * Sample code on how to use request_firmware() from drivers.
  *
- * Note that register_firmware() is currently useless.
- *
  */
 
 #include <linux/module.h>
 
 #include "linux/firmware.h"
 
-#define WE_CAN_NEED_FIRMWARE_BEFORE_USERSPACE_IS_AVAILABLE
-#ifdef WE_CAN_NEED_FIRMWARE_BEFORE_USERSPACE_IS_AVAILABLE
-char __init inkernel_firmware[] = "let's say that this is firmware\n";
-#endif
-
 static struct device ghost_device = {
        .bus_id    = "ghost0",
 };
@@ -104,10 +97,6 @@ static void sample_probe_async(void)
 
 static int sample_init(void)
 {
-#ifdef WE_CAN_NEED_FIRMWARE_BEFORE_USERSPACE_IS_AVAILABLE
-       register_firmware("sample_driver_fw", inkernel_firmware,
-                         sizeof(inkernel_firmware));
-#endif
        device_initialize(&ghost_device);
        /* since there is no real hardware insertion I just call the
         * sample probe functions here */
index b3a6187e53051866004696e4d5718cd85240e1c2..a853e860786527415a15eadcf9e0388d80a25424 100644 (file)
@@ -147,6 +147,9 @@ running once the system is up.
        acpi_irq_isa=   [HW,ACPI] If irq_balance, mark listed IRQs used by ISA
                        Format: <irq>,<irq>...
 
+       acpi_os_name=   [HW,ACPI] Tell ACPI BIOS the name of the OS
+                       Format: To spoof as Windows 98: ="Microsoft Windows"
+
        acpi_osi=       [HW,ACPI] empty param disables _OSI
 
        acpi_serialize  [HW,ACPI] force serialization of AML methods
index 92f0056d928c1f5ff485e250a93a843bb60058bc..4710845dbac4fb663e35fcf0056499614a06e56b 100644 (file)
@@ -19,6 +19,7 @@ Contents:
      - Control dependencies.
      - SMP barrier pairing.
      - Examples of memory barrier sequences.
+     - Read memory barriers vs load speculation.
 
  (*) Explicit kernel barriers.
 
@@ -248,7 +249,7 @@ And there are a number of things that _must_ or _must_not_ be assumed:
      we may get either of:
 
        STORE *A = X; Y = LOAD *A;
-       STORE *A = Y;
+       STORE *A = Y = X;
 
 
 =========================
@@ -344,9 +345,12 @@ Memory barriers come in four basic varieties:
 
  (4) General memory barriers.
 
-     A general memory barrier is a combination of both a read memory barrier
-     and a write memory barrier.  It is a partial ordering over both loads and
-     stores.
+     A general memory barrier gives a guarantee that all the LOAD and STORE
+     operations specified before the barrier will appear to happen before all
+     the LOAD and STORE operations specified after the barrier with respect to
+     the other components of the system.
+
+     A general memory barrier is a partial ordering over both loads and stores.
 
      General memory barriers imply both read and write memory barriers, and so
      can substitute for either.
@@ -546,9 +550,9 @@ write barrier, though, again, a general barrier is viable:
        =============== ===============
        a = 1;
        <write barrier>
-       b = 2;          x = a;
+       b = 2;          x = b;
                        <read barrier>
-                       y = b;
+                       y = a;
 
 Or:
 
@@ -563,6 +567,18 @@ Or:
 Basically, the read barrier always has to be there, even though it can be of
 the "weaker" type.
 
+[!] Note that the stores before the write barrier would normally be expected to
+match the loads after the read barrier or data dependency barrier, and vice
+versa:
+
+       CPU 1                           CPU 2
+       ===============                 ===============
+       a = 1;           }----   --->{  v = c
+       b = 2;           }    \ /    {  w = d
+       <write barrier>        \        <read barrier>
+       c = 3;           }    / \    {  x = a;
+       d = 4;           }----   --->{  y = b;
+
 
 EXAMPLES OF MEMORY BARRIER SEQUENCES
 ------------------------------------
@@ -600,8 +616,8 @@ STORE B, STORE C } all occuring before the unordered set of { STORE D, STORE E
        |       |       +------+
        +-------+       :      :
                           |
-                          | Sequence in which stores committed to memory system
-                          | by CPU 1
+                          | Sequence in which stores are committed to the
+                          | memory system by CPU 1
                           V
 
 
@@ -683,14 +699,12 @@ then the following will occur:
                                       |        :       :       |       |
                                       |        :       :       | CPU 2 |
                                       |        +-------+       |       |
-                                       \       | X->9  |------>|       |
-                                        \      +-------+       |       |
-                                         ----->| B->2  |       |       |
-                                               +-------+       |       |
-            Makes sure all effects --->    ddddddddddddddddd   |       |
-            prior to the store of C            +-------+       |       |
-            are perceptible to                 | B->2  |------>|       |
-            successive loads                   +-------+       |       |
+                                      |        | X->9  |------>|       |
+                                      |        +-------+       |       |
+         Makes sure all effects --->   \   ddddddddddddddddd   |       |
+         prior to the store of C        \      +-------+       |       |
+         are perceptible to              ----->| B->2  |------>|       |
+         subsequent loads                      +-------+       |       |
                                                :       :       +-------+
 
 
@@ -699,73 +713,239 @@ following sequence of events:
 
        CPU 1                   CPU 2
        ======================= =======================
+               { A = 0, B = 9 }
        STORE A=1
-       STORE B=2
-       STORE C=3
        <write barrier>
-       STORE D=4
-       STORE E=5
-                               LOAD A
+       STORE B=2
                                LOAD B
-                               LOAD C
-                               LOAD D
-                               LOAD E
+                               LOAD A
 
 Without intervention, CPU 2 may then choose to perceive the events on CPU 1 in
 some effectively random order, despite the write barrier issued by CPU 1:
 
-       +-------+       :      :
-       |       |       +------+
-       |       |------>| C=3  | }
-       |       |  :    +------+ }
-       |       |  :    | A=1  | }
-       |       |  :    +------+ }
-       | CPU 1 |  :    | B=2  | }---
-       |       |       +------+ }   \
-       |       |   wwwwwwwwwwwww}    \
-       |       |       +------+ }     \          :       :       +-------+
-       |       |  :    | E=5  | }      \         +-------+       |       |
-       |       |  :    +------+ }       \      { | C->3  |------>|       |
-       |       |------>| D=4  | }        \     { +-------+    :  |       |
-       |       |       +------+           \    { | E->5  |    :  |       |
-       +-------+       :      :            \   { +-------+    :  |       |
-                                  Transfer  -->{ | A->1  |    :  | CPU 2 |
-                                 from CPU 1    { +-------+    :  |       |
-                                  to CPU 2     { | D->4  |    :  |       |
-                                               { +-------+    :  |       |
-                                               { | B->2  |------>|       |
-                                                 +-------+       |       |
-                                                 :       :       +-------+
-
-
-If, however, a read barrier were to be placed between the load of C and the
-load of D on CPU 2, then the partial ordering imposed by CPU 1 will be
-perceived correctly by CPU 2.
+       +-------+       :      :                :       :
+       |       |       +------+                +-------+
+       |       |------>| A=1  |------      --->| A->0  |
+       |       |       +------+      \         +-------+
+       | CPU 1 |   wwwwwwwwwwwwwwww   \    --->| B->9  |
+       |       |       +------+        |       +-------+
+       |       |------>| B=2  |---     |       :       :
+       |       |       +------+   \    |       :       :       +-------+
+       +-------+       :      :    \   |       +-------+       |       |
+                                    ---------->| B->2  |------>|       |
+                                       |       +-------+       | CPU 2 |
+                                       |       | A->0  |------>|       |
+                                       |       +-------+       |       |
+                                       |       :       :       +-------+
+                                        \      :       :
+                                         \     +-------+
+                                          ---->| A->1  |
+                                               +-------+
+                                               :       :
 
-       +-------+       :      :
-       |       |       +------+
-       |       |------>| C=3  | }
-       |       |  :    +------+ }
-       |       |  :    | A=1  | }---
-       |       |  :    +------+ }   \
-       | CPU 1 |  :    | B=2  | }    \
-       |       |       +------+       \
-       |       |   wwwwwwwwwwwwwwww    \
-       |       |       +------+         \        :       :       +-------+
-       |       |  :    | E=5  | }        \       +-------+       |       |
-       |       |  :    +------+ }---      \    { | C->3  |------>|       |
-       |       |------>| D=4  | }   \      \   { +-------+    :  |       |
-       |       |       +------+      \      -->{ | B->2  |    :  |       |
-       +-------+       :      :       \        { +-------+    :  |       |
-                                       \       { | A->1  |    :  | CPU 2 |
-                                        \        +-------+       |       |
-          At this point the read ---->   \   rrrrrrrrrrrrrrrrr   |       |
-          barrier causes all effects      \      +-------+       |       |
-          prior to the storage of C        \   { | E->5  |    :  |       |
-          to be perceptible to CPU 2        -->{ +-------+    :  |       |
-                                               { | D->4  |------>|       |
-                                                 +-------+       |       |
-                                                 :       :       +-------+
+
+If, however, a read barrier were to be placed between the load of E and the
+load of A on CPU 2:
+
+       CPU 1                   CPU 2
+       ======================= =======================
+               { A = 0, B = 9 }
+       STORE A=1
+       <write barrier>
+       STORE B=2
+                               LOAD B
+                               <read barrier>
+                               LOAD A
+
+then the partial ordering imposed by CPU 1 will be perceived correctly by CPU
+2:
+
+       +-------+       :      :                :       :
+       |       |       +------+                +-------+
+       |       |------>| A=1  |------      --->| A->0  |
+       |       |       +------+      \         +-------+
+       | CPU 1 |   wwwwwwwwwwwwwwww   \    --->| B->9  |
+       |       |       +------+        |       +-------+
+       |       |------>| B=2  |---     |       :       :
+       |       |       +------+   \    |       :       :       +-------+
+       +-------+       :      :    \   |       +-------+       |       |
+                                    ---------->| B->2  |------>|       |
+                                       |       +-------+       | CPU 2 |
+                                       |       :       :       |       |
+                                       |       :       :       |       |
+         At this point the read ---->   \  rrrrrrrrrrrrrrrrr   |       |
+         barrier causes all effects      \     +-------+       |       |
+         prior to the storage of B        ---->| A->1  |------>|       |
+         to be perceptible to CPU 2            +-------+       |       |
+                                               :       :       +-------+
+
+
+To illustrate this more completely, consider what could happen if the code
+contained a load of A either side of the read barrier:
+
+       CPU 1                   CPU 2
+       ======================= =======================
+               { A = 0, B = 9 }
+       STORE A=1
+       <write barrier>
+       STORE B=2
+                               LOAD B
+                               LOAD A [first load of A]
+                               <read barrier>
+                               LOAD A [second load of A]
+
+Even though the two loads of A both occur after the load of B, they may both
+come up with different values:
+
+       +-------+       :      :                :       :
+       |       |       +------+                +-------+
+       |       |------>| A=1  |------      --->| A->0  |
+       |       |       +------+      \         +-------+
+       | CPU 1 |   wwwwwwwwwwwwwwww   \    --->| B->9  |
+       |       |       +------+        |       +-------+
+       |       |------>| B=2  |---     |       :       :
+       |       |       +------+   \    |       :       :       +-------+
+       +-------+       :      :    \   |       +-------+       |       |
+                                    ---------->| B->2  |------>|       |
+                                       |       +-------+       | CPU 2 |
+                                       |       :       :       |       |
+                                       |       :       :       |       |
+                                       |       +-------+       |       |
+                                       |       | A->0  |------>| 1st   |
+                                       |       +-------+       |       |
+         At this point the read ---->   \  rrrrrrrrrrrrrrrrr   |       |
+         barrier causes all effects      \     +-------+       |       |
+         prior to the storage of B        ---->| A->1  |------>| 2nd   |
+         to be perceptible to CPU 2            +-------+       |       |
+                                               :       :       +-------+
+
+
+But it may be that the update to A from CPU 1 becomes perceptible to CPU 2
+before the read barrier completes anyway:
+
+       +-------+       :      :                :       :
+       |       |       +------+                +-------+
+       |       |------>| A=1  |------      --->| A->0  |
+       |       |       +------+      \         +-------+
+       | CPU 1 |   wwwwwwwwwwwwwwww   \    --->| B->9  |
+       |       |       +------+        |       +-------+
+       |       |------>| B=2  |---     |       :       :
+       |       |       +------+   \    |       :       :       +-------+
+       +-------+       :      :    \   |       +-------+       |       |
+                                    ---------->| B->2  |------>|       |
+                                       |       +-------+       | CPU 2 |
+                                       |       :       :       |       |
+                                        \      :       :       |       |
+                                         \     +-------+       |       |
+                                          ---->| A->1  |------>| 1st   |
+                                               +-------+       |       |
+                                           rrrrrrrrrrrrrrrrr   |       |
+                                               +-------+       |       |
+                                               | A->1  |------>| 2nd   |
+                                               +-------+       |       |
+                                               :       :       +-------+
+
+
+The guarantee is that the second load will always come up with A == 1 if the
+load of B came up with B == 2.  No such guarantee exists for the first load of
+A; that may come up with either A == 0 or A == 1.
+
+
+READ MEMORY BARRIERS VS LOAD SPECULATION
+----------------------------------------
+
+Many CPUs speculate with loads: that is they see that they will need to load an
+item from memory, and they find a time where they're not using the bus for any
+other loads, and so do the load in advance - even though they haven't actually
+got to that point in the instruction execution flow yet.  This permits the
+actual load instruction to potentially complete immediately because the CPU
+already has the value to hand.
+
+It may turn out that the CPU didn't actually need the value - perhaps because a
+branch circumvented the load - in which case it can discard the value or just
+cache it for later use.
+
+Consider:
+
+       CPU 1                   CPU 2
+       ======================= =======================
+                               LOAD B
+                               DIVIDE          } Divide instructions generally
+                               DIVIDE          } take a long time to perform
+                               LOAD A
+
+Which might appear as this:
+
+                                               :       :       +-------+
+                                               +-------+       |       |
+                                           --->| B->2  |------>|       |
+                                               +-------+       | CPU 2 |
+                                               :       :DIVIDE |       |
+                                               +-------+       |       |
+       The CPU being busy doing a --->     --->| A->0  |~~~~   |       |
+       division speculates on the              +-------+   ~   |       |
+       LOAD of A                               :       :   ~   |       |
+                                               :       :DIVIDE |       |
+                                               :       :   ~   |       |
+       Once the divisions are complete -->     :       :   ~-->|       |
+       the CPU can then perform the            :       :       |       |
+       LOAD with immediate effect              :       :       +-------+
+
+
+Placing a read barrier or a data dependency barrier just before the second
+load:
+
+       CPU 1                   CPU 2
+       ======================= =======================
+                               LOAD B
+                               DIVIDE
+                               DIVIDE
+                               <read barrier>
+                               LOAD A
+
+will force any value speculatively obtained to be reconsidered to an extent
+dependent on the type of barrier used.  If there was no change made to the
+speculated memory location, then the speculated value will just be used:
+
+                                               :       :       +-------+
+                                               +-------+       |       |
+                                           --->| B->2  |------>|       |
+                                               +-------+       | CPU 2 |
+                                               :       :DIVIDE |       |
+                                               +-------+       |       |
+       The CPU being busy doing a --->     --->| A->0  |~~~~   |       |
+       division speculates on the              +-------+   ~   |       |
+       LOAD of A                               :       :   ~   |       |
+                                               :       :DIVIDE |       |
+                                               :       :   ~   |       |
+                                               :       :   ~   |       |
+                                           rrrrrrrrrrrrrrrr~   |       |
+                                               :       :   ~   |       |
+                                               :       :   ~-->|       |
+                                               :       :       |       |
+                                               :       :       +-------+
+
+
+but if there was an update or an invalidation from another CPU pending, then
+the speculation will be cancelled and the value reloaded:
+
+                                               :       :       +-------+
+                                               +-------+       |       |
+                                           --->| B->2  |------>|       |
+                                               +-------+       | CPU 2 |
+                                               :       :DIVIDE |       |
+                                               +-------+       |       |
+       The CPU being busy doing a --->     --->| A->0  |~~~~   |       |
+       division speculates on the              +-------+   ~   |       |
+       LOAD of A                               :       :   ~   |       |
+                                               :       :DIVIDE |       |
+                                               :       :   ~   |       |
+                                               :       :   ~   |       |
+                                           rrrrrrrrrrrrrrrrr   |       |
+                                               +-------+       |       |
+       The speculation is discarded --->   --->| A->1  |------>|       |
+       and an updated value is                 +-------+       |       |
+       retrieved                               :       :       +-------+
 
 
 ========================
@@ -901,7 +1081,7 @@ IMPLICIT KERNEL MEMORY BARRIERS
 ===============================
 
 Some of the other functions in the linux kernel imply memory barriers, amongst
-which are locking, scheduling and memory allocation functions.
+which are locking and scheduling functions.
 
 This specification is a _minimum_ guarantee; any particular architecture may
 provide more substantial guarantees, but these may not be relied upon outside
@@ -966,6 +1146,20 @@ equivalent to a full barrier, but a LOCK followed by an UNLOCK is not.
     barriers is that the effects instructions outside of a critical section may
     seep into the inside of the critical section.
 
+A LOCK followed by an UNLOCK may not be assumed to be full memory barrier
+because it is possible for an access preceding the LOCK to happen after the
+LOCK, and an access following the UNLOCK to happen before the UNLOCK, and the
+two accesses can themselves then cross:
+
+       *A = a;
+       LOCK
+       UNLOCK
+       *B = b;
+
+may occur as:
+
+       LOCK, STORE *B, STORE *A, UNLOCK
+
 Locks and semaphores may not provide any guarantee of ordering on UP compiled
 systems, and so cannot be counted on in such a situation to actually achieve
 anything at all - especially with respect to I/O accesses - unless combined
@@ -1016,8 +1210,6 @@ Other functions that imply barriers:
 
  (*) schedule() and similar imply full memory barriers.
 
- (*) Memory allocation and release functions imply full memory barriers.
-
 
 =================================
 INTER-CPU LOCKING BARRIER EFFECTS
@@ -1031,7 +1223,7 @@ conflict on any particular lock.
 LOCKS VS MEMORY ACCESSES
 ------------------------
 
-Consider the following: the system has a pair of spinlocks (N) and (Q), and
+Consider the following: the system has a pair of spinlocks (M) and (Q), and
 three CPUs; then should the following sequence of events occur:
 
        CPU 1                           CPU 2
@@ -1678,7 +1870,7 @@ CPU's caches by some other cache event:
        smp_wmb();
        <A:modify v=2>  <C:busy>
                        <C:queue v=2>
-       p = &b;         q = p;
+       p = &v;         q = p;
                        <D:request p>
        <B:modify p=&v> <D:commit p=&v>
                        <D:read p>
index df82116a9f261c35998c3bb5a69eb1a38c8d83d1..88ad615dd338d75e2b282422c8f2d6f7f3af80b7 100644 (file)
@@ -214,12 +214,13 @@ hardware.
        The interaction of the iflag bits is as follows (parity error
        given as an example):
        Parity error    INPCK   IGNPAR
-       None            n/a     n/a     character received
-       Yes             n/a     0       character discarded
-       Yes             0       1       character received, marked as
+       n/a             0       n/a     character received, marked as
                                        TTY_NORMAL
-       Yes             1       1       character received, marked as
+       None            1       n/a     character received, marked as
+                                       TTY_NORMAL
+       Yes             1       0       character received, marked as
                                        TTY_PARITY
+       Yes             1       1       character discarded
 
        Other flags may be used (eg, xon/xoff characters) if your
        hardware supports hardware "soft" flow control.
diff --git a/Documentation/spi/pxa2xx b/Documentation/spi/pxa2xx
new file mode 100644 (file)
index 0000000..9c45f3d
--- /dev/null
@@ -0,0 +1,234 @@
+PXA2xx SPI on SSP driver HOWTO
+===================================================
+This a mini howto on the pxa2xx_spi driver.  The driver turns a PXA2xx
+synchronous serial port into a SPI master controller
+(see Documentation/spi/spi_summary). The driver has the following features
+
+- Support for any PXA2xx SSP
+- SSP PIO and SSP DMA data transfers.
+- External and Internal (SSPFRM) chip selects.
+- Per slave device (chip) configuration.
+- Full suspend, freeze, resume support.
+
+The driver is built around a "spi_message" fifo serviced by workqueue and a
+tasklet. The workqueue, "pump_messages", drives message fifo and the tasklet
+(pump_transfer) is responsible for queuing SPI transactions and setting up and
+launching the dma/interrupt driven transfers.
+
+Declaring PXA2xx Master Controllers
+-----------------------------------
+Typically a SPI master is defined in the arch/.../mach-*/board-*.c as a
+"platform device".  The master configuration is passed to the driver via a table
+found in include/asm-arm/arch-pxa/pxa2xx_spi.h:
+
+struct pxa2xx_spi_master {
+       enum pxa_ssp_type ssp_type;
+       u32 clock_enable;
+       u16 num_chipselect;
+       u8 enable_dma;
+};
+
+The "pxa2xx_spi_master.ssp_type" field must have a value between 1 and 3 and
+informs the driver which features a particular SSP supports.
+
+The "pxa2xx_spi_master.clock_enable" field is used to enable/disable the
+corresponding SSP peripheral block in the "Clock Enable Register (CKEN"). See
+the "PXA2xx Developer Manual" section "Clocks and Power Management".
+
+The "pxa2xx_spi_master.num_chipselect" field is used to determine the number of
+slave device (chips) attached to this SPI master.
+
+The "pxa2xx_spi_master.enable_dma" field informs the driver that SSP DMA should
+be used.  This caused the driver to acquire two DMA channels: rx_channel and
+tx_channel.  The rx_channel has a higher DMA service priority the tx_channel.
+See the "PXA2xx Developer Manual" section "DMA Controller".
+
+NSSP MASTER SAMPLE
+------------------
+Below is a sample configuration using the PXA255 NSSP.
+
+static struct resource pxa_spi_nssp_resources[] = {
+       [0] = {
+               .start  = __PREG(SSCR0_P(2)), /* Start address of NSSP */
+               .end    = __PREG(SSCR0_P(2)) + 0x2c, /* Range of registers */
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = IRQ_NSSP, /* NSSP IRQ */
+               .end    = IRQ_NSSP,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct pxa2xx_spi_master pxa_nssp_master_info = {
+       .ssp_type = PXA25x_NSSP, /* Type of SSP */
+       .clock_enable = CKEN9_NSSP, /* NSSP Peripheral clock */
+       .num_chipselect = 1, /* Matches the number of chips attached to NSSP */
+       .enable_dma = 1, /* Enables NSSP DMA */
+};
+
+static struct platform_device pxa_spi_nssp = {
+       .name = "pxa2xx-spi", /* MUST BE THIS VALUE, so device match driver */
+       .id = 2, /* Bus number, MUST MATCH SSP number 1..n */
+       .resource = pxa_spi_nssp_resources,
+       .num_resources = ARRAY_SIZE(pxa_spi_nssp_resources),
+       .dev = {
+               .platform_data = &pxa_nssp_master_info, /* Passed to driver */
+       },
+};
+
+static struct platform_device *devices[] __initdata = {
+       &pxa_spi_nssp,
+};
+
+static void __init board_init(void)
+{
+       (void)platform_add_device(devices, ARRAY_SIZE(devices));
+}
+
+Declaring Slave Devices
+-----------------------
+Typically each SPI slave (chip) is defined in the arch/.../mach-*/board-*.c
+using the "spi_board_info" structure found in "linux/spi/spi.h". See
+"Documentation/spi/spi_summary" for additional information.
+
+Each slave device attached to the PXA must provide slave specific configuration
+information via the structure "pxa2xx_spi_chip" found in
+"include/asm-arm/arch-pxa/pxa2xx_spi.h".  The pxa2xx_spi master controller driver
+will uses the configuration whenever the driver communicates with the slave
+device.
+
+struct pxa2xx_spi_chip {
+       u8 tx_threshold;
+       u8 rx_threshold;
+       u8 dma_burst_size;
+       u32 timeout_microsecs;
+       u8 enable_loopback;
+       void (*cs_control)(u32 command);
+};
+
+The "pxa2xx_spi_chip.tx_threshold" and "pxa2xx_spi_chip.rx_threshold" fields are
+used to configure the SSP hardware fifo.  These fields are critical to the
+performance of pxa2xx_spi driver and misconfiguration will result in rx
+fifo overruns (especially in PIO mode transfers). Good default values are
+
+       .tx_threshold = 12,
+       .rx_threshold = 4,
+
+The "pxa2xx_spi_chip.dma_burst_size" field is used to configure PXA2xx DMA
+engine and is related the "spi_device.bits_per_word" field.  Read and understand
+the PXA2xx "Developer Manual" sections on the DMA controller and SSP Controllers
+to determine the correct value. An SSP configured for byte-wide transfers would
+use a value of 8.
+
+The "pxa2xx_spi_chip.timeout_microsecs" fields is used to efficiently handle
+trailing bytes in the SSP receiver fifo.  The correct value for this field is
+dependent on the SPI bus speed ("spi_board_info.max_speed_hz") and the specific
+slave device.  Please note the the PXA2xx SSP 1 does not support trailing byte
+timeouts and must busy-wait any trailing bytes.
+
+The "pxa2xx_spi_chip.enable_loopback" field is used to place the SSP porting
+into internal loopback mode.  In this mode the SSP controller internally
+connects the SSPTX pin the the SSPRX pin.  This is useful for initial setup
+testing.
+
+The "pxa2xx_spi_chip.cs_control" field is used to point to a board specific
+function for asserting/deasserting a slave device chip select.  If the field is
+NULL, the pxa2xx_spi master controller driver assumes that the SSP port is
+configured to use SSPFRM instead.
+
+NSSP SALVE SAMPLE
+-----------------
+The pxa2xx_spi_chip structure is passed to the pxa2xx_spi driver in the
+"spi_board_info.controller_data" field. Below is a sample configuration using
+the PXA255 NSSP.
+
+/* Chip Select control for the CS8415A SPI slave device */
+static void cs8415a_cs_control(u32 command)
+{
+       if (command & PXA2XX_CS_ASSERT)
+               GPCR(2) = GPIO_bit(2);
+       else
+               GPSR(2) = GPIO_bit(2);
+}
+
+/* Chip Select control for the CS8405A SPI slave device */
+static void cs8405a_cs_control(u32 command)
+{
+       if (command & PXA2XX_CS_ASSERT)
+               GPCR(3) = GPIO_bit(3);
+       else
+               GPSR(3) = GPIO_bit(3);
+}
+
+static struct pxa2xx_spi_chip cs8415a_chip_info = {
+       .tx_threshold = 12, /* SSP hardward FIFO threshold */
+       .rx_threshold = 4, /* SSP hardward FIFO threshold */
+       .dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */
+       .timeout_microsecs = 64, /* Wait at least 64usec to handle trailing */
+       .cs_control = cs8415a_cs_control, /* Use external chip select */
+};
+
+static struct pxa2xx_spi_chip cs8405a_chip_info = {
+       .tx_threshold = 12, /* SSP hardward FIFO threshold */
+       .rx_threshold = 4, /* SSP hardward FIFO threshold */
+       .dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */
+       .timeout_microsecs = 64, /* Wait at least 64usec to handle trailing */
+       .cs_control = cs8405a_cs_control, /* Use external chip select */
+};
+
+static struct spi_board_info streetracer_spi_board_info[] __initdata = {
+       {
+               .modalias = "cs8415a", /* Name of spi_driver for this device */
+               .max_speed_hz = 3686400, /* Run SSP as fast a possbile */
+               .bus_num = 2, /* Framework bus number */
+               .chip_select = 0, /* Framework chip select */
+               .platform_data = NULL; /* No spi_driver specific config */
+               .controller_data = &cs8415a_chip_info, /* Master chip config */
+               .irq = STREETRACER_APCI_IRQ, /* Slave device interrupt */
+       },
+       {
+               .modalias = "cs8405a", /* Name of spi_driver for this device */
+               .max_speed_hz = 3686400, /* Run SSP as fast a possbile */
+               .bus_num = 2, /* Framework bus number */
+               .chip_select = 1, /* Framework chip select */
+               .controller_data = &cs8405a_chip_info, /* Master chip config */
+               .irq = STREETRACER_APCI_IRQ, /* Slave device interrupt */
+       },
+};
+
+static void __init streetracer_init(void)
+{
+       spi_register_board_info(streetracer_spi_board_info,
+                               ARRAY_SIZE(streetracer_spi_board_info));
+}
+
+
+DMA and PIO I/O Support
+-----------------------
+The pxa2xx_spi driver support both DMA and interrupt driven PIO message
+transfers.  The driver defaults to PIO mode and DMA transfers must enabled by
+setting the "enable_dma" flag in the "pxa2xx_spi_master" structure and and
+ensuring that the "pxa2xx_spi_chip.dma_burst_size" field is non-zero.  The DMA
+mode support both coherent and stream based DMA mappings.
+
+The following logic is used to determine the type of I/O to be used on
+a per "spi_transfer" basis:
+
+if !enable_dma or dma_burst_size == 0 then
+       always use PIO transfers
+
+if spi_message.is_dma_mapped and rx_dma_buf != 0 and tx_dma_buf != 0 then
+       use coherent DMA mode
+
+if rx_buf and tx_buf are aligned on 8 byte boundary then
+       use streaming DMA mode
+
+otherwise
+       use PIO transfer
+
+THANKS TO
+---------
+
+David Brownell and others for mentoring the development of this driver.
+
index a5ffba33a35188a0d858871c06c090361de81b88..068732d32276b1f32bf285c10522b7e103e781e4 100644 (file)
@@ -414,7 +414,33 @@ to get the driver-private data allocated for that device.
 The driver will initialize the fields of that spi_master, including the
 bus number (maybe the same as the platform device ID) and three methods
 used to interact with the SPI core and SPI protocol drivers.  It will
-also initialize its own internal state.
+also initialize its own internal state.  (See below about bus numbering
+and those methods.)
+
+After you initialize the spi_master, then use spi_register_master() to
+publish it to the rest of the system.  At that time, device nodes for
+the controller and any predeclared spi devices will be made available,
+and the driver model core will take care of binding them to drivers.
+
+If you need to remove your SPI controller driver, spi_unregister_master()
+will reverse the effect of spi_register_master().
+
+
+BUS NUMBERING
+
+Bus numbering is important, since that's how Linux identifies a given
+SPI bus (shared SCK, MOSI, MISO).  Valid bus numbers start at zero.  On
+SOC systems, the bus numbers should match the numbers defined by the chip
+manufacturer.  For example, hardware controller SPI2 would be bus number 2,
+and spi_board_info for devices connected to it would use that number.
+
+If you don't have such hardware-assigned bus number, and for some reason
+you can't just assign them, then provide a negative bus number.  That will
+then be replaced by a dynamically assigned number. You'd then need to treat
+this as a non-static configuration (see above).
+
+
+SPI MASTER METHODS
 
     master->setup(struct spi_device *spi)
        This sets up the device clock rate, SPI mode, and word sizes.
@@ -431,6 +457,9 @@ also initialize its own internal state.
        state it dynamically associates with that device.  If you do that,
        be sure to provide the cleanup() method to free that state.
 
+
+SPI MESSAGE QUEUE
+
 The bulk of the driver will be managing the I/O queue fed by transfer().
 
 That queue could be purely conceptual.  For example, a driver used only
@@ -440,6 +469,9 @@ But the queue will probably be very real, using message->queue, PIO,
 often DMA (especially if the root filesystem is in SPI flash), and
 execution contexts like IRQ handlers, tasklets, or workqueues (such
 as keventd).  Your driver can be as fancy, or as simple, as you need.
+Such a transfer() method would normally just add the message to a
+queue, and then start some asynchronous transfer engine (unless it's
+already running).
 
 
 THANKS TO
index c5beb548cfc42b781fd825ff9345f411f087897d..21ed5117366240d2a33af5af7f5605733bd514c1 100644 (file)
@@ -36,6 +36,9 @@ timeout or margin.  The simplest way to ping the watchdog is to write
 some data to the device.  So a very simple watchdog daemon would look
 like this:
 
+#include <stdlib.h>
+#include <fcntl.h>
+
 int main(int argc, const char *argv[]) {
        int fd=open("/dev/watchdog",O_WRONLY);
        if (fd==-1) {
index 5e33558714167ecafd03bbe7190fcc4a2dea269e..c3c5842402df553bc497a594fac2b30b7d4a3b84 100644 (file)
@@ -40,11 +40,20 @@ trivial patch so apply some common sense.
        PLEASE document known bugs. If it doesn't work for everything
        or does something very odd once a month document it.
 
+       PLEASE remember that submissions must be made under the terms
+       of the OSDL certificate of contribution
+       (http://www.osdl.org/newsroom/press_releases/2004/2004_05_24_dco.html)
+       and should include a Signed-off-by: line.
+
 6.     Make sure you have the right to send any changes you make. If you
        do changes at work you may find your employer owns the patch
        not you.
 
-7.     Happy hacking.
+7.     When sending security related changes or reports to a maintainer
+       please Cc: security@kernel.org, especially if the maintainer
+       does not respond.
+
+8.     Happy hacking.
 
                -----------------------------------
 
@@ -556,7 +565,19 @@ BROADBAND PROCESSOR ARCHITECTURE
 P:     Arnd Bergmann
 M:     arnd@arndb.de
 L:     linuxppc-dev@ozlabs.org
-W:     http://linuxppc64.org
+W:     http://www.penguinppc.org/ppc64/
+S:     Supported
+
+BROADCOM BNX2 GIGABIT ETHERNET DRIVER
+P:     Michael Chan
+M:     mchan@broadcom.com
+L:     netdev@vger.kernel.org
+S:     Supported
+
+BROADCOM TG3 GIGABIT ETHERNET DRIVER
+P:     Michael Chan
+M:     mchan@broadcom.com
+L:     netdev@vger.kernel.org
 S:     Supported
 
 BTTV VIDEO4LINUX DRIVER
@@ -969,7 +990,7 @@ S:  Maintained
 EXT3 FILE SYSTEM
 P:     Stephen Tweedie, Andrew Morton
 M:     sct@redhat.com, akpm@osdl.org, adilger@clusterfs.com
-L:     ext3-users@redhat.com
+L:     ext2-devel@lists.sourceforge.net
 S:     Maintained
 
 F71805F HARDWARE MONITORING DRIVER
@@ -1530,12 +1551,28 @@ W:      http://jfs.sourceforge.net/
 T:     git kernel.org:/pub/scm/linux/kernel/git/shaggy/jfs-2.6.git
 S:     Supported
 
+JOURNALLING LAYER FOR BLOCK DEVICS (JBD)
+P:     Stephen Tweedie, Andrew Morton
+M:     sct@redhat.com, akpm@osdl.org
+L:     ext2-devel@lists.sourceforge.net
+S:     Maintained
+
 KCONFIG
 P:     Roman Zippel
 M:     zippel@linux-m68k.org
 L:     kbuild-devel@lists.sourceforge.net
 S:     Maintained
 
+KDUMP
+P:     Vivek Goyal
+M:     vgoyal@in.ibm.com
+P:     Haren Myneni
+M:     hbabu@us.ibm.com
+L:     fastboot@lists.osdl.org
+L:     linux-kernel@vger.kernel.org
+W:     http://lse.sourceforge.net/kdump/
+S:     Maintained
+
 KERNEL AUTOMOUNTER (AUTOFS)
 P:     H. Peter Anvin
 M:     hpa@zytor.com
@@ -1603,6 +1640,11 @@ M:       James.Bottomley@HansenPartnership.com
 L:     linux-scsi@vger.kernel.org
 S:     Maintained
 
+LED SUBSYSTEM
+P:     Richard Purdie
+M:     rpurdie@rpsys.net
+S:     Maintained
+
 LEGO USB Tower driver
 P:     Juergen Stuber
 M:     starblue@users.sourceforge.net
@@ -1662,7 +1704,7 @@ S:        Maintained
 
 LINUX FOR POWERPC EMBEDDED PPC8XX
 P:     Marcelo Tosatti
-M:     marcelo.tosatti@cyclades.com
+M:     marcelo@kvack.org
 W:     http://www.penguinppc.org/
 L:     linuxppc-embedded@ozlabs.org
 S:     Maintained
@@ -1686,7 +1728,7 @@ M:        paulus@au.ibm.com
 P:     Anton Blanchard
 M:     anton@samba.org
 M:     anton@au.ibm.com
-W:     http://linuxppc64.org
+W:     http://www.penguinppc.org/ppc64/
 L:     linuxppc-dev@ozlabs.org
 S:     Supported
 
@@ -1847,6 +1889,11 @@ L:       linux-kernel@vger.kernel.org
 W:     http://www.atnf.csiro.au/~rgooch/linux/kernel-patches.html
 S:     Maintained
 
+MULTIMEDIA CARD SUBSYSTEM
+P:     Russell King
+M:     rmk+mmc@arm.linux.org.uk
+S:     Maintained
+
 MULTISOUND SOUND DRIVER
 P:     Andrew Veliath
 M:     andrewtv@usa.net
@@ -1869,6 +1916,12 @@ M:       James.Bottomley@HansenPartnership.com
 L:     linux-scsi@vger.kernel.org
 S:     Maintained
 
+NETEM NETWORK EMULATOR
+P:     Stephen Hemminger
+M:     shemminger@osdl.org
+L:     netem@osdl.org
+S:     Maintained
+
 NETFILTER/IPTABLES/IPCHAINS
 P:     Rusty Russell
 P:     Marc Boucher
@@ -2513,6 +2566,12 @@ M:       perex@suse.cz
 L:     alsa-devel@alsa-project.org
 S:     Maintained
 
+SPI SUBSYSTEM
+P:     David Brownell
+M:     dbrownell@users.sourceforge.net
+L:     spi-devel-general@lists.sourceforge.net
+S:     Maintained
+
 TPM DEVICE DRIVER
 P:     Kylene Hall
 M:     kjhall@us.ibm.com
index 3494c17c9fb9fe437134057e01bac2f4ffc887aa..a3a7baad85550690b45ea007f98477ff948e5186 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,8 +1,8 @@
 VERSION = 2
 PATCHLEVEL = 6
 SUBLEVEL = 17
-EXTRAVERSION =-rc4
-NAME=Sliding Snow Leopard
+EXTRAVERSION =-rc6
+NAME=Crazed Snow-Weasel
 
 # *DOCUMENTATION*
 # To see a list of typical targets execute "make help"
index 8290b69da20214a7e19fedd0fc047d33d5d82ba7..213c7850d5fb9639a007616b7357fe93f5ae64e8 100644 (file)
@@ -453,7 +453,7 @@ config ALPHA_IRONGATE
 
 config GENERIC_HWEIGHT
        bool
-       default y if !ALPHA_EV6 && !ALPHA_EV67
+       default y if !ALPHA_EV67
 
 config ALPHA_AVANTI
        bool
index c645c5e14786fdd17efddf40bb3ae2b40524ffd8..2b245ad731ee8f85a4e02ce3de100713760a414c 100644 (file)
@@ -182,7 +182,6 @@ EXPORT_SYMBOL(smp_num_cpus);
 EXPORT_SYMBOL(smp_call_function);
 EXPORT_SYMBOL(smp_call_function_on_cpu);
 EXPORT_SYMBOL(_atomic_dec_and_lock);
-EXPORT_SYMBOL(cpu_present_mask);
 #endif /* CONFIG_SMP */
 
 /*
index 9924fd07743abfd5bb4cda9e78ac3e58ca72a9d7..c760a831fd1a250d45bdc2e6e70f6f5c243fd3c1 100644 (file)
@@ -94,7 +94,7 @@ common_shutdown_1(void *generic_ptr)
        if (cpuid != boot_cpuid) {
                flags |= 0x00040000UL; /* "remain halted" */
                *pflags = flags;
-               clear_bit(cpuid, &cpu_present_mask);
+               cpu_clear(cpuid, cpu_present_map);
                halt();
        }
 #endif
@@ -120,8 +120,8 @@ common_shutdown_1(void *generic_ptr)
 
 #ifdef CONFIG_SMP
        /* Wait for the secondaries to halt. */
-       cpu_clear(boot_cpuid, cpu_possible_map);
-       while (cpus_weight(cpu_possible_map))
+       cpu_clear(boot_cpuid, cpu_present_map);
+       while (cpus_weight(cpu_present_map))
                barrier();
 #endif
 
index 185255416e8538c22384ae89491720834aa6fcc1..4dc273e537fdd38830deb0ede8a3b560827a8ab0 100644 (file)
@@ -68,7 +68,6 @@ enum ipi_message_type {
 static int smp_secondary_alive __initdata = 0;
 
 /* Which cpus ids came online.  */
-cpumask_t cpu_present_mask;
 cpumask_t cpu_online_map;
 
 EXPORT_SYMBOL(cpu_online_map);
@@ -439,7 +438,7 @@ setup_smp(void)
                        if ((cpu->flags & 0x1cc) == 0x1cc) {
                                smp_num_probed++;
                                /* Assume here that "whami" == index */
-                               cpu_set(i, cpu_present_mask);
+                               cpu_set(i, cpu_present_map);
                                cpu->pal_revision = boot_cpu_palrev;
                        }
 
@@ -450,11 +449,10 @@ setup_smp(void)
                }
        } else {
                smp_num_probed = 1;
-               cpu_set(boot_cpuid, cpu_present_mask);
        }
 
-       printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_mask = %lx\n",
-              smp_num_probed, cpu_possible_map.bits[0]);
+       printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_map = %lx\n",
+              smp_num_probed, cpu_present_map.bits[0]);
 }
 
 /*
@@ -473,7 +471,7 @@ smp_prepare_cpus(unsigned int max_cpus)
 
        /* Nothing to do on a UP box, or when told not to.  */
        if (smp_num_probed == 1 || max_cpus == 0) {
-               cpu_present_mask = cpumask_of_cpu(boot_cpuid);
+               cpu_present_map = cpumask_of_cpu(boot_cpuid);
                printk(KERN_INFO "SMP mode deactivated.\n");
                return;
        }
@@ -486,10 +484,6 @@ smp_prepare_cpus(unsigned int max_cpus)
 void __devinit
 smp_prepare_boot_cpu(void)
 {
-       /*
-        * Mark the boot cpu (current cpu) as online
-        */ 
-       cpu_set(smp_processor_id(), cpu_online_map);
 }
 
 int __devinit
index 5f84417eeb7bee9502d0da72805bc895b864ca0f..2551fb49ae099150561407adc726e410b8e03c9f 100644 (file)
@@ -66,7 +66,7 @@ titan_update_irq_hw(unsigned long mask)
        register int bcpu = boot_cpuid;
 
 #ifdef CONFIG_SMP
-       cpumask_t cpm = cpu_present_mask;
+       cpumask_t cpm = cpu_present_map;
        volatile unsigned long *dim0, *dim1, *dim2, *dim3;
        unsigned long mask0, mask1, mask2, mask3, dummy;
 
index 5d3acff8c596e0c0670d7d956379d860e9591ba7..d22f38b957db9c825e5cae7bec8bee90357efa06 100644 (file)
@@ -101,7 +101,7 @@ config DEBUG_S3C2410_UART
        help
          Choice for UART for kernel low-level using S3C2410 UARTS,
          should be between zero and two. The port must have been
-         initalised by the boot-loader before use.
+         initialised by the boot-loader before use.
 
          The uncompressor code port configuration is now handled
          by CONFIG_S3C2410_LOWLEVEL_UART_PORT.
index 45fdf4a51a2ad0a7d1d127ff9dc75898a3aa6369..396efba9bacd2d6fb6351e18149576cc1d779665 100644 (file)
@@ -99,6 +99,8 @@ int main(void)
   DEFINE(MACHINFO_NAME,                offsetof(struct machine_desc, name));
   DEFINE(MACHINFO_PHYSIO,      offsetof(struct machine_desc, phys_io));
   DEFINE(MACHINFO_PGOFFIO,     offsetof(struct machine_desc, io_pg_offst));
+  BLANK();
+  DEFINE(PROC_INFO_SZ,         sizeof(struct proc_info_list));
   DEFINE(PROCINFO_INITFUNC,    offsetof(struct proc_info_list, __cpu_flush));
   DEFINE(PROCINFO_MMUFLAGS,    offsetof(struct proc_info_list, __cpu_mmu_flags));
   return 0; 
index 03532769a97f38840bea46f2969c914d857eb9d4..0a3e9ad297d8ba8be45967e811be5d226941eb90 100644 (file)
@@ -143,12 +143,23 @@ static struct dma_ops isa_dma_ops = {
        .residue        = isa_get_dma_residue,
 };
 
-static struct resource dma_resources[] = {
-       { "dma1",               0x0000, 0x000f },
-       { "dma low page",       0x0080, 0x008f },
-       { "dma2",               0x00c0, 0x00df },
-       { "dma high page",      0x0480, 0x048f }
-};
+static struct resource dma_resources[] = { {
+       .name   = "dma1",
+       .start  = 0x0000,
+       .end    = 0x000f
+}, {
+       .name   = "dma low page",
+       .start  = 0x0080,
+       .end    = 0x008f
+}, {
+       .name   = "dma2",
+       .start  = 0x00c0,
+       .end    = 0x00df
+}, {
+       .name   = "dma high page",
+       .start  = 0x0480,
+       .end    = 0x048f
+} };
 
 void __init isa_init_dma(dma_t *dma)
 {
index 1a1539e3a9462eef17f949445f116356bee810de..7df6e1aaa323b83ae0cedad37a943404d106868f 100644 (file)
@@ -311,7 +311,7 @@ void free_thread_info(struct thread_info *thread)
                struct thread_info_list *th = &get_cpu_var(thread_info_list);
                if (th->nr < EXTRA_TASK_STRUCT) {
                        unsigned long *p = (unsigned long *)thread;
-                       p[0] = th->head;
+                       p[0] = (unsigned long)th->head;
                        th->head = p;
                        th->nr += 1;
                        put_cpu_var(thread_info_list);
index 3bdc8c6949c59aabf7ef812c2b890307bb0ab43f..16153c86c3f871a69674f7c293784981431f6b56 100644 (file)
@@ -122,7 +122,7 @@ ENTRY(c_backtrace)
 #define reg   r5
 #define stack r6
 
-.Ldumpstm:     stmfd   sp!, {instr, reg, stack, r7, lr}
+.Ldumpstm:     stmfd   sp!, {instr, reg, stack, r7, r8, lr}
                mov     stack, r0
                mov     instr, r1
                mov     reg, #9
@@ -145,7 +145,7 @@ ENTRY(c_backtrace)
                adrne   r0, .Lcr
                blne    printk
                mov     r0, stack
-               LOADREGS(fd, sp!, {instr, reg, stack, r7, pc})
+               LOADREGS(fd, sp!, {instr, reg, stack, r7, r8, pc})
 
 .Lfp:          .asciz  " r%d = %08X%c"
 .Lcr:          .asciz  "\n"
index ec9a1cd6176fddb9c97fbb79992ac6699d6ad07f..58eef66076293a923d00a81e03370bcc1c734f83 100644 (file)
@@ -189,12 +189,12 @@ ENTRY(__do_div64)
        moveq   pc, lr
 
        @ Division by 0:
-       str     lr, [sp, #-4]!
+       str     lr, [sp, #-8]!
        bl      __div0
 
        @ as wrong as it could be...
        mov     yl, #0
        mov     yh, #0
        mov     xh, #0
-       ldr     pc, [sp], #4
+       ldr     pc, [sp], #8
 
index 9be01b0c3f4876f19a0a23c8b093321598658978..e24566b88a783744059639191d35af51db83aba4 100644 (file)
@@ -111,21 +111,21 @@ static void __init ts72xx_map_io(void)
        }
 }
 
-static unsigned char ts72xx_rtc_readb(unsigned long addr)
+static unsigned char ts72xx_rtc_readbyte(unsigned long addr)
 {
        __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
        return __raw_readb(TS72XX_RTC_DATA_VIRT_BASE);
 }
 
-static void ts72xx_rtc_writeb(unsigned char value, unsigned long addr)
+static void ts72xx_rtc_writebyte(unsigned char value, unsigned long addr)
 {
        __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
        __raw_writeb(value, TS72XX_RTC_DATA_VIRT_BASE);
 }
 
 static struct m48t86_ops ts72xx_rtc_ops = {
-       .readb                  = ts72xx_rtc_readb,
-       .writeb                 = ts72xx_rtc_writeb,
+       .readbyte               = ts72xx_rtc_readbyte,
+       .writebyte              = ts72xx_rtc_writebyte,
 };
 
 static struct platform_device ts72xx_rtc_device = {
index eeb8a6d4a3999c1f9f605588ab0852e0b4b88621..a5de5f1da9f2e65dd0c83e99556eeed7f40807aa 100644 (file)
@@ -127,7 +127,7 @@ static void
 imx_gpio_ack_irq(unsigned int irq)
 {
        DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, irq);
-       ISR(IRQ_TO_REG(irq)) |= 1 << ((irq - IRQ_GPIOA(0)) % 32);
+       ISR(IRQ_TO_REG(irq)) = 1 << ((irq - IRQ_GPIOA(0)) % 32);
 }
 
 static void
index a0724f2b24cec783a242887971b5fc0d2e5a6592..9f55f5ae1044ffcd4e4a3080e581525646e8d639 100644 (file)
@@ -232,8 +232,6 @@ static void __init intcp_init_irq(void)
        for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) {
                if (i == 11)
                        i = 22;
-               if (i == IRQ_CP_CPPLDINT)
-                       i++;
                if (i == 29)
                        break;
                set_irq_chip(i, &pic_chip);
@@ -259,8 +257,7 @@ static void __init intcp_init_irq(void)
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 
-       set_irq_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
-       pic_unmask_irq(IRQ_CP_CPPLDINT);
+       set_irq_chained_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
 }
 
 /*
index 092ee12ced425dcfaaff125a4f8f4cc3324c85c3..affd1d5d744049c44c19d8214d74478317ccc672 100644 (file)
@@ -178,8 +178,12 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
 
 static void ixp23xx_irq_mask(unsigned int irq)
 {
-       volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+       volatile unsigned long *intr_reg;
 
+       if (irq >= 56)
+               irq += 8;
+
+       intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
        *intr_reg &= ~(1 << (irq % 32));
 }
 
@@ -199,17 +203,25 @@ static void ixp23xx_irq_ack(unsigned int irq)
  */
 static void ixp23xx_irq_level_unmask(unsigned int irq)
 {
-       volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+       volatile unsigned long *intr_reg;
 
        ixp23xx_irq_ack(irq);
 
+       if (irq >= 56)
+               irq += 8;
+
+       intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
        *intr_reg |= (1 << (irq % 32));
 }
 
 static void ixp23xx_irq_edge_unmask(unsigned int irq)
 {
-       volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+       volatile unsigned long *intr_reg;
+
+       if (irq >= 56)
+               irq += 8;
 
+       intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
        *intr_reg |= (1 << (irq % 32));
 }
 
index 2a39f9e481ad2d455ae6f00b13f26042755f37d8..3b23f43cb1609f0ffaf38d07cb63f6c207532f56 100644 (file)
@@ -141,7 +141,7 @@ config IXP4XX_INDIRECT_PCI
           2) If > 64MB of memory space is required, the IXP4xx can be 
             configured to use indirect registers to access PCI This allows 
             for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. 
-            The disadvantadge of this is that every PCI access requires 
+            The disadvantage of this is that every PCI access requires 
             three local register accesses plus a spinlock, but in some 
             cases the performance hit is acceptable. In addition, you cannot 
             mmap() PCI devices in this case due to the indirect nature
index 98356f810007fad31d4fdc2cc39bea2e9b1b5c68..b307f11951dfa9d7d14e8b206c4d2abe02f60fea 100644 (file)
@@ -95,7 +95,10 @@ static void __init mainstone_init_irq(void)
        for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
                set_irq_chip(irq, &mainstone_irq_chip);
                set_irq_handler(irq, do_level_IRQ);
-               set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+               if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
+                       set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
+               else
+                       set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
        set_irq_flags(MAINSTONE_IRQ(8), 0);
        set_irq_flags(MAINSTONE_IRQ(12), 0);
@@ -490,6 +493,7 @@ static void __init mainstone_map_io(void)
 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
        /* Maintainer: MontaVista Software Inc. */
        .phys_io        = 0x40000000,
+       .boot_params    = 0xa0000100,   /* BLOB boot parameter setting */
        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
        .map_io         = mainstone_map_io,
        .init_irq       = mainstone_init_irq,
index 19b372df544a094a086c05cc3e438c9fb7a606b6..44bcb8097c7ada753a985170a4e2e3a44df2be9c 100644 (file)
@@ -371,6 +371,7 @@ static int spitz_ohci_init(struct device *dev)
 static struct pxaohci_platform_data spitz_ohci_platform_data = {
        .port_mode      = PMM_NPS_MODE,
        .init           = spitz_ohci_init,
+       .power_budget   = 150,
 };
 
 
index d4a586e38d5b2665c797b9558ff24abdc8937a54..693fb1e396e033e95ecd6afdce8552dec4ef4591 100644 (file)
@@ -137,8 +137,11 @@ static struct amba_device *amba_devs[] __initdata = {
 static void __init gic_init_irq(void)
 {
 #ifdef CONFIG_REALVIEW_MPCORE
+       unsigned int pldctrl;
        writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
-       writel(0x008003c0, __io_address(REALVIEW_SYS_BASE) + 0xd8);
+       pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + 0xd8);
+       pldctrl |= 0x00800000;  /* New irq mode */
+       writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + 0xd8);
        writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
 #endif
        gic_dist_init(__io_address(REALVIEW_GIC_DIST_BASE));
index ce7d81000695e38718c15a0567e00bdffcdc54df..970f98dadffc19bd4e483b0ac4ddd136b49a2da7 100644 (file)
@@ -170,7 +170,7 @@ config S3C2410_PM_DEBUG
        depends on ARCH_S3C2410 && PM
        help
          Say Y here if you want verbose debugging from the PM Suspend and
-         Resume code. See `Documentation/arm/Samsing-S3C24XX/Suspend.txt`
+         Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
          for more information.
 
 config S3C2410_PM_CHECK
index 832fb86a03b430343dd26e9e5be83168ab644c17..73de2eaca22a1c136db339177eb95d1acc4a7610 100644 (file)
@@ -59,8 +59,7 @@ ENTRY(s3c2410_cpu_suspend)
        mrc     p15, 0, r5, c13, c0, 0  @ PID
        mrc     p15, 0, r6, c3, c0, 0   @ Domain ID
        mrc     p15, 0, r7, c2, c0, 0   @ translation table base address
-       mrc     p15, 0, r8, c2, c0, 0   @ auxiliary control register
-       mrc     p15, 0, r9, c1, c0, 0   @ control register
+       mrc     p15, 0, r8, c1, c0, 0   @ control register
 
        stmia   r0, { r4 - r13 }
 
@@ -165,7 +164,6 @@ ENTRY(s3c2410_cpu_resume)
        mcr     p15, 0, r5, c13, c0, 0          @ PID
        mcr     p15, 0, r6, c3, c0, 0           @ Domain ID
        mcr     p15, 0, r7, c2, c0, 0           @ translation table base
-       mcr     p15, 0, r8, c1, c1, 0           @ auxilliary control
 
 #ifdef CONFIG_DEBUG_RESUME
        mov     r3, #'R'
@@ -173,7 +171,7 @@ ENTRY(s3c2410_cpu_resume)
 #endif
 
        ldr     r2, =resume_with_mmu
-       mcr     p15, 0, r9, c1, c0, 0           @ turn on MMU, etc
+       mcr     p15, 0, r8, c1, c0, 0           @ turn on MMU, etc
        nop                                     @ second-to-last before mmu
        mov     pc, r2                          @ go back to virtual address
 
index 9e02bc3712a00b5046245e71a13c1c99101bbcbc..af6d2775cf8237e34aecd21f8039083acbabc5db 100644 (file)
@@ -59,6 +59,14 @@ neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
                if (irr & (IRR_ETHERNET | IRR_USAR)) {
                        desc->chip->mask(irq);
 
+                       /*
+                        * Ack the interrupt now to prevent re-entering
+                        * this neponset handler.  Again, this is safe
+                        * since we'll check the IRR register prior to
+                        * leaving.
+                        */
+                       desc->chip->ack(irq);
+
                        if (irr & IRR_ETHERNET) {
                                d = irq_desc + IRQ_NEPONSET_SMC9196;
                                desc_handle_irq(IRQ_NEPONSET_SMC9196, d, regs);
index 799697d32decb052f60cb50190541194f65bb92e..cebd48a3dae4b757f7a44c95030e6dafe2945a95 100644 (file)
@@ -112,10 +112,9 @@ void __init versatile_init_irq(void)
 {
        unsigned int i;
 
-       vic_init(VA_VIC_BASE, IRQ_VIC_START, ~(1 << 31));
+       vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0);
 
-       set_irq_handler(IRQ_VICSOURCE31, sic_handle_irq);
-       enable_irq(IRQ_VICSOURCE31);
+       set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq);
 
        /* Do second interrupt controller */
        writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
index 25e0ca3e598cfc97ac0140aaa383effaf5e76b77..c1f7180c7beda07ff35d3211880902b8a83c2a2c 100644 (file)
@@ -141,7 +141,7 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size,
                return NULL;
        addr = (unsigned long)area->addr;
        if (remap_area_pages(addr, pfn, size, flags)) {
-               vfree((void *)addr);
+               vunmap((void *)addr);
                return NULL;
        }
        return (void __iomem *) (offset + (char *)addr);
@@ -173,7 +173,7 @@ EXPORT_SYMBOL(__ioremap);
 
 void __iounmap(void __iomem *addr)
 {
-       vfree((void *) (PAGE_MASK & (unsigned long) addr));
+       vunmap((void *)(PAGE_MASK & (unsigned long)addr));
 }
 EXPORT_SYMBOL(__iounmap);
 
index f14b2d0f3690a002cf396bfa521c57eae068a242..95273de4f772515780e2eac97ed2ae892ac52a0d 100644 (file)
@@ -376,7 +376,7 @@ void __init build_mem_type_table(void)
                ecc_mask = 0;
        }
 
-       if (cpu_arch <= CPU_ARCH_ARMv5TEJ) {
+       if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) {
                for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
                        if (mem_types[i].prot_l1)
                                mem_types[i].prot_l1 |= PMD_BIT4;
@@ -631,7 +631,7 @@ void setup_mm_for_reboot(char mode)
                pgd = init_mm.pgd;
 
        base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
-       if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ)
+       if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
                base_pmdval |= PMD_BIT4;
 
        for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) {
index 80873b36c3f7a562657a32d9de47e790972cb2d9..8d32e21fe151a919630dc866205974888b624e3a 100644 (file)
@@ -427,12 +427,13 @@ __xsc3_setup:
 #endif
        mcr     p15, 0, r0, c1, c0, 1           @ set auxiliary control reg
        mrc     p15, 0, r0, c1, c0, 0           @ get control register
-       bic     r0, r0, #0x0200                 @ .... ..R. .... ....
        bic     r0, r0, #0x0002                 @ .... .... .... ..A.
        orr     r0, r0, #0x0005                 @ .... .... .... .C.M
 #if BTB_ENABLE
+       bic     r0, r0, #0x0200                 @ .... ..R. .... ....
        orr     r0, r0, #0x3900                 @ ..VI Z..S .... ....
 #else
+       bic     r0, r0, #0x0a00                 @ .... Z.R. .... ....
        orr     r0, r0, #0x3100                 @ ..VI ...S .... ....
 #endif
 #if L2_CACHE_ENABLE
index c6fe99e57a0526ae2884eb49d500023ca3ef6ea0..8dfa3054f10fb0ce83576277f080caccf7644535 100644 (file)
@@ -758,10 +758,10 @@ config HOTPLUG_CPU
        bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
        depends on SMP && HOTPLUG && EXPERIMENTAL && !X86_VOYAGER
        ---help---
-         Say Y here to experiment with turning CPUs off and on.  CPUs
-         can be controlled through /sys/devices/system/cpu.
+         Say Y here to experiment with turning CPUs off and on, and to
+         enable suspend on SMP systems. CPUs can be controlled through
+         /sys/devices/system/cpu.
 
-         Say N.
 
 endmenu
 
index 40e5aba3ad3d425f1545ff7e199e1356a56e38d8..5ccbf58ec94feb7ad7e2a7955fe536e398bbc081 100644 (file)
@@ -215,7 +215,7 @@ static int __init acpi_parse_madt(unsigned long phys_addr, unsigned long size)
 {
        struct acpi_table_madt *madt = NULL;
 
-       if (!phys_addr || !size)
+       if (!phys_addr || !size || !cpu_has_apic)
                return -EINVAL;
 
        madt = (struct acpi_table_madt *)__acpi_map_table(phys_addr, size);
@@ -621,9 +621,9 @@ extern u32 pmtmr_ioport;
 
 static int __init acpi_parse_fadt(unsigned long phys, unsigned long size)
 {
-       struct fadt_descriptor_rev2 *fadt = NULL;
+       struct fadt_descriptor *fadt = NULL;
 
-       fadt = (struct fadt_descriptor_rev2 *)__acpi_map_table(phys, size);
+       fadt = (struct fadt_descriptor *)__acpi_map_table(phys, size);
        if (!fadt) {
                printk(KERN_WARNING PREFIX "Unable to map FADT\n");
                return 0;
@@ -754,7 +754,7 @@ static int __init acpi_parse_madt_ioapic_entries(void)
                return -ENODEV;
        }
 
-       if (!cpu_has_apic)
+       if (!cpu_has_apic) 
                return -ENODEV;
 
        /*
index 2e3b643a4dc4df57552562015349c7657ca5b5d6..1649a175a206ab4bd6ed0add0040580ff83d036e 100644 (file)
@@ -5,17 +5,34 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/pci.h>
+#include <linux/acpi.h>
+
 #include <asm/pci-direct.h>
 #include <asm/acpi.h>
 #include <asm/apic.h>
 
+#ifdef CONFIG_ACPI
+
+static int nvidia_hpet_detected __initdata;
+
+static int __init nvidia_hpet_check(unsigned long phys, unsigned long size)
+{
+       nvidia_hpet_detected = 1;
+       return 0;
+}
+#endif
+
 static int __init check_bridge(int vendor, int device)
 {
 #ifdef CONFIG_ACPI
-       /* According to Nvidia all timer overrides are bogus. Just ignore
-          them all. */
+       /* According to Nvidia all timer overrides are bogus unless HPET
+          is enabled. */
        if (vendor == PCI_VENDOR_ID_NVIDIA) {
-               acpi_skip_timer_override = 1;
+               nvidia_hpet_detected = 0;
+               acpi_table_parse(ACPI_HPET, nvidia_hpet_check);
+               if (nvidia_hpet_detected == 0) {
+                       acpi_skip_timer_override = 1;
+               }
        }
 #endif
        if (vendor == PCI_VENDOR_ID_ATI && timer_over_8254 == 1) {
index 013b85df18c658a87e408fd137fb7b30e32c9c26..3d4b2f3d116a796ffad8ef911353b6a71a2f43b7 100644 (file)
@@ -1341,6 +1341,14 @@ int __init APIC_init_uniprocessor (void)
 
        connect_bsp_APIC();
 
+       /*
+        * Hack: In case of kdump, after a crash, kernel might be booting
+        * on a cpu with non-zero lapic id. But boot_cpu_physical_apicid
+        * might be zero if read from MP tables. Get it from LAPIC.
+        */
+#ifdef CONFIG_CRASH_DUMP
+       boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
+#endif
        phys_cpu_present_map = physid_mask_of_physid(boot_cpu_physical_apicid);
 
        setup_local_APIC();
index d77e89ac0d540361c06da2854d8450fb4c81044e..dd6b0e3386ce8f3af2c65d74853d0b001ae07440 100644 (file)
@@ -1320,6 +1320,8 @@ legacy_init_iomem_resources(struct resource *code_resource, struct resource *dat
        probe_roms();
        for (i = 0; i < e820.nr_map; i++) {
                struct resource *res;
+               if (e820.map[i].addr + e820.map[i].size > 0x100000000ULL)
+                       continue;
                res = kzalloc(sizeof(struct resource), GFP_ATOMIC);
                switch (e820.map[i].type) {
                case E820_RAM:  res->name = "System RAM"; break;
@@ -1545,15 +1547,18 @@ void __init setup_arch(char **cmdline_p)
        if (efi_enabled)
                efi_map_memmap();
 
-#ifdef CONFIG_X86_IO_APIC
-       check_acpi_pci();       /* Checks more than just ACPI actually */
-#endif
-
 #ifdef CONFIG_ACPI
        /*
         * Parse the ACPI tables for possible boot-time SMP configuration.
         */
        acpi_boot_table_init();
+#endif
+
+#ifdef CONFIG_X86_IO_APIC
+       check_acpi_pci();       /* Checks more than just ACPI actually */
+#endif
+
+#ifdef CONFIG_ACPI
        acpi_boot_init();
 
 #if defined(CONFIG_SMP) && defined(CONFIG_X86_PC)
index f48bef15b4f0dd5de72d4bbcc39f8c4f881947b6..af56987f69b02503c82cdc2a48660f56db02153a 100644 (file)
@@ -315,3 +315,4 @@ ENTRY(sys_call_table)
        .long sys_splice
        .long sys_sync_file_range
        .long sys_tee                   /* 315 */
+       .long sys_vmsplice
index 2d22f5761b1dc51ac6bee90789e1e867ad62e779..0e498369f35e916e547485db5f8fed45e3d80055 100644 (file)
@@ -130,9 +130,8 @@ static inline int print_addr_and_symbol(unsigned long addr, char *log_lvl,
        print_symbol("%s", addr);
 
        printed = (printed + 1) % CONFIG_STACK_BACKTRACE_COLS;
-
        if (printed)
-               printk("  ");
+               printk(" ");
        else
                printk("\n");
 
@@ -212,7 +211,6 @@ static void show_stack_log_lvl(struct task_struct *task, unsigned long *esp,
        }
 
        stack = esp;
-       printk(log_lvl);
        for(i = 0; i < kstack_depth_to_print; i++) {
                if (kstack_end(stack))
                        break;
index cea5b3ce4b5766c9747294090542e4eb063b75eb..d55fa7b187ab656f9c581b11c5dfc12f7186f82e 100644 (file)
@@ -93,9 +93,11 @@ int __init mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid
        int i;
        for (i = 0; apic_probe[i]; ++i) { 
                if (apic_probe[i]->mps_oem_check(mpc,oem,productid)) { 
-                       genapic = apic_probe[i];
-                       printk(KERN_INFO "Switched to APIC driver `%s'.\n", 
-                              genapic->name);
+                       if (!cmdline_apic) {
+                               genapic = apic_probe[i];
+                               printk(KERN_INFO "Switched to APIC driver `%s'.\n",
+                                      genapic->name);
+                       }
                        return 1;
                } 
        } 
@@ -107,9 +109,11 @@ int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
        int i;
        for (i = 0; apic_probe[i]; ++i) { 
                if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) { 
-                       genapic = apic_probe[i];
-                       printk(KERN_INFO "Switched to APIC driver `%s'.\n", 
-                              genapic->name);
+                       if (!cmdline_apic) {
+                               genapic = apic_probe[i];
+                               printk(KERN_INFO "Switched to APIC driver `%s'.\n",
+                                      genapic->name);
+                       }
                        return 1;
                } 
        } 
index ae6534ad816113d40b05cc514e2626adf26a5de6..3df1371d4520bb39a8346f6a26326dbce9f589ec 100644 (file)
@@ -651,7 +651,7 @@ void __init mem_init(void)
  * Specifically, in the case of x86, we will always add
  * memory to the highmem for now.
  */
-#ifdef CONFIG_HOTPLUG_MEMORY
+#ifdef CONFIG_MEMORY_HOTPLUG
 #ifndef CONFIG_NEED_MULTIPLE_NODES
 int add_memory(u64 start, u64 size)
 {
index 1a2076ce6f6a7107346a46ce29cfb8a956d2aed9..ec0fd3cfa774aa575fe6c3cf42da2af2c0e56f96 100644 (file)
@@ -332,10 +332,11 @@ static int __init ppro_init(char ** cpu_type)
 {
        __u8 cpu_model = boot_cpu_data.x86_model;
 
-       if (cpu_model > 0xd)
+       if (cpu_model == 14)
+               *cpu_type = "i386/core";
+       else if (cpu_model > 0xd)
                return 0;
-
-       if (cpu_model == 9) {
+       else if (cpu_model == 9) {
                *cpu_type = "i386/p6_mobile";
        } else if (cpu_model > 5) {
                *cpu_type = "i386/piii";
index 50a0bef8c85f691bc135167e595dc5b6521a8ec0..79b2370c7facda90db18255983dc85b58523dab0 100644 (file)
@@ -92,7 +92,7 @@ void __restore_processor_state(struct saved_context *ctxt)
        write_cr4(ctxt->cr4);
        write_cr3(ctxt->cr3);
        write_cr2(ctxt->cr2);
-       write_cr2(ctxt->cr0);
+       write_cr0(ctxt->cr0);
 
        /*
         * now restore the descriptor tables to their proper values
index 0f3076a820c3af7dd7c71790be13e212354b3e1a..f0252eda12a8e08f0c6682e89ff796238e8f7739 100644 (file)
@@ -77,6 +77,7 @@ choice
 config IA64_GENERIC
        bool "generic"
        select ACPI
+       select PCI
        select NUMA
        select ACPI_NUMA
        help
index f6a8853cd1b48fb8df9bbdab6beeca4ed886cc4a..9ea35398e10d0b9a28d43152d274a3b40dd05258 100644 (file)
@@ -134,7 +134,7 @@ CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
 CONFIG_ARCH_DISCONTIGMEM_DEFAULT=y
 CONFIG_NUMA=y
-CONFIG_NODES_SHIFT=8
+CONFIG_NODES_SHIFT=10
 CONFIG_VIRTUAL_MEM_MAP=y
 CONFIG_HOLES_IN_ZONE=y
 CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y
@@ -1159,7 +1159,7 @@ CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_DEBUG_SLAB is not set
 CONFIG_DEBUG_PREEMPT=y
-CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_MUTEXES is not set
 # CONFIG_DEBUG_SPINLOCK is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_KOBJECT is not set
index bdccd0b1eb601387a527aeff1b8f800cf6657a42..dd4a2f79263290b47a5491002a3eb0107aca921f 100644 (file)
@@ -1999,7 +1999,7 @@ acpi_sba_ioc_add(struct acpi_device *device)
                if (!iovp_shift)
                        iovp_shift = min(PAGE_SHIFT, 16);
        }
-       ACPI_MEM_FREE(dev_info);
+       kfree(dev_info);
 
        /*
         * default anything not caught above or specified on cmdline to 4k
index 58c93a30348cdfdc43bd6b7c5acbf36245141b75..f97cc6c7f13abdd3773ee5f86e2fdd4d2518ea10 100644 (file)
@@ -68,8 +68,6 @@ EXPORT_SYMBOL(pm_power_off);
 unsigned char acpi_kbd_controller_present = 1;
 unsigned char acpi_legacy_devices;
 
-static unsigned int __initdata acpi_madt_rev;
-
 unsigned int acpi_cpei_override;
 unsigned int acpi_cpei_phys_cpuid;
 
@@ -243,6 +241,8 @@ acpi_parse_iosapic(acpi_table_entry_header * header, const unsigned long end)
        return iosapic_init(iosapic->address, iosapic->global_irq_base);
 }
 
+static unsigned int __initdata acpi_madt_rev;
+
 static int __init
 acpi_parse_plat_int_src(acpi_table_entry_header * header,
                        const unsigned long end)
index 7956eb9058fcb873a65b5889d66f6eb6208e4c76..d58c1c5c903a9cfdae0981411ae53604fce020f1 100644 (file)
@@ -416,7 +416,7 @@ iosapic_end_level_irq (unsigned int irq)
        ia64_vector vec = irq_to_vector(irq);
        struct iosapic_rte_info *rte;
 
-       move_irq(irq);
+       move_native_irq(irq);
        list_for_each_entry(rte, &iosapic_intr_info[vec].rtes, rte_list)
                iosapic_eoi(rte->addr, vec);
 }
@@ -458,7 +458,7 @@ iosapic_ack_edge_irq (unsigned int irq)
 {
        irq_desc_t *idesc = irq_descp(irq);
 
-       move_irq(irq);
+       move_native_irq(irq);
        /*
         * Once we have recorded IRQ_PENDING already, we can mask the
         * interrupt for real. This prevents IRQ storms from unhandled
index 5ce908ef9c9585f5f0350503fa39caf0e3e732bf..9c72ea3f6432d115ca32090d0c8bd9c8365d5c07 100644 (file)
@@ -101,7 +101,6 @@ void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
 
        if (irq < NR_IRQS) {
                irq_affinity[irq] = mask;
-               set_irq_info(irq, mask);
                irq_redir[irq] = (char) (redir & 0xff);
        }
 }
index cafa8776a53dbbb41443d8b07a2d7e91bd7b4cea..11f08001f8c26e9aaa820b37d379d78eedac0bbd 100644 (file)
@@ -671,9 +671,11 @@ int add_memory(u64 start, u64 size)
 
        return ret;
 }
+EXPORT_SYMBOL_GPL(add_memory);
 
 int remove_memory(u64 start, u64 size)
 {
        return -EINVAL;
 }
+EXPORT_SYMBOL_GPL(remove_memory);
 #endif
index ee5fbb02b28f4f56caa06531d424b8136b0e6748..e8ff09fe73d9dc0f9163f3fcec821521a08ca9c1 100644 (file)
@@ -13,7 +13,7 @@ choice
        default SGI_IP22
 
 config MIPS_MTX1
-       bool "Support for 4G Systems MTX-1 board"
+       bool "4G Systems MTX-1 board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select SOC_AU1500
@@ -120,7 +120,7 @@ config MIPS_MIRAGE
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config MIPS_COBALT
-       bool "Support for Cobalt Server"
+       bool "Cobalt Server"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select I8259
@@ -132,7 +132,7 @@ config MIPS_COBALT
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config MACH_DECSTATION
-       bool "Support for DECstations"
+       bool "DECstations"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select EARLY_PRINTK
@@ -158,7 +158,7 @@ config MACH_DECSTATION
          otherwise choose R3000.
 
 config MIPS_EV64120
-       bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)"
+       bool "Galileo EV64120 Evaluation board (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -175,7 +175,7 @@ config MIPS_EV64120
          kernel for this platform.
 
 config MIPS_EV96100
-       bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
+       bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -195,7 +195,7 @@ config MIPS_EV96100
          here if you wish to build a kernel for this platform.
 
 config MIPS_IVR
-       bool "Support for Globespan IVR board"
+       bool "Globespan IVR board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select ITE_BOARD_GEN
@@ -211,7 +211,7 @@ config MIPS_IVR
          build a kernel for this platform.
 
 config MIPS_ITE8172
-       bool "Support for ITE 8172G board"
+       bool "ITE 8172G board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select ITE_BOARD_GEN
@@ -228,7 +228,7 @@ config MIPS_ITE8172
          a kernel for this platform.
 
 config MACH_JAZZ
-       bool "Support for the Jazz family of machines"
+       bool "Jazz family of machines"
        select ARC
        select ARC32
        select ARCH_MAY_HAVE_PC_FDC
@@ -246,7 +246,7 @@ config MACH_JAZZ
         Olivetti M700-10 workstations.
 
 config LASAT
-       bool "Support for LASAT Networks platforms"
+       bool "LASAT Networks platforms"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select MIPS_GT64120
@@ -258,7 +258,7 @@ config LASAT
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config MIPS_ATLAS
-       bool "Support for MIPS Atlas board"
+       bool "MIPS Atlas board"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select IRQ_CPU
@@ -283,7 +283,7 @@ config MIPS_ATLAS
          board.
 
 config MIPS_MALTA
-       bool "Support for MIPS Malta board"
+       bool "MIPS Malta board"
        select ARCH_MAY_HAVE_PC_FDC
        select BOOT_ELF32
        select HAVE_STD_PC_SERIAL_PORT
@@ -311,7 +311,7 @@ config MIPS_MALTA
          board.
 
 config MIPS_SEAD
-       bool "Support for MIPS SEAD board (EXPERIMENTAL)"
+       bool "MIPS SEAD board (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select IRQ_CPU
        select DMA_NONCOHERENT
@@ -328,7 +328,7 @@ config MIPS_SEAD
          board.
 
 config MIPS_SIM
-       bool 'Support for MIPS simulator (MIPSsim)'
+       bool 'MIPS simulator (MIPSsim)'
        select DMA_NONCOHERENT
        select IRQ_CPU
        select SYS_HAS_CPU_MIPS32_R1
@@ -341,7 +341,7 @@ config MIPS_SIM
          emulator.
 
 config MOMENCO_JAGUAR_ATX
-       bool "Support for Momentum Jaguar board"
+       bool "Momentum Jaguar board"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -361,7 +361,7 @@ config MOMENCO_JAGUAR_ATX
          Momentum Computer <http://www.momenco.com/>.
 
 config MOMENCO_OCELOT
-       bool "Support for Momentum Ocelot board"
+       bool "Momentum Ocelot board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -378,7 +378,7 @@ config MOMENCO_OCELOT
          Momentum Computer <http://www.momenco.com/>.
 
 config MOMENCO_OCELOT_3
-       bool "Support for Momentum Ocelot-3 board"
+       bool "Momentum Ocelot-3 board"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -397,7 +397,7 @@ config MOMENCO_OCELOT_3
          PMC-Sierra Rm79000 core.
 
 config MOMENCO_OCELOT_C
-       bool "Support for Momentum Ocelot-C board"
+       bool "Momentum Ocelot-C board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -414,7 +414,7 @@ config MOMENCO_OCELOT_C
          Momentum Computer <http://www.momenco.com/>.
 
 config MOMENCO_OCELOT_G
-       bool "Support for Momentum Ocelot-G board"
+       bool "Momentum Ocelot-G board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -431,23 +431,23 @@ config MOMENCO_OCELOT_G
          Momentum Computer <http://www.momenco.com/>.
 
 config MIPS_XXS1500
-       bool "Support for MyCable XXS1500 board"
+       bool "MyCable XXS1500 board"
        select DMA_NONCOHERENT
        select SOC_AU1500
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config PNX8550_V2PCI
-       bool "Support for Philips PNX8550 based Viper2-PCI board"
+       bool "Philips PNX8550 based Viper2-PCI board"
        select PNX8550
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config PNX8550_JBS
-       bool "Support for Philips PNX8550 based JBS board"
+       bool "Philips PNX8550 based JBS board"
        select PNX8550
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config DDB5074
-       bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"
+       bool "NEC DDB Vrc-5074 (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select DDB5XXX_COMMON
        select DMA_NONCOHERENT
@@ -465,7 +465,7 @@ config DDB5074
          evaluation board.
 
 config DDB5476
-       bool "Support for NEC DDB Vrc-5476"
+       bool "NEC DDB Vrc-5476"
        select DDB5XXX_COMMON
        select DMA_NONCOHERENT
        select HAVE_STD_PC_SERIAL_PORT
@@ -486,7 +486,7 @@ config DDB5476
          IDE controller, PS2 keyboard, PS2 mouse, etc.
 
 config DDB5477
-       bool "Support for NEC DDB Vrc-5477"
+       bool "NEC DDB Vrc-5477"
        select DDB5XXX_COMMON
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -504,13 +504,13 @@ config DDB5477
          ether port USB, AC97, PCI, etc.
 
 config MACH_VR41XX
-       bool "Support for NEC VR4100 series based machines"
+       bool "NEC VR41XX-based machines"
        select SYS_HAS_CPU_VR41XX
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
 
 config PMC_YOSEMITE
-       bool "Support for PMC-Sierra Yosemite eval board"
+       bool "PMC-Sierra Yosemite eval board"
        select DMA_COHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -527,7 +527,7 @@ config PMC_YOSEMITE
          manufactured by PMC-Sierra.
 
 config QEMU
-       bool "Support for Qemu"
+       bool "Qemu"
        select DMA_COHERENT
        select GENERIC_ISA_DMA
        select HAVE_STD_PC_SERIAL_PORT
@@ -547,7 +547,7 @@ config QEMU
          can be found at http://www.linux-mips.org/wiki/Qemu.
 
 config SGI_IP22
-       bool "Support for SGI IP22 (Indy/Indigo2)"
+       bool "SGI IP22 (Indy/Indigo2)"
        select ARC
        select ARC32
        select BOOT_ELF32
@@ -567,7 +567,7 @@ config SGI_IP22
          that runs on these, say Y here.
 
 config SGI_IP27
-       bool "Support for SGI IP27 (Origin200/2000)"
+       bool "SGI IP27 (Origin200/2000)"
        select ARC
        select ARC64
        select BOOT_ELF64
@@ -583,7 +583,7 @@ config SGI_IP27
          here.
 
 config SGI_IP32
-       bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
+       bool "SGI IP32 (O2) (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select ARC
        select ARC32
@@ -604,7 +604,7 @@ config SGI_IP32
          If you want this kernel to run on SGI O2 workstation, say Y here.
 
 config SIBYTE_BIGSUR
-       bool "Support for Sibyte BCM91480B-BigSur"
+       bool "Sibyte BCM91480B-BigSur"
        select BOOT_ELF32
        select DMA_COHERENT
        select PCI_DOMAINS
@@ -615,7 +615,7 @@ config SIBYTE_BIGSUR
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_SWARM
-       bool "Support for Sibyte BCM91250A-SWARM"
+       bool "Sibyte BCM91250A-SWARM"
        select BOOT_ELF32
        select DMA_COHERENT
        select SIBYTE_SB1250
@@ -626,7 +626,7 @@ config SIBYTE_SWARM
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_SENTOSA
-       bool "Support for Sibyte BCM91250E-Sentosa"
+       bool "Sibyte BCM91250E-Sentosa"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -637,7 +637,7 @@ config SIBYTE_SENTOSA
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_RHONE
-       bool "Support for Sibyte BCM91125E-Rhone"
+       bool "Sibyte BCM91125E-Rhone"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -648,7 +648,7 @@ config SIBYTE_RHONE
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_CARMEL
-       bool "Support for Sibyte BCM91120x-Carmel"
+       bool "Sibyte BCM91120x-Carmel"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -659,7 +659,7 @@ config SIBYTE_CARMEL
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_PTSWARM
-       bool "Support for Sibyte BCM91250PT-PTSWARM"
+       bool "Sibyte BCM91250PT-PTSWARM"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -671,7 +671,7 @@ config SIBYTE_PTSWARM
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_LITTLESUR
-       bool "Support for Sibyte BCM91250C2-LittleSur"
+       bool "Sibyte BCM91250C2-LittleSur"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -683,7 +683,7 @@ config SIBYTE_LITTLESUR
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_CRHINE
-       bool "Support for Sibyte BCM91120C-CRhine"
+       bool "Sibyte BCM91120C-CRhine"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -694,7 +694,7 @@ config SIBYTE_CRHINE
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_CRHONE
-       bool "Support for Sibyte BCM91125C-CRhone"
+       bool "Sibyte BCM91125C-CRhone"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -706,7 +706,7 @@ config SIBYTE_CRHONE
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SNI_RM200_PCI
-       bool "Support for SNI RM200 PCI"
+       bool "SNI RM200 PCI"
        select ARC
        select ARC32
        select ARCH_MAY_HAVE_PC_FDC
@@ -732,7 +732,7 @@ config SNI_RM200_PCI
          support this machine type.
 
 config TOSHIBA_JMR3927
-       bool "Support for Toshiba JMR-TX3927 board"
+       bool "Toshiba JMR-TX3927 board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select MIPS_TX3927
@@ -743,7 +743,7 @@ config TOSHIBA_JMR3927
        select TOSHIBA_BOARDS
 
 config TOSHIBA_RBTX4927
-       bool "Support for Toshiba TBTX49[23]7 board"
+       bool "Toshiba TBTX49[23]7 board"
        select DMA_NONCOHERENT
        select HAS_TXX9_SERIAL
        select HW_HAS_PCI
@@ -760,7 +760,7 @@ config TOSHIBA_RBTX4927
          support this machine type
 
 config TOSHIBA_RBTX4938
-       bool "Support for Toshiba RBTX4938 board"
+       bool "Toshiba RBTX4938 board"
        select HAVE_STD_PC_SERIAL_PORT
        select DMA_NONCOHERENT
        select GENERIC_ISA_DMA
@@ -1411,13 +1411,12 @@ config PAGE_SIZE_8KB
 
 config PAGE_SIZE_16KB
        bool "16kB"
-       depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
+       depends on !CPU_R3000 && !CPU_TX39XX
        help
          Using 16kB page size will result in higher performance kernel at
          the price of higher memory consumption.  This option is available on
-         all non-R3000 family processor.  Not that at the time of this
-         writing this option is still high experimental; there are also
-         issues with compatibility of user applications.
+         all non-R3000 family processors.  Note that you will need a suitable
+         Linux distribution to support this.
 
 config PAGE_SIZE_64KB
        bool "64kB"
@@ -1426,8 +1425,7 @@ config PAGE_SIZE_64KB
          Using 64kB page size will result in higher performance kernel at
          the price of higher memory consumption.  This option is available on
          all non-R3000 family processor.  Not that at the time of this
-         writing this option is still high experimental; there are also
-         issues with compatibility of user applications.
+         writing this option is still high experimental.
 
 endchoice
 
index da61de7761549d89c3e5bc08204ebbdfdea5cd2a..afe05ec12c27d31326d73937081eb7e0631d1c33 100644 (file)
@@ -68,6 +68,7 @@
 
 extern void set_debug_traps(void);
 extern irq_cpustat_t irq_stat [NR_CPUS];
+extern void mips_timer_interrupt(struct pt_regs *regs);
 
 static void setup_local_irq(unsigned int irq, int type, int int_req);
 static unsigned int startup_irq(unsigned int irq);
index 9c171afd9a534f121e1e4c0ff5c0c8165e9951e8..ae7d8c57bf3f8d889758f02607a2ad0aec16e4c2 100644 (file)
@@ -1,10 +1,9 @@
 /*
  *
  * BRIEF MODULE DESCRIPTION
- *    PROM library initialisation code, assuming a version of
- *    pmon is the boot code.
+ *    PROM library initialisation code, assuming YAMON is the boot loader.
  *
- * Copyright 2000,2001 MontaVista Software Inc.
+ * Copyright 2000, 2001, 2006 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
  *             ppopov@mvista.com or source@mvista.com
  *
@@ -49,9 +48,9 @@ extern char **prom_argv, **prom_envp;
 
 typedef struct
 {
-    char *name;
-/*    char *val; */
-}t_env_var;
+       char *name;
+       char *val;
+} t_env_var;
 
 
 char * prom_getcmdline(void)
@@ -85,21 +84,16 @@ char *prom_getenv(char *envname)
 {
        /*
         * Return a pointer to the given environment variable.
-        * Environment variables are stored in the form of "memsize=64".
         */
 
        t_env_var *env = (t_env_var *)prom_envp;
-       int i;
-
-       i = strlen(envname);
 
-       while(env->name) {
-               if(strncmp(envname, env->name, i) == 0) {
-                       return(env->name + strlen(envname) + 1);
-               }
+       while (env->name) {
+               if (strcmp(envname, env->name) == 0)
+                       return env->val;
                env++;
        }
-       return(NULL);
+       return NULL;
 }
 
 inline unsigned char str2hexnum(unsigned char c)
index 44dac3b0df3b2575e705e1a7925928a18a9c7194..683d9da84b6695832193c8c5fe0e2b61496ed1fb 100644 (file)
@@ -112,6 +112,11 @@ sdsleep:
        mtc0    k0, CP0_PAGEMASK
        lw      k0, 0x14(sp)
        mtc0    k0, CP0_CONFIG
+
+       /* We need to catch the ealry Alchemy SOCs with
+        * the write-only Config[OD] bit and set it back to one...
+        */
+       jal     au1x00_fixup_config_od
        lw      $1, PT_R1(sp)
        lw      $2, PT_R2(sp)
        lw      $3, PT_R3(sp)
index f85f1524b36639a1c9c2e9bf0e7ef8673afb4c97..f74d66a58a21a51c8dc2915c8e741fc0b500440a 100644 (file)
@@ -116,6 +116,7 @@ void mips_timer_interrupt(struct pt_regs *regs)
 
 null:
        ack_r4ktimer(0);
+       irq_exit();
 }
 
 #ifdef CONFIG_PM
index 85e9e5013679f83142f602940374226ca0858aaa..f2296a9999534ea2003064a5f468e77a657d4f2a 100644 (file)
@@ -86,7 +86,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
         /* disable interrupts */
         UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-        /* set up buad rate */
+        /* set up baud rate */
         {
                 uint32 divisor;
 
index 1d18d590495b138ac7687d94ecdd1c8b3302cafb..385bbdb10170a058e065b6400615f626f340d98a 100644 (file)
@@ -86,7 +86,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
         /* disable interrupts */
         UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-        /* set up buad rate */
+        /* set up baud rate */
         {
                 uint32 divisor;
 
index 16e34a546e547d0cfe9dc15c1fc04785fb3fc1db..8f0d835491ff46bfce7252479607d3cf4f7a4393 100644 (file)
@@ -149,7 +149,7 @@ void serial_set(int channel, unsigned long baud)
 #else
        /*
         * Note: Set baud rate, hardcoded here for rate of 115200
-        * since became unsure of above "buad rate" algorithm (??).
+        * since became unsure of above "baud rate" algorithm (??).
         */
        outreg(channel, LCR, 0x83);
        outreg(channel, DLM, 0x00);     // See note above
index 8720bccfdea250dd9eddbe580c22b8f4e75fa60e..f0a6a38fcf4d9fae50fc20da3b7c1505ebc451ef 100644 (file)
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-       /* set up buad rate */
+       /* set up baud rate */
        {
                uint32 divisor;
 
index c4f8530fd07e95c129c6c11ae3f7a530c360838e..6a7ccaf9350247d1fea9a44d427151ee2e71b918 100644 (file)
@@ -72,7 +72,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-       /* set up buad rate */
+       /* set up baud rate */
        {
                uint32 divisor;
 
index 92b28b674d6f615be8ab8894ea117e06018f44d1..0facfaf4e9508d7a2d827cfff7e612323d2c9cc5 100644 (file)
@@ -272,8 +272,8 @@ void output_sc_defines(void)
        text("/* Linux sigcontext offsets. */");
        offset("#define SC_REGS       ", struct sigcontext, sc_regs);
        offset("#define SC_FPREGS     ", struct sigcontext, sc_fpregs);
-       offset("#define SC_MDHI       ", struct sigcontext, sc_hi);
-       offset("#define SC_MDLO       ", struct sigcontext, sc_lo);
+       offset("#define SC_MDHI       ", struct sigcontext, sc_mdhi);
+       offset("#define SC_MDLO       ", struct sigcontext, sc_mdlo);
        offset("#define SC_PC         ", struct sigcontext, sc_pc);
        offset("#define SC_FPC_CSR    ", struct sigcontext, sc_fpc_csr);
        linefeed;
index 47a087b6c11ba881d33d2aa2d3aaf2ffce50374a..d268827c62bdd167459e8e43d2467781ff9f879a 100644 (file)
@@ -206,7 +206,7 @@ static inline void check_daddi(void)
                "daddi  %0, %1, %3\n\t"
                ".set   pop"
                : "=r" (v), "=&r" (tmp)
-               : "I" (0xffffffffffffdb9a), "I" (0x1234));
+               : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
        set_except_vector(12, handler);
        local_irq_restore(flags);
 
@@ -224,7 +224,7 @@ static inline void check_daddi(void)
                "dsrl   %1, %1, 1\n\t"
                "daddi  %0, %1, %3"
                : "=r" (v), "=&r" (tmp)
-               : "I" (0xffffffffffffdb9a), "I" (0x1234));
+               : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
        set_except_vector(12, handler);
        local_irq_restore(flags);
 
@@ -280,7 +280,7 @@ static inline void check_daddiu(void)
                "daddu  %1, %2\n\t"
                ".set   pop"
                : "=&r" (v), "=&r" (w), "=&r" (tmp)
-               : "I" (0xffffffffffffdb9a), "I" (0x1234));
+               : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
 
        if (v == w) {
                printk("no.\n");
@@ -296,7 +296,7 @@ static inline void check_daddiu(void)
                "addiu  %1, $0, %4\n\t"
                "daddu  %1, %2"
                : "=&r" (v), "=&r" (w), "=&r" (tmp)
-               : "I" (0xffffffffffffdb9a), "I" (0x1234));
+               : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
 
        if (v == w) {
                printk("yes.\n");
index 58b3b14873cb572a10d9a87e2b57cece1fc061b8..8c2c359a05f413bd089a8eb40cf64781ac8bb89a 100644 (file)
@@ -121,6 +121,7 @@ static inline void check_wait(void)
        case CPU_24K:
        case CPU_25KF:
        case CPU_34K:
+       case CPU_74K:
        case CPU_PR4450:
                cpu_wait = r4k_wait;
                printk(" available.\n");
@@ -432,6 +433,15 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
                             MIPS_CPU_LLSC;
                c->tlbsize = 64;
                break;
+       case PRID_IMP_R14000:
+               c->cputype = CPU_R14000;
+               c->isa_level = MIPS_CPU_ISA_IV;
+               c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
+                            MIPS_CPU_FPU | MIPS_CPU_32FPR |
+                            MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
+                            MIPS_CPU_LLSC;
+               c->tlbsize = 64;
+               break;
        }
 }
 
@@ -593,6 +603,9 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
        case PRID_IMP_34K:
                c->cputype = CPU_34K;
                break;
+       case PRID_IMP_74K:
+               c->cputype = CPU_74K;
+               break;
        }
 }
 
@@ -642,7 +655,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
        case PRID_IMP_SB1:
                c->cputype = CPU_SB1;
                /* FPU in pass1 is known to have issues. */
-               if ((c->processor_id & 0xff) < 0x20)
+               if ((c->processor_id & 0xff) < 0x02)
                        c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
                break;
        case PRID_IMP_SB1A:
index d101d2fb24caab6f8283647a20a5c37768f30c05..a9c6de1b954257e8e30e73518009f7cf3d1444ae 100644 (file)
@@ -101,7 +101,7 @@ FEXPORT(restore_all)                        # restore full frame
        EMT
 1:
        mfc0    v1, CP0_TCSTATUS
-       /* We set IXMT above, XOR should cler it here */
+       /* We set IXMT above, XOR should clear it here */
        xori    v1, v1, TCSTATUS_IXMT
        or      v1, v0, v1
        mtc0    v1, CP0_TCSTATUS
index 10f28fb9f008a92fc89b68c89734233297e8472b..5fd7a8af0c6256bc720c7fa232ee14d551be3e63 100644 (file)
                 */
                mfc0    k0, CP0_CAUSE
                andi    k0, k0, 0x7c
-               add     k1, k1, k0
-               PTR_L   k0, saved_vectors(k1)
-               jr      k0
+#ifdef CONFIG_64BIT
+               dsll    k0, k0, 1
+#endif
+               PTR_L   k1, saved_vectors(k0)
+               jr      k1
                nop
 1:
                move    k0, sp
index e54a7f442f8adc271af20fcf7ac310e9fb9e8bb0..d7bf0215bc1d28eb40160366afbdd59b41fea470 100644 (file)
@@ -288,6 +288,9 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
                sym = (Elf_Sym *)sechdrs[symindex].sh_addr
                        + ELF_MIPS_R_SYM(rel[i]);
                if (!sym->st_value) {
+                       /* Ignore unresolved weak symbol */
+                       if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
+                               continue;
                        printk(KERN_WARNING "%s: Unknown symbol %s\n",
                               me->name, strtab + sym->st_name);
                        return -ENOENT;
@@ -325,6 +328,9 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
                sym = (Elf_Sym *)sechdrs[symindex].sh_addr
                        + ELF_MIPS_R_SYM(rel[i]);
                if (!sym->st_value) {
+                       /* Ignore unresolved weak symbol */
+                       if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
+                               continue;
                        printk(KERN_WARNING "%s: Unknown symbol %s\n",
                               me->name, strtab + sym->st_name);
                        return -ENOENT;
index 84ab959f924ac57d1b05edc73aa48ce84c2da04f..9def554f335b8f430dd0483dcca482b83c083d07 100644 (file)
@@ -42,6 +42,7 @@ static const char *cpu_name[] = {
        [CPU_R8000]     = "R8000",
        [CPU_R10000]    = "R10000",
        [CPU_R12000]    = "R12000",
+       [CPU_R14000]    = "R14000",
        [CPU_R4300]     = "R4300",
        [CPU_R4650]     = "R4650",
        [CPU_R4700]     = "R4700",
@@ -74,6 +75,7 @@ static const char *cpu_name[] = {
        [CPU_24K]       = "MIPS 24K",
        [CPU_25KF]      = "MIPS 25Kf",
        [CPU_34K]       = "MIPS 34K",
+       [CPU_74K]       = "MIPS 74K",
        [CPU_VR4111]    = "NEC VR4111",
        [CPU_VR4121]    = "NEC VR4121",
        [CPU_VR4122]    = "NEC VR4122",
index b53a9207f530a9db07d58c19b556b9d1cc379594..8efb23a841317a03a385f7ccb2c8d9b47b250475 100644 (file)
@@ -209,7 +209,7 @@ sys_call_table:
        PTR     sys_fork
        PTR     sys_read
        PTR     sys_write
-       PTR     sys_open                        /* 4005 */
+       PTR     compat_sys_open                 /* 4005 */
        PTR     sys_close
        PTR     sys_waitpid
        PTR     sys_creat
index bcf1b10e518f8be4b4302e13bb3186d1e1773438..397a70e651b5e9c21dbe7e3347dcc279df728b78 100644 (file)
@@ -246,7 +246,7 @@ static inline int parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_en
 #ifdef CONFIG_64BIT
        /* HACK: Guess if the sign extension was forgotten */
        if (start > 0x0000000080000000 && start < 0x00000000ffffffff)
-               start |= 0xffffffff00000000;
+               start |= 0xffffffff00000000UL;
 #endif
 
        end = start + size;
@@ -355,8 +355,6 @@ static inline void bootmem_init(void)
        }
 #endif
 
-       memory_present(0, first_usable_pfn, max_low_pfn);
-
        /* Initialize the boot-time allocator with low memory only.  */
        bootmap_size = init_bootmem(first_usable_pfn, max_low_pfn);
 
@@ -410,6 +408,7 @@ static inline void bootmem_init(void)
 
                /* Register lowmem ranges */
                free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
+               memory_present(0, curr_pfn, curr_pfn + size - 1);
        }
 
        /* Reserve the bootmap memory.  */
@@ -419,17 +418,20 @@ static inline void bootmem_init(void)
 #ifdef CONFIG_BLK_DEV_INITRD
        initrd_below_start_ok = 1;
        if (initrd_start) {
-               unsigned long initrd_size = ((unsigned char *)initrd_end) - ((unsigned char *)initrd_start);
+               unsigned long initrd_size = ((unsigned char *)initrd_end) -
+                       ((unsigned char *)initrd_start);
+               const int width = sizeof(long) * 2;
+
                printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
                       (void *)initrd_start, initrd_size);
 
                if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
                        printk("initrd extends beyond end of memory "
                               "(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n",
-                              sizeof(long) * 2,
-                              (unsigned long long)CPHYSADDR(initrd_end),
-                              sizeof(long) * 2,
-                              (unsigned long long)PFN_PHYS(max_low_pfn));
+                              width,
+                              (unsigned long long) CPHYSADDR(initrd_end),
+                              width,
+                              (unsigned long long) PFN_PHYS(max_low_pfn));
                        initrd_start = initrd_end = 0;
                        initrd_reserve_bootmem = 0;
                }
index 3ca786215d48c172fe0948c450c359d16e3f3c20..ce6cb915c0a7a703ab6c49a2e269d4de1256db38 100644 (file)
@@ -31,7 +31,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
        save_gp_reg(31);
 #undef save_gp_reg
 
-#ifdef CONFIG_32BIT
        err |= __put_user(regs->hi, &sc->sc_mdhi);
        err |= __put_user(regs->lo, &sc->sc_mdlo);
        if (cpu_has_dsp) {
@@ -43,20 +42,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
                err |= __put_user(mflo3(), &sc->sc_lo3);
                err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
        }
-#endif
-#ifdef CONFIG_64BIT
-       err |= __put_user(regs->hi, &sc->sc_hi[0]);
-       err |= __put_user(regs->lo, &sc->sc_lo[0]);
-       if (cpu_has_dsp) {
-               err |= __put_user(mfhi1(), &sc->sc_hi[1]);
-               err |= __put_user(mflo1(), &sc->sc_lo[1]);
-               err |= __put_user(mfhi2(), &sc->sc_hi[2]);
-               err |= __put_user(mflo2(), &sc->sc_lo[2]);
-               err |= __put_user(mfhi3(), &sc->sc_hi[3]);
-               err |= __put_user(mflo3(), &sc->sc_lo[3]);
-               err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
-       }
-#endif
 
        err |= __put_user(!!used_math(), &sc->sc_used_math);
 
@@ -92,7 +77,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
        current_thread_info()->restart_block.fn = do_no_restart_syscall;
 
        err |= __get_user(regs->cp0_epc, &sc->sc_pc);
-#ifdef CONFIG_32BIT
        err |= __get_user(regs->hi, &sc->sc_mdhi);
        err |= __get_user(regs->lo, &sc->sc_mdlo);
        if (cpu_has_dsp) {
@@ -104,20 +88,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
                err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg);
                err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
        }
-#endif
-#ifdef CONFIG_64BIT
-       err |= __get_user(regs->hi, &sc->sc_hi[0]);
-       err |= __get_user(regs->lo, &sc->sc_lo[0]);
-       if (cpu_has_dsp) {
-               err |= __get_user(treg, &sc->sc_hi[1]); mthi1(treg);
-               err |= __get_user(treg, &sc->sc_lo[1]); mthi1(treg);
-               err |= __get_user(treg, &sc->sc_hi[2]); mthi2(treg);
-               err |= __get_user(treg, &sc->sc_lo[2]); mthi2(treg);
-               err |= __get_user(treg, &sc->sc_hi[3]); mthi3(treg);
-               err |= __get_user(treg, &sc->sc_lo[3]); mthi3(treg);
-               err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
-       }
-#endif
 
 #define restore_gp_reg(i) do {                                         \
        err |= __get_user(regs->regs[i], &sc->sc_regs[i]);              \
diff --git