Merge master.kernel.org:/home/rmk/linux-2.6-arm
authorLinus Torvalds <torvalds@g5.osdl.org>
Wed, 9 Nov 2005 16:55:53 +0000 (08:55 -0800)
committerLinus Torvalds <torvalds@g5.osdl.org>
Wed, 9 Nov 2005 16:55:53 +0000 (08:55 -0800)
16 files changed:
arch/arm/Kconfig
arch/arm/kernel/process.c
arch/arm/lib/bitops.h
arch/arm/mach-realview/Makefile
arch/arm/mach-realview/core.c
arch/arm/mach-realview/hotplug.c [new file with mode: 0644]
arch/arm/mach-realview/localtimer.c [new file with mode: 0644]
arch/arm/mach-realview/platsmp.c
arch/arm/mach-s3c2410/mach-anubis.c
arch/arm/mach-s3c2410/mach-rx3715.c
arch/arm/mach-s3c2410/mach-smdk2440.c
include/asm-arm/arch-realview/entry-macro.S
include/asm-arm/arch-realview/irqs.h
include/asm-arm/arch-realview/platform.h
include/asm-arm/assembler.h
include/asm-arm/mach/flash.h

index 3bfef0934c9d39162e346e73764f379aad8946f4..ec77721507cb746c238afe4d4ed56a62b97f4b38 100644 (file)
@@ -358,7 +358,7 @@ config HOTPLUG_CPU
 
 config LOCAL_TIMERS
        bool "Use local timer interrupts"
-       depends on SMP && n
+       depends on SMP && REALVIEW_MPCORE
        default y
        help
          Enable support for local timers on SMP platforms, rather then the
index c0f6a119de3b903c7bbe44d8d28699473205d3a6..30494aab829a8adeb68a165c168aa6cd8593cf39 100644 (file)
@@ -359,7 +359,7 @@ copy_thread(int nr, unsigned long clone_flags, unsigned long stack_start,
        struct thread_info *thread = p->thread_info;
        struct pt_regs *childregs;
 
-       childregs = ((struct pt_regs *)((unsigned long)thread + THREAD_START_SP)) - 1;
+       childregs = (void *)thread + THREAD_START_SP - sizeof(*regs);
        *childregs = *regs;
        childregs->ARM_r0 = 0;
        childregs->ARM_sp = stack_start;
index f35d91fbe11742dcd91d0ad9fdf76d796f3b7548..b8c14e93669711d2c52f20ca06c41980eaf791b0 100644 (file)
@@ -34,7 +34,7 @@
        and     r2, r0, #7
        mov     r3, #1
        mov     r3, r3, lsl r2
-       save_and_disable_irqs ip, r2
+       save_and_disable_irqs ip
        ldrb    r2, [r1, r0, lsr #3]
        \instr  r2, r2, r3
        strb    r2, [r1, r0, lsr #3]
@@ -54,7 +54,7 @@
        add     r1, r1, r0, lsr #3
        and     r3, r0, #7
        mov     r0, #1
-       save_and_disable_irqs ip, r2
+       save_and_disable_irqs ip
        ldrb    r2, [r1]
        tst     r2, r0, lsl r3
        \instr  r2, r2, r0, lsl r3
index 011a85c1062746f050cabf4cf581beb7424df3be..36e76ba937fc031286eeb4fa7acf46b13e37cd64 100644 (file)
@@ -5,3 +5,5 @@
 obj-y                                  := core.o clock.o
 obj-$(CONFIG_MACH_REALVIEW_EB)         += realview_eb.o
 obj-$(CONFIG_SMP)                      += platsmp.o headsmp.o
+obj-$(CONFIG_HOTPLUG_CPU)              += hotplug.o
+obj-$(CONFIG_LOCAL_TIMERS)             += localtimer.o
index 4ea60d8b6e36838bdd5deb72955732297edf6cf9..e2c6fa23d3cd5815b1480660099db8e48bba8a1e 100644 (file)
@@ -550,7 +550,7 @@ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id, struct pt_reg
 
        timer_tick(regs);
 
-#ifdef CONFIG_SMP
+#if defined(CONFIG_SMP) && !defined(CONFIG_LOCAL_TIMERS)
        smp_send_timer();
        update_process_times(user_mode(regs));
 #endif
diff --git a/arch/arm/mach-realview/hotplug.c b/arch/arm/mach-realview/hotplug.c
new file mode 100644 (file)
index 0000000..09748cb
--- /dev/null
@@ -0,0 +1,138 @@
+/*
+ *  linux/arch/arm/mach-realview/hotplug.c
+ *
+ *  Copyright (C) 2002 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/smp.h>
+#include <linux/completion.h>
+
+extern volatile int pen_release;
+
+static DECLARE_COMPLETION(cpu_killed);
+
+static inline void cpu_enter_lowpower(void)
+{
+       unsigned int v;
+
+       asm volatile(   "mcr    p15, 0, %1, c7, c14, 0\n"
+       "       mcr     p15, 0, %1, c7, c5, 0\n"
+       "       mcr     p15, 0, %1, c7, c10, 4\n"
+       /*
+        * Turn off coherency
+        */
+       "       mrc     p15, 0, %0, c1, c0, 1\n"
+       "       bic     %0, %0, #0x20\n"
+       "       mcr     p15, 0, %0, c1, c0, 1\n"
+       "       mrc     p15, 0, %0, c1, c0, 0\n"
+       "       bic     %0, %0, #0x04\n"
+       "       mcr     p15, 0, %0, c1, c0, 0\n"
+         : "=&r" (v)
+         : "r" (0)
+         : "cc");
+}
+
+static inline void cpu_leave_lowpower(void)
+{
+       unsigned int v;
+
+       asm volatile(   "mrc    p15, 0, %0, c1, c0, 0\n"
+       "       orr     %0, %0, #0x04\n"
+       "       mcr     p15, 0, %0, c1, c0, 0\n"
+       "       mrc     p15, 0, %0, c1, c0, 1\n"
+       "       orr     %0, %0, #0x20\n"
+       "       mcr     p15, 0, %0, c1, c0, 1\n"
+         : "=&r" (v)
+         :
+         : "cc");
+}
+
+static inline void platform_do_lowpower(unsigned int cpu)
+{
+       /*
+        * there is no power-control hardware on this platform, so all
+        * we can do is put the core into WFI; this is safe as the calling
+        * code will have already disabled interrupts
+        */
+       for (;;) {
+               /*
+                * here's the WFI
+                */
+               asm(".word      0xe320f003\n"
+                   :
+                   :
+                   : "memory", "cc");
+
+               if (pen_release == cpu) {
+                       /*
+                        * OK, proper wakeup, we're done
+                        */
+                       break;
+               }
+
+               /*
+                * getting here, means that we have come out of WFI without
+                * having been woken up - this shouldn't happen
+                *
+                * The trouble is, letting people know about this is not really
+                * possible, since we are currently running incoherently, and
+                * therefore cannot safely call printk() or anything else
+                */
+#ifdef DEBUG
+               printk("CPU%u: spurious wakeup call\n", cpu);
+#endif
+       }
+}
+
+int platform_cpu_kill(unsigned int cpu)
+{
+       return wait_for_completion_timeout(&cpu_killed, 5000);
+}
+
+/*
+ * platform-specific code to shutdown a CPU
+ *
+ * Called with IRQs disabled
+ */
+void platform_cpu_die(unsigned int cpu)
+{
+#ifdef DEBUG
+       unsigned int this_cpu = hard_smp_processor_id();
+
+       if (cpu != this_cpu) {
+               printk(KERN_CRIT "Eek! platform_cpu_die running on %u, should be %u\n",
+                          this_cpu, cpu);
+               BUG();
+       }
+#endif
+
+       printk(KERN_NOTICE "CPU%u: shutdown\n", cpu);
+       complete(&cpu_killed);
+
+       /*
+        * we're ready for shutdown now, so do it
+        */
+       cpu_enter_lowpower();
+       platform_do_lowpower(cpu);
+
+       /*
+        * bring this CPU back into the world of cache
+        * coherency, and then restore interrupts
+        */
+       cpu_leave_lowpower();
+}
+
+int mach_cpu_disable(unsigned int cpu)
+{
+       /*
+        * we don't allow CPU 0 to be shutdown (it is still too special
+        * e.g. clock tick interrupts)
+        */
+       return cpu == 0 ? -EPERM : 0;
+}
diff --git a/arch/arm/mach-realview/localtimer.c b/arch/arm/mach-realview/localtimer.c
new file mode 100644 (file)
index 0000000..5e917e3
--- /dev/null
@@ -0,0 +1,130 @@
+/*
+ *  linux/arch/arm/mach-realview/localtimer.c
+ *
+ *  Copyright (C) 2002 ARM Ltd.
+ *  All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/smp.h>
+
+#include <asm/mach/time.h>
+#include <asm/hardware/arm_twd.h>
+#include <asm/hardware/gic.h>
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+
+#include "core.h"
+
+#define TWD_BASE(cpu)  (__io_address(REALVIEW_TWD_BASE) + \
+                        ((cpu) * REALVIEW_TWD_SIZE))
+
+static unsigned long mpcore_timer_rate;
+
+/*
+ * local_timer_ack: checks for a local timer interrupt.
+ *
+ * If a local timer interrupt has occured, acknowledge and return 1.
+ * Otherwise, return 0.
+ */
+int local_timer_ack(void)
+{
+       void __iomem *base = TWD_BASE(smp_processor_id());
+
+       if (__raw_readl(base + TWD_TIMER_INTSTAT)) {
+               __raw_writel(1, base + TWD_TIMER_INTSTAT);
+               return 1;
+       }
+
+       return 0;
+}
+
+void __cpuinit local_timer_setup(unsigned int cpu)
+{
+       void __iomem *base = TWD_BASE(cpu);
+       unsigned int load, offset;
+       u64 waitjiffies;
+       unsigned int count;
+
+       /*
+        * If this is the first time round, we need to work out how fast
+        * the timer ticks
+        */
+       if (mpcore_timer_rate == 0) {
+               printk("Calibrating local timer... ");
+
+               /* Wait for a tick to start */
+               waitjiffies = get_jiffies_64() + 1;
+
+               while (get_jiffies_64() < waitjiffies)
+                       udelay(10);
+
+               /* OK, now the tick has started, let's get the timer going */
+               waitjiffies += 5;
+
+                                /* enable, no interrupt or reload */
+               __raw_writel(0x1, base + TWD_TIMER_CONTROL);
+
+                                /* maximum value */
+               __raw_writel(0xFFFFFFFFU, base + TWD_TIMER_COUNTER);
+
+               while (get_jiffies_64() < waitjiffies)
+                       udelay(10);
+
+               count = __raw_readl(base + TWD_TIMER_COUNTER);
+
+               mpcore_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
+
+               printk("%lu.%02luMHz.\n", mpcore_timer_rate / 1000000,
+                       (mpcore_timer_rate / 100000) % 100);
+       }
+
+       load = mpcore_timer_rate / HZ;
+
+       __raw_writel(load, base + TWD_TIMER_LOAD);
+       __raw_writel(0x7,  base + TWD_TIMER_CONTROL);
+
+       /*
+        * Now maneuver our local tick into the right part of the jiffy.
+        * Start by working out where within the tick our local timer
+        * interrupt should go.
+        */
+       offset = ((mpcore_timer_rate / HZ) / (NR_CPUS + 1)) * (cpu + 1);
+
+       /*
+        * gettimeoffset() will return a number of us since the last tick.
+        * Convert this number of us to a local timer tick count.
+        * Be careful of integer overflow whilst keeping maximum precision.
+        *
+        * with HZ=100 and 1MHz (fpga) ~ 1GHz processor:
+        * load = 1 ~ 10,000
+        * mpcore_timer_rate/10000 = 100 ~ 100,000
+        *
+        * so the multiply value will be less than 10^9 always.
+        */
+       load = (system_timer->offset() * (mpcore_timer_rate / 10000)) / 100;
+
+       /* Add on our offset to get the load value */
+       load = (load + offset) % (mpcore_timer_rate / HZ);
+
+       __raw_writel(load, base + TWD_TIMER_COUNTER);
+
+       /* Make sure our local interrupt controller has this enabled */
+       __raw_writel(1 << IRQ_LOCALTIMER,
+                    __io_address(REALVIEW_GIC_DIST_BASE) + GIC_DIST_ENABLE_SET);
+}
+
+/*
+ * take a local timer down
+ */
+void __cpuexit local_timer_stop(unsigned int cpu)
+{
+       __raw_writel(0, TWD_BASE(cpu) + TWD_TIMER_CONTROL);
+}
index 09b35f62247a8863c268ec0ae4c1b3d3259c1d1d..0c7d4ac9a7b371c7a4221d96a918812cbdb7c811 100644 (file)
@@ -174,6 +174,11 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
        if (max_cpus > ncores)
                max_cpus = ncores;
 
+       /*
+        * Enable the local timer for primary CPU
+        */
+       local_timer_setup(cpu);
+
        /*
         * Initialise the possible/present maps.
         * cpu_possible_map describes the set of CPUs which may be present
index 8390b685c2b61853ac7ead39016427e660a79447..0f81fc0c2f7f5abfd07deb5017f5bc68bc965ca4 100644 (file)
 static struct map_desc anubis_iodesc[] __initdata = {
   /* ISA IO areas */
 
-  { (u32)S3C24XX_VA_ISA_BYTE, 0x0,        SZ_16M, MT_DEVICE },
-  { (u32)S3C24XX_VA_ISA_WORD, 0x0,        SZ_16M, MT_DEVICE },
+  {
+       .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
+       .pfn            = __phys_to_pfn(0x0),
+       .length         = SZ_4M,
+       .type           = MT_DEVICE
+  }, {
+       .virtual        = (u32)S3C24XX_VA_ISA_WORD,
+       .pfn            = __phys_to_pfn(0x0),
+       .length         = SZ_4M, MT_DEVICE
+  },
 
   /* we could possibly compress the next set down into a set of smaller tables
    * pagetables, but that would mean using an L2 section, and it still means
@@ -66,16 +74,41 @@ static struct map_desc anubis_iodesc[] __initdata = {
 
   /* CPLD control registers */
 
-  { (u32)ANUBIS_VA_CTRL1,      ANUBIS_PA_CTRL1,        SZ_4K, MT_DEVICE },
-  { (u32)ANUBIS_VA_CTRL2,      ANUBIS_PA_CTRL2,        SZ_4K, MT_DEVICE },
+  {
+       .virtual        = (u32)ANUBIS_VA_CTRL1,
+       .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL1),
+       .length         = SZ_4K,
+       .type           = MT_DEVICE
+  }, {
+       .virtual        = (u32)ANUBIS_VA_CTRL2,
+       .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL2),
+       .length         = SZ_4K,
+       .type           =MT_DEVICE
+  },
 
   /* IDE drives */
 
-  { (u32)ANUBIS_IDEPRI,                S3C2410_CS3,            SZ_1M, MT_DEVICE },
-  { (u32)ANUBIS_IDEPRIAUX,     S3C2410_CS3+(1<<26),    SZ_1M, MT_DEVICE },
-
-  { (u32)ANUBIS_IDESEC,                S3C2410_CS4,            SZ_1M, MT_DEVICE },
-  { (u32)ANUBIS_IDESECAUX,     S3C2410_CS4+(1<<26),    SZ_1M, MT_DEVICE },
+  {
+       .virtual        = (u32)ANUBIS_IDEPRI,
+       .pfn            = __phys_to_pfn(S3C2410_CS3),
+       .length         = SZ_1M,
+       .type           = MT_DEVICE
+  }, {
+       .virtual        = (u32)ANUBIS_IDEPRIAUX,
+       .pfn            = __phys_to_pfn(S3C2410_CS3+(1<<26)),
+       .length         = SZ_1M,
+       .type           = MT_DEVICE
+  }, {
+       .virtual        = (u32)ANUBIS_IDESEC,
+       .pfn            = __phys_to_pfn(S3C2410_CS4),
+       .length         = SZ_1M,
+       .type           = MT_DEVICE
+  }, {
+       .virtual        = (u32)ANUBIS_IDESECAUX,
+       .pfn            = __phys_to_pfn(S3C2410_CS4+(1<<26)),
+       .length         = SZ_1M,
+       .type           = MT_DEVICE
+  },
 };
 
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
index 24d69019a843d3401d1adb9ec90836a3f4965bdf..f8d86d1e16b667456cec0cd2c7967496c3a08416 100644 (file)
 static struct map_desc rx3715_iodesc[] __initdata = {
        /* dump ISA space somewhere unused */
 
-       { (u32)S3C24XX_VA_ISA_WORD, S3C2410_CS3, SZ_16M, MT_DEVICE },
-       { (u32)S3C24XX_VA_ISA_BYTE, S3C2410_CS3, SZ_16M, MT_DEVICE },
+       {
+               .virtual        = (u32)S3C24XX_VA_ISA_WORD,
+               .pfn            = __phys_to_pfn(S3C2410_CS3),
+               .length         = SZ_1M,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
+               .pfn            = __phys_to_pfn(S3C2410_CS3),
+               .length         = SZ_1M,
+               .type           = MT_DEVICE,
+       },
 };
 
 
index d666c621ad064a3811885a792171c1ad82a3e762..4e31118533e692af460338470185cf0576d11aad 100644 (file)
 static struct map_desc smdk2440_iodesc[] __initdata = {
        /* ISA IO Space map (memory space selected by A24) */
 
-       { (u32)S3C24XX_VA_ISA_WORD, S3C2410_CS2, SZ_16M, MT_DEVICE },
-       { (u32)S3C24XX_VA_ISA_BYTE, S3C2410_CS2, SZ_16M, MT_DEVICE },
+       {
+               .virtual        = (u32)S3C24XX_VA_ISA_WORD,
+               .pfn            = __phys_to_pfn(S3C2410_CS2),
+               .length         = 0x10000,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
+               .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
+               .length         = SZ_4M,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
+               .pfn            = __phys_to_pfn(S3C2410_CS2),
+               .length         = 0x10000,
+               .type           = MT_DEVICE,
+       }, {
+               .virtual        = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
+               .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
+               .length         = SZ_4M,
+               .type           = MT_DEVICE,
+       }
 };
 
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
index 4df469bf42e2809b84bddce343728b08af3488af..6288fad0dc4182f9ebd4409b443cce684016c28d 100644 (file)
                strcc   \irqstat, [\base, #GIC_CPU_EOI]
                cmpcs   \irqnr, \irqnr
                .endm
+
+               /* As above, this assumes that irqstat and base are preserved.. */
+
+               .macro test_for_ltirq, irqnr, irqstat, base, tmp
+               bic     \irqnr, \irqstat, #0x1c00
+               mov     \tmp, #0
+               cmp     \irqnr, #29
+               moveq   \tmp, #1
+               streq   \irqstat, [\base, #GIC_CPU_EOI]
+               cmp     \tmp, #0
+               .endm
index ff376494e5b1d2f60de5481258c5e6211c34ae77..c16223c9588d88bf4f96d2ab5d7670d85df9e3d1 100644 (file)
@@ -21,6 +21,9 @@
 
 #include <asm/arch/platform.h>
 
+#define IRQ_LOCALTIMER                 29
+#define IRQ_LOCALWDOG                  30
+
 /* 
  *  IRQ interrupts definitions are the same the INT definitions
  *  held within platform.h
index aef9b36b3c3771d891e5d199a1daf817c8033b1a..18d7c18b738c7941501063283de1061c31a33959 100644 (file)
 #else
 #define REALVIEW_MPCORE_SCU_BASE       0x10100000      /*  SCU registers */
 #define REALVIEW_GIC_CPU_BASE          0x10100100      /* Generic interrupt controller CPU interface */
+#define REALVIEW_TWD_BASE              0x10100700
+#define REALVIEW_TWD_SIZE              0x00000100
 #define REALVIEW_GIC_DIST_BASE         0x10101000      /* Generic interrupt controller distributor */
 #endif
 #define REALVIEW_SMC_BASE             0x10080000       /* SMC */
 #define INT_TSPENINT                   30      /* Touchscreen pen */
 #define INT_TSKPADINT                  31      /* Touchscreen keypad */
 #else
-#define INT_LOCALTIMER                 29
-#define INT_LOCALWDOG                  30
-
 #define INT_AACI                       0
 #define INT_TIMERINT0_1                        1
 #define INT_TIMERINT2_3                        2
index 69a28f96bee2ee14994a11d9fba1516306496534..f31ac92b6c7f1c0f69dc90e861a0bad367ff6c5e 100644 (file)
  * Save the current IRQ state and disable IRQs.  Note that this macro
  * assumes FIQs are enabled, and that the processor is in SVC mode.
  */
-       .macro  save_and_disable_irqs, oldcpsr, temp
+       .macro  save_and_disable_irqs, oldcpsr
        mrs     \oldcpsr, cpsr
-       mov     \temp, #PSR_I_BIT | MODE_SVC
-       msr     cpsr_c, \temp
+#if __LINUX_ARM_ARCH__ >= 6
+       cpsid   i
+#else
+       msr     cpsr_c, #PSR_I_BIT | MODE_SVC
+#endif
        .endm
 
 /*
index cd57436d9874b63bff60165638a9bc70a0abb3b8..05b029ef6371c6203b1471897490bebce8920815 100644 (file)
@@ -11,6 +11,7 @@
 #define ASMARM_MACH_FLASH_H
 
 struct mtd_partition;
+struct mtd_info;
 
 /*
  * map_name:   the map probe function name
@@ -19,6 +20,7 @@ struct mtd_partition;
  * init:       method called at driver/device initialisation
  * exit:       method called at driver/device removal
  * set_vpp:    method called to enable or disable VPP
+ * mmcontrol:  method called to enable or disable Sync. Burst Read in OneNAND
  * parts:      optional array of mtd_partitions for static partitioning
  * nr_parts:   number of mtd_partitions for static partitoning
  */
@@ -29,6 +31,7 @@ struct flash_platform_data {
        int             (*init)(void);
        void            (*exit)(void);
        void            (*set_vpp)(int on);
+       void            (*mmcontrol)(struct mtd_info *mtd, int sync_read);
        struct mtd_partition *parts;
        unsigned int    nr_parts;
 };