Merge branch 'for-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/dvrabel...
authorDavid Vrabel <dv02@dv02pc01.europe.root.pri>
Fri, 10 Oct 2008 10:47:31 +0000 (11:47 +0100)
committerDavid Vrabel <dv02@dv02pc01.europe.root.pri>
Fri, 10 Oct 2008 10:47:31 +0000 (11:47 +0100)
341 files changed:
Documentation/DMA-mapping.txt
Documentation/HOWTO
Documentation/SubmitChecklist
Documentation/cpu-freq/index.txt
Documentation/hwmon/adt7473
Documentation/hwmon/sysfs-interface
Documentation/ioctl/cdrom.txt
Documentation/sysctl/kernel.txt
Documentation/usb/anchors.txt
Documentation/video4linux/CARDLIST.em28xx
Documentation/video4linux/gspca.txt
MAINTAINERS
Makefile
arch/arm/kernel/kgdb.c
arch/arm/mach-davinci/psc.c
arch/arm/mach-pxa/time.c
arch/arm/mach-sa1100/generic.c
arch/arm/mach-sa1100/include/mach/jornada720.h
arch/arm/mach-sa1100/jornada720_ssp.c
arch/arm/mach-versatile/core.c
arch/arm/plat-omap/devices.c
arch/avr32/boards/atstk1000/atstk1002.c
arch/avr32/boot/images/.gitignore [new file with mode: 0644]
arch/avr32/kernel/.gitignore [new file with mode: 0644]
arch/avr32/kernel/avr32_ksyms.c
arch/avr32/kernel/syscall-stubs.S
arch/avr32/kernel/syscall_table.S
arch/avr32/kernel/traps.c
arch/avr32/lib/findbit.S
arch/ia64/include/asm/sections.h
arch/ia64/kernel/efi.c
arch/ia64/kernel/head.S
arch/ia64/kernel/setup.c
arch/ia64/kernel/vmlinux.lds.S
arch/ia64/kvm/kvm-ia64.c
arch/ia64/mm/contig.c
arch/ia64/mm/discontig.c
arch/m32r/Kconfig
arch/m32r/kernel/entry.S
arch/m32r/kernel/head.S
arch/m32r/kernel/irq.c
arch/m32r/kernel/m32r_ksyms.c
arch/m32r/kernel/process.c
arch/m32r/kernel/smp.c
arch/m32r/kernel/time.c
arch/m32r/kernel/traps.c
arch/m32r/lib/delay.c
arch/mips/Kconfig
arch/mips/au1000/common/gpio.c
arch/mips/kernel/Makefile
arch/mips/kernel/cevt-r4k.c
arch/mips/kernel/cevt-smtc.c [new file with mode: 0644]
arch/mips/kernel/cpu-probe.c
arch/mips/kernel/entry.S
arch/mips/kernel/genex.S
arch/mips/kernel/head.S
arch/mips/kernel/kgdb.c
arch/mips/kernel/mips-mt-fpaff.c
arch/mips/kernel/process.c
arch/mips/kernel/ptrace.c
arch/mips/kernel/smtc.c
arch/mips/kernel/traps.c
arch/mips/kernel/vmlinux.lds.S
arch/mips/lib/csum_partial.S
arch/mips/mti-malta/Makefile
arch/mips/mti-malta/malta-smtc.c
arch/mips/pci/Makefile
arch/mips/pci/pci-bcm47xx.c [new file with mode: 0644]
arch/mips/pci/pci-ip27.c
arch/mips/sibyte/swarm/Makefile
arch/mips/sibyte/swarm/platform.c [new file with mode: 0644]
arch/mn10300/kernel/irq.c
arch/mn10300/kernel/time.c
arch/mn10300/unit-asb2303/unit-init.c
arch/mn10300/unit-asb2305/unit-init.c
arch/powerpc/boot/Makefile
arch/powerpc/boot/dts/holly.dts
arch/powerpc/boot/dts/mpc8610_hpcd.dts
arch/powerpc/include/asm/elf.h
arch/powerpc/include/asm/sections.h
arch/powerpc/kernel/idle.c
arch/powerpc/kernel/kgdb.c
arch/powerpc/kernel/module_64.c
arch/powerpc/platforms/fsl_uli1575.c
arch/s390/kernel/time.c
arch/s390/lib/delay.c
arch/sparc64/kernel/irq.c
arch/sparc64/kernel/of_device.c
arch/sparc64/kernel/pci.c
arch/sparc64/kernel/pci_psycho.c
arch/sparc64/kernel/traps.c
arch/x86/boot/compressed/relocs.c
arch/x86/kernel/acpi/boot.c
arch/x86/kernel/amd_iommu.c
arch/x86/kernel/apm_32.c
arch/x86/kernel/cpu/common.c
arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
arch/x86/kernel/cpu/mtrr/main.c
arch/x86/kernel/kdebugfs.c
arch/x86/kernel/kgdb.c
arch/x86/kernel/pci-gart_64.c
arch/x86/kernel/process.c
arch/x86/kernel/process_32.c
arch/x86/kernel/process_64.c
arch/x86/kernel/setup.c
arch/x86/kernel/vmi_32.c
arch/x86/kernel/vsmp_64.c
arch/x86/mm/init_32.c
arch/x86/oprofile/nmi_int.c
arch/x86/xen/setup.c
drivers/accessibility/braille/braille_console.c
drivers/acpi/glue.c
drivers/acpi/sleep/proc.c
drivers/ata/sata_nv.c
drivers/bluetooth/bpa10x.c
drivers/bluetooth/btusb.c
drivers/char/tty_io.c
drivers/clocksource/acpi_pm.c
drivers/dma/dw_dmac.c
drivers/hwmon/abituguru3.c
drivers/hwmon/ad7414.c
drivers/hwmon/atxp1.c
drivers/hwmon/it87.c
drivers/i2c/busses/i2c-powermac.c
drivers/i2c/i2c-dev.c
drivers/ide/Kconfig
drivers/ide/ide-cd.c
drivers/ide/ide-dma.c
drivers/ide/ide-probe.c
drivers/ide/ide-tape.c
drivers/ide/mips/Makefile
drivers/ide/mips/swarm.c [deleted file]
drivers/infiniband/hw/mlx4/qp.c
drivers/infiniband/hw/nes/nes_cm.c
drivers/infiniband/ulp/ipoib/ipoib.h
drivers/infiniband/ulp/ipoib/ipoib_main.c
drivers/infiniband/ulp/ipoib/ipoib_multicast.c
drivers/input/mouse/bcm5974.c
drivers/input/touchscreen/jornada720_ts.c
drivers/leds/leds-fsg.c
drivers/leds/leds-pca955x.c
drivers/md/dm-mpath.c
drivers/md/dm.c
drivers/md/md.c
drivers/media/common/tuners/tuner-xc2028.h
drivers/media/dvb/b2c2/flexcop-fe-tuner.c
drivers/media/dvb/dvb-core/dmxdev.c
drivers/media/dvb/dvb-core/dvb_demux.c
drivers/media/dvb/frontends/s5h1420.c
drivers/media/dvb/frontends/s5h1420.h
drivers/media/dvb/siano/sms-cards.c
drivers/media/video/bt8xx/bttv-driver.c
drivers/media/video/cafe_ccic.c
drivers/media/video/cpia2/cpia2_usb.c
drivers/media/video/cx18/cx18-cards.c
drivers/media/video/em28xx/em28xx-audio.c
drivers/media/video/em28xx/em28xx-cards.c
drivers/media/video/em28xx/em28xx-dvb.c
drivers/media/video/gspca/gspca.c
drivers/media/video/gspca/pac7311.c
drivers/media/video/gspca/sonixb.c
drivers/media/video/gspca/sonixj.c
drivers/media/video/gspca/spca561.c
drivers/media/video/gspca/zc3xx.c
drivers/media/video/ov511.c
drivers/media/video/pvrusb2/pvrusb2-devattr.c
drivers/media/video/s2255drv.c
drivers/media/video/uvc/uvc_ctrl.c
drivers/media/video/w9968cf.c
drivers/media/video/wm8739.c
drivers/media/video/zoran_card.c
drivers/media/video/zoran_driver.c
drivers/mfd/Kconfig
drivers/mfd/asic3.c
drivers/misc/eeepc-laptop.c
drivers/mmc/card/block.c
drivers/mmc/card/mmc_test.c
drivers/mmc/host/atmel-mci.c
drivers/mmc/host/tmio_mmc.h
drivers/net/bnx2.h
drivers/net/e100.c
drivers/net/e1000/e1000_hw.c
drivers/net/e1000e/e1000.h
drivers/net/e1000e/ethtool.c
drivers/net/e1000e/ich8lan.c
drivers/net/e1000e/netdev.c
drivers/net/e1000e/param.c
drivers/net/forcedeth.c
drivers/net/mlx4/mr.c
drivers/net/wireless/ath9k/core.c
drivers/net/wireless/ath9k/core.h
drivers/net/wireless/ath9k/main.c
drivers/net/wireless/ath9k/xmit.c
drivers/net/wireless/zd1211rw/zd_usb.c
drivers/pci/pci-sysfs.c
drivers/pci/pcie/aspm.c
drivers/pci/search.c
drivers/pcmcia/ds.c
drivers/rtc/rtc-dev.c
drivers/s390/cio/ccwgroup.c
drivers/s390/cio/cio.c
drivers/s390/cio/qdio_setup.c
drivers/scsi/qla2xxx/qla_isr.c
drivers/scsi/qla2xxx/qla_os.c
drivers/scsi/qlogicpti.c
drivers/scsi/scsi_lib.c
drivers/serial/atmel_serial.c
drivers/spi/orion_spi.c
drivers/spi/pxa2xx_spi.c
drivers/ssb/main.c
drivers/usb/core/hcd.c
drivers/usb/core/hub.c
drivers/usb/gadget/fsl_usb2_udc.c
drivers/usb/gadget/omap_udc.c
drivers/usb/host/ehci-hcd.c
drivers/usb/host/ehci-sched.c
drivers/usb/musb/Kconfig
drivers/usb/musb/musb_core.c
drivers/usb/musb/omap2430.c
drivers/usb/musb/omap2430.h
drivers/usb/serial/cp2101.c
drivers/usb/serial/ftdi_sio.c
drivers/usb/serial/ftdi_sio.h
drivers/usb/serial/option.c
drivers/usb/serial/sierra.c
drivers/usb/serial/ti_usb_3410_5052.c
drivers/usb/serial/usb-serial.c
drivers/usb/storage/Kconfig
drivers/usb/storage/Makefile
drivers/usb/storage/unusual_devs.h
drivers/usb/storage/usb.c
drivers/video/console/fbcon.c
drivers/video/console/fbcon.h
drivers/watchdog/geodewdt.c
drivers/watchdog/ibmasr.c
drivers/watchdog/pnx4008_wdt.c
drivers/watchdog/rc32434_wdt.c
drivers/watchdog/rdc321x_wdt.c
drivers/watchdog/wdt285.c
fs/9p/vfs_inode.c
fs/dcache.c
fs/exec.c
fs/inotify_user.c
fs/ramfs/file-nommu.c
fs/splice.c
fs/ubifs/debug.c
fs/ubifs/dir.c
fs/ubifs/find.c
fs/ubifs/gc.c
fs/ubifs/super.c
fs/ubifs/tnc.c
fs/xfs/linux-2.6/xfs_aops.c
fs/xfs/linux-2.6/xfs_super.c
fs/xfs/xfs_buf_item.c
fs/xfs/xfs_dfrag.c
fs/xfs/xfs_inode.c
fs/xfs/xfs_log.c
fs/xfs/xfs_log_priv.h
fs/xfs/xfs_vnodeops.c
include/asm-mips/cevt-r4k.h [new file with mode: 0644]
include/asm-mips/irqflags.h
include/asm-mips/mipsregs.h
include/asm-mips/pgtable-32.h
include/asm-mips/smtc.h
include/asm-mips/sn/mapped_kernel.h
include/asm-mips/stackframe.h
include/asm-x86/acpi.h
include/asm-x86/cpufeature.h
include/asm-x86/idle.h
include/asm-x86/kgdb.h
include/asm-x86/uaccess_64.h
include/linux/cnt32_to_63.h [moved from arch/arm/include/asm/cnt32_to_63.h with 87% similarity]
include/linux/hrtimer.h
include/linux/ide.h
include/linux/mlx4/device.h
include/linux/pci.h
include/linux/ramfs.h
include/linux/smb.h
include/linux/stacktrace.h
include/net/9p/9p.h
include/net/9p/transport.h
include/net/sctp/sm.h
init/main.c
kernel/cgroup.c
kernel/exit.c
kernel/hrtimer.c
kernel/kexec.c
kernel/kgdb.c
kernel/posix-timers.c
kernel/sched.c
kernel/sched_rt.c
kernel/time/clockevents.c
kernel/time/tick-broadcast.c
kernel/time/tick-common.c
kernel/time/tick-internal.h
kernel/time/tick-sched.c
kernel/trace/trace_sysprof.c
mm/memcontrol.c
mm/page_alloc.c
mm/page_isolation.c
mm/slob.c
mm/tiny-shmem.c
net/9p/client.c
net/9p/conv.c
net/9p/mod.c
net/9p/trans_fd.c
net/9p/trans_virtio.c
net/ax25/af_ax25.c
net/ax25/ax25_std_timer.c
net/core/dev.c
net/core/rtnetlink.c
net/ipv4/tcp_hybla.c
net/ipv4/tcp_input.c
net/ipv4/tcp_ipv4.c
net/ipv4/udp.c
net/ipv6/netfilter/ip6t_hbh.c
net/ipv6/route.c
net/ipv6/tcp_ipv6.c
net/iucv/iucv.c
net/key/af_key.c
net/netrom/af_netrom.c
net/sctp/associola.c
net/sctp/output.c
net/sctp/sm_make_chunk.c
net/sctp/sm_statefuns.c
net/socket.c
net/xfrm/xfrm_output.c
scripts/kconfig/conf.c
scripts/kconfig/confdata.c
scripts/kernel-doc
scripts/mod/modpost.c
security/selinux/ss/services.c
sound/core/pcm.c
sound/core/pcm_native.c
sound/core/rawmidi.c
sound/pci/hda/patch_sigmatel.c
sound/ppc/awacs.c
sound/soc/at32/at32-pcm.c
sound/soc/codecs/cs4270.c
sound/soc/codecs/wm8753.c

index b463ecd0c7cebf36f53104015afcbeeccf4b934d..c74fec8c2351168d1329c527183f3a975234030e 100644 (file)
@@ -740,7 +740,7 @@ failure can be determined by:
        dma_addr_t dma_handle;
 
        dma_handle = pci_map_single(pdev, addr, size, direction);
-       if (pci_dma_mapping_error(dma_handle)) {
+       if (pci_dma_mapping_error(pdev, dma_handle)) {
                /*
                 * reduce current DMA mapping usage,
                 * delay and try again later or
index c2371c5a98f99b5eaa785bd0affd6c40187e84e3..48a3955f05fcd9c5f7548aadf7557062f1aabdb1 100644 (file)
@@ -77,7 +77,8 @@ documentation files are also added which explain how to use the feature.
 When a kernel change causes the interface that the kernel exposes to
 userspace to change, it is recommended that you send the information or
 a patch to the manual pages explaining the change to the manual pages
-maintainer at mtk.manpages@gmail.com.
+maintainer at mtk.manpages@gmail.com, and CC the list
+linux-api@vger.kernel.org.
 
 Here is a list of files that are in the kernel source tree that are
 required reading:
index da10e0714241fbef07ac394a741e3276723591fb..21f0795af20f1a6a3c34569f10ac05d72e8b75b4 100644 (file)
@@ -67,6 +67,8 @@ kernel patches.
 
 19: All new userspace interfaces are documented in Documentation/ABI/.
     See Documentation/ABI/README for more information.
+    Patches that change userspace interfaces should be CCed to
+    linux-api@vger.kernel.org.
 
 20: Check that it all passes `make headers_check'.
 
index ffdb5323df378b84963e4f91cd1470ff17865b6d..3d0b915035b9f28fbcff7d83a91ef016d4d7b2ad 100644 (file)
@@ -35,11 +35,9 @@ Mailing List
 ------------
 There is a CPU frequency changing CVS commit and general list where
 you can report bugs, problems or submit patches. To post a message,
-send an email to cpufreq@lists.linux.org.uk, to subscribe go to
-http://lists.linux.org.uk/mailman/listinfo/cpufreq. Previous post to the
-mailing list are available to subscribers at
-http://lists.linux.org.uk/mailman/private/cpufreq/.
-
+send an email to cpufreq@vger.kernel.org, to subscribe go to
+http://vger.kernel.org/vger-lists.html#cpufreq and follow the
+instructions there.
 
 Links
 -----
@@ -50,7 +48,7 @@ how to access the CVS repository:
 * http://cvs.arm.linux.org.uk/
 
 the CPUFreq Mailing list:
-* http://lists.linux.org.uk/mailman/listinfo/cpufreq
+* http://vger.kernel.org/vger-lists.html#cpufreq
 
 Clock and voltage scaling for the SA-1100:
 * http://www.lartmaker.nl/projects/scaling
index 2126de34c71161a3e6f22ddbfe082725b01cfc24..1cbf671822e23d063c648984c145149792978c62 100644 (file)
@@ -14,14 +14,14 @@ Description
 
 This driver implements support for the Analog Devices ADT7473 chip family.
 
-The LM85 uses the 2-wire interface compatible with the SMBUS 2.0
+The ADT7473 uses the 2-wire interface compatible with the SMBUS 2.0
 specification. Using an analog to digital converter it measures three (3)
-temperatures and two (2) voltages. It has three (3) 16-bit counters for
+temperatures and two (2) voltages. It has four (4) 16-bit counters for
 measuring fan speed. There are three (3) PWM outputs that can be used
 to control fan speed.
 
 A sophisticated control system for the PWM outputs is designed into the
-LM85 that allows fan speed to be adjusted automatically based on any of the
+ADT7473 that allows fan speed to be adjusted automatically based on any of the
 three temperature sensors. Each PWM output is individually adjustable and
 programmable. Once configured, the ADT7473 will adjust the PWM outputs in
 response to the measured temperatures without further host intervention.
@@ -46,14 +46,6 @@ from the raw value to get the temperature value.
 The Analog Devices datasheet is very detailed and describes a procedure for
 determining an optimal configuration for the automatic PWM control.
 
-Hardware Configurations
------------------------
-
-The ADT7473 chips have an optional SMBALERT output that can be used to
-signal the chipset in case a limit is exceeded or the temperature sensors
-fail. Individual sensor interrupts can be masked so they won't trigger
-SMBALERT. The SMBALERT output if configured replaces the PWM2 function.
-
 Configuration Notes
 -------------------
 
@@ -61,8 +53,8 @@ Besides standard interfaces driver adds the following:
 
 * PWM Control
 
-* pwm#_auto_point1_pwm and pwm#_auto_point1_temp and
-* pwm#_auto_point2_pwm and pwm#_auto_point2_temp -
+* pwm#_auto_point1_pwm and temp#_auto_point1_temp and
+* pwm#_auto_point2_pwm and temp#_auto_point2_temp -
 
 point1: Set the pwm speed at a lower temperature bound.
 point2: Set the pwm speed at a higher temperature bound.
index 2d845730d4e0e81c65ff5ceb5299a79724daf62f..6dbfd5efd991de9f6a69eaa831d1a45634ba5979 100644 (file)
@@ -329,6 +329,10 @@ power[1-*]_average         Average power use
                                Unit: microWatt
                                RO
 
+power[1-*]_average_interval    Power use averaging interval
+                               Unit: milliseconds
+                               RW
+
 power[1-*]_average_highest     Historical average maximum power use
                                Unit: microWatt
                                RO
@@ -353,6 +357,14 @@ power[1-*]_reset_history   Reset input_highest, input_lowest,
                                average_highest and average_lowest.
                                WO
 
+**********
+* Energy *
+**********
+
+energy[1-*]_input              Cumulative energy use
+                               Unit: microJoule
+                               RO
+
 **********
 * Alarms *
 **********
index 62d4af44ec4a2e0a4987d48687dc0bd1d01dcbf0..59df81c8da2b86dd71394ccb85ab34bc1cba4595 100644 (file)
@@ -271,14 +271,14 @@ CDROMCLOSETRAY                    pendant of CDROMEJECT
 
        usage:
 
-         ioctl(fd, CDROMEJECT, 0);
+         ioctl(fd, CDROMCLOSETRAY, 0);
 
        inputs:         none
 
        outputs:        none
 
        error returns:
-         ENOSYS        cd drive not capable of ejecting
+         ENOSYS        cd drive not capable of closing the tray
          EBUSY         other processes are accessing drive, or door is locked
 
        notes:
index 276a7e6378227b5931be236104509fe62da2d4ad..e1ff0d920a5ce48b2a05d8f71584668e2817cf49 100644 (file)
@@ -351,9 +351,10 @@ kernel.  This value defaults to SHMMAX.
 
 softlockup_thresh:
 
-This value can be used to lower the softlockup tolerance
-threshold. The default threshold is 10s.  If a cpu is locked up
-for 10s, the kernel complains.  Valid values are 1-60s.
+This value can be used to lower the softlockup tolerance threshold.  The
+default threshold is 60 seconds.  If a cpu is locked up for 60 seconds,
+the kernel complains.  Valid values are 1-60 seconds.  Setting this
+tunable to zero will disable the softlockup detection altogether.
 
 ==============================================================
 
index 7304bcf5a3062fd58e70cfce160d85cab0dff7d5..5e6b64c20d258dbadf9b46f72f8717779ea05a6c 100644 (file)
@@ -42,9 +42,21 @@ This function kills all URBs associated with an anchor. The URBs
 are called in the reverse temporal order they were submitted.
 This way no data can be reordered.
 
+usb_unlink_anchored_urbs()
+--------------------------
+
+This function unlinks all URBs associated with an anchor. The URBs
+are processed in the reverse temporal order they were submitted.
+This is similar to usb_kill_anchored_urbs(), but it will not sleep.
+Therefore no guarantee is made that the URBs have been unlinked when
+the call returns. They may be unlinked later but will be unlinked in
+finite time.
+
 usb_wait_anchor_empty_timeout()
 -------------------------------
 
 This function waits for all URBs associated with an anchor to finish
 or a timeout, whichever comes first. Its return value will tell you
 whether the timeout was reached.
+
+
index 89c7f32abf9f2d8a43f98dc892b8ca9b8bad9a24..53449cb99b17c71e3714949b090fd2252e7e4492 100644 (file)
@@ -46,7 +46,7 @@
  45 -> Pinnacle PCTV DVB-T                      (em2870)
  46 -> Compro, VideoMate U3                     (em2870)        [185b:2870]
  47 -> KWorld DVB-T 305U                        (em2880)        [eb1a:e305]
- 48 -> KWorld DVB-T 310U                        (em2880)
+ 48 -> KWorld DVB-T 310U                        (em2880)        [eb1a:e310]
  49 -> MSI DigiVox A/D                          (em2880)        [eb1a:e310]
  50 -> MSI DigiVox A/D II                       (em2880)        [eb1a:e320]
  51 -> Terratec Hybrid XS Secam                 (em2880)        [0ccd:004c]
index 0f03900c48fbceac0fe2caf9979c14fc3421fb0f..9a3e4d797fa858d0925e30d64be6c381fe6bae24 100644 (file)
@@ -190,6 +190,7 @@ pac7311             093a:260f       SnakeCam
 pac7311                093a:2621       PAC731x
 pac7311                093a:2624       PAC7302
 pac7311                093a:2626       Labtec 2200
+pac7311                093a:262a       Webcam 300k
 zc3xx          0ac8:0302       Z-star Vimicro zc0302
 vc032x         0ac8:0321       Vimicro generic vc0321
 vc032x         0ac8:0323       Vimicro Vc0323
index 63458274ebde8ee8213db2abac4676a17cb2bc03..4674c64308a4dd11e0cdc83b554f4ebdc4bc348e 100644 (file)
@@ -271,20 +271,20 @@ W:        http://www.lesswatts.org/projects/acpi/
 S:     Supported
 
 ACPI WMI DRIVER
-P:      Carlos Corbacho
-M:      carlos@strangeworlds.co.uk
-L:      linux-acpi@vger.kernel.org
-W:      http://www.lesswatts.org/projects/acpi/
-S:      Maintained
+P:     Carlos Corbacho
+M:     carlos@strangeworlds.co.uk
+L:     linux-acpi@vger.kernel.org
+W:     http://www.lesswatts.org/projects/acpi/
+S:     Maintained
 
 AD1889 ALSA SOUND DRIVER
-P:     Kyle McMartin
-M:     kyle@mcmartin.ca
-P:     Thibaut Varene
-M:     T-Bone@parisc-linux.org
-W:     http://wiki.parisc-linux.org/AD1889
-L:     linux-parisc@vger.kernel.org
-S:     Maintained
+P:     Kyle McMartin
+M:     kyle@mcmartin.ca
+P:     Thibaut Varene
+M:     T-Bone@parisc-linux.org
+W:     http://wiki.parisc-linux.org/AD1889
+L:     linux-parisc@vger.kernel.org
+S:     Maintained
 
 ADM1025 HARDWARE MONITOR DRIVER
 P:     Jean Delvare
@@ -473,11 +473,11 @@ L:        linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
 S:     Maintained
 
 ARM/ATMEL AT91RM9200 ARM ARCHITECTURE
-P:      Andrew Victor
-M:      linux@maxim.org.za
-L:      linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
-W:      http://maxim.org.za/at91_26.html
-S:      Maintained
+P:     Andrew Victor
+M:     linux@maxim.org.za
+L:     linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
+W:     http://maxim.org.za/at91_26.html
+S:     Maintained
 
 ARM/CIRRUS LOGIC EP93XX ARM ARCHITECTURE
 P:     Lennert Buytenhek
@@ -532,10 +532,10 @@ L:        linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
 S:     Maintained
 
 ARM/HP JORNADA 7XX MACHINE SUPPORT
-P:      Kristoffer Ericson
-M:      kristoffer.ericson@gmail.com
-W:      www.jlime.com
-S:      Maintained
+P:     Kristoffer Ericson
+M:     kristoffer.ericson@gmail.com
+W:     www.jlime.com
+S:     Maintained
 
 ARM/INTEL IOP32X ARM ARCHITECTURE
 P:     Lennert Buytenhek
@@ -1017,7 +1017,7 @@ T:        git kernel.org:/pub/scm/linux/kernel/git/mchehab/v4l-dvb.git
 S:     Maintained
 
 CAFE CMOS INTEGRATED CAMERA CONTROLLER DRIVER
-P:     Jonathan Corbet
+P:     Jonathan Corbet
 M:     corbet@lwn.net
 L:     video4linux-list@redhat.com
 S:     Maintained
@@ -1204,9 +1204,7 @@ M:        hpa@zytor.com
 S:     Maintained
 
 CPUSETS
-P:     Paul Jackson
 P:     Paul Menage
-M:     pj@sgi.com
 M:     menage@google.com
 L:     linux-kernel@vger.kernel.org
 W:     http://www.bullopensource.org/cpuset/
@@ -1365,7 +1363,7 @@ P:        Digi International, Inc
 M:     Eng.Linux@digi.com
 L:     Eng.Linux@digi.com
 W:     http://www.digi.com
-S:     Orphaned
+S:     Orphan
 
 DIRECTORY NOTIFICATION
 P:     Stephen Rothwell
@@ -1429,12 +1427,12 @@ L:      linux-acpi@vger.kernel.org
 S:     Supported
 
 DOCUMENTATION (/Documentation directory)
-P:     Michael Kerrisk
-M:     mtk.manpages@gmail.com
-P:     Randy Dunlap
-M:     rdunlap@xenotime.net
-L:     linux-doc@vger.kernel.org
-S:     Maintained
+P:     Michael Kerrisk
+M:     mtk.manpages@gmail.com
+P:     Randy Dunlap
+M:     rdunlap@xenotime.net
+L:     linux-doc@vger.kernel.org
+S:     Maintained
 
 DOUBLETALK DRIVER
 P:     James R. Van Zandt
@@ -1465,7 +1463,7 @@ S:        Maintained
 DVB SUBSYSTEM AND DRIVERS
 P:     LinuxTV.org Project
 M:     v4l-dvb-maintainer@linuxtv.org
-L:     linux-dvb@linuxtv.org (subscription required)
+L:     linux-dvb@linuxtv.org (subscription required)
 W:     http://linuxtv.org/
 T:     git kernel.org:/pub/scm/linux/kernel/git/mchehab/v4l-dvb.git
 S:     Maintained
@@ -1803,7 +1801,7 @@ FUTURE DOMAIN TMC-16x0 SCSI DRIVER (16-bit)
 P:     Rik Faith
 M:     faith@cs.unc.edu
 L:     linux-scsi@vger.kernel.org
-S:     Odd fixes (e.g., new signatures)
+S:     Odd Fixes (e.g., new signatures)
 
 GDT SCSI DISK ARRAY CONTROLLER DRIVER
 P:     Achim Leubner
@@ -1844,10 +1842,10 @@ S:      Maintained
 HARDWARE MONITORING
 L:     lm-sensors@lm-sensors.org
 W:     http://www.lm-sensors.org/
-S:     Orphaned
+S:     Orphan
 
 HARDWARE RANDOM NUMBER GENERATOR CORE
-S:     Orphaned
+S:     Orphan
 
 HARD DRIVE ACTIVE PROTECTION SYSTEM (HDAPS) DRIVER
 P:     Robert Love
@@ -1990,7 +1988,7 @@ S:        Maintained
 I2C/SMBUS STUB DRIVER
 P:     Mark M. Hoffman
 M:     mhoffman@lightlink.com
-L:     lm-sensors@lm-sensors.org
+L:     i2c@lm-sensors.org
 S:     Maintained
 
 I2C SUBSYSTEM
@@ -2114,7 +2112,7 @@ M:        rolandd@cisco.com
 P:     Sean Hefty
 M:     sean.hefty@intel.com
 P:     Hal Rosenstock
-M:     hal.rosenstock@gmail.com 
+M:     hal.rosenstock@gmail.com
 L:     general@lists.openfabrics.org
 W:     http://www.openib.org/
 T:     git kernel.org:/pub/scm/linux/kernel/git/roland/infiniband.git
@@ -2702,17 +2700,18 @@ S:      Maintained
 
 MARVELL YUKON / SYSKONNECT DRIVER
 P:     Mirko Lindner
-M:     mlindner@syskonnect.de
+M:     mlindner@syskonnect.de
 P:     Ralph Roesler
-M:     rroesler@syskonnect.de
-W:     http://www.syskonnect.com
-S:     Supported
+M:     rroesler@syskonnect.de
+W:     http://www.syskonnect.com
+S:     Supported
 
 MAN-PAGES: MANUAL PAGES FOR LINUX -- Sections 2, 3, 4, 5, and 7
 P:     Michael Kerrisk
 M:     mtk.manpages@gmail.com
-W:     http://www.kernel.org/doc/man-pages
-S:     Supported
+W:     http://www.kernel.org/doc/man-pages
+L:     linux-man@vger.kernel.org
+S:     Supported
 
 MARVELL LIBERTAS WIRELESS DRIVER
 P:     Dan Williams
@@ -2741,7 +2740,7 @@ S:        Maintained
 MEGARAID SCSI DRIVERS
 P:     Neela Syam Kolli
 M:     megaraidlinux@lsi.com
-S:     linux-scsi@vger.kernel.org
+L:     linux-scsi@vger.kernel.org
 W:     http://megaraid.lsilogic.com
 S:     Maintained
 
@@ -2859,7 +2858,7 @@ MULTIMEDIA CARD (MMC) ETC. OVER SPI
 P:     David Brownell
 M:     dbrownell@users.sourceforge.net
 L:     linux-kernel@vger.kernel.org
-S:     Odd fixes
+S:     Odd Fixes
 
 MULTISOUND SOUND DRIVER
 P:     Andrew Veliath
@@ -2873,10 +2872,10 @@ L:      linux-kernel@vger.kernel.org
 S:     Maintained
 
 MUSB MULTIPOINT HIGH SPEED DUAL-ROLE CONTROLLER
-P:     Felipe Balbi
-M:     felipe.balbi@nokia.com
-L:     linux-usb@vger.kernel.org
-S:     Maintained
+P:     Felipe Balbi
+M:     felipe.balbi@nokia.com
+L:     linux-usb@vger.kernel.org
+S:     Maintained
 
 MYRICOM MYRI-10G 10GbE DRIVER (MYRI10GE)
 P:     Andrew Gallatin
@@ -2888,7 +2887,7 @@ W:        http://www.myri.com/scs/download-Myri10GE.html
 S:     Supported
 
 NATSEMI ETHERNET DRIVER (DP8381x)
-P:     Tim Hockin
+P:     Tim Hockin
 M:     thockin@hockin.org
 S:     Maintained
 
@@ -3107,7 +3106,7 @@ M:        laforge@gnumonks.org
 S:     Maintained
 
 OMNIVISION OV7670 SENSOR DRIVER
-P:     Jonathan Corbet
+P:     Jonathan Corbet
 M:     corbet@lwn.net
 L:     video4linux-list@redhat.com
 S:     Maintained
@@ -3217,7 +3216,7 @@ T:        git kernel.org:/pub/scm/linux/kernel/git/jbarnes/pci-2.6.git
 S:     Supported
 
 PCI HOTPLUG CORE
-P:     Kristen Carlson Accardi
+P:     Kristen Carlson Accardi
 M:     kristen.c.accardi@intel.com
 S:     Supported
 
@@ -3656,7 +3655,7 @@ M:        jmorris@namei.org
 P:     Eric Paris
 M:     eparis@parisplace.org
 L:     linux-kernel@vger.kernel.org (kernel issues)
-L:     selinux@tycho.nsa.gov (subscribers-only, general discussion)
+L:     selinux@tycho.nsa.gov (subscribers-only, general discussion)
 W:     http://www.nsa.gov/selinux
 S:     Supported
 
@@ -3732,7 +3731,7 @@ S:        Maintained
 SIS 96X I2C/SMBUS DRIVER
 P:     Mark M. Hoffman
 M:     mhoffman@lightlink.com
-L:     lm-sensors@lm-sensors.org
+L:     i2c@lm-sensors.org
 S:     Maintained
 
 SIS FRAMEBUFFER DRIVER
@@ -3774,10 +3773,10 @@ M:      bn@niasdigital.com
 S:     Maintained
 
 SOC-CAMERA V4L2 SUBSYSTEM
-P:     Guennadi Liakhovetski
-M:     g.liakhovetski@gmx.de
-L:     video4linux-list@redhat.com
-S:     Maintained
+P:     Guennadi Liakhovetski
+M:     g.liakhovetski@gmx.de
+L:     video4linux-list@redhat.com
+S:     Maintained
 
 SOFTWARE RAID (Multiple Disks) SUPPORT
 P:     Ingo Molnar
@@ -3839,11 +3838,12 @@ S:      Maintained
 
 SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT
 P:     Liam Girdwood
-M:     liam.girdwood@wolfsonmicro.com
+M:     lrg@slimlogic.co.uk
 P:     Mark Brown
 M:     broonie@opensource.wolfsonmicro.com
 T:     git opensource.wolfsonmicro.com/linux-2.6-asoc
 L:     alsa-devel@alsa-project.org (subscribers-only)
+W:     http://alsa-project.org/main/index.php/ASoC
 S:     Supported
 
 SPI SUBSYSTEM
@@ -3931,7 +3931,7 @@ S:        Maintained
 
 STARMODE RADIO IP (STRIP) PROTOCOL DRIVER
 W:     http://mosquitonet.Stanford.EDU/strip.html
-S:     Unsupported ?
+S:     Orphan
 
 STRADIS MPEG-2 DECODER DRIVER
 P:     Nathan Laredo
@@ -4012,9 +4012,9 @@ T:        git repo.or.cz/linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git
 S:     Maintained
 
 TI FLASH MEDIA INTERFACE DRIVER
-P:      Alex Dubov
-M:      oakad@yahoo.com
-S:      Maintained
+P:     Alex Dubov
+M:     oakad@yahoo.com
+S:     Maintained
 
 TI OMAP MMC INTERFACE DRIVER
 P:     Carlos Aguiar, Anderson Briglia and Syed Khasim
@@ -4166,13 +4166,13 @@ USB BLOCK DRIVER (UB ub)
 P:     Pete Zaitcev
 M:     zaitcev@redhat.com
 L:     linux-kernel@vger.kernel.org
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Supported
 
 USB CDC ETHERNET DRIVER
 P:     Greg Kroah-Hartman
 M:     greg@kroah.com
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Maintained
 W:     http://www.kroah.com/linux-usb/
 
@@ -4199,13 +4199,13 @@ S:      Maintained
 USB EHCI DRIVER
 P:     David Brownell
 M:     dbrownell@users.sourceforge.net
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Odd Fixes
 
 USB ET61X[12]51 DRIVER
 P:     Luca Risolia
 M:     luca.risolia@studio.unibo.it
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 L:     video4linux-list@redhat.com
 W:     http://www.linux-projects.org
 S:     Maintained
@@ -4213,33 +4213,33 @@ S:      Maintained
 USB GADGET/PERIPHERAL SUBSYSTEM
 P:     David Brownell
 M:     dbrownell@users.sourceforge.net
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 W:     http://www.linux-usb.org/gadget
 S:     Maintained
 
 USB HID/HIDBP DRIVERS (USB KEYBOARDS, MICE, REMOTE CONTROLS, ...)
 P:     Jiri Kosina
 M:     jkosina@suse.cz
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 T:     git kernel.org:/pub/scm/linux/kernel/git/jikos/hid.git
 S:     Maintained
 
 USB ISP116X DRIVER
 P:     Olav Kongas
 M:     ok@artecdesign.ee
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Maintained
 
 USB KAWASAKI LSI DRIVER
 P:     Oliver Neukum
 M:     oliver@neukum.name
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Maintained
 
 USB MASS STORAGE DRIVER
 P:     Matthew Dharm
 M:     mdharm-usb@one-eyed-alien.net
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 L:     usb-storage@lists.one-eyed-alien.net
 S:     Maintained
 W:     http://www.one-eyed-alien.net/~mdharm/linux-usb/
@@ -4247,26 +4247,26 @@ W:      http://www.one-eyed-alien.net/~mdharm/linux-usb/
 USB OHCI DRIVER
 P:     David Brownell
 M:     dbrownell@users.sourceforge.net
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Odd Fixes
 
 USB OPTION-CARD DRIVER
 P:     Matthias Urlichs
 M:     smurf@smurf.noris.de
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Maintained
 
 USB OV511 DRIVER
 P:     Mark McClelland
 M:     mmcclell@bigfoot.com
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 W:     http://alpha.dyndns.org/ov511/
 S:     Maintained
 
 USB PEGASUS DRIVER
 P:     Petko Manolov
 M:     petkan@users.sourceforge.net
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 L:     netdev@vger.kernel.org
 W:     http://pegasus2.sourceforge.net/
 S:     Maintained
@@ -4274,13 +4274,13 @@ S:      Maintained
 USB PRINTER DRIVER (usblp)
 P:     Pete Zaitcev
 M:     zaitcev@redhat.com
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Supported
 
 USB RTL8150 DRIVER
 P:     Petko Manolov
 M:     petkan@users.sourceforge.net
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 L:     netdev@vger.kernel.org
 W:     http://pegasus2.sourceforge.net/
 S:     Maintained
@@ -4288,20 +4288,20 @@ S:      Maintained
 USB SE401 DRIVER
 P:     Jeroen Vreeken
 M:     pe1rxq@amsat.org
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 W:     http://www.chello.nl/~j.vreeken/se401/
 S:     Maintained
 
 USB SERIAL BELKIN F5U103 DRIVER
 P:     William Greathouse
 M:     wgreathouse@smva.com
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Maintained
 
 USB SERIAL CYPRESS M8 DRIVER
 P:     Lonnie Mendez
 M:     dignome@gmail.com
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Maintained
 W:     http://geocities.com/i0xox0i
 W:     http://firstlight.net/cvs
@@ -4316,39 +4316,39 @@ USB SERIAL DIGI ACCELEPORT DRIVER
 P:     Peter Berger and Al Borchers
 M:     pberger@brimson.com
 M:     alborchers@steinerpoint.com
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Maintained
 
 USB SERIAL DRIVER
 P:     Greg Kroah-Hartman
 M:     gregkh@suse.de
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Supported
 
 USB SERIAL EMPEG EMPEG-CAR MARK I/II DRIVER
 P:     Gary Brubaker
 M:     xavyer@ix.netcom.com
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Maintained
 
 USB SERIAL KEYSPAN DRIVER
 P:     Greg Kroah-Hartman
 M:     greg@kroah.com
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 W:     http://www.kroah.com/linux/
 S:     Maintained
 
 USB SERIAL WHITEHEAT DRIVER
 P:     Support Department
 M:     support@connecttech.com
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 W:     http://www.connecttech.com
 S:     Supported
 
 USB SN9C1xx DRIVER
 P:     Luca Risolia
 M:     luca.risolia@studio.unibo.it
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 L:     video4linux-list@redhat.com
 W:     http://www.linux-projects.org
 S:     Maintained
@@ -4356,7 +4356,7 @@ S:        Maintained
 USB SUBSYSTEM
 P:     Greg Kroah-Hartman
 M:     gregkh@suse.de
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 W:     http://www.linux-usb.org
 T:     quilt kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/
 S:     Supported
@@ -4364,7 +4364,7 @@ S:        Supported
 USB UHCI DRIVER
 P:     Alan Stern
 M:     stern@rowland.harvard.edu
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 S:     Maintained
 
 USB "USBNET" DRIVER FRAMEWORK
@@ -4385,7 +4385,7 @@ S:        Maintained
 USB W996[87]CF DRIVER
 P:     Luca Risolia
 M:     luca.risolia@studio.unibo.it
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 L:     video4linux-list@redhat.com
 W:     http://www.linux-projects.org
 S:     Maintained
@@ -4399,7 +4399,7 @@ S:        Maintained
 USB ZC0301 DRIVER
 P:     Luca Risolia
 M:     luca.risolia@studio.unibo.it
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 L:     video4linux-list@redhat.com
 W:     http://www.linux-projects.org
 S:     Maintained
@@ -4407,14 +4407,14 @@ S:      Maintained
 USB ZD1201 DRIVER
 P:     Jeroen Vreeken
 M:     pe1rxq@amsat.org
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 W:     http://linux-lc100020.sourceforge.net
 S:     Maintained
 
 USB ZR364XX DRIVER
 P:     Antoine Jacquet
 M:     royale@zerezo.com
-L:      linux-usb@vger.kernel.org
+L:     linux-usb@vger.kernel.org
 L:     video4linux-list@redhat.com
 W:     http://royale.zerezo.com/zr364xx/
 S:     Maintained
index 4ff83ea36c1920e585a63937e9887d703af04089..16e3fbb968a8966bc58570ca117349631e81f2d7 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 6
 SUBLEVEL = 27
-EXTRAVERSION = -rc6
+EXTRAVERSION =
 NAME = Rotary Wombat
 
 # *DOCUMENTATION*
index aaffaecffcd13699dfd0cd51d2eaf61608e4a94d..ba8ccfede964d93a81c061633bd969916d85ebd5 100644 (file)
@@ -111,8 +111,6 @@ int kgdb_arch_handle_exception(int exception_vector, int signo,
        case 'D':
        case 'k':
        case 'c':
-               kgdb_contthread = NULL;
-
                /*
                 * Try to read optional parameter, pc unchanged if no parm.
                 * If this was a compiled breakpoint, we need to move
index 720c48b9ee0404257cd218a3fe26b66a035a653d..aa2fc375a3257fcb4a1e5b8e468dc1af7c494650 100644 (file)
@@ -70,9 +70,6 @@ void davinci_psc_config(unsigned int domain, unsigned int id, char enable)
 {
        u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl, mdstat_mask;
 
-       if (id < 0)
-               return;
-
        mdctl = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + MDCTL + 4 * id);
        if (enable)
                mdctl |= 0x00000003;    /* Enable Module */
index 67e18509d7bfe6103b4d5062a307c0fe12c029e8..b0d6b32654cf622d13a9ac91073a2f1426381d97 100644 (file)
@@ -17,9 +17,9 @@
 #include <linux/interrupt.h>
 #include <linux/clockchips.h>
 #include <linux/sched.h>
+#include <linux/cnt32_to_63.h>
 
 #include <asm/div64.h>
-#include <asm/cnt32_to_63.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 #include <mach/pxa-regs.h>
index 1362994c78aa1ede98cdc4661cb1cb56623378e0..b422526f6d8baa3fb504b23ddc24ffc57f41512e 100644 (file)
@@ -18,9 +18,9 @@
 #include <linux/ioport.h>
 #include <linux/sched.h>       /* just for sched_clock() - funny that */
 #include <linux/platform_device.h>
+#include <linux/cnt32_to_63.h>
 
 #include <asm/div64.h>
-#include <asm/cnt32_to_63.h>
 #include <mach/hardware.h>
 #include <asm/system.h>
 #include <asm/pgtable.h>
index bc120850d313c1ea44e88fa99b76f93f833e6be9..cc6b4bfcecf6625edb3ad2a9b392b64f661db292 100644 (file)
@@ -1,10 +1,10 @@
 /*
  * arch/arm/mach-sa1100/include/mach/jornada720.h
  *
- * This file contains SSP/MCU communication definitions for HP Jornada 710/720/728
+ * SSP/MCU communication definitions for HP Jornada 710/720/728
  *
- * Copyright (C) 2007 Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
- *  Copyright (C) 2000 John Ankcorn <jca@lcs.mit.edu>
+ * Copyright 2007,2008 Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
+ *  Copyright 2000 John Ankcorn <jca@lcs.mit.edu>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -25,3 +25,8 @@
 #define PWMOFF                 0xDF
 #define TXDUMMY                        0x11
 #define ERRORCODE              0x00
+
+extern void jornada_ssp_start(void);
+extern void jornada_ssp_end(void);
+extern int jornada_ssp_inout(u8 byte);
+extern int jornada_ssp_byte(u8 byte);
index 06ea7abd917009401e3bc1e5d0498ec8ed705507..28cf3696797705a3b263f14854675498d279f068 100644 (file)
@@ -21,8 +21,8 @@
 #include <linux/slab.h>
 
 #include <mach/hardware.h>
-#include <asm/hardware/ssp.h>
 #include <mach/jornada720.h>
+#include <asm/hardware/ssp.h>
 
 static DEFINE_SPINLOCK(jornada_ssp_lock);
 static unsigned long jornada_ssp_flags;
@@ -109,12 +109,12 @@ EXPORT_SYMBOL(jornada_ssp_inout);
  * jornada_ssp_start - enable mcu
  *
  */
-int jornada_ssp_start()
+void jornada_ssp_start(void)
 {
        spin_lock_irqsave(&jornada_ssp_lock, jornada_ssp_flags);
        GPCR = GPIO_GPIO25;
        udelay(50);
-       return 0;
+       return;
 };
 EXPORT_SYMBOL(jornada_ssp_start);
 
@@ -122,11 +122,11 @@ EXPORT_SYMBOL(jornada_ssp_start);
  * jornada_ssp_end - disable mcu and turn off lock
  *
  */
-int jornada_ssp_end()
+void jornada_ssp_end(void)
 {
        GPSR = GPIO_GPIO25;
        spin_unlock_irqrestore(&jornada_ssp_lock, jornada_ssp_flags);
-       return 0;
+       return;
 };
 EXPORT_SYMBOL(jornada_ssp_end);
 
index d75e795c893e494b725f4ad177350651e32a60e6..b638f10411e8e27b573f926133e141922512204b 100644 (file)
@@ -28,8 +28,8 @@
 #include <linux/amba/clcd.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
+#include <linux/cnt32_to_63.h>
 
-#include <asm/cnt32_to_63.h>
 #include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/io.h>
index bc1cf30c83e0d36360eab2b64b19309f58c3c90f..01da719a745366309dedb2a78ac17216dbbd342b 100644 (file)
@@ -316,19 +316,6 @@ static inline void omap_init_mmc_conf(const struct omap_mmc_config *mmc_conf)
                                omap_cfg_reg(MMC_DAT3);
                        }
                }
-#if defined(CONFIG_ARCH_OMAP2420)
-               if (mmc_conf->mmc[0].internal_clock) {
-                       /*
-                        * Use internal loop-back in MMC/SDIO
-                        * Module Input Clock selection
-                        */
-                       if (cpu_is_omap24xx()) {
-                               u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
-                               v |= (1 << 24); /* not used in 243x */
-                               omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
-                       }
-               }
-#endif
        }
 
 #ifdef CONFIG_ARCH_OMAP16XX
index ee4c292683e15a698656d22ba8068c89d5c9710b..dfc3443e23aa3df4cb0033c579a5f7a3d4679623 100644 (file)
@@ -325,7 +325,7 @@ static int __init atstk1002_init(void)
 #ifdef CONFIG_BOARD_ATSTK100X_SPI1
        at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
 #endif
-#ifndef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
+#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
        at32_add_device_mci(0, MCI_PDATA);
 #endif
 #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
diff --git a/arch/avr32/boot/images/.gitignore b/arch/avr32/boot/images/.gitignore
new file mode 100644 (file)
index 0000000..64ea9d0
--- /dev/null
@@ -0,0 +1,4 @@
+uImage
+uImage.srec
+vmlinux.cso
+sfdwarf.log
diff --git a/arch/avr32/kernel/.gitignore b/arch/avr32/kernel/.gitignore
new file mode 100644 (file)
index 0000000..c5f676c
--- /dev/null
@@ -0,0 +1 @@
+vmlinux.lds
index 84a7d44edc67e8acc981bb9b76343c747d76ab46..11e310c567a967bee5bb8ad31c13ed4c9a389cd8 100644 (file)
@@ -58,6 +58,7 @@ EXPORT_SYMBOL(find_first_zero_bit);
 EXPORT_SYMBOL(find_next_zero_bit);
 EXPORT_SYMBOL(find_first_bit);
 EXPORT_SYMBOL(find_next_bit);
+EXPORT_SYMBOL(generic_find_next_le_bit);
 EXPORT_SYMBOL(generic_find_next_zero_le_bit);
 
 /* I/O primitives (lib/io-*.S) */
index 890286a1e62b8c88147a4de13575814008a0e77c..673178e235f3a485005ecfd43415f86fad13ab9e 100644 (file)
@@ -109,3 +109,12 @@ __sys_epoll_pwait:
        rcall   sys_epoll_pwait
        sub     sp, -4
        popm    pc
+
+       .global __sys_sync_file_range
+       .type   __sys_sync_file_range,@function
+__sys_sync_file_range:
+       pushm   lr
+       st.w    --sp, ARG6
+       rcall   sys_sync_file_range
+       sub     sp, -4
+       popm    pc
index 478bda4c4a09a9ac57f119b4c8529d970cbc48e2..7ee0057613b3a70789663f604651bdbc319e2551 100644 (file)
@@ -275,7 +275,7 @@ sys_call_table:
        .long   sys_set_robust_list
        .long   sys_get_robust_list     /* 260 */
        .long   __sys_splice
-       .long   sys_sync_file_range
+       .long   __sys_sync_file_range
        .long   sys_tee
        .long   sys_vmsplice
        .long   __sys_epoll_pwait       /* 265 */
index b835c4c0136882e8320ddde56fe14d98d3f1201c..0d987373bc01b6b6424824711903b501294776da 100644 (file)
@@ -116,15 +116,15 @@ asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs)
        switch (ret) {
        case NOTIFY_OK:
        case NOTIFY_STOP:
-               return;
+               break;
        case NOTIFY_BAD:
                die("Fatal Non-Maskable Interrupt", regs, SIGINT);
        default:
+               printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n");
+               nmi_disable();
                break;
        }
-
-       printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n");
-       nmi_disable();
+       nmi_exit();
 }
 
 asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs)
index c6b91dee857c822c507764e1c2a054a3ee02a5ba..997b33b2288a6989aa3bdac94b0417967d7f6208 100644 (file)
@@ -123,6 +123,36 @@ ENTRY(find_next_bit)
        brgt    1b
        retal   r11
 
+ENTRY(generic_find_next_le_bit)
+       lsr     r8, r10, 5
+       sub     r9, r11, r10
+       retle   r11
+
+       lsl     r8, 2
+       add     r12, r8
+       andl    r10, 31, COH
+       breq    1f
+
+       /* offset is not word-aligned. Handle the first (32 - r10) bits */
+       ldswp.w r8, r12[0]
+       sub     r12, -4
+       lsr     r8, r8, r10
+       brne    .L_found
+
+       /* r9 = r9 - (32 - r10) = r9 + r10 - 32 */
+       add     r9, r10
+       sub     r9, 32
+       retle   r11
+
+       /* Main loop. offset must be word-aligned */
+1:     ldswp.w r8, r12[0]
+       cp.w    r8, 0
+       brne    .L_found
+       sub     r12, -4
+       sub     r9, 32
+       brgt    1b
+       retal   r11
+
 ENTRY(generic_find_next_zero_le_bit)
        lsr     r8, r10, 5
        sub     r9, r11, r10
index f6679989103689c24f01315b8f1e41c078b79ce2..1a873b36a4a1cd75f94bb196f1a7997d9ef621f3 100644 (file)
@@ -11,6 +11,9 @@
 #include <asm-generic/sections.h>
 
 extern char __per_cpu_start[], __per_cpu_end[], __phys_per_cpu_start[];
+#ifdef CONFIG_SMP
+extern char __cpu0_per_cpu[];
+#endif
 extern char __start___vtop_patchlist[], __end___vtop_patchlist[];
 extern char __start___rse_patchlist[], __end___rse_patchlist[];
 extern char __start___mckinley_e9_bundles[], __end___mckinley_e9_bundles[];
index d45f215bc8fce2ee175d018c8298a506437eb0be..51b75cea701866629449f7945ddef10079faa7ab 100644 (file)
@@ -1232,9 +1232,10 @@ efi_initialize_iomem_resources(struct resource *code_resource,
                                if (md->attribute & EFI_MEMORY_WP) {
                                        name = "System ROM";
                                        flags |= IORESOURCE_READONLY;
-                               } else {
+                               } else if (md->attribute == EFI_MEMORY_UC)
+                                       name = "Uncached RAM";
+                               else
                                        name = "System RAM";
-                               }
                                break;
 
                        case EFI_ACPI_MEMORY_NVS:
index 8bdea8eb62e366abc0350bd53261146d445ab41a..66e491d8baac3130a4dd68581662395b94a951b4 100644 (file)
@@ -367,16 +367,17 @@ start_ap:
        ;;
 #else
 (isAP) br.few 2f
-       mov r20=r19
-       sub r19=r19,r18
+       movl r20=__cpu0_per_cpu
        ;;
        shr.u r18=r18,3
 1:
-       ld8 r21=[r20],8;;
-       st8[r19]=r21,8
+       ld8 r21=[r19],8;;
+       st8[r20]=r21,8
        adds r18=-1,r18;;
        cmp4.lt p7,p6=0,r18
 (p7)   br.cond.dptk.few 1b
+       mov r19=r20
+       ;;
 2:
 #endif
        tpa r19=r19
index c27d5b2c182b4c7edd4de5609ce2a2c856a55ddb..de636b215677e801c23076d74f6d5a2d29e68efb 100644 (file)
@@ -616,7 +616,9 @@ setup_arch (char **cmdline_p)
                ia64_mca_init();
 
        platform_setup(cmdline_p);
+#ifndef CONFIG_IA64_HP_SIM
        check_sal_cache_flush();
+#endif
        paging_init();
 }
 
index de71da811cd68de596ed1c88b0cdcb6b2a714c29..10a7d47e8510b47fc4ce18ef4a385718d269bb1e 100644 (file)
@@ -215,9 +215,6 @@ SECTIONS
   /* Per-cpu data: */
   percpu : { } :percpu
   . = ALIGN(PERCPU_PAGE_SIZE);
-#ifdef CONFIG_SMP
-  . = . + PERCPU_PAGE_SIZE;    /* cpu0 per-cpu space */
-#endif
   __phys_per_cpu_start = .;
   .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
        {
@@ -233,6 +230,11 @@ SECTIONS
   data : { } :data
   .data : AT(ADDR(.data) - LOAD_OFFSET)
        {
+#ifdef CONFIG_SMP
+  . = ALIGN(PERCPU_PAGE_SIZE);
+               __cpu0_per_cpu = .;
+  . = . + PERCPU_PAGE_SIZE;    /* cpu0 per-cpu space */
+#endif
                DATA_DATA
                *(.data1)
                *(.gnu.linkonce.d*)
index 7a37d06376be893799fa2bfdb30311251a3edbeb..cd0d1a7284b78afbe673424b4463d3f6463621de 100644 (file)
@@ -38,6 +38,7 @@
 #include <asm/cacheflush.h>
 #include <asm/div64.h>
 #include <asm/tlb.h>
+#include <asm/elf.h>
 
 #include "misc.h"
 #include "vti.h"
@@ -61,12 +62,6 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
        { NULL }
 };
 
-
-struct fdesc{
-    unsigned long ip;
-    unsigned long gp;
-};
-
 static void kvm_flush_icache(unsigned long start, unsigned long len)
 {
        int l;
index e566ff43884afcd97b17ff8bb71ebd95deda9ee6..0ee085efbe29eeedae56194dc1f167cf38d91ac6 100644 (file)
@@ -163,7 +163,7 @@ per_cpu_init (void)
         * get_zeroed_page().
         */
        if (first_time) {
-               void *cpu0_data = __phys_per_cpu_start - PERCPU_PAGE_SIZE;
+               void *cpu0_data = __cpu0_per_cpu;
 
                first_time=0;
 
index 78026aabaa7f03671d8b62d304d28d02c3817746..d8c5fcd89e5bf4aa2fc07611708ff0c1c8a55b74 100644 (file)
@@ -144,7 +144,7 @@ static void *per_cpu_node_setup(void *cpu_data, int node)
 
        for_each_possible_early_cpu(cpu) {
                if (cpu == 0) {
-                       void *cpu0_data = __phys_per_cpu_start - PERCPU_PAGE_SIZE;
+                       void *cpu0_data = __cpu0_per_cpu;
                        __per_cpu_offset[cpu] = (char*)cpu0_data -
                                __per_cpu_start;
                } else if (node == node_cpuid[cpu].nid) {
index a5f864c445b2fe1a28f511dd2c033e4430fc0814..f57113f1f892b091e7439ee18448459b6df25678 100644 (file)
@@ -216,10 +216,6 @@ config MEMORY_SIZE
        default "01000000" if PLAT_M32104UT
        default "00800000" if PLAT_OAKS32R
 
-config NOHIGHMEM
-       bool
-       default y
-
 config ARCH_DISCONTIGMEM_ENABLE
        bool "Internal RAM Support"
        depends on CHIP_M32700 || CHIP_M32102 || CHIP_VDEC2 || CHIP_OPSP || CHIP_M32104
@@ -410,11 +406,7 @@ config PCI_DIRECT
 source "drivers/pci/Kconfig"
 
 config ISA
-       bool "ISA support"
-       help
-         Find out whether you have ISA slots on your motherboard.  ISA is the
-         name of a bus system, i.e. the way the CPU talks to the other stuff
-         inside your box.  If you have ISA, say Y, otherwise N.
+       bool
 
 source "drivers/pcmcia/Kconfig"
 
index d4eaa2fd1818fea9b90e7c8bbdbe2bd7757ca99b..612d35b082a6826d59dda272612df7d295fa2e8c 100644 (file)
@@ -143,7 +143,7 @@ ret_from_intr:
        and3    r4, r4, #0x8000         ; check BSM bit
 #endif
        beqz    r4, resume_kernel
-ENTRY(resume_userspace)
+resume_userspace:
        DISABLE_INTERRUPTS(r4)          ; make sure we don't miss an interrupt
                                        ; setting need_resched or sigpending
                                        ; between sampling and the iret
index dab7436d7bbe85e2997c18b43b5082e4eece4255..40180778a5c723e069cfc96739a0600f10b6e02b 100644 (file)
@@ -29,7 +29,6 @@ __INITDATA
        .global _end
 ENTRY(stext)
 ENTRY(_stext)
-ENTRY(startup_32)
        /* Setup up the stack pointer */
        LDIMM   (r0, spi_stack_top)
        LDIMM   (r1, spu_stack_top)
index d0c5b0b7da2f0f571fa8e37c44b5f1a41ac5f363..2aeae4670098245f7072ca69b4e732955e4d25d5 100644 (file)
@@ -22,9 +22,6 @@
 #include <linux/module.h>
 #include <asm/uaccess.h>
 
-atomic_t irq_err_count;
-atomic_t irq_mis_count;
-
 /*
  * Generic, controller-independent functions:
  */
@@ -63,9 +60,6 @@ int show_interrupts(struct seq_file *p, void *v)
                seq_putc(p, '\n');
 skip:
                spin_unlock_irqrestore(&irq_desc[i].lock, flags);
-       } else if (i == NR_IRQS) {
-               seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
-               seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
        }
        return 0;
 }
index 16bcb189a38319c0831dc0dd6fc1fa505eedc64d..22624b51d4d3ecf3222ce82de0464719bb731d49 100644 (file)
@@ -14,6 +14,7 @@
 #include <asm/delay.h>
 #include <asm/irq.h>
 #include <asm/tlbflush.h>
+#include <asm/pgtable.h>
 
 /* platform dependent support */
 EXPORT_SYMBOL(boot_cpu_data);
@@ -65,6 +66,7 @@ EXPORT_SYMBOL(memset);
 EXPORT_SYMBOL(copy_page);
 EXPORT_SYMBOL(clear_page);
 EXPORT_SYMBOL(strlen);
+EXPORT_SYMBOL(empty_zero_page);
 
 EXPORT_SYMBOL(_inb);
 EXPORT_SYMBOL(_inw);
index a689e2978b6e382bdad4f9fcd56fbf194a1ddb6f..5be4faaf5b1c49c03391bb298e6f83122d6d88ab 100644 (file)
@@ -35,8 +35,6 @@
 
 #include <linux/err.h>
 
-static int hlt_counter=0;
-
 /*
  * Return saved PC of a blocked thread.
  */
@@ -48,31 +46,16 @@ unsigned long thread_saved_pc(struct task_struct *tsk)
 /*
  * Powermanagement idle function, if any..
  */
-void (*pm_idle)(void) = NULL;
-EXPORT_SYMBOL(pm_idle);
+static void (*pm_idle)(void) = NULL;
 
 void (*pm_power_off)(void) = NULL;
 EXPORT_SYMBOL(pm_power_off);
 
-void disable_hlt(void)
-{
-       hlt_counter++;
-}
-
-EXPORT_SYMBOL(disable_hlt);
-
-void enable_hlt(void)
-{
-       hlt_counter--;
-}
-
-EXPORT_SYMBOL(enable_hlt);
-
 /*
  * We use this is we don't have any better
  * idle routine..
  */
-void default_idle(void)
+static void default_idle(void)
 {
        /* M32R_FIXME: Please use "cpu_sleep" mode.  */
        cpu_relax();
@@ -260,15 +243,6 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long spu,
        return 0;
 }
 
-/*
- * Capture the user space registers if the task is not running (in user space)
- */
-int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
-{
-       /* M32R_FIXME */
-       return 1;
-}
-
 asmlinkage int sys_fork(unsigned long r0, unsigned long r1, unsigned long r2,
        unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6,
        struct pt_regs regs)
index 7577f971ea4e3360d37ced6a7fa5f5ef1c401cec..929e5c9d3ad9c6467a5b28d24cd039a9597f1bc0 100644 (file)
@@ -84,7 +84,7 @@ void smp_send_timer(void);
 void smp_ipi_timer_interrupt(struct pt_regs *);
 void smp_local_timer_interrupt(void);
 
-void send_IPI_allbutself(int, int);
+static void send_IPI_allbutself(int, int);
 static void send_IPI_mask(cpumask_t, int, int);
 unsigned long send_IPI_mask_phys(cpumask_t, int, int);
 
@@ -722,7 +722,7 @@ void smp_local_timer_interrupt(void)
  * ---------- --- --------------------------------------------------------
  *
  *==========================================================================*/
-void send_IPI_allbutself(int ipi_num, int try)
+static void send_IPI_allbutself(int ipi_num, int try)
 {
        cpumask_t cpumask;
 
index 994cc15563558b03cd8c6aef4deff3d74424779a..6ea017727cced935c638a876dc193e7ef4e3288e 100644 (file)
@@ -34,7 +34,6 @@
 #include <asm/hw_irq.h>
 
 #ifdef CONFIG_SMP
-extern void send_IPI_allbutself(int, int);
 extern void smp_local_timer_interrupt(void);
 #endif
 
@@ -188,7 +187,7 @@ static long last_rtc_update = 0;
  * timer_interrupt() needs to keep up the real-time clock,
  * as well as call the "do_timer()" routine every clocktick
  */
-irqreturn_t timer_interrupt(int irq, void *dev_id)
+static irqreturn_t timer_interrupt(int irq, void *dev_id)
 {
 #ifndef CONFIG_SMP
        profile_tick(CPU_PROFILING);
@@ -228,7 +227,7 @@ irqreturn_t timer_interrupt(int irq, void *dev_id)
        return IRQ_HANDLED;
 }
 
-struct irqaction irq0 = {
+static struct irqaction irq0 = {
        .handler = timer_interrupt,
        .flags = IRQF_DISABLED,
        .mask = CPU_MASK_NONE,
index 46159a4e644b81f8bf0191641ac4fecfc58b0f82..03b14e55cd894791ab25e25fb5bfbc8827baf140 100644 (file)
@@ -61,7 +61,7 @@ extern unsigned long  eit_vector[];
        ((unsigned long)func - (unsigned long)eit_vector - entry*4)/4 \
        + 0xff000000UL
 
-void   set_eit_vector_entries(void)
+static void set_eit_vector_entries(void)
 {
        extern void default_eit_handler(void);
        extern void system_call(void);
@@ -121,9 +121,9 @@ void __init trap_init(void)
        cpu_init();
 }
 
-int kstack_depth_to_print = 24;
+static int kstack_depth_to_print = 24;
 
-void show_trace(struct task_struct *task, unsigned long *stack)
+static void show_trace(struct task_struct *task, unsigned long *stack)
 {
        unsigned long addr;
 
@@ -224,7 +224,7 @@ bad:
        printk("\n");
 }
 
-DEFINE_SPINLOCK(die_lock);
+static DEFINE_SPINLOCK(die_lock);
 
 void die(const char * str, struct pt_regs * regs, long err)
 {
index 59bfc34e0d9f8aa86ded52d4145592af889aec1f..ced549be80f5e9055528918394caaeca6d04270f 100644 (file)
@@ -6,6 +6,7 @@
  */
 
 #include <linux/param.h>
+#include <linux/module.h>
 #ifdef CONFIG_SMP
 #include <linux/sched.h>
 #include <asm/current.h>
@@ -121,3 +122,4 @@ void __ndelay(unsigned long nsecs)
 {
        __const_udelay(nsecs * 0x00005);  /* 2**32 / 1000000000 (rounded up) */
 }
+EXPORT_SYMBOL(__ndelay);
index 49896a2a1d722e0760a866487f8b80b7d8af8fb0..1e06d233fa8310eaf77acfde003cbf8cd346fc54 100644 (file)
@@ -211,6 +211,7 @@ config MIPS_MALTA
        select SYS_SUPPORTS_64BIT_KERNEL
        select SYS_SUPPORTS_BIG_ENDIAN
        select SYS_SUPPORTS_LITTLE_ENDIAN
+       select SYS_SUPPORTS_MIPS_CMP if BROKEN  # because SYNC_R4K is broken
        select SYS_SUPPORTS_MULTITHREADING
        select SYS_SUPPORTS_SMARTMIPS
        help
@@ -1403,7 +1404,6 @@ config MIPS_MT_SMTC
        depends on CPU_MIPS32_R2
        #depends on CPU_MIPS64_R2               # once there is hardware ...
        depends on SYS_SUPPORTS_MULTITHREADING
-       select GENERIC_CLOCKEVENTS_BROADCAST
        select CPU_MIPSR2_IRQ_VI
        select CPU_MIPSR2_IRQ_EI
        select MIPS_MT
@@ -1451,32 +1451,17 @@ config MIPS_VPE_LOADER
          Includes a loader for loading an elf relocatable object
          onto another VPE and running it.
 
-config MIPS_MT_SMTC_INSTANT_REPLAY
-       bool "Low-latency Dispatch of Deferred SMTC IPIs"
-       depends on MIPS_MT_SMTC && !PREEMPT
-       default y
-       help
-         SMTC pseudo-interrupts between TCs are deferred and queued
-         if the target TC is interrupt-inhibited (IXMT). In the first
-         SMTC prototypes, these queued IPIs were serviced on return
-         to user mode, or on entry into the kernel idle loop. The
-         INSTANT_REPLAY option dispatches them as part of local_irq_restore()
-         processing, which adds runtime overhead (hence the option to turn
-         it off), but ensures that IPIs are handled promptly even under
-         heavy I/O interrupt load.
-
 config MIPS_MT_SMTC_IM_BACKSTOP
        bool "Use per-TC register bits as backstop for inhibited IM bits"
        depends on MIPS_MT_SMTC
-       default y
+       default n
        help
          To support multiple TC microthreads acting as "CPUs" within
          a VPE, VPE-wide interrupt mask bits must be specially manipulated
          during interrupt handling. To support legacy drivers and interrupt
          controller management code, SMTC has a "backstop" to track and
          if necessary restore the interrupt mask. This has some performance
-         impact on interrupt service overhead. Disable it only if you know
-         what you are doing.
+         impact on interrupt service overhead.
 
 config MIPS_MT_SMTC_IRQAFF
        bool "Support IRQ affinity API"
@@ -1486,10 +1471,8 @@ config MIPS_MT_SMTC_IRQAFF
          Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.)
          for SMTC Linux kernel. Requires platform support, of which
          an example can be found in the MIPS kernel i8259 and Malta
-         platform code.  It is recommended that MIPS_MT_SMTC_INSTANT_REPLAY
-         be enabled if MIPS_MT_SMTC_IRQAFF is used. Adds overhead to
-         interrupt dispatch, and should be used only if you know what
-         you are doing.
+         platform code.  Adds some overhead to interrupt dispatch, and
+         should be used only if you know what you are doing.
 
 config MIPS_VPE_LOADER_TOM
        bool "Load VPE program into memory hidden from linux"
@@ -1517,6 +1500,18 @@ config MIPS_APSP_KSPD
          "exit" syscall notifying other kernel modules the SP program is
          exiting.  You probably want to say yes here.
 
+config MIPS_CMP
+       bool "MIPS CMP framework support"
+       depends on SYS_SUPPORTS_MIPS_CMP
+       select SYNC_R4K if BROKEN
+       select SYS_SUPPORTS_SMP
+       select SYS_SUPPORTS_SCHED_SMT if SMP
+       select WEAK_ORDERING
+       default n
+       help
+         This is a placeholder option for the GCMP work. It will need to
+         be handled differently...
+
 config SB1_PASS_1_WORKAROUNDS
        bool
        depends on CPU_SB1_PASS_1
@@ -1693,6 +1688,9 @@ config SMP
 config SMP_UP
        bool
 
+config SYS_SUPPORTS_MIPS_CMP
+       bool
+
 config SYS_SUPPORTS_SMP
        bool
 
@@ -1740,17 +1738,6 @@ config NR_CPUS
          performance should round up your number of processors to the next
          power of two.
 
-config MIPS_CMP
-       bool "MIPS CMP framework support"
-       depends on SMP
-       select SYNC_R4K
-       select SYS_SUPPORTS_SCHED_SMT
-       select WEAK_ORDERING
-       default n
-       help
-         This is a placeholder option for the GCMP work. It will need to
-         be handled differently...
-
 source "kernel/time/Kconfig"
 
 #
index b485d94ce8a5055d4e28b35f8dec1c7fc3b2af9e..e660ddd611c465dc6665ecf7d1346f82a5e77b98 100644 (file)
@@ -48,7 +48,7 @@ static void au1xxx_gpio2_write(unsigned gpio, int value)
 {
        gpio -= AU1XXX_GPIO_BASE;
 
-       gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | (value << gpio);
+       gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | ((!!value) << gpio);
 }
 
 static int au1xxx_gpio2_direction_input(unsigned gpio)
@@ -61,7 +61,8 @@ static int au1xxx_gpio2_direction_input(unsigned gpio)
 static int au1xxx_gpio2_direction_output(unsigned gpio, int value)
 {
        gpio -= AU1XXX_GPIO_BASE;
-       gpio2->dir = (0x01 << gpio) | (value << gpio);
+       gpio2->dir |= 0x01 << gpio;
+       gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | ((!!value) << gpio);
        return 0;
 }
 
@@ -90,6 +91,7 @@ static int au1xxx_gpio1_direction_input(unsigned gpio)
 static int au1xxx_gpio1_direction_output(unsigned gpio, int value)
 {
        gpio1->trioutclr = (0x01 & gpio);
+       au1xxx_gpio1_write(gpio, value);
        return 0;
 }
 
index 706f9397479770265d69b0307df9d76ea3739178..25775cb54000dd3871673c512e43cf59398c6461 100644 (file)
@@ -10,6 +10,7 @@ obj-y         += cpu-probe.o branch.o entry.o genex.o irq.o process.o \
 
 obj-$(CONFIG_CEVT_BCM1480)     += cevt-bcm1480.o
 obj-$(CONFIG_CEVT_R4K)         += cevt-r4k.o
+obj-$(CONFIG_MIPS_MT_SMTC)     += cevt-smtc.o
 obj-$(CONFIG_CEVT_DS1287)      += cevt-ds1287.o
 obj-$(CONFIG_CEVT_GT641XX)     += cevt-gt641xx.o
 obj-$(CONFIG_CEVT_SB1250)      += cevt-sb1250.o
index 24a2d907aa0de4c022c0d5e89227dceae2a8a572..4a4c59f2737a5d0bcdc8fc48f4f8e28ea217f528 100644 (file)
 
 #include <asm/smtc_ipi.h>
 #include <asm/time.h>
+#include <asm/cevt-r4k.h>
+
+/*
+ * The SMTC Kernel for the 34K, 1004K, et. al. replaces several
+ * of these routines with SMTC-specific variants.
+ */
+
+#ifndef CONFIG_MIPS_MT_SMTC
 
 static int mips_next_event(unsigned long delta,
                            struct clock_event_device *evt)
@@ -19,60 +27,27 @@ static int mips_next_event(unsigned long delta,
        unsigned int cnt;
        int res;
 
-#ifdef CONFIG_MIPS_MT_SMTC
-       {
-       unsigned long flags, vpflags;
-       local_irq_save(flags);
-       vpflags = dvpe();
-#endif
        cnt = read_c0_count();
        cnt += delta;
        write_c0_compare(cnt);
        res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0;
-#ifdef CONFIG_MIPS_MT_SMTC
-       evpe(vpflags);
-       local_irq_restore(flags);
-       }
-#endif
        return res;
 }
 
-static void mips_set_mode(enum clock_event_mode mode,
-                          struct clock_event_device *evt)
+#endif /* CONFIG_MIPS_MT_SMTC */
+
+void mips_set_clock_mode(enum clock_event_mode mode,
+                               struct clock_event_device *evt)
 {
        /* Nothing to do ...  */
 }
 
-static DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device);
-static int cp0_timer_irq_installed;
+DEFINE_PER_CPU(struct clock_event_device, mips_clockevent_device);
+int cp0_timer_irq_installed;
 
-/*
- * Timer ack for an R4k-compatible timer of a known frequency.
- */
-static void c0_timer_ack(void)
-{
-       write_c0_compare(read_c0_compare());
-}
+#ifndef CONFIG_MIPS_MT_SMTC
 
-/*
- * Possibly handle a performance counter interrupt.
- * Return true if the timer interrupt should not be checked
- */
-static inline int handle_perf_irq(int r2)
-{
-       /*
-        * The performance counter overflow interrupt may be shared with the
-        * timer interrupt (cp0_perfcount_irq < 0). If it is and a
-        * performance counter has overflowed (perf_irq() == IRQ_HANDLED)
-        * and we can't reliably determine if a counter interrupt has also
-        * happened (!r2) then don't check for a timer interrupt.
-        */
-       return (cp0_perfcount_irq < 0) &&
-               perf_irq() == IRQ_HANDLED &&
-               !r2;
-}
-
-static irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
+irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
 {
        const int r2 = cpu_has_mips_r2;
        struct clock_event_device *cd;
@@ -93,12 +68,8 @@ static irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
         * interrupt.  Being the paranoiacs we are we check anyway.
         */
        if (!r2 || (read_c0_cause() & (1 << 30))) {
-               c0_timer_ack();
-#ifdef CONFIG_MIPS_MT_SMTC
-               if (cpu_data[cpu].vpe_id)
-                       goto out;
-               cpu = 0;
-#endif
+               /* Clear Count/Compare Interrupt */
+               write_c0_compare(read_c0_compare());
                cd = &per_cpu(mips_clockevent_device, cpu);
                cd->event_handler(cd);
        }
@@ -107,65 +78,16 @@ out:
        return IRQ_HANDLED;
 }
 
-static struct irqaction c0_compare_irqaction = {
+#endif /* Not CONFIG_MIPS_MT_SMTC */
+
+struct irqaction c0_compare_irqaction = {
        .handler = c0_compare_interrupt,
-#ifdef CONFIG_MIPS_MT_SMTC
-       .flags = IRQF_DISABLED,
-#else
        .flags = IRQF_DISABLED | IRQF_PERCPU,
-#endif
        .name = "timer",
 };
 
-#ifdef CONFIG_MIPS_MT_SMTC
-DEFINE_PER_CPU(struct clock_event_device, smtc_dummy_clockevent_device);
-
-static void smtc_set_mode(enum clock_event_mode mode,
-                          struct clock_event_device *evt)
-{
-}
-
-static void mips_broadcast(cpumask_t mask)
-{
-       unsigned int cpu;
-
-       for_each_cpu_mask(cpu, mask)
-               smtc_send_ipi(cpu, SMTC_CLOCK_TICK, 0);
-}
-
-static void setup_smtc_dummy_clockevent_device(void)
-{
-       //uint64_t mips_freq = mips_hpt_^frequency;
-       unsigned int cpu = smp_processor_id();
-       struct clock_event_device *cd;
 
-       cd = &per_cpu(smtc_dummy_clockevent_device, cpu);
-
-       cd->name                = "SMTC";
-       cd->features            = CLOCK_EVT_FEAT_DUMMY;
-
-       /* Calculate the min / max delta */
-       cd->mult        = 0; //div_sc((unsigned long) mips_freq, NSEC_PER_SEC, 32);
-       cd->shift               = 0; //32;
-       cd->max_delta_ns        = 0; //clockevent_delta2ns(0x7fffffff, cd);
-       cd->min_delta_ns        = 0; //clockevent_delta2ns(0x30, cd);
-
-       cd->rating              = 200;
-       cd->irq                 = 17; //-1;
-//     if (cpu)
-//             cd->cpumask     = CPU_MASK_ALL; // cpumask_of_cpu(cpu);
-//     else
-               cd->cpumask     = cpumask_of_cpu(cpu);
-
-       cd->set_mode            = smtc_set_mode;
-
-       cd->broadcast           = mips_broadcast;
-
-       clockevents_register_device(cd);
-}
-#endif
-
-static void mips_event_handler(struct clock_event_device *dev)
+void mips_event_handler(struct clock_event_device *dev)
 {
 }
 
@@ -177,7 +99,23 @@ static int c0_compare_int_pending(void)
        return (read_c0_cause() >> cp0_compare_irq) & 0x100;
 }
 
-static int c0_compare_int_usable(void)
+/*
+ * Compare interrupt can be routed and latched outside the core,
+ * so a single execution hazard barrier may not be enough to give
+ * it time to clear as seen in the Cause register.  4 time the
+ * pipeline depth seems reasonably conservative, and empirically
+ * works better in configurations with high CPU/bus clock ratios.
+ */
+
+#define compare_change_hazard() \
+       do { \
+               irq_disable_hazard(); \
+               irq_disable_hazard(); \
+               irq_disable_hazard(); \
+               irq_disable_hazard(); \
+       } while (0)
+
+int c0_compare_int_usable(void)
 {
        unsigned int delta;
        unsigned int cnt;
@@ -187,7 +125,7 @@ static int c0_compare_int_usable(void)
         */
        if (c0_compare_int_pending()) {
                write_c0_compare(read_c0_count());
-               irq_disable_hazard();
+               compare_change_hazard();
                if (c0_compare_int_pending())
                        return 0;
        }
@@ -196,7 +134,7 @@ static int c0_compare_int_usable(void)
                cnt = read_c0_count();
                cnt += delta;
                write_c0_compare(cnt);
-               irq_disable_hazard();
+               compare_change_hazard();
                if ((int)(read_c0_count() - cnt) < 0)
                    break;
                /* increase delta if the timer was already expired */
@@ -205,11 +143,12 @@ static int c0_compare_int_usable(void)
        while ((int)(read_c0_count() - cnt) <= 0)
                ;       /* Wait for expiry  */
 
+       compare_change_hazard();
        if (!c0_compare_int_pending())
                return 0;
 
        write_c0_compare(read_c0_count());
-       irq_disable_hazard();
+       compare_change_hazard();
        if (c0_compare_int_pending())
                return 0;
 
@@ -219,6 +158,8 @@ static int c0_compare_int_usable(void)
        return 1;
 }
 
+#ifndef CONFIG_MIPS_MT_SMTC
+
 int __cpuinit mips_clockevent_init(void)
 {
        uint64_t mips_freq = mips_hpt_frequency;
@@ -229,17 +170,6 @@ int __cpuinit mips_clockevent_init(void)
        if (!cpu_has_counter || !mips_hpt_frequency)
                return -ENXIO;
 
-#ifdef CONFIG_MIPS_MT_SMTC
-       setup_smtc_dummy_clockevent_device();
-
-       /*
-        * On SMTC we only register VPE0's compare interrupt as clockevent
-        * device.
-        */
-       if (cpu)
-               return 0;
-#endif
-
        if (!c0_compare_int_usable())
                return -ENXIO;
 
@@ -265,13 +195,9 @@ int __cpuinit mips_clockevent_init(void)
 
        cd->rating              = 300;
        cd->irq                 = irq;
-#ifdef CONFIG_MIPS_MT_SMTC
-       cd->cpumask             = CPU_MASK_ALL;
-#else
        cd->cpumask             = cpumask_of_cpu(cpu);
-#endif
        cd->set_next_event      = mips_next_event;
-       cd->set_mode            = mips_set_mode;
+       cd->set_mode            = mips_set_clock_mode;
        cd->event_handler       = mips_event_handler;
 
        clockevents_register_device(cd);
@@ -281,12 +207,9 @@ int __cpuinit mips_clockevent_init(void)
 
        cp0_timer_irq_installed = 1;
 
-#ifdef CONFIG_MIPS_MT_SMTC
-#define CPUCTR_IMASKBIT (0x100 << cp0_compare_irq)
-       setup_irq_smtc(irq, &c0_compare_irqaction, CPUCTR_IMASKBIT);
-#else
        setup_irq(irq, &c0_compare_irqaction);
-#endif
 
        return 0;
 }
+
+#endif /* Not CONFIG_MIPS_MT_SMTC */
diff --git a/arch/mips/kernel/cevt-smtc.c b/arch/mips/kernel/cevt-smtc.c
new file mode 100644 (file)
index 0000000..5162fe4
--- /dev/null
@@ -0,0 +1,321 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2007 MIPS Technologies, Inc.
+ * Copyright (C) 2007 Ralf Baechle <ralf@linux-mips.org>
+ * Copyright (C) 2008 Kevin D. Kissell, Paralogos sarl
+ */
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/percpu.h>
+
+#include <asm/smtc_ipi.h>
+#include <asm/time.h>
+#include <asm/cevt-r4k.h>
+
+/*
+ * Variant clock event timer support for SMTC on MIPS 34K, 1004K
+ * or other MIPS MT cores.
+ *
+ * Notes on SMTC Support:
+ *
+ * SMTC has multiple microthread TCs pretending to be Linux CPUs.
+ * But there's only one Count/Compare pair per VPE, and Compare
+ * interrupts are taken opportunisitically by available TCs
+ * bound to the VPE with the Count register.  The new timer
+ * framework provides for global broadcasts, but we really
+ * want VPE-level multicasts for best behavior. So instead
+ * of invoking the high-level clock-event broadcast code,
+ * this version of SMTC support uses the historical SMTC
+ * multicast mechanisms "under the hood", appearing to the
+ * generic clock layer as if the interrupts are per-CPU.
+ *
+ * The approach taken here is to maintain a set of NR_CPUS
+ * virtual timers, and track which "CPU" needs to be alerted
+ * at each event.
+ *
+ * It's unlikely that we'll see a MIPS MT core with more than
+ * 2 VPEs, but we *know* that we won't need to handle more
+ * VPEs than we have "CPUs".  So NCPUs arrays of NCPUs elements
+ * is always going to be overkill, but always going to be enough.
+ */
+
+unsigned long smtc_nexttime[NR_CPUS][NR_CPUS];
+static int smtc_nextinvpe[NR_CPUS];
+
+/*
+ * Timestamps stored are absolute values to be programmed
+ * into Count register.  Valid timestamps will never be zero.
+ * If a Zero Count value is actually calculated, it is converted
+ * to be a 1, which will introduce 1 or two CPU cycles of error
+ * roughly once every four billion events, which at 1000 HZ means
+ * about once every 50 days.  If that's actually a problem, one
+ * could alternate squashing 0 to 1 and to -1.
+ */
+
+#define MAKEVALID(x) (((x) == 0L) ? 1L : (x))
+#define ISVALID(x) ((x) != 0L)
+
+/*
+ * Time comparison is subtle, as it's really truncated
+ * modular arithmetic.
+ */
+
+#define IS_SOONER(a, b, reference) \
+    (((a) - (unsigned long)(reference)) < ((b) - (unsigned long)(reference)))
+
+/*
+ * CATCHUP_INCREMENT, used when the function falls behind the counter.
+ * Could be an increasing function instead of a constant;
+ */
+
+#define CATCHUP_INCREMENT 64
+
+static int mips_next_event(unsigned long delta,
+                               struct clock_event_device *evt)
+{
+       unsigned long flags;
+       unsigned int mtflags;
+       unsigned long timestamp, reference, previous;
+       unsigned long nextcomp = 0L;
+       int vpe = current_cpu_data.vpe_id;
+       int cpu = smp_processor_id();
+       local_irq_save(flags);
+       mtflags = dmt();
+
+       /*
+        * Maintain the per-TC virtual timer
+        * and program the per-VPE shared Count register
+        * as appropriate here...
+        */
+       reference = (unsigned long)read_c0_count();
+       timestamp = MAKEVALID(reference + delta);
+       /*
+        * To really model the clock, we have to catch the case
+        * where the current next-in-VPE timestamp is the old
+        * timestamp for the calling CPE, but the new value is
+        * in fact later.  In that case, we have to do a full
+        * scan and discover the new next-in-VPE CPU id and
+        * timestamp.
+        */
+       previous = smtc_nexttime[vpe][cpu];
+       if (cpu == smtc_nextinvpe[vpe] && ISVALID(previous)
+           && IS_SOONER(previous, timestamp, reference)) {
+               int i;
+               int soonest = cpu;
+
+               /*
+                * Update timestamp array here, so that new
+                * value gets considered along with those of
+                * other virtual CPUs on the VPE.
+                */
+               smtc_nexttime[vpe][cpu] = timestamp;
+               for_each_online_cpu(i) {
+                       if (ISVALID(smtc_nexttime[vpe][i])
+                           && IS_SOONER(smtc_nexttime[vpe][i],
+                               smtc_nexttime[vpe][soonest], reference)) {
+                                   soonest = i;
+                       }
+               }
+               smtc_nextinvpe[vpe] = soonest;
+               nextcomp = smtc_nexttime[vpe][soonest];
+       /*
+        * Otherwise, we don't have to process the whole array rank,
+        * we just have to see if the event horizon has gotten closer.
+        */
+       } else {
+               if (!ISVALID(smtc_nexttime[vpe][smtc_nextinvpe[vpe]]) ||
+                   IS_SOONER(timestamp,
+                       smtc_nexttime[vpe][smtc_nextinvpe[vpe]], reference)) {
+                           smtc_nextinvpe[vpe] = cpu;
+                           nextcomp = timestamp;
+               }
+               /*
+                * Since next-in-VPE may me the same as the executing
+                * virtual CPU, we update the array *after* checking
+                * its value.
+                */
+               smtc_nexttime[vpe][cpu] = timestamp;
+       }
+
+       /*
+        * It may be that, in fact, we don't need to update Compare,
+        * but if we do, we want to make sure we didn't fall into
+        * a crack just behind Count.
+        */
+       if (ISVALID(nextcomp)) {
+               write_c0_compare(nextcomp);
+               ehb();
+               /*
+                * We never return an error, we just make sure
+                * that we trigger the handlers as quickly as
+                * we can if we fell behind.
+                */
+               while ((nextcomp - (unsigned long)read_c0_count())
+                       > (unsigned long)LONG_MAX) {
+                       nextcomp += CATCHUP_INCREMENT;
+                       write_c0_compare(nextcomp);
+                       ehb();
+               }
+       }
+       emt(mtflags);
+       local_irq_restore(flags);
+       return 0;
+}
+
+
+void smtc_distribute_timer(int vpe)
+{
+       unsigned long flags;
+       unsigned int mtflags;
+       int cpu;
+       struct clock_event_device *cd;
+       unsigned long nextstamp = 0L;
+       unsigned long reference;
+
+
+repeat:
+       for_each_online_cpu(cpu) {
+           /*
+            * Find virtual CPUs within the current VPE who have
+            * unserviced timer requests whose time is now past.
+            */
+           local_irq_save(flags);
+           mtflags = dmt();
+           if (cpu_data[cpu].vpe_id == vpe &&
+               ISVALID(smtc_nexttime[vpe][cpu])) {
+               reference = (unsigned long)read_c0_count();
+               if ((smtc_nexttime[vpe][cpu] - reference)
+                        > (unsigned long)LONG_MAX) {
+                           smtc_nexttime[vpe][cpu] = 0L;
+                           emt(mtflags);
+                           local_irq_restore(flags);
+                           /*
+                            * We don't send IPIs to ourself.
+                            */
+                           if (cpu != smp_processor_id()) {
+                               smtc_send_ipi(cpu, SMTC_CLOCK_TICK, 0);
+                           } else {
+                               cd = &per_cpu(mips_clockevent_device, cpu);
+                               cd->event_handler(cd);
+                           }
+               } else {
+                       /* Local to VPE but Valid Time not yet reached. */
+                       if (!ISVALID(nextstamp) ||
+                           IS_SOONER(smtc_nexttime[vpe][cpu], nextstamp,
+                           reference)) {
+                               smtc_nextinvpe[vpe] = cpu;
+                               nextstamp = smtc_nexttime[vpe][cpu];
+                       }
+                       emt(mtflags);
+                       local_irq_restore(flags);
+               }
+           } else {
+               emt(mtflags);
+               local_irq_restore(flags);
+
+           }
+       }
+       /* Reprogram for interrupt at next soonest timestamp for VPE */
+       if (ISVALID(nextstamp)) {
+               write_c0_compare(nextstamp);
+               ehb();
+               if ((nextstamp - (unsigned long)read_c0_count())
+                       > (unsigned long)LONG_MAX)
+                               goto repeat;
+       }
+}
+
+
+irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
+{
+       int cpu = smp_processor_id();
+
+       /* If we're running SMTC, we've got MIPS MT and therefore MIPS32R2 */
+       handle_perf_irq(1);
+
+       if (read_c0_cause() & (1 << 30)) {
+               /* Clear Count/Compare Interrupt */
+               write_c0_compare(read_c0_compare());
+               smtc_distribute_timer(cpu_data[cpu].vpe_id);
+       }
+       return IRQ_HANDLED;
+}
+
+
+int __cpuinit mips_clockevent_init(void)
+{
+       uint64_t mips_freq = mips_hpt_frequency;
+       unsigned int cpu = smp_processor_id();
+       struct clock_event_device *cd;
+       unsigned int irq;
+       int i;
+       int j;
+
+       if (!cpu_has_counter || !mips_hpt_frequency)
+               return -ENXIO;
+       if (cpu == 0) {
+               for (i = 0; i < num_possible_cpus(); i++) {
+                       smtc_nextinvpe[i] = 0;
+                       for (j = 0; j < num_possible_cpus(); j++)
+                               smtc_nexttime[i][j] = 0L;
+               }
+               /*
+                * SMTC also can't have the usablility test
+                * run by secondary TCs once Compare is in use.
+                */
+               if (!c0_compare_int_usable())
+                       return -ENXIO;
+       }
+
+       /*
+        * With vectored interrupts things are getting platform specific.
+        * get_c0_compare_int is a hook to allow a platform to return the
+        * interrupt number of it's liking.
+        */
+       irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
+       if (get_c0_compare_int)
+               irq = get_c0_compare_int();
+
+       cd = &per_cpu(mips_clockevent_device, cpu);
+
+       cd->name                = "MIPS";
+       cd->features            = CLOCK_EVT_FEAT_ONESHOT;
+
+       /* Calculate the min / max delta */
+       cd->mult        = div_sc((unsigned long) mips_freq, NSEC_PER_SEC, 32);
+       cd->shift               = 32;
+       cd->max_delta_ns        = clockevent_delta2ns(0x7fffffff, cd);
+       cd->min_delta_ns        = clockevent_delta2ns(0x300, cd);
+
+       cd->rating              = 300;
+       cd->irq                 = irq;
+       cd->cpumask             = cpumask_of_cpu(cpu);
+       cd->set_next_event      = mips_next_event;
+       cd->set_mode            = mips_set_clock_mode;
+       cd->event_handler       = mips_event_handler;
+
+       clockevents_register_device(cd);
+
+       /*
+        * On SMTC we only want to do the data structure
+        * initialization and IRQ setup once.
+        */
+       if (cpu)
+               return 0;
+       /*
+        * And we need the hwmask associated with the c0_compare
+        * vector to be initialized.
+        */
+       irq_hwmask[irq] = (0x100 << cp0_compare_irq);
+       if (cp0_timer_irq_installed)
+               return 0;
+
+       cp0_timer_irq_installed = 1;
+
+       setup_irq(irq, &c0_compare_irqaction);
+
+       return 0;
+}
index 335a6ae3d594044fa0ca99e44ee189631238b609..e621fda8ab37fad4847cb3a19ee238f415f82a91 100644 (file)
@@ -45,18 +45,7 @@ static void r39xx_wait(void)
        local_irq_enable();
 }
 
-/*
- * There is a race when WAIT instruction executed with interrupt
- * enabled.
- * But it is implementation-dependent wheter the pipelie restarts when
- * a non-enabled interrupt is requested.
- */
-static void r4k_wait(void)
-{
-       __asm__("       .set    mips3                   \n"
-               "       wait                            \n"
-               "       .set    mips0                   \n");
-}
+extern void r4k_wait(void);
 
 /*
  * This variant is preferable as it allows testing need_resched and going to
@@ -65,14 +54,18 @@ static void r4k_wait(void)
  * interrupt is requested" restriction in the MIPS32/MIPS64 architecture makes
  * using this version a gamble.
  */
-static void r4k_wait_irqoff(void)
+void r4k_wait_irqoff(void)
 {
        local_irq_disable();
        if (!need_resched())
-               __asm__("       .set    mips3           \n"
+               __asm__("       .set    push            \n"
+                       "       .set    mips3           \n"
                        "       wait                    \n"
-                       "       .set    mips0           \n");
+                       "       .set    pop             \n");
        local_irq_enable();
+       __asm__("       .globl __pastwait       \n"
+               "__pastwait:                    \n");
+       return;
 }
 
 /*
@@ -128,7 +121,7 @@ static int __init wait_disable(char *s)
 
 __setup("nowait", wait_disable);
 
-static inline void check_wait(void)
+void __init check_wait(void)
 {
        struct cpuinfo_mips *c = &current_cpu_data;
 
@@ -242,7 +235,6 @@ static inline void check_errata(void)
 
 void __init check_bugs32(void)
 {
-       check_wait();
        check_errata();
 }
 
index e29598ae939d21b7d8e7442300a8741ce612f24a..ffa331029e086ce3720dc1ac9d60b936d68dba0a 100644 (file)
@@ -79,11 +79,6 @@ FEXPORT(syscall_exit)
 
 FEXPORT(restore_all)                   # restore full frame
 #ifdef CONFIG_MIPS_MT_SMTC
-/* Detect and execute deferred IPI "interrupts" */
-       LONG_L  s0, TI_REGS($28)
-       LONG_S  sp, TI_REGS($28)
-       jal     deferred_smtc_ipi
-       LONG_S  s0, TI_REGS($28)
 #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
 /* Re-arm any temporarily masked interrupts not explicitly "acked" */
        mfc0    v0, CP0_TCSTATUS
@@ -112,6 +107,11 @@ FEXPORT(restore_all)                       # restore full frame
        xor     t0, t0, t3
        mtc0    t0, CP0_TCCONTEXT
 #endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
+/* Detect and execute deferred IPI "interrupts" */
+       LONG_L  s0, TI_REGS($28)
+       LONG_S  sp, TI_REGS($28)
+       jal     deferred_smtc_ipi
+       LONG_S  s0, TI_REGS($28)
 #endif /* CONFIG_MIPS_MT_SMTC */
        .set    noat
        RESTORE_TEMP
index c6ada98ee042039a968e57d57f800ee1c8313ed6..01dcbe38fa019dc20ac8d4999b818f62ec0ff970 100644 (file)
@@ -20,6 +20,7 @@
 #include <asm/stackframe.h>
 #include <asm/war.h>
 #include <asm/page.h>
+#include <asm/thread_info.h>
 
 #define PANIC_PIC(msg)                                 \
                .set push;                              \
@@ -126,7 +127,42 @@ handle_vcei:
 
        __FINIT
 
+       .align  5       /* 32 byte rollback region */
+LEAF(r4k_wait)
+       .set    push
+       .set    noreorder
+       /* start of rollback region */
+       LONG_L  t0, TI_FLAGS($28)
+       nop
+       andi    t0, _TIF_NEED_RESCHED
+       bnez    t0, 1f
+        nop
+       nop
+       nop
+       .set    mips3
+       wait
+       /* end of rollback region (the region size must be power of two) */
+       .set    pop
+1:
+       jr      ra
+       END(r4k_wait)
+
+       .macro  BUILD_ROLLBACK_PROLOGUE handler
+       FEXPORT(rollback_\handler)
+       .set    push
+       .set    noat
+       MFC0    k0, CP0_EPC
+       PTR_LA  k1, r4k_wait
+       ori     k0, 0x1f        /* 32 byte rollback region */
+       xori    k0, 0x1f
+       bne     k0, k1, 9f
+       MTC0    k0, CP0_EPC
+9:
+       .set pop
+       .endm
+
        .align  5
+BUILD_ROLLBACK_PROLOGUE handle_int
 NESTED(handle_int, PT_SIZE, sp)
 #ifdef CONFIG_TRACE_IRQFLAGS
        /*
@@ -201,6 +237,7 @@ NESTED(except_vec_ejtag_debug, 0, sp)
  * This prototype is copied to ebase + n*IntCtl.VS and patched
  * to invoke the handler
  */
+BUILD_ROLLBACK_PROLOGUE except_vec_vi
 NESTED(except_vec_vi, 0, sp)
        SAVE_SOME
        SAVE_AT
@@ -245,8 +282,8 @@ NESTED(except_vec_vi_handler, 0, sp)
        and     t0, a0, t1
 #ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
        mfc0    t2, CP0_TCCONTEXT
-       or      t0, t0, t2
-       mtc0    t0, CP0_TCCONTEXT
+       or      t2, t0, t2
+       mtc0    t2, CP0_TCCONTEXT
 #endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
        xor     t1, t1, t0
        mtc0    t1, CP0_STATUS
index 361364501d34926deea6d59456cce24f0674e538..492a0a8d70fbf9ddc6e695ae8250e562f03f0ab5 100644 (file)
@@ -22,6 +22,7 @@
 #include <asm/irqflags.h>
 #include <asm/regdef.h>
 #include <asm/page.h>
+#include <asm/pgtable-bits.h>
 #include <asm/mipsregs.h>
 #include <asm/stackframe.h>
 
index 8f6d58ede33cea5f42424fb27becd432e7b1f7b3..6e152c80cd4a5bb3d0a73816311a850181371b81 100644 (file)
@@ -236,8 +236,7 @@ int kgdb_arch_handle_exception(int vector, int signo, int err_code,
 
                atomic_set(&kgdb_cpu_doing_single_step, -1);
                if (remcom_in_buffer[0] == 's')
-                       if (kgdb_contthread)
-                               atomic_set(&kgdb_cpu_doing_single_step, cpu);
+                       atomic_set(&kgdb_cpu_doing_single_step, cpu);
 
                return 0;
        }
index df4d3f2f740c54fa73b413e8b8c8d91601b95c74..dc9eb72ed9de956164f557b0757496dae6638c2e 100644 (file)
@@ -159,7 +159,7 @@ __setup("fpaff=", fpaff_thresh);
 /*
  * FPU Use Factor empirically derived from experiments on 34K
  */
-#define FPUSEFACTOR 333
+#define FPUSEFACTOR 2000
 
 static __init int mt_fp_affinity_init(void)
 {
index b16facd9ea8ecae7b27116952090beca25450c78..22fc19bbe87f3744ee24ef7dbc81a315b293fc1d 100644 (file)
@@ -55,7 +55,7 @@ void __noreturn cpu_idle(void)
        while (1) {
                tick_nohz_stop_sched_tick(1);
                while (!need_resched()) {
-#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG
+#ifdef CONFIG_MIPS_MT_SMTC
                        extern void smtc_idle_loop_hook(void);
 
                        smtc_idle_loop_hook();
@@ -145,17 +145,18 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
         */
        p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
        childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
-       clear_tsk_thread_flag(p, TIF_USEDFPU);
 
-#ifdef CONFIG_MIPS_MT_FPAFF
+#ifdef CONFIG_MIPS_MT_SMTC
        /*
-        * FPU affinity support is cleaner if we track the
-        * user-visible CPU affinity from the very beginning.
-        * The generic cpus_allowed mask will already have
-        * been copied from the parent before copy_thread
-        * is invoked.
+        * SMTC restores TCStatus after Status, and the CU bits
+        * are aliased there.
         */
-       p->thread.user_cpus_allowed = p->cpus_allowed;
+       childregs->cp0_tcstatus &= ~(ST0_CU2|ST0_CU1);
+#endif
+       clear_tsk_thread_flag(p, TIF_USEDFPU);
+
+#ifdef CONFIG_MIPS_MT_FPAFF
+       clear_tsk_thread_flag(p, TIF_FPUBOUND);
 #endif /* CONFIG_MIPS_MT_FPAFF */
 
        if (clone_flags & CLONE_SETTLS)
index 35234b92b9a58f9d5c9e8a2063c292e35c3ac327..96ffc9c6d194d6ba5d2a8be948481652adbb34a2 100644 (file)
@@ -238,7 +238,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                case FPC_EIR: { /* implementation / version register */
                        unsigned int flags;
 #ifdef CONFIG_MIPS_MT_SMTC
-                       unsigned int irqflags;
+                       unsigned long irqflags;
                        unsigned int mtflags;
 #endif /* CONFIG_MIPS_MT_SMTC */
 
index a516286532ab092637cab432cd8742a0800e6fb0..897fb2b4751c95715af0b798d79db5cf899a5e5d 100644 (file)
@@ -1,4 +1,21 @@
-/* Copyright (C) 2004 Mips Technologies, Inc */
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ *
+ * Copyright (C) 2004 Mips Technologies, Inc
+ * Copyright (C) 2008 Kevin D. Kissell
+ */
 
 #include <linux/clockchips.h>
 #include <linux/kernel.h>
@@ -21,7 +38,6 @@
 #include <asm/time.h>
 #include <asm/addrspace.h>
 #include <asm/smtc.h>
-#include <asm/smtc_ipi.h>
 #include <asm/smtc_proc.h>
 
 /*
@@ -58,11 +74,6 @@ unsigned long irq_hwmask[NR_IRQS];
 
 asiduse smtc_live_asid[MAX_SMTC_TLBS][MAX_SMTC_ASIDS];
 
-/*
- * Clock interrupt "latch" buffers, per "CPU"
- */
-
-static atomic_t ipi_timer_latch[NR_CPUS];
 
 /*
  * Number of InterProcessor Interrupt (IPI) message buffers to allocate
@@ -70,7 +81,7 @@ static atomic_t ipi_timer_latch[NR_CPUS];
 
 #define IPIBUF_PER_CPU 4
 
-static struct smtc_ipi_q IPIQ[NR_CPUS];
+struct smtc_ipi_q IPIQ[NR_CPUS];
 static struct smtc_ipi_q freeIPIq;
 
 
@@ -282,7 +293,7 @@ static void smtc_configure_tlb(void)
  * phys_cpu_present_map and the logical/physical mappings.
  */
 
-int __init mipsmt_build_cpu_map(int start_cpu_slot)
+int __init smtc_build_cpu_map(int start_cpu_slot)
 {
        int i, ntcs;
 
@@ -325,7 +336,12 @@ static void smtc_tc_setup(int vpe, int tc, int cpu)
        write_tc_c0_tcstatus((read_tc_c0_tcstatus()
                        & ~(TCSTATUS_TKSU | TCSTATUS_DA | TCSTATUS_IXMT))
                        | TCSTATUS_A);
-       write_tc_c0_tccontext(0);
+       /*
+        * TCContext gets an offset from the base of the IPIQ array
+        * to be used in low-level code to detect the presence of
+        * an active IPI queue
+        */
+       write_tc_c0_tccontext((sizeof(struct smtc_ipi_q) * cpu) << 16);
        /* Bind tc to vpe */
        write_tc_c0_tcbind(vpe);
        /* In general, all TCs should have the same cpu_data indications */
@@ -336,10 +352,18 @@ static void smtc_tc_setup(int vpe, int tc, int cpu)
                cpu_data[cpu].options &= ~MIPS_CPU_FPU;
        cpu_data[cpu].vpe_id = vpe;
        cpu_data[cpu].tc_id = tc;
+       /* Multi-core SMTC hasn't been tested, but be prepared */
+       cpu_data[cpu].core = (read_vpe_c0_ebase() >> 1) & 0xff;
 }
 
+/*
+ * Tweak to get Count registes in as close a sync as possible.
+ * Value seems good for 34K-class cores.
+ */
+
+#define CP0_SKEW 8
 
-void mipsmt_prepare_cpus(void)
+void smtc_prepare_cpus(int cpus)
 {
        int i, vpe, tc, ntc, nvpe, tcpervpe[NR_CPUS], slop, cpu;
        unsigned long flags;
@@ -363,13 +387,13 @@ void mipsmt_prepare_cpus(void)
                IPIQ[i].head = IPIQ[i].tail = NULL;
                spin_lock_init(&IPIQ[i].lock);
                IPIQ[i].depth = 0;
-               atomic_set(&ipi_timer_latch[i], 0);
        }
 
        /* cpu_data index starts at zero */
        cpu = 0;
        cpu_data[cpu].vpe_id = 0;
        cpu_data[cpu].tc_id = 0;
+       cpu_data[cpu].core = (read_c0_ebase() >> 1) & 0xff;
        cpu++;
 
        /* Report on boot-time options */
@@ -484,7 +508,8 @@ void mipsmt_prepare_cpus(void)
                        write_vpe_c0_compare(0);
                        /* Propagate Config7 */
                        write_vpe_c0_config7(read_c0_config7());
-                       write_vpe_c0_count(read_c0_count());
+                       write_vpe_c0_count(read_c0_count() + CP0_SKEW);
+                       ehb();
                }
                /* enable multi-threading within VPE */
                write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() | VPECONTROL_TE);
@@ -556,7 +581,7 @@ void mipsmt_prepare_cpus(void)
 void __cpuinit smtc_boot_secondary(int cpu, struct task_struct *idle)
 {
        extern u32 kernelsp[NR_CPUS];
-       long flags;
+       unsigned long flags;
        int mtflags;
 
        LOCK_MT_PRA();
@@ -585,24 +610,22 @@ void __cpuinit smtc_boot_secondary(int cpu, struct task_struct *idle)
 
 void smtc_init_secondary(void)
 {
-       /*
-        * Start timer on secondary VPEs if necessary.
-        * plat_timer_setup has already have been invoked by init/main
-        * on "boot" TC.  Like per_cpu_trap_init() hack, this assumes that
-        * SMTC init code assigns TCs consdecutively and in ascending order
-        * to across available VPEs.
-        */
-       if (((read_c0_tcbind() & TCBIND_CURTC) != 0) &&
-           ((read_c0_tcbind() & TCBIND_CURVPE)
-           != cpu_data[smp_processor_id() - 1].vpe_id)){
-               write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);
-       }
-
        local_irq_enable();
 }
 
 void smtc_smp_finish(void)
 {
+       int cpu = smp_processor_id();
+
+       /*
+        * Lowest-numbered CPU per VPE starts a clock tick.
+        * Like per_cpu_trap_init() hack, this assumes that
+        * SMTC init code assigns TCs consdecutively and
+        * in ascending order across available VPEs.
+        */
+       if (cpu > 0 && (cpu_data[cpu].vpe_id != cpu_data[cpu - 1].vpe_id))
+               write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);
+
        printk("TC %d going on-line as CPU %d\n",
                cpu_data[smp_processor_id()].tc_id, smp_processor_id());
 }
@@ -753,8 +776,10 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
 {
        int tcstatus;
        struct smtc_ipi *pipi;
-       long flags;
+       unsigned long flags;
        int mtflags;
+       unsigned long tcrestart;
+       extern void r4k_wait_irqoff(void), __pastwait(void);
 
        if (cpu == smp_processor_id()) {
                printk("Cannot Send IPI to self!\n");
@@ -771,8 +796,6 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
        pipi->arg = (void *)action;
        pipi->dest = cpu;
        if (cpu_data[cpu].vpe_id != cpu_data[smp_processor_id()].vpe_id) {
-               if (type == SMTC_CLOCK_TICK)
-                       atomic_inc(&ipi_timer_latch[cpu]);
                /* If not on same VPE, enqueue and send cross-VPE interrupt */
                smtc_ipi_nq(&IPIQ[cpu], pipi);
                LOCK_CORE_PRA();
@@ -800,22 +823,29 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
 
                if ((tcstatus & TCSTATUS_IXMT) != 0) {
                        /*
-                        * Spin-waiting here can deadlock,
-                        * so we queue the message for the target TC.
+                        * If we're in the the irq-off version of the wait
+                        * loop, we need to force exit from the wait and
+                        * do a direct post of the IPI.
+                        */
+                       if (cpu_wait == r4k_wait_irqoff) {
+                               tcrestart = read_tc_c0_tcrestart();
+                               if (tcrestart >= (unsigned long)r4k_wait_irqoff
+                                   && tcrestart < (unsigned long)__pastwait) {
+                                       write_tc_c0_tcrestart(__pastwait);
+                                       tcstatus &= ~TCSTATUS_IXMT;
+                                       write_tc_c0_tcstatus(tcstatus);
+                                       goto postdirect;
+                               }
+                       }
+                       /*
+                        * Otherwise we queue the message for the target TC
+                        * to pick up when he does a local_irq_restore()
                         */
                        write_tc_c0_tchalt(0);
                        UNLOCK_CORE_PRA();
-                       /* Try to reduce redundant timer interrupt messages */
-                       if (type == SMTC_CLOCK_TICK) {
-                           if (atomic_postincrement(&ipi_timer_latch[cpu])!=0){
-                               smtc_ipi_nq(&freeIPIq, pipi);
-                               return;
-                           }
-                       }
                        smtc_ipi_nq(&IPIQ[cpu], pipi);
                } else {
-                       if (type == SMTC_CLOCK_TICK)
-                               atomic_inc(&ipi_timer_latch[cpu]);
+postdirect:
                        post_direct_ipi(cpu, pipi);
                        write_tc_c0_tchalt(0);
                        UNLOCK_CORE_PRA();
@@ -883,7 +913,7 @@ static void ipi_call_interrupt(void)
        smp_call_function_interrupt();
 }
 
-DECLARE_PER_CPU(struct clock_event_device, smtc_dummy_clockevent_device);
+DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device);
 
 void ipi_decode(struct smtc_ipi *pipi)
 {
@@ -891,20 +921,13 @@ void ipi_decode(struct smtc_ipi *pipi)
        struct clock_event_device *cd;
        void *arg_copy = pipi->arg;
        int type_copy = pipi->type;
-       int ticks;
-
        smtc_ipi_nq(&freeIPIq, pipi);
        switch (type_copy) {
        case SMTC_CLOCK_TICK:
                irq_enter();
                kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + 1]++;
-               cd = &per_cpu(smtc_dummy_clockevent_device, cpu);
-               ticks = atomic_read(&ipi_timer_latch[cpu]);
-               atomic_sub(ticks, &ipi_timer_latch[cpu]);
-               while (ticks) {
-                       cd->event_handler(cd);
-                       ticks--;
-               }
+               cd = &per_cpu(mips_clockevent_device, cpu);
+               cd->event_handler(cd);
                irq_exit();
                break;
 
@@ -937,24 +960,48 @@ void ipi_decode(struct smtc_ipi *pipi)
        }
 }
 
+/*
+ * Similar to smtc_ipi_replay(), but invoked from context restore,
+ * so it reuses the current exception frame rather than set up a
+ * new one with self_ipi.
+ */
+
 void deferred_smtc_ipi(void)
 {
-       struct smtc_ipi *pipi;
-       unsigned long flags;
-/* DEBUG */
-       int q = smp_processor_id();
+       int cpu = smp_processor_id();
 
        /*
         * Test is not atomic, but much faster than a dequeue,
         * and the vast majority of invocations will have a null queue.
+        * If irq_disabled when this was called, then any IPIs queued
+        * after we test last will be taken on the next irq_enable/restore.
+        * If interrupts were enabled, then any IPIs added after the
+        * last test will be taken directly.
         */
-       if (IPIQ[q].head != NULL) {
-               while((pipi = smtc_ipi_dq(&IPIQ[q])) != NULL) {
-                       /* ipi_decode() should be called with interrupts off */
-                       local_irq_save(flags);
+
+       while (IPIQ[cpu].head != NULL) {
+               struct smtc_ipi_q *q = &IPIQ[cpu];
+               struct smtc_ipi *pipi;
+               unsigned long flags;
+
+               /*
+                * It may be possible we'll come in with interrupts
+                * already enabled.
+                */
+               local_irq_save(flags);
+
+               spin_lock(&q->lock);
+               pipi = __smtc_ipi_dq(q);
+               spin_unlock(&q->lock);
+               if (pipi != NULL)
                        ipi_decode(pipi);
-                       local_irq_restore(flags);
-               }
+               /*
+                * The use of the __raw_local restore isn't
+                * as obviously necessary here as in smtc_ipi_replay(),
+                * but it's more efficient, given that we're already
+                * running down the IPI queue.
+                */
+               __raw_local_irq_restore(flags);
        }
 }
 
@@ -975,7 +1022,7 @@ static irqreturn_t ipi_interrupt(int irq, void *dev_idm)
        struct smtc_ipi *pipi;
        unsigned long tcstatus;
        int sent;
-       long flags;
+       unsigned long flags;
        unsigned int mtflags;
        unsigned int vpflags;
 
@@ -1066,55 +1113,53 @@ static void setup_cross_vpe_interrupts(unsigned int nvpe)
 
 /*
  * SMTC-specific hacks invoked from elsewhere in the kernel.
- *
- * smtc_ipi_replay is called from raw_local_irq_restore which is only ever
- * called with interrupts disabled.  We do rely on interrupts being disabled
- * here because using spin_lock_irqsave()/spin_unlock_irqrestore() would
- * result in a recursive call to raw_local_irq_restore().
  */
 
-static void __smtc_ipi_replay(void)
+ /*
+  * smtc_ipi_replay is called from raw_local_irq_restore
+  */
+
+void smtc_ipi_replay(void)
 {
        unsigned int cpu = smp_processor_id();
 
        /*
         * To the extent that we've ever turned interrupts off,
         * we may have accumulated deferred IPIs.  This is subtle.
-        * If we use the smtc_ipi_qdepth() macro, we'll get an
-        * exact number - but we'll also disable interrupts
-        * and create a window of failure where a new IPI gets
-        * queued after we test the depth but before we re-enable
-        * interrupts. So long as IXMT never gets set, however,
         * we should be OK:  If we pick up something and dispatch
         * it here, that's great. If we see nothing, but concurrent
         * with this operation, another TC sends us an IPI, IXMT
         * is clear, and we'll handle it as a real pseudo-interrupt
-        * and not a pseudo-pseudo interrupt.
+        * and not a pseudo-pseudo interrupt.  The important thing
+        * is to do the last check for queued message *after* the
+        * re-enabling of interrupts.
         */
-       if (IPIQ[cpu].depth > 0) {
-               while (1) {
-                       struct smtc_ipi_q *q = &IPIQ[cpu];
-                       struct smtc_ipi *pipi;
-                       extern void self_ipi(struct smtc_ipi *);
-
-                       spin_lock(&q->lock);
-                       pipi = __smtc_ipi_dq(q);
-                       spin_unlock(&q->lock);
-                       if (!pipi)
-                               break;
+       while (IPIQ[cpu].head != NULL) {
+               struct smtc_ipi_q *q = &IPIQ[cpu];
+               struct smtc_ipi *pipi;
+               unsigned long flags;
+
+               /*
+                * It's just possible we'll come in with interrupts
+                * already enabled.
+                */
+               local_irq_save(flags);
+
+               spin_lock(&q->lock);
+               pipi = __smtc_ipi_dq(q);
+               spin_unlock(&q->lock);
+               /*
+                ** But use a raw restore here to avoid recursion.
+                */
+               __raw_local_irq_restore(flags);
 
+               if (pipi) {
                        self_ipi(pipi);
                        smtc_cpu_stats[cpu].selfipis++;
                }
        }
 }
 
-void smtc_ipi_replay(void)
-{
-       raw_local_irq_disable();
-       __smtc_ipi_replay();
-}
-
 EXPORT_SYMBOL(smtc_ipi_replay);
 
 void smtc_idle_loop_hook(void)
@@ -1193,40 +1238,13 @@ void smtc_idle_loop_hook(void)
                }
        }
 
-       /*
-        * Now that we limit outstanding timer IPIs, check for hung TC
-        */
-       for (tc = 0; tc < NR_CPUS; tc++) {
-               /* Don't check ourself - we'll dequeue IPIs just below */
-               if ((tc != smp_processor_id()) &&
-                   atomic_read(&ipi_timer_latch[tc]) > timerq_limit) {
-                   if (clock_hang_reported[tc] == 0) {
-                       pdb_msg += sprintf(pdb_msg,
-                               "TC %d looks hung with timer latch at %d\n",
-                               tc, atomic_read(&ipi_timer_latch[tc]));
-                       clock_hang_reported[tc]++;
-                       }
-               }
-       }
        emt(mtflags);
        local_irq_restore(flags);
        if (pdb_msg != &id_ho_db_msg[0])
                printk("CPU%d: %s", smp_processor_id(), id_ho_db_msg);
 #endif /* CONFIG_SMTC_IDLE_HOOK_DEBUG */
 
-       /*
-        * Replay any accumulated deferred IPIs. If "Instant Replay"
-        * is in use, there should never be any.
-        */
-#ifndef CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY
-       {
-               unsigned long flags;
-
-               local_irq_save(flags);
-               __smtc_ipi_replay();
-               local_irq_restore(flags);
-       }
-#endif /* CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY */
+       smtc_ipi_replay();
 }
 
 void smtc_soft_dump(void)
@@ -1242,10 +1260,6 @@ void smtc_soft_dump(void)
                printk("%d: %ld\n", i, smtc_cpu_stats[i].selfipis);
        }
        smtc_ipi_qdump();
-       printk("Timer IPI Backlogs:\n");
-       for (i=0; i < NR_CPUS; i++) {
-               printk("%d: %d\n", i, atomic_read(&ipi_timer_latch[i]));
-       }
        printk("%d Recoveries of \"stolen\" FPU\n",
               atomic_read(&smtc_fpu_recoveries));
 }
index 6bee29097a565e71459f80ee75c3affd3d0ed25b..b602ac6eb47d8a41454d0bd5e48b7931d6f4ee7f 100644 (file)
@@ -46,6 +46,9 @@
 #include <asm/types.h>
 #include <asm/stacktrace.h>
 
+extern void check_wait(void);
+extern asmlinkage void r4k_wait(void);
+extern asmlinkage void rollback_handle_int(void);
 extern asmlinkage void handle_int(void);
 extern asmlinkage void handle_tlbm(void);
 extern asmlinkage void handle_tlbl(void);
@@ -822,8 +825,10 @@ static void mt_ase_fp_affinity(void)
                if (cpus_intersects(current->cpus_allowed, mt_fpu_cpumask)) {
                        cpumask_t tmask;
 
-                       cpus_and(tmask, current->thread.user_cpus_allowed,
-                                mt_fpu_cpumask);
+                       current->thread.user_cpus_allowed
+                               = current->cpus_allowed;
+                       cpus_and(tmask, current->cpus_allowed,
+                               mt_fpu_cpumask);
                        set_cpus_allowed(current, tmask);
                        set_thread_flag(TIF_FPUBOUND);
                }
@@ -1251,6 +1256,9 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
 
                extern char except_vec_vi, except_vec_vi_lui;
                extern char except_vec_vi_ori, except_vec_vi_end;
+               extern char rollback_except_vec_vi;
+               char *vec_start = (cpu_wait == r4k_wait) ?
+                       &rollback_except_vec_vi : &except_vec_vi;
 #ifdef CONFIG_MIPS_MT_SMTC
                /*
                 * We need to provide the SMTC vectored interrupt handler
@@ -1258,11 +1266,11 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
                 * Status.IM bit to be masked before going there.
                 */
                extern char except_vec_vi_mori;
-               const int mori_offset = &except_vec_vi_mori - &except_vec_vi;
+               const int mori_offset = &except_vec_vi_mori - vec_start;
 #endif /* CONFIG_MIPS_MT_SMTC */
-               const int handler_len = &except_vec_vi_end - &except_vec_vi;
-               const int lui_offset = &except_vec_vi_lui - &except_vec_vi;
-               const int ori_offset = &except_vec_vi_ori - &except_vec_vi;
+               const int handler_len = &except_vec_vi_end - vec_start;
+               const int lui_offset = &except_vec_vi_lui - vec_start;
+               const int ori_offset = &except_vec_vi_ori - vec_start;
 
                if (handler_len > VECTORSPACING) {
                        /*
@@ -1272,7 +1280,7 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs)
                        panic("VECTORSPACING too small");
                }
 
-               memcpy(b, &except_vec_vi, handler_len);
+               memcpy(b, vec_start, handler_len);
 #ifdef CONFIG_MIPS_MT_SMTC
                BUG_ON(n > 7);  /* Vector index %d exceeds SMTC maximum. */
 
@@ -1554,6 +1562,10 @@ void __init trap_init(void)
        extern char except_vec3_generic, except_vec3_r4000;
        extern char except_vec4;
        unsigned long i;
+       int rollback;
+
+       check_wait();
+       rollback = (cpu_wait == r4k_wait);
 
 #if defined(CONFIG_KGDB)
        if (kgdb_early_setup)
@@ -1618,7 +1630,7 @@ void __init trap_init(void)
        if (board_be_init)
                board_be_init();
 
-       set_except_vector(0, handle_int);
+       set_except_vector(0, rollback ? rollback_handle_int : handle_int);
        set_except_vector(1, handle_tlbm);
        set_except_vector(2, handle_tlbl);
        set_except_vector(3, handle_tlbs);
index b5470ceb418b301847f385d72e306eff0b1bf6dc..afb119f35682680c2eb5eeddb20137aab7e64aa9 100644 (file)
@@ -36,6 +36,7 @@ SECTIONS
                SCHED_TEXT
                LOCK_TEXT
                KPROBES_TEXT
+               *(.text.*)
                *(.fixup)
                *(.gnu.warning)
        } :text = 0
index 8d7784122c143b7a36689d82dbe057928244a355..edac9892c51a19a5e8084ad26ca5584d54c78499 100644 (file)
 #ifdef USE_DOUBLE
 
 #define LOAD   ld
+#define LOAD32 lwu
 #define ADD    daddu
 #define NBYTES 8
 
 #else
 
 #define LOAD   lw
+#define LOAD32 lw
 #define ADD    addu
 #define NBYTES 4
 
        ADD     sum, v1;                                        \
        .set    pop
 
+#define ADDC32(sum,reg)                                                \
+       .set    push;                                           \
+       .set    noat;                                           \
+       addu    sum, reg;                                       \
+       sltu    v1, sum, reg;                                   \
+       addu    sum, v1;                                        \
+       .set    pop
+
 #define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3)   \
        LOAD    _t0, (offset + UNIT(0))(src);                   \
        LOAD    _t1, (offset + UNIT(1))(src);                   \
@@ -132,7 +142,7 @@ LEAF(csum_partial)
        beqz    t8, .Lqword_align
         andi   t8, src, 0x8
 
-       lw      t0, 0x00(src)
+       LOAD32  t0, 0x00(src)
        LONG_SUBU       a1, a1, 0x4
        ADDC(sum, t0)
        PTR_ADDU        src, src, 0x4
@@ -211,7 +221,7 @@ LEAF(csum_partial)
        LONG_SRL        t8, t8, 0x2
 
 .Lend_words:
-       lw      t0, (src)
+       LOAD32  t0, (src)
        LONG_SUBU       t8, t8, 0x1
        ADDC(sum, t0)
        .set    reorder                         /* DADDI_WAR */
@@ -230,6 +240,9 @@ LEAF(csum_partial)
        /* Still a full word to go  */
        ulw     t1, (src)
        PTR_ADDIU       src, 4
+#ifdef USE_DOUBLE
+       dsll    t1, t1, 32                      /* clear lower 32bit */
+#endif
        ADDC(sum, t1)
 
 1:     move    t1, zero
@@ -280,7 +293,7 @@ LEAF(csum_partial)
 1:
        .set    reorder
        /* Add the passed partial csum.  */
-       ADDC(sum, a2)
+       ADDC32(sum, a2)
        jr      ra
        .set    noreorder
        END(csum_partial)
@@ -681,7 +694,7 @@ EXC(        sb      t0, NBYTES-2(dst), .Ls_exc)
        .set    pop
 1:
        .set reorder
-       ADDC(sum, psum)
+       ADDC32(sum, psum)
        jr      ra
        .set noreorder
 
index 3b7dd722c32a68ff83881d3200e769660678b899..cef2db8d22253185d8d66402e4e300422fcd4645 100644 (file)
@@ -15,6 +15,6 @@ obj-$(CONFIG_EARLY_PRINTK)    += malta-console.o
 obj-$(CONFIG_PCI)              += malta-pci.o
 
 # FIXME FIXME FIXME
-obj-$(CONFIG_MIPS_MT_SMTC)     += malta_smtc.o
+obj-$(CONFIG_MIPS_MT_SMTC)     += malta-smtc.o
 
 EXTRA_CFLAGS += -Werror
index 5ea705e49454e3ce49b27fb6b2f80a9f796f6950..f84a46a8ae6e5261d0c8669b2726ed353cda7dc3 100644 (file)
@@ -84,12 +84,17 @@ static void msmtc_cpus_done(void)
 
 static void __init msmtc_smp_setup(void)
 {
-       mipsmt_build_cpu_map(0);
+       /*
+        * we won't get the definitive value until
+        * we've run smtc_prepare_cpus later, but
+        * we would appear to need an upper bound now.
+        */
+       smp_num_siblings = smtc_build_cpu_map(0);
 }
 
 static void __init msmtc_prepare_cpus(unsigned int max_cpus)
 {
-       mipsmt_prepare_cpus();
+       smtc_prepare_cpus(max_cpus);
 }
 
 struct plat_smp_ops msmtc_smp_ops = {
index 15e01aec37fdcab3e67e6e5d8390c925c138e20c..c8c32f417b6ce84c32087585456f6e78ae47e58b 100644 (file)
@@ -15,6 +15,7 @@ obj-$(CONFIG_SOC_TX3927)      += ops-tx3927.o
 obj-$(CONFIG_PCI_VR41XX)       += ops-vr41xx.o pci-vr41xx.o
 obj-$(CONFIG_MARKEINS)         += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
 obj-$(CONFIG_PCI_TX4927)       += ops-tx4927.o
+obj-$(CONFIG_BCM47XX)          += pci-bcm47xx.o
 
 #
 # These are still pretty much in the old state, watch, go blind.
diff --git a/arch/mips/pci/pci-bcm47xx.c b/arch/mips/pci/pci-bcm47xx.c
new file mode 100644 (file)
index 0000000..bea9b6c
--- /dev/null
@@ -0,0 +1,60 @@
+/*
+ *  Copyright (C) 2008 Aurelien Jarno <aurelien@aurel32.net>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/ssb/ssb.h>
+
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+       return 0;
+}
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+       int res;
+       u8 slot, pin;
+
+       res = ssb_pcibios_plat_dev_init(dev);
+       if (res < 0) {
+               printk(KERN_ALERT "PCI: Failed to init device %s\n",
+                      pci_name(dev));
+               return res;
+       }
+
+       pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+       slot = PCI_SLOT(dev->devfn);
+       res = ssb_pcibios_map_irq(dev, slot, pin);
+
+       /* IRQ-0 and IRQ-1 are software interrupts. */
+       if (res < 2) {
+               printk(KERN_ALERT "PCI: Failed to map IRQ of device %s\n",
+                      pci_name(dev));
+               return res;
+       }
+
+       dev->irq = res;
+       return 0;
+}
+
index bd78368c82bf2001a035a54bb9ff94942ba4cbd0..f97ab14610129bca9c2b696de7bd59f0dcb8d8f6 100644 (file)
@@ -142,26 +142,48 @@ int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)
  * on any one of the hubs connected to its xbow.
  */
 int __devinit pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+       return 0;
+}
+
+/* Most MIPS systems have straight-forward swizzling needs.  */
+static inline u8 bridge_swizzle(u8 pin, u8 slot)
+{
+       return (((pin - 1) + slot) % 4) + 1;
+}
+
+static inline struct pci_dev *bridge_root_dev(struct pci_dev *dev)
+{
+       while (dev->bus->parent) {
+               /* Move up the chain of bridges. */
+               dev = dev->bus->self;
+       }
+
+       return dev;
+}
+
+/* Do platform specific device initialization at pci_enable_device() time */
+int pcibios_plat_dev_init(struct pci_dev *dev)
 {
        struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
-       int irq = bc->pci_int[slot];
+       struct pci_dev *rdev = bridge_root_dev(dev);
+       int slot = PCI_SLOT(rdev->devfn);
+       int irq;
 
+       irq = bc->pci_int[slot];
        if (irq == -1) {
-               irq = bc->pci_int[slot] = request_bridge_irq(bc);
+               irq = request_bridge_irq(bc);
                if (irq < 0)
-                       panic("Can't allocate interrupt for PCI device %s\n",
-                             pci_name(dev));
+                       return irq;
+
+               bc->pci_int[slot] = irq;
        }
 
        irq_to_bridge[irq] = bc;
        irq_to_slot[irq] = slot;
 
-       return irq;
-}
+       dev->irq = irq;
 
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
        return 0;
 }
 
index f18ba9201bbcd7eda4a1336c545694f84841abcd..7b45f199d92a2d897f56af13fc1b4b9504c306b1 100644 (file)
@@ -1,3 +1,4 @@
-obj-y                          := setup.o rtc_xicor1241.o rtc_m41t81.o
+obj-y                          := platform.o setup.o rtc_xicor1241.o \
+                                  rtc_m41t81.o
 
 obj-$(CONFIG_I2C_BOARDINFO)    += swarm-i2c.o
diff --git a/arch/mips/sibyte/swarm/platform.c b/arch/mips/sibyte/swarm/platform.c
new file mode 100644 (file)
index 0000000..54847fe
--- /dev/null
@@ -0,0 +1,85 @@
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/ata_platform.h>
+
+#include <asm/sibyte/board.h>
+#include <asm/sibyte/sb1250_genbus.h>
+#include <asm/sibyte/sb1250_regs.h>
+
+#if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_LITTLESUR)
+
+#define DRV_NAME       "pata-swarm"
+
+#define SWARM_IDE_SHIFT        5
+#define SWARM_IDE_BASE 0x1f0
+#define SWARM_IDE_CTRL 0x3f6
+
+static struct resource swarm_pata_resource[] = {
+       {
+               .name   = "Swarm GenBus IDE",
+               .flags  = IORESOURCE_MEM,
+       }, {
+               .name   = "Swarm GenBus IDE",
+               .flags  = IORESOURCE_MEM,
+       }, {
+               .name   = "Swarm GenBus IDE",
+               .flags  = IORESOURCE_IRQ,
+               .start  = K_INT_GB_IDE,
+               .end    = K_INT_GB_IDE,
+       },
+};
+
+static struct pata_platform_info pata_platform_data = {
+       .ioport_shift   = SWARM_IDE_SHIFT,
+};
+
+static struct platform_device swarm_pata_device = {
+       .name           = "pata_platform",
+       .id             = -1,
+       .resource       = swarm_pata_resource,
+       .num_resources  = ARRAY_SIZE(swarm_pata_resource),
+       .dev  = {
+               .platform_data          = &pata_platform_data,
+               .coherent_dma_mask      = ~0,   /* grumble */
+       },
+};
+
+static int __init swarm_pata_init(void)
+{
+       u8 __iomem *base;
+       phys_t offset, size;
+       struct resource *r;
+
+       if (!SIBYTE_HAVE_IDE)
+               return -ENODEV;
+
+       base = ioremap(A_IO_EXT_BASE, 0x800);
+       offset = __raw_readq(base + R_IO_EXT_REG(R_IO_EXT_START_ADDR, IDE_CS));
+       size = __raw_readq(base + R_IO_EXT_REG(R_IO_EXT_MULT_SIZE, IDE_CS));
+       iounmap(base);
+
+       offset = G_IO_START_ADDR(offset) << S_IO_ADDRBASE;
+       size = (G_IO_MULT_SIZE(size) + 1) << S_IO_REGSIZE;
+       if (offset < A_PHYS_GENBUS || offset >= A_PHYS_GENBUS_END) {
+               pr_info(DRV_NAME ": PATA interface at GenBus disabled\n");
+
+               return -EBUSY;
+       }
+
+       pr_info(DRV_NAME ": PATA interface at GenBus slot %i\n", IDE_CS);
+
+       r = swarm_pata_resource;
+       r[0].start = offset + (SWARM_IDE_BASE << SWARM_IDE_SHIFT);
+       r[0].end   = offset + ((SWARM_IDE_BASE + 8) << SWARM_IDE_SHIFT) - 1;
+       r[1].start = offset + (SWARM_IDE_CTRL << SWARM_IDE_SHIFT);
+       r[1].end   = offset + ((SWARM_IDE_CTRL + 1) << SWARM_IDE_SHIFT) - 1;
+
+       return platform_device_register(&swarm_pata_device);
+}
+
+device_initcall(swarm_pata_init);
+
+#endif /* defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_LITTLESUR) */
index 761c434a2488fb39cd515d5232b109ade7443084..56c64ccc9c21cd2ee530baab8f0b7fcfbea5ce7c 100644 (file)
@@ -20,22 +20,8 @@ EXPORT_SYMBOL(__mn10300_irq_enabled_epsw);
 atomic_t irq_err_count;
 
 /*
- * MN10300 INTC controller operations
+ * MN10300 interrupt controller operations
  */
-static void mn10300_cpupic_disable(unsigned int irq)
-{
-       u16 tmp = GxICR(irq);
-       GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT;
-       tmp = GxICR(irq);
-}
-
-static void mn10300_cpupic_enable(unsigned int irq)
-{
-       u16 tmp = GxICR(irq);
-       GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
-       tmp = GxICR(irq);
-}
-
 static void mn10300_cpupic_ack(unsigned int irq)
 {
        u16 tmp;
@@ -60,26 +46,54 @@ static void mn10300_cpupic_mask_ack(unsigned int irq)
 static void mn10300_cpupic_unmask(unsigned int irq)
 {
        u16 tmp = GxICR(irq);
-       GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT;
+       GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
        tmp = GxICR(irq);
 }
 
-static void mn10300_cpupic_end(unsigned int irq)
+static void mn10300_cpupic_unmask_clear(unsigned int irq)
 {
+       /* the MN10300 PIC latches its interrupt request bit, even after the
+        * device has ceased to assert its interrupt line and the interrupt
+        * channel has been disabled in the PIC, so for level-triggered
+        * interrupts we need to clear the request bit when we re-enable */
        u16 tmp = GxICR(irq);
-       GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE;
+       GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT;
        tmp = GxICR(irq);
 }
 
-static struct irq_chip mn10300_cpu_pic = {
-       .name           = "cpu",
-       .disable        = mn10300_cpupic_disable,
-       .enable         = mn10300_cpupic_enable,
+/*
+ * MN10300 PIC level-triggered IRQ handling.
+ *
+ * The PIC has no 'ACK' function per se.  It is possible to clear individual
+ * channel latches, but each latch relatches whether or not the channel is
+ * masked, so we need to clear the latch when we unmask the channel.
+ *
+ * Also for this reason, we don't supply an ack() op (it's unused anyway if
+ * mask_ack() is provided), and mask_ack() just masks.
+ */
+static struct irq_chip mn10300_cpu_pic_level = {
+       .name           = "cpu_l",
+       .disable        = mn10300_cpupic_mask,
+       .enable         = mn10300_cpupic_unmask_clear,
+       .ack            = NULL,
+       .mask           = mn10300_cpupic_mask,
+       .mask_ack       = mn10300_cpupic_mask,
+       .unmask         = mn10300_cpupic_unmask_clear,
+};
+
+/*
+ * MN10300 PIC edge-triggered IRQ handling.
+ *
+ * We use the latch clearing function of the PIC as the 'ACK' function.
+ */
+static struct irq_chip mn10300_cpu_pic_edge = {
+       .name           = "cpu_e",
+       .disable        = mn10300_cpupic_mask,
+       .enable         = mn10300_cpupic_unmask,
        .ack            = mn10300_cpupic_ack,
        .mask           = mn10300_cpupic_mask,
        .mask_ack       = mn10300_cpupic_mask_ack,
        .unmask         = mn10300_cpupic_unmask,
-       .end            = mn10300_cpupic_end,
 };
 
 /*
@@ -114,7 +128,8 @@ void set_intr_level(int irq, u16 level)
  */
 void set_intr_postackable(int irq)
 {
-       set_irq_handler(irq, handle_level_irq);
+       set_irq_chip_and_handler(irq, &mn10300_cpu_pic_level,
+                                handle_level_irq);
 }
 
 /*
@@ -126,8 +141,12 @@ void __init init_IRQ(void)
 
        for (irq = 0; irq < NR_IRQS; irq++)
                if (irq_desc[irq].chip == &no_irq_type)
-                       set_irq_chip_and_handler(irq, &mn10300_cpu_pic,
-                                                handle_edge_irq);
+                       /* due to the PIC latching interrupt requests, even
+                        * when the IRQ is disabled, IRQ_PENDING is superfluous
+                        * and we can use handle_level_irq() for edge-triggered
+                        * interrupts */
+                       set_irq_chip_and_handler(irq, &mn10300_cpu_pic_edge,
+                                                handle_level_irq);
        unit_init_IRQ();
 }
 
index babb7c2ac37701be5065da1e9cba3d1659cf636c..e4606586f94ce5e08d35720ca8b4f7512db4aa34 100644 (file)
@@ -1,6 +1,6 @@
 /* MN10300 Low level time management
  *
- * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
+ * Copyright (C) 2007-2008 Red Hat, Inc. All Rights Reserved.
  * Written by David Howells (dhowells@redhat.com)
  * - Derived from arch/i386/kernel/time.c
  *
@@ -16,6 +16,7 @@
 #include <linux/init.h>
 #include <linux/smp.h>
 #include <linux/profile.h>
+#include <linux/cnt32_to_63.h>
 #include <asm/irq.h>
 #include <asm/div64.h>
 #include <asm/processor.h>
@@ -40,27 +41,54 @@ static struct irqaction timer_irq = {
        .name           = "timer",
 };
 
+static unsigned long sched_clock_multiplier;
+
 /*
  * scheduler clock - returns current time in nanosec units.
  */
 unsigned long long sched_clock(void)
 {
        union {
-               unsigned long long l;
-               u32 w[2];
-       } quot;
+               unsigned long long ll;
+               unsigned l[2];
+       } tsc64, result;
+       unsigned long tsc, tmp;
+       unsigned product[3]; /* 96-bit intermediate value */
+
+       /* read the TSC value
+        */
+       tsc = 0 - get_cycles(); /* get_cycles() counts down */
 
-       quot.w[0] = mn10300_last_tsc - get_cycles();
-       quot.w[1] = 1000000000;
+       /* expand to 64-bits.
+        * - sched_clock() must be called once a minute or better or the
+        *   following will go horribly wrong - see cnt32_to_63()
+        */
+       tsc64.ll = cnt32_to_63(tsc) & 0x7fffffffffffffffULL;
 
-       asm("mulu %2,%3,%0,%1"
-           : "=r"(quot.w[1]), "=r"(quot.w[0])
-           : "0"(quot.w[1]), "1"(quot.w[0])
+       /* scale the 64-bit TSC value to a nanosecond value via a 96-bit
+        * intermediate
+        */
+       asm("mulu       %2,%0,%3,%0     \n"     /* LSW * mult ->  0:%3:%0 */
+           "mulu       %2,%1,%2,%1     \n"     /* MSW * mult -> %2:%1:0 */
+           "add        %3,%1           \n"
+           "addc       0,%2            \n"     /* result in %2:%1:%0 */
+           : "=r"(product[0]), "=r"(product[1]), "=r"(product[2]), "=r"(tmp)
+           :  "0"(tsc64.l[0]),  "1"(tsc64.l[1]),  "2"(sched_clock_multiplier)
            : "cc");
 
-       do_div(quot.l, MN10300_TSCCLK);
+       result.l[0] = product[1] << 16 | product[0] >> 16;
+       result.l[1] = product[2] << 16 | product[1] >> 16;
 
-       return quot.l;
+       return result.ll;
+}
+
+/*
+ * initialise the scheduler clock
+ */
+static void __init mn10300_sched_clock_init(void)
+{
+       sched_clock_multiplier =
+               __muldiv64u(NSEC_PER_SEC, 1 << 16, MN10300_TSCCLK);
 }
 
 /*
@@ -128,4 +156,6 @@ void __init time_init(void)
        /* start the watchdog timer */
        watchdog_go();
 #endif
+
+       mn10300_sched_clock_init();
 }
index 14b2c817cff8a83e04a6b85be9de5513e7146599..70e8cb4ea266153e0d0217933ff84e4f61bed7e1 100644 (file)
@@ -51,7 +51,7 @@ void __init unit_init_IRQ(void)
                switch (GET_XIRQ_TRIGGER(extnum)) {
                case XIRQ_TRIGGER_HILEVEL:
                case XIRQ_TRIGGER_LOWLEVEL:
-                       set_irq_handler(XIRQ2IRQ(extnum), handle_level_irq);
+                       set_intr_postackable(XIRQ2IRQ(extnum));
                        break;
                default:
                        break;
index 6a352414a3584933b2192f5a391c337e0fddfd63..72812a9439ac0d26ea30f4cf2fc62099efc3735c 100644 (file)
@@ -52,7 +52,7 @@ void __init unit_init_IRQ(void)
                switch (GET_XIRQ_TRIGGER(extnum)) {
                case XIRQ_TRIGGER_HILEVEL:
                case XIRQ_TRIGGER_LOWLEVEL:
-                       set_irq_handler(XIRQ2IRQ(extnum), handle_level_irq);
+                       set_intr_postackable(XIRQ2IRQ(extnum));
                        break;
                default:
                        break;
index 717a3bc1352e542d410e3713e2222e7ea2745516..65d1a8454d2cfb11e54ffa3082c16bc3316bd4da 100644 (file)
@@ -195,7 +195,7 @@ image-$(CONFIG_PPC_CELLEB)          += zImage.pseries
 image-$(CONFIG_PPC_CHRP)               += zImage.chrp
 image-$(CONFIG_PPC_EFIKA)              += zImage.chrp
 image-$(CONFIG_PPC_PMAC)               += zImage.pmac
-image-$(CONFIG_PPC_HOLLY)              += zImage.holly
+image-$(CONFIG_PPC_HOLLY)              += dtbImage.holly
 image-$(CONFIG_PPC_PRPMC2800)          += dtbImage.prpmc2800
 image-$(CONFIG_PPC_ISERIES)            += zImage.iseries
 image-$(CONFIG_DEFAULT_UIMAGE)         += uImage
index f87fe7b9ced946e6e5a1ac699d97af48404397cb..c6e11ebecebbe46ccd57d2aaf0cc98c05b594c61 100644 (file)
                        reg = <0x00007400 0x00000400>;
                        big-endian;
                };
+       };
 
-               pci@1000 {
-                       device_type = "pci";
-                       compatible = "tsi109-pci", "tsi108-pci";
-                       #interrupt-cells = <1>;
-                       #size-cells = <2>;
-                       #address-cells = <3>;
-                       reg = <0x00001000 0x00001000>;
-                       bus-range = <0x0 0x0>;
-                       /*----------------------------------------------------+
-                       | PCI memory range.
-                       | 01 denotes I/O space
-                       | 02 denotes 32-bit memory space
-                       +----------------------------------------------------*/
-                       ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000
-                                 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>;
-                       clock-frequency = <133333332>;
-                       interrupt-parent = <&MPIC>;
+       pci@c0001000 {
+               device_type = "pci";
+               compatible = "tsi109-pci", "tsi108-pci";
+               #interrupt-cells = <1>;
+               #size-cells = <2>;
+               #address-cells = <3>;
+               reg = <0xc0001000 0x00001000>;
+               bus-range = <0x0 0x0>;
+               /*----------------------------------------------------+
+               | PCI memory range.
+               | 01 denotes I/O space
+               | 02 denotes 32-bit memory space
+               +----------------------------------------------------*/
+               ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000
+                         0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>;
+               clock-frequency = <133333332>;
+               interrupt-parent = <&MPIC>;
+               interrupts = <0x17 0x2>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               /*----------------------------------------------------+
+               | The INTA, INTB, INTC, INTD are shared.
+               +----------------------------------------------------*/
+               interrupt-map = <
+                       0x800 0x0 0x0 0x1 &RT0 0x24 0x0
+                       0x800 0x0 0x0 0x2 &RT0 0x25 0x0
+                       0x800 0x0 0x0 0x3 &RT0 0x26 0x0
+                       0x800 0x0 0x0 0x4 &RT0 0x27 0x0
+
+                       0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
+                       0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
+                       0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
+                       0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
+
+                       0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
+                       0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
+                       0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
+                       0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
+
+                       0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
+                       0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
+                       0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
+                       0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
+                       >;
+
+               RT0: router@1180 {
+                       device_type = "pic-router";
+                       interrupt-controller;
+                       big-endian;
+                       clock-frequency = <0>;
+                       #address-cells = <0>;
+                       #interrupt-cells = <2>;
                        interrupts = <0x17 0x2>;
-                       interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                       /*----------------------------------------------------+
-                       | The INTA, INTB, INTC, INTD are shared.
-                       +----------------------------------------------------*/
-                       interrupt-map = <
-                               0x800 0x0 0x0 0x1 &RT0 0x24 0x0
-                               0x800 0x0 0x0 0x2 &RT0 0x25 0x0
-                               0x800 0x0 0x0 0x3 &RT0 0x26 0x0
-                               0x800 0x0 0x0 0x4 &RT0 0x27 0x0
-
-                               0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
-                               0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
-                               0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
-                               0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
-
-                               0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
-                               0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
-                               0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
-                               0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
-
-                               0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
-                               0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
-                               0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
-                               0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
-                               >;
-
-                       RT0: router@1180 {
-                               device_type = "pic-router";
-                               interrupt-controller;
-                               big-endian;
-                               clock-frequency = <0>;
-                               #address-cells = <0>;
-                               #interrupt-cells = <2>;
-                               interrupts = <0x17 0x2>;
-                               interrupt-parent = <&MPIC>;
-                       };
+                       interrupt-parent = <&MPIC>;
                };
        };
 
index 3b3a1062cb250886e7d056169ab5e343afe14d5d..584a4f184eb26cddbac0d50c7feb52f406ab7e05 100644 (file)
                                cell-index = <0>;
                                reg = <0x0 0x80>;
                                interrupt-parent = <&mpic>;
-                               interrupts = <60 2>;
+                               interrupts = <76 2>;
                        };
                        dma-channel@1 {
                                compatible = "fsl,mpc8610-dma-channel",
                                cell-index = <1>;
                                reg = <0x80 0x80>;
                                interrupt-parent = <&mpic>;
-                               interrupts = <61 2>;
+                               interrupts = <77 2>;
                        };
                        dma-channel@2 {
                                compatible = "fsl,mpc8610-dma-channel",
                                cell-index = <2>;
                                reg = <0x100 0x80>;
                                interrupt-parent = <&mpic>;
-                               interrupts = <62 2>;
+                               interrupts = <78 2>;
                        };
                        dma-channel@3 {
                                compatible = "fsl,mpc8610-dma-channel",
                                cell-index = <3>;
                                reg = <0x180 0x80>;
                                interrupt-parent = <&mpic>;
-                               interrupts = <63 2>;
+                               interrupts = <79 2>;
                        };
                };
 
index 80d1f399ee513a944aae0b7366a55d588393fac9..64c6ee22eefd6ba4cb6dd5da54bd801440111c2a 100644 (file)
@@ -409,6 +409,13 @@ do {                                                                       \
 /* Keep this the last entry.  */
 #define R_PPC64_NUM            107
 
+/* There's actually a third entry here, but it's unused */
+struct ppc64_opd_entry
+{
+       unsigned long funcaddr;
+       unsigned long r2;
+};
+
 #ifdef  __KERNEL__
 
 #ifdef CONFIG_SPU_BASE
index 7710e9e6660fc52ef703c540a95b16a892ba3fca..07956f3e78444f5f63390d8d328c000af957061f 100644 (file)
@@ -2,6 +2,8 @@
 #define _ASM_POWERPC_SECTIONS_H
 #ifdef __KERNEL__
 
+#include <linux/elf.h>
+#include <linux/uaccess.h>
 #include <asm-generic/sections.h>
 
 #ifdef __powerpc64__
@@ -17,7 +19,15 @@ static inline int in_kernel_text(unsigned long addr)
 }
 
 #undef dereference_function_descriptor
-void *dereference_function_descriptor(void *);
+static inline void *dereference_function_descriptor(void *ptr)
+{
+       struct ppc64_opd_entry *desc = ptr;
+       void *p;
+
+       if (!probe_kernel_address(&desc->funcaddr, p))
+               ptr = p;
+       return ptr;
+}
 
 #endif
 
index d308a9f70f1b81b970ef0f13df10454f0deee3d9..31982d05d81a8814d73dfc8b5a562cd90b66e5d3 100644 (file)
 #include <asm/smp.h>
 
 #ifdef CONFIG_HOTPLUG_CPU
-/* this is used for software suspend, and that shuts down
- * CPUs even while the system is still booting... */
-#define cpu_should_die()       (cpu_is_offline(smp_processor_id()) && \
-                                  (system_state == SYSTEM_RUNNING     \
-                                || system_state == SYSTEM_BOOTING))
+#define cpu_should_die()       cpu_is_offline(smp_processor_id())
 #else
 #define cpu_should_die()       0
 #endif
index b4fdf2f2743ca6cb7497bba075f80b9b413d01dc..fe8f71dd0b3f1bd711ca4a480cdcdc2943007c9f 100644 (file)
@@ -347,9 +347,8 @@ int kgdb_arch_handle_exception(int vector, int signo, int err_code,
                        linux_regs->msr |= MSR_SE;
 #endif
                        kgdb_single_step = 1;
-                       if (kgdb_contthread)
-                               atomic_set(&kgdb_cpu_doing_single_step,
-                                          raw_smp_processor_id());
+                       atomic_set(&kgdb_cpu_doing_single_step,
+                                  raw_smp_processor_id());
                }
                return 0;
        }
index ad79de272ff3ec7f7ee14062f48eed082511e2e0..1af2377e49929dc367d49b4588fd2ba6d23d7e91 100644 (file)
@@ -21,9 +21,7 @@
 #include <linux/err.h>
 #include <linux/vmalloc.h>
 #include <linux/bug.h>
-#include <linux/uaccess.h>
 #include <asm/module.h>
-#include <asm/sections.h>
 #include <asm/firmware.h>
 #include <asm/code-patching.h>
 #include <linux/sort.h>
 #define DEBUGP(fmt , ...)
 #endif
 
-/* There's actually a third entry here, but it's unused */
-struct ppc64_opd_entry
-{
-       unsigned long funcaddr;
-       unsigned long r2;
-};
-
 /* Like PPC32, we need little trampolines to do > 24-bit jumps (into
    the kernel itself).  But on PPC64, these need to be used for every
    jump, actually, to reset r2 (TOC+0x8000). */
@@ -452,13 +443,3 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
 
        return 0;
 }
-
-void *dereference_function_descriptor(void *ptr)
-{
-       struct ppc64_opd_entry *desc = ptr;
-       void *p;
-
-       if (!probe_kernel_address(&desc->funcaddr, p))
-               ptr = p;
-       return ptr;
-}
index ef74a0763ec124a063c67992b99ac9e8f6d6f316..8c619963becceed0ac702c5b4662387adcbe720f 100644 (file)
@@ -219,11 +219,21 @@ static void __devinit quirk_final_uli5249(struct pci_dev *dev)
        int i;
        u8 *dummy;
        struct pci_bus *bus = dev->bus;
+       resource_size_t end = 0;
+
+       for (i = PCI_BRIDGE_RESOURCES; i < PCI_BRIDGE_RESOURCES+3; i++) {
+               unsigned long flags = pci_resource_flags(dev, i);
+               if ((flags & (IORESOURCE_MEM|IORESOURCE_PREFETCH)) == IORESOURCE_MEM)
+                       end = pci_resource_end(dev, i);
+       }
 
        for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
                if ((bus->resource[i]) &&
                        (bus->resource[i]->flags & IORESOURCE_MEM)) {
-                       dummy = ioremap(bus->resource[i]->end - 3, 0x4);
+                       if (bus->resource[i]->end == end)
+                               dummy = ioremap(bus->resource[i]->start, 0x4);
+                       else
+                               dummy = ioremap(bus->resource[i]->end - 3, 0x4);
                        if (dummy) {
                                in_8(dummy);
                                iounmap(dummy);
index ca114fe46ffbd5ed69033d37ebd13783c2f2a5f1..06acb1a18bbcb44458a8f04da85f00f54345ca1b 100644 (file)
@@ -169,6 +169,8 @@ void init_cpu_timer(void)
 
 static void clock_comparator_interrupt(__u16 code)
 {
+       if (S390_lowcore.clock_comparator == -1ULL)
+               set_clock_comparator(S390_lowcore.clock_comparator);
 }
 
 static void etr_timing_alert(struct etr_irq_parm *);
index fc6ab6094df811c4511b37ceb7d9783170d98e5a..0953cee05efc2d40cefcf8819c650de563462f6b 100644 (file)
@@ -1,14 +1,9 @@
 /*
- *  arch/s390/lib/delay.c
  *    Precise Delay Loops for S390
  *
- *  S390 version
- *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
- *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- *
- *  Derived from "arch/i386/lib/delay.c"
- *    Copyright (C) 1993 Linus Torvalds
- *    Copyright (C) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
+ *    Copyright IBM Corp. 1999,2008
+ *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ *              Heiko Carstens <heiko.carstens@de.ibm.com>,
  */
 
 #include <linux/sched.h>
@@ -29,30 +24,31 @@ void __delay(unsigned long loops)
        asm volatile("0: brct %0,0b" : : "d" ((loops/2) + 1));
 }
 
-/*
- * Waits for 'usecs' microseconds using the TOD clock comparator.
- */
-void __udelay(unsigned long usecs)
+static void __udelay_disabled(unsigned long usecs)
 {
-       u64 end, time, old_cc = 0;
-       unsigned long flags, cr0, mask, dummy;
-       int irq_context;
+       unsigned long mask, cr0, cr0_saved;
+       u64 clock_saved;
 
-       irq_context = in_interrupt();
-       if (!irq_context)
-               local_bh_disable();
-       local_irq_save(flags);
-       if (raw_irqs_disabled_flags(flags)) {
-               old_cc = local_tick_disable();
-               S390_lowcore.clock_comparator = -1ULL;
-               __ctl_store(cr0, 0, 0);
-               dummy = (cr0 & 0xffff00e0) | 0x00000800;
-               __ctl_load(dummy , 0, 0);
-               mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_EXT;
-       } else
-               mask = psw_kernel_bits | PSW_MASK_WAIT |
-                       PSW_MASK_EXT | PSW_MASK_IO;
+       clock_saved = local_tick_disable();
+       set_clock_comparator(get_clock() + ((u64) usecs << 12));
+       __ctl_store(cr0_saved, 0, 0);
+       cr0 = (cr0_saved & 0xffff00e0) | 0x00000800;
+       __ctl_load(cr0 , 0, 0);
+       mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_EXT;
+       trace_hardirqs_on();
+       __load_psw_mask(mask);
+       local_irq_disable();
+       __ctl_load(cr0_saved, 0, 0);
+       local_tick_enable(clock_saved);
+       set_clock_comparator(S390_lowcore.clock_comparator);
+}
 
+static void __udelay_enabled(unsigned long usecs)
+{
+       unsigned long mask;
+       u64 end, time;
+
+       mask = psw_kernel_bits | PSW_MASK_WAIT | PSW_MASK_EXT | PSW_MASK_IO;
        end = get_clock() + ((u64) usecs << 12);
        do {
                time = end < S390_lowcore.clock_comparator ?
@@ -62,13 +58,37 @@ void __udelay(unsigned long usecs)
                __load_psw_mask(mask);
                local_irq_disable();
        } while (get_clock() < end);
+       set_clock_comparator(S390_lowcore.clock_comparator);
+}
 
-       if (raw_irqs_disabled_flags(flags)) {
-               __ctl_load(cr0, 0, 0);
-               local_tick_enable(old_cc);
+/*
+ * Waits for 'usecs' microseconds using the TOD clock comparator.
+ */
+void __udelay(unsigned long usecs)
+{
+       unsigned long flags;
+
+       preempt_disable();
+       local_irq_save(flags);
+       if (in_irq()) {
+               __udelay_disabled(usecs);
+               goto out;
+       }
+       if (in_softirq()) {
+               if (raw_irqs_disabled_flags(flags))
+                       __udelay_disabled(usecs);
+               else
+                       __udelay_enabled(usecs);
+               goto out;
        }
-       if (!irq_context)
+       if (raw_irqs_disabled_flags(flags)) {
+               local_bh_disable();
+               __udelay_disabled(usecs);
                _local_bh_enable();
-       set_clock_comparator(S390_lowcore.clock_comparator);
+               goto out;
+       }
+       __udelay_enabled(usecs);
+out:
        local_irq_restore(flags);
+       preempt_enable();
 }
index 23963882bc18f203cd27850300cbb80755df025e..7495bc774685d53df0385bebec0cad80e4a9e27d 100644 (file)
@@ -7,6 +7,7 @@
 
 #include <linux/module.h>
 #include <linux/sched.h>
+#include <linux/linkage.h>
 #include <linux/ptrace.h>
 #include <linux/errno.h>
 #include <linux/kernel_stat.h>
@@ -866,7 +867,7 @@ static void kill_prom_timer(void)
        : "g1", "g2");
 }
 
-void init_irqwork_curcpu(void)
+void notrace init_irqwork_curcpu(void)
 {
        int cpu = hard_smp_processor_id();
 
@@ -897,7 +898,7 @@ static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type
        }
 }
 
-void __cpuinit sun4v_register_mondo_queues(int this_cpu)
+void __cpuinit notrace sun4v_register_mondo_queues(int this_cpu)
 {
        struct trap_per_cpu *tb = &trap_block[this_cpu];
 
index f845f150f565b26a019dea86afa7a6b9d2970ce7..100ebd527499991f39b094709fe597fa77f571f6 100644 (file)
@@ -169,7 +169,7 @@ static unsigned long of_bus_default_get_flags(const u32 *addr, unsigned long fla
 
 static int of_bus_pci_match(struct device_node *np)
 {
-       if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) {
+       if (!strcmp(np->name, "pci")) {
                const char *model = of_get_property(np, "model", NULL);
 
                if (model && !strcmp(model, "SUNW,simba"))
@@ -200,7 +200,7 @@ static int of_bus_simba_match(struct device_node *np)
        /* Treat PCI busses lacking ranges property just like
         * simba.
         */
-       if (!strcmp(np->type, "pci") || !strcmp(np->type, "pciex")) {
+       if (!strcmp(np->name, "pci")) {
                if (!of_find_property(np, "ranges", NULL))
                        return 1;
        }
@@ -429,7 +429,7 @@ static int __init use_1to1_mapping(struct device_node *pp)
         * it lacks a ranges property, and this will include
         * cases like Simba.
         */
-       if (!strcmp(pp->type, "pci") || !strcmp(pp->type, "pciex"))
+       if (!strcmp(pp->name, "pci"))
                return 0;
 
        return 1;
@@ -714,8 +714,7 @@ static unsigned int __init build_one_device_irq(struct of_device *op,
                                break;
                        }
                } else {
-                       if (!strcmp(pp->type, "pci") ||
-                           !strcmp(pp->type, "pciex")) {
+                       if (!strcmp(pp->name, "pci")) {
                                unsigned int this_orig_irq = irq;
 
                                irq = pci_irq_swizzle(dp, pp, irq);
index 55096195458fa0d358364075c5c7f06617112a55..80dad76f8b81c24b55cc3d26177cae9b7fa7ca79 100644 (file)
@@ -425,7 +425,7 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm,
        dev->current_state = 4;         /* unknown power state */
        dev->error_state = pci_channel_io_normal;
 
-       if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
+       if (!strcmp(node->name, "pci")) {
                /* a PCI-PCI bridge */
                dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
                dev->rom_base_reg = PCI_ROM_ADDRESS1;
index e205ade69cfc0392b4b702539b191ecfb5a1bc83..f85b6bebb0be1c7548366e982270ed4e85c3a320 100644 (file)
@@ -575,7 +575,7 @@ static irqreturn_t psycho_pcierr_intr_other(struct pci_pbm_info *pbm, int is_pbm
 {
        unsigned long csr_reg, csr, csr_error_bits;
        irqreturn_t ret = IRQ_NONE;
-       u16 stat;
+       u16 stat, *addr;
 
        if (is_pbm_a) {
                csr_reg = pbm->controller_regs + PSYCHO_PCIA_CTRL;
@@ -597,7 +597,9 @@ static irqreturn_t psycho_pcierr_intr_other(struct pci_pbm_info *pbm, int is_pbm
                        printk("%s: PCI SERR signal asserted.\n", pbm->name);
                ret = IRQ_HANDLED;
        }
-       pci_read_config_word(pbm->pci_bus->self, PCI_STATUS, &stat);
+       addr = psycho_pci_config_mkaddr(pbm, pbm->pci_first_busno,
+                                       0, PCI_STATUS);
+       pci_config_read16(addr, &stat);
        if (stat & (PCI_STATUS_PARITY |
                    PCI_STATUS_SIG_TARGET_ABORT |
                    PCI_STATUS_REC_TARGET_ABORT |
@@ -605,7 +607,7 @@ static irqreturn_t psycho_pcierr_intr_other(struct pci_pbm_info *pbm, int is_pbm
                    PCI_STATUS_SIG_SYSTEM_ERROR)) {
                printk("%s: PCI bus error, PCI_STATUS[%04x]\n",
                       pbm->name, stat);
-               pci_write_config_word(pbm->pci_bus->self, PCI_STATUS, 0xffff);
+               pci_config_write16(addr, 0xffff);
                ret = IRQ_HANDLED;
        }
        return ret;
index 3d924121c7960dd5b577c291a9a2dd716a272b2d..c824df13f589a31bdd048ddc1464f8d7e1c9e6d9 100644 (file)
@@ -10,6 +10,7 @@
 
 #include <linux/module.h>
 #include <linux/sched.h>
+#include <linux/linkage.h>
 #include <linux/kernel.h>
 #include <linux/signal.h>
 #include <linux/smp.h>
@@ -2453,7 +2454,7 @@ struct trap_per_cpu trap_block[NR_CPUS];
 /* This can get invoked before sched_init() so play it super safe
  * and use hard_smp_processor_id().
  */
-void init_cur_cpu_trap(struct thread_info *t)
+void notrace init_cur_cpu_trap(struct thread_info *t)
 {
        int cpu = hard_smp_processor_id();
        struct trap_per_cpu *p = &trap_block[cpu];
index a1310c52fc0c6ac6bf97feb276700e9f0662793e..857e492c571e05ac7714d4b54144acc9560110e1 100644 (file)
@@ -492,7 +492,7 @@ static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym))
                        continue;
                }
                sh_symtab = sec_symtab->symtab;
-               sym_strtab = sec->link->strtab;
+               sym_strtab = sec_symtab->link->strtab;
                for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Rel); j++) {
                        Elf32_Rel *rel;
                        Elf32_Sym *sym;
index bfd10fd211cd30f4e0867c8bbfd8458461aec3c8..c102af85df9ca4443b9b4a12db8b77ceccf90a82 100644 (file)
@@ -1603,6 +1603,14 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = {
         * is not connected at all.  Force ignoring BIOS IRQ0 pin2
         * override in that cases.
         */
+       {
+        .callback = dmi_ignore_irq0_timer_override,
+        .ident = "HP nx6115 laptop",
+        .matches = {
+                    DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
+                    DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"),
+                    },
+        },
        {
         .callback = dmi_ignore_irq0_timer_override,
         .ident = "HP NX6125 laptop",
@@ -1619,6 +1627,14 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = {
                     DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"),
                     },
         },
+       {
+        .callback = dmi_ignore_irq0_timer_override,
+        .ident = "HP 6715b laptop",
+        .matches = {
+                    DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
+                    DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"),
+                    },
+        },
        {}
 };
 
index 69b4d060b21c4c32e8e40b45c9dc2171c1b56505..042fdc27bc925cd5719c73b443a39b5a3c1456d9 100644 (file)
@@ -101,10 +101,10 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
  */
 static int iommu_completion_wait(struct amd_iommu *iommu)
 {
-       int ret, ready = 0;
+       int ret = 0, ready = 0;
        unsigned status = 0;
        struct iommu_cmd cmd;
-       unsigned long i = 0;
+       unsigned long flags, i = 0;
 
        memset(&cmd, 0, sizeof(cmd));
        cmd.data[0] = CMD_COMPL_WAIT_INT_MASK;
@@ -112,10 +112,12 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
 
        iommu->need_sync = 0;
 
-       ret = iommu_queue_command(iommu, &cmd);
+       spin_lock_irqsave(&iommu->lock, flags);
+
+       ret = __iommu_queue_command(iommu, &cmd);
 
        if (ret)
-               return ret;
+               goto out;
 
        while (!ready && (i < EXIT_LOOP_COUNT)) {
                ++i;
@@ -130,6 +132,8 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
 
        if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit()))
                printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n");
+out:
+       spin_unlock_irqrestore(&iommu->lock, flags);
 
        return 0;
 }
@@ -140,6 +144,7 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
 static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
 {
        struct iommu_cmd cmd;
+       int ret;
 
        BUG_ON(iommu == NULL);
 
@@ -147,9 +152,11 @@ static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
        CMD_SET_TYPE(&cmd, CMD_INV_DEV_ENTRY);
        cmd.data[0] = devid;
 
+       ret = iommu_queue_command(iommu, &cmd);
+
        iommu->need_sync = 1;
 
-       return iommu_queue_command(iommu, &cmd);
+       return ret;
 }
 
 /*
@@ -159,6 +166,7 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
                u64 address, u16 domid, int pde, int s)
 {
        struct iommu_cmd cmd;
+       int ret;
 
        memset(&cmd, 0, sizeof(cmd));
        address &= PAGE_MASK;
@@ -171,9 +179,11 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
        if (pde) /* PDE bit - we wan't flush everything not only the PTEs */
                cmd.data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK;
 
+       ret = iommu_queue_command(iommu, &cmd);
+
        iommu->need_sync = 1;
 
-       return iommu_queue_command(iommu, &cmd);
+       return ret;
 }
 
 /*
index 9ee24e6bc4b0e5a661c4ac3dd669c60bf1f82a45..732d1f4e10ee641020f9af9b1851be4e9bbad99e 100644 (file)
 #include <asm/uaccess.h>
 #include <asm/desc.h>
 #include <asm/i8253.h>
+#include <asm/olpc.h>
 #include <asm/paravirt.h>
 #include <asm/reboot.h>
 
@@ -2217,7 +2218,7 @@ static int __init apm_init(void)
 
        dmi_check_system(apm_dmi_table);
 
-       if (apm_info.bios.version == 0 || paravirt_enabled()) {
+       if (apm_info.bios.version == 0 || paravirt_enabled() || machine_is_olpc()) {
                printk(KERN_INFO "apm: BIOS not found.\n");
                return -ENODEV;
        }
index 8aab8517642e7ba34c3c91da7403c4892b01b53d..4e456bd955bb8389c4c7536d23635fdc97ec67f5 100644 (file)
@@ -344,31 +344,15 @@ static void __init early_cpu_detect(void)
 
 /*
  * The NOPL instruction is supposed to exist on all CPUs with
- * family >= 6, unfortunately, that's not true in practice because
+ * family >= 6; unfortunately, that's not true in practice because
  * of early VIA chips and (more importantly) broken virtualizers that
- * are not easy to detect.  Hence, probe for it based on first
- * principles.
+ * are not easy to detect.  In the latter case it doesn't even *fail*
+ * reliably, so probing for it doesn't even work.  Disable it completely
+ * unless we can find a reliable way to detect all the broken cases.
  */
 static void __cpuinit detect_nopl(struct cpuinfo_x86 *c)
 {
-       const u32 nopl_signature = 0x888c53b1; /* Random number */
-       u32 has_nopl = nopl_signature;
-
        clear_cpu_cap(c, X86_FEATURE_NOPL);
-       if (c->x86 >= 6) {
-               asm volatile("\n"
-                            "1:      .byte 0x0f,0x1f,0xc0\n" /* nopl %eax */
-                            "2:\n"
-                            "        .section .fixup,\"ax\"\n"
-                            "3:      xor %0,%0\n"
-                            "        jmp 2b\n"
-                            "        .previous\n"
-                            _ASM_EXTABLE(1b,3b)
-                            : "+a" (has_nopl));
-
-               if (has_nopl == nopl_signature)
-                       set_cpu_cap(c, X86_FEATURE_NOPL);
-       }
 }
 
 static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
index f1685fb91fbd313058b92af93ee055af160a2447..b8e05ee4f7361a1dc57ce28ff9d2e5e5526f776d 100644 (file)
@@ -171,7 +171,7 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
        }
 
        if (c->x86 != 0xF) {
-               printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <cpufreq@lists.linux.org.uk>\n");
+               printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <cpufreq@vger.kernel.org>\n");
                return 0;
        }
 
index 15e13c01cc3621ce3d4d610ab34225437eb8f413..3b5f06423e7774f2801e31e811c631df90344e36 100644 (file)
@@ -26,7 +26,7 @@
 #include <asm/cpufeature.h>
 
 #define PFX            "speedstep-centrino: "
-#define MAINTAINER     "cpufreq@lists.linux.org.uk"
+#define MAINTAINER     "cpufreq@vger.kernel.org"
 
 #define dprintk(msg...) \
        cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-centrino", msg)
index b117d7f8a5640fe51091f46247671dff5d61524e..885c8265e6b5baf2178d3f8da74257635abf58d3 100644 (file)
@@ -834,7 +834,7 @@ static int __init enable_mtrr_cleanup_setup(char *str)
                enable_mtrr_cleanup = 1;
        return 0;
 }
-early_param("enble_mtrr_cleanup", enable_mtrr_cleanup_setup);
+early_param("enable_mtrr_cleanup", enable_mtrr_cleanup_setup);
 
 struct var_mtrr_state {
        unsigned long   range_startk;
index f2d43bc7551488a61390c27cd429a9721fefbc26..ff7d3b0124f1db07bbb0750ec0fe0e9237f66574 100644 (file)
@@ -139,6 +139,7 @@ static int __init create_setup_data_nodes(struct dentry *parent)
                if (PageHighMem(pg)) {
                        data = ioremap_cache(pa_data, sizeof(*data));
                        if (!data) {
+                               kfree(node);
                                error = -ENXIO;
                                goto err_dir;
                        }
index f47f0eb886b8ddeab27ec8a8fd319801c45ef503..10435a120d2227bffd79a3df193f4238049ce2b0 100644 (file)
@@ -69,6 +69,9 @@ static int gdb_x86vector = -1;
  */
 void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 {
+#ifndef CONFIG_X86_32
+       u32 *gdb_regs32 = (u32 *)gdb_regs;
+#endif
        gdb_regs[GDB_AX]        = regs->ax;
        gdb_regs[GDB_BX]        = regs->bx;
        gdb_regs[GDB_CX]        = regs->cx;
@@ -76,9 +79,9 @@ void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
        gdb_regs[GDB_SI]        = regs->si;
        gdb_regs[GDB_DI]        = regs->di;
        gdb_regs[GDB_BP]        = regs->bp;
-       gdb_regs[GDB_PS]        = regs->flags;
        gdb_regs[GDB_PC]        = regs->ip;
 #ifdef CONFIG_X86_32
+       gdb_regs[GDB_PS]        = regs->flags;
        gdb_regs[GDB_DS]        = regs->ds;
        gdb_regs[GDB_ES]        = regs->es;
        gdb_regs[GDB_CS]        = regs->cs;
@@ -94,6 +97,9 @@ void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
        gdb_regs[GDB_R13]       = regs->r13;
        gdb_regs[GDB_R14]       = regs->r14;
        gdb_regs[GDB_R15]       = regs->r15;
+       gdb_regs32[GDB_PS]      = regs->flags;
+       gdb_regs32[GDB_CS]      = regs->cs;
+       gdb_regs32[GDB_SS]      = regs->ss;
 #endif
        gdb_regs[GDB_SP]        = regs->sp;
 }
@@ -112,6 +118,9 @@ void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
  */
 void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
 {
+#ifndef CONFIG_X86_32
+       u32 *gdb_regs32 = (u32 *)gdb_regs;
+#endif
        gdb_regs[GDB_AX]        = 0;
        gdb_regs[GDB_BX]        = 0;
        gdb_regs[GDB_CX]        = 0;
@@ -129,8 +138,10 @@ void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
        gdb_regs[GDB_FS]        = 0xFFFF;
        gdb_regs[GDB_GS]        = 0xFFFF;
 #else
-       gdb_regs[GDB_PS]        = *(unsigned long *)(p->thread.sp + 8);
-       gdb_regs[GDB_PC]        = 0;
+       gdb_regs32[GDB_PS]      = *(unsigned long *)(p->thread.sp + 8);
+       gdb_regs32[GDB_CS]      = __KERNEL_CS;
+       gdb_regs32[GDB_SS]      = __KERNEL_DS;
+       gdb_regs[GDB_PC]        = p->thread.ip;
        gdb_regs[GDB_R8]        = 0;
        gdb_regs[GDB_R9]        = 0;
        gdb_regs[GDB_R10]       = 0;
@@ -153,6 +164,9 @@ void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
  */
 void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
 {
+#ifndef CONFIG_X86_32
+       u32 *gdb_regs32 = (u32 *)gdb_regs;
+#endif
        regs->ax                = gdb_regs[GDB_AX];
        regs->bx                = gdb_regs[GDB_BX];
        regs->cx                = gdb_regs[GDB_CX];
@@ -160,9 +174,9 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
        regs->si                = gdb_regs[GDB_SI];
        regs->di                = gdb_regs[GDB_DI];
        regs->bp                = gdb_regs[GDB_BP];
-       regs->flags             = gdb_regs[GDB_PS];
        regs->ip                = gdb_regs[GDB_PC];
 #ifdef CONFIG_X86_32
+       regs->flags             = gdb_regs[GDB_PS];
        regs->ds                = gdb_regs[GDB_DS];
        regs->es                = gdb_regs[GDB_ES];
        regs->cs                = gdb_regs[GDB_CS];
@@ -175,6 +189,9 @@ void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
        regs->r13               = gdb_regs[GDB_R13];
        regs->r14               = gdb_regs[GDB_R14];
        regs->r15               = gdb_regs[GDB_R15];
+       regs->flags             = gdb_regs32[GDB_PS];
+       regs->cs                = gdb_regs32[GDB_CS];
+       regs->ss                = gdb_regs32[GDB_SS];
 #endif
 }
 
@@ -378,10 +395,8 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code,
                if (remcomInBuffer[0] == 's') {
                        linux_regs->flags |= X86_EFLAGS_TF;
                        kgdb_single_step = 1;
-                       if (kgdb_contthread) {
-                               atomic_set(&kgdb_cpu_doing_single_step,
-                                          raw_smp_processor_id());
-                       }
+                       atomic_set(&kgdb_cpu_doing_single_step,
+                                  raw_smp_processor_id());
                }
 
                get_debugreg(dr6, 6);
@@ -440,12 +455,7 @@ static int __kgdb_notify(struct die_args *args, unsigned long cmd)
                return NOTIFY_DONE;
 
        case DIE_NMI_IPI:
-               if (atomic_read(&kgdb_active) != -1) {
-                       /* KGDB CPU roundup */
-                       kgdb_nmicallback(raw_smp_processor_id(), regs);
-                       was_in_debug_nmi[raw_smp_processor_id()] = 1;
-                       touch_nmi_watchdog();
-               }
+               /* Just ignore, we will handle the roundup on DIE_NMI. */
                return NOTIFY_DONE;
 
        case DIE_NMIUNKNOWN:
@@ -466,9 +476,15 @@ static int __kgdb_notify(struct die_args *args, unsigned long cmd)
 
        case DIE_DEBUG:
                if (atomic_read(&kgdb_cpu_doing_single_step) ==
-                       raw_smp_processor_id() &&
-                       user_mode(regs))
-                       return single_step_cont(regs, args);
+                   raw_smp_processor_id()) {
+                       if (user_mode(regs))
+                               return single_step_cont(regs, args);
+                       break;
+               } else if (test_thread_flag(TIF_SINGLESTEP))
+                       /* This means a user thread is single stepping
+                        * a system call which should be ignored
+                        */
+                       return NOTIFY_DONE;
                /* fall through */
        default:
                if (user_mode(regs))
index 49285f8fd4d54005d5efb9a9fad6bc498420e6d6..be33a5442d8205f958a0eb2ed5121b020b3ff32b 100644 (file)
@@ -626,7 +626,6 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
        struct pci_dev *dev;
        void *gatt;
        int i, error;
-       unsigned long start_pfn, end_pfn;
 
        printk(KERN_INFO "PCI-DMA: Disabling AGP.\n");
        aper_size = aper_base = info->aper_size = 0;
@@ -672,12 +671,6 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
        printk(KERN_INFO "PCI-DMA: aperture base @ %x size %u KB\n",
               aper_base, aper_size>>10);
 
-       /* need to map that range */
-       end_pfn = (aper_base>>PAGE_SHIFT) + (aper_size>>PAGE_SHIFT);
-       if (end_pfn > max_low_pfn_mapped) {
-               start_pfn = (aper_base>>PAGE_SHIFT);
-               init_memory_mapping(start_pfn<<PAGE_SHIFT, end_pfn<<PAGE_SHIFT);
-       }
        return 0;
 
  nommu:
@@ -727,7 +720,8 @@ void __init gart_iommu_init(void)
 {
        struct agp_kern_info info;
        unsigned long iommu_start;
-       unsigned long aper_size;
+       unsigned long aper_base, aper_size;
+       unsigned long start_pfn, end_pfn;
        unsigned long scratch;
        long i;
 
@@ -765,8 +759,16 @@ void __init gart_iommu_init(void)
                return;
        }
 
+       /* need to map that range */
+       aper_size = info.aper_size << 20;
+       aper_base = info.aper_base;
+       end_pfn = (aper_base>>PAGE_SHIFT) + (aper_size>>PAGE_SHIFT);
+       if (end_pfn > max_low_pfn_mapped) {
+               start_pfn = (aper_base>>PAGE_SHIFT);
+               init_memory_mapping(start_pfn<<PAGE_SHIFT, end_pfn<<PAGE_SHIFT);
+       }
+
        printk(KERN_INFO "PCI-DMA: using GART IOMMU.\n");
-       aper_size = info.aper_size * 1024 * 1024;
        iommu_size = check_iommu_size(info.aper_base, aper_size);
        iommu_pages = iommu_size >> PAGE_SHIFT;
 
index 7fc4d5b0a6a0f99a4d1d9c4df685a5a4d3a135bb..876e91890777ae9758e5efcb7dc72075a26e341e 100644 (file)
@@ -246,6 +246,14 @@ static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
        return 1;
 }
 
+static cpumask_t c1e_mask = CPU_MASK_NONE;
+static int c1e_detected;
+
+void c1e_remove_cpu(int cpu)
+{
+       cpu_clear(cpu, c1e_mask);
+}
+
 /*
  * C1E aware idle routine. We check for C1E active in the interrupt
  * pending message MSR. If we detect C1E, then we handle it the same
@@ -253,9 +261,6 @@ static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
  */
 static void c1e_idle(void)
 {
-       static cpumask_t c1e_mask = CPU_MASK_NONE;
-       static int c1e_detected;
-
        if (need_resched())
                return;
 
@@ -265,8 +270,10 @@ static void c1e_idle(void)
                rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
                if (lo & K8_INTP_C1E_ACTIVE_MASK) {
                        c1e_detected = 1;
-                       mark_tsc_unstable("TSC halt in C1E");
-                       printk(KERN_INFO "System has C1E enabled\n");
+                       if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
+                               mark_tsc_unstable("TSC halt in AMD C1E");
+                       printk(KERN_INFO "System has AMD C1E enabled\n");
+                       set_cpu_cap(&boot_cpu_data, X86_FEATURE_AMDC1E);
                }
        }
 
index 3b7a1ddcc0bce7eca8c989906fa377d4f0322f50..31f40b24bf5d72f4d62c204307a1bd826c726c32 100644 (file)
@@ -55,6 +55,7 @@
 #include <asm/tlbflush.h>
 #include <asm/cpu.h>
 #include <asm/kdebug.h>
+#include <asm/idle.h>
 
 asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
 
@@ -88,6 +89,7 @@ static void cpu_exit_clear(void)
        cpu_clear(cpu, cpu_callin_map);
 
        numa_remove_cpu(cpu);
+       c1e_remove_cpu(cpu);
 }
 
 /* We don't actually take CPU down, just spin without interrupts. */
index 71553b664e2af8601361a9af3413599b752a3e5c..e12e0e4dd2566c2959623d4475053c5fcbcd65d3 100644 (file)
@@ -93,6 +93,8 @@ DECLARE_PER_CPU(int, cpu_state);
 static inline void play_dead(void)
 {
        idle_task_exit();
+       c1e_remove_cpu(raw_smp_processor_id());
+
        mb();
        /* Ack it */
        __get_cpu_var(cpu_state) = CPU_DEAD;
index 362d4e7f2d389b81e345fa27b13db78e80c5980a..9838f2539dfc4cb93697a98a98752012b885a2d7 100644 (file)
@@ -670,6 +670,10 @@ void __init setup_arch(char **cmdline_p)
 
        parse_early_param();
 
+#ifdef CONFIG_X86_64
+       check_efer();
+#endif
+
 #if defined(CONFIG_VMI) && defined(CONFIG_X86_32)
        /*
         * Must be before kernel pagetables are setup
@@ -738,7 +742,6 @@ void __init setup_arch(char **cmdline_p)
 #else
        num_physpages = max_pfn;
 
-       check_efer();
 
        /* How many end-of-memory variables you have, grandma! */
        /* need this before calling reserve_initrd */
index 6ca515d6db543b9a7739b9f2f9ab39d181ed3f9b..edfb09f304795efea2858120d71533d1f20d5338 100644 (file)
@@ -235,7 +235,7 @@ static void vmi_write_ldt_entry(struct desc_struct *dt, int entry,
                                const void *desc)
 {
        u32 *ldt_entry = (u32 *)desc;
-       vmi_ops.write_idt_entry(dt, entry, ldt_entry[0], ldt_entry[1]);
+       vmi_ops.write_ldt_entry(dt, entry, ldt_entry[0], ldt_entry[1]);
 }
 
 static void vmi_load_sp0(struct tss_struct *tss,
index 0c029e8959c7f7221d4687b8465812393e1faff0..7766d36983fcd7440f82435bcfbbcd37c1d80a6b 100644 (file)
@@ -61,7 +61,7 @@ static void vsmp_irq_enable(void)
        native_restore_fl((flags | X86_EFLAGS_IF) & (~X86_EFLAGS_AC));
 }
 
-static unsigned __init vsmp_patch(u8 type, u16 clobbers, void *ibuf,
+static unsigned __init_or_module vsmp_patch(u8 type, u16 clobbers, void *ibuf,
                                  unsigned long addr, unsigned len)
 {
        switch (type) {
index d37f29376b0ce455ae3907051a58779f4b995a25..60ec1d08ff24b6a03917e957d707b183b1b776e6 100644 (file)
@@ -458,11 +458,7 @@ static void __init pagetable_init(void)
 {
        pgd_t *pgd_base = swapper_pg_dir;
 
-       paravirt_pagetable_setup_start(pgd_base);
-
        permanent_kmaps_init(pgd_base);
-
-       paravirt_pagetable_setup_done(pgd_base);
 }
 
 #ifdef CONFIG_ACPI_SLEEP
index 0227694f7dab9b156350eaef0e90f79e8ec2ecc4..8a5f1614a3d57cde8d7495c1b71f8e8542e99c64 100644 (file)
@@ -295,10 +295,12 @@ static void nmi_cpu_shutdown(void *dummy)
 
 static void nmi_shutdown(void)
 {
-       struct op_msrs *msrs = &get_cpu_var(cpu_msrs);
+       struct op_msrs *msrs;
+
        nmi_enabled = 0;
        on_each_cpu(nmi_cpu_shutdown, NULL, 1);
        unregister_die_notifier(&profile_exceptions_nb);
+       msrs = &get_cpu_var(cpu_msrs);
        model->shutdown(msrs);
        free_msrs();
        put_cpu_var(cpu_msrs);
index b6acc3a0af46d0adeb44a99a8b8d78e1ef8c5140..d679010838883195da63cfa7a7bbef7cfa71fe03 100644 (file)
@@ -42,7 +42,7 @@ char * __init xen_memory_setup(void)
 
        e820.nr_map = 0;
 
-       e820_add_region(0, PFN_PHYS(max_pfn), E820_RAM);
+       e820_add_region(0, PFN_PHYS((u64)max_pfn), E820_RAM);
 
        /*
         * Even though this is normal, usable memory under Xen, reserve
index 0a5f6b2114c592acb481641d0bbadebb7d06ae30..d672cfe7ca5960997949ebede8bda6cd1088bbb8 100644 (file)
@@ -376,6 +376,8 @@ int braille_register_console(struct console *console, int index,
        console->flags |= CON_ENABLED;
        console->index = index;
        braille_co = console;
+       register_keyboard_notifier(&keyboard_notifier_block);
+       register_vt_notifier(&vt_notifier_block);
        return 0;
 }
 
@@ -383,15 +385,8 @@ int braille_unregister_console(struct console *console)
 {
        if (braille_co != console)
                return -EINVAL;
+       unregister_keyboard_notifier(&keyboard_notifier_block);
+       unregister_vt_notifier(&vt_notifier_block);
        braille_co = NULL;
        return 0;
 }
-
-static int __init braille_init(void)
-{
-       register_keyboard_notifier(&keyboard_notifier_block);
-       register_vt_notifier(&vt_notifier_block);
-       return 0;
-}
-
-console_initcall(braille_init);
index 084109507c9f5101a1cdcf678db34005984a2855..8dd3336efd7e242209240010b7fa9710bb2ae6e8 100644 (file)
@@ -165,8 +165,11 @@ static int acpi_bind_one(struct device *dev, acpi_handle handle)
                                "firmware_node");
                ret = sysfs_create_link(&acpi_dev->dev.kobj, &dev->kobj,
                                "physical_node");
-               if (acpi_dev->wakeup.flags.valid)
+               if (acpi_dev->wakeup.flags.valid) {
                        device_set_wakeup_capable(dev, true);
+                       device_set_wakeup_enable(dev,
+                                               acpi_dev->wakeup.state.enabled);
+               }
        }
 
        return 0;
index 4ebbba2b6b194f4f6c6532ad698d9a0582e2519f..bf5b04de02d1c6e48123454656ab3f36e72bf8b7 100644 (file)
@@ -377,6 +377,14 @@ acpi_system_wakeup_device_seq_show(struct seq_file *seq, void *offset)
        return 0;
 }
 
+static void physical_device_enable_wakeup(struct acpi_device *adev)
+{
+       struct device *dev = acpi_get_physical_device(adev->handle);
+
+       if (dev && device_can_wakeup(dev))
+               device_set_wakeup_enable(dev, adev->wakeup.state.enabled);
+}
+
 static ssize_t
 acpi_system_write_wakeup_device(struct file *file,
                                const char __user * buffer,
@@ -411,6 +419,7 @@ acpi_system_write_wakeup_device(struct file *file,
                }
        }
        if (found_dev) {
+               physical_device_enable_wakeup(found_dev);
                list_for_each_safe(node, next, &acpi_wakeup_device_list) {
                        struct acpi_device *dev = container_of(node,
                                                               struct
@@ -428,6 +437,7 @@ acpi_system_write_wakeup_device(struct file *file,
                                       dev->pnp.bus_id, found_dev->pnp.bus_id);
                                dev->wakeup.state.enabled =
                                    found_dev->wakeup.state.enabled;
+                               physical_device_enable_wakeup(dev);
                        }
                }
        }
index 1e1f3f3757ae7bf98fd7ce2d39cfafdc644095f0..14601dc05e4162eeab2f544fd02da2738cd17db4 100644 (file)
@@ -309,6 +309,8 @@ static void nv_nf2_freeze(struct ata_port *ap);
 static void nv_nf2_thaw(struct ata_port *ap);
 static void nv_ck804_freeze(struct ata_port *ap);
 static void nv_ck804_thaw(struct ata_port *ap);
+static int nv_hardreset(struct ata_link *link, unsigned int *class,
+                       unsigned long deadline);
 static int nv_adma_slave_config(struct scsi_device *sdev);
 static int nv_adma_check_atapi_dma(struct ata_queued_cmd *qc);
 static void nv_adma_qc_prep(struct ata_queued_cmd *qc);
@@ -403,28 +405,45 @@ static struct scsi_host_template nv_swncq_sht = {
        .slave_configure        = nv_swncq_slave_config,
 };
 
-static struct ata_port_operations nv_generic_ops = {
+/* OSDL bz3352 reports that some nv controllers can't determine device
+ * signature reliably and nv_hardreset is implemented to work around
+ * the problem.  This was reported on nf3 and it's unclear whether any
+ * other controllers are affected.  However, the workaround has been
+ * applied to all variants and there isn't much to gain by trying to
+ * find out exactly which ones are affected at this point especially
+ * because NV has moved over to ahci for newer controllers.
+ */
+static struct ata_port_operations nv_common_ops = {
        .inherits               = &ata_bmdma_port_ops,
-       .hardreset              = ATA_OP_NULL,
+       .hardreset              = nv_hardreset,
        .scr_read               = nv_scr_read,
        .scr_write              = nv_scr_write,
 };
 
+/* OSDL bz11195 reports that link doesn't come online after hardreset
+ * on generic nv's and there have been several other similar reports
+ * on linux-ide.  Disable hardreset for generic nv's.
+ */
+static struct ata_port_operations nv_generic_ops = {
+       .inherits               = &nv_common_ops,
+       .hardreset              = ATA_OP_NULL,
+};
+
 static struct ata_port_operations nv_nf2_ops = {
-       .inherits               = &nv_generic_ops,
+       .inherits               = &nv_common_ops,
        .freeze                 = nv_nf2_freeze,
        .thaw                   = nv_nf2_thaw,
 };
 
 static struct ata_port_operations nv_ck804_ops = {
-       .inherits               = &nv_generic_ops,
+       .inherits               = &nv_common_ops,
        .freeze                 = nv_ck804_freeze,
        .thaw                   = nv_ck804_thaw,
        .host_stop              = nv_ck804_host_stop,
 };
 
 static struct ata_port_operations nv_adma_ops = {
-       .inherits               = &nv_generic_ops,
+       .inherits               = &nv_common_ops,
 
        .check_atapi_dma        = nv_adma_check_atapi_dma,
        .sff_tf_read            = nv_adma_tf_read,
@@ -448,7 +467,7 @@ static struct ata_port_operations nv_adma_ops = {
 };
 
 static struct ata_port_operations nv_swncq_ops = {
-       .inherits               = &nv_generic_ops,
+       .inherits               = &nv_common_ops,
 
        .qc_defer               = ata_std_qc_defer,
        .qc_prep                = nv_swncq_qc_prep,
@@ -1586,6 +1605,21 @@ static void nv_mcp55_thaw(struct ata_port *ap)
        ata_sff_thaw(ap);
 }
 
+static int nv_hardreset(struct ata_link *link, unsigned int *class,
+                       unsigned long deadline)
+{
+       int rc;
+
+       /* SATA hardreset fails to retrieve proper device signature on
+        * some controllers.  Request follow up SRST.  For more info,
+        * see http://bugzilla.kernel.org/show_bug.cgi?id=3352
+        */
+       rc = sata_sff_hardreset(link, class, deadline);
+       if (rc)
+               return rc;
+       return -EAGAIN;
+}
+
 static void nv_adma_error_handler(struct ata_port *ap)
 {
        struct nv_adma_port_priv *pp = ap->private_data;
index 1e55a658e6cefe0af8014bee290dc81f8b5a119d..32f3a8ed8d3d20e568e5547a48b559537de5fac1 100644 (file)
@@ -256,7 +256,6 @@ static inline int bpa10x_submit_intr_urb(struct hci_dev *hdev)
                BT_ERR("%s urb %p submission failed (%d)",
                                                hdev->name, urb, -err);
                usb_unanchor_urb(urb);
-               kfree(buf);
        }
 
        usb_free_urb(urb);
@@ -298,7 +297,6 @@ static inline int bpa10x_submit_bulk_urb(struct hci_dev *hdev)
                BT_ERR("%s urb %p submission failed (%d)",
                                                hdev->name, urb, -err);
                usb_unanchor_urb(urb);
-               kfree(buf);
        }
 
        usb_free_urb(urb);
index 6a010681ecf3d33f114bb78607e0d6f19d46b319..af472e05273296e664e8ddcb7fa443f4bc0e60e8 100644 (file)
@@ -102,14 +102,19 @@ static struct usb_device_id blacklist_table[] = {
        { USB_DEVICE(0x0a5c, 0x2101), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
 
        /* Broadcom BCM2046 */
+       { USB_DEVICE(0x0a5c, 0x2146), .driver_info = BTUSB_RESET },
        { USB_DEVICE(0x0a5c, 0x2151), .driver_info = BTUSB_RESET },
 
+       /* Apple MacBook Pro with Broadcom chip */
+       { USB_DEVICE(0x05ac, 0x820f), .driver_info = BTUSB_RESET },
+
        /* IBM/Lenovo ThinkPad with Broadcom chip */
        { USB_DEVICE(0x0a5c, 0x201e), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
        { USB_DEVICE(0x0a5c, 0x2110), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
 
        /* Targus ACB10US */
        { USB_DEVICE(0x0a5c, 0x2100), .driver_info = BTUSB_RESET },
+       { USB_DEVICE(0x0a5c, 0x2154), .driver_info = BTUSB_RESET },
 
        /* ANYCOM Bluetooth USB-200 and USB-250 */
        { USB_DEVICE(0x0a5c, 0x2111), .driver_info = BTUSB_RESET },
@@ -147,6 +152,9 @@ static struct usb_device_id blacklist_table[] = {
        { USB_DEVICE(0x050d, 0x0012), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
        { USB_DEVICE(0x050d, 0x0013), .driver_info = BTUSB_RESET | BTUSB_WRONG_SCO_MTU },
 
+       /* Belkin F8T016 device */
+       { USB_DEVICE(0x050d, 0x016a), .driver_info = BTUSB_RESET },
+
        /* Digianswer devices */
        { USB_DEVICE(0x08fd, 0x0001), .driver_info = BTUSB_DIGIANSWER },
        { USB_DEVICE(0x08fd, 0x0002), .driver_info = BTUSB_IGNORE },
@@ -169,6 +177,7 @@ static struct usb_device_id blacklist_table[] = {
 struct btusb_data {
        struct hci_dev       *hdev;
        struct usb_device    *udev;
+       struct usb_interface *intf;
        struct usb_interface *isoc;
 
        spinlock_t lock;
@@ -267,7 +276,6 @@ static int btusb_submit_intr_urb(struct hci_dev *hdev)
                BT_ERR("%s urb %p submission failed (%d)",
                                                hdev->name, urb, -err);
                usb_unanchor_urb(urb);
-               kfree(buf);
        }
 
        usb_free_urb(urb);
@@ -350,7 +358,6 @@ static int btusb_submit_bulk_urb(struct hci_dev *hdev)
                BT_ERR("%s urb %p submission failed (%d)",
                                                hdev->name, urb, -err);
                usb_unanchor_urb(urb);
-               kfree(buf);
        }
 
        usb_free_urb(urb);
@@ -471,7 +478,6 @@ static int btusb_submit_isoc_urb(struct hci_dev *hdev)
                BT_ERR("%s urb %p submission failed (%d)",
                                                hdev->name, urb, -err);
                usb_unanchor_urb(urb);
-               kfree(buf);
        }
 
        usb_free_urb(urb);
@@ -516,7 +522,7 @@ static int btusb_open(struct hci_dev *hdev)
 
        err = btusb_submit_intr_urb(hdev);
        if (err < 0) {
-               clear_bit(BTUSB_INTR_RUNNING, &hdev->flags);
+               clear_bit(BTUSB_INTR_RUNNING, &data->flags);
                clear_bit(HCI_RUNNING, &hdev->flags);
        }
 
@@ -532,8 +538,10 @@ static int btusb_close(struct hci_dev *hdev)
        if (!test_and_clear_bit(HCI_RUNNING, &hdev->flags))
                return 0;
 
+       cancel_work_sync(&data->work);
+
        clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
-       usb_kill_anchored_urbs(&data->intr_anchor);
+       usb_kill_anchored_urbs(&data->isoc_anchor);
 
        clear_bit(BTUSB_BULK_RUNNING, &data->flags);
        usb_kill_anchored_urbs(&data->bulk_anchor);
@@ -821,6 +829,7 @@ static int btusb_probe(struct usb_interface *intf,
        }
 
        data->udev = interface_to_usbdev(intf);
+       data->intf = intf;
 
        spin_lock_init(&data->lock);
 
@@ -889,7 +898,7 @@ static int btusb_probe(struct usb_interface *intf,