]> nv-tegra.nvidia Code Review - linux-2.6.git/commitdiff
[PATCH] ppc iomem annotations: ->io_base_virt
authorAl Viro <viro@www.linux.org.uk>
Mon, 25 Apr 2005 14:55:57 +0000 (07:55 -0700)
committerLinus Torvalds <torvalds@ppc970.osdl.org>
Mon, 25 Apr 2005 14:55:57 +0000 (07:55 -0700)
* ->io_base_virt in struct pci_controller is iomem pointer.  Marked as such.
  Most of the places that used it are already annotated to expect iomem.
* places that did gratitious (and wrong) casts a-la
isa_io_base = (unsigned long)ioremap(...);
hose->io_base_virt = (void *)isa_io_base;
  turned into
hose->io_base_virt = ioremap(...);
isa_io_base = (unsigned long)hose->io_base_virt;
* pci_bus_io_base() annotated as returning iomem pointer.

Signed-off-by: Al Viro <viro@parcelfarce.linux.theplanet.co.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
arch/ppc/kernel/pci.c
arch/ppc/platforms/4xx/ebony.c
arch/ppc/platforms/4xx/luan.c
arch/ppc/platforms/4xx/ocotea.c
arch/ppc/syslib/m8260_pci.c
arch/ppc/syslib/mpc52xx_pci.c
arch/ppc/syslib/ppc85xx_setup.c
include/asm-ppc/pci-bridge.h

index 98f94b60204cc61026b52d5c711d3284ade48d47..47a15306823ae4d603a262e6dfa1dffbd9b55740 100644 (file)
@@ -1432,7 +1432,7 @@ pci_bus_to_hose(int bus)
        return NULL;
 }
 
-void*
+void __iomem *
 pci_bus_io_base(unsigned int bus)
 {
        struct pci_controller *hose;
index f63bca83e757cd203b855037e1c06ce308d0b5da..55120c317f7d3948dbfe86a91a065b2865840c16 100644 (file)
@@ -210,9 +210,8 @@ ebony_setup_hose(void)
        hose->io_space.end = EBONY_PCI_UPPER_IO;
        hose->mem_space.start = EBONY_PCI_LOWER_MEM;
        hose->mem_space.end = EBONY_PCI_UPPER_MEM;
-       isa_io_base =
-               (unsigned long)ioremap64(EBONY_PCI_IO_BASE, EBONY_PCI_IO_SIZE);
-       hose->io_base_virt = (void *)isa_io_base;
+       hose->io_base_virt = ioremap64(EBONY_PCI_IO_BASE, EBONY_PCI_IO_SIZE);
+       isa_io_base = (unsigned long)hose->io_base_virt;
 
        setup_indirect_pci(hose,
                        EBONY_PCI_CFGA_PLB32,
index 1df2339f1f6cf7856901488b05af02cc11df50c7..95359f748e7b4374fa5a0a8f4d51b950919fe79d 100644 (file)
@@ -223,9 +223,8 @@ luan_setup_hose(struct pci_controller *hose,
        hose->io_space.end = LUAN_PCIX_UPPER_IO;
        hose->mem_space.start = lower_mem;
        hose->mem_space.end = upper_mem;
-       isa_io_base =
-               (unsigned long)ioremap64(pcix_io_base, PCIX_IO_SIZE);
-       hose->io_base_virt = (void *)isa_io_base;
+       hose->io_base_virt = ioremap64(pcix_io_base, PCIX_IO_SIZE);
+       isa_io_base = (unsigned long) hose->io_base_virt;
 
        setup_indirect_pci(hose, cfga, cfgd);
        hose->set_cfg_type = 1;
index 28de707434f12693dda28e730ea366ed89286512..5f82a6bc7046b3c0dcb4d93eb9cb2e817a4158b7 100644 (file)
@@ -227,9 +227,8 @@ ocotea_setup_hose(void)
        hose->io_space.end = OCOTEA_PCI_UPPER_IO;
        hose->mem_space.start = OCOTEA_PCI_LOWER_MEM;
        hose->mem_space.end = OCOTEA_PCI_UPPER_MEM;
-       isa_io_base =
-               (unsigned long)ioremap64(OCOTEA_PCI_IO_BASE, OCOTEA_PCI_IO_SIZE);
-       hose->io_base_virt = (void *)isa_io_base;
+       hose->io_base_virt = ioremap64(OCOTEA_PCI_IO_BASE, OCOTEA_PCI_IO_SIZE);
+       isa_io_base = (unsigned long) hose->io_base_virt;
 
        setup_indirect_pci(hose,
                        OCOTEA_PCI_CFGA_PLB32,
index bd564fb35ab6c3e94077f9e5ea99d7b6315bfebb..057cc3f8ff378c0de881482d55b47255e3c5ea72 100644 (file)
@@ -171,10 +171,9 @@ void __init m8260_find_bridges(void)
        m8260_setup_pci(hose);
         hose->pci_mem_offset = MPC826x_PCI_MEM_OFFSET;
 
-        isa_io_base =
-                (unsigned long) ioremap(MPC826x_PCI_IO_BASE,
+        hose->io_base_virt = ioremap(MPC826x_PCI_IO_BASE,
                                         MPC826x_PCI_IO_SIZE);
-        hose->io_base_virt = (void *) isa_io_base;
+        isa_io_base = (unsigned long) hose->io_base_virt;
  
         /* setup resources */
         pci_init_resource(&hose->mem_resources[0],
index c723efd954a6a0ea831f6e2529450201a4872897..59cf3e8bd1a0a0c57c1b8f68adca4291eb4a19fe 100644 (file)
@@ -205,13 +205,11 @@ mpc52xx_find_bridges(void)
 
        hose->pci_mem_offset = MPC52xx_PCI_MEM_OFFSET;
 
-       isa_io_base =
-               (unsigned long) ioremap(MPC52xx_PCI_IO_BASE,
-                                       MPC52xx_PCI_IO_SIZE);
-       hose->io_base_virt = (void *) isa_io_base;
+       hose->io_base_virt = ioremap(MPC52xx_PCI_IO_BASE, MPC52xx_PCI_IO_SIZE);
+       isa_io_base = (unsigned long) hose->io_base_virt;
 
        hose->cfg_addr = &pci_regs->car;
-       hose->cfg_data = (void __iomem *) isa_io_base;
+       hose->cfg_data = hose->io_base_virt;
 
        /* Setup resources */
        pci_init_resource(&hose->mem_resources[0],
index 81f1968c326917b501794be9bc1e8f2b7cfe9a20..152c3ef1312aa052072b25d86db7334583c74280 100644 (file)
@@ -280,16 +280,14 @@ mpc85xx_setup_hose(void)
        hose_a->io_space.end = MPC85XX_PCI1_UPPER_IO;
        hose_a->io_base_phys = MPC85XX_PCI1_IO_BASE;
 #ifdef CONFIG_85xx_PCI2
-       isa_io_base =
-               (unsigned long) ioremap(MPC85XX_PCI1_IO_BASE,
+       hose_a->io_base_virt =  ioremap(MPC85XX_PCI1_IO_BASE,
                                        MPC85XX_PCI1_IO_SIZE +
                                        MPC85XX_PCI2_IO_SIZE);
 #else
-       isa_io_base =
-               (unsigned long) ioremap(MPC85XX_PCI1_IO_BASE,
+       hose_a->io_base_virt =  ioremap(MPC85XX_PCI1_IO_BASE,
                                        MPC85XX_PCI1_IO_SIZE);
 #endif
-       hose_a->io_base_virt = (void *) isa_io_base;
+       isa_io_base = (unsigned long)hose_a->io_base_virt;
 
        /* setup resources */
        pci_init_resource(&hose_a->mem_resources[0],
@@ -329,8 +327,8 @@ mpc85xx_setup_hose(void)
        hose_b->io_space.start = MPC85XX_PCI2_LOWER_IO;
        hose_b->io_space.end = MPC85XX_PCI2_UPPER_IO;
        hose_b->io_base_phys = MPC85XX_PCI2_IO_BASE;
-       hose_b->io_base_virt = (void *) isa_io_base + MPC85XX_PCI1_IO_SIZE;
-
+       hose_b->io_base_virt = hose_a->io_base_virt + MPC85XX_PCI1_IO_SIZE;
+       
        /* setup resources */
        pci_init_resource(&hose_b->mem_resources[0],
                        MPC85XX_PCI2_LOWER_MEM,
index 78e9be619f14630a5c6af34f3ff4e5415bc0db77..ffa423456c2ba7eeae7af7e8de7738f08d614423 100644 (file)
@@ -12,7 +12,7 @@ struct pci_controller;
  * pci_io_base returns the memory address at which you can access
  * the I/O space for PCI bus number `bus' (or NULL on error).
  */
-extern void *pci_bus_io_base(unsigned int bus);
+extern void __iomem *pci_bus_io_base(unsigned int bus);
 extern unsigned long pci_bus_io_base_phys(unsigned int bus);
 extern unsigned long pci_bus_mem_base_phys(unsigned int bus);
 
@@ -48,7 +48,7 @@ struct pci_controller {
        int last_busno;
        int bus_offset;
 
-       void *io_base_virt;
+       void __iomem *io_base_virt;
        unsigned long io_base_phys;
 
        /* Some machines (PReP) have a non 1:1 mapping of