]> nv-tegra.nvidia Code Review - linux-2.6.git/commitdiff
Merge branch 'master' into for-linus
authorRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 8 Mar 2010 20:24:11 +0000 (20:24 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 8 Mar 2010 20:24:11 +0000 (20:24 +0000)
arch/arm/boot/compressed/head.S
arch/arm/boot/compressed/vmlinux.lds.in
arch/arm/kernel/unwind.c
arch/arm/mach-ux500/include/mach/hardware.h
drivers/mtd/maps/pismo.c

index 99b75aa1c2ec734ffa438b0aeada6d8266adb0e0..535a91daaa533b9ff91193bb2f5cfb7f3e6a41a9 100644 (file)
@@ -170,8 +170,8 @@ not_angel:
 
                .text
                adr     r0, LC0
- ARM(          ldmia   r0, {r1, r2, r3, r4, r5, r6, ip, sp}    )
- THUMB(                ldmia   r0, {r1, r2, r3, r4, r5, r6, ip}        )
+ ARM(          ldmia   r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp})
+ THUMB(                ldmia   r0, {r1, r2, r3, r4, r5, r6, r11, ip}   )
  THUMB(                ldr     sp, [r0, #28]                           )
                subs    r0, r0, r1              @ calculate the delta offset
 
@@ -182,12 +182,13 @@ not_angel:
                /*
                 * We're running at a different address.  We need to fix
                 * up various pointers:
-                *   r5 - zImage base address
-                *   r6 - GOT start
+                *   r5 - zImage base address (_start)
+                *   r6 - size of decompressed image
+                *   r11 - GOT start
                 *   ip - GOT end
                 */
                add     r5, r5, r0
-               add     r6, r6, r0
+               add     r11, r11, r0
                add     ip, ip, r0
 
 #ifndef CONFIG_ZBOOT_ROM
@@ -205,10 +206,10 @@ not_angel:
                /*
                 * Relocate all entries in the GOT table.
                 */
-1:             ldr     r1, [r6, #0]            @ relocate entries in the GOT
+1:             ldr     r1, [r11, #0]           @ relocate entries in the GOT
                add     r1, r1, r0              @ table.  This fixes up the
-               str     r1, [r6], #4            @ C references.
-               cmp     r6, ip
+               str     r1, [r11], #4           @ C references.
+               cmp     r11, ip
                blo     1b
 #else
 
@@ -216,12 +217,12 @@ not_angel:
                 * Relocate entries in the GOT table.  We only relocate
                 * the entries that are outside the (relocated) BSS region.
                 */
-1:             ldr     r1, [r6, #0]            @ relocate entries in the GOT
+1:             ldr     r1, [r11, #0]           @ relocate entries in the GOT
                cmp     r1, r2                  @ entry < bss_start ||
                cmphs   r3, r1                  @ _end < entry
                addlo   r1, r1, r0              @ table.  This fixes up the
-               str     r1, [r6], #4            @ C references.
-               cmp     r6, ip
+               str     r1, [r11], #4           @ C references.
+               cmp     r11, ip
                blo     1b
 #endif
 
@@ -247,6 +248,7 @@ not_relocated:      mov     r0, #0
  * Check to see if we will overwrite ourselves.
  *   r4 = final kernel address
  *   r5 = start of this image
+ *   r6 = size of decompressed image
  *   r2 = end of malloc space (and therefore this image)
  * We basically want:
  *   r4 >= r2 -> OK
@@ -254,8 +256,7 @@ not_relocated:      mov     r0, #0
  */
                cmp     r4, r2
                bhs     wont_overwrite
-               sub     r3, sp, r5              @ > compressed kernel size
-               add     r0, r4, r3, lsl #2      @ allow for 4x expansion
+               add     r0, r4, r6
                cmp     r0, r5
                bls     wont_overwrite
 
@@ -271,7 +272,6 @@ not_relocated:      mov     r0, #0
  * r1-r3  = unused
  * r4     = kernel execution address
  * r5     = decompressed kernel start
- * r6     = processor ID
  * r7     = architecture ID
  * r8     = atags pointer
  * r9-r12,r14 = corrupted
@@ -312,7 +312,8 @@ LC0:                .word   LC0                     @ r1
                .word   _end                    @ r3
                .word   zreladdr                @ r4
                .word   _start                  @ r5
-               .word   _got_start              @ r6
+               .word   _image_size             @ r6
+               .word   _got_start              @ r11
                .word   _got_end                @ ip
                .word   user_stack+4096         @ sp
 LC1:           .word   reloc_end - reloc_start
@@ -336,7 +337,6 @@ params:             ldr     r0, =params_phys
  *
  * On entry,
  *  r4 = kernel execution address
- *  r6 = processor ID
  *  r7 = architecture number
  *  r8 = atags pointer
  *  r9 = run-time address of "start"  (???)
@@ -542,7 +542,6 @@ __common_mmu_cache_on:
  * r1-r3  = unused
  * r4     = kernel execution address
  * r5     = decompressed kernel start
- * r6     = processor ID
  * r7     = architecture ID
  * r8     = atags pointer
  * r9-r12,r14 = corrupted
@@ -581,19 +580,19 @@ call_kernel:      bl      cache_clean_flush
  *  r1  = corrupted
  *  r2  = corrupted
  *  r3  = block offset
- *  r6  = corrupted
+ *  r9  = corrupted
  *  r12 = corrupted
  */
 
 call_cache_fn: adr     r12, proc_types
 #ifdef CONFIG_CPU_CP15
-               mrc     p15, 0, r6, c0, c0      @ get processor ID
+               mrc     p15, 0, r9, c0, c0      @ get processor ID
 #else
-               ldr     r6, =CONFIG_PROCESSOR_ID
+               ldr     r9, =CONFIG_PROCESSOR_ID
 #endif
 1:             ldr     r1, [r12, #0]           @ get value
                ldr     r2, [r12, #4]           @ get mask
-               eor     r1, r1, r6              @ (real ^ match)
+               eor     r1, r1, r9              @ (real ^ match)
                tst     r1, r2                  @       & mask
  ARM(          addeq   pc, r12, r3             ) @ call cache function
  THUMB(                addeq   r12, r3                 )
@@ -778,8 +777,7 @@ proc_types:
  * Turn off the Cache and MMU.  ARMv3 does not support
  * reading the control register, but ARMv4 does.
  *
- * On entry,  r6 = processor ID
- * On exit,   r0, r1, r2, r3, r12 corrupted
+ * On exit, r0, r1, r2, r3, r9, r12 corrupted
  * This routine must preserve: r4, r6, r7
  */
                .align  5
@@ -852,10 +850,8 @@ __armv3_mmu_cache_off:
 /*
  * Clean and flush the cache to maintain consistency.
  *
- * On entry,
- *  r6 = processor ID
  * On exit,
- *  r1, r2, r3, r11, r12 corrupted
+ *  r1, r2, r3, r9, r11, r12 corrupted
  * This routine must preserve:
  *  r0, r4, r5, r6, r7
  */
@@ -967,7 +963,7 @@ __armv4_mmu_cache_flush:
                mov     r2, #64*1024            @ default: 32K dcache size (*2)
                mov     r11, #32                @ default: 32 byte line size
                mrc     p15, 0, r3, c0, c0, 1   @ read cache type
-               teq     r3, r6                  @ cache ID register present?
+               teq     r3, r9                  @ cache ID register present?
                beq     no_cache_id
                mov     r1, r3, lsr #18
                and     r1, r1, #7
index 7ca9ecff652ff346bbdfec69bc03fb3752ef9a8c..d08168941bd686b6f7a112f0668e96503c2ba667 100644 (file)
@@ -43,6 +43,9 @@ SECTIONS
 
   _etext = .;
 
+  /* Assume size of decompressed image is 4x the compressed image */
+  _image_size = (_etext - _text) * 4;
+
   _got_start = .;
   .got                 : { *(.got) }
   _got_end = .;
index 786ac2b6914ae4bc96cb3cb78dc6daa05127eee5..50292cd9c120aca1600c2bc2f8542697bc1bccca 100644 (file)
@@ -359,7 +359,9 @@ void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk)
                frame.fp = regs->ARM_fp;
                frame.sp = regs->ARM_sp;
                frame.lr = regs->ARM_lr;
-               frame.pc = regs->ARM_pc;
+               /* PC might be corrupted, use LR in that case. */
+               frame.pc = kernel_text_address(regs->ARM_pc)
+                        ? regs->ARM_pc : regs->ARM_lr;
        } else if (tsk == current) {
                frame.fp = (unsigned long)__builtin_frame_address(0);
                frame.sp = current_sp;
index 6da650202dc72f66e2e9947f2573b7fdbcdcf32c..04ea836969b3746d9d5a73beaa787bcfb54333d0 100644 (file)
 #define U8500_PKAM_BASE                (U8500_PER6_BASE + 0x2000)
 #define U8500_CRYPTO0_BASE     (U8500_PER6_BASE + 0xa000)
 #define U8500_CRYPTO1_BASE     (U8500_PER6_BASE + 0xb000)
-#define U8500_CLKRST6_BASE     (U8500_PER7_BASE + 0xf000)
+#define U8500_CLKRST6_BASE     (U8500_PER6_BASE + 0xf000)
 
 /* per5 base addressess */
 #define U8500_USBOTG_BASE      (U8500_PER5_BASE + 0x00000)
 #define U8500_GPIO5_BASE       (U8500_PER5_BASE + 0x1e000)
-#define U8500_CLKRST5_BASE     (U8500_PER7_BASE + 0x1f000)
+#define U8500_CLKRST5_BASE     (U8500_PER5_BASE + 0x1f000)
 
 /* per4 base addressess */
 #define U8500_BACKUPRAM0_BASE  (U8500_PER4_BASE + 0x0000)
@@ -95,7 +95,7 @@
 #define U8500_UART2_BASE       (U8500_PER3_BASE + 0x7000)
 #define U8500_SDI5_BASE                (U8500_PER3_BASE + 0x8000)
 #define U8500_GPIO3_BASE       (U8500_PER3_BASE + 0xe000)
-#define U8500_CLKRST3_BASE     (U8500_PER7_BASE + 0xf000)
+#define U8500_CLKRST3_BASE     (U8500_PER3_BASE + 0xf000)
 
 /* per2 base addressess */
 #define U8500_I2C3_BASE                (U8500_PER2_BASE + 0x0000)
 #define U8500_SPI3_BASE                (U8500_PER1_BASE + 0x9000)
 #define U8500_SLIM0_BASE       (U8500_PER1_BASE + 0xa000)
 #define U8500_GPIO1_BASE       (U8500_PER1_BASE + 0xe000)
-#define U8500_CLKRST1_BASE     (U8500_PER2_BASE + 0xf000)
+#define U8500_CLKRST1_BASE     (U8500_PER1_BASE + 0xf000)
 
 /* ST-Ericsson modified pl022 id */
 #define SSP_PER_ID             0x01080022
index c48cad271f5d6931a2c087a36945eabfc1fb8668..30e12c88d1dae5b98bb3098628ac4b3db9c738a0 100644 (file)
@@ -118,7 +118,7 @@ static int __devinit pismo_add_device(struct pismo_data *pismo, int i,
 {
        struct platform_device *dev;
        struct resource res = { };
-       phys_addr_t base = region.base;
+       phys_addr_t base = region->base;
        int ret;
 
        if (base == ~0)