[POWERPC] Allow MPC8641 HPCN to build with CONFIG_PCI disabled too.
authorJon Loeliger <jdl@freescale.com>
Tue, 15 Aug 2006 21:19:02 +0000 (16:19 -0500)
committerPaul Mackerras <paulus@samba.org>
Fri, 25 Aug 2006 04:32:13 +0000 (14:32 +1000)
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
arch/powerpc/platforms/86xx/pci.c
include/asm-powerpc/mpc86xx.h

index 146da3001c67ff7940eb29891dcb0653a97c438f..813eb5811eb454b31b9c785131a57afbb66a63cf 100644 (file)
@@ -52,6 +52,7 @@ unsigned long pci_dram_offset = 0;
 #endif
 
 
 #endif
 
 
+#ifdef CONFIG_PCI
 static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc,
                                 struct pt_regs *regs)
 {
 static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc,
                                 struct pt_regs *regs)
 {
@@ -60,14 +61,18 @@ static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc,
                generic_handle_irq(cascade_irq, regs);
        desc->chip->eoi(irq);
 }
                generic_handle_irq(cascade_irq, regs);
        desc->chip->eoi(irq);
 }
+#endif /* CONFIG_PCI */
 
 void __init
 mpc86xx_hpcn_init_irq(void)
 {
        struct mpic *mpic1;
 
 void __init
 mpc86xx_hpcn_init_irq(void)
 {
        struct mpic *mpic1;
-       struct device_node *np, *cascade_node = NULL;
-       int cascade_irq;
+       struct device_node *np;
        phys_addr_t openpic_paddr;
        phys_addr_t openpic_paddr;
+#ifdef CONFIG_PCI
+       struct device_node *cascade_node = NULL;
+       int cascade_irq;
+#endif
 
        np = of_find_node_by_type(NULL, "open-pic");
        if (np == NULL)
 
        np = of_find_node_by_type(NULL, "open-pic");
        if (np == NULL)
index bc5139043112e934f340b2691dabddadad355abc..a8c8f0a440552ab0d6d3315baf48e0a05dfd835b 100644 (file)
@@ -188,7 +188,8 @@ int __init add_bridge(struct device_node *dev)
 
        printk(KERN_INFO "Found MPC86xx PCIE host bridge at 0x%08lx. "
               "Firmware bus number: %d->%d\n",
 
        printk(KERN_INFO "Found MPC86xx PCIE host bridge at 0x%08lx. "
               "Firmware bus number: %d->%d\n",
-               rsrc.start, hose->first_busno, hose->last_busno);
+              (unsigned long) rsrc.start,
+              hose->first_busno, hose->last_busno);
 
        DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
                hose, hose->cfg_addr, hose->cfg_data);
 
        DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
                hose, hose->cfg_addr, hose->cfg_data);
index f260382739faa81018e2f63c066432da9ece11a7..2d6ad859df7f58148f2e55de8d557a0bfe4ddc6f 100644 (file)
@@ -23,8 +23,6 @@
 #define _ISA_MEM_BASE   isa_mem_base
 #ifdef CONFIG_PCI
 #define PCI_DRAM_OFFSET pci_dram_offset
 #define _ISA_MEM_BASE   isa_mem_base
 #ifdef CONFIG_PCI
 #define PCI_DRAM_OFFSET pci_dram_offset
-#else
-#define PCI_DRAM_OFFSET 0
 #endif
 
 #define CPU0_BOOT_RELEASE 0x01000000
 #endif
 
 #define CPU0_BOOT_RELEASE 0x01000000