Pull bugzilla-5764 into release branch
authorLen Brown <len.brown@intel.com>
Fri, 16 Jun 2006 01:34:21 +0000 (21:34 -0400)
committerLen Brown <len.brown@intel.com>
Fri, 16 Jun 2006 01:34:21 +0000 (21:34 -0400)
609 files changed:
Documentation/dvb/get_dvb_firmware
Documentation/firmware_class/README
Documentation/firmware_class/firmware_sample_driver.c
Documentation/kernel-parameters.txt
Documentation/memory-barriers.txt
Documentation/serial/driver
Documentation/watchdog/watchdog-api.txt
MAINTAINERS
Makefile
arch/alpha/Kconfig
arch/alpha/kernel/alpha_ksyms.c
arch/alpha/kernel/process.c
arch/alpha/kernel/smp.c
arch/alpha/kernel/sys_titan.c
arch/arm/Kconfig.debug
arch/arm/mach-ep93xx/ts72xx.c
arch/arm/mach-imx/irq.c
arch/arm/mach-integrator/integrator_cp.c
arch/arm/mach-ixp23xx/core.c
arch/arm/mach-ixp4xx/Kconfig
arch/arm/mach-pxa/mainstone.c
arch/arm/mach-pxa/spitz.c
arch/arm/mach-s3c2410/Kconfig
arch/arm/mach-s3c2410/sleep.S
arch/arm/mach-sa1100/neponset.c
arch/arm/mach-versatile/core.c
arch/arm/mm/mm-armv.c
arch/arm/mm/proc-xsc3.S
arch/i386/kernel/acpi/boot.c
arch/i386/kernel/acpi/earlyquirk.c
arch/i386/kernel/apic.c
arch/i386/kernel/setup.c
arch/i386/kernel/syscall_table.S
arch/i386/kernel/traps.c
arch/i386/mach-generic/probe.c
arch/i386/mm/init.c
arch/i386/power/cpu.c
arch/ia64/Kconfig
arch/ia64/hp/common/sba_iommu.c
arch/ia64/kernel/acpi.c
arch/ia64/mm/init.c
arch/mips/Kconfig
arch/mips/au1000/common/irq.c
arch/mips/au1000/common/prom.c
arch/mips/au1000/common/sleeper.S
arch/mips/au1000/common/time.c
arch/mips/ddb5xxx/ddb5476/dbg_io.c
arch/mips/ddb5xxx/ddb5477/kgdb_io.c
arch/mips/gt64120/ev64120/serialGT.c
arch/mips/gt64120/momenco_ocelot/dbg_io.c
arch/mips/ite-boards/generic/dbg_io.c
arch/mips/kernel/asm-offsets.c
arch/mips/kernel/cpu-bugs64.c
arch/mips/kernel/cpu-probe.c
arch/mips/kernel/entry.S
arch/mips/kernel/gdb-low.S
arch/mips/kernel/module.c
arch/mips/kernel/proc.c
arch/mips/kernel/scall64-o32.S
arch/mips/kernel/setup.c
arch/mips/kernel/signal-common.h
arch/mips/kernel/smp.c
arch/mips/kernel/syscall.c
arch/mips/kernel/traps.c
arch/mips/kernel/vmlinux.lds.S
arch/mips/math-emu/dp_fint.c
arch/mips/math-emu/dp_flong.c
arch/mips/math-emu/sp_fint.c
arch/mips/math-emu/sp_flong.c
arch/mips/mm/c-r4k.c
arch/mips/mm/init.c
arch/mips/mm/pg-r4k.c
arch/mips/mm/tlbex.c
arch/mips/momentum/jaguar_atx/dbg_io.c
arch/mips/momentum/ocelot_c/dbg_io.c
arch/mips/momentum/ocelot_g/dbg_io.c
arch/mips/oprofile/common.c
arch/mips/oprofile/op_model_mipsxx.c
arch/mips/oprofile/op_model_rm9000.c
arch/mips/sgi-ip32/ip32-irq.c
arch/powerpc/kernel/prom_init.c
arch/powerpc/kernel/signal_32.c
arch/powerpc/kernel/signal_64.c
arch/powerpc/kernel/systbl.S
arch/powerpc/platforms/cell/setup.c
arch/powerpc/platforms/cell/spu_callbacks.c
arch/powerpc/platforms/powermac/low_i2c.c
arch/powerpc/platforms/powermac/pfunc_core.c
arch/powerpc/platforms/powermac/setup.c
arch/powerpc/platforms/pseries/setup.c
arch/ppc/kernel/asm-offsets.c
arch/ppc/platforms/mpc8272ads_setup.c
arch/ppc/syslib/pq2_devices.c
arch/ppc/syslib/pq2_sys.c
arch/s390/kernel/time.c
arch/sparc/kernel/smp.c
arch/sparc/kernel/systbls.S
arch/sparc64/kernel/head.S
arch/sparc64/kernel/pci_iommu.c
arch/sparc64/kernel/pci_sun4v.c
arch/sparc64/kernel/setup.c
arch/sparc64/kernel/smp.c
arch/sparc64/kernel/sparc64_ksyms.c
arch/sparc64/kernel/systbls.S
arch/sparc64/kernel/traps.c
arch/sparc64/lib/checksum.S
arch/sparc64/lib/csum_copy.S
arch/um/Makefile-i386
arch/um/include/kern_util.h
arch/um/kernel/time_kern.c
arch/um/os-Linux/main.c
arch/um/os-Linux/time.c
arch/um/sys-i386/syscalls.c
arch/um/sys-x86_64/signal.c
arch/um/sys-x86_64/syscalls.c
arch/x86_64/Kconfig
arch/x86_64/ia32/ia32_binfmt.c
arch/x86_64/kernel/acpi/Makefile
arch/x86_64/kernel/acpi/processor.c [deleted file]
arch/x86_64/kernel/e820.c
arch/x86_64/kernel/entry.S
arch/x86_64/kernel/io_apic.c
arch/x86_64/kernel/kprobes.c
arch/x86_64/kernel/pci-dma.c
arch/x86_64/kernel/pci-gart.c
arch/x86_64/kernel/pmtimer.c
arch/x86_64/kernel/setup.c
arch/x86_64/mm/srat.c
block/as-iosched.c
block/cfq-iosched.c
block/deadline-iosched.c
block/elevator.c
block/ll_rw_blk.c
block/noop-iosched.c
drivers/acpi/Kconfig
drivers/acpi/acpi_memhotplug.c
drivers/acpi/asus_acpi.c
drivers/acpi/bus.c
drivers/acpi/dispatcher/dsfield.c
drivers/acpi/dispatcher/dsinit.c
drivers/acpi/dispatcher/dsmethod.c
drivers/acpi/dispatcher/dsmthdat.c
drivers/acpi/dispatcher/dsobject.c
drivers/acpi/dispatcher/dsopcode.c
drivers/acpi/dispatcher/dsutils.c
drivers/acpi/dispatcher/dswexec.c
drivers/acpi/dispatcher/dswload.c
drivers/acpi/dispatcher/dswscope.c
drivers/acpi/dispatcher/dswstate.c
drivers/acpi/ec.c
drivers/acpi/events/evevent.c
drivers/acpi/events/evgpe.c
drivers/acpi/events/evgpeblk.c
drivers/acpi/events/evmisc.c
drivers/acpi/events/evregion.c
drivers/acpi/events/evrgnini.c
drivers/acpi/events/evsci.c
drivers/acpi/events/evxface.c
drivers/acpi/events/evxfevnt.c
drivers/acpi/events/evxfregn.c
drivers/acpi/executer/exconfig.c
drivers/acpi/executer/exconvrt.c
drivers/acpi/executer/excreate.c
drivers/acpi/executer/exdump.c
drivers/acpi/executer/exfield.c
drivers/acpi/executer/exfldio.c
drivers/acpi/executer/exmisc.c
drivers/acpi/executer/exmutex.c
drivers/acpi/executer/exnames.c
drivers/acpi/executer/exoparg1.c
drivers/acpi/executer/exoparg2.c
drivers/acpi/executer/exoparg3.c
drivers/acpi/executer/exoparg6.c
drivers/acpi/executer/exprep.c
drivers/acpi/executer/exregion.c
drivers/acpi/executer/exresnte.c
drivers/acpi/executer/exresolv.c
drivers/acpi/executer/exresop.c
drivers/acpi/executer/exstore.c
drivers/acpi/executer/exstoren.c
drivers/acpi/executer/exstorob.c
drivers/acpi/executer/exsystem.c
drivers/acpi/executer/exutils.c
drivers/acpi/hardware/hwacpi.c
drivers/acpi/hardware/hwgpe.c
drivers/acpi/hardware/hwregs.c
drivers/acpi/hardware/hwsleep.c
drivers/acpi/hardware/hwtimer.c
drivers/acpi/hotkey.c
drivers/acpi/ibm_acpi.c
drivers/acpi/motherboard.c
drivers/acpi/namespace/nsaccess.c
drivers/acpi/namespace/nsalloc.c
drivers/acpi/namespace/nsdump.c
drivers/acpi/namespace/nsdumpdv.c
drivers/acpi/namespace/nseval.c
drivers/acpi/namespace/nsinit.c
drivers/acpi/namespace/nsload.c
drivers/acpi/namespace/nsnames.c
drivers/acpi/namespace/nsobject.c
drivers/acpi/namespace/nsparse.c
drivers/acpi/namespace/nssearch.c
drivers/acpi/namespace/nsutils.c
drivers/acpi/namespace/nswalk.c
drivers/acpi/namespace/nsxfeval.c
drivers/acpi/namespace/nsxfname.c
drivers/acpi/namespace/nsxfobj.c
drivers/acpi/osl.c
drivers/acpi/parser/psargs.c
drivers/acpi/parser/psloop.c
drivers/acpi/parser/psopcode.c
drivers/acpi/parser/psparse.c
drivers/acpi/parser/psscope.c
drivers/acpi/parser/pstree.c
drivers/acpi/parser/psutils.c
drivers/acpi/parser/pswalk.c
drivers/acpi/parser/psxface.c
drivers/acpi/pci_link.c
drivers/acpi/processor_core.c
drivers/acpi/processor_idle.c
drivers/acpi/processor_perflib.c
drivers/acpi/resources/rscalc.c
drivers/acpi/resources/rscreate.c
drivers/acpi/resources/rsdump.c
drivers/acpi/resources/rsinfo.c
drivers/acpi/resources/rslist.c
drivers/acpi/resources/rsmisc.c
drivers/acpi/resources/rsutils.c
drivers/acpi/resources/rsxface.c
drivers/acpi/scan.c
drivers/acpi/sleep/wakeup.c
drivers/acpi/system.c
drivers/acpi/tables.c
drivers/acpi/tables/tbconvrt.c
drivers/acpi/tables/tbget.c
drivers/acpi/tables/tbgetall.c
drivers/acpi/tables/tbinstal.c
drivers/acpi/tables/tbrsdt.c
drivers/acpi/tables/tbutils.c
drivers/acpi/tables/tbxface.c
drivers/acpi/tables/tbxfroot.c
drivers/acpi/thermal.c
drivers/acpi/utilities/utalloc.c
drivers/acpi/utilities/utcache.c
drivers/acpi/utilities/utcopy.c
drivers/acpi/utilities/utdebug.c
drivers/acpi/utilities/utdelete.c
drivers/acpi/utilities/uteval.c
drivers/acpi/utilities/utglobal.c
drivers/acpi/utilities/utinit.c
drivers/acpi/utilities/utmath.c
drivers/acpi/utilities/utmisc.c
drivers/acpi/utilities/utmutex.c
drivers/acpi/utilities/utobject.c
drivers/acpi/utilities/utresrc.c
drivers/acpi/utilities/utstate.c
drivers/acpi/utilities/utxface.c
drivers/acpi/utils.c
drivers/acpi/video.c
drivers/base/firmware_class.c
drivers/base/power/suspend.c
drivers/char/Makefile
drivers/char/agp/Kconfig
drivers/char/agp/amd64-agp.c
drivers/char/agp/hp-agp.c
drivers/char/agp/via-agp.c
drivers/char/hpet.c
drivers/char/ipmi/ipmi_si_intf.c
drivers/char/n_tty.c
drivers/char/pcmcia/cm4000_cs.c
drivers/char/sonypi.c
drivers/char/tpm/tpm_bios.c
drivers/char/tpm/tpm_tis.c
drivers/char/tty_io.c
drivers/char/vt.c
drivers/char/watchdog/i8xx_tco.c
drivers/char/watchdog/s3c2410_wdt.c
drivers/char/watchdog/sc1200wdt.c
drivers/i2c/busses/scx200_acb.c
drivers/ide/pci/sgiioc4.c
drivers/ide/ppc/pmac.c
drivers/ieee1394/sbp2.c
drivers/infiniband/core/uverbs_mem.c
drivers/infiniband/hw/ipath/ipath_driver.c
drivers/infiniband/hw/ipath/ipath_eeprom.c
drivers/infiniband/hw/ipath/ipath_file_ops.c
drivers/infiniband/hw/ipath/ipath_ht400.c
drivers/infiniband/hw/ipath/ipath_init_chip.c
drivers/infiniband/hw/ipath/ipath_kernel.h
drivers/infiniband/hw/ipath/ipath_keys.c
drivers/infiniband/hw/ipath/ipath_layer.c
drivers/infiniband/hw/ipath/ipath_pe800.c
drivers/infiniband/hw/ipath/ipath_qp.c
drivers/infiniband/hw/ipath/ipath_rc.c
drivers/infiniband/hw/ipath/ipath_ruc.c
drivers/infiniband/hw/ipath/ipath_verbs.c
drivers/infiniband/hw/mthca/mthca_cmd.c
drivers/infiniband/hw/mthca/mthca_qp.c
drivers/infiniband/hw/mthca/mthca_srq.c
drivers/infiniband/ulp/ipoib/ipoib_ib.c
drivers/infiniband/ulp/srp/ib_srp.c
drivers/input/joystick/sidewinder.c
drivers/input/keyboard/corgikbd.c
drivers/input/keyboard/spitzkbd.c
drivers/input/misc/wistron_btns.c
drivers/input/mouse/alps.c
drivers/input/mouse/lifebook.c
drivers/input/mouse/logips2pp.c
drivers/input/touchscreen/ads7846.c
drivers/isdn/i4l/isdn_tty.c
drivers/md/md.c
drivers/md/raid0.c
drivers/media/Kconfig
drivers/media/common/Kconfig
drivers/media/dvb/Kconfig
drivers/media/dvb/b2c2/Kconfig
drivers/media/dvb/bt8xx/Kconfig
drivers/media/dvb/bt8xx/dvb-bt8xx.c
drivers/media/dvb/cinergyT2/cinergyT2.c
drivers/media/dvb/dvb-core/dvb_frontend.c
drivers/media/dvb/dvb-core/dvbdev.c
drivers/media/dvb/dvb-usb/Kconfig
drivers/media/dvb/dvb-usb/cxusb.c
drivers/media/dvb/frontends/cx24123.c
drivers/media/dvb/frontends/dvb-pll.c
drivers/media/dvb/pluto2/Kconfig
drivers/media/dvb/pluto2/Makefile
drivers/media/dvb/ttpci/Kconfig
drivers/media/dvb/ttpci/budget-av.c
drivers/media/dvb/ttpci/budget-ci.c
drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c
drivers/media/radio/Kconfig
drivers/media/video/Kconfig
drivers/media/video/Makefile
drivers/media/video/bt8xx/Kconfig
drivers/media/video/bt8xx/Makefile
drivers/media/video/bt8xx/bttv-cards.c
drivers/media/video/bt8xx/bttv-risc.c
drivers/media/video/cx25840/cx25840-firmware.c
drivers/media/video/cx88/cx88-cards.c
drivers/media/video/cx88/cx88-core.c
drivers/media/video/cx88/cx88-dvb.c
drivers/media/video/cx88/cx88-video.c
drivers/media/video/em28xx/Kconfig
drivers/media/video/em28xx/em28xx-video.c
drivers/media/video/et61x251/Kconfig
drivers/media/video/pwc/Kconfig
drivers/media/video/pwc/Makefile
drivers/media/video/saa7127.c
drivers/media/video/saa7134/saa7134-cards.c
drivers/media/video/saa7134/saa7134-core.c
drivers/media/video/saa7134/saa7134-video.c
drivers/media/video/sn9c102/Kconfig
drivers/media/video/tuner-types.c
drivers/media/video/tveeprom.c
drivers/media/video/usbvideo/Kconfig
drivers/media/video/vivi.c
drivers/media/video/zc0301/Kconfig
drivers/message/fusion/mptbase.c
drivers/message/fusion/mptspi.c
drivers/message/i2o/exec-osm.c
drivers/message/i2o/iop.c
drivers/mmc/Kconfig
drivers/mmc/au1xmmc.c
drivers/mmc/imxmmc.c
drivers/mmc/mmc.c
drivers/mmc/mmc_block.c
drivers/mmc/pxamci.c
drivers/mmc/wbsd.c
drivers/net/bnx2.c
drivers/net/e1000/e1000_ethtool.c
drivers/net/e1000/e1000_main.c
drivers/net/forcedeth.c
drivers/net/irda/Kconfig
drivers/net/netconsole.c
drivers/net/pcmcia/axnet_cs.c
drivers/net/pcmcia/nmclan_cs.c
drivers/net/pcnet32.c
drivers/net/pppoe.c
drivers/net/skge.c
drivers/net/sky2.c
drivers/net/sky2.h
drivers/net/tg3.c
drivers/net/tg3.h
drivers/net/tulip/winbond-840.c
drivers/net/via-rhine.c
drivers/net/wireless/arlan-main.c
drivers/net/wireless/bcm43xx/bcm43xx_dma.c
drivers/net/wireless/bcm43xx/bcm43xx_main.c
drivers/net/wireless/orinoco.c
drivers/net/wireless/wavelan.c
drivers/pci/pci-acpi.c
drivers/pci/pci-driver.c
drivers/pci/pci.c
drivers/pcmcia/ds.c
drivers/pcmcia/pd6729.c
drivers/pnp/pnpacpi/rsparser.c
drivers/rtc/rtc-dev.c
drivers/rtc/rtc-m48t86.c
drivers/rtc/rtc-sa1100.c
drivers/rtc/rtc-test.c
drivers/rtc/rtc-vr41xx.c
drivers/s390/cio/css.h
drivers/s390/cio/device_fsm.c
drivers/s390/net/ctcmain.c
drivers/s390/net/ctctty.c
drivers/s390/net/cu3088.c
drivers/s390/net/iucv.c
drivers/s390/net/iucv.h
drivers/s390/net/lcs.c
drivers/s390/net/lcs.h
drivers/s390/net/netiucv.c
drivers/s390/net/qeth.h
drivers/s390/net/qeth_eddp.c
drivers/s390/net/qeth_fs.h
drivers/s390/net/qeth_main.c
drivers/s390/net/qeth_mpc.h
drivers/s390/net/qeth_proc.c
drivers/s390/net/qeth_sys.c
drivers/s390/net/qeth_tso.h
drivers/scsi/libata-core.c
drivers/scsi/ppa.c
drivers/scsi/sata_mv.c
drivers/scsi/sata_sil24.c
drivers/scsi/scsi_devinfo.c
drivers/scsi/scsi_lib.c
drivers/scsi/scsi_transport_sas.c
drivers/scsi/st.c
drivers/serial/cpm_uart/cpm_uart_core.c
drivers/serial/cpm_uart/cpm_uart_cpm2.c
drivers/serial/sunsu.c
drivers/spi/Kconfig
drivers/spi/Makefile
drivers/spi/pxa2xx_spi.c
drivers/spi/spi.c
drivers/spi/spi_butterfly.c
drivers/spi/spi_mpc83xx.c [new file with mode: 0644]
drivers/spi/spi_s3c24xx.c [new file with mode: 0644]
drivers/spi/spi_s3c24xx_gpio.c [new file with mode: 0644]
drivers/usb/host/ohci-pxa27x.c
drivers/usb/input/hiddev.c
drivers/video/au1100fb.c
drivers/video/console/fbcon.c
drivers/video/i810/i810_main.c
drivers/video/matrox/g450_pll.c
drivers/video/matrox/matroxfb_DAC1064.h
drivers/video/matrox/matroxfb_base.h
drivers/video/maxinefb.c
fs/affs/namei.c
fs/binfmt_flat.c
fs/bio.c
fs/cifs/CHANGES
fs/cifs/cifsfs.h
fs/cifs/cifsproto.h
fs/cifs/cifssmb.c
fs/cifs/connect.c
fs/cifs/file.c
fs/compat.c
fs/debugfs/inode.c
fs/exportfs/expfs.c
fs/ext3/resize.c
fs/inotify.c
fs/jfs/jfs_metapage.c
fs/locks.c
fs/namei.c
fs/nfsd/export.c
fs/nfsd/vfs.c
include/acpi/acconfig.h
include/acpi/acdisasm.h
include/acpi/acdispat.h
include/acpi/acevents.h
include/acpi/acexcep.h
include/acpi/acglobal.h
include/acpi/aclocal.h
include/acpi/acmacros.h
include/acpi/acnamesp.h
include/acpi/acobject.h
include/acpi/acopcode.h
include/acpi/acoutput.h
include/acpi/acparser.h
include/acpi/acpi_bus.h
include/acpi/acpiosxf.h
include/acpi/acpixf.h
include/acpi/acresrc.h
include/acpi/acstruct.h
include/acpi/actables.h
include/acpi/actbl.h
include/acpi/actbl1.h
include/acpi/actbl2.h
include/acpi/actypes.h
include/acpi/acutils.h
include/acpi/amlcode.h
include/acpi/amlresrc.h
include/acpi/platform/acenv.h
include/acpi/platform/aclinux.h
include/asm-alpha/smp.h
include/asm-alpha/termbits.h
include/asm-arm/arch-ixp23xx/memory.h
include/asm-arm/arch-l7200/serial_l7200.h
include/asm-arm/arch-l7200/uncompress.h
include/asm-arm/arch-pxa/ohci.h
include/asm-arm/arch-pxa/pxa2xx_spi.h
include/asm-arm/arch-s3c2410/spi-gpio.h [new file with mode: 0644]
include/asm-arm/arch-s3c2410/spi.h [new file with mode: 0644]
include/asm-arm/spinlock.h
include/asm-arm/system.h
include/asm-generic/pgtable.h
include/asm-i386/apicdef.h
include/asm-mips/addrspace.h
include/asm-mips/cpu.h
include/asm-mips/delay.h
include/asm-mips/futex.h
include/asm-mips/inst.h
include/asm-mips/mipsregs.h
include/asm-mips/page.h
include/asm-mips/pgtable-32.h
include/asm-mips/pgtable-64.h
include/asm-mips/pgtable.h
include/asm-mips/sigcontext.h
include/asm-mips/smp.h
include/asm-mips/sparsemem.h [new file with mode: 0644]
include/asm-powerpc/termbits.h
include/asm-powerpc/unistd.h
include/asm-s390/futex.h
include/asm-s390/lowcore.h
include/asm-sparc/unistd.h
include/asm-sparc64/dma-mapping.h
include/asm-sparc64/pci.h
include/asm-sparc64/pgtable.h
include/asm-sparc64/unistd.h
include/asm-um/irqflags.h [new file with mode: 0644]
include/asm-um/uaccess.h
include/asm-x86_64/acpi.h
include/asm-x86_64/apicdef.h
include/asm-x86_64/elf.h
include/linux/elevator.h
include/linux/firmware.h
include/linux/fs.h
include/linux/fsl_devices.h
include/linux/i2o.h
include/linux/input.h
include/linux/m48t86.h
include/linux/mempolicy.h
include/linux/mmc/mmc.h
include/linux/mmzone.h
include/linux/pci-acpi.h
include/linux/pci_ids.h
include/linux/syscalls.h
include/linux/videodev2.h
include/linux/vt_kern.h
include/net/compat.h
include/net/irda/irlmp.h
include/net/sctp/command.h
include/net/sctp/sctp.h
kernel/cpuset.c
kernel/hrtimer.c
kernel/sched.c
kernel/timer.c
lib/kobject.c
mm/memory_hotplug.c
mm/page_alloc.c
mm/shmem.c
mm/slab.c
mm/sparse.c
mm/vmscan.c
net/bridge/br.c
net/bridge/br_if.c
net/bridge/netfilter/ebt_log.c
net/core/dev.c
net/dccp/ackvec.c
net/ethernet/Makefile
net/ethernet/sysctl_net_ether.c [deleted file]
net/ipv4/ip_forward.c
net/ipv4/ipcomp.c
net/ipv4/netfilter/Kconfig
net/ipv4/netfilter/arp_tables.c
net/ipv4/netfilter/ip_conntrack_core.c
net/ipv4/netfilter/ip_conntrack_helper_h323_asn1.c
net/ipv4/netfilter/ip_conntrack_helper_pptp.c
net/ipv4/netfilter/ip_nat_proto_gre.c
net/ipv4/netfilter/ip_nat_snmp_basic.c
net/ipv4/netfilter/ipt_LOG.c
net/ipv4/netfilter/ipt_recent.c
net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c
net/ipv4/tcp_highspeed.c
net/ipv4/tcp_input.c
net/ipv4/tcp_output.c
net/ipv4/xfrm4_policy.c
net/ipv6/ipcomp6.c
net/ipv6/netfilter/ip6_tables.c
net/ipv6/netfilter/ip6t_LOG.c
net/ipv6/route.c
net/irda/iriap.c
net/irda/irlap.c
net/netfilter/nfnetlink_log.c
net/sctp/input.c
net/sctp/sm_sideeffect.c
net/sctp/sm_statefuns.c
net/sctp/socket.c
net/sunrpc/cache.c
net/sysctl_net.c
net/xfrm/xfrm_input.c
scripts/mod/modpost.c
scripts/mod/modpost.h
security/selinux/hooks.c
sound/drivers/mpu401/mpu401.c
sound/isa/es18xx.c
sound/oss/ad1848.c
sound/oss/nm256_audio.c

index 15fc8fbef67e3fa48a8d68365b1852103e501115..4820366b6ae899667cf0589b789661d990eda7cc 100644 (file)
@@ -259,9 +259,9 @@ sub dibusb {
 }
 
 sub nxt2002 {
-    my $sourcefile = "Broadband4PC_4_2_11.zip";
+    my $sourcefile = "Technisat_DVB-PC_4_4_COMPACT.zip";
     my $url = "http://www.bbti.us/download/windows/$sourcefile";
-    my $hash = "c6d2ea47a8f456d887ada0cfb718ff2a";
+    my $hash = "476befae8c7c1bb9648954060b1eec1f";
     my $outfile = "dvb-fe-nxt2002.fw";
     my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 1);
 
@@ -269,8 +269,8 @@ sub nxt2002 {
 
     wgetfile($sourcefile, $url);
     unzip($sourcefile, $tmpdir);
-    verify("$tmpdir/SkyNETU.sys", $hash);
-    extract("$tmpdir/SkyNETU.sys", 375832, 5908, $outfile);
+    verify("$tmpdir/SkyNET.sys", $hash);
+    extract("$tmpdir/SkyNET.sys", 331624, 5908, $outfile);
 
     $outfile;
 }
index 43e836c07ae89ee817ad75fe33e9cd37ea5b44ae..e9cc8bb26f7d0952b0226c66e6a43abe8e00a211 100644 (file)
    on the setup, so I think that the choice on what firmware to make
    persistent should be left to userspace.
 
- - Why register_firmware()+__init can be useful:
-       - For boot devices needing firmware.
-       - To make the transition easier:
-               The firmware can be declared __init and register_firmware()
-               called on module_init. Then the firmware is warranted to be
-               there even if "firmware hotplug userspace" is not there yet or
-               it doesn't yet provide the needed firmware.
-               Once the firmware is widely available in userspace, it can be
-               removed from the kernel. Or made optional (CONFIG_.*_FIRMWARE).
-
-       In either case, if firmware hotplug support is there, it can move the
-       firmware out of kernel memory into the real filesystem for later
-       usage.
-
-       Note: If persistence is implemented on top of initramfs,
-       register_firmware() may not be appropriate.
-
index ad3edaba4533cf33d5452e5b4bb877455000c05b..87feccdb5c9f8f67b2739358edca07c76a9a24a1 100644 (file)
@@ -5,8 +5,6 @@
  *
  * Sample code on how to use request_firmware() from drivers.
  *
- * Note that register_firmware() is currently useless.
- *
  */
 
 #include <linux/module.h>
 
 #include "linux/firmware.h"
 
-#define WE_CAN_NEED_FIRMWARE_BEFORE_USERSPACE_IS_AVAILABLE
-#ifdef WE_CAN_NEED_FIRMWARE_BEFORE_USERSPACE_IS_AVAILABLE
-char __init inkernel_firmware[] = "let's say that this is firmware\n";
-#endif
-
 static struct device ghost_device = {
        .bus_id    = "ghost0",
 };
@@ -104,10 +97,6 @@ static void sample_probe_async(void)
 
 static int sample_init(void)
 {
-#ifdef WE_CAN_NEED_FIRMWARE_BEFORE_USERSPACE_IS_AVAILABLE
-       register_firmware("sample_driver_fw", inkernel_firmware,
-                         sizeof(inkernel_firmware));
-#endif
        device_initialize(&ghost_device);
        /* since there is no real hardware insertion I just call the
         * sample probe functions here */
index b3a6187e53051866004696e4d5718cd85240e1c2..a853e860786527415a15eadcf9e0388d80a25424 100644 (file)
@@ -147,6 +147,9 @@ running once the system is up.
        acpi_irq_isa=   [HW,ACPI] If irq_balance, mark listed IRQs used by ISA
                        Format: <irq>,<irq>...
 
+       acpi_os_name=   [HW,ACPI] Tell ACPI BIOS the name of the OS
+                       Format: To spoof as Windows 98: ="Microsoft Windows"
+
        acpi_osi=       [HW,ACPI] empty param disables _OSI
 
        acpi_serialize  [HW,ACPI] force serialization of AML methods
index c61d8b876fdbcba484a3ad149ac3d057dfb76bba..4710845dbac4fb663e35fcf0056499614a06e56b 100644 (file)
@@ -19,6 +19,7 @@ Contents:
      - Control dependencies.
      - SMP barrier pairing.
      - Examples of memory barrier sequences.
+     - Read memory barriers vs load speculation.
 
  (*) Explicit kernel barriers.
 
@@ -248,7 +249,7 @@ And there are a number of things that _must_ or _must_not_ be assumed:
      we may get either of:
 
        STORE *A = X; Y = LOAD *A;
-       STORE *A = Y;
+       STORE *A = Y = X;
 
 
 =========================
@@ -344,9 +345,12 @@ Memory barriers come in four basic varieties:
 
  (4) General memory barriers.
 
-     A general memory barrier is a combination of both a read memory barrier
-     and a write memory barrier.  It is a partial ordering over both loads and
-     stores.
+     A general memory barrier gives a guarantee that all the LOAD and STORE
+     operations specified before the barrier will appear to happen before all
+     the LOAD and STORE operations specified after the barrier with respect to
+     the other components of the system.
+
+     A general memory barrier is a partial ordering over both loads and stores.
 
      General memory barriers imply both read and write memory barriers, and so
      can substitute for either.
@@ -546,9 +550,9 @@ write barrier, though, again, a general barrier is viable:
        =============== ===============
        a = 1;
        <write barrier>
-       b = 2;          x = a;
+       b = 2;          x = b;
                        <read barrier>
-                       y = b;
+                       y = a;
 
 Or:
 
@@ -563,6 +567,18 @@ Or:
 Basically, the read barrier always has to be there, even though it can be of
 the "weaker" type.
 
+[!] Note that the stores before the write barrier would normally be expected to
+match the loads after the read barrier or data dependency barrier, and vice
+versa:
+
+       CPU 1                           CPU 2
+       ===============                 ===============
+       a = 1;           }----   --->{  v = c
+       b = 2;           }    \ /    {  w = d
+       <write barrier>        \        <read barrier>
+       c = 3;           }    / \    {  x = a;
+       d = 4;           }----   --->{  y = b;
+
 
 EXAMPLES OF MEMORY BARRIER SEQUENCES
 ------------------------------------
@@ -600,8 +616,8 @@ STORE B, STORE C } all occuring before the unordered set of { STORE D, STORE E
        |       |       +------+
        +-------+       :      :
                           |
-                          | Sequence in which stores committed to memory system
-                          | by CPU 1
+                          | Sequence in which stores are committed to the
+                          | memory system by CPU 1
                           V
 
 
@@ -683,14 +699,12 @@ then the following will occur:
                                       |        :       :       |       |
                                       |        :       :       | CPU 2 |
                                       |        +-------+       |       |
-                                       \       | X->9  |------>|       |
-                                        \      +-------+       |       |
-                                         ----->| B->2  |       |       |
-                                               +-------+       |       |
-            Makes sure all effects --->    ddddddddddddddddd   |       |
-            prior to the store of C            +-------+       |       |
-            are perceptible to                 | B->2  |------>|       |
-            successive loads                   +-------+       |       |
+                                      |        | X->9  |------>|       |
+                                      |        +-------+       |       |
+         Makes sure all effects --->   \   ddddddddddddddddd   |       |
+         prior to the store of C        \      +-------+       |       |
+         are perceptible to              ----->| B->2  |------>|       |
+         subsequent loads                      +-------+       |       |
                                                :       :       +-------+
 
 
@@ -699,73 +713,239 @@ following sequence of events:
 
        CPU 1                   CPU 2
        ======================= =======================
+               { A = 0, B = 9 }
        STORE A=1
-       STORE B=2
-       STORE C=3
        <write barrier>
-       STORE D=4
-       STORE E=5
-                               LOAD A
+       STORE B=2
                                LOAD B
-                               LOAD C
-                               LOAD D
-                               LOAD E
+                               LOAD A
 
 Without intervention, CPU 2 may then choose to perceive the events on CPU 1 in
 some effectively random order, despite the write barrier issued by CPU 1:
 
-       +-------+       :      :
-       |       |       +------+
-       |       |------>| C=3  | }
-       |       |  :    +------+ }
-       |       |  :    | A=1  | }
-       |       |  :    +------+ }
-       | CPU 1 |  :    | B=2  | }---
-       |       |       +------+ }   \
-       |       |   wwwwwwwwwwwww}    \
-       |       |       +------+ }     \          :       :       +-------+
-       |       |  :    | E=5  | }      \         +-------+       |       |
-       |       |  :    +------+ }       \      { | C->3  |------>|       |
-       |       |------>| D=4  | }        \     { +-------+    :  |       |
-       |       |       +------+           \    { | E->5  |    :  |       |
-       +-------+       :      :            \   { +-------+    :  |       |
-                                  Transfer  -->{ | A->1  |    :  | CPU 2 |
-                                 from CPU 1    { +-------+    :  |       |
-                                  to CPU 2     { | D->4  |    :  |       |
-                                               { +-------+    :  |       |
-                                               { | B->2  |------>|       |
-                                                 +-------+       |       |
-                                                 :       :       +-------+
-
-
-If, however, a read barrier were to be placed between the load of C and the
-load of D on CPU 2, then the partial ordering imposed by CPU 1 will be
-perceived correctly by CPU 2.
+       +-------+       :      :                :       :
+       |       |       +------+                +-------+
+       |       |------>| A=1  |------      --->| A->0  |
+       |       |       +------+      \         +-------+
+       | CPU 1 |   wwwwwwwwwwwwwwww   \    --->| B->9  |
+       |       |       +------+        |       +-------+
+       |       |------>| B=2  |---     |       :       :
+       |       |       +------+   \    |       :       :       +-------+
+       +-------+       :      :    \   |       +-------+       |       |
+                                    ---------->| B->2  |------>|       |
+                                       |       +-------+       | CPU 2 |
+                                       |       | A->0  |------>|       |
+                                       |       +-------+       |       |
+                                       |       :       :       +-------+
+                                        \      :       :
+                                         \     +-------+
+                                          ---->| A->1  |
+                                               +-------+
+                                               :       :
 
-       +-------+       :      :
-       |       |       +------+
-       |       |------>| C=3  | }
-       |       |  :    +------+ }
-       |       |  :    | A=1  | }---
-       |       |  :    +------+ }   \
-       | CPU 1 |  :    | B=2  | }    \
-       |       |       +------+       \
-       |       |   wwwwwwwwwwwwwwww    \
-       |       |       +------+         \        :       :       +-------+
-       |       |  :    | E=5  | }        \       +-------+       |       |
-       |       |  :    +------+ }---      \    { | C->3  |------>|       |
-       |       |------>| D=4  | }   \      \   { +-------+    :  |       |
-       |       |       +------+      \      -->{ | B->2  |    :  |       |
-       +-------+       :      :       \        { +-------+    :  |       |
-                                       \       { | A->1  |    :  | CPU 2 |
-                                        \        +-------+       |       |
-          At this point the read ---->   \   rrrrrrrrrrrrrrrrr   |       |
-          barrier causes all effects      \      +-------+       |       |
-          prior to the storage of C        \   { | E->5  |    :  |       |
-          to be perceptible to CPU 2        -->{ +-------+    :  |       |
-                                               { | D->4  |------>|       |
-                                                 +-------+       |       |
-                                                 :       :       +-------+
+
+If, however, a read barrier were to be placed between the load of E and the
+load of A on CPU 2:
+
+       CPU 1                   CPU 2
+       ======================= =======================
+               { A = 0, B = 9 }
+       STORE A=1
+       <write barrier>
+       STORE B=2
+                               LOAD B
+                               <read barrier>
+                               LOAD A
+
+then the partial ordering imposed by CPU 1 will be perceived correctly by CPU
+2:
+
+       +-------+       :      :                :       :
+       |       |       +------+                +-------+
+       |       |------>| A=1  |------      --->| A->0  |
+       |       |       +------+      \         +-------+
+       | CPU 1 |   wwwwwwwwwwwwwwww   \    --->| B->9  |
+       |       |       +------+        |       +-------+
+       |       |------>| B=2  |---     |       :       :
+       |       |       +------+   \    |       :       :       +-------+
+       +-------+       :      :    \   |       +-------+       |       |
+                                    ---------->| B->2  |------>|       |
+                                       |       +-------+       | CPU 2 |
+                                       |       :       :       |       |
+                                       |       :       :       |       |
+         At this point the read ---->   \  rrrrrrrrrrrrrrrrr   |       |
+         barrier causes all effects      \     +-------+       |       |
+         prior to the storage of B        ---->| A->1  |------>|       |
+         to be perceptible to CPU 2            +-------+       |       |
+                                               :       :       +-------+
+
+
+To illustrate this more completely, consider what could happen if the code
+contained a load of A either side of the read barrier:
+
+       CPU 1                   CPU 2
+       ======================= =======================
+               { A = 0, B = 9 }
+       STORE A=1
+       <write barrier>
+       STORE B=2
+                               LOAD B
+                               LOAD A [first load of A]
+                               <read barrier>
+                               LOAD A [second load of A]
+
+Even though the two loads of A both occur after the load of B, they may both
+come up with different values:
+
+       +-------+       :      :                :       :
+       |       |       +------+                +-------+
+       |       |------>| A=1  |------      --->| A->0  |
+       |       |       +------+      \         +-------+
+       | CPU 1 |   wwwwwwwwwwwwwwww   \    --->| B->9  |
+       |       |       +------+        |       +-------+
+       |       |------>| B=2  |---     |       :       :
+       |       |       +------+   \    |       :       :       +-------+
+       +-------+       :      :    \   |       +-------+       |       |
+                                    ---------->| B->2  |------>|       |
+                                       |       +-------+       | CPU 2 |
+                                       |       :       :       |       |
+                                       |       :       :       |       |
+                                       |       +-------+       |       |
+                                       |       | A->0  |------>| 1st   |
+                                       |       +-------+       |       |
+         At this point the read ---->   \  rrrrrrrrrrrrrrrrr   |       |
+         barrier causes all effects      \     +-------+       |       |
+         prior to the storage of B        ---->| A->1  |------>| 2nd   |
+         to be perceptible to CPU 2            +-------+       |       |
+                                               :       :       +-------+
+
+
+But it may be that the update to A from CPU 1 becomes perceptible to CPU 2
+before the read barrier completes anyway:
+
+       +-------+       :      :                :       :
+       |       |       +------+                +-------+
+       |       |------>| A=1  |------      --->| A->0  |
+       |       |       +------+      \         +-------+
+       | CPU 1 |   wwwwwwwwwwwwwwww   \    --->| B->9  |
+       |       |       +------+        |       +-------+
+       |       |------>| B=2  |---     |       :       :
+       |       |       +------+   \    |       :       :       +-------+
+       +-------+       :      :    \   |       +-------+       |       |
+                                    ---------->| B->2  |------>|       |
+                                       |       +-------+       | CPU 2 |
+                                       |       :       :       |       |
+                                        \      :       :       |       |
+                                         \     +-------+       |       |
+                                          ---->| A->1  |------>| 1st   |
+                                               +-------+       |       |
+                                           rrrrrrrrrrrrrrrrr   |       |
+                                               +-------+       |       |
+                                               | A->1  |------>| 2nd   |
+                                               +-------+       |       |
+                                               :       :       +-------+
+
+
+The guarantee is that the second load will always come up with A == 1 if the
+load of B came up with B == 2.  No such guarantee exists for the first load of
+A; that may come up with either A == 0 or A == 1.
+
+
+READ MEMORY BARRIERS VS LOAD SPECULATION
+----------------------------------------
+
+Many CPUs speculate with loads: that is they see that they will need to load an
+item from memory, and they find a time where they're not using the bus for any
+other loads, and so do the load in advance - even though they haven't actually
+got to that point in the instruction execution flow yet.  This permits the
+actual load instruction to potentially complete immediately because the CPU
+already has the value to hand.
+
+It may turn out that the CPU didn't actually need the value - perhaps because a
+branch circumvented the load - in which case it can discard the value or just
+cache it for later use.
+
+Consider:
+
+       CPU 1                   CPU 2
+       ======================= =======================
+                               LOAD B
+                               DIVIDE          } Divide instructions generally
+                               DIVIDE          } take a long time to perform
+                               LOAD A
+
+Which might appear as this:
+
+                                               :       :       +-------+
+                                               +-------+       |       |
+                                           --->| B->2  |------>|       |
+                                               +-------+       | CPU 2 |
+                                               :       :DIVIDE |       |
+                                               +-------+       |       |
+       The CPU being busy doing a --->     --->| A->0  |~~~~   |       |
+       division speculates on the              +-------+   ~   |       |
+       LOAD of A                               :       :   ~   |       |
+                                               :       :DIVIDE |       |
+                                               :       :   ~   |       |
+       Once the divisions are complete -->     :       :   ~-->|       |
+       the CPU can then perform the            :       :       |       |
+       LOAD with immediate effect              :       :       +-------+
+
+
+Placing a read barrier or a data dependency barrier just before the second
+load:
+
+       CPU 1                   CPU 2
+       ======================= =======================
+                               LOAD B
+                               DIVIDE
+                               DIVIDE
+                               <read barrier>
+                               LOAD A
+
+will force any value speculatively obtained to be reconsidered to an extent
+dependent on the type of barrier used.  If there was no change made to the
+speculated memory location, then the speculated value will just be used:
+
+                                               :       :       +-------+
+                                               +-------+       |       |
+                                           --->| B->2  |------>|       |
+                                               +-------+       | CPU 2 |
+                                               :       :DIVIDE |       |
+                                               +-------+       |       |
+       The CPU being busy doing a --->     --->| A->0  |~~~~   |       |
+       division speculates on the              +-------+   ~   |       |
+       LOAD of A                               :       :   ~   |       |
+                                               :       :DIVIDE |       |
+                                               :       :   ~   |       |
+                                               :       :   ~   |       |
+                                           rrrrrrrrrrrrrrrr~   |       |
+                                               :       :   ~   |       |
+                                               :       :   ~-->|       |
+                                               :       :       |       |
+                                               :       :       +-------+
+
+
+but if there was an update or an invalidation from another CPU pending, then
+the speculation will be cancelled and the value reloaded:
+
+                                               :       :       +-------+
+                                               +-------+       |       |
+                                           --->| B->2  |------>|       |
+                                               +-------+       | CPU 2 |
+                                               :       :DIVIDE |       |
+                                               +-------+       |       |
+       The CPU being busy doing a --->     --->| A->0  |~~~~   |       |
+       division speculates on the              +-------+   ~   |       |
+       LOAD of A                               :       :   ~   |       |
+                                               :       :DIVIDE |       |
+                                               :       :   ~   |       |
+                                               :       :   ~   |       |
+                                           rrrrrrrrrrrrrrrrr   |       |
+                                               +-------+       |       |
+       The speculation is discarded --->   --->| A->1  |------>|       |
+       and an updated value is                 +-------+       |       |
+       retrieved                               :       :       +-------+
 
 
 ========================
@@ -901,7 +1081,7 @@ IMPLICIT KERNEL MEMORY BARRIERS
 ===============================
 
 Some of the other functions in the linux kernel imply memory barriers, amongst
-which are locking, scheduling and memory allocation functions.
+which are locking and scheduling functions.
 
 This specification is a _minimum_ guarantee; any particular architecture may
 provide more substantial guarantees, but these may not be relied upon outside
@@ -966,6 +1146,20 @@ equivalent to a full barrier, but a LOCK followed by an UNLOCK is not.
     barriers is that the effects instructions outside of a critical section may
     seep into the inside of the critical section.
 
+A LOCK followed by an UNLOCK may not be assumed to be full memory barrier
+because it is possible for an access preceding the LOCK to happen after the
+LOCK, and an access following the UNLOCK to happen before the UNLOCK, and the
+two accesses can themselves then cross:
+
+       *A = a;
+       LOCK
+       UNLOCK
+       *B = b;
+
+may occur as:
+
+       LOCK, STORE *B, STORE *A, UNLOCK
+
 Locks and semaphores may not provide any guarantee of ordering on UP compiled
 systems, and so cannot be counted on in such a situation to actually achieve
 anything at all - especially with respect to I/O accesses - unless combined
@@ -1016,8 +1210,6 @@ Other functions that imply barriers:
 
  (*) schedule() and similar imply full memory barriers.
 
- (*) Memory allocation and release functions imply full memory barriers.
-
 
 =================================
 INTER-CPU LOCKING BARRIER EFFECTS
index df82116a9f261c35998c3bb5a69eb1a38c8d83d1..88ad615dd338d75e2b282422c8f2d6f7f3af80b7 100644 (file)
@@ -214,12 +214,13 @@ hardware.
        The interaction of the iflag bits is as follows (parity error
        given as an example):
        Parity error    INPCK   IGNPAR
-       None            n/a     n/a     character received
-       Yes             n/a     0       character discarded
-       Yes             0       1       character received, marked as
+       n/a             0       n/a     character received, marked as
                                        TTY_NORMAL
-       Yes             1       1       character received, marked as
+       None            1       n/a     character received, marked as
+                                       TTY_NORMAL
+       Yes             1       0       character received, marked as
                                        TTY_PARITY
+       Yes             1       1       character discarded
 
        Other flags may be used (eg, xon/xoff characters) if your
        hardware supports hardware "soft" flow control.
index c5beb548cfc42b781fd825ff9345f411f087897d..21ed5117366240d2a33af5af7f5605733bd514c1 100644 (file)
@@ -36,6 +36,9 @@ timeout or margin.  The simplest way to ping the watchdog is to write
 some data to the device.  So a very simple watchdog daemon would look
 like this:
 
+#include <stdlib.h>
+#include <fcntl.h>
+
 int main(int argc, const char *argv[]) {
        int fd=open("/dev/watchdog",O_WRONLY);
        if (fd==-1) {
index 753584cf4e7e30a50224a8e908dc6fa695e2336f..c3c5842402df553bc497a594fac2b30b7d4a3b84 100644 (file)
@@ -40,11 +40,20 @@ trivial patch so apply some common sense.
        PLEASE document known bugs. If it doesn't work for everything
        or does something very odd once a month document it.
 
+       PLEASE remember that submissions must be made under the terms
+       of the OSDL certificate of contribution
+       (http://www.osdl.org/newsroom/press_releases/2004/2004_05_24_dco.html)
+       and should include a Signed-off-by: line.
+
 6.     Make sure you have the right to send any changes you make. If you
        do changes at work you may find your employer owns the patch
        not you.
 
-7.     Happy hacking.
+7.     When sending security related changes or reports to a maintainer
+       please Cc: security@kernel.org, especially if the maintainer
+       does not respond.
+
+8.     Happy hacking.
 
                -----------------------------------
 
@@ -556,7 +565,19 @@ BROADBAND PROCESSOR ARCHITECTURE
 P:     Arnd Bergmann
 M:     arnd@arndb.de
 L:     linuxppc-dev@ozlabs.org
-W:     http://linuxppc64.org
+W:     http://www.penguinppc.org/ppc64/
+S:     Supported
+
+BROADCOM BNX2 GIGABIT ETHERNET DRIVER
+P:     Michael Chan
+M:     mchan@broadcom.com
+L:     netdev@vger.kernel.org
+S:     Supported
+
+BROADCOM TG3 GIGABIT ETHERNET DRIVER
+P:     Michael Chan
+M:     mchan@broadcom.com
+L:     netdev@vger.kernel.org
 S:     Supported
 
 BTTV VIDEO4LINUX DRIVER
@@ -969,7 +990,7 @@ S:  Maintained
 EXT3 FILE SYSTEM
 P:     Stephen Tweedie, Andrew Morton
 M:     sct@redhat.com, akpm@osdl.org, adilger@clusterfs.com
-L:     ext3-users@redhat.com
+L:     ext2-devel@lists.sourceforge.net
 S:     Maintained
 
 F71805F HARDWARE MONITORING DRIVER
@@ -1530,12 +1551,28 @@ W:      http://jfs.sourceforge.net/
 T:     git kernel.org:/pub/scm/linux/kernel/git/shaggy/jfs-2.6.git
 S:     Supported
 
+JOURNALLING LAYER FOR BLOCK DEVICS (JBD)
+P:     Stephen Tweedie, Andrew Morton
+M:     sct@redhat.com, akpm@osdl.org
+L:     ext2-devel@lists.sourceforge.net
+S:     Maintained
+
 KCONFIG
 P:     Roman Zippel
 M:     zippel@linux-m68k.org
 L:     kbuild-devel@lists.sourceforge.net
 S:     Maintained
 
+KDUMP
+P:     Vivek Goyal
+M:     vgoyal@in.ibm.com
+P:     Haren Myneni
+M:     hbabu@us.ibm.com
+L:     fastboot@lists.osdl.org
+L:     linux-kernel@vger.kernel.org
+W:     http://lse.sourceforge.net/kdump/
+S:     Maintained
+
 KERNEL AUTOMOUNTER (AUTOFS)
 P:     H. Peter Anvin
 M:     hpa@zytor.com
@@ -1691,7 +1728,7 @@ M:        paulus@au.ibm.com
 P:     Anton Blanchard
 M:     anton@samba.org
 M:     anton@au.ibm.com
-W:     http://linuxppc64.org
+W:     http://www.penguinppc.org/ppc64/
 L:     linuxppc-dev@ozlabs.org
 S:     Supported
 
@@ -1852,6 +1889,11 @@ L:       linux-kernel@vger.kernel.org
 W:     http://www.atnf.csiro.au/~rgooch/linux/kernel-patches.html
 S:     Maintained
 
+MULTIMEDIA CARD SUBSYSTEM
+P:     Russell King
+M:     rmk+mmc@arm.linux.org.uk
+S:     Maintained
+
 MULTISOUND SOUND DRIVER
 P:     Andrew Veliath
 M:     andrewtv@usa.net
@@ -1874,6 +1916,12 @@ M:       James.Bottomley@HansenPartnership.com
 L:     linux-scsi@vger.kernel.org
 S:     Maintained
 
+NETEM NETWORK EMULATOR
+P:     Stephen Hemminger
+M:     shemminger@osdl.org
+L:     netem@osdl.org
+S:     Maintained
+
 NETFILTER/IPTABLES/IPCHAINS
 P:     Rusty Russell
 P:     Marc Boucher
index 3494c17c9fb9fe437134057e01bac2f4ffc887aa..a3a7baad85550690b45ea007f98477ff948e5186 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,8 +1,8 @@
 VERSION = 2
 PATCHLEVEL = 6
 SUBLEVEL = 17
-EXTRAVERSION =-rc4
-NAME=Sliding Snow Leopard
+EXTRAVERSION =-rc6
+NAME=Crazed Snow-Weasel
 
 # *DOCUMENTATION*
 # To see a list of typical targets execute "make help"
index 8290b69da20214a7e19fedd0fc047d33d5d82ba7..213c7850d5fb9639a007616b7357fe93f5ae64e8 100644 (file)
@@ -453,7 +453,7 @@ config ALPHA_IRONGATE
 
 config GENERIC_HWEIGHT
        bool
-       default y if !ALPHA_EV6 && !ALPHA_EV67
+       default y if !ALPHA_EV67
 
 config ALPHA_AVANTI
        bool
index c645c5e14786fdd17efddf40bb3ae2b40524ffd8..2b245ad731ee8f85a4e02ce3de100713760a414c 100644 (file)
@@ -182,7 +182,6 @@ EXPORT_SYMBOL(smp_num_cpus);
 EXPORT_SYMBOL(smp_call_function);
 EXPORT_SYMBOL(smp_call_function_on_cpu);
 EXPORT_SYMBOL(_atomic_dec_and_lock);
-EXPORT_SYMBOL(cpu_present_mask);
 #endif /* CONFIG_SMP */
 
 /*
index 9924fd07743abfd5bb4cda9e78ac3e58ca72a9d7..c760a831fd1a250d45bdc2e6e70f6f5c243fd3c1 100644 (file)
@@ -94,7 +94,7 @@ common_shutdown_1(void *generic_ptr)
        if (cpuid != boot_cpuid) {
                flags |= 0x00040000UL; /* "remain halted" */
                *pflags = flags;
-               clear_bit(cpuid, &cpu_present_mask);
+               cpu_clear(cpuid, cpu_present_map);
                halt();
        }
 #endif
@@ -120,8 +120,8 @@ common_shutdown_1(void *generic_ptr)
 
 #ifdef CONFIG_SMP
        /* Wait for the secondaries to halt. */
-       cpu_clear(boot_cpuid, cpu_possible_map);
-       while (cpus_weight(cpu_possible_map))
+       cpu_clear(boot_cpuid, cpu_present_map);
+       while (cpus_weight(cpu_present_map))
                barrier();
 #endif
 
index 185255416e8538c22384ae89491720834aa6fcc1..4dc273e537fdd38830deb0ede8a3b560827a8ab0 100644 (file)
@@ -68,7 +68,6 @@ enum ipi_message_type {
 static int smp_secondary_alive __initdata = 0;
 
 /* Which cpus ids came online.  */
-cpumask_t cpu_present_mask;
 cpumask_t cpu_online_map;
 
 EXPORT_SYMBOL(cpu_online_map);
@@ -439,7 +438,7 @@ setup_smp(void)
                        if ((cpu->flags & 0x1cc) == 0x1cc) {
                                smp_num_probed++;
                                /* Assume here that "whami" == index */
-                               cpu_set(i, cpu_present_mask);
+                               cpu_set(i, cpu_present_map);
                                cpu->pal_revision = boot_cpu_palrev;
                        }
 
@@ -450,11 +449,10 @@ setup_smp(void)
                }
        } else {
                smp_num_probed = 1;
-               cpu_set(boot_cpuid, cpu_present_mask);
        }
 
-       printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_mask = %lx\n",
-              smp_num_probed, cpu_possible_map.bits[0]);
+       printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_map = %lx\n",
+              smp_num_probed, cpu_present_map.bits[0]);
 }
 
 /*
@@ -473,7 +471,7 @@ smp_prepare_cpus(unsigned int max_cpus)
 
        /* Nothing to do on a UP box, or when told not to.  */
        if (smp_num_probed == 1 || max_cpus == 0) {
-               cpu_present_mask = cpumask_of_cpu(boot_cpuid);
+               cpu_present_map = cpumask_of_cpu(boot_cpuid);
                printk(KERN_INFO "SMP mode deactivated.\n");
                return;
        }
@@ -486,10 +484,6 @@ smp_prepare_cpus(unsigned int max_cpus)
 void __devinit
 smp_prepare_boot_cpu(void)
 {
-       /*
-        * Mark the boot cpu (current cpu) as online
-        */ 
-       cpu_set(smp_processor_id(), cpu_online_map);
 }
 
 int __devinit
index 5f84417eeb7bee9502d0da72805bc895b864ca0f..2551fb49ae099150561407adc726e410b8e03c9f 100644 (file)
@@ -66,7 +66,7 @@ titan_update_irq_hw(unsigned long mask)
        register int bcpu = boot_cpuid;
 
 #ifdef CONFIG_SMP
-       cpumask_t cpm = cpu_present_mask;
+       cpumask_t cpm = cpu_present_map;
        volatile unsigned long *dim0, *dim1, *dim2, *dim3;
        unsigned long mask0, mask1, mask2, mask3, dummy;
 
index 5d3acff8c596e0c0670d7d956379d860e9591ba7..d22f38b957db9c825e5cae7bec8bee90357efa06 100644 (file)
@@ -101,7 +101,7 @@ config DEBUG_S3C2410_UART
        help
          Choice for UART for kernel low-level using S3C2410 UARTS,
          should be between zero and two. The port must have been
-         initalised by the boot-loader before use.
+         initialised by the boot-loader before use.
 
          The uncompressor code port configuration is now handled
          by CONFIG_S3C2410_LOWLEVEL_UART_PORT.
index 9be01b0c3f4876f19a0a23c8b093321598658978..e24566b88a783744059639191d35af51db83aba4 100644 (file)
@@ -111,21 +111,21 @@ static void __init ts72xx_map_io(void)
        }
 }
 
-static unsigned char ts72xx_rtc_readb(unsigned long addr)
+static unsigned char ts72xx_rtc_readbyte(unsigned long addr)
 {
        __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
        return __raw_readb(TS72XX_RTC_DATA_VIRT_BASE);
 }
 
-static void ts72xx_rtc_writeb(unsigned char value, unsigned long addr)
+static void ts72xx_rtc_writebyte(unsigned char value, unsigned long addr)
 {
        __raw_writeb(addr, TS72XX_RTC_INDEX_VIRT_BASE);
        __raw_writeb(value, TS72XX_RTC_DATA_VIRT_BASE);
 }
 
 static struct m48t86_ops ts72xx_rtc_ops = {
-       .readb                  = ts72xx_rtc_readb,
-       .writeb                 = ts72xx_rtc_writeb,
+       .readbyte               = ts72xx_rtc_readbyte,
+       .writebyte              = ts72xx_rtc_writebyte,
 };
 
 static struct platform_device ts72xx_rtc_device = {
index eeb8a6d4a3999c1f9f605588ab0852e0b4b88621..a5de5f1da9f2e65dd0c83e99556eeed7f40807aa 100644 (file)
@@ -127,7 +127,7 @@ static void
 imx_gpio_ack_irq(unsigned int irq)
 {
        DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, irq);
-       ISR(IRQ_TO_REG(irq)) |= 1 << ((irq - IRQ_GPIOA(0)) % 32);
+       ISR(IRQ_TO_REG(irq)) = 1 << ((irq - IRQ_GPIOA(0)) % 32);
 }
 
 static void
index a0724f2b24cec783a242887971b5fc0d2e5a6592..9f55f5ae1044ffcd4e4a3080e581525646e8d639 100644 (file)
@@ -232,8 +232,6 @@ static void __init intcp_init_irq(void)
        for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) {
                if (i == 11)
                        i = 22;
-               if (i == IRQ_CP_CPPLDINT)
-                       i++;
                if (i == 29)
                        break;
                set_irq_chip(i, &pic_chip);
@@ -259,8 +257,7 @@ static void __init intcp_init_irq(void)
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 
-       set_irq_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
-       pic_unmask_irq(IRQ_CP_CPPLDINT);
+       set_irq_chained_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
 }
 
 /*
index 092ee12ced425dcfaaff125a4f8f4cc3324c85c3..affd1d5d744049c44c19d8214d74478317ccc672 100644 (file)
@@ -178,8 +178,12 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type)
 
 static void ixp23xx_irq_mask(unsigned int irq)
 {
-       volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+       volatile unsigned long *intr_reg;
 
+       if (irq >= 56)
+               irq += 8;
+
+       intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
        *intr_reg &= ~(1 << (irq % 32));
 }
 
@@ -199,17 +203,25 @@ static void ixp23xx_irq_ack(unsigned int irq)
  */
 static void ixp23xx_irq_level_unmask(unsigned int irq)
 {
-       volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+       volatile unsigned long *intr_reg;
 
        ixp23xx_irq_ack(irq);
 
+       if (irq >= 56)
+               irq += 8;
+
+       intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
        *intr_reg |= (1 << (irq % 32));
 }
 
 static void ixp23xx_irq_edge_unmask(unsigned int irq)
 {
-       volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
+       volatile unsigned long *intr_reg;
+
+       if (irq >= 56)
+               irq += 8;
 
+       intr_reg = IXP23XX_INTR_EN1 + (irq / 32);
        *intr_reg |= (1 << (irq % 32));
 }
 
index 2a39f9e481ad2d455ae6f00b13f26042755f37d8..3b23f43cb1609f0ffaf38d07cb63f6c207532f56 100644 (file)
@@ -141,7 +141,7 @@ config IXP4XX_INDIRECT_PCI
           2) If > 64MB of memory space is required, the IXP4xx can be 
             configured to use indirect registers to access PCI This allows 
             for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. 
-            The disadvantadge of this is that every PCI access requires 
+            The disadvantage of this is that every PCI access requires 
             three local register accesses plus a spinlock, but in some 
             cases the performance hit is acceptable. In addition, you cannot 
             mmap() PCI devices in this case due to the indirect nature
index 98356f810007fad31d4fdc2cc39bea2e9b1b5c68..b307f11951dfa9d7d14e8b206c4d2abe02f60fea 100644 (file)
@@ -95,7 +95,10 @@ static void __init mainstone_init_irq(void)
        for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
                set_irq_chip(irq, &mainstone_irq_chip);
                set_irq_handler(irq, do_level_IRQ);
-               set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+               if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
+                       set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
+               else
+                       set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
        }
        set_irq_flags(MAINSTONE_IRQ(8), 0);
        set_irq_flags(MAINSTONE_IRQ(12), 0);
@@ -490,6 +493,7 @@ static void __init mainstone_map_io(void)
 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
        /* Maintainer: MontaVista Software Inc. */
        .phys_io        = 0x40000000,
+       .boot_params    = 0xa0000100,   /* BLOB boot parameter setting */
        .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
        .map_io         = mainstone_map_io,
        .init_irq       = mainstone_init_irq,
index 19b372df544a094a086c05cc3e438c9fb7a606b6..44bcb8097c7ada753a985170a4e2e3a44df2be9c 100644 (file)
@@ -371,6 +371,7 @@ static int spitz_ohci_init(struct device *dev)
 static struct pxaohci_platform_data spitz_ohci_platform_data = {
        .port_mode      = PMM_NPS_MODE,
        .init           = spitz_ohci_init,
+       .power_budget   = 150,
 };
 
 
index ce7d81000695e38718c15a0567e00bdffcdc54df..970f98dadffc19bd4e483b0ac4ddd136b49a2da7 100644 (file)
@@ -170,7 +170,7 @@ config S3C2410_PM_DEBUG
        depends on ARCH_S3C2410 && PM
        help
          Say Y here if you want verbose debugging from the PM Suspend and
-         Resume code. See `Documentation/arm/Samsing-S3C24XX/Suspend.txt`
+         Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
          for more information.
 
 config S3C2410_PM_CHECK
index 832fb86a03b430343dd26e9e5be83168ab644c17..73de2eaca22a1c136db339177eb95d1acc4a7610 100644 (file)
@@ -59,8 +59,7 @@ ENTRY(s3c2410_cpu_suspend)
        mrc     p15, 0, r5, c13, c0, 0  @ PID
        mrc     p15, 0, r6, c3, c0, 0   @ Domain ID
        mrc     p15, 0, r7, c2, c0, 0   @ translation table base address
-       mrc     p15, 0, r8, c2, c0, 0   @ auxiliary control register
-       mrc     p15, 0, r9, c1, c0, 0   @ control register
+       mrc     p15, 0, r8, c1, c0, 0   @ control register
 
        stmia   r0, { r4 - r13 }
 
@@ -165,7 +164,6 @@ ENTRY(s3c2410_cpu_resume)
        mcr     p15, 0, r5, c13, c0, 0          @ PID
        mcr     p15, 0, r6, c3, c0, 0           @ Domain ID
        mcr     p15, 0, r7, c2, c0, 0           @ translation table base
-       mcr     p15, 0, r8, c1, c1, 0           @ auxilliary control
 
 #ifdef CONFIG_DEBUG_RESUME
        mov     r3, #'R'
@@ -173,7 +171,7 @@ ENTRY(s3c2410_cpu_resume)
 #endif
 
        ldr     r2, =resume_with_mmu
-       mcr     p15, 0, r9, c1, c0, 0           @ turn on MMU, etc
+       mcr     p15, 0, r8, c1, c0, 0           @ turn on MMU, etc
        nop                                     @ second-to-last before mmu
        mov     pc, r2                          @ go back to virtual address
 
index 9e02bc3712a00b5046245e71a13c1c99101bbcbc..af6d2775cf8237e34aecd21f8039083acbabc5db 100644 (file)
@@ -59,6 +59,14 @@ neponset_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *reg
                if (irr & (IRR_ETHERNET | IRR_USAR)) {
                        desc->chip->mask(irq);
 
+                       /*
+                        * Ack the interrupt now to prevent re-entering
+                        * this neponset handler.  Again, this is safe
+                        * since we'll check the IRR register prior to
+                        * leaving.
+                        */
+                       desc->chip->ack(irq);
+
                        if (irr & IRR_ETHERNET) {
                                d = irq_desc + IRQ_NEPONSET_SMC9196;
                                desc_handle_irq(IRQ_NEPONSET_SMC9196, d, regs);
index 799697d32decb052f60cb50190541194f65bb92e..cebd48a3dae4b757f7a44c95030e6dafe2945a95 100644 (file)
@@ -112,10 +112,9 @@ void __init versatile_init_irq(void)
 {
        unsigned int i;
 
-       vic_init(VA_VIC_BASE, IRQ_VIC_START, ~(1 << 31));
+       vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0);
 
-       set_irq_handler(IRQ_VICSOURCE31, sic_handle_irq);
-       enable_irq(IRQ_VICSOURCE31);
+       set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq);
 
        /* Do second interrupt controller */
        writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
index f14b2d0f3690a002cf396bfa521c57eae068a242..95273de4f772515780e2eac97ed2ae892ac52a0d 100644 (file)
@@ -376,7 +376,7 @@ void __init build_mem_type_table(void)
                ecc_mask = 0;
        }
 
-       if (cpu_arch <= CPU_ARCH_ARMv5TEJ) {
+       if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) {
                for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
                        if (mem_types[i].prot_l1)
                                mem_types[i].prot_l1 |= PMD_BIT4;
@@ -631,7 +631,7 @@ void setup_mm_for_reboot(char mode)
                pgd = init_mm.pgd;
 
        base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
-       if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ)
+       if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())
                base_pmdval |= PMD_BIT4;
 
        for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) {
index 80873b36c3f7a562657a32d9de47e790972cb2d9..8d32e21fe151a919630dc866205974888b624e3a 100644 (file)
@@ -427,12 +427,13 @@ __xsc3_setup:
 #endif
        mcr     p15, 0, r0, c1, c0, 1           @ set auxiliary control reg
        mrc     p15, 0, r0, c1, c0, 0           @ get control register
-       bic     r0, r0, #0x0200                 @ .... ..R. .... ....
        bic     r0, r0, #0x0002                 @ .... .... .... ..A.
        orr     r0, r0, #0x0005                 @ .... .... .... .C.M
 #if BTB_ENABLE
+       bic     r0, r0, #0x0200                 @ .... ..R. .... ....
        orr     r0, r0, #0x3900                 @ ..VI Z..S .... ....
 #else
+       bic     r0, r0, #0x0a00                 @ .... Z.R. .... ....
        orr     r0, r0, #0x3100                 @ ..VI ...S .... ....
 #endif
 #if L2_CACHE_ENABLE
index daee69579b1c6cd6dba672b79c48a2197453f56a..5ccbf58ec94feb7ad7e2a7955fe536e398bbc081 100644 (file)
@@ -215,7 +215,7 @@ static int __init acpi_parse_madt(unsigned long phys_addr, unsigned long size)
 {
        struct acpi_table_madt *madt = NULL;
 
-       if (!phys_addr || !size)
+       if (!phys_addr || !size || !cpu_has_apic)
                return -EINVAL;
 
        madt = (struct acpi_table_madt *)__acpi_map_table(phys_addr, size);
@@ -621,9 +621,9 @@ extern u32 pmtmr_ioport;
 
 static int __init acpi_parse_fadt(unsigned long phys, unsigned long size)
 {
-       struct fadt_descriptor_rev2 *fadt = NULL;
+       struct fadt_descriptor *fadt = NULL;
 
-       fadt = (struct fadt_descriptor_rev2 *)__acpi_map_table(phys, size);
+       fadt = (struct fadt_descriptor *)__acpi_map_table(phys, size);
        if (!fadt) {
                printk(KERN_WARNING PREFIX "Unable to map FADT\n");
                return 0;
@@ -754,7 +754,7 @@ static int __init acpi_parse_madt_ioapic_entries(void)
                return -ENODEV;
        }
 
-       if (!cpu_has_apic)
+       if (!cpu_has_apic) 
                return -ENODEV;
 
        /*
@@ -1066,14 +1066,6 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = {
                     DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
                     },
         },
-       {
-        .callback = disable_acpi_pci,
-        .ident = "HP xw9300",
-        .matches = {
-                   DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
-                   DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
-                   },
-       },
        {}
 };
 
index 2e3b643a4dc4df57552562015349c7657ca5b5d6..1649a175a206ab4bd6ed0add0040580ff83d036e 100644 (file)
@@ -5,17 +5,34 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/pci.h>
+#include <linux/acpi.h>
+
 #include <asm/pci-direct.h>
 #include <asm/acpi.h>
 #include <asm/apic.h>
 
+#ifdef CONFIG_ACPI
+
+static int nvidia_hpet_detected __initdata;
+
+static int __init nvidia_hpet_check(unsigned long phys, unsigned long size)
+{
+       nvidia_hpet_detected = 1;
+       return 0;
+}
+#endif
+
 static int __init check_bridge(int vendor, int device)
 {
 #ifdef CONFIG_ACPI
-       /* According to Nvidia all timer overrides are bogus. Just ignore
-          them all. */
+       /* According to Nvidia all timer overrides are bogus unless HPET
+          is enabled. */
        if (vendor == PCI_VENDOR_ID_NVIDIA) {
-               acpi_skip_timer_override = 1;
+               nvidia_hpet_detected = 0;
+               acpi_table_parse(ACPI_HPET, nvidia_hpet_check);
+               if (nvidia_hpet_detected == 0) {
+                       acpi_skip_timer_override = 1;
+               }
        }
 #endif
        if (vendor == PCI_VENDOR_ID_ATI && timer_over_8254 == 1) {
index 013b85df18c658a87e408fd137fb7b30e32c9c26..3d4b2f3d116a796ffad8ef911353b6a71a2f43b7 100644 (file)
@@ -1341,6 +1341,14 @@ int __init APIC_init_uniprocessor (void)
 
        connect_bsp_APIC();
 
+       /*
+        * Hack: In case of kdump, after a crash, kernel might be booting
+        * on a cpu with non-zero lapic id. But boot_cpu_physical_apicid
+        * might be zero if read from MP tables. Get it from LAPIC.
+        */
+#ifdef CONFIG_CRASH_DUMP
+       boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
+#endif
        phys_cpu_present_map = physid_mask_of_physid(boot_cpu_physical_apicid);
 
        setup_local_APIC();
index 846e1639ef7ce4bb928673b1705a1590345db247..dd6b0e3386ce8f3af2c65d74853d0b001ae07440 100644 (file)
@@ -1547,15 +1547,18 @@ void __init setup_arch(char **cmdline_p)
        if (efi_enabled)
                efi_map_memmap();
 
-#ifdef CONFIG_X86_IO_APIC
-       check_acpi_pci();       /* Checks more than just ACPI actually */
-#endif
-
 #ifdef CONFIG_ACPI
        /*
         * Parse the ACPI tables for possible boot-time SMP configuration.
         */
        acpi_boot_table_init();
+#endif
+
+#ifdef CONFIG_X86_IO_APIC
+       check_acpi_pci();       /* Checks more than just ACPI actually */
+#endif
+
+#ifdef CONFIG_ACPI
        acpi_boot_init();
 
 #if defined(CONFIG_SMP) && defined(CONFIG_X86_PC)
index f48bef15b4f0dd5de72d4bbcc39f8c4f881947b6..af56987f69b02503c82cdc2a48660f56db02153a 100644 (file)
@@ -315,3 +315,4 @@ ENTRY(sys_call_table)
        .long sys_splice
        .long sys_sync_file_range
        .long sys_tee                   /* 315 */
+       .long sys_vmsplice
index 2d22f5761b1dc51ac6bee90789e1e867ad62e779..0e498369f35e916e547485db5f8fed45e3d80055 100644 (file)
@@ -130,9 +130,8 @@ static inline int print_addr_and_symbol(unsigned long addr, char *log_lvl,
        print_symbol("%s", addr);
 
        printed = (printed + 1) % CONFIG_STACK_BACKTRACE_COLS;
-
        if (printed)
-               printk("  ");
+               printk(" ");
        else
                printk("\n");
 
@@ -212,7 +211,6 @@ static void show_stack_log_lvl(struct task_struct *task, unsigned long *esp,
        }
 
        stack = esp;
-       printk(log_lvl);
        for(i = 0; i < kstack_depth_to_print; i++) {
                if (kstack_end(stack))
                        break;
index cea5b3ce4b5766c9747294090542e4eb063b75eb..d55fa7b187ab656f9c581b11c5dfc12f7186f82e 100644 (file)
@@ -93,9 +93,11 @@ int __init mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid
        int i;
        for (i = 0; apic_probe[i]; ++i) { 
                if (apic_probe[i]->mps_oem_check(mpc,oem,productid)) { 
-                       genapic = apic_probe[i];
-                       printk(KERN_INFO "Switched to APIC driver `%s'.\n", 
-                              genapic->name);
+                       if (!cmdline_apic) {
+                               genapic = apic_probe[i];
+                               printk(KERN_INFO "Switched to APIC driver `%s'.\n",
+                                      genapic->name);
+                       }
                        return 1;
                } 
        } 
@@ -107,9 +109,11 @@ int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
        int i;
        for (i = 0; apic_probe[i]; ++i) { 
                if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) { 
-                       genapic = apic_probe[i];
-                       printk(KERN_INFO "Switched to APIC driver `%s'.\n", 
-                              genapic->name);
+                       if (!cmdline_apic) {
+                               genapic = apic_probe[i];
+                               printk(KERN_INFO "Switched to APIC driver `%s'.\n",
+                                      genapic->name);
+                       }
                        return 1;
                } 
        } 
index ae6534ad816113d40b05cc514e2626adf26a5de6..3df1371d4520bb39a8346f6a26326dbce9f589ec 100644 (file)
@@ -651,7 +651,7 @@ void __init mem_init(void)
  * Specifically, in the case of x86, we will always add
  * memory to the highmem for now.
  */
-#ifdef CONFIG_HOTPLUG_MEMORY
+#ifdef CONFIG_MEMORY_HOTPLUG
 #ifndef CONFIG_NEED_MULTIPLE_NODES
 int add_memory(u64 start, u64 size)
 {
index 50a0bef8c85f691bc135167e595dc5b6521a8ec0..79b2370c7facda90db18255983dc85b58523dab0 100644 (file)
@@ -92,7 +92,7 @@ void __restore_processor_state(struct saved_context *ctxt)
        write_cr4(ctxt->cr4);
        write_cr3(ctxt->cr3);
        write_cr2(ctxt->cr2);
-       write_cr2(ctxt->cr0);
+       write_cr0(ctxt->cr0);
 
        /*
         * now restore the descriptor tables to their proper values
index 0f3076a820c3af7dd7c71790be13e212354b3e1a..f0252eda12a8e08f0c6682e89ff796238e8f7739 100644 (file)
@@ -77,6 +77,7 @@ choice
 config IA64_GENERIC
        bool "generic"
        select ACPI
+       select PCI
        select NUMA
        select ACPI_NUMA
        help
index bdccd0b1eb601387a527aeff1b8f800cf6657a42..dd4a2f79263290b47a5491002a3eb0107aca921f 100644 (file)
@@ -1999,7 +1999,7 @@ acpi_sba_ioc_add(struct acpi_device *device)
                if (!iovp_shift)
                        iovp_shift = min(PAGE_SHIFT, 16);
        }
-       ACPI_MEM_FREE(dev_info);
+       kfree(dev_info);
 
        /*
         * default anything not caught above or specified on cmdline to 4k
index 58c93a30348cdfdc43bd6b7c5acbf36245141b75..f97cc6c7f13abdd3773ee5f86e2fdd4d2518ea10 100644 (file)
@@ -68,8 +68,6 @@ EXPORT_SYMBOL(pm_power_off);
 unsigned char acpi_kbd_controller_present = 1;
 unsigned char acpi_legacy_devices;
 
-static unsigned int __initdata acpi_madt_rev;
-
 unsigned int acpi_cpei_override;
 unsigned int acpi_cpei_phys_cpuid;
 
@@ -243,6 +241,8 @@ acpi_parse_iosapic(acpi_table_entry_header * header, const unsigned long end)
        return iosapic_init(iosapic->address, iosapic->global_irq_base);
 }
 
+static unsigned int __initdata acpi_madt_rev;
+
 static int __init
 acpi_parse_plat_int_src(acpi_table_entry_header * header,
                        const unsigned long end)
index cafa8776a53dbbb41443d8b07a2d7e91bd7b4cea..11f08001f8c26e9aaa820b37d379d78eedac0bbd 100644 (file)
@@ -671,9 +671,11 @@ int add_memory(u64 start, u64 size)
 
        return ret;
 }
+EXPORT_SYMBOL_GPL(add_memory);
 
 int remove_memory(u64 start, u64 size)
 {
        return -EINVAL;
 }
+EXPORT_SYMBOL_GPL(remove_memory);
 #endif
index ee5fbb02b28f4f56caa06531d424b8136b0e6748..e8ff09fe73d9dc0f9163f3fcec821521a08ca9c1 100644 (file)
@@ -13,7 +13,7 @@ choice
        default SGI_IP22
 
 config MIPS_MTX1
-       bool "Support for 4G Systems MTX-1 board"
+       bool "4G Systems MTX-1 board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select SOC_AU1500
@@ -120,7 +120,7 @@ config MIPS_MIRAGE
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config MIPS_COBALT
-       bool "Support for Cobalt Server"
+       bool "Cobalt Server"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select I8259
@@ -132,7 +132,7 @@ config MIPS_COBALT
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config MACH_DECSTATION
-       bool "Support for DECstations"
+       bool "DECstations"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select EARLY_PRINTK
@@ -158,7 +158,7 @@ config MACH_DECSTATION
          otherwise choose R3000.
 
 config MIPS_EV64120
-       bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)"
+       bool "Galileo EV64120 Evaluation board (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -175,7 +175,7 @@ config MIPS_EV64120
          kernel for this platform.
 
 config MIPS_EV96100
-       bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)"
+       bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -195,7 +195,7 @@ config MIPS_EV96100
          here if you wish to build a kernel for this platform.
 
 config MIPS_IVR
-       bool "Support for Globespan IVR board"
+       bool "Globespan IVR board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select ITE_BOARD_GEN
@@ -211,7 +211,7 @@ config MIPS_IVR
          build a kernel for this platform.
 
 config MIPS_ITE8172
-       bool "Support for ITE 8172G board"
+       bool "ITE 8172G board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select ITE_BOARD_GEN
@@ -228,7 +228,7 @@ config MIPS_ITE8172
          a kernel for this platform.
 
 config MACH_JAZZ
-       bool "Support for the Jazz family of machines"
+       bool "Jazz family of machines"
        select ARC
        select ARC32
        select ARCH_MAY_HAVE_PC_FDC
@@ -246,7 +246,7 @@ config MACH_JAZZ
         Olivetti M700-10 workstations.
 
 config LASAT
-       bool "Support for LASAT Networks platforms"
+       bool "LASAT Networks platforms"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select MIPS_GT64120
@@ -258,7 +258,7 @@ config LASAT
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config MIPS_ATLAS
-       bool "Support for MIPS Atlas board"
+       bool "MIPS Atlas board"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select IRQ_CPU
@@ -283,7 +283,7 @@ config MIPS_ATLAS
          board.
 
 config MIPS_MALTA
-       bool "Support for MIPS Malta board"
+       bool "MIPS Malta board"
        select ARCH_MAY_HAVE_PC_FDC
        select BOOT_ELF32
        select HAVE_STD_PC_SERIAL_PORT
@@ -311,7 +311,7 @@ config MIPS_MALTA
          board.
 
 config MIPS_SEAD
-       bool "Support for MIPS SEAD board (EXPERIMENTAL)"
+       bool "MIPS SEAD board (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select IRQ_CPU
        select DMA_NONCOHERENT
@@ -328,7 +328,7 @@ config MIPS_SEAD
          board.
 
 config MIPS_SIM
-       bool 'Support for MIPS simulator (MIPSsim)'
+       bool 'MIPS simulator (MIPSsim)'
        select DMA_NONCOHERENT
        select IRQ_CPU
        select SYS_HAS_CPU_MIPS32_R1
@@ -341,7 +341,7 @@ config MIPS_SIM
          emulator.
 
 config MOMENCO_JAGUAR_ATX
-       bool "Support for Momentum Jaguar board"
+       bool "Momentum Jaguar board"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -361,7 +361,7 @@ config MOMENCO_JAGUAR_ATX
          Momentum Computer <http://www.momenco.com/>.
 
 config MOMENCO_OCELOT
-       bool "Support for Momentum Ocelot board"
+       bool "Momentum Ocelot board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -378,7 +378,7 @@ config MOMENCO_OCELOT
          Momentum Computer <http://www.momenco.com/>.
 
 config MOMENCO_OCELOT_3
-       bool "Support for Momentum Ocelot-3 board"
+       bool "Momentum Ocelot-3 board"
        select BOOT_ELF32
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -397,7 +397,7 @@ config MOMENCO_OCELOT_3
          PMC-Sierra Rm79000 core.
 
 config MOMENCO_OCELOT_C
-       bool "Support for Momentum Ocelot-C board"
+       bool "Momentum Ocelot-C board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -414,7 +414,7 @@ config MOMENCO_OCELOT_C
          Momentum Computer <http://www.momenco.com/>.
 
 config MOMENCO_OCELOT_G
-       bool "Support for Momentum Ocelot-G board"
+       bool "Momentum Ocelot-G board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -431,23 +431,23 @@ config MOMENCO_OCELOT_G
          Momentum Computer <http://www.momenco.com/>.
 
 config MIPS_XXS1500
-       bool "Support for MyCable XXS1500 board"
+       bool "MyCable XXS1500 board"
        select DMA_NONCOHERENT
        select SOC_AU1500
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config PNX8550_V2PCI
-       bool "Support for Philips PNX8550 based Viper2-PCI board"
+       bool "Philips PNX8550 based Viper2-PCI board"
        select PNX8550
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config PNX8550_JBS
-       bool "Support for Philips PNX8550 based JBS board"
+       bool "Philips PNX8550 based JBS board"
        select PNX8550
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config DDB5074
-       bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)"
+       bool "NEC DDB Vrc-5074 (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select DDB5XXX_COMMON
        select DMA_NONCOHERENT
@@ -465,7 +465,7 @@ config DDB5074
          evaluation board.
 
 config DDB5476
-       bool "Support for NEC DDB Vrc-5476"
+       bool "NEC DDB Vrc-5476"
        select DDB5XXX_COMMON
        select DMA_NONCOHERENT
        select HAVE_STD_PC_SERIAL_PORT
@@ -486,7 +486,7 @@ config DDB5476
          IDE controller, PS2 keyboard, PS2 mouse, etc.
 
 config DDB5477
-       bool "Support for NEC DDB Vrc-5477"
+       bool "NEC DDB Vrc-5477"
        select DDB5XXX_COMMON
        select DMA_NONCOHERENT
        select HW_HAS_PCI
@@ -504,13 +504,13 @@ config DDB5477
          ether port USB, AC97, PCI, etc.
 
 config MACH_VR41XX
-       bool "Support for NEC VR4100 series based machines"
+       bool "NEC VR41XX-based machines"
        select SYS_HAS_CPU_VR41XX
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
 
 config PMC_YOSEMITE
-       bool "Support for PMC-Sierra Yosemite eval board"
+       bool "PMC-Sierra Yosemite eval board"
        select DMA_COHERENT
        select HW_HAS_PCI
        select IRQ_CPU
@@ -527,7 +527,7 @@ config PMC_YOSEMITE
          manufactured by PMC-Sierra.
 
 config QEMU
-       bool "Support for Qemu"
+       bool "Qemu"
        select DMA_COHERENT
        select GENERIC_ISA_DMA
        select HAVE_STD_PC_SERIAL_PORT
@@ -547,7 +547,7 @@ config QEMU
          can be found at http://www.linux-mips.org/wiki/Qemu.
 
 config SGI_IP22
-       bool "Support for SGI IP22 (Indy/Indigo2)"
+       bool "SGI IP22 (Indy/Indigo2)"
        select ARC
        select ARC32
        select BOOT_ELF32
@@ -567,7 +567,7 @@ config SGI_IP22
          that runs on these, say Y here.
 
 config SGI_IP27
-       bool "Support for SGI IP27 (Origin200/2000)"
+       bool "SGI IP27 (Origin200/2000)"
        select ARC
        select ARC64
        select BOOT_ELF64
@@ -583,7 +583,7 @@ config SGI_IP27
          here.
 
 config SGI_IP32
-       bool "Support for SGI IP32 (O2) (EXPERIMENTAL)"
+       bool "SGI IP32 (O2) (EXPERIMENTAL)"
        depends on EXPERIMENTAL
        select ARC
        select ARC32
@@ -604,7 +604,7 @@ config SGI_IP32
          If you want this kernel to run on SGI O2 workstation, say Y here.
 
 config SIBYTE_BIGSUR
-       bool "Support for Sibyte BCM91480B-BigSur"
+       bool "Sibyte BCM91480B-BigSur"
        select BOOT_ELF32
        select DMA_COHERENT
        select PCI_DOMAINS
@@ -615,7 +615,7 @@ config SIBYTE_BIGSUR
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_SWARM
-       bool "Support for Sibyte BCM91250A-SWARM"
+       bool "Sibyte BCM91250A-SWARM"
        select BOOT_ELF32
        select DMA_COHERENT
        select SIBYTE_SB1250
@@ -626,7 +626,7 @@ config SIBYTE_SWARM
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_SENTOSA
-       bool "Support for Sibyte BCM91250E-Sentosa"
+       bool "Sibyte BCM91250E-Sentosa"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -637,7 +637,7 @@ config SIBYTE_SENTOSA
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_RHONE
-       bool "Support for Sibyte BCM91125E-Rhone"
+       bool "Sibyte BCM91125E-Rhone"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -648,7 +648,7 @@ config SIBYTE_RHONE
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_CARMEL
-       bool "Support for Sibyte BCM91120x-Carmel"
+       bool "Sibyte BCM91120x-Carmel"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -659,7 +659,7 @@ config SIBYTE_CARMEL
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_PTSWARM
-       bool "Support for Sibyte BCM91250PT-PTSWARM"
+       bool "Sibyte BCM91250PT-PTSWARM"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -671,7 +671,7 @@ config SIBYTE_PTSWARM
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_LITTLESUR
-       bool "Support for Sibyte BCM91250C2-LittleSur"
+       bool "Sibyte BCM91250C2-LittleSur"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -683,7 +683,7 @@ config SIBYTE_LITTLESUR
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_CRHINE
-       bool "Support for Sibyte BCM91120C-CRhine"
+       bool "Sibyte BCM91120C-CRhine"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -694,7 +694,7 @@ config SIBYTE_CRHINE
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SIBYTE_CRHONE
-       bool "Support for Sibyte BCM91125C-CRhone"
+       bool "Sibyte BCM91125C-CRhone"
        depends on EXPERIMENTAL
        select BOOT_ELF32
        select DMA_COHERENT
@@ -706,7 +706,7 @@ config SIBYTE_CRHONE
        select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SNI_RM200_PCI
-       bool "Support for SNI RM200 PCI"
+       bool "SNI RM200 PCI"
        select ARC
        select ARC32
        select ARCH_MAY_HAVE_PC_FDC
@@ -732,7 +732,7 @@ config SNI_RM200_PCI
          support this machine type.
 
 config TOSHIBA_JMR3927
-       bool "Support for Toshiba JMR-TX3927 board"
+       bool "Toshiba JMR-TX3927 board"
        select DMA_NONCOHERENT
        select HW_HAS_PCI
        select MIPS_TX3927
@@ -743,7 +743,7 @@ config TOSHIBA_JMR3927
        select TOSHIBA_BOARDS
 
 config TOSHIBA_RBTX4927
-       bool "Support for Toshiba TBTX49[23]7 board"
+       bool "Toshiba TBTX49[23]7 board"
        select DMA_NONCOHERENT
        select HAS_TXX9_SERIAL
        select HW_HAS_PCI
@@ -760,7 +760,7 @@ config TOSHIBA_RBTX4927
          support this machine type
 
 config TOSHIBA_RBTX4938
-       bool "Support for Toshiba RBTX4938 board"
+       bool "Toshiba RBTX4938 board"
        select HAVE_STD_PC_SERIAL_PORT
        select DMA_NONCOHERENT
        select GENERIC_ISA_DMA
@@ -1411,13 +1411,12 @@ config PAGE_SIZE_8KB
 
 config PAGE_SIZE_16KB
        bool "16kB"
-       depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
+       depends on !CPU_R3000 && !CPU_TX39XX
        help
          Using 16kB page size will result in higher performance kernel at
          the price of higher memory consumption.  This option is available on
-         all non-R3000 family processor.  Not that at the time of this
-         writing this option is still high experimental; there are also
-         issues with compatibility of user applications.
+         all non-R3000 family processors.  Note that you will need a suitable
+         Linux distribution to support this.
 
 config PAGE_SIZE_64KB
        bool "64kB"
@@ -1426,8 +1425,7 @@ config PAGE_SIZE_64KB
          Using 64kB page size will result in higher performance kernel at
          the price of higher memory consumption.  This option is available on
          all non-R3000 family processor.  Not that at the time of this
-         writing this option is still high experimental; there are also
-         issues with compatibility of user applications.
+         writing this option is still high experimental.
 
 endchoice
 
index da61de7761549d89c3e5bc08204ebbdfdea5cd2a..afe05ec12c27d31326d73937081eb7e0631d1c33 100644 (file)
@@ -68,6 +68,7 @@
 
 extern void set_debug_traps(void);
 extern irq_cpustat_t irq_stat [NR_CPUS];
+extern void mips_timer_interrupt(struct pt_regs *regs);
 
 static void setup_local_irq(unsigned int irq, int type, int int_req);
 static unsigned int startup_irq(unsigned int irq);
index 9c171afd9a534f121e1e4c0ff5c0c8165e9951e8..ae7d8c57bf3f8d889758f02607a2ad0aec16e4c2 100644 (file)
@@ -1,10 +1,9 @@
 /*
  *
  * BRIEF MODULE DESCRIPTION
- *    PROM library initialisation code, assuming a version of
- *    pmon is the boot code.
+ *    PROM library initialisation code, assuming YAMON is the boot loader.
  *
- * Copyright 2000,2001 MontaVista Software Inc.
+ * Copyright 2000, 2001, 2006 MontaVista Software Inc.
  * Author: MontaVista Software, Inc.
  *             ppopov@mvista.com or source@mvista.com
  *
@@ -49,9 +48,9 @@ extern char **prom_argv, **prom_envp;
 
 typedef struct
 {
-    char *name;
-/*    char *val; */
-}t_env_var;
+       char *name;
+       char *val;
+} t_env_var;
 
 
 char * prom_getcmdline(void)
@@ -85,21 +84,16 @@ char *prom_getenv(char *envname)
 {
        /*
         * Return a pointer to the given environment variable.
-        * Environment variables are stored in the form of "memsize=64".
         */
 
        t_env_var *env = (t_env_var *)prom_envp;
-       int i;
-
-       i = strlen(envname);
 
-       while(env->name) {
-               if(strncmp(envname, env->name, i) == 0) {
-                       return(env->name + strlen(envname) + 1);
-               }
+       while (env->name) {
+               if (strcmp(envname, env->name) == 0)
+                       return env->val;
                env++;
        }
-       return(NULL);
+       return NULL;
 }
 
 inline unsigned char str2hexnum(unsigned char c)
index 44dac3b0df3b2575e705e1a7925928a18a9c7194..683d9da84b6695832193c8c5fe0e2b61496ed1fb 100644 (file)
@@ -112,6 +112,11 @@ sdsleep:
        mtc0    k0, CP0_PAGEMASK
        lw      k0, 0x14(sp)
        mtc0    k0, CP0_CONFIG
+
+       /* We need to catch the ealry Alchemy SOCs with
+        * the write-only Config[OD] bit and set it back to one...
+        */
+       jal     au1x00_fixup_config_od
        lw      $1, PT_R1(sp)
        lw      $2, PT_R2(sp)
        lw      $3, PT_R3(sp)
index f85f1524b36639a1c9c2e9bf0e7ef8673afb4c97..f74d66a58a21a51c8dc2915c8e741fc0b500440a 100644 (file)
@@ -116,6 +116,7 @@ void mips_timer_interrupt(struct pt_regs *regs)
 
 null:
        ack_r4ktimer(0);
+       irq_exit();
 }
 
 #ifdef CONFIG_PM
index 85e9e5013679f83142f602940374226ca0858aaa..f2296a9999534ea2003064a5f468e77a657d4f2a 100644 (file)
@@ -86,7 +86,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
         /* disable interrupts */
         UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-        /* set up buad rate */
+        /* set up baud rate */
         {
                 uint32 divisor;
 
index 1d18d590495b138ac7687d94ecdd1c8b3302cafb..385bbdb10170a058e065b6400615f626f340d98a 100644 (file)
@@ -86,7 +86,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
         /* disable interrupts */
         UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-        /* set up buad rate */
+        /* set up baud rate */
         {
                 uint32 divisor;
 
index 16e34a546e547d0cfe9dc15c1fc04785fb3fc1db..8f0d835491ff46bfce7252479607d3cf4f7a4393 100644 (file)
@@ -149,7 +149,7 @@ void serial_set(int channel, unsigned long baud)
 #else
        /*
         * Note: Set baud rate, hardcoded here for rate of 115200
-        * since became unsure of above "buad rate" algorithm (??).
+        * since became unsure of above "baud rate" algorithm (??).
         */
        outreg(channel, LCR, 0x83);
        outreg(channel, DLM, 0x00);     // See note above
index 8720bccfdea250dd9eddbe580c22b8f4e75fa60e..f0a6a38fcf4d9fae50fc20da3b7c1505ebc451ef 100644 (file)
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-       /* set up buad rate */
+       /* set up baud rate */
        {
                uint32 divisor;
 
index c4f8530fd07e95c129c6c11ae3f7a530c360838e..6a7ccaf9350247d1fea9a44d427151ee2e71b918 100644 (file)
@@ -72,7 +72,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-       /* set up buad rate */
+       /* set up baud rate */
        {
                uint32 divisor;
 
index 92b28b674d6f615be8ab8894ea117e06018f44d1..0facfaf4e9508d7a2d827cfff7e612323d2c9cc5 100644 (file)
@@ -272,8 +272,8 @@ void output_sc_defines(void)
        text("/* Linux sigcontext offsets. */");
        offset("#define SC_REGS       ", struct sigcontext, sc_regs);
        offset("#define SC_FPREGS     ", struct sigcontext, sc_fpregs);
-       offset("#define SC_MDHI       ", struct sigcontext, sc_hi);
-       offset("#define SC_MDLO       ", struct sigcontext, sc_lo);
+       offset("#define SC_MDHI       ", struct sigcontext, sc_mdhi);
+       offset("#define SC_MDLO       ", struct sigcontext, sc_mdlo);
        offset("#define SC_PC         ", struct sigcontext, sc_pc);
        offset("#define SC_FPC_CSR    ", struct sigcontext, sc_fpc_csr);
        linefeed;
index 47a087b6c11ba881d33d2aa2d3aaf2ffce50374a..d268827c62bdd167459e8e43d2467781ff9f879a 100644 (file)
@@ -206,7 +206,7 @@ static inline void check_daddi(void)
                "daddi  %0, %1, %3\n\t"
                ".set   pop"
                : "=r" (v), "=&r" (tmp)
-               : "I" (0xffffffffffffdb9a), "I" (0x1234));
+               : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
        set_except_vector(12, handler);
        local_irq_restore(flags);
 
@@ -224,7 +224,7 @@ static inline void check_daddi(void)
                "dsrl   %1, %1, 1\n\t"
                "daddi  %0, %1, %3"
                : "=r" (v), "=&r" (tmp)
-               : "I" (0xffffffffffffdb9a), "I" (0x1234));
+               : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
        set_except_vector(12, handler);
        local_irq_restore(flags);
 
@@ -280,7 +280,7 @@ static inline void check_daddiu(void)
                "daddu  %1, %2\n\t"
                ".set   pop"
                : "=&r" (v), "=&r" (w), "=&r" (tmp)
-               : "I" (0xffffffffffffdb9a), "I" (0x1234));
+               : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
 
        if (v == w) {
                printk("no.\n");
@@ -296,7 +296,7 @@ static inline void check_daddiu(void)
                "addiu  %1, $0, %4\n\t"
                "daddu  %1, %2"
                : "=&r" (v), "=&r" (w), "=&r" (tmp)
-               : "I" (0xffffffffffffdb9a), "I" (0x1234));
+               : "I" (0xffffffffffffdb9aUL), "I" (0x1234));
 
        if (v == w) {
                printk("yes.\n");
index 58b3b14873cb572a10d9a87e2b57cece1fc061b8..8c2c359a05f413bd089a8eb40cf64781ac8bb89a 100644 (file)
@@ -121,6 +121,7 @@ static inline void check_wait(void)
        case CPU_24K:
        case CPU_25KF:
        case CPU_34K:
+       case CPU_74K:
        case CPU_PR4450:
                cpu_wait = r4k_wait;
                printk(" available.\n");
@@ -432,6 +433,15 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
                             MIPS_CPU_LLSC;
                c->tlbsize = 64;
                break;
+       case PRID_IMP_R14000:
+               c->cputype = CPU_R14000;
+               c->isa_level = MIPS_CPU_ISA_IV;
+               c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
+                            MIPS_CPU_FPU | MIPS_CPU_32FPR |
+                            MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
+                            MIPS_CPU_LLSC;
+               c->tlbsize = 64;
+               break;
        }
 }
 
@@ -593,6 +603,9 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
        case PRID_IMP_34K:
                c->cputype = CPU_34K;
                break;
+       case PRID_IMP_74K:
+               c->cputype = CPU_74K;
+               break;
        }
 }
 
@@ -642,7 +655,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
        case PRID_IMP_SB1:
                c->cputype = CPU_SB1;
                /* FPU in pass1 is known to have issues. */
-               if ((c->processor_id & 0xff) < 0x20)
+               if ((c->processor_id & 0xff) < 0x02)
                        c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
                break;
        case PRID_IMP_SB1A:
index d101d2fb24caab6f8283647a20a5c37768f30c05..a9c6de1b954257e8e30e73518009f7cf3d1444ae 100644 (file)
@@ -101,7 +101,7 @@ FEXPORT(restore_all)                        # restore full frame
        EMT
 1:
        mfc0    v1, CP0_TCSTATUS
-       /* We set IXMT above, XOR should cler it here */
+       /* We set IXMT above, XOR should clear it here */
        xori    v1, v1, TCSTATUS_IXMT
        or      v1, v0, v1
        mtc0    v1, CP0_TCSTATUS
index 10f28fb9f008a92fc89b68c89734233297e8472b..5fd7a8af0c6256bc720c7fa232ee14d551be3e63 100644 (file)
                 */
                mfc0    k0, CP0_CAUSE
                andi    k0, k0, 0x7c
-               add     k1, k1, k0
-               PTR_L   k0, saved_vectors(k1)
-               jr      k0
+#ifdef CONFIG_64BIT
+               dsll    k0, k0, 1
+#endif
+               PTR_L   k1, saved_vectors(k0)
+               jr      k1
                nop
 1:
                move    k0, sp
index e54a7f442f8adc271af20fcf7ac310e9fb9e8bb0..d7bf0215bc1d28eb40160366afbdd59b41fea470 100644 (file)
@@ -288,6 +288,9 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab,
                sym = (Elf_Sym *)sechdrs[symindex].sh_addr
                        + ELF_MIPS_R_SYM(rel[i]);
                if (!sym->st_value) {
+                       /* Ignore unresolved weak symbol */
+                       if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
+                               continue;
                        printk(KERN_WARNING "%s: Unknown symbol %s\n",
                               me->name, strtab + sym->st_name);
                        return -ENOENT;
@@ -325,6 +328,9 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab,
                sym = (Elf_Sym *)sechdrs[symindex].sh_addr
                        + ELF_MIPS_R_SYM(rel[i]);
                if (!sym->st_value) {
+                       /* Ignore unresolved weak symbol */
+                       if (ELF_ST_BIND(sym->st_info) == STB_WEAK)
+                               continue;
                        printk(KERN_WARNING "%s: Unknown symbol %s\n",
                               me->name, strtab + sym->st_name);
                        return -ENOENT;
index 84ab959f924ac57d1b05edc73aa48ce84c2da04f..9def554f335b8f430dd0483dcca482b83c083d07 100644 (file)
@@ -42,6 +42,7 @@ static const char *cpu_name[] = {
        [CPU_R8000]     = "R8000",
        [CPU_R10000]    = "R10000",
        [CPU_R12000]    = "R12000",
+       [CPU_R14000]    = "R14000",
        [CPU_R4300]     = "R4300",
        [CPU_R4650]     = "R4650",
        [CPU_R4700]     = "R4700",
@@ -74,6 +75,7 @@ static const char *cpu_name[] = {
        [CPU_24K]       = "MIPS 24K",
        [CPU_25KF]      = "MIPS 25Kf",
        [CPU_34K]       = "MIPS 34K",
+       [CPU_74K]       = "MIPS 74K",
        [CPU_VR4111]    = "NEC VR4111",
        [CPU_VR4121]    = "NEC VR4121",
        [CPU_VR4122]    = "NEC VR4122",
index b53a9207f530a9db07d58c19b556b9d1cc379594..8efb23a841317a03a385f7ccb2c8d9b47b250475 100644 (file)
@@ -209,7 +209,7 @@ sys_call_table:
        PTR     sys_fork
        PTR     sys_read
        PTR     sys_write
-       PTR     sys_open                        /* 4005 */
+       PTR     compat_sys_open                 /* 4005 */
        PTR     sys_close
        PTR     sys_waitpid
        PTR     sys_creat
index bcf1b10e518f8be4b4302e13bb3186d1e1773438..397a70e651b5e9c21dbe7e3347dcc279df728b78 100644 (file)
@@ -246,7 +246,7 @@ static inline int parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_en
 #ifdef CONFIG_64BIT
        /* HACK: Guess if the sign extension was forgotten */
        if (start > 0x0000000080000000 && start < 0x00000000ffffffff)
-               start |= 0xffffffff00000000;
+               start |= 0xffffffff00000000UL;
 #endif
 
        end = start + size;
@@ -355,8 +355,6 @@ static inline void bootmem_init(void)
        }
 #endif
 
-       memory_present(0, first_usable_pfn, max_low_pfn);
-
        /* Initialize the boot-time allocator with low memory only.  */
        bootmap_size = init_bootmem(first_usable_pfn, max_low_pfn);
 
@@ -410,6 +408,7 @@ static inline void bootmem_init(void)
 
                /* Register lowmem ranges */
                free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
+               memory_present(0, curr_pfn, curr_pfn + size - 1);
        }
 
        /* Reserve the bootmap memory.  */
@@ -419,17 +418,20 @@ static inline void bootmem_init(void)
 #ifdef CONFIG_BLK_DEV_INITRD
        initrd_below_start_ok = 1;
        if (initrd_start) {
-               unsigned long initrd_size = ((unsigned char *)initrd_end) - ((unsigned char *)initrd_start);
+               unsigned long initrd_size = ((unsigned char *)initrd_end) -
+                       ((unsigned char *)initrd_start);
+               const int width = sizeof(long) * 2;
+
                printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
                       (void *)initrd_start, initrd_size);
 
                if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) {
                        printk("initrd extends beyond end of memory "
                               "(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n",
-                              sizeof(long) * 2,
-                              (unsigned long long)CPHYSADDR(initrd_end),
-                              sizeof(long) * 2,
-                              (unsigned long long)PFN_PHYS(max_low_pfn));
+                              width,
+                              (unsigned long long) CPHYSADDR(initrd_end),
+                              width,
+                              (unsigned long long) PFN_PHYS(max_low_pfn));
                        initrd_start = initrd_end = 0;
                        initrd_reserve_bootmem = 0;
                }
index 3ca786215d48c172fe0948c450c359d16e3f3c20..ce6cb915c0a7a703ab6c49a2e269d4de1256db38 100644 (file)
@@ -31,7 +31,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
        save_gp_reg(31);
 #undef save_gp_reg
 
-#ifdef CONFIG_32BIT
        err |= __put_user(regs->hi, &sc->sc_mdhi);
        err |= __put_user(regs->lo, &sc->sc_mdlo);
        if (cpu_has_dsp) {
@@ -43,20 +42,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
                err |= __put_user(mflo3(), &sc->sc_lo3);
                err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
        }
-#endif
-#ifdef CONFIG_64BIT
-       err |= __put_user(regs->hi, &sc->sc_hi[0]);
-       err |= __put_user(regs->lo, &sc->sc_lo[0]);
-       if (cpu_has_dsp) {
-               err |= __put_user(mfhi1(), &sc->sc_hi[1]);
-               err |= __put_user(mflo1(), &sc->sc_lo[1]);
-               err |= __put_user(mfhi2(), &sc->sc_hi[2]);
-               err |= __put_user(mflo2(), &sc->sc_lo[2]);
-               err |= __put_user(mfhi3(), &sc->sc_hi[3]);
-               err |= __put_user(mflo3(), &sc->sc_lo[3]);
-               err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
-       }
-#endif
 
        err |= __put_user(!!used_math(), &sc->sc_used_math);
 
@@ -92,7 +77,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
        current_thread_info()->restart_block.fn = do_no_restart_syscall;
 
        err |= __get_user(regs->cp0_epc, &sc->sc_pc);
-#ifdef CONFIG_32BIT
        err |= __get_user(regs->hi, &sc->sc_mdhi);
        err |= __get_user(regs->lo, &sc->sc_mdlo);
        if (cpu_has_dsp) {
@@ -104,20 +88,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
                err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg);
                err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
        }
-#endif
-#ifdef CONFIG_64BIT
-       err |= __get_user(regs->hi, &sc->sc_hi[0]);
-       err |= __get_user(regs->lo, &sc->sc_lo[0]);
-       if (cpu_has_dsp) {
-               err |= __get_user(treg, &sc->sc_hi[1]); mthi1(treg);
-               err |= __get_user(treg, &sc->sc_lo[1]); mthi1(treg);
-               err |= __get_user(treg, &sc->sc_hi[2]); mthi2(treg);
-               err |= __get_user(treg, &sc->sc_lo[2]); mthi2(treg);
-               err |= __get_user(treg, &sc->sc_hi[3]); mthi3(treg);
-               err |= __get_user(treg, &sc->sc_lo[3]); mthi3(treg);
-               err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
-       }
-#endif
 
 #define restore_gp_reg(i) do {                                         \
        err |= __get_user(regs->regs[i], &sc->sc_regs[i]);              \
index d42f358754ad829129663f01350d7c0757f8f078..298f82fe8440a43d1a8140ed8a256d44595ed6d8 100644 (file)
@@ -247,6 +247,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
        current_thread_info()->cpu = 0;
        smp_tune_scheduling();
        plat_prepare_cpus(max_cpus);
+#ifndef CONFIG_HOTPLUG_CPU
+       cpu_present_map = cpu_possible_map;
+#endif
 }
 
 /* preload SMP state for boot cpu */
@@ -442,7 +445,7 @@ static int __init topology_init(void)
        int cpu;
        int ret;
 
-       for_each_cpu(cpu) {
+       for_each_present_cpu(cpu) {
                ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL);
                if (ret)
                        printk(KERN_WARNING "topology_init: register_cpu %d "
index 2aeaa2fd4b322a1ebec61d1861eda4aab1ad4e0a..5e8a18a8e2bda49d4ac59388d6df985eeafe4b1d 100644 (file)
@@ -276,31 +276,9 @@ void sys_set_thread_area(unsigned long addr)
 
 asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
 {
-       int     tmp, len;
-       char    __user *name;
+       int     tmp;
 
        switch(cmd) {
-       case SETNAME: {
-               char nodename[__NEW_UTS_LEN + 1];
-
-               if (!capable(CAP_SYS_ADMIN))
-                       return -EPERM;
-
-               name = (char __user *) arg1;
-
-               len = strncpy_from_user(nodename, name, __NEW_UTS_LEN);
-               if (len < 0)
-                       return -EFAULT;
-
-               down_write(&uts_sem);
-               strncpy(system_utsname.nodename, nodename, len);
-               nodename[__NEW_UTS_LEN] = '\0';
-               strlcpy(system_utsname.nodename, nodename,
-                       sizeof(system_utsname.nodename));
-               up_write(&uts_sem);
-               return 0;
-       }
-
        case MIPS_ATOMIC_SET:
                printk(KERN_CRIT "How did I get here?\n");
                return -EINVAL;
@@ -313,9 +291,6 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
        case FLUSH_CACHE:
                __flush_cache_all();
                return 0;
-
-       case MIPS_RDNVRAM:
-               return -EIO;
        }
 
        return -EINVAL;
index 4901f0a37fca2b3ddb2de93dcf998873b10e6643..a7564b08eb4da273c3252d64cd46f8daf00a45d9 100644 (file)
@@ -819,15 +819,30 @@ asmlinkage void do_watch(struct pt_regs *regs)
 
 asmlinkage void do_mcheck(struct pt_regs *regs)
 {
+       const int field = 2 * sizeof(unsigned long);
+       int multi_match = regs->cp0_status & ST0_TS;
+
        show_regs(regs);
-       dump_tlb_all();
+
+       if (multi_match) {
+               printk("Index   : %0x\n", read_c0_index());
+               printk("Pagemask: %0x\n", read_c0_pagemask());
+               printk("EntryHi : %0*lx\n", field, read_c0_entryhi());
+               printk("EntryLo0: %0*lx\n", field, read_c0_entrylo0());
+               printk("EntryLo1: %0*lx\n", field, read_c0_entrylo1());
+               printk("\n");
+               dump_tlb_all();
+       }
+
+       show_code((unsigned int *) regs->cp0_epc);
+
        /*
         * Some chips may have other causes of machine check (e.g. SB1
         * graduation timer)
         */
        panic("Caught Machine Check exception - %scaused by multiple "
              "matching entries in the TLB.",
-             (regs->cp0_status & ST0_TS) ? "" : "not ");
+             (multi_match) ? "" : "not ");
 }
 
 asmlinkage void do_mt(struct pt_regs *regs)
@@ -902,6 +917,7 @@ static inline void parity_protection_init(void)
 {
        switch (current_cpu_data.cputype) {
        case CPU_24K:
+       case CPU_34K:
        case CPU_5KC:
                write_c0_ecc(0x80000000);
                back_to_back_c0_hazard();
index 14fa00e3cdfa6007332e58fbd84fc9eba3c4d1ac..b84d1f9ce28ef169e0fbb633ba184c5341e03e40 100644 (file)
@@ -151,23 +151,13 @@ SECTIONS
 
   /* This is the MIPS specific mdebug section.  */
   .mdebug : { *(.mdebug) }
-  /* These are needed for ELF backends which have not yet been
-     converted to the new style linker.  */
-  .stab 0 : { *(.stab) }
-  .stabstr 0 : { *(.stabstr) }
-  /* DWARF debug sections.
-     Symbols in the .debug DWARF section are relative to the beginning of the
-     section so we begin .debug at 0.  It's not clear yet what needs to happen
-     for the others.   */
-  .debug          0 : { *(.debug) }
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  .line           0 : { *(.line) }
+
+  STABS_DEBUG
+
+  DWARF_DEBUG
+
   /* These must appear regardless of  .  */
   .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
   .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
-  .comment : { *(.comment) }
   .note : { *(.note) }
 }
index a1962eb460f827f5d9dfc24dd0739159333d9a54..39a71de16f47ed8ccfaadc575f2330a0a3dcbadb 100644 (file)
@@ -29,7 +29,9 @@
 
 ieee754dp ieee754dp_fint(int x)
 {
-       COMPXDP;
+       u64 xm;
+       int xe;
+       int xs;
 
        CLEARCX;
 
index eae90a866aa19e1bb60477f5ef98f828bf68a32c..f08f223e488a3a68a07038124dc045811b20bf98 100644 (file)
@@ -29,7 +29,9 @@
 
 ieee754dp ieee754dp_flong(s64 x)
 {
-       COMPXDP;
+       u64 xm;
+       int xe;
+       int xs;
 
        CLEARCX;
 
index 7aac13afb09a6b2b706507611501da910337949d..e88e125e01c2f394b2dcf4d97730207a11cc0d0d 100644 (file)
@@ -29,7 +29,9 @@
 
 ieee754sp ieee754sp_fint(int x)
 {
-       COMPXSP;
+       unsigned xm;
+       int xe;
+       int xs;
 
        CLEARCX;
 
index 3d6c1d11c17889bfea252f2c78d4711e0f3049e4..26d6919a269af143ad590d58233d5a8bd8b80310 100644 (file)
@@ -29,7 +29,9 @@
 
 ieee754sp ieee754sp_flong(s64 x)
 {
-       COMPXDP;                /* <--- need 64-bit mantissa temp */
+       u64 xm;         /* <--- need 64-bit mantissa temp */
+       int xe;
+       int xs;
 
        CLEARCX;
 
index 4182e1176faeaeb1181af9fe7d12094b42db1fc4..4a43924cd4fccd1f3415a79bc0562d20420632c8 100644 (file)
 #include <asm/war.h>
 #include <asm/cacheflush.h> /* for run_uncached() */
 
+
+/*
+ * Special Variant of smp_call_function for use by cache functions:
+ *
+ *  o No return value
+ *  o collapses to normal function call on UP kernels
+ *  o collapses to normal function call on systems with a single shared
+ *    primary cache.
+ */
+static inline void r4k_on_each_cpu(void (*func) (void *info), void *info,
+                                   int retry, int wait)
+{
+       preempt_disable();
+
+#if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC)
+       smp_call_function(func, info, retry, wait);
+#endif
+       func(info);
+       preempt_enable();
+}
+
 /*
  * Must die.
  */
@@ -299,7 +320,7 @@ static void r4k_flush_cache_all(void)
        if (!cpu_has_dc_aliases)
                return;
 
-       on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
+       r4k_on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
 }
 
 static inline void local_r4k___flush_cache_all(void * args)
@@ -314,13 +335,14 @@ static inline void local_r4k___flush_cache_all(void * args)
        case CPU_R4400MC:
        case CPU_R10000:
        case CPU_R12000:
+       case CPU_R14000:
                r4k_blast_scache();
        }
 }
 
 static void r4k___flush_cache_all(void)
 {
-       on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1);
+       r4k_on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1);
 }
 
 static inline void local_r4k_flush_cache_range(void * args)
@@ -341,7 +363,7 @@ static inline void local_r4k_flush_cache_range(void * args)
 static void r4k_flush_cache_range(struct vm_area_struct *vma,
        unsigned long start, unsigned long end)
 {
-       on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
+       r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
 }
 
 static inline void local_r4k_flush_cache_mm(void * args)
@@ -370,7 +392,7 @@ static void r4k_flush_cache_mm(struct mm_struct *mm)
        if (!cpu_has_dc_aliases)
                return;
 
-       on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
+       r4k_on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
 }
 
 struct flush_cache_page_args {
@@ -461,7 +483,7 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma,
        args.addr = addr;
        args.pfn = pfn;
 
-       on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
+       r4k_on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
 }
 
 static inline void local_r4k_flush_data_cache_page(void * addr)
@@ -471,7 +493,7 @@ static inline void local_r4k_flush_data_cache_page(void * addr)
 
 static void r4k_flush_data_cache_page(unsigned long addr)
 {
-       on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
+       r4k_on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
 }
 
 struct flush_icache_range_args {
@@ -514,7 +536,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
        args.start = start;
        args.end = end;
 
-       on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
+       r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
        instruction_hazard();
 }
 
@@ -590,7 +612,7 @@ static void r4k_flush_icache_page(struct vm_area_struct *vma,
        args.vma = vma;
        args.page = page;
 
-       on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
+       r4k_on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
 }
 
 
@@ -689,7 +711,7 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
 
 static void r4k_flush_cache_sigtramp(unsigned long addr)
 {
-       on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1);
+       r4k_on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1);
 }
 
 static void r4k_flush_icache_all(void)
@@ -812,6 +834,7 @@ static void __init probe_pcache(void)
 
        case CPU_R10000:
        case CPU_R12000:
+       case CPU_R14000:
                icache_size = 1 << (12 + ((config & R10K_CONF_IC) >> 29));
                c->icache.linesz = 64;
                c->icache.ways = 2;
@@ -965,9 +988,11 @@ static void __init probe_pcache(void)
                c->dcache.flags |= MIPS_CACHE_PINDEX;
        case CPU_R10000:
        case CPU_R12000:
+       case CPU_R14000:
        case CPU_SB1:
                break;
        case CPU_24K:
+       case CPU_34K:
                if (!(read_c0_config7() & (1 << 16)))
        default:
                        if (c->dcache.waysize > PAGE_SIZE)
@@ -1091,6 +1116,7 @@ static void __init setup_scache(void)
 
        case CPU_R10000:
        case CPU_R12000:
+       case CPU_R14000:
                scache_size = 0x80000 << ((config & R10K_CONF_SS) >> 16);
                c->scache.linesz = 64 << ((config >> 13) & 1);
                c->scache.ways = 2;
@@ -1135,6 +1161,31 @@ static void __init setup_scache(void)
        c->options |= MIPS_CPU_SUBSET_CACHES;
 }
 
+void au1x00_fixup_config_od(void)
+{
+       /*
+        * c0_config.od (bit 19) was write only (and read as 0)
+        * on the early revisions of Alchemy SOCs.  It disables the bus
+        * transaction overlapping and needs to be set to fix various errata.
+        */
+       switch (read_c0_prid()) {
+       case 0x00030100: /* Au1000 DA */
+       case 0x00030201: /* Au1000 HA */
+       case 0x00030202: /* Au1000 HB */
+       case 0x01030200: /* Au1500 AB */
+       /*
+        * Au1100 errata actually keeps silence about this bit, so we set it
+        * just in case for those revisions that require it to be set according
+        * to arch/mips/au1000/common/cputable.c
+        */
+       case 0x02030200: /* Au1100 AB */
+       case 0x02030201: /* Au1100 BA */
+       case 0x02030202: /* Au1100 BC */
+               set_c0_config(1 << 19);
+               break;
+       }
+}
+
 static inline void coherency_setup(void)
 {
        change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT);
@@ -1155,6 +1206,15 @@ static inline void coherency_setup(void)
        case CPU_R4400MC:
                clear_c0_config(CONF_CU);
                break;
+       /*
+        * We need to catch the ealry Alchemy SOCs with
+        * the write-only co_config.od bit and set it back to one...
+        */
+       case CPU_AU1000: /* rev. DA, HA, HB */
+       case CPU_AU1100: /* rev. AB, BA, BC ?? */
+       case CPU_AU1500: /* rev. AB */
+               au1x00_fixup_config_od();
+               break;
        }
 }
 
index c22308b93ff05ce04aee860042733a63dc2bf713..33f6e1cdfd5b409341488e4e2f15424f82451c3b 100644 (file)
@@ -227,7 +227,7 @@ void __init mem_init(void)
        for (tmp = 0; tmp < max_low_pfn; tmp++)
                if (page_is_ram(tmp)) {
                        ram++;
-                       if (PageReserved(mem_map+tmp))
+                       if (PageReserved(pfn_to_page(tmp)))
                                reservedpages++;
                }
 
index e4390dc3eb48e29d9b9a950d5a020d27af32676e..b7c749232ffef80bb50c131f2853965aa7e72396 100644 (file)
@@ -357,6 +357,7 @@ void __init build_clear_page(void)
 
                case CPU_R10000:
                case CPU_R12000:
+               case CPU_R14000:
                        pref_src_mode = Pref_LoadStreamed;
                        pref_dst_mode = Pref_StoreStreamed;
                        break;
index 053dbacac56bdf4d5a797b0d115ddb1951297aa0..54507be2ab5bb07f967f23e9c8305ab5f2ddf48a 100644 (file)
@@ -875,6 +875,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
 
        case CPU_R10000:
        case CPU_R12000:
+       case CPU_R14000:
        case CPU_4KC:
        case CPU_SB1:
        case CPU_SB1A:
@@ -906,6 +907,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
        case CPU_4KEC:
        case CPU_24K:
        case CPU_34K:
+       case CPU_74K:
                i_ehb(p);
                tlbw(p);
                break;
index 542eac82b63c2908065fcd51bda2625c4b2e1aed..d7dea0a136aabedd95a98f0646e756ffce77c8ab 100644 (file)
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-       /* set up buad rate */
+       /* set up baud rate */
        {
                uint32 divisor;
 
index 8720bccfdea250dd9eddbe580c22b8f4e75fa60e..f0a6a38fcf4d9fae50fc20da3b7c1505ebc451ef 100644 (file)
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-       /* set up buad rate */
+       /* set up baud rate */
        {
                uint32 divisor;
 
index 8720bccfdea250dd9eddbe580c22b8f4e75fa60e..f0a6a38fcf4d9fae50fc20da3b7c1505ebc451ef 100644 (file)
@@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
        /* disable interrupts */
        UART16550_WRITE(OFS_INTR_ENABLE, 0);
 
-       /* set up buad rate */
+       /* set up baud rate */
        {
                uint32 divisor;
 
index f2b4862aaae505fbcb8e902214633b6078d64fe4..c31e4cff64e043437a9019bfeae3890c2ee043eb 100644 (file)
@@ -14,8 +14,8 @@
 
 #include "op_impl.h"
 
-extern struct op_mips_model op_model_mipsxx __attribute__((weak));
-extern struct op_mips_model op_model_rm9000 __attribute__((weak));
+extern struct op_mips_model op_model_mipsxx_ops __attribute__((weak));
+extern struct op_mips_model op_model_rm9000_ops __attribute__((weak));
 
 static struct op_mips_model *model;
 
@@ -80,13 +80,14 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
        case CPU_24K:
        case CPU_25KF:
        case CPU_34K:
+       case CPU_74K:
        case CPU_SB1:
        case CPU_SB1A:
-               lmodel = &op_model_mipsxx;
+               lmodel = &op_model_mipsxx_ops;
                break;
 
        case CPU_RM9000:
-               lmodel = &op_model_rm9000;
+               lmodel = &op_model_rm9000_ops;
                break;
        };
 
index 95d488ca075473be4d4e0a3e0d032a0c413eaf27..f26a00e13204dd62b6848120f14a6d46af00b39e 100644 (file)
@@ -23,7 +23,7 @@
 
 #define M_COUNTER_OVERFLOW             (1UL    << 31)
 
-struct op_mips_model op_model_mipsxx;
+struct op_mips_model op_model_mipsxx_ops;
 
 static struct mipsxx_register_config {
        unsigned int control[4];
@@ -34,7 +34,7 @@ static struct mipsxx_register_config {
 
 static void mipsxx_reg_setup(struct op_counter_config *ctr)
 {
-       unsigned int counters = op_model_mipsxx.num_counters;
+       unsigned int counters = op_model_mipsxx_ops.num_counters;
        int i;
 
        /* Compute the performance counter control word.  */
@@ -62,7 +62,7 @@ static void mipsxx_reg_setup(struct op_counter_config *ctr)
 
 static void mipsxx_cpu_setup (void *args)
 {
-       unsigned int counters = op_model_mipsxx.num_counters;
+       unsigned int counters = op_model_mipsxx_ops.num_counters;
 
        switch (counters) {
        case 4:
@@ -83,7 +83,7 @@ static void mipsxx_cpu_setup (void *args)
 /* Start all counters on current CPU */
 static void mipsxx_cpu_start(void *args)
 {
-       unsigned int counters = op_model_mipsxx.num_counters;
+       unsigned int counters = op_model_mipsxx_ops.num_counters;
 
        switch (counters) {
        case 4:
@@ -100,7 +100,7 @@ static void mipsxx_cpu_start(void *args)
 /* Stop all counters on current CPU */
 static void mipsxx_cpu_stop(void *args)
 {
-       unsigned int counters = op_model_mipsxx.num_counters;
+       unsigned int counters = op_model_mipsxx_ops.num_counters;
 
        switch (counters) {
        case 4:
@@ -116,7 +116,7 @@ static void mipsxx_cpu_stop(void *args)
 
 static int mipsxx_perfcount_handler(struct pt_regs *regs)
 {
-       unsigned int counters = op_model_mipsxx.num_counters;
+       unsigned int counters = op_model_mipsxx_ops.num_counters;
        unsigned int control;
        unsigned int counter;
        int handled = 0;
@@ -187,33 +187,37 @@ static int __init mipsxx_init(void)
 
        reset_counters(counters);
 
-       op_model_mipsxx.num_counters = counters;
+       op_model_mipsxx_ops.num_counters = counters;
        switch (current_cpu_data.cputype) {
        case CPU_20KC:
-               op_model_mipsxx.cpu_type = "mips/20K";
+               op_model_mipsxx_ops.cpu_type = "mips/20K";
                break;
 
        case CPU_24K:
-               op_model_mipsxx.cpu_type = "mips/24K";
+               op_model_mipsxx_ops.cpu_type = "mips/24K";
                break;
 
        case CPU_25KF:
-               op_model_mipsxx.cpu_type = "mips/25K";
+               op_model_mipsxx_ops.cpu_type = "mips/25K";
                break;
 
 #ifndef CONFIG_SMP
        case CPU_34K:
-               op_model_mipsxx.cpu_type = "mips/34K";
+               op_model_mipsxx_ops.cpu_type = "mips/34K";
+               break;
+
+       case CPU_74K:
+               op_model_mipsxx_ops.cpu_type = "mips/74K";
                break;
 #endif
 
        case CPU_5KC:
-               op_model_mipsxx.cpu_type = "mips/5K";
+               op_model_mipsxx_ops.cpu_type = "mips/5K";
                break;
 
        case CPU_SB1:
        case CPU_SB1A:
-               op_model_mipsxx.cpu_type = "mips/sb1";
+               op_model_mipsxx_ops.cpu_type = "mips/sb1";
                break;
 
        default:
@@ -229,12 +233,12 @@ static int __init mipsxx_init(void)
 
 static void mipsxx_exit(void)
 {
-       reset_counters(op_model_mipsxx.num_counters);
+       reset_counters(op_model_mipsxx_ops.num_counters);
 
        perf_irq = null_perf_irq;
 }
 
-struct op_mips_model op_model_mipsxx = {
+struct op_mips_model op_model_mipsxx_ops = {
        .reg_setup      = mipsxx_reg_setup,
        .cpu_setup      = mipsxx_cpu_setup,
        .init           = mipsxx_init,
index 9b75e41c78ef891a02021db2cf40d5c004c7e391..b7063fefa65b46d80c658697fbe629f9e95bd4f4 100644 (file)
@@ -126,7 +126,7 @@ static void rm9000_exit(void)
        free_irq(rm9000_perfcount_irq, NULL);
 }
 
-struct op_mips_model op_model_rm9000 = {
+struct op_mips_model op_model_rm9000_ops = {
        .reg_setup      = rm9000_reg_setup,
        .cpu_setup      = rm9000_cpu_setup,
        .init           = rm9000_init,
index de01c9815bddf719f6b40dd85bf0d67dee95913b..8ba08047d164222b31bf6315b66fb51603d3a93a 100644 (file)
 /* issue a PIO read to make sure no PIO writes are pending */
 static void inline flush_crime_bus(void)
 {
-       volatile unsigned long junk = crime->control;
+       crime->control;
 }
 
 static void inline flush_mace_bus(void)
 {
-       volatile unsigned long junk = mace->perif.ctrl.misc;
+       mace->perif.ctrl.misc;
 }
 
 #undef DEBUG_IRQ
index 2d80653aa2af54e866eee220d8193dde6d663c49..f70bd090dacda51fb52b716fb7c8e92e8c27fc1a 100644 (file)
@@ -822,6 +822,7 @@ static void __init prom_send_capabilities(void)
                /* try calling the ibm,client-architecture-support method */
                if (call_prom_ret("call-method", 3, 2, &ret,
                                  ADDR("ibm,client-architecture-support"),
+                                 root,
                                  ADDR(ibm_architecture_vec)) == 0) {
                        /* the call exists... */
                        if (ret)
@@ -1622,6 +1623,15 @@ static int __init prom_find_machine_type(void)
                        if (strstr(p, RELOC("Power Macintosh")) ||
                            strstr(p, RELOC("MacRISC")))
                                return PLATFORM_POWERMAC;
+#ifdef CONFIG_PPC64
+                       /* We must make sure we don't detect the IBM Cell
+                        * blades as pSeries due to some firmware issues,
+                        * so we do it here.
+                        */
+                       if (strstr(p, RELOC("IBM,CBEA")) ||
+                           strstr(p, RELOC("IBM,CPBW-1.0")))
+                               return PLATFORM_GENERIC;
+#endif /* CONFIG_PPC64 */
                        i += sl + 1;
                }
        }
@@ -2057,10 +2067,45 @@ static void __init flatten_device_tree(void)
 
 }
 
-
-static void __init fixup_device_tree(void)
+#ifdef CONFIG_PPC_MAPLE
+/* PIBS Version 1.05.0000 04/26/2005 has an incorrect /ht/isa/ranges property.
+ * The values are bad, and it doesn't even have the right number of cells. */
+static void __init fixup_device_tree_maple(void)
 {
+       phandle isa;
+       u32 isa_ranges[6];
+
+       isa = call_prom("finddevice", 1, 1, ADDR("/ht@0/isa@4"));
+       if (!PHANDLE_VALID(isa))
+               return;
+
+       if (prom_getprop(isa, "ranges", isa_ranges, sizeof(isa_ranges))
+               == PROM_ERROR)
+               return;
+
+       if (isa_ranges[0] != 0x1 ||
+               isa_ranges[1] != 0xf4000000 ||
+               isa_ranges[2] != 0x00010000)
+               return;
+
+       prom_printf("fixing up bogus ISA range on Maple...\n");
+
+       isa_ranges[0] = 0x1;
+       isa_ranges[1] = 0x0;
+       isa_ranges[2] = 0x01002000; /* IO space; PCI device = 4 */
+       isa_ranges[3] = 0x0;
+       isa_ranges[4] = 0x0;
+       isa_ranges[5] = 0x00010000;
+       prom_setprop(isa, "/ht@0/isa@4", "ranges",
+                       isa_ranges, sizeof(isa_ranges));
+}
+#else
+#define fixup_device_tree_maple()
+#endif
+
 #if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC)
+static void __init fixup_device_tree_pmac(void)
+{
        phandle u3, i2c, mpic;
        u32 u3_rev;
        u32 interrupts[2];
@@ -2097,9 +2142,16 @@ static void __init fixup_device_tree(void)
        parent = (u32)mpic;
        prom_setprop(i2c, "/u3@0,f8000000/i2c@f8001000", "interrupt-parent",
                     &parent, sizeof(parent));
-#endif
 }
+#else
+#define fixup_device_tree_pmac()
+#endif
 
+static void __init fixup_device_tree(void)
+{
+       fixup_device_tree_maple();
+       fixup_device_tree_pmac();
+}
 
 static void __init prom_find_boot_cpu(void)
 {
index 01e3c08cb5503617318d05c38ee3f02862e83125..8fdeca2d4597c35295271ff9ea844a91ea856a4d 100644 (file)
@@ -803,10 +803,13 @@ static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int
                if (__get_user(cmcp, &ucp->uc_regs))
                        return -EFAULT;
                mcp = (struct mcontext __user *)(u64)cmcp;
+               /* no need to check access_ok(mcp), since mcp < 4GB */
        }
 #else
        if (__get_user(mcp, &ucp->uc_regs))
                return -EFAULT;
+       if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp)))
+               return -EFAULT;
 #endif
        restore_sigmask(&set);
        if (restore_user_regs(regs, mcp, sig))
@@ -908,13 +911,14 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
 {
        struct sig_dbg_op op;
        int i;
+       unsigned char tmp;
        unsigned long new_msr = regs->msr;
 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
        unsigned long new_dbcr0 = current->thread.dbcr0;
 #endif
 
        for (i=0; i<ndbg; i++) {
-               if (__copy_from_user(&op, dbg, sizeof(op)))
+               if (copy_from_user(&op, dbg + i, sizeof(op)))
                        return -EFAULT;
                switch (op.dbg_type) {
                case SIG_DBG_SINGLE_STEPPING:
@@ -959,6 +963,11 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
        current->thread.dbcr0 = new_dbcr0;
 #endif
 
+       if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx))
+           || __get_user(tmp, (u8 __user *) ctx)
+           || __get_user(tmp, (u8 __user *) (ctx + 1) - 1))
+               return -EFAULT;
+
        /*
         * If we get a fault copying the context into the kernel's
         * image of the user's registers, we can't just return -EFAULT
index 27f65b95184d39eadfae53a877afd3e1ba6caafe..c2db642f4cdd44c32695432b9622406204fdd866 100644 (file)
@@ -182,6 +182,8 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
        err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
        if (err)
                return err;
+       if (v_regs && !access_ok(VERIFY_READ, v_regs, 34 * sizeof(vector128)))
+               return -EFAULT;
        /* Copy 33 vec registers (vr0..31 and vscr) from the stack */
        if (v_regs != 0 && (msr & MSR_VEC) != 0)
                err |= __copy_from_user(current->thread.vr, v_regs,
index cf56a1d499ff740b5ee56efa4f22844e679a7359..26ed1f5ef16e12e8cde5e955b3ced3592f34bc54 100644 (file)
@@ -338,6 +338,8 @@ SYSCALL(symlinkat)
 SYSCALL(readlinkat)
 SYSCALL(fchmodat)
 SYSCALL(faccessat)
+COMPAT_SYS(get_robust_list)
+COMPAT_SYS(set_robust_list)
 
 /*
  * please add new calls to arch/powerpc/platforms/cell/spu_callbacks.c
index 6574b22b3cf3d4eb5feb828583ec721aa4685b6f..fd3e5609e3e004492fdbded682e899f4da21eec8 100644 (file)
@@ -125,14 +125,13 @@ static void __init cell_init_early(void)
 
 static int __init cell_probe(void)
 {
-       /* XXX This is temporary, the Cell maintainer will come up with
-        * more appropriate detection logic
-        */
        unsigned long root = of_get_flat_dt_root();
-       if (!of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
-               return 0;
 
-       return 1;
+       if (of_flat_dt_is_compatible(root, "IBM,CBEA") ||
+           of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
+               return 1;
+
+       return 0;
 }
 
 /*
index 95b36430aa0fa4b495ee08342bee9b9756065c2d..b47fcc5ddb7867636acc0acbed6613ae266215b0 100644 (file)
@@ -258,6 +258,7 @@ void *spu_syscall_table[] = {
        [__NR_futex]                    sys_futex,
        [__NR_sched_setaffinity]        sys_sched_setaffinity,
        [__NR_sched_getaffinity]        sys_sched_getaffinity,
+       [224]                           sys_ni_syscall,
        [__NR_tuxcall]                  sys_ni_syscall,
        [226]                           sys_ni_syscall,
        [__NR_io_setup]                 sys_io_setup,
@@ -332,19 +333,21 @@ void *spu_syscall_table[] = {
        [__NR_readlinkat]               sys_readlinkat,
        [__NR_fchmodat]                 sys_fchmodat,
        [__NR_faccessat]                sys_faccessat,
+       [__NR_get_robust_list]          sys_get_robust_list,
+       [__NR_set_robust_list]          sys_set_robust_list,
 };
 
 long spu_sys_callback(struct spu_syscall_block *s)
 {
        long (*syscall)(u64 a1, u64 a2, u64 a3, u64 a4, u64 a5, u64 a6);
 
-       syscall = spu_syscall_table[s->nr_ret];
-
        if (s->nr_ret >= ARRAY_SIZE(spu_syscall_table)) {
                pr_debug("%s: invalid syscall #%ld", __FUNCTION__, s->nr_ret);
                return -ENOSYS;
        }
 
+       syscall = spu_syscall_table[s->nr_ret];
+
 #ifdef DEBUG
        print_symbol(KERN_DEBUG "SPU-syscall %s:", (unsigned long)syscall);
        printk("syscall%ld(%lx, %lx, %lx, %lx, %lx, %lx)\n",
index df2343e1956bc266cc634ac88a217dd51f86d9ce..c896ce83d412917da2820292c32c9b6e4c32dcd1 100644 (file)
@@ -1157,6 +1157,7 @@ EXPORT_SYMBOL_GPL(pmac_i2c_xfer);
 /* some quirks for platform function decoding */
 enum {
        pmac_i2c_quirk_invmask = 0x00000001u,
+       pmac_i2c_quirk_skip = 0x00000002u,
 };
 
 static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
@@ -1172,6 +1173,15 @@ static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
                /* XXX Study device-tree's & apple drivers are get the quirks
                 * right !
                 */
+               /* Workaround: It seems that running the clockspreading
+                * properties on the eMac will cause lockups during boot.
+                * The machine seems to work fine without that. So for now,
+                * let's make sure i2c-hwclock doesn't match about "imic"
+                * clocks and we'll figure out if we really need to do
+                * something special about those later.
+                */
+               { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip },
+               { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip },
                { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask },
                { "i2c-cpu-voltage", NULL, 0},
                {  "temp-monitor", NULL, 0 },
@@ -1198,6 +1208,8 @@ static void pmac_i2c_devscan(void (*callback)(struct device_node *dev,
                                if (p->compatible &&
                                    !device_is_compatible(np, p->compatible))
                                        continue;
+                               if (p->quirks & pmac_i2c_quirk_skip)
+                                       break;
                                callback(np, p->quirks);
                                break;
                        }
index 4baa75b1d36ff60a7cb9088a7e6ffa5d10301e0f..f08173b0f06593dd9da152025e728386934a5a30 100644 (file)
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 #include <linux/spinlock.h>
 #include <linux/module.h>
+#include <linux/mutex.h>
 
 #include <asm/semaphore.h>
 #include <asm/prom.h>
@@ -546,6 +547,7 @@ struct pmf_device {
 
 static LIST_HEAD(pmf_devices);
 static spinlock_t pmf_lock = SPIN_LOCK_UNLOCKED;
+static DEFINE_MUTEX(pmf_irq_mutex);
 
 static void pmf_release_device(struct kref *kref)
 {
@@ -864,15 +866,17 @@ int pmf_register_irq_client(struct device_node *target,
 
        spin_lock_irqsave(&pmf_lock, flags);
        func = __pmf_find_function(target, name, PMF_FLAGS_INT_GEN);
-       if (func == NULL) {
-               spin_unlock_irqrestore(&pmf_lock, flags);
+       if (func)
+               func = pmf_get_function(func);
+       spin_unlock_irqrestore(&pmf_lock, flags);
+       if (func == NULL)
                return -ENODEV;
-       }
+       mutex_lock(&pmf_irq_mutex);
        if (list_empty(&func->irq_clients))
                func->dev->handlers->irq_enable(func);
        list_add(&client->link, &func->irq_clients);
        client->func = func;
-       spin_unlock_irqrestore(&pmf_lock, flags);
+       mutex_unlock(&pmf_irq_mutex);
 
        return 0;
 }
@@ -881,16 +885,16 @@ EXPORT_SYMBOL_GPL(pmf_register_irq_client);
 void pmf_unregister_irq_client(struct pmf_irq_client *client)
 {
        struct pmf_function *func = client->func;
-       unsigned long flags;
 
        BUG_ON(func == NULL);
 
-       spin_lock_irqsave(&pmf_lock, flags);
+       mutex_lock(&pmf_irq_mutex);
        client->func = NULL;
        list_del(&client->link);
        if (list_empty(&func->irq_clients))
                func->dev->handlers->irq_disable(func);
-       spin_unlock_irqrestore(&pmf_lock, flags);
+       mutex_unlock(&pmf_irq_mutex);
+       pmf_put_function(func);
 }
 EXPORT_SYMBOL_GPL(pmf_unregister_irq_client);
 
index 4d15e396655c1a095ab8c4a5df6600e054ab4c99..b9200fb078157f3498e16f4be98e92a5b8d8194d 100644 (file)
@@ -463,11 +463,23 @@ static int pmac_pm_finish(suspend_state_t state)
        return 0;
 }
 
+static int pmac_pm_valid(suspend_state_t state)
+{
+       switch (state) {
+       case PM_SUSPEND_DISK:
+               return 1;
+       /* can't do any other states via generic mechanism yet */
+       default:
+               return 0;
+       }
+}
+
 static struct pm_ops pmac_pm_ops = {
        .pm_disk_mode   = PM_DISK_SHUTDOWN,
        .prepare        = pmac_pm_prepare,
        .enter          = pmac_pm_enter,
        .finish         = pmac_pm_finish,
+       .valid          = pmac_pm_valid,
 };
 
 #endif /* CONFIG_SOFTWARE_SUSPEND */
index 5f79f01c44f2aff1d88c8edf2375d783195584d1..3ba87835757e2cfd5319d54e6992dd2d313488e7 100644 (file)
@@ -389,6 +389,7 @@ static int __init pSeries_probe_hypertas(unsigned long node,
 
 static int __init pSeries_probe(void)
 {
+       unsigned long root = of_get_flat_dt_root();
        char *dtype = of_get_flat_dt_prop(of_get_flat_dt_root(),
                                          "device_type", NULL);
        if (dtype == NULL)
@@ -396,6 +397,13 @@ static int __init pSeries_probe(void)
        if (strcmp(dtype, "chrp"))
                return 0;
 
+       /* Cell blades firmware claims to be chrp while it's not. Until this
+        * is fixed, we need to avoid those here.
+        */
+       if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") ||
+           of_flat_dt_is_compatible(root, "IBM,CBEA"))
+               return 0;
+
        DBG("pSeries detected, looking for LPAR capability...\n");
 
        /* Now try to figure out if we are running on LPAR */
index cc7c4aea939751a42985f5bc944614290993ffad..2f5c5e1576175ffb5bc4e3a7e9868dda7bc1caf7 100644 (file)
@@ -134,7 +134,7 @@ main(void)
        DEFINE(TI_TASK, offsetof(struct thread_info, task));
        DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain));
        DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
-       DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, flags));
+       DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
        DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
        DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
 
index e62b75707f7a3f0551575f936d6258b6c97eb0d8..abb7154de2c7fcba30125b5b1971da761a2a59df 100644 (file)
@@ -279,11 +279,11 @@ static int mpc8272ads_platform_notify(struct device *dev)
        static const struct platform_notify_dev_map dev_map[] = {
                {
                        .bus_id = "fsl-cpm-fcc",
-                       .rtn = mpc8272ads_fixup_enet_pdata
+                       .rtn = mpc8272ads_fixup_enet_pdata,
                },
                {
                        .bus_id = "fsl-cpm-scc:uart",
-                       .rtn = mpc
+                       .rtn = mpc8272ads_fixup_uart_pdata,
                },
                {
                        .bus_id = NULL
@@ -335,15 +335,15 @@ struct platform_device* early_uart_get_pdev(int index)
        struct platform_device* pdev = NULL;
        if(index) { /*assume SCC4 here*/
                pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
-               pinfo = &mpc8272<F12>_uart_pdata[1];
+               pinfo = &mpc8272_uart_pdata[fsid_scc4_uart];
        } else { /*over SCC1*/
                pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
-               pinfo = &mpc8272_uart_pdata[0];
+               pinfo = &mpc8272_uart_pdata[fsid_scc1_uart];
        }
 
        pinfo->uart_clk = bd->bi_intfreq;
        pdev->dev.platform_data = pinfo;
-       ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
+       ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
        return NULL;
 }
 
index 0636aed7b8271b2f9357c27a6cb9da1a9a63c31b..8692d00c08c42d7e3c33e59b57abbd7f75a6c5fb 100644 (file)
@@ -121,13 +121,13 @@ struct platform_device ppc_sys_platform_devices[] = {
                .num_resources   = 3,
                .resource = (struct resource[]) {
                        {
-                               .name   = "scc_mem",
+                               .name   = "regs",
                                .start  = 0x11A00,
                                .end    = 0x11A1F,
                                .flags  = IORESOURCE_MEM,
                        },
                        {
-                               .name   = "scc_pram",
+