]> nv-tegra.nvidia Code Review - linux-2.6.git/commitdiff
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
authorLinus Torvalds <torvalds@linux-foundation.org>
Wed, 23 Jul 2008 19:03:18 +0000 (12:03 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Wed, 23 Jul 2008 19:03:18 +0000 (12:03 -0700)
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (24 commits)
  I/OAT: I/OAT version 3.0 support
  I/OAT: tcp_dma_copybreak default value dependent on I/OAT version
  I/OAT: Add watchdog/reset functionality to ioatdma
  iop_adma: cleanup iop_chan_xor_slot_count
  iop_adma: document how to calculate the minimum descriptor pool size
  iop_adma: directly reclaim descriptors on allocation failure
  async_tx: make async_tx_test_ack a boolean routine
  async_tx: remove depend_tx from async_tx_sync_epilog
  async_tx: export async_tx_quiesce
  async_tx: fix handling of the "out of descriptor" condition in async_xor
  async_tx: ensure the xor destination buffer remains dma-mapped
  async_tx: list_for_each_entry_rcu() cleanup
  dmaengine: Driver for the Synopsys DesignWare DMA controller
  dmaengine: Add slave DMA interface
  dmaengine: add DMA_COMPL_SKIP_{SRC,DEST}_UNMAP flags to control dma unmap
  dmaengine: Add dma_client parameter to device_alloc_chan_resources
  dmatest: Simple DMA memcpy test client
  dmaengine: DMA engine driver for Marvell XOR engine
  iop-adma: fix platform driver hotplug/coldplug
  dmaengine: track the number of clients using a channel
  ...

Fixed up conflict in drivers/dca/dca-sysfs.c manually

1  2 
arch/avr32/mach-at32ap/at32ap700x.c
crypto/async_tx/async_tx.c
drivers/dca/dca-sysfs.c
include/linux/pci_ids.h
net/core/user_dma.c

index 021d5121718469387fc1c4d95dd797a12f40bb3b,892e27e0d583ee15e28410d5124b6b0cd0d65019..604f44f5dd164833a9bfdb075a7d65a713617fff
@@@ -7,6 -7,7 +7,7 @@@
   */
  #include <linux/clk.h>
  #include <linux/delay.h>
+ #include <linux/dw_dmac.h>
  #include <linux/fb.h>
  #include <linux/init.h>
  #include <linux/platform_device.h>
  #include <linux/spi/spi.h>
  #include <linux/usb/atmel_usba_udc.h>
  
 +#include <asm/atmel-mci.h>
  #include <asm/io.h>
  #include <asm/irq.h>
  
  #include <asm/arch/at32ap700x.h>
  #include <asm/arch/board.h>
  #include <asm/arch/portmux.h>
 +#include <asm/arch/sram.h>
  
  #include <video/atmel_lcdc.h>
  
@@@ -95,12 -94,19 +96,12 @@@ static struct clk devname##_##_name = 
  
  static DEFINE_SPINLOCK(pm_lock);
  
 -unsigned long at32ap7000_osc_rates[3] = {
 -      [0] = 32768,
 -      /* FIXME: these are ATSTK1002-specific */
 -      [1] = 20000000,
 -      [2] = 12000000,
 -};
 -
  static struct clk osc0;
  static struct clk osc1;
  
  static unsigned long osc_get_rate(struct clk *clk)
  {
 -      return at32ap7000_osc_rates[clk->index];
 +      return at32_board_osc_rates[clk->index];
  }
  
  static unsigned long pll_get_rate(struct clk *clk, unsigned long control)
@@@ -594,6 -600,17 +595,17 @@@ static void __init genclk_init_parent(s
        clk->parent = parent;
  }
  
+ static struct dw_dma_platform_data dw_dmac0_data = {
+       .nr_channels    = 3,
+ };
+ static struct resource dw_dmac0_resource[] = {
+       PBMEM(0xff200000),
+       IRQ(2),
+ };
+ DEFINE_DEV_DATA(dw_dmac, 0);
+ DEV_CLK(hclk, dw_dmac0, hsb, 10);
  /* --------------------------------------------------------------------
   *  System peripherals
   * -------------------------------------------------------------------- */
@@@ -677,14 -694,6 +689,14 @@@ static struct clk hramc_clk = 
        .users          = 1,
        .index          = 3,
  };
 +static struct clk sdramc_clk = {
 +      .name           = "sdramc_clk",
 +      .parent         = &pbb_clk,
 +      .mode           = pbb_clk_mode,
 +      .get_rate       = pbb_clk_get_rate,
 +      .users          = 1,
 +      .index          = 14,
 +};
  
  static struct resource smc0_resource[] = {
        PBMEM(0xfff03400),
@@@ -708,17 -717,6 +720,6 @@@ static struct clk pico_clk = 
        .users          = 1,
  };
  
- static struct resource dmaca0_resource[] = {
-       {
-               .start  = 0xff200000,
-               .end    = 0xff20ffff,
-               .flags  = IORESOURCE_MEM,
-       },
-       IRQ(2),
- };
- DEFINE_DEV(dmaca, 0);
- DEV_CLK(hclk, dmaca0, hsb, 10);
  /* --------------------------------------------------------------------
   * HMATRIX
   * -------------------------------------------------------------------- */
@@@ -831,7 -829,7 +832,7 @@@ void __init at32_add_system_devices(voi
        platform_device_register(&at32_eic0_device);
        platform_device_register(&smc0_device);
        platform_device_register(&pdc_device);
-       platform_device_register(&dmaca0_device);
+       platform_device_register(&dw_dmac0_device);
  
        platform_device_register(&at32_tcb0_device);
        platform_device_register(&at32_tcb1_device);
        platform_device_register(&pio4_device);
  }
  
 +/* --------------------------------------------------------------------
 + *  PSIF
 + * -------------------------------------------------------------------- */
 +static struct resource atmel_psif0_resource[] __initdata = {
 +      {
 +              .start  = 0xffe03c00,
 +              .end    = 0xffe03cff,
 +              .flags  = IORESOURCE_MEM,
 +      },
 +      IRQ(18),
 +};
 +static struct clk atmel_psif0_pclk = {
 +      .name           = "pclk",
 +      .parent         = &pba_clk,
 +      .mode           = pba_clk_mode,
 +      .get_rate       = pba_clk_get_rate,
 +      .index          = 15,
 +};
 +
 +static struct resource atmel_psif1_resource[] __initdata = {
 +      {
 +              .start  = 0xffe03d00,
 +              .end    = 0xffe03dff,
 +              .flags  = IORESOURCE_MEM,
 +      },
 +      IRQ(18),
 +};
 +static struct clk atmel_psif1_pclk = {
 +      .name           = "pclk",
 +      .parent         = &pba_clk,
 +      .mode           = pba_clk_mode,
 +      .get_rate       = pba_clk_get_rate,
 +      .index          = 15,
 +};
 +
 +struct platform_device *__init at32_add_device_psif(unsigned int id)
 +{
 +      struct platform_device *pdev;
 +
 +      if (!(id == 0 || id == 1))
 +              return NULL;
 +
 +      pdev = platform_device_alloc("atmel_psif", id);
 +      if (!pdev)
 +              return NULL;
 +
 +      switch (id) {
 +      case 0:
 +              if (platform_device_add_resources(pdev, atmel_psif0_resource,
 +                                      ARRAY_SIZE(atmel_psif0_resource)))
 +                      goto err_add_resources;
 +              atmel_psif0_pclk.dev = &pdev->dev;
 +              select_peripheral(PA(8), PERIPH_A, 0); /* CLOCK */
 +              select_peripheral(PA(9), PERIPH_A, 0); /* DATA  */
 +              break;
 +      case 1:
 +              if (platform_device_add_resources(pdev, atmel_psif1_resource,
 +                                      ARRAY_SIZE(atmel_psif1_resource)))
 +                      goto err_add_resources;
 +              atmel_psif1_pclk.dev = &pdev->dev;
 +              select_peripheral(PB(11), PERIPH_A, 0); /* CLOCK */
 +              select_peripheral(PB(12), PERIPH_A, 0); /* DATA  */
 +              break;
 +      default:
 +              return NULL;
 +      }
 +
 +      platform_device_add(pdev);
 +      return pdev;
 +
 +err_add_resources:
 +      platform_device_put(pdev);
 +      return NULL;
 +}
 +
  /* --------------------------------------------------------------------
   *  USART
   * -------------------------------------------------------------------- */
@@@ -1191,8 -1114,7 +1192,8 @@@ at32_add_device_spi(unsigned int id, st
        switch (id) {
        case 0:
                pdev = &atmel_spi0_device;
 -              select_peripheral(PA(0),  PERIPH_A, 0); /* MISO  */
 +              /* pullup MISO so a level is always defined */
 +              select_peripheral(PA(0),  PERIPH_A, AT32_GPIOF_PULLUP);
                select_peripheral(PA(1),  PERIPH_A, 0); /* MOSI  */
                select_peripheral(PA(2),  PERIPH_A, 0); /* SCK   */
                at32_spi_setup_slaves(0, b, n, spi0_pins);
  
        case 1:
                pdev = &atmel_spi1_device;
 -              select_peripheral(PB(0),  PERIPH_B, 0); /* MISO  */
 +              /* pullup MISO so a level is always defined */
 +              select_peripheral(PB(0),  PERIPH_B, AT32_GPIOF_PULLUP);
                select_peripheral(PB(1),  PERIPH_B, 0); /* MOSI  */
                select_peripheral(PB(5),  PERIPH_B, 0); /* SCK   */
                at32_spi_setup_slaves(1, b, n, spi1_pins);
@@@ -1279,32 -1200,20 +1280,32 @@@ static struct clk atmel_mci0_pclk = 
        .index          = 9,
  };
  
 -struct platform_device *__init at32_add_device_mci(unsigned int id)
 +struct platform_device *__init
 +at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
  {
 -      struct platform_device *pdev;
 +      struct mci_platform_data        _data;
 +      struct platform_device          *pdev;
 +      struct dw_dma_slave             *dws;
  
        if (id != 0)
                return NULL;
  
        pdev = platform_device_alloc("atmel_mci", id);
        if (!pdev)
 -              return NULL;
 +              goto fail;
  
        if (platform_device_add_resources(pdev, atmel_mci0_resource,
                                ARRAY_SIZE(atmel_mci0_resource)))
 -              goto err_add_resources;
 +              goto fail;
 +
 +      if (!data) {
 +              data = &_data;
 +              memset(data, 0, sizeof(struct mci_platform_data));
 +      }
 +
 +      if (platform_device_add_data(pdev, data,
 +                              sizeof(struct mci_platform_data)))
 +              goto fail;
  
        select_peripheral(PA(10), PERIPH_A, 0); /* CLK   */
        select_peripheral(PA(11), PERIPH_A, 0); /* CMD   */
        select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
        select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
  
 +      if (data) {
 +              if (data->detect_pin != GPIO_PIN_NONE)
 +                      at32_select_gpio(data->detect_pin, 0);
 +              if (data->wp_pin != GPIO_PIN_NONE)
 +                      at32_select_gpio(data->wp_pin, 0);
 +      }
 +
        atmel_mci0_pclk.dev = &pdev->dev;
  
        platform_device_add(pdev);
        return pdev;
  
 -err_add_resources:
 +fail:
        platform_device_put(pdev);
        return NULL;
  }
@@@ -1363,8 -1265,7 +1364,8 @@@ static struct clk atmel_lcdfb0_pixclk 
  
  struct platform_device *__init
  at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
 -                   unsigned long fbmem_start, unsigned long fbmem_len)
 +                   unsigned long fbmem_start, unsigned long fbmem_len,
 +                   unsigned int pin_config)
  {
        struct platform_device *pdev;
        struct atmel_lcdfb_info *info;
        switch (id) {
        case 0:
                pdev = &atmel_lcdfb0_device;
 -              select_peripheral(PC(19), PERIPH_A, 0); /* CC     */
 -              select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC  */
 -              select_peripheral(PC(21), PERIPH_A, 0); /* PCLK   */
 -              select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC  */
 -              select_peripheral(PC(23), PERIPH_A, 0); /* DVAL   */
 -              select_peripheral(PC(24), PERIPH_A, 0); /* MODE   */
 -              select_peripheral(PC(25), PERIPH_A, 0); /* PWR    */
 -              select_peripheral(PC(26), PERIPH_A, 0); /* DATA0  */
 -              select_peripheral(PC(27), PERIPH_A, 0); /* DATA1  */
 -              select_peripheral(PC(28), PERIPH_A, 0); /* DATA2  */
 -              select_peripheral(PC(29), PERIPH_A, 0); /* DATA3  */
 -              select_peripheral(PC(30), PERIPH_A, 0); /* DATA4  */
 -              select_peripheral(PC(31), PERIPH_A, 0); /* DATA5  */
 -              select_peripheral(PD(0),  PERIPH_A, 0); /* DATA6  */
 -              select_peripheral(PD(1),  PERIPH_A, 0); /* DATA7  */
 -              select_peripheral(PD(2),  PERIPH_A, 0); /* DATA8  */
 -              select_peripheral(PD(3),  PERIPH_A, 0); /* DATA9  */
 -              select_peripheral(PD(4),  PERIPH_A, 0); /* DATA10 */
 -              select_peripheral(PD(5),  PERIPH_A, 0); /* DATA11 */
 -              select_peripheral(PD(6),  PERIPH_A, 0); /* DATA12 */
 -              select_peripheral(PD(7),  PERIPH_A, 0); /* DATA13 */
 -              select_peripheral(PD(8),  PERIPH_A, 0); /* DATA14 */
 -              select_peripheral(PD(9),  PERIPH_A, 0); /* DATA15 */
 -              select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
 -              select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
 -              select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
 -              select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
 -              select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
 -              select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
 -              select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
 -              select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
 +
 +              switch (pin_config) {
 +              case 0:
 +                      select_peripheral(PC(19), PERIPH_A, 0); /* CC     */
 +                      select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC  */
 +                      select_peripheral(PC(21), PERIPH_A, 0); /* PCLK   */
 +                      select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC  */
 +                      select_peripheral(PC(23), PERIPH_A, 0); /* DVAL   */
 +                      select_peripheral(PC(24), PERIPH_A, 0); /* MODE   */
 +                      select_peripheral(PC(25), PERIPH_A, 0); /* PWR    */
 +                      select_peripheral(PC(26), PERIPH_A, 0); /* DATA0  */
 +                      select_peripheral(PC(27), PERIPH_A, 0); /* DATA1  */
 +                      select_peripheral(PC(28), PERIPH_A, 0); /* DATA2  */
 +                      select_peripheral(PC(29), PERIPH_A, 0); /* DATA3  */
 +                      select_peripheral(PC(30), PERIPH_A, 0); /* DATA4  */
 +                      select_peripheral(PC(31), PERIPH_A, 0); /* DATA5  */
 +                      select_peripheral(PD(0),  PERIPH_A, 0); /* DATA6  */
 +                      select_peripheral(PD(1),  PERIPH_A, 0); /* DATA7  */
 +                      select_peripheral(PD(2),  PERIPH_A, 0); /* DATA8  */
 +                      select_peripheral(PD(3),  PERIPH_A, 0); /* DATA9  */
 +                      select_peripheral(PD(4),  PERIPH_A, 0); /* DATA10 */
 +                      select_peripheral(PD(5),  PERIPH_A, 0); /* DATA11 */
 +                      select_peripheral(PD(6),  PERIPH_A, 0); /* DATA12 */
 +                      select_peripheral(PD(7),  PERIPH_A, 0); /* DATA13 */
 +                      select_peripheral(PD(8),  PERIPH_A, 0); /* DATA14 */
 +                      select_peripheral(PD(9),  PERIPH_A, 0); /* DATA15 */
 +                      select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
 +                      select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
 +                      select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
 +                      select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
 +                      select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
 +                      select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
 +                      select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
 +                      select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
 +                      break;
 +              case 1:
 +                      select_peripheral(PE(0),  PERIPH_B, 0); /* CC     */
 +                      select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC  */
 +                      select_peripheral(PC(21), PERIPH_A, 0); /* PCLK   */
 +                      select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC  */
 +                      select_peripheral(PE(1),  PERIPH_B, 0); /* DVAL   */
 +                      select_peripheral(PE(2),  PERIPH_B, 0); /* MODE   */
 +                      select_peripheral(PC(25), PERIPH_A, 0); /* PWR    */
 +                      select_peripheral(PE(3),  PERIPH_B, 0); /* DATA0  */
 +                      select_peripheral(PE(4),  PERIPH_B, 0); /* DATA1  */
 +                      select_peripheral(PE(5),  PERIPH_B, 0); /* DATA2  */
 +                      select_peripheral(PE(6),  PERIPH_B, 0); /* DATA3  */
 +                      select_peripheral(PE(7),  PERIPH_B, 0); /* DATA4  */
 +                      select_peripheral(PC(31), PERIPH_A, 0); /* DATA5  */
 +                      select_peripheral(PD(0),  PERIPH_A, 0); /* DATA6  */
 +                      select_peripheral(PD(1),  PERIPH_A, 0); /* DATA7  */
 +                      select_peripheral(PE(8),  PERIPH_B, 0); /* DATA8  */
 +                      select_peripheral(PE(9),  PERIPH_B, 0); /* DATA9  */
 +                      select_peripheral(PE(10), PERIPH_B, 0); /* DATA10 */
 +                      select_peripheral(PE(11), PERIPH_B, 0); /* DATA11 */
 +                      select_peripheral(PE(12), PERIPH_B, 0); /* DATA12 */
 +                      select_peripheral(PD(7),  PERIPH_A, 0); /* DATA13 */
 +                      select_peripheral(PD(8),  PERIPH_A, 0); /* DATA14 */
 +                      select_peripheral(PD(9),  PERIPH_A, 0); /* DATA15 */
 +                      select_peripheral(PE(13), PERIPH_B, 0); /* DATA16 */
 +                      select_peripheral(PE(14), PERIPH_B, 0); /* DATA17 */
 +                      select_peripheral(PE(15), PERIPH_B, 0); /* DATA18 */
 +                      select_peripheral(PE(16), PERIPH_B, 0); /* DATA19 */
 +                      select_peripheral(PE(17), PERIPH_B, 0); /* DATA20 */
 +                      select_peripheral(PE(18), PERIPH_B, 0); /* DATA21 */
 +                      select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
 +                      select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
 +                      break;
 +              default:
 +                      goto err_invalid_id;
 +              }
  
                clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
                clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
@@@ -1500,7 -1361,7 +1501,7 @@@ static struct resource atmel_pwm0_resou
        IRQ(24),
  };
  static struct clk atmel_pwm0_mck = {
 -      .name           = "mck",
 +      .name           = "pwm_clk",
        .parent         = &pbb_clk,
        .mode           = pbb_clk_mode,
        .get_rate       = pbb_clk_get_rate,
@@@ -2027,12 -1888,11 +2028,12 @@@ struct clk *at32_clock_list[] = 
        &hmatrix_clk,
        &ebi_clk,
        &hramc_clk,
 +      &sdramc_clk,
        &smc0_pclk,
        &smc0_mck,
        &pdc_hclk,
        &pdc_pclk,
-       &dmaca0_hclk,
+       &dw_dmac0_hclk,
        &pico_clk,
        &pio0_mck,
        &pio1_mck,
        &pio4_mck,
        &at32_tcb0_t0_clk,
        &at32_tcb1_t0_clk,
 +      &atmel_psif0_pclk,
 +      &atmel_psif1_pclk,
        &atmel_usart0_usart,
        &atmel_usart1_usart,
        &atmel_usart2_usart,
  };
  unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
  
 -void __init at32_portmux_init(void)
 -{
 -      at32_init_pio(&pio0_device);
 -      at32_init_pio(&pio1_device);
 -      at32_init_pio(&pio2_device);
 -      at32_init_pio(&pio3_device);
 -      at32_init_pio(&pio4_device);
 -}
 -
 -void __init at32_clock_init(void)
 +void __init setup_platform(void)
  {
        u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0;
        int i;
        pm_writel(HSB_MASK, hsb_mask);
        pm_writel(PBA_MASK, pba_mask);
        pm_writel(PBB_MASK, pbb_mask);
 +
 +      /* Initialize the port muxes */
 +      at32_init_pio(&pio0_device);
 +      at32_init_pio(&pio1_device);
 +      at32_init_pio(&pio2_device);
 +      at32_init_pio(&pio3_device);
 +      at32_init_pio(&pio4_device);
 +}
 +
 +struct gen_pool *sram_pool;
 +
 +static int __init sram_init(void)
 +{
 +      struct gen_pool *pool;
 +
 +      /* 1KiB granularity */
 +      pool = gen_pool_create(10, -1);
 +      if (!pool)
 +              goto fail;
 +
 +      if (gen_pool_add(pool, 0x24000000, 0x8000, -1))
 +              goto err_pool_add;
 +
 +      sram_pool = pool;
 +      return 0;
 +
 +err_pool_add:
 +      gen_pool_destroy(pool);
 +fail:
 +      pr_err("Failed to create SRAM pool\n");
 +      return -ENOMEM;
  }
 +core_initcall(sram_init);
index 095c798d31700746d8bd6769e3f5f8d015d7e264,35869a37a6f29a8cd2622de10ee388bd5d48d910..85eaf7b1c53153ef07bdc33efa3a9d9c6cdff839
@@@ -23,7 -23,6 +23,7 @@@
   * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
   *
   */
 +#include <linux/rculist.h>
  #include <linux/kernel.h>
  #include <linux/async_tx.h>
  
@@@ -295,7 -294,7 +295,7 @@@ dma_channel_add_remove(struct dma_clien
        case DMA_RESOURCE_REMOVED:
                found = 0;
                spin_lock_irqsave(&async_tx_lock, flags);
-               list_for_each_entry_rcu(ref, &async_tx_master_list, node)
+               list_for_each_entry(ref, &async_tx_master_list, node)
                        if (ref->chan == chan) {
                                /* permit backing devices to go away */
                                dma_chan_put(ref->chan);
@@@ -608,23 -607,34 +608,34 @@@ async_trigger_callback(enum async_tx_fl
                pr_debug("%s: (sync)\n", __func__);
  
                /* wait for any prerequisite operations */
-               if (depend_tx) {
-                       /* if ack is already set then we cannot be sure
-                        * we are referring to the correct operation
-                        */
-                       BUG_ON(async_tx_test_ack(depend_tx));
-                       if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
-                               panic("%s: DMA_ERROR waiting for depend_tx\n",
-                                       __func__);
-               }
+               async_tx_quiesce(&depend_tx);
  
-               async_tx_sync_epilog(flags, depend_tx, cb_fn, cb_param);
+               async_tx_sync_epilog(cb_fn, cb_param);
        }
  
        return tx;
  }
  EXPORT_SYMBOL_GPL(async_trigger_callback);
  
+ /**
+  * async_tx_quiesce - ensure tx is complete and freeable upon return
+  * @tx - transaction to quiesce
+  */
+ void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
+ {
+       if (*tx) {
+               /* if ack is already set then we cannot be sure
+                * we are referring to the correct operation
+                */
+               BUG_ON(async_tx_test_ack(*tx));
+               if (dma_wait_for_async_tx(*tx) == DMA_ERROR)
+                       panic("DMA_ERROR waiting for transaction\n");
+               async_tx_ack(*tx);
+               *tx = NULL;
+       }
+ }
+ EXPORT_SYMBOL_GPL(async_tx_quiesce);
  module_init(async_tx_init);
  module_exit(async_tx_exit);
  
diff --combined drivers/dca/dca-sysfs.c
index 9a70377bfb34e808e954afb266eb5218f8bb7982,3d47e9d8e34fcb84aaa2990e1f0eb667372ad492..7af4b403bd2d12a6f3219f8f8d6615f5de69def1
@@@ -13,10 -13,10 +13,11 @@@ static spinlock_t dca_idr_lock
  int dca_sysfs_add_req(struct dca_provider *dca, struct device *dev, int slot)
  {
        struct device *cd;
+       static int req_count;
  
 -      cd = device_create(dca_class, dca->cd, MKDEV(0, slot + 1),
 -                         "requester%d", req_count++);
 +      cd = device_create_drvdata(dca_class, dca->cd,
 +                                 MKDEV(0, slot + 1), NULL,
-                                  "requester%d", slot);
++                                 "requester%d", req_count++);
        if (IS_ERR(cd))
                return PTR_ERR(cd);
        return 0;
@@@ -47,8 -47,7 +48,8 @@@ idr_try_again
                return err;
        }
  
 -      cd = device_create(dca_class, dev, MKDEV(0, 0), "dca%d", dca->id);
 +      cd = device_create_drvdata(dca_class, dev, MKDEV(0, 0), NULL,
 +                                 "dca%d", dca->id);
        if (IS_ERR(cd)) {
                spin_lock(&dca_idr_lock);
                idr_remove(&dca_idr, dca->id);
diff --combined include/linux/pci_ids.h
index d8507eb394cf6f50e4c622b53d13e0c417b6467c,06a5b7ae79bebb8a85a15fc1b2f3097ef5893e24..119ae7b8f028cb9795fddb16a28abc7530294764
  #define PCI_DEVICE_ID_HP_CISSA                0x3220
  #define PCI_DEVICE_ID_HP_CISSC                0x3230
  #define PCI_DEVICE_ID_HP_CISSD                0x3238
 +#define PCI_DEVICE_ID_HP_CISSE                0x323a
  #define PCI_DEVICE_ID_HP_ZX2_IOC      0x4031
  
  #define PCI_VENDOR_ID_PCTECH          0x1042
  #define PCI_DEVICE_ID_MARVELL_GT64260 0x6430
  #define PCI_DEVICE_ID_MARVELL_MV64360 0x6460
  #define PCI_DEVICE_ID_MARVELL_MV64460 0x6480
 +#define PCI_DEVICE_ID_MARVELL_CAFE_SD 0x4101
  
  #define PCI_VENDOR_ID_V3              0x11b0
  #define PCI_DEVICE_ID_V3_V960         0x0001
  #define PCI_DEVICE_ID_NX2_5708                0x164c
  #define PCI_DEVICE_ID_TIGON3_5702FE   0x164d
  #define PCI_DEVICE_ID_NX2_57710               0x164e
 +#define PCI_DEVICE_ID_NX2_57711               0x164f
 +#define PCI_DEVICE_ID_NX2_57711E      0x1650
  #define PCI_DEVICE_ID_TIGON3_5705     0x1653
  #define PCI_DEVICE_ID_TIGON3_5705_2   0x1654
  #define PCI_DEVICE_ID_TIGON3_5720     0x1658
  #define PCI_DEVICE_ID_TIGON3_5787M    0x1693
  #define PCI_DEVICE_ID_TIGON3_5782     0x1696
  #define PCI_DEVICE_ID_TIGON3_5784     0x1698
 +#define PCI_DEVICE_ID_TIGON3_5785     0x1699
  #define PCI_DEVICE_ID_TIGON3_5786     0x169a
  #define PCI_DEVICE_ID_TIGON3_5787     0x169b
  #define PCI_DEVICE_ID_TIGON3_5788     0x169c
  #define PCI_DEVICE_ID_MPC8544         0x0033
  #define PCI_DEVICE_ID_MPC8572E                0x0040
  #define PCI_DEVICE_ID_MPC8572         0x0041
 +#define PCI_DEVICE_ID_MPC8536E                0x0050
 +#define PCI_DEVICE_ID_MPC8536         0x0051
  #define PCI_DEVICE_ID_MPC8641         0x7010
  #define PCI_DEVICE_ID_MPC8641D                0x7011
  #define PCI_DEVICE_ID_MPC8610         0x7018
  #define PCI_DEVICE_ID_JMICRON_JMB366  0x2366
  #define PCI_DEVICE_ID_JMICRON_JMB368  0x2368
  #define PCI_DEVICE_ID_JMICRON_JMB38X_SD       0x2381
 +#define PCI_DEVICE_ID_JMICRON_JMB38X_MMC 0x2382
  #define PCI_DEVICE_ID_JMICRON_JMB38X_MS       0x2383
  
  #define PCI_VENDOR_ID_KORENIX         0x1982
  #define PCI_DEVICE_ID_INTEL_ICH9_7    0x2916
  #define PCI_DEVICE_ID_INTEL_ICH9_8    0x2918
  #define PCI_DEVICE_ID_INTEL_82855PM_HB        0x3340
+ #define PCI_DEVICE_ID_INTEL_IOAT_TBG4 0x3429
+ #define PCI_DEVICE_ID_INTEL_IOAT_TBG5 0x342a
+ #define PCI_DEVICE_ID_INTEL_IOAT_TBG6 0x342b
+ #define PCI_DEVICE_ID_INTEL_IOAT_TBG7 0x342c
+ #define PCI_DEVICE_ID_INTEL_IOAT_TBG0 0x3430
+ #define PCI_DEVICE_ID_INTEL_IOAT_TBG1 0x3431
+ #define PCI_DEVICE_ID_INTEL_IOAT_TBG2 0x3432
+ #define PCI_DEVICE_ID_INTEL_IOAT_TBG3 0x3433
  #define PCI_DEVICE_ID_INTEL_82830_HB  0x3575
  #define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
  #define PCI_DEVICE_ID_INTEL_82855GM_HB        0x3580
diff --combined net/core/user_dma.c
index c77aff9c6eb3cc76fab911cdca097cc5add01d8c,de760504f6fee9bd94276f7e9b728983cc4a4663..8c6b706963ff01b02c87a54f2c70103e7f7f8f29
@@@ -34,6 -34,7 +34,7 @@@
  #define NET_DMA_DEFAULT_COPYBREAK 4096
  
  int sysctl_tcp_dma_copybreak = NET_DMA_DEFAULT_COPYBREAK;
+ EXPORT_SYMBOL(sysctl_tcp_dma_copybreak);
  
  /**
   *    dma_skb_copy_datagram_iovec - Copy a datagram to an iovec.
@@@ -75,7 -76,7 +76,7 @@@ int dma_skb_copy_datagram_iovec(struct 
  
                end = start + skb_shinfo(skb)->frags[i].size;
                copy = end - offset;
 -              if ((copy = end - offset) > 0) {
 +              if (copy > 0) {
                        skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
                        struct page *page = frag->page;