Merge branch 'for-linus' of git://neil.brown.name/md
authorLinus Torvalds <torvalds@linux-foundation.org>
Tue, 9 Jun 2009 15:41:22 +0000 (08:41 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Tue, 9 Jun 2009 15:41:22 +0000 (08:41 -0700)
* 'for-linus' of git://neil.brown.name/md:
  md/raid5: fix bug in reshape code when chunk_size decreases.
  md/raid5 - avoid deadlocks in get_active_stripe during reshape
  md/raid5: use conf->raid_disks in preference to mddev->raid_disk

29 files changed:
arch/arm/include/asm/cache.h
arch/arm/include/asm/page.h
arch/arm/mach-mx2/clock_imx21.c
arch/arm/mach-mx2/clock_imx27.c
arch/arm/mach-mx3/clock-imx35.c
arch/arm/mach-mx3/clock.c
arch/arm/mach-pxa/devices.c
arch/arm/mach-pxa/imote2.c
arch/arm/mm/proc-v7.S
arch/mips/Kconfig
arch/mips/include/asm/cpu-info.h
arch/mips/include/asm/delay.h
arch/mips/include/asm/ioctl.h
arch/mips/kernel/proc.c
arch/mips/lib/Makefile
arch/mips/lib/delay.c [new file with mode: 0644]
arch/mips/sibyte/cfe/setup.c
drivers/ata/pata_netcell.c
drivers/ide/pdc202xx_old.c
drivers/mmc/host/mvsdio.c
drivers/mmc/host/mxcmmc.c
drivers/mmc/host/omap.c
drivers/mmc/host/omap_hsmmc.c
drivers/mmc/host/sdhci-of.c
drivers/serial/imx.c
drivers/ssb/embedded.c
include/linux/amba/serial.h
kernel/async.c
virt/kvm/kvm_main.c

index cb7a9e97fd7ef7807161f509e0260a6fa94233cc..feaa75f0013eafcfcf5323954ade694bc40e343f 100644 (file)
@@ -7,4 +7,20 @@
 #define L1_CACHE_SHIFT         5
 #define L1_CACHE_BYTES         (1 << L1_CACHE_SHIFT)
 
+/*
+ * Memory returned by kmalloc() may be used for DMA, so we must make
+ * sure that all such allocations are cache aligned. Otherwise,
+ * unrelated code may cause parts of the buffer to be read into the
+ * cache before the transfer is done, causing old data to be seen by
+ * the CPU.
+ */
+#define ARCH_KMALLOC_MINALIGN  L1_CACHE_BYTES
+
+/*
+ * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
+ */
+#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
+#define ARCH_SLAB_MINALIGN 8
+#endif
+
 #endif
index e6eb8a67b8071a49153e8f7daa03e733e8c710cf..7b522770f29dc6e967f3c719817925ebf753c6e1 100644 (file)
@@ -202,13 +202,6 @@ typedef struct page *pgtable_t;
        (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
         VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
-/*
- * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
- */
-#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
-#define ARCH_SLAB_MINALIGN 8
-#endif
-
 #include <asm-generic/page.h>
 
 #endif
index 999d013e06e352e62e45cc232fc28b755b573ebd..e4b08ca804eaeded273ff239227e498d753528d8 100644 (file)
@@ -890,7 +890,7 @@ static struct clk clko_clk = {
                .con_id = n, \
                .clk = &c, \
        },
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
 /* It's unlikely that any driver wants one of them directly:
        _REGISTER_CLOCK(NULL, "ckih", ckih_clk)
        _REGISTER_CLOCK(NULL, "ckil", ckil_clk)
index 3f7280c490f0754c29dc92f78a3e599f169deb37..2c971442f3f2ad3b2c2331fadbe704045570d808 100644 (file)
@@ -621,7 +621,7 @@ DEFINE_CLOCK1(csi_clk,     0, 0,      0, parent, &csi_clk1, &per4_clk);
                .clk = &c, \
        },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
        _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
        _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
        _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
index 53a112d4e04aa2d1f6ccc022abe40c306ef0454b..3c1e06f56dd6ca60764d3f9ec349f1e1e926c8f3 100644 (file)
@@ -404,7 +404,7 @@ DEFINE_CLOCK(gpu2d_clk,  0, CCM_CGR3,  4, NULL, NULL);
                .clk = &c,              \
        },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
        _REGISTER_CLOCK(NULL, "asrc", asrc_clk)
        _REGISTER_CLOCK(NULL, "ata", ata_clk)
        _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
index 9957a11533a4471fc7a03837417bf740e8765ae9..a68fcf981edf124678efa99695cf7efe6cd2cbc4 100644 (file)
@@ -516,7 +516,7 @@ DEFINE_CLOCK(ipg_clk,     0, NULL,          0, ipg_get_rate, NULL, &ahb_clk);
                .clk = &c, \
        },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
        _REGISTER_CLOCK(NULL, "emi", emi_clk)
        _REGISTER_CLOCK(NULL, "cspi", cspi1_clk)
        _REGISTER_CLOCK(NULL, "cspi", cspi2_clk)
index d245e59c51b1c5f7afc6d4691d7bac68577510c9..29970f703f3cc6d33ddc19635f1b56a6df3d9777 100644 (file)
@@ -72,7 +72,10 @@ void __init pxa_set_mci_info(struct pxamci_platform_data *info)
 }
 
 
-static struct pxa2xx_udc_mach_info pxa_udc_info;
+static struct pxa2xx_udc_mach_info pxa_udc_info = {
+       .gpio_pullup = -1,
+       .gpio_vbus   = -1,
+};
 
 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
 {
index 2121309b2474dc545e379cac27697c8d374b0bad..2b27336c29f1b6ec517a63fd0881f8e964ff507d 100644 (file)
@@ -412,7 +412,7 @@ static struct platform_device imote2_flash_device = {
  */
 static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
        { /* UCAM sensor board */
-               .type = "max1238",
+               .type = "max1239",
                .addr = 0x35,
        }, { /* ITS400 Sensor board only */
                .type = "max1363",
index 3397f1e64d76378d676d7c7e9f517bde86cff9ad..a08d9d2380d3e357dedbf743111e0eac45721b09 100644 (file)
@@ -184,23 +184,37 @@ __v7_setup:
        stmia   r12, {r0-r5, r7, r9, r11, lr}
        bl      v7_flush_dcache_all
        ldmia   r12, {r0-r5, r7, r9, r11, lr}
+
+       mrc     p15, 0, r0, c0, c0, 0           @ read main ID register
+       and     r10, r0, #0xff000000            @ ARM?
+       teq     r10, #0x41000000
+       bne     2f
+       and     r5, r0, #0x00f00000             @ variant
+       and     r6, r0, #0x0000000f             @ revision
+       orr     r0, r6, r5, lsr #20-4           @ combine variant and revision
+
 #ifdef CONFIG_ARM_ERRATA_430973
-       mrc     p15, 0, r10, c1, c0, 1          @ read aux control register
-       orr     r10, r10, #(1 << 6)             @ set IBE to 1
-       mcr     p15, 0, r10, c1, c0, 1          @ write aux control register
+       teq     r5, #0x00100000                 @ only present in r1p*
+       mrceq   p15, 0, r10, c1, c0, 1          @ read aux control register
+       orreq   r10, r10, #(1 << 6)             @ set IBE to 1
+       mcreq   p15, 0, r10, c1, c0, 1          @ write aux control register
 #endif
 #ifdef CONFIG_ARM_ERRATA_458693
-       mrc     p15, 0, r10, c1, c0, 1          @ read aux control register
-       orr     r10, r10, #(1 << 5)             @ set L1NEON to 1
-       orr     r10, r10, #(1 << 9)             @ set PLDNOP to 1
-       mcr     p15, 0, r10, c1, c0, 1          @ write aux control register
+       teq     r0, #0x20                       @ only present in r2p0
+       mrceq   p15, 0, r10, c1, c0, 1          @ read aux control register
+       orreq   r10, r10, #(1 << 5)             @ set L1NEON to 1
+       orreq   r10, r10, #(1 << 9)             @ set PLDNOP to 1
+       mcreq   p15, 0, r10, c1, c0, 1          @ write aux control register
 #endif
 #ifdef CONFIG_ARM_ERRATA_460075
-       mrc     p15, 1, r10, c9, c0, 2          @ read L2 cache aux ctrl register
-       orr     r10, r10, #(1 << 22)            @ set the Write Allocate disable bit
-       mcr     p15, 1, r10, c9, c0, 2          @ write the L2 cache aux ctrl register
+       teq     r0, #0x20                       @ only present in r2p0
+       mrceq   p15, 1, r10, c9, c0, 2          @ read L2 cache aux ctrl register
+       tsteq   r10, #1 << 22
+       orreq   r10, r10, #(1 << 22)            @ set the Write Allocate disable bit
+       mcreq   p15, 1, r10, c9, c0, 2          @ write the L2 cache aux ctrl register
 #endif
-       mov     r10, #0
+
+2:     mov     r10, #0
 #ifdef HARVARD_CACHE
        mcr     p15, 0, r10, c7, c5, 0          @ I+BTB cache invalidate
 #endif
index 09b1287a92ce468de161de8700135109a49ac09b..25f3b0a11ca8f3c37556fff8db1619fb4c240ede 100644 (file)
@@ -72,6 +72,7 @@ config MIPS_COBALT
        select IRQ_CPU
        select IRQ_GT641XX
        select PCI_GT64XXX_PCI0
+       select PCI
        select SYS_HAS_CPU_NEVADA
        select SYS_HAS_EARLY_PRINTK
        select SYS_SUPPORTS_32BIT_KERNEL
@@ -593,7 +594,7 @@ config WR_PPMC
          board, which is based on GT64120 bridge chip.
 
 config CAVIUM_OCTEON_SIMULATOR
-       bool "Support for the Cavium Networks Octeon Simulator"
+       bool "Cavium Networks Octeon Simulator"
        select CEVT_R4K
        select 64BIT_PHYS_ADDR
        select DMA_COHERENT
@@ -607,7 +608,7 @@ config CAVIUM_OCTEON_SIMULATOR
          hardware.
 
 config CAVIUM_OCTEON_REFERENCE_BOARD
-       bool "Support for the Cavium Networks Octeon reference board"
+       bool "Cavium Networks Octeon reference board"
        select CEVT_R4K
        select 64BIT_PHYS_ADDR
        select DMA_COHERENT
index 744cd8fb107f8777d824312f42d9abb1cef57d68..126044308dec310fac7f66a28bca08ade3964f94 100644 (file)
@@ -39,8 +39,8 @@ struct cache_desc {
 #define MIPS_CACHE_PINDEX      0x00000020      /* Physically indexed cache */
 
 struct cpuinfo_mips {
-       unsigned long           udelay_val;
-       unsigned long           asid_cache;
+       unsigned int            udelay_val;
+       unsigned int            asid_cache;
 
        /*
         * Capability and feature descriptor structure for MIPS CPU
index b0bccd2c4ed503bb4f10ae8bc4aac057522e3ba0..a07e51b2be1356c5425923dc1710954283ad19d1 100644 (file)
 #ifndef _ASM_DELAY_H
 #define _ASM_DELAY_H
 
-#include <linux/param.h>
-#include <linux/smp.h>
+extern void __delay(unsigned int loops);
+extern void __ndelay(unsigned int ns);
+extern void __udelay(unsigned int us);
 
-#include <asm/compiler.h>
-#include <asm/war.h>
-
-static inline void __delay(unsigned long loops)
-{
-       if (sizeof(long) == 4)
-               __asm__ __volatile__ (
-               "       .set    noreorder                               \n"
-               "       .align  3                                       \n"
-               "1:     bnez    %0, 1b                                  \n"
-               "       subu    %0, 1                                   \n"
-               "       .set    reorder                                 \n"
-               : "=r" (loops)
-               : "0" (loops));
-       else if (sizeof(long) == 8 && !DADDI_WAR)
-               __asm__ __volatile__ (
-               "       .set    noreorder                               \n"
-               "       .align  3                                       \n"
-               "1:     bnez    %0, 1b                                  \n"
-               "       dsubu   %0, 1                                   \n"
-               "       .set    reorder                                 \n"
-               : "=r" (loops)
-               : "0" (loops));
-       else if (sizeof(long) == 8 && DADDI_WAR)
-               __asm__ __volatile__ (
-               "       .set    noreorder                               \n"
-               "       .align  3                                       \n"
-               "1:     bnez    %0, 1b                                  \n"
-               "       dsubu   %0, %2                                  \n"
-               "       .set    reorder                                 \n"
-               : "=r" (loops)
-               : "0" (loops), "r" (1));
-}
-
-
-/*
- * Division by multiplication: you don't have to worry about
- * loss of precision.
- *
- * Use only for very small delays ( < 1 msec).  Should probably use a
- * lookup table, really, as the multiplications take much too long with
- * short delays.  This is a "reasonable" implementation, though (and the
- * first constant multiplications gets optimized away if the delay is
- * a constant)
- */
-
-static inline void __udelay(unsigned long usecs, unsigned long lpj)
-{
-       unsigned long hi, lo;
-
-       /*
-        * The rates of 128 is rounded wrongly by the catchall case
-        * for 64-bit.  Excessive precission?  Probably ...
-        */
-#if defined(CONFIG_64BIT) && (HZ == 128)
-       usecs *= 0x0008637bd05af6c7UL;          /* 2**64 / (1000000 / HZ) */
-#elif defined(CONFIG_64BIT)
-       usecs *= (0x8000000000000000UL / (500000 / HZ));
-#else /* 32-bit junk follows here */
-       usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) +
-                                  0x80000000ULL) >> 32);
-#endif
-
-       if (sizeof(long) == 4)
-               __asm__("multu\t%2, %3"
-               : "=h" (usecs), "=l" (lo)
-               : "r" (usecs), "r" (lpj)
-               : GCC_REG_ACCUM);
-       else if (sizeof(long) == 8 && !R4000_WAR)
-               __asm__("dmultu\t%2, %3"
-               : "=h" (usecs), "=l" (lo)
-               : "r" (usecs), "r" (lpj)
-               : GCC_REG_ACCUM);
-       else if (sizeof(long) == 8 && R4000_WAR)
-               __asm__("dmultu\t%3, %4\n\tmfhi\t%0"
-               : "=r" (usecs), "=h" (hi), "=l" (lo)
-               : "r" (usecs), "r" (lpj)
-               : GCC_REG_ACCUM);
-
-       __delay(usecs);
-}
-
-#define __udelay_val cpu_data[raw_smp_processor_id()].udelay_val
-
-#define udelay(usecs) __udelay((usecs), __udelay_val)
+#define ndelay(ns) __udelay(ns)
+#define udelay(us) __udelay(us)
 
 /* make sure "usecs *= ..." in udelay do not overflow. */
 #if HZ >= 1000
index 85067e248a839e544d6c386a309a9bbe9273abfb..916163401b2cfd4b55c26fa4b8adef1beef0c290 100644 (file)
         ((nr)   << _IOC_NRSHIFT) | \
         ((size) << _IOC_SIZESHIFT))
 
+#ifdef __KERNEL__
 /* provoke compile error for invalid uses of size argument */
 extern unsigned int __invalid_size_argument_for_IOC;
 #define _IOC_TYPECHECK(t) \
        ((sizeof(t) == sizeof(t[1]) && \
          sizeof(t) < (1 << _IOC_SIZEBITS)) ? \
          sizeof(t) : __invalid_size_argument_for_IOC)
+#else
+#define _IOC_TYPECHECK(t)      (sizeof(t))
+#endif
 
 /* used to create numbers */
 #define _IO(type, nr)          _IOC(_IOC_NONE, (type), (nr), 0)
index 26760cad8b6972c4ad956a8cad81355c9d15ade7..e0a4ac18fa07e72f62d38089aa9d3ba9f472c51f 100644 (file)
@@ -42,7 +42,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
        seq_printf(m, fmt, __cpu_name[n],
                                   (version >> 4) & 0x0f, version & 0x0f,
                                   (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
-       seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
+       seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
                      cpu_data[n].udelay_val / (500000/HZ),
                      (cpu_data[n].udelay_val / (5000/HZ)) % 100);
        seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
index c13c7ad2cdaeb218d9b4cc09e89ec468a6f9cfe1..2adead5a8a376e54a8f9c58dade0c4e817fd82c7 100644 (file)
@@ -2,8 +2,8 @@
 # Makefile for MIPS-specific library files..
 #
 
-lib-y  += csum_partial.o memcpy.o memcpy-inatomic.o memset.o strlen_user.o \
-          strncpy_user.o strnlen_user.o uncached.o
+lib-y  += csum_partial.o delay.o memcpy.o memcpy-inatomic.o memset.o \
+          strlen_user.o strncpy_user.o strnlen_user.o uncached.o
 
 obj-y                  += iomap.o
 obj-$(CONFIG_PCI)      += iomap-pci.o
diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
new file mode 100644 (file)
index 0000000..f69c6b5
--- /dev/null
@@ -0,0 +1,56 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 by Waldorf Electronics
+ * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2007  Maciej W. Rozycki
+ */
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/smp.h>
+
+#include <asm/compiler.h>
+#include <asm/war.h>
+
+inline void __delay(unsigned int loops)
+{
+       __asm__ __volatile__ (
+       "       .set    noreorder                               \n"
+       "       .align  3                                       \n"
+       "1:     bnez    %0, 1b                                  \n"
+       "       subu    %0, 1                                   \n"
+       "       .set    reorder                                 \n"
+       : "=r" (loops)
+       : "0" (loops));
+}
+EXPORT_SYMBOL(__delay);
+
+/*
+ * Division by multiplication: you don't have to worry about
+ * loss of precision.
+ *
+ * Use only for very small delays ( < 1 msec).  Should probably use a
+ * lookup table, really, as the multiplications take much too long with
+ * short delays.  This is a "reasonable" implementation, though (and the
+ * first constant multiplications gets optimized away if the delay is
+ * a constant)
+ */
+
+void __udelay(unsigned long us)
+{
+       unsigned int lpj = current_cpu_data.udelay_val;
+
+       __delay((us * 0x000010c7 * HZ * lpj) >> 32);
+}
+EXPORT_SYMBOL(__udelay);
+
+void __ndelay(unsigned long ns)
+{
+       unsigned int lpj = current_cpu_data.udelay_val;
+
+       __delay((us * 0x00000005 * HZ * lpj) >> 32);
+}
+EXPORT_SYMBOL(__ndelay);
index 3de30f79db3f33dcbf945bca58389456af40e1f3..eb5396cf81bb1b725c79ec2360c890dca8214cac 100644 (file)
@@ -288,13 +288,7 @@ void __init prom_init(void)
         */
        cfe_cons_handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE);
        if (cfe_getenv("LINUX_CMDLINE", arcs_cmdline, CL_SIZE) < 0) {
-               if (argc < 0) {
-                       /*
-                        * It's OK for direct boot to not provide a
-                        *  command line
-                        */
-                       strcpy(arcs_cmdline, "root=/dev/ram0 ");
-               } else {
+               if (argc >= 0) {
                        /* The loader should have set the command line */
                        /* too early for panic to do any good */
                        printk("LINUX_CMDLINE not defined in cfe.");
index 9a698097134b093522d701211f30b2bb7bccc5f2..f0d52f72f5bb0b9d88800f0db89f4cccba40069f 100644 (file)
@@ -26,7 +26,7 @@ static unsigned int netcell_read_id(struct ata_device *adev,
        unsigned int err_mask = ata_do_dev_read_id(adev, tf, id);
        /* Firmware forgets to mark words 85-87 valid */
        if (err_mask == 0)
-               id[ATA_ID_CSF_DEFAULT] |= 0x0400;
+               id[ATA_ID_CSF_DEFAULT] |= 0x4000;
        return err_mask;
 }
 
index 248a54bd2386f346e155c19a74f1c635215170a3..b3bc96f930a6feb227d2827ef8ee748a29e2030c 100644 (file)
@@ -1,6 +1,6 @@
 /*
  *  Copyright (C) 1998-2002            Andre Hedrick <andre@linux-ide.org>
- *  Copyright (C) 2006-2007            MontaVista Software, Inc.
+ *  Copyright (C) 2006-2007, 2009      MontaVista Software, Inc.
  *  Copyright (C) 2007                 Bartlomiej Zolnierkiewicz
  *
  *  Portions Copyright (C) 1999 Promise Technology, Inc.
@@ -227,28 +227,19 @@ somebody_else:
        return (dma_stat & 4) == 4;     /* return 1 if INTR asserted */
 }
 
-static void pdc202xx_reset_host (ide_hwif_t *hwif)
+static void pdc202xx_reset(ide_drive_t *drive)
 {
+       ide_hwif_t *hwif        = drive->hwif;
        unsigned long high_16   = hwif->extra_base - 16;
        u8 udma_speed_flag      = inb(high_16 | 0x001f);
 
+       printk(KERN_WARNING "PDC202xx: software reset...\n");
+
        outb(udma_speed_flag | 0x10, high_16 | 0x001f);
        mdelay(100);
        outb(udma_speed_flag & ~0x10, high_16 | 0x001f);
        mdelay(2000);   /* 2 seconds ?! */
 
-       printk(KERN_WARNING "PDC202XX: %s channel reset.\n",
-               hwif->channel ? "Secondary" : "Primary");
-}
-
-static void pdc202xx_reset (ide_drive_t *drive)
-{
-       ide_hwif_t *hwif        = drive->hwif;
-       ide_hwif_t *mate        = hwif->mate;
-
-       pdc202xx_reset_host(hwif);
-       pdc202xx_reset_host(mate);
-
        ide_set_max_pio(drive);
 }
 
@@ -328,9 +319,8 @@ static const struct ide_dma_ops pdc20246_dma_ops = {
        .dma_start              = ide_dma_start,
        .dma_end                = ide_dma_end,
        .dma_test_irq           = pdc202xx_dma_test_irq,
-       .dma_lost_irq           = pdc202xx_dma_lost_irq,
+       .dma_lost_irq           = ide_dma_lost_irq,
        .dma_timer_expiry       = ide_dma_sff_timer_expiry,
-       .dma_clear              = pdc202xx_reset,
        .dma_sff_read_status    = ide_dma_sff_read_status,
 };
 
index c643d0fe118f1369dc63439bba6aa1e4dbbf9021..b56d72ff06e9efbf169d5b2f0c7af2c4f6e7589e 100644 (file)
@@ -64,6 +64,31 @@ static int mvsd_setup_data(struct mvsd_host *host, struct mmc_data *data)
        unsigned int tmout;
        int tmout_index;
 
+       /*
+        * Hardware weirdness.  The FIFO_EMPTY bit of the HW_STATE
+        * register is sometimes not set before a while when some
+        * "unusual" data block sizes are used (such as with the SWITCH
+        * command), even despite the fact that the XFER_DONE interrupt
+        * was raised.  And if another data transfer starts before
+        * this bit comes to good sense (which eventually happens by
+        * itself) then the new transfer simply fails with a timeout.
+        */
+       if (!(mvsd_read(MVSD_HW_STATE) & (1 << 13))) {
+               unsigned long t = jiffies + HZ;
+               unsigned int hw_state,  count = 0;
+               do {
+                       if (time_after(jiffies, t)) {
+                               dev_warn(host->dev, "FIFO_EMPTY bit missing\n");
+                               break;
+                       }
+                       hw_state = mvsd_read(MVSD_HW_STATE);
+                       count++;
+               } while (!(hw_state & (1 << 13)));
+               dev_dbg(host->dev, "*** wait for FIFO_EMPTY bit "
+                                  "(hw=0x%04x, count=%d, jiffies=%ld)\n",
+                                  hw_state, count, jiffies - (t - HZ));
+       }
+
        /* If timeout=0 then maximum timeout index is used. */
        tmout = DIV_ROUND_UP(data->timeout_ns, host->ns_per_clk);
        tmout += data->timeout_clks;
@@ -620,9 +645,18 @@ static void mvsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
        if (ios->bus_width == MMC_BUS_WIDTH_4)
                ctrl_reg |= MVSD_HOST_CTRL_DATA_WIDTH_4_BITS;
 
+       /*
+        * The HI_SPEED_EN bit is causing trouble with many (but not all)
+        * high speed SD, SDHC and SDIO cards.  Not enabling that bit
+        * makes all cards work.  So let's just ignore that bit for now
+        * and revisit this issue if problems for not enabling this bit
+        * are ever reported.
+        */
+#if 0
        if (ios->timing == MMC_TIMING_MMC_HS ||
            ios->timing == MMC_TIMING_SD_HS)
                ctrl_reg |= MVSD_HOST_CTRL_HI_SPEED_EN;
+#endif
 
        host->ctrl = ctrl_reg;
        mvsd_write(MVSD_HOST_CTRL, ctrl_reg);
@@ -882,3 +916,4 @@ module_param(nodma, int, 0);
 MODULE_AUTHOR("Maen Suleiman, Nicolas Pitre");
 MODULE_DESCRIPTION("Marvell MMC,SD,SDIO Host Controller driver");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:mvsdio");
index b4a615c55f28b5e4a8e9fb681dcc188771c8224d..f4cbe473670e0ad0a096fa43d12302b67490fadf 100644 (file)
@@ -140,6 +140,8 @@ struct mxcmci_host {
        struct work_struct      datawork;
 };
 
+static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios);
+
 static inline int mxcmci_use_dma(struct mxcmci_host *host)
 {
        return host->do_dma;
@@ -160,7 +162,7 @@ static void mxcmci_softreset(struct mxcmci_host *host)
        writew(0xff, host->base + MMC_REG_RES_TO);
 }
 
-static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
+static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
 {
        unsigned int nob = data->blocks;
        unsigned int blksz = data->blksz;
@@ -168,6 +170,7 @@ static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
 #ifdef HAS_DMA
        struct scatterlist *sg;
        int i;
+       int ret;
 #endif
        if (data->flags & MMC_DATA_STREAM)
                nob = 0xffff;
@@ -183,7 +186,7 @@ static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
        for_each_sg(data->sg, sg, data->sg_len, i) {
                if (sg->offset & 3 || sg->length & 3) {
                        host->do_dma = 0;
-                       return;
+                       return 0;
                }
        }
 
@@ -192,23 +195,30 @@ static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
                host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
                                             data->sg_len,  host->dma_dir);
 
-               imx_dma_setup_sg(host->dma, data->sg, host->dma_nents, datasize,
-                                host->res->start + MMC_REG_BUFFER_ACCESS,
-                                DMA_MODE_READ);
+               ret = imx_dma_setup_sg(host->dma, data->sg, host->dma_nents,
+                               datasize,
+                               host->res->start + MMC_REG_BUFFER_ACCESS,
+                               DMA_MODE_READ);
        } else {
                host->dma_dir = DMA_TO_DEVICE;
                host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
                                             data->sg_len,  host->dma_dir);
 
-               imx_dma_setup_sg(host->dma, data->sg, host->dma_nents, datasize,
-                                host->res->start + MMC_REG_BUFFER_ACCESS,
-                                DMA_MODE_WRITE);
+               ret = imx_dma_setup_sg(host->dma, data->sg, host->dma_nents,
+                               datasize,
+                               host->res->start + MMC_REG_BUFFER_ACCESS,
+                               DMA_MODE_WRITE);
        }
 
+       if (ret) {
+               dev_err(mmc_dev(host->mmc), "failed to setup DMA : %d\n", ret);
+               return ret;
+       }
        wmb();
 
        imx_dma_enable(host->dma);
 #endif /* HAS_DMA */
+       return 0;
 }
 
 static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd,
@@ -345,8 +355,11 @@ static int mxcmci_poll_status(struct mxcmci_host *host, u32 mask)
                stat = readl(host->base + MMC_REG_STATUS);
                if (stat & STATUS_ERR_MASK)
                        return stat;
-               if (time_after(jiffies, timeout))
+               if (time_after(jiffies, timeout)) {
+                       mxcmci_softreset(host);
+                       mxcmci_set_clk_rate(host, host->clock);
                        return STATUS_TIME_OUT_READ;
+               }
                if (stat & mask)
                        return 0;
                cpu_relax();
@@ -531,6 +544,7 @@ static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req)
 {
        struct mxcmci_host *host = mmc_priv(mmc);
        unsigned int cmdat = host->cmdat;
+       int error;
 
        WARN_ON(host->req != NULL);
 
@@ -540,7 +554,12 @@ static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req)
        host->do_dma = 1;
 #endif
        if (req->data) {
-               mxcmci_setup_data(host, req->data);
+               error = mxcmci_setup_data(host, req->data);
+               if (error) {
+                       req->cmd->error = error;
+                       goto out;
+               }
+
 
                cmdat |= CMD_DAT_CONT_DATA_ENABLE;
 
@@ -548,7 +567,9 @@ static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req)
                        cmdat |= CMD_DAT_CONT_WRITE;
        }
 
-       if (mxcmci_start_cmd(host, req->cmd, cmdat))
+       error = mxcmci_start_cmd(host, req->cmd, cmdat);
+out:
+       if (error)
                mxcmci_finish_request(host, req);
 }
 
@@ -724,7 +745,9 @@ static int mxcmci_probe(struct platform_device *pdev)
                goto out_clk_put;
        }
 
-       mmc->f_min = clk_get_rate(host->clk) >> 7;
+       mmc->f_min = clk_get_rate(host->clk) >> 16;
+       if (mmc->f_min < 400000)
+               mmc->f_min = 400000;
        mmc->f_max = clk_get_rate(host->clk) >> 1;
 
        /* recommended in data sheet */
index bfa25c01c8722f17684520b1ab3adfee9bdef193..dceb5ee3bda068da5668b87783f9cd8339e9207f 100644 (file)
@@ -822,7 +822,7 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
                del_timer(&host->cmd_abort_timer);
                host->abort = 1;
                OMAP_MMC_WRITE(host, IE, 0);
-               disable_irq(host->irq);
+               disable_irq_nosync(host->irq);
                schedule_work(&host->cmd_abort_work);
                return IRQ_HANDLED;
        }
index e62a22a7f00cb10089ab36424793aa498a81284f..c40cb96255a2c92a6e395df960dd7989b9143800 100644 (file)
@@ -680,7 +680,7 @@ static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data)
        host->dma_ch = -1;
        /*
         * DMA Callback: run in interrupt context.
-        * mutex_unlock will through a kernel warning if used.
+        * mutex_unlock will throw a kernel warning if used.
         */
        up(&host->sem);
 }
index 3ff4ac3abe8b779a4edcd71390676da81a5e4b71..128c614d11aa2d8d2446762cf1e97a123d2f99e5 100644 (file)
@@ -55,7 +55,13 @@ static u32 esdhc_readl(struct sdhci_host *host, int reg)
 
 static u16 esdhc_readw(struct sdhci_host *host, int reg)
 {
-       return in_be16(host->ioaddr + (reg ^ 0x2));
+       u16 ret;
+
+       if (unlikely(reg == SDHCI_HOST_VERSION))
+               ret = in_be16(host->ioaddr + reg);
+       else
+               ret = in_be16(host->ioaddr + (reg ^ 0x2));
+       return ret;
 }
 
 static u8 esdhc_readb(struct sdhci_host *host, int reg)
@@ -277,6 +283,7 @@ static int __devexit sdhci_of_remove(struct of_device *ofdev)
 static const struct of_device_id sdhci_of_match[] = {
        { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
        { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
+       { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
        { .compatible = "generic-sdhci", },
        {},
 };
index 9f460b175c50ba9eaff00a10ebdbec1f77f21f84..5f0be40dfdab7292ae65b4c763f4ee4105e36e24 100644 (file)
@@ -1031,6 +1031,8 @@ imx_console_setup(struct console *co, char *options)
        if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
                co->index = 0;
        sport = imx_ports[co->index];
+       if(sport == NULL)
+               return -ENODEV;
 
        if (options)
                uart_parse_options(options, &baud, &parity, &bits, &flow);
index 7dc3a6b41397a7253c8f6b389cf14431371166d8..a0e0d246b5928d061c5d3ca4738e1afd4bbeb874 100644 (file)
@@ -29,6 +29,7 @@ int ssb_watchdog_timer_set(struct ssb_bus *bus, u32 ticks)
        }
        return -ENODEV;
 }
+EXPORT_SYMBOL(ssb_watchdog_timer_set);
 
 u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask)
 {
index 48ee32a18ac5e798f34b29dc69561dd95c0f9830..64a982ea5d5fc08d6c57204ebf6555ad70aa6610 100644 (file)
 #define UART01x_FR_MODEM_ANY   (UART01x_FR_DCD|UART01x_FR_DSR|UART01x_FR_CTS)
 
 #ifndef __ASSEMBLY__
+struct amba_device; /* in uncompress this is included but amba/bus.h is not */
 struct amba_pl010_data {
        void (*set_mctrl)(struct amba_device *dev, void __iomem *base, unsigned int mctrl);
 };
index 50540301ed0f2d5308ab15a012715bd0b53f0a04..27235f5de198997180d4a293adc932d48c6101c7 100644 (file)
@@ -92,23 +92,18 @@ extern int initcall_debug;
 static async_cookie_t  __lowest_in_progress(struct list_head *running)
 {
        struct async_entry *entry;
-       async_cookie_t ret = next_cookie; /* begin with "infinity" value */
 
        if (!list_empty(running)) {
                entry = list_first_entry(running,
                        struct async_entry, list);
-               ret = entry->cookie;
+               return entry->cookie;
        }
 
-       if (!list_empty(&async_pending)) {
-               list_for_each_entry(entry, &async_pending, list)
-                       if (entry->running == running) {
-                               ret = entry->cookie;
-                               break;
-                       }
-       }
+       list_for_each_entry(entry, &async_pending, list)
+               if (entry->running == running)
+                       return entry->cookie;
 
-       return ret;
+       return next_cookie;     /* "infinity" value */
 }
 
 static async_cookie_t  lowest_in_progress(struct list_head *running)
index 1ecbe2391c8b11157c86ab2083f4ed856d38d813..4293528200b3759ca2fe6dc198a26c370392f1f0 100644 (file)
@@ -2305,6 +2305,7 @@ int kvm_init(void *opaque, unsigned int vcpu_size,
                r = -ENOMEM;
                goto out_free_0;
        }
+       cpumask_clear(cpus_hardware_enabled);
 
        r = kvm_arch_hardware_setup();
        if (r < 0)