]> nv-tegra.nvidia Code Review - linux-2.6.git/blobdiff - drivers/net/wireless/ath/ath9k/eeprom_4k.c
ath9k: Fix bugs in handling TX power
[linux-2.6.git] / drivers / net / wireless / ath / ath9k / eeprom_4k.c
index b8eca7be5f3a03b612344091ec72e608612675c2..58167d861dc6cbd945f6059046b6d3ace65a112c 100644 (file)
@@ -14,7 +14,7 @@
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
-#include "ath9k.h"
+#include "hw.h"
 
 static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah)
 {
@@ -29,20 +29,21 @@ static int ath9k_hw_4k_get_eeprom_rev(struct ath_hw *ah)
 static bool ath9k_hw_4k_fill_eeprom(struct ath_hw *ah)
 {
 #define SIZE_EEPROM_4K (sizeof(struct ar5416_eeprom_4k) / sizeof(u16))
+       struct ath_common *common = ath9k_hw_common(ah);
        u16 *eep_data = (u16 *)&ah->eeprom.map4k;
        int addr, eep_start_loc = 0;
 
        eep_start_loc = 64;
 
        if (!ath9k_hw_use_flash(ah)) {
-               DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
-                       "Reading from EEPROM, not flash\n");
+               ath_print(common, ATH_DBG_EEPROM,
+                         "Reading from EEPROM, not flash\n");
        }
 
        for (addr = 0; addr < SIZE_EEPROM_4K; addr++) {
-               if (!ath9k_hw_nvram_read(ah, addr + eep_start_loc, eep_data)) {
-                       DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
-                              "Unable to read eeprom region \n");
+               if (!ath9k_hw_nvram_read(common, addr + eep_start_loc, eep_data)) {
+                       ath_print(common, ATH_DBG_EEPROM,
+                                 "Unable to read eeprom region \n");
                        return false;
                }
                eep_data++;
@@ -55,6 +56,7 @@ static bool ath9k_hw_4k_fill_eeprom(struct ath_hw *ah)
 static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
 {
 #define EEPROM_4K_SIZE (sizeof(struct ar5416_eeprom_4k) / sizeof(u16))
+       struct ath_common *common = ath9k_hw_common(ah);
        struct ar5416_eeprom_4k *eep =
                (struct ar5416_eeprom_4k *) &ah->eeprom.map4k;
        u16 *eepdata, temp, magic, magic2;
@@ -64,15 +66,15 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
 
 
        if (!ath9k_hw_use_flash(ah)) {
-               if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET,
+               if (!ath9k_hw_nvram_read(common, AR5416_EEPROM_MAGIC_OFFSET,
                                         &magic)) {
-                       DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
-                               "Reading Magic # failed\n");
+                       ath_print(common, ATH_DBG_FATAL,
+                                 "Reading Magic # failed\n");
                        return false;
                }
 
-               DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
-                       "Read Magic = 0x%04X\n", magic);
+               ath_print(common, ATH_DBG_EEPROM,
+                         "Read Magic = 0x%04X\n", magic);
 
                if (magic != AR5416_EEPROM_MAGIC) {
                        magic2 = swab16(magic);
@@ -87,16 +89,16 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
                                        eepdata++;
                                }
                        } else {
-                               DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
-                                       "Invalid EEPROM Magic. "
-                                       "endianness mismatch.\n");
+                               ath_print(common, ATH_DBG_FATAL,
+                                         "Invalid EEPROM Magic. "
+                                         "endianness mismatch.\n");
                                return -EINVAL;
                        }
                }
        }
 
-       DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, "need_swap = %s.\n",
-               need_swap ? "True" : "False");
+       ath_print(common, ATH_DBG_EEPROM, "need_swap = %s.\n",
+                 need_swap ? "True" : "False");
 
        if (need_swap)
                el = swab16(ah->eeprom.map4k.baseEepHeader.length);
@@ -117,8 +119,8 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
                u32 integer;
                u16 word;
 
-               DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
-                       "EEPROM Endianness is not native.. Changing\n");
+               ath_print(common, ATH_DBG_EEPROM,
+                         "EEPROM Endianness is not native.. Changing\n");
 
                word = swab16(eep->baseEepHeader.length);
                eep->baseEepHeader.length = word;
@@ -160,9 +162,9 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
 
        if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR5416_EEP_VER ||
            ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) {
-               DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
-                       "Bad EEPROM checksum 0x%x or revision 0x%04x\n",
-                       sum, ah->eep_ops->get_eeprom_ver(ah));
+               ath_print(common, ATH_DBG_FATAL,
+                         "Bad EEPROM checksum 0x%x or revision 0x%04x\n",
+                         sum, ah->eep_ops->get_eeprom_ver(ah));
                return -EINVAL;
        }
 
@@ -208,6 +210,8 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah,
                return pBase->rxMask;
        case EEP_FRAC_N_5G:
                return 0;
+       case EEP_PWR_TABLE_OFFSET:
+               return AR5416_PWR_TABLE_OFFSET_DB;
        default:
                return 0;
        }
@@ -385,6 +389,7 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
                                  struct ath9k_channel *chan,
                                  int16_t *pTxPowerIndexOffset)
 {
+       struct ath_common *common = ath9k_hw_common(ah);
        struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k;
        struct cal_data_per_freq_4k *pRawDataset;
        u8 *pCalBChans = NULL;
@@ -470,21 +475,21 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
                                        ((pdadcValues[4 * j + 3] & 0xFF) << 24);
                                REG_WRITE(ah, regOffset, reg32);
 
-                               DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
-                                       "PDADC (%d,%4x): %4.4x %8.8x\n",
-                                       i, regChainOffset, regOffset,
-                                       reg32);
-                               DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
-                                       "PDADC: Chain %d | "
-                                       "PDADC %3d Value %3d | "
-                                       "PDADC %3d Value %3d | "
-                                       "PDADC %3d Value %3d | "
-                                       "PDADC %3d Value %3d |\n",
-                                       i, 4 * j, pdadcValues[4 * j],
-                                       4 * j + 1, pdadcValues[4 * j + 1],
-                                       4 * j + 2, pdadcValues[4 * j + 2],
-                                       4 * j + 3,
-                                       pdadcValues[4 * j + 3]);
+                               ath_print(common, ATH_DBG_EEPROM,
+                                         "PDADC (%d,%4x): %4.4x %8.8x\n",
+                                         i, regChainOffset, regOffset,
+                                         reg32);
+                               ath_print(common, ATH_DBG_EEPROM,
+                                         "PDADC: Chain %d | "
+                                         "PDADC %3d Value %3d | "
+                                         "PDADC %3d Value %3d | "
+                                         "PDADC %3d Value %3d | "
+                                         "PDADC %3d Value %3d |\n",
+                                         i, 4 * j, pdadcValues[4 * j],
+                                         4 * j + 1, pdadcValues[4 * j + 1],
+                                         4 * j + 2, pdadcValues[4 * j + 2],
+                                         4 * j + 3,
+                                         pdadcValues[4 * j + 3]);
 
                                regOffset += 4;
                        }
@@ -750,7 +755,7 @@ static void ath9k_hw_4k_set_txpower(struct ath_hw *ah,
 
        if (AR_SREV_9280_10_OR_LATER(ah)) {
                for (i = 0; i < Ar5416RateSize; i++)
-                       ratesArray[i] -= AR5416_PWR_TABLE_OFFSET * 2;
+                       ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;
        }
 
        /* OFDM power per rate */
@@ -1148,20 +1153,21 @@ static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
 {
 #define EEP_MAP4K_SPURCHAN \
        (ah->eeprom.map4k.modalHeader.spurChans[i].spurChan)
+       struct ath_common *common = ath9k_hw_common(ah);
 
        u16 spur_val = AR_NO_SPUR;
 
-       DPRINTF(ah->ah_sc, ATH_DBG_ANI,
-               "Getting spur idx %d is2Ghz. %d val %x\n",
-               i, is2GHz, ah->config.spurchans[i][is2GHz]);
+       ath_print(common, ATH_DBG_ANI,
+                 "Getting spur idx %d is2Ghz. %d val %x\n",
+                 i, is2GHz, ah->config.spurchans[i][is2GHz]);
 
        switch (ah->config.spurmode) {
        case SPUR_DISABLE:
                break;
        case SPUR_ENABLE_IOCTL:
                spur_val = ah->config.spurchans[i][is2GHz];
-               DPRINTF(ah->ah_sc, ATH_DBG_ANI,
-                       "Getting spur val from new loc. %d\n", spur_val);
+               ath_print(common, ATH_DBG_ANI,
+                         "Getting spur val from new loc. %d\n", spur_val);
                break;
        case SPUR_ENABLE_EEPROM:
                spur_val = EEP_MAP4K_SPURCHAN;