[PATCH] sh: Use pfn_valid() for lazy dcache write-back on SH7705

[linux-2.6.git] / arch / sh / mm / tlb-sh3.c

diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c
index 7a0d5c10bf20908dfad7a58fb8f96300f1f61f2e..46b09e26e0825fa411a593fdd4f5755e01d4f77a 100644 (file)
--- a/arch/sh/mm/tlb-sh3.c
+++ b/arch/sh/mm/tlb-sh3.c
@@ -40,12 +40,17 @@ void update_mmu_cache(struct vm_area_struct * vma,
                return;
 
 #if defined(CONFIG_SH7705_CACHE_32KB)
-       struct page *page;
-       page = pte_page(pte);
-       if (VALID_PAGE(page) && !test_bit(PG_mapped, &page->flags)) {
-               unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
-               __flush_wback_region((void *)P1SEGADDR(phys), PAGE_SIZE);
-               __set_bit(PG_mapped, &page->flags);
+       {
+               struct page *page = pte_page(pte);
+               unsigned long pfn = pte_pfn(pte);
+
+               if (pfn_valid(pfn) && !test_bit(PG_mapped, &page->flags)) {
+                       unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
+
+                       __flush_wback_region((void *)P1SEGADDR(phys),
+                                            PAGE_SIZE);
+                       __set_bit(PG_mapped, &page->flags);
+               }
        }
 #endif
 
@@ -80,7 +85,7 @@ void __flush_tlb_page(unsigned long asid, unsigned long page)
         */
        addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000);
        data = (page & 0xfffe0000) | asid; /* VALID bit is off */
-       
+
        if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) {
                addr |= MMU_PAGE_ASSOC_BIT;
                ways = 1;       /* we already know the way .. */