sh: Reworked SH7780 PCI initialization.

[linux-2.6.git] / arch / sh / include / cpu-sh2 / cpu / cache.h

diff --git a/arch/sh/include/cpu-sh2/cpu/cache.h b/arch/sh/include/cpu-sh2/cpu/cache.h
index 4e0b16500686222163fae9b50ce044ad3c486c51..673515bc413559a24600f988baeb91e8a6b9b1d4 100644 (file)
--- a/arch/sh/include/cpu-sh2/cpu/cache.h
+++ b/arch/sh/include/cpu-sh2/cpu/cache.h
@@ -21,11 +21,11 @@
 #define CCR            0xffffffec
 
 #define CCR_CACHE_CE   0x01    /* Cache enable */
-#define CCR_CACHE_WT   0x06    /* CCR[bit1=1,bit2=1] */
+#define CCR_CACHE_WT   0x02    /* CCR[bit1=1,bit2=1] */
                                /* 0x00000000-0x7fffffff: Write-through  */
                                /* 0x80000000-0x9fffffff: Write-back     */
                                 /* 0xc0000000-0xdfffffff: Write-through  */
-#define CCR_CACHE_CB   0x00    /* CCR[bit1=0,bit2=0] */
+#define CCR_CACHE_CB   0x04    /* CCR[bit1=0,bit2=0] */
                                /* 0x00000000-0x7fffffff: Write-back     */
                                /* 0x80000000-0x9fffffff: Write-through  */
                                 /* 0xc0000000-0xdfffffff: Write-back     */
@@ -36,6 +36,8 @@
 
 #define CCR_CACHE_ENABLE       CCR_CACHE_CE
 #define CCR_CACHE_INVALIDATE   CCR_CACHE_CF
+#define CACHE_PHYSADDR_MASK    0x1ffffc00
+
 #endif
 
 #endif /* __ASM_CPU_SH2_CACHE_H */