[MIPS] Separate performance counter interrupts
[linux-2.6.git] / arch / mips / oprofile / op_model_mipsxx.c
index 4f94fa261aae37a1fbe64e2000dd9b76a5bf2bec..1ea5c9c1010b19610943012838f5b9a00fdb5964 100644 (file)
@@ -177,7 +177,10 @@ static int mipsxx_perfcount_handler(void)
        unsigned int counters = op_model_mipsxx_ops.num_counters;
        unsigned int control;
        unsigned int counter;
-       int handled = 0;
+       int handled = IRQ_NONE;
+
+       if (cpu_has_mips_r2 && !(read_c0_cause() & (1 << 26)))
+               return handled;
 
        switch (counters) {
 #define HANDLE_COUNTER(n)                                              \
@@ -188,7 +191,7 @@ static int mipsxx_perfcount_handler(void)
                    (counter & M_COUNTER_OVERFLOW)) {                   \
                        oprofile_add_sample(get_irq_regs(), n);         \
                        w_c0_perfcntr ## n(reg.counter[n]);             \
-                       handled = 1;                                    \
+                       handled = IRQ_HANDLED;                          \
                }
        HANDLE_COUNTER(3)
        HANDLE_COUNTER(2)