]> nv-tegra.nvidia Code Review - linux-2.6.git/blobdiff - arch/blackfin/mach-bf548/include/mach/blackfin.h
Blackfin: drop unused MMR defines that only cause bad code to be written
[linux-2.6.git] / arch / blackfin / mach-bf548 / include / mach / blackfin.h
index 6b97396d817f28f5f5c5842a6867e833f497d929..318667b2f036a021d364ffe1c97225449202cb20 100644 (file)
 #include "cdefBF549.h"
 #endif
 
-/* UART 1*/
-#define bfin_read_UART_THR()           bfin_read_UART1_THR()
-#define bfin_write_UART_THR(val)       bfin_write_UART1_THR(val)
-#define bfin_read_UART_RBR()           bfin_read_UART1_RBR()
-#define bfin_write_UART_RBR(val)       bfin_write_UART1_RBR(val)
-#define bfin_read_UART_DLL()           bfin_read_UART1_DLL()
-#define bfin_write_UART_DLL(val)       bfin_write_UART1_DLL(val)
-#define bfin_read_UART_IER()           bfin_read_UART1_IER()
-#define bfin_write_UART_IER(val)       bfin_write_UART1_IER(val)
-#define bfin_read_UART_DLH()           bfin_read_UART1_DLH()
-#define bfin_write_UART_DLH(val)       bfin_write_UART1_DLH(val)
-#define bfin_read_UART_IIR()           bfin_read_UART1_IIR()
-#define bfin_write_UART_IIR(val)       bfin_write_UART1_IIR(val)
-#define bfin_read_UART_LCR()           bfin_read_UART1_LCR()
-#define bfin_write_UART_LCR(val)       bfin_write_UART1_LCR(val)
-#define bfin_read_UART_MCR()           bfin_read_UART1_MCR()
-#define bfin_write_UART_MCR(val)       bfin_write_UART1_MCR(val)
-#define bfin_read_UART_LSR()           bfin_read_UART1_LSR()
-#define bfin_write_UART_LSR(val)       bfin_write_UART1_LSR(val)
-#define bfin_read_UART_SCR()           bfin_read_UART1_SCR()
-#define bfin_write_UART_SCR(val)       bfin_write_UART1_SCR(val)
-#define bfin_read_UART_GCTL()          bfin_read_UART1_GCTL()
-#define bfin_write_UART_GCTL(val)      bfin_write_UART1_GCTL(val)
-
 #endif
 
-/* MAP used DEFINES from BF533 to BF54x - so we don't need to change 
- * them in the driver, kernel, etc. */
-
-/* UART_IIR Register */
-#define STATUS(x)      ((x << 1) & 0x06)
-#define STATUS_P1      0x02
-#define STATUS_P0      0x01
-
-/* UART 0*/
-
-/* DMA Channel */
-#define bfin_read_CH_UART_RX()         bfin_read_CH_UART1_RX()
-#define bfin_write_CH_UART_RX(val)     bfin_write_CH_UART1_RX(val)
-#define bfin_read_CH_UART_TX()         bfin_read_CH_UART1_TX()
-#define bfin_write_CH_UART_TX(val)     bfin_write_CH_UART1_TX(val)
-#define CH_UART_RX                     CH_UART1_RX
-#define CH_UART_TX                     CH_UART1_TX
-
-/* System Interrupt Controller */
-#define bfin_read_IRQ_UART_RX()                bfin_read_IRQ_UART1_RX()
-#define bfin_write_IRQ_UART_RX(val)    bfin_write_IRQ_UART1_RX(val)
-#define bfin_read_IRQ_UART_TX()                bfin_read_IRQ_UART1_TX()
-#define bfin_write_IRQ_UART_TX(val)    bfin_write_IRQ_UART1_TX(val)
-#define bfin_read_IRQ_UART_ERROR()     bfin_read_IRQ_UART1_ERROR()
-#define bfin_write_IRQ_UART_ERROR(val) bfin_write_IRQ_UART1_ERROR(val)
-#define IRQ_UART_RX                    IRQ_UART1_RX
-#define        IRQ_UART_TX                     IRQ_UART1_TX
-#define        IRQ_UART_ERROR                  IRQ_UART1_ERROR
-
-/* MMR Registers*/
-#define bfin_read_UART_THR()           bfin_read_UART1_THR()
-#define bfin_write_UART_THR(val)       bfin_write_UART1_THR(val)
-#define bfin_read_UART_RBR()           bfin_read_UART1_RBR()
-#define bfin_write_UART_RBR(val)       bfin_write_UART1_RBR(val)
-#define bfin_read_UART_DLL()           bfin_read_UART1_DLL()
-#define bfin_write_UART_DLL(val)       bfin_write_UART1_DLL(val)
-#define bfin_read_UART_IER()           bfin_read_UART1_IER()
-#define bfin_write_UART_IER(val)       bfin_write_UART1_IER(val)
-#define bfin_read_UART_DLH()           bfin_read_UART1_DLH()
-#define bfin_write_UART_DLH(val)       bfin_write_UART1_DLH(val)
-#define bfin_read_UART_IIR()           bfin_read_UART1_IIR()
-#define bfin_write_UART_IIR(val)       bfin_write_UART1_IIR(val)
-#define bfin_read_UART_LCR()           bfin_read_UART1_LCR()
-#define bfin_write_UART_LCR(val)       bfin_write_UART1_LCR(val)
-#define bfin_read_UART_MCR()           bfin_read_UART1_MCR()
-#define bfin_write_UART_MCR(val)       bfin_write_UART1_MCR(val)
-#define bfin_read_UART_LSR()           bfin_read_UART1_LSR()
-#define bfin_write_UART_LSR(val)       bfin_write_UART1_LSR(val)
-#define bfin_read_UART_SCR()           bfin_read_UART1_SCR()
-#define bfin_write_UART_SCR(val)       bfin_write_UART1_SCR(val)
-#define bfin_read_UART_GCTL()          bfin_read_UART1_GCTL()
-#define bfin_write_UART_GCTL(val)      bfin_write_UART1_GCTL(val)
-
-#define BFIN_UART_THR                  UART1_THR
-#define BFIN_UART_RBR                  UART1_RBR
-#define BFIN_UART_DLL                  UART1_DLL
-#define BFIN_UART_IER                  UART1_IER
-#define BFIN_UART_DLH                  UART1_DLH
-#define BFIN_UART_IIR                  UART1_IIR
-#define BFIN_UART_LCR                  UART1_LCR
-#define BFIN_UART_MCR                  UART1_MCR
-#define BFIN_UART_LSR                  UART1_LSR
-#define BFIN_UART_SCR                  UART1_SCR
-#define BFIN_UART_GCTL                 UART1_GCTL
-
 #define BFIN_UART_NR_PORTS     4
 
 #define OFFSET_DLL              0x00   /* Divisor Latch (Low-Byte)             */