c819ae25a8425ddfd72136dda4d674bf0f8b0ac1
[linux-2.6.git] / include / asm-s390 / system.h
1 /*
2  *  include/asm-s390/system.h
3  *
4  *  S390 version
5  *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6  *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7  *
8  *  Derived from "include/asm-i386/system.h"
9  */
10
11 #ifndef __ASM_SYSTEM_H
12 #define __ASM_SYSTEM_H
13
14 #include <linux/kernel.h>
15 #include <asm/types.h>
16 #include <asm/ptrace.h>
17 #include <asm/setup.h>
18 #include <asm/processor.h>
19 #include <asm/lowcore.h>
20
21 #ifdef __KERNEL__
22
23 struct task_struct;
24
25 extern struct task_struct *__switch_to(void *, void *);
26
27 static inline void save_fp_regs(s390_fp_regs *fpregs)
28 {
29         asm volatile(
30                 "       std     0,8(%1)\n"
31                 "       std     2,24(%1)\n"
32                 "       std     4,40(%1)\n"
33                 "       std     6,56(%1)"
34                 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory");
35         if (!MACHINE_HAS_IEEE)
36                 return;
37         asm volatile(
38                 "       stfpc   0(%1)\n"
39                 "       std     1,16(%1)\n"
40                 "       std     3,32(%1)\n"
41                 "       std     5,48(%1)\n"
42                 "       std     7,64(%1)\n"
43                 "       std     8,72(%1)\n"
44                 "       std     9,80(%1)\n"
45                 "       std     10,88(%1)\n"
46                 "       std     11,96(%1)\n"
47                 "       std     12,104(%1)\n"
48                 "       std     13,112(%1)\n"
49                 "       std     14,120(%1)\n"
50                 "       std     15,128(%1)\n"
51                 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory");
52 }
53
54 static inline void restore_fp_regs(s390_fp_regs *fpregs)
55 {
56         asm volatile(
57                 "       ld      0,8(%0)\n"
58                 "       ld      2,24(%0)\n"
59                 "       ld      4,40(%0)\n"
60                 "       ld      6,56(%0)"
61                 : : "a" (fpregs), "m" (*fpregs));
62         if (!MACHINE_HAS_IEEE)
63                 return;
64         asm volatile(
65                 "       lfpc    0(%0)\n"
66                 "       ld      1,16(%0)\n"
67                 "       ld      3,32(%0)\n"
68                 "       ld      5,48(%0)\n"
69                 "       ld      7,64(%0)\n"
70                 "       ld      8,72(%0)\n"
71                 "       ld      9,80(%0)\n"
72                 "       ld      10,88(%0)\n"
73                 "       ld      11,96(%0)\n"
74                 "       ld      12,104(%0)\n"
75                 "       ld      13,112(%0)\n"
76                 "       ld      14,120(%0)\n"
77                 "       ld      15,128(%0)\n"
78                 : : "a" (fpregs), "m" (*fpregs));
79 }
80
81 static inline void save_access_regs(unsigned int *acrs)
82 {
83         asm volatile("stam 0,15,0(%0)" : : "a" (acrs) : "memory");
84 }
85
86 static inline void restore_access_regs(unsigned int *acrs)
87 {
88         asm volatile("lam 0,15,0(%0)" : : "a" (acrs));
89 }
90
91 #define switch_to(prev,next,last) do {                                       \
92         if (prev == next)                                                    \
93                 break;                                                       \
94         save_fp_regs(&prev->thread.fp_regs);                                 \
95         restore_fp_regs(&next->thread.fp_regs);                              \
96         save_access_regs(&prev->thread.acrs[0]);                             \
97         restore_access_regs(&next->thread.acrs[0]);                          \
98         prev = __switch_to(prev,next);                                       \
99 } while (0)
100
101 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
102 extern void account_vtime(struct task_struct *);
103 extern void account_tick_vtime(struct task_struct *);
104 extern void account_system_vtime(struct task_struct *);
105 #else
106 #define account_vtime(x) do { /* empty */ } while (0)
107 #endif
108
109 #ifdef CONFIG_PFAULT
110 extern void pfault_irq_init(void);
111 extern int pfault_init(void);
112 extern void pfault_fini(void);
113 #else /* CONFIG_PFAULT */
114 #define pfault_irq_init()       do { } while (0)
115 #define pfault_init()           ({-1;})
116 #define pfault_fini()           do { } while (0)
117 #endif /* CONFIG_PFAULT */
118
119 #define finish_arch_switch(prev) do {                                        \
120         set_fs(current->thread.mm_segment);                                  \
121         account_vtime(prev);                                                 \
122 } while (0)
123
124 #define nop() asm volatile("nop")
125
126 #define xchg(ptr,x)                                                       \
127 ({                                                                        \
128         __typeof__(*(ptr)) __ret;                                         \
129         __ret = (__typeof__(*(ptr)))                                      \
130                 __xchg((unsigned long)(x), (void *)(ptr),sizeof(*(ptr))); \
131         __ret;                                                            \
132 })
133
134 extern void __xchg_called_with_bad_pointer(void);
135
136 static inline unsigned long __xchg(unsigned long x, void * ptr, int size)
137 {
138         unsigned long addr, old;
139         int shift;
140
141         switch (size) {
142         case 1:
143                 addr = (unsigned long) ptr;
144                 shift = (3 ^ (addr & 3)) << 3;
145                 addr ^= addr & 3;
146                 asm volatile(
147                         "       l       %0,0(%4)\n"
148                         "0:     lr      0,%0\n"
149                         "       nr      0,%3\n"
150                         "       or      0,%2\n"
151                         "       cs      %0,0,0(%4)\n"
152                         "       jl      0b\n"
153                         : "=&d" (old), "=m" (*(int *) addr)
154                         : "d" (x << shift), "d" (~(255 << shift)), "a" (addr),
155                           "m" (*(int *) addr) : "memory", "cc", "0");
156                 return old >> shift;
157         case 2:
158                 addr = (unsigned long) ptr;
159                 shift = (2 ^ (addr & 2)) << 3;
160                 addr ^= addr & 2;
161                 asm volatile(
162                         "       l       %0,0(%4)\n"
163                         "0:     lr      0,%0\n"
164                         "       nr      0,%3\n"
165                         "       or      0,%2\n"
166                         "       cs      %0,0,0(%4)\n"
167                         "       jl      0b\n"
168                         : "=&d" (old), "=m" (*(int *) addr)
169                         : "d" (x << shift), "d" (~(65535 << shift)), "a" (addr),
170                           "m" (*(int *) addr) : "memory", "cc", "0");
171                 return old >> shift;
172         case 4:
173                 asm volatile(
174                         "       l       %0,0(%3)\n"
175                         "0:     cs      %0,%2,0(%3)\n"
176                         "       jl      0b\n"
177                         : "=&d" (old), "=m" (*(int *) ptr)
178                         : "d" (x), "a" (ptr), "m" (*(int *) ptr)
179                         : "memory", "cc");
180                 return old;
181 #ifdef __s390x__
182         case 8:
183                 asm volatile(
184                         "       lg      %0,0(%3)\n"
185                         "0:     csg     %0,%2,0(%3)\n"
186                         "       jl      0b\n"
187                         : "=&d" (old), "=m" (*(long *) ptr)
188                         : "d" (x), "a" (ptr), "m" (*(long *) ptr)
189                         : "memory", "cc");
190                 return old;
191 #endif /* __s390x__ */
192         }
193         __xchg_called_with_bad_pointer();
194         return x;
195 }
196
197 /*
198  * Atomic compare and exchange.  Compare OLD with MEM, if identical,
199  * store NEW in MEM.  Return the initial value in MEM.  Success is
200  * indicated by comparing RETURN with OLD.
201  */
202
203 #define __HAVE_ARCH_CMPXCHG 1
204
205 #define cmpxchg(ptr, o, n)                                              \
206         ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o),       \
207                                         (unsigned long)(n), sizeof(*(ptr))))
208
209 extern void __cmpxchg_called_with_bad_pointer(void);
210
211 static inline unsigned long
212 __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
213 {
214         unsigned long addr, prev, tmp;
215         int shift;
216
217         switch (size) {
218         case 1:
219                 addr = (unsigned long) ptr;
220                 shift = (3 ^ (addr & 3)) << 3;
221                 addr ^= addr & 3;
222                 asm volatile(
223                         "       l       %0,0(%4)\n"
224                         "0:     nr      %0,%5\n"
225                         "       lr      %1,%0\n"
226                         "       or      %0,%2\n"
227                         "       or      %1,%3\n"
228                         "       cs      %0,%1,0(%4)\n"
229                         "       jnl     1f\n"
230                         "       xr      %1,%0\n"
231                         "       nr      %1,%5\n"
232                         "       jnz     0b\n"
233                         "1:"
234                         : "=&d" (prev), "=&d" (tmp)
235                         : "d" (old << shift), "d" (new << shift), "a" (ptr),
236                           "d" (~(255 << shift))
237                         : "memory", "cc");
238                 return prev >> shift;
239         case 2:
240                 addr = (unsigned long) ptr;
241                 shift = (2 ^ (addr & 2)) << 3;
242                 addr ^= addr & 2;
243                 asm volatile(
244                         "       l       %0,0(%4)\n"
245                         "0:     nr      %0,%5\n"
246                         "       lr      %1,%0\n"
247                         "       or      %0,%2\n"
248                         "       or      %1,%3\n"
249                         "       cs      %0,%1,0(%4)\n"
250                         "       jnl     1f\n"
251                         "       xr      %1,%0\n"
252                         "       nr      %1,%5\n"
253                         "       jnz     0b\n"
254                         "1:"
255                         : "=&d" (prev), "=&d" (tmp)
256                         : "d" (old << shift), "d" (new << shift), "a" (ptr),
257                           "d" (~(65535 << shift))
258                         : "memory", "cc");
259                 return prev >> shift;
260         case 4:
261                 asm volatile(
262                         "       cs      %0,%2,0(%3)\n"
263                         : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr)
264                         : "memory", "cc");
265                 return prev;
266 #ifdef __s390x__
267         case 8:
268                 asm volatile(
269                         "       csg     %0,%2,0(%3)\n"
270                         : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr)
271                         : "memory", "cc");
272                 return prev;
273 #endif /* __s390x__ */
274         }
275         __cmpxchg_called_with_bad_pointer();
276         return old;
277 }
278
279 /*
280  * Force strict CPU ordering.
281  * And yes, this is required on UP too when we're talking
282  * to devices.
283  *
284  * This is very similar to the ppc eieio/sync instruction in that is
285  * does a checkpoint syncronisation & makes sure that 
286  * all memory ops have completed wrt other CPU's ( see 7-15 POP  DJB ).
287  */
288
289 #define eieio() asm volatile("bcr 15,0" : : : "memory")
290 #define SYNC_OTHER_CORES(x)   eieio()
291 #define mb()    eieio()
292 #define rmb()   eieio()
293 #define wmb()   eieio()
294 #define read_barrier_depends() do { } while(0)
295 #define smp_mb()       mb()
296 #define smp_rmb()      rmb()
297 #define smp_wmb()      wmb()
298 #define smp_read_barrier_depends()    read_barrier_depends()
299 #define smp_mb__before_clear_bit()     smp_mb()
300 #define smp_mb__after_clear_bit()      smp_mb()
301
302
303 #define set_mb(var, value)      do { var = value; mb(); } while (0)
304
305 #ifdef __s390x__
306
307 #define __ctl_load(array, low, high) ({                         \
308         typedef struct { char _[sizeof(array)]; } addrtype;     \
309         asm volatile(                                           \
310                 "       lctlg   %1,%2,0(%0)\n"                  \
311                 : : "a" (&array), "i" (low), "i" (high),        \
312                     "m" (*(addrtype *)(array)));                \
313         })
314
315 #define __ctl_store(array, low, high) ({                        \
316         typedef struct { char _[sizeof(array)]; } addrtype;     \
317         asm volatile(                                           \
318                 "       stctg   %2,%3,0(%1)\n"                  \
319                 : "=m" (*(addrtype *)(array))                   \
320                 : "a" (&array), "i" (low), "i" (high));         \
321         })
322
323 #else /* __s390x__ */
324
325 #define __ctl_load(array, low, high) ({                         \
326         typedef struct { char _[sizeof(array)]; } addrtype;     \
327         asm volatile(                                           \
328                 "       lctl    %1,%2,0(%0)\n"                  \
329                 : : "a" (&array), "i" (low), "i" (high),        \
330                     "m" (*(addrtype *)(array)));                \
331 })
332
333 #define __ctl_store(array, low, high) ({                        \
334         typedef struct { char _[sizeof(array)]; } addrtype;     \
335         asm volatile(                                           \
336                 "       stctl   %2,%3,0(%1)\n"                  \
337                 : "=m" (*(addrtype *)(array))                   \
338                 : "a" (&array), "i" (low), "i" (high));         \
339         })
340
341 #endif /* __s390x__ */
342
343 #define __ctl_set_bit(cr, bit) ({       \
344         unsigned long __dummy;          \
345         __ctl_store(__dummy, cr, cr);   \
346         __dummy |= 1UL << (bit);        \
347         __ctl_load(__dummy, cr, cr);    \
348 })
349
350 #define __ctl_clear_bit(cr, bit) ({     \
351         unsigned long __dummy;          \
352         __ctl_store(__dummy, cr, cr);   \
353         __dummy &= ~(1UL << (bit));     \
354         __ctl_load(__dummy, cr, cr);    \
355 })
356
357 #include <linux/irqflags.h>
358
359 #include <asm-generic/cmpxchg-local.h>
360
361 static inline unsigned long __cmpxchg_local(volatile void *ptr,
362                                       unsigned long old,
363                                       unsigned long new, int size)
364 {
365         switch (size) {
366         case 1:
367         case 2:
368         case 4:
369 #ifdef __s390x__
370         case 8:
371 #endif
372                 return __cmpxchg(ptr, old, new, size);
373         default:
374                 return __cmpxchg_local_generic(ptr, old, new, size);
375         }
376
377         return old;
378 }
379
380 /*
381  * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
382  * them available.
383  */
384 #define cmpxchg_local(ptr, o, n)                                        \
385         ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
386                         (unsigned long)(n), sizeof(*(ptr))))
387 #ifdef __s390x__
388 #define cmpxchg64_local(ptr, o, n)                                      \
389   ({                                                                    \
390         BUILD_BUG_ON(sizeof(*(ptr)) != 8);                              \
391         cmpxchg_local((ptr), (o), (n));                                 \
392   })
393 #else
394 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
395 #endif
396
397 /*
398  * Use to set psw mask except for the first byte which
399  * won't be changed by this function.
400  */
401 static inline void
402 __set_psw_mask(unsigned long mask)
403 {
404         __load_psw_mask(mask | (__raw_local_irq_stosm(0x00) & ~(-1UL >> 8)));
405 }
406
407 #define local_mcck_enable()  __set_psw_mask(psw_kernel_bits)
408 #define local_mcck_disable() __set_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK)
409
410 int stfle(unsigned long long *list, int doublewords);
411
412 #ifdef CONFIG_SMP
413
414 extern void smp_ctl_set_bit(int cr, int bit);
415 extern void smp_ctl_clear_bit(int cr, int bit);
416 #define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
417 #define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
418
419 #else
420
421 #define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
422 #define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
423
424 #endif /* CONFIG_SMP */
425
426 static inline unsigned int stfl(void)
427 {
428         asm volatile(
429                 "       .insn   s,0xb2b10000,0(0)\n" /* stfl */
430                 "0:\n"
431                 EX_TABLE(0b,0b));
432         return S390_lowcore.stfl_fac_list;
433 }
434
435 static inline unsigned short stap(void)
436 {
437         unsigned short cpu_address;
438
439         asm volatile("stap %0" : "=m" (cpu_address));
440         return cpu_address;
441 }
442
443 extern void (*_machine_restart)(char *command);
444 extern void (*_machine_halt)(void);
445 extern void (*_machine_power_off)(void);
446
447 #define arch_align_stack(x) (x)
448
449 #ifdef CONFIG_TRACE_IRQFLAGS
450 extern psw_t sysc_restore_trace_psw;
451 extern psw_t io_restore_trace_psw;
452 #endif
453
454 #endif /* __KERNEL__ */
455
456 #endif