[PATCH] powerpc: Merged ppc_asm.h
[linux-2.6.git] / include / asm-ppc64 / cputable.h
1 /*
2  *  include/asm-ppc64/cputable.h
3  *
4  *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5  *
6  *  Modifications for ppc64:
7  *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
8  * 
9  *  This program is free software; you can redistribute it and/or
10  *  modify it under the terms of the GNU General Public License
11  *  as published by the Free Software Foundation; either version
12  *  2 of the License, or (at your option) any later version.
13  */
14
15 #ifndef __ASM_PPC_CPUTABLE_H
16 #define __ASM_PPC_CPUTABLE_H
17
18 #include <linux/config.h>
19 #include <asm/ppc_asm.h> /* for ASM_CONST */
20
21 /* Exposed to userland CPU features - Must match ppc32 definitions */
22 #define PPC_FEATURE_32                  0x80000000
23 #define PPC_FEATURE_64                  0x40000000
24 #define PPC_FEATURE_601_INSTR           0x20000000
25 #define PPC_FEATURE_HAS_ALTIVEC         0x10000000
26 #define PPC_FEATURE_HAS_FPU             0x08000000
27 #define PPC_FEATURE_HAS_MMU             0x04000000
28 #define PPC_FEATURE_HAS_4xxMAC          0x02000000
29 #define PPC_FEATURE_UNIFIED_CACHE       0x01000000
30
31 #ifdef __KERNEL__
32
33 #ifndef __ASSEMBLY__
34
35 /* This structure can grow, it's real size is used by head.S code
36  * via the mkdefs mechanism.
37  */
38 struct cpu_spec;
39 struct op_ppc64_model;
40
41 typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec);
42
43 struct cpu_spec {
44         /* CPU is matched via (PVR & pvr_mask) == pvr_value */
45         unsigned int    pvr_mask;
46         unsigned int    pvr_value;
47
48         char            *cpu_name;
49         unsigned long   cpu_features;           /* Kernel features */
50         unsigned int    cpu_user_features;      /* Userland features */
51
52         /* cache line sizes */
53         unsigned int    icache_bsize;
54         unsigned int    dcache_bsize;
55
56         /* number of performance monitor counters */
57         unsigned int    num_pmcs;
58
59         /* this is called to initialize various CPU bits like L1 cache,
60          * BHT, SPD, etc... from head.S before branching to identify_machine
61          */
62         cpu_setup_t     cpu_setup;
63
64         /* Used by oprofile userspace to select the right counters */
65         char            *oprofile_cpu_type;
66
67         /* Processor specific oprofile operations */
68         struct op_ppc64_model *oprofile_model;
69 };
70
71 extern struct cpu_spec          cpu_specs[];
72 extern struct cpu_spec          *cur_cpu_spec;
73
74 static inline unsigned long cpu_has_feature(unsigned long feature)
75 {
76         return cur_cpu_spec->cpu_features & feature;
77 }
78
79 #endif /* __ASSEMBLY__ */
80
81 /* CPU kernel features */
82
83 /* Retain the 32b definitions for the time being - use bottom half of word */
84 #define CPU_FTR_SPLIT_ID_CACHE          ASM_CONST(0x0000000000000001)
85 #define CPU_FTR_L2CR                    ASM_CONST(0x0000000000000002)
86 #define CPU_FTR_SPEC7450                ASM_CONST(0x0000000000000004)
87 #define CPU_FTR_ALTIVEC                 ASM_CONST(0x0000000000000008)
88 #define CPU_FTR_TAU                     ASM_CONST(0x0000000000000010)
89 #define CPU_FTR_CAN_DOZE                ASM_CONST(0x0000000000000020)
90 #define CPU_FTR_USE_TB                  ASM_CONST(0x0000000000000040)
91 #define CPU_FTR_604_PERF_MON            ASM_CONST(0x0000000000000080)
92 #define CPU_FTR_601                     ASM_CONST(0x0000000000000100)
93 #define CPU_FTR_HPTE_TABLE              ASM_CONST(0x0000000000000200)
94 #define CPU_FTR_CAN_NAP                 ASM_CONST(0x0000000000000400)
95 #define CPU_FTR_L3CR                    ASM_CONST(0x0000000000000800)
96 #define CPU_FTR_L3_DISABLE_NAP          ASM_CONST(0x0000000000001000)
97 #define CPU_FTR_NAP_DISABLE_L2_PR       ASM_CONST(0x0000000000002000)
98 #define CPU_FTR_DUAL_PLL_750FX          ASM_CONST(0x0000000000004000)
99
100 /* Add the 64b processor unique features in the top half of the word */
101 #define CPU_FTR_SLB                     ASM_CONST(0x0000000100000000)
102 #define CPU_FTR_16M_PAGE                ASM_CONST(0x0000000200000000)
103 #define CPU_FTR_TLBIEL                  ASM_CONST(0x0000000400000000)
104 #define CPU_FTR_NOEXECUTE               ASM_CONST(0x0000000800000000)
105 #define CPU_FTR_NODSISRALIGN            ASM_CONST(0x0000001000000000)
106 #define CPU_FTR_IABR                    ASM_CONST(0x0000002000000000)
107 #define CPU_FTR_MMCRA                   ASM_CONST(0x0000004000000000)
108 /* unused                               ASM_CONST(0x0000008000000000) */
109 #define CPU_FTR_SMT                     ASM_CONST(0x0000010000000000)
110 #define CPU_FTR_COHERENT_ICACHE         ASM_CONST(0x0000020000000000)
111 #define CPU_FTR_LOCKLESS_TLBIE          ASM_CONST(0x0000040000000000)
112 #define CPU_FTR_MMCRA_SIHV              ASM_CONST(0x0000080000000000)
113 #define CPU_FTR_CTRL                    ASM_CONST(0x0000100000000000)
114
115 #ifndef __ASSEMBLY__
116
117 #define COMMON_USER_PPC64       (PPC_FEATURE_32 | PPC_FEATURE_64 | \
118                                  PPC_FEATURE_HAS_FPU | PPC_FEATURE_HAS_MMU)
119
120 #define CPU_FTR_PPCAS_ARCH_V2_BASE (CPU_FTR_SLB | \
121                                  CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \
122                                  CPU_FTR_NODSISRALIGN | CPU_FTR_CTRL)
123
124 /* iSeries doesn't support large pages */
125 #ifdef CONFIG_PPC_ISERIES
126 #define CPU_FTR_PPCAS_ARCH_V2   (CPU_FTR_PPCAS_ARCH_V2_BASE)
127 #else
128 #define CPU_FTR_PPCAS_ARCH_V2   (CPU_FTR_PPCAS_ARCH_V2_BASE | CPU_FTR_16M_PAGE)
129 #endif /* CONFIG_PPC_ISERIES */
130
131 #endif /* __ASSEMBLY */
132
133 #ifdef __ASSEMBLY__
134
135 #define BEGIN_FTR_SECTION               98:
136
137 #define END_FTR_SECTION(msk, val)               \
138 99:                                             \
139         .section __ftr_fixup,"a";               \
140         .align 3;                               \
141         .llong msk;                             \
142         .llong val;                             \
143         .llong 98b;                             \
144         .llong 99b;                             \
145         .previous
146
147 #else
148
149 #define BEGIN_FTR_SECTION               "98:\n"
150 #define END_FTR_SECTION(msk, val)               \
151 "99:\n"                                         \
152 "       .section __ftr_fixup,\"a\";\n"          \
153 "       .align 3;\n"                            \
154 "       .llong "#msk";\n"                       \
155 "       .llong "#val";\n"                       \
156 "       .llong 98b;\n"                          \
157 "       .llong 99b;\n"                          \
158 "       .previous\n"
159
160 #endif /* __ASSEMBLY__ */
161
162 #define END_FTR_SECTION_IFSET(msk)      END_FTR_SECTION((msk), (msk))
163 #define END_FTR_SECTION_IFCLR(msk)      END_FTR_SECTION((msk), 0)
164
165 #endif /* __ASM_PPC_CPUTABLE_H */
166 #endif /* __KERNEL__ */
167