[POWERPC] ps3: don't call ps3_system_bus_driver_register on other platforms
[linux-2.6.git] / drivers / usb / host / ohci-hcd.c
1 /*
2  * OHCI HCD (Host Controller Driver) for USB.
3  *
4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
6  *
7  * [ Initialisation is based on Linus'  ]
8  * [ uhci code and gregs ohci fragments ]
9  * [ (C) Copyright 1999 Linus Torvalds  ]
10  * [ (C) Copyright 1999 Gregory P. Smith]
11  *
12  *
13  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14  * interfaces (though some non-x86 Intel chips use it).  It supports
15  * smarter hardware than UHCI.  A download link for the spec available
16  * through the http://www.usb.org website.
17  *
18  * This file is licenced under the GPL.
19  */
20
21 #include <linux/module.h>
22 #include <linux/moduleparam.h>
23 #include <linux/pci.h>
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/ioport.h>
27 #include <linux/sched.h>
28 #include <linux/slab.h>
29 #include <linux/smp_lock.h>
30 #include <linux/errno.h>
31 #include <linux/init.h>
32 #include <linux/timer.h>
33 #include <linux/list.h>
34 #include <linux/usb.h>
35 #include <linux/usb/otg.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/dmapool.h>
38 #include <linux/reboot.h>
39
40 #include <asm/io.h>
41 #include <asm/irq.h>
42 #include <asm/system.h>
43 #include <asm/unaligned.h>
44 #include <asm/byteorder.h>
45 #ifdef CONFIG_PPC_PS3
46 #include <asm/firmware.h>
47 #endif
48
49 #include "../core/hcd.h"
50
51 #define DRIVER_VERSION "2006 August 04"
52 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
53 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
54
55 /*-------------------------------------------------------------------------*/
56
57 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
58
59 /* For initializing controller (mask in an HCFS mode too) */
60 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
61 #define OHCI_INTR_INIT \
62                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
63                 | OHCI_INTR_RD | OHCI_INTR_WDH)
64
65 #ifdef __hppa__
66 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
67 #define IR_DISABLE
68 #endif
69
70 #ifdef CONFIG_ARCH_OMAP
71 /* OMAP doesn't support IR (no SMM; not needed) */
72 #define IR_DISABLE
73 #endif
74
75 /*-------------------------------------------------------------------------*/
76
77 static const char       hcd_name [] = "ohci_hcd";
78
79 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
80
81 #include "ohci.h"
82
83 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
84 static int ohci_init (struct ohci_hcd *ohci);
85 static void ohci_stop (struct usb_hcd *hcd);
86
87 #include "ohci-hub.c"
88 #include "ohci-dbg.c"
89 #include "ohci-mem.c"
90 #include "ohci-q.c"
91
92
93 /*
94  * On architectures with edge-triggered interrupts we must never return
95  * IRQ_NONE.
96  */
97 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
98 #define IRQ_NOTMINE     IRQ_HANDLED
99 #else
100 #define IRQ_NOTMINE     IRQ_NONE
101 #endif
102
103
104 /* Some boards misreport power switching/overcurrent */
105 static int distrust_firmware = 1;
106 module_param (distrust_firmware, bool, 0);
107 MODULE_PARM_DESC (distrust_firmware,
108         "true to distrust firmware power/overcurrent setup");
109
110 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
111 static int no_handshake = 0;
112 module_param (no_handshake, bool, 0);
113 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
114
115 /*-------------------------------------------------------------------------*/
116
117 /*
118  * queue up an urb for anything except the root hub
119  */
120 static int ohci_urb_enqueue (
121         struct usb_hcd  *hcd,
122         struct usb_host_endpoint *ep,
123         struct urb      *urb,
124         gfp_t           mem_flags
125 ) {
126         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
127         struct ed       *ed;
128         urb_priv_t      *urb_priv;
129         unsigned int    pipe = urb->pipe;
130         int             i, size = 0;
131         unsigned long   flags;
132         int             retval = 0;
133
134 #ifdef OHCI_VERBOSE_DEBUG
135         urb_print (urb, "SUB", usb_pipein (pipe));
136 #endif
137
138         /* every endpoint has a ed, locate and maybe (re)initialize it */
139         if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
140                 return -ENOMEM;
141
142         /* for the private part of the URB we need the number of TDs (size) */
143         switch (ed->type) {
144                 case PIPE_CONTROL:
145                         /* td_submit_urb() doesn't yet handle these */
146                         if (urb->transfer_buffer_length > 4096)
147                                 return -EMSGSIZE;
148
149                         /* 1 TD for setup, 1 for ACK, plus ... */
150                         size = 2;
151                         /* FALLTHROUGH */
152                 // case PIPE_INTERRUPT:
153                 // case PIPE_BULK:
154                 default:
155                         /* one TD for every 4096 Bytes (can be upto 8K) */
156                         size += urb->transfer_buffer_length / 4096;
157                         /* ... and for any remaining bytes ... */
158                         if ((urb->transfer_buffer_length % 4096) != 0)
159                                 size++;
160                         /* ... and maybe a zero length packet to wrap it up */
161                         if (size == 0)
162                                 size++;
163                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
164                                 && (urb->transfer_buffer_length
165                                         % usb_maxpacket (urb->dev, pipe,
166                                                 usb_pipeout (pipe))) == 0)
167                                 size++;
168                         break;
169                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
170                         size = urb->number_of_packets;
171                         break;
172         }
173
174         /* allocate the private part of the URB */
175         urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
176                         mem_flags);
177         if (!urb_priv)
178                 return -ENOMEM;
179         memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
180         INIT_LIST_HEAD (&urb_priv->pending);
181         urb_priv->length = size;
182         urb_priv->ed = ed;
183
184         /* allocate the TDs (deferring hash chain updates) */
185         for (i = 0; i < size; i++) {
186                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
187                 if (!urb_priv->td [i]) {
188                         urb_priv->length = i;
189                         urb_free_priv (ohci, urb_priv);
190                         return -ENOMEM;
191                 }
192         }
193
194         spin_lock_irqsave (&ohci->lock, flags);
195
196         /* don't submit to a dead HC */
197         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
198                 retval = -ENODEV;
199                 goto fail;
200         }
201         if (!HC_IS_RUNNING(hcd->state)) {
202                 retval = -ENODEV;
203                 goto fail;
204         }
205
206         /* in case of unlink-during-submit */
207         spin_lock (&urb->lock);
208         if (urb->status != -EINPROGRESS) {
209                 spin_unlock (&urb->lock);
210                 urb->hcpriv = urb_priv;
211                 finish_urb (ohci, urb);
212                 retval = 0;
213                 goto fail;
214         }
215
216         /* schedule the ed if needed */
217         if (ed->state == ED_IDLE) {
218                 retval = ed_schedule (ohci, ed);
219                 if (retval < 0)
220                         goto fail0;
221                 if (ed->type == PIPE_ISOCHRONOUS) {
222                         u16     frame = ohci_frame_no(ohci);
223
224                         /* delay a few frames before the first TD */
225                         frame += max_t (u16, 8, ed->interval);
226                         frame &= ~(ed->interval - 1);
227                         frame |= ed->branch;
228                         urb->start_frame = frame;
229
230                         /* yes, only URB_ISO_ASAP is supported, and
231                          * urb->start_frame is never used as input.
232                          */
233                 }
234         } else if (ed->type == PIPE_ISOCHRONOUS)
235                 urb->start_frame = ed->last_iso + ed->interval;
236
237         /* fill the TDs and link them to the ed; and
238          * enable that part of the schedule, if needed
239          * and update count of queued periodic urbs
240          */
241         urb->hcpriv = urb_priv;
242         td_submit_urb (ohci, urb);
243
244 fail0:
245         spin_unlock (&urb->lock);
246 fail:
247         if (retval)
248                 urb_free_priv (ohci, urb_priv);
249         spin_unlock_irqrestore (&ohci->lock, flags);
250         return retval;
251 }
252
253 /*
254  * decouple the URB from the HC queues (TDs, urb_priv); it's
255  * already marked using urb->status.  reporting is always done
256  * asynchronously, and we might be dealing with an urb that's
257  * partially transferred, or an ED with other urbs being unlinked.
258  */
259 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
260 {
261         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
262         unsigned long           flags;
263
264 #ifdef OHCI_VERBOSE_DEBUG
265         urb_print (urb, "UNLINK", 1);
266 #endif
267
268         spin_lock_irqsave (&ohci->lock, flags);
269         if (HC_IS_RUNNING(hcd->state)) {
270                 urb_priv_t  *urb_priv;
271
272                 /* Unless an IRQ completed the unlink while it was being
273                  * handed to us, flag it for unlink and giveback, and force
274                  * some upcoming INTR_SF to call finish_unlinks()
275                  */
276                 urb_priv = urb->hcpriv;
277                 if (urb_priv) {
278                         if (urb_priv->ed->state == ED_OPER)
279                                 start_ed_unlink (ohci, urb_priv->ed);
280                 }
281         } else {
282                 /*
283                  * with HC dead, we won't respect hc queue pointers
284                  * any more ... just clean up every urb's memory.
285                  */
286                 if (urb->hcpriv)
287                         finish_urb (ohci, urb);
288         }
289         spin_unlock_irqrestore (&ohci->lock, flags);
290         return 0;
291 }
292
293 /*-------------------------------------------------------------------------*/
294
295 /* frees config/altsetting state for endpoints,
296  * including ED memory, dummy TD, and bulk/intr data toggle
297  */
298
299 static void
300 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
301 {
302         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
303         unsigned long           flags;
304         struct ed               *ed = ep->hcpriv;
305         unsigned                limit = 1000;
306
307         /* ASSERT:  any requests/urbs are being unlinked */
308         /* ASSERT:  nobody can be submitting urbs for this any more */
309
310         if (!ed)
311                 return;
312
313 rescan:
314         spin_lock_irqsave (&ohci->lock, flags);
315
316         if (!HC_IS_RUNNING (hcd->state)) {
317 sanitize:
318                 ed->state = ED_IDLE;
319                 finish_unlinks (ohci, 0);
320         }
321
322         switch (ed->state) {
323         case ED_UNLINK:         /* wait for hw to finish? */
324                 /* major IRQ delivery trouble loses INTR_SF too... */
325                 if (limit-- == 0) {
326                         ohci_warn (ohci, "IRQ INTR_SF lossage\n");
327                         goto sanitize;
328                 }
329                 spin_unlock_irqrestore (&ohci->lock, flags);
330                 schedule_timeout_uninterruptible(1);
331                 goto rescan;
332         case ED_IDLE:           /* fully unlinked */
333                 if (list_empty (&ed->td_list)) {
334                         td_free (ohci, ed->dummy);
335                         ed_free (ohci, ed);
336                         break;
337                 }
338                 /* else FALL THROUGH */
339         default:
340                 /* caller was supposed to have unlinked any requests;
341                  * that's not our job.  can't recover; must leak ed.
342                  */
343                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
344                         ed, ep->desc.bEndpointAddress, ed->state,
345                         list_empty (&ed->td_list) ? "" : " (has tds)");
346                 td_free (ohci, ed->dummy);
347                 break;
348         }
349         ep->hcpriv = NULL;
350         spin_unlock_irqrestore (&ohci->lock, flags);
351         return;
352 }
353
354 static int ohci_get_frame (struct usb_hcd *hcd)
355 {
356         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
357
358         return ohci_frame_no(ohci);
359 }
360
361 static void ohci_usb_reset (struct ohci_hcd *ohci)
362 {
363         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
364         ohci->hc_control &= OHCI_CTRL_RWC;
365         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
366 }
367
368 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
369  * other cases where the next software may expect clean state from the
370  * "firmware".  this is bus-neutral, unlike shutdown() methods.
371  */
372 static void
373 ohci_shutdown (struct usb_hcd *hcd)
374 {
375         struct ohci_hcd *ohci;
376
377         ohci = hcd_to_ohci (hcd);
378         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
379         ohci_usb_reset (ohci);
380         /* flush the writes */
381         (void) ohci_readl (ohci, &ohci->regs->control);
382 }
383
384 /*-------------------------------------------------------------------------*
385  * HC functions
386  *-------------------------------------------------------------------------*/
387
388 /* init memory, and kick BIOS/SMM off */
389
390 static int ohci_init (struct ohci_hcd *ohci)
391 {
392         int ret;
393         struct usb_hcd *hcd = ohci_to_hcd(ohci);
394
395         disable (ohci);
396         ohci->regs = hcd->regs;
397
398         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
399          * was never needed for most non-PCI systems ... remove the code?
400          */
401
402 #ifndef IR_DISABLE
403         /* SMM owns the HC?  not for long! */
404         if (!no_handshake && ohci_readl (ohci,
405                                         &ohci->regs->control) & OHCI_CTRL_IR) {
406                 u32 temp;
407
408                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
409
410                 /* this timeout is arbitrary.  we make it long, so systems
411                  * depending on usb keyboards may be usable even if the
412                  * BIOS/SMM code seems pretty broken.
413                  */
414                 temp = 500;     /* arbitrary: five seconds */
415
416                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
417                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
418                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
419                         msleep (10);
420                         if (--temp == 0) {
421                                 ohci_err (ohci, "USB HC takeover failed!"
422                                         "  (BIOS/SMM bug)\n");
423                                 return -EBUSY;
424                         }
425                 }
426                 ohci_usb_reset (ohci);
427         }
428 #endif
429
430         /* Disable HC interrupts */
431         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
432
433         /* flush the writes, and save key bits like RWC */
434         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
435                 ohci->hc_control |= OHCI_CTRL_RWC;
436
437         /* Read the number of ports unless overridden */
438         if (ohci->num_ports == 0)
439                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
440
441         if (ohci->hcca)
442                 return 0;
443
444         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
445                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
446         if (!ohci->hcca)
447                 return -ENOMEM;
448
449         if ((ret = ohci_mem_init (ohci)) < 0)
450                 ohci_stop (hcd);
451         else {
452                 create_debug_files (ohci);
453         }
454
455         return ret;
456 }
457
458 /*-------------------------------------------------------------------------*/
459
460 /* Start an OHCI controller, set the BUS operational
461  * resets USB and controller
462  * enable interrupts
463  */
464 static int ohci_run (struct ohci_hcd *ohci)
465 {
466         u32                     mask, temp;
467         int                     first = ohci->fminterval == 0;
468         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
469
470         disable (ohci);
471
472         /* boot firmware should have set this up (5.1.1.3.1) */
473         if (first) {
474
475                 temp = ohci_readl (ohci, &ohci->regs->fminterval);
476                 ohci->fminterval = temp & 0x3fff;
477                 if (ohci->fminterval != FI)
478                         ohci_dbg (ohci, "fminterval delta %d\n",
479                                 ohci->fminterval - FI);
480                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
481                 /* also: power/overcurrent flags in roothub.a */
482         }
483
484         /* Reset USB nearly "by the book".  RemoteWakeupConnected was
485          * saved if boot firmware (BIOS/SMM/...) told us it's connected,
486          * or if bus glue did the same (e.g. for PCI add-in cards with
487          * PCI PM support).
488          */
489         ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n",
490                         hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
491                         ohci_readl (ohci, &ohci->regs->control));
492         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
493                         && !device_may_wakeup(hcd->self.controller))
494                 device_init_wakeup(hcd->self.controller, 1);
495
496         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
497         case OHCI_USB_OPER:
498                 temp = 0;
499                 break;
500         case OHCI_USB_SUSPEND:
501         case OHCI_USB_RESUME:
502                 ohci->hc_control &= OHCI_CTRL_RWC;
503                 ohci->hc_control |= OHCI_USB_RESUME;
504                 temp = 10 /* msec wait */;
505                 break;
506         // case OHCI_USB_RESET:
507         default:
508                 ohci->hc_control &= OHCI_CTRL_RWC;
509                 ohci->hc_control |= OHCI_USB_RESET;
510                 temp = 50 /* msec wait */;
511                 break;
512         }
513         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
514         // flush the writes
515         (void) ohci_readl (ohci, &ohci->regs->control);
516         msleep(temp);
517         temp = roothub_a (ohci);
518         if (!(temp & RH_A_NPS)) {
519                 /* power down each port */
520                 for (temp = 0; temp < ohci->num_ports; temp++)
521                         ohci_writel (ohci, RH_PS_LSDA,
522                                 &ohci->regs->roothub.portstatus [temp]);
523         }
524         // flush those writes
525         (void) ohci_readl (ohci, &ohci->regs->control);
526         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
527
528         /* 2msec timelimit here means no irqs/preempt */
529         spin_lock_irq (&ohci->lock);
530
531 retry:
532         /* HC Reset requires max 10 us delay */
533         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
534         temp = 30;      /* ... allow extra time */
535         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
536                 if (--temp == 0) {
537                         spin_unlock_irq (&ohci->lock);
538                         ohci_err (ohci, "USB HC reset timed out!\n");
539                         return -1;
540                 }
541                 udelay (1);
542         }
543
544         /* now we're in the SUSPEND state ... must go OPERATIONAL
545          * within 2msec else HC enters RESUME
546          *
547          * ... but some hardware won't init fmInterval "by the book"
548          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
549          * this if we write fmInterval after we're OPERATIONAL.
550          * Unclear about ALi, ServerWorks, and others ... this could
551          * easily be a longstanding bug in chip init on Linux.
552          */
553         if (ohci->flags & OHCI_QUIRK_INITRESET) {
554                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
555                 // flush those writes
556                 (void) ohci_readl (ohci, &ohci->regs->control);
557         }
558
559         /* Tell the controller where the control and bulk lists are
560          * The lists are empty now. */
561         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
562         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
563
564         /* a reset clears this */
565         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
566
567         periodic_reinit (ohci);
568
569         /* some OHCI implementations are finicky about how they init.
570          * bogus values here mean not even enumeration could work.
571          */
572         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
573                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
574                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
575                         ohci->flags |= OHCI_QUIRK_INITRESET;
576                         ohci_dbg (ohci, "enabling initreset quirk\n");
577                         goto retry;
578                 }
579                 spin_unlock_irq (&ohci->lock);
580                 ohci_err (ohci, "init err (%08x %04x)\n",
581                         ohci_readl (ohci, &ohci->regs->fminterval),
582                         ohci_readl (ohci, &ohci->regs->periodicstart));
583                 return -EOVERFLOW;
584         }
585
586         /* use rhsc irqs after khubd is fully initialized */
587         hcd->poll_rh = 1;
588         hcd->uses_new_polling = 1;
589
590         /* start controller operations */
591         ohci->hc_control &= OHCI_CTRL_RWC;
592         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
593         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
594         hcd->state = HC_STATE_RUNNING;
595
596         /* wake on ConnectStatusChange, matching external hubs */
597         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
598
599         /* Choose the interrupts we care about now, others later on demand */
600         mask = OHCI_INTR_INIT;
601         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
602         ohci_writel (ohci, mask, &ohci->regs->intrenable);
603
604         /* handle root hub init quirks ... */
605         temp = roothub_a (ohci);
606         temp &= ~(RH_A_PSM | RH_A_OCPM);
607         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
608                 /* NSC 87560 and maybe others */
609                 temp |= RH_A_NOCP;
610                 temp &= ~(RH_A_POTPGT | RH_A_NPS);
611                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
612         } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
613                 /* hub power always on; required for AMD-756 and some
614                  * Mac platforms.  ganged overcurrent reporting, if any.
615                  */
616                 temp |= RH_A_NPS;
617                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
618         }
619         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
620         ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
621                                                 &ohci->regs->roothub.b);
622         // flush those writes
623         (void) ohci_readl (ohci, &ohci->regs->control);
624
625         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
626         spin_unlock_irq (&ohci->lock);
627
628         // POTPGT delay is bits 24-31, in 2 ms units.
629         mdelay ((temp >> 23) & 0x1fe);
630         hcd->state = HC_STATE_RUNNING;
631
632         ohci_dump (ohci, 1);
633
634         return 0;
635 }
636
637 /*-------------------------------------------------------------------------*/
638
639 /* an interrupt happens */
640
641 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
642 {
643         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
644         struct ohci_regs __iomem *regs = ohci->regs;
645         int                     ints; 
646
647         /* we can eliminate a (slow) ohci_readl()
648            if _only_ WDH caused this irq */
649         if ((ohci->hcca->done_head != 0)
650                         && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
651                                 & 0x01)) {
652                 ints =  OHCI_INTR_WDH;
653
654         /* cardbus/... hardware gone before remove() */
655         } else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
656                 disable (ohci);
657                 ohci_dbg (ohci, "device removed!\n");
658                 return IRQ_HANDLED;
659
660         /* interrupt for some other device? */
661         } else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
662                 return IRQ_NOTMINE;
663         }
664
665         if (ints & OHCI_INTR_UE) {
666                 disable (ohci);
667                 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
668                 // e.g. due to PCI Master/Target Abort
669
670                 ohci_dump (ohci, 1);
671                 ohci_usb_reset (ohci);
672         }
673
674         if (ints & OHCI_INTR_RHSC) {
675                 ohci_vdbg(ohci, "rhsc\n");
676                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
677                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
678                                 &regs->intrstatus);
679
680                 /* NOTE: Vendors didn't always make the same implementation
681                  * choices for RHSC.  Many followed the spec; RHSC triggers
682                  * on an edge, like setting and maybe clearing a port status
683                  * change bit.  With others it's level-triggered, active
684                  * until khubd clears all the port status change bits.  We'll
685                  * always disable it here and rely on polling until khubd
686                  * re-enables it.
687                  */
688                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
689                 usb_hcd_poll_rh_status(hcd);
690         }
691
692         /* For connect and disconnect events, we expect the controller
693          * to turn on RHSC along with RD.  But for remote wakeup events
694          * this might not happen.
695          */
696         else if (ints & OHCI_INTR_RD) {
697                 ohci_vdbg(ohci, "resume detect\n");
698                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
699                 hcd->poll_rh = 1;
700                 if (ohci->autostop) {
701                         spin_lock (&ohci->lock);
702                         ohci_rh_resume (ohci);
703                         spin_unlock (&ohci->lock);
704                 } else
705                         usb_hcd_resume_root_hub(hcd);
706         }
707
708         if (ints & OHCI_INTR_WDH) {
709                 if (HC_IS_RUNNING(hcd->state))
710                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrdisable);
711                 spin_lock (&ohci->lock);
712                 dl_done_list (ohci);
713                 spin_unlock (&ohci->lock);
714                 if (HC_IS_RUNNING(hcd->state))
715                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable);
716         }
717
718         /* could track INTR_SO to reduce available PCI/... bandwidth */
719
720         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
721          * when there's still unlinking to be done (next frame).
722          */
723         spin_lock (&ohci->lock);
724         if (ohci->ed_rm_list)
725                 finish_unlinks (ohci, ohci_frame_no(ohci));
726         if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
727                         && HC_IS_RUNNING(hcd->state))
728                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
729         spin_unlock (&ohci->lock);
730
731         if (HC_IS_RUNNING(hcd->state)) {
732                 ohci_writel (ohci, ints, &regs->intrstatus);
733                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
734                 // flush those writes
735                 (void) ohci_readl (ohci, &ohci->regs->control);
736         }
737
738         return IRQ_HANDLED;
739 }
740
741 /*-------------------------------------------------------------------------*/
742
743 static void ohci_stop (struct usb_hcd *hcd)
744 {
745         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
746
747         ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
748                 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
749                 hcd->state);
750         ohci_dump (ohci, 1);
751
752         flush_scheduled_work();
753
754         ohci_usb_reset (ohci);
755         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
756         free_irq(hcd->irq, hcd);
757         hcd->irq = -1;
758
759         remove_debug_files (ohci);
760         ohci_mem_cleanup (ohci);
761         if (ohci->hcca) {
762                 dma_free_coherent (hcd->self.controller,
763                                 sizeof *ohci->hcca,
764                                 ohci->hcca, ohci->hcca_dma);
765                 ohci->hcca = NULL;
766                 ohci->hcca_dma = 0;
767         }
768 }
769
770 /*-------------------------------------------------------------------------*/
771
772 /* must not be called from interrupt context */
773
774 #ifdef  CONFIG_PM
775
776 static int ohci_restart (struct ohci_hcd *ohci)
777 {
778         int temp;
779         int i;
780         struct urb_priv *priv;
781
782         /* mark any devices gone, so they do nothing till khubd disconnects.
783          * recycle any "live" eds/tds (and urbs) right away.
784          * later, khubd disconnect processing will recycle the other state,
785          * (either as disconnect/reconnect, or maybe someday as a reset).
786          */
787         spin_lock_irq(&ohci->lock);
788         disable (ohci);
789         usb_root_hub_lost_power(ohci_to_hcd(ohci)->self.root_hub);
790         if (!list_empty (&ohci->pending))
791                 ohci_dbg(ohci, "abort schedule...\n");
792         list_for_each_entry (priv, &ohci->pending, pending) {
793                 struct urb      *urb = priv->td[0]->urb;
794                 struct ed       *ed = priv->ed;
795
796                 switch (ed->state) {
797                 case ED_OPER:
798                         ed->state = ED_UNLINK;
799                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
800                         ed_deschedule (ohci, ed);
801
802                         ed->ed_next = ohci->ed_rm_list;
803                         ed->ed_prev = NULL;
804                         ohci->ed_rm_list = ed;
805                         /* FALLTHROUGH */
806                 case ED_UNLINK:
807                         break;
808                 default:
809                         ohci_dbg(ohci, "bogus ed %p state %d\n",
810                                         ed, ed->state);
811                 }
812
813                 spin_lock (&urb->lock);
814                 urb->status = -ESHUTDOWN;
815                 spin_unlock (&urb->lock);
816         }
817         finish_unlinks (ohci, 0);
818         spin_unlock_irq(&ohci->lock);
819
820         /* paranoia, in case that didn't work: */
821
822         /* empty the interrupt branches */
823         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
824         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
825
826         /* no EDs to remove */
827         ohci->ed_rm_list = NULL;
828
829         /* empty control and bulk lists */
830         ohci->ed_controltail = NULL;
831         ohci->ed_bulktail    = NULL;
832
833         if ((temp = ohci_run (ohci)) < 0) {
834                 ohci_err (ohci, "can't restart, %d\n", temp);
835                 return temp;
836         } else {
837                 /* here we "know" root ports should always stay powered,
838                  * and that if we try to turn them back on the root hub
839                  * will respond to CSC processing.
840                  */
841                 i = ohci->num_ports;
842                 while (i--)
843                         ohci_writel (ohci, RH_PS_PSS,
844                                 &ohci->regs->roothub.portstatus [i]);
845                 ohci_dbg (ohci, "restart complete\n");
846         }
847         return 0;
848 }
849 #endif
850
851 /*-------------------------------------------------------------------------*/
852
853 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
854
855 MODULE_AUTHOR (DRIVER_AUTHOR);
856 MODULE_DESCRIPTION (DRIVER_INFO);
857 MODULE_LICENSE ("GPL");
858
859 #ifdef CONFIG_PCI
860 #include "ohci-pci.c"
861 #define PCI_DRIVER              ohci_pci_driver
862 #endif
863
864 #ifdef CONFIG_SA1111
865 #include "ohci-sa1111.c"
866 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
867 #endif
868
869 #ifdef CONFIG_ARCH_S3C2410
870 #include "ohci-s3c2410.c"
871 #define PLATFORM_DRIVER         ohci_hcd_s3c2410_driver
872 #endif
873
874 #ifdef CONFIG_ARCH_OMAP
875 #include "ohci-omap.c"
876 #define PLATFORM_DRIVER         ohci_hcd_omap_driver
877 #endif
878
879 #ifdef CONFIG_ARCH_LH7A404
880 #include "ohci-lh7a404.c"
881 #define PLATFORM_DRIVER         ohci_hcd_lh7a404_driver
882 #endif
883
884 #ifdef CONFIG_PXA27x
885 #include "ohci-pxa27x.c"
886 #define PLATFORM_DRIVER         ohci_hcd_pxa27x_driver
887 #endif
888
889 #ifdef CONFIG_ARCH_EP93XX
890 #include "ohci-ep93xx.c"
891 #define PLATFORM_DRIVER         ohci_hcd_ep93xx_driver
892 #endif
893
894 #ifdef CONFIG_SOC_AU1X00
895 #include "ohci-au1xxx.c"
896 #define PLATFORM_DRIVER         ohci_hcd_au1xxx_driver
897 #endif
898
899 #ifdef CONFIG_PNX8550
900 #include "ohci-pnx8550.c"
901 #define PLATFORM_DRIVER         ohci_hcd_pnx8550_driver
902 #endif
903
904 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
905 #include "ohci-ppc-soc.c"
906 #define PLATFORM_DRIVER         ohci_hcd_ppc_soc_driver
907 #endif
908
909 #ifdef CONFIG_ARCH_AT91
910 #include "ohci-at91.c"
911 #define PLATFORM_DRIVER         ohci_hcd_at91_driver
912 #endif
913
914 #ifdef CONFIG_ARCH_PNX4008
915 #include "ohci-pnx4008.c"
916 #define PLATFORM_DRIVER         usb_hcd_pnx4008_driver
917 #endif
918
919
920 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
921 #include "ohci-ppc-of.c"
922 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
923 #endif
924
925 #ifdef CONFIG_PPC_PS3
926 #include "ohci-ps3.c"
927 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_sb_driver
928 #endif
929
930 #if     !defined(PCI_DRIVER) &&         \
931         !defined(PLATFORM_DRIVER) &&    \
932         !defined(OF_PLATFORM_DRIVER) && \
933         !defined(SA1111_DRIVER) &&      \
934         !defined(PS3_SYSTEM_BUS_DRIVER)
935 #error "missing bus glue for ohci-hcd"
936 #endif
937
938 static int __init ohci_hcd_mod_init(void)
939 {
940         int retval = 0;
941
942         if (usb_disabled())
943                 return -ENODEV;
944
945         printk (KERN_DEBUG "%s: " DRIVER_INFO "\n", hcd_name);
946         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
947                 sizeof (struct ed), sizeof (struct td));
948
949 #ifdef PS3_SYSTEM_BUS_DRIVER
950         if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
951                 retval = ps3_system_bus_driver_register(
952                                 &PS3_SYSTEM_BUS_DRIVER);
953                 if (retval < 0)
954                         goto error_ps3;
955         }
956 #endif
957
958 #ifdef PLATFORM_DRIVER
959         retval = platform_driver_register(&PLATFORM_DRIVER);
960         if (retval < 0)
961                 goto error_platform;
962 #endif
963
964 #ifdef OF_PLATFORM_DRIVER
965         retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
966         if (retval < 0)
967                 goto error_of_platform;
968 #endif
969
970 #ifdef SA1111_DRIVER
971         retval = sa1111_driver_register(&SA1111_DRIVER);
972         if (retval < 0)
973                 goto error_sa1111;
974 #endif
975
976 #ifdef PCI_DRIVER
977         retval = pci_register_driver(&PCI_DRIVER);
978         if (retval < 0)
979                 goto error_pci;
980 #endif
981
982         return retval;
983
984         /* Error path */
985 #ifdef PCI_DRIVER
986  error_pci:
987 #endif
988 #ifdef SA1111_DRIVER
989         sa1111_driver_unregister(&SA1111_DRIVER);
990  error_sa1111:
991 #endif
992 #ifdef OF_PLATFORM_DRIVER
993         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
994  error_of_platform:
995 #endif
996 #ifdef PLATFORM_DRIVER
997         platform_driver_unregister(&PLATFORM_DRIVER);
998  error_platform:
999 #endif
1000 #ifdef PS3_SYSTEM_BUS_DRIVER
1001         if (firmware_has_feature(FW_FEATURE_PS3_LV1))
1002                 ps3_system_bus_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1003  error_ps3:
1004 #endif
1005         return retval;
1006 }
1007 module_init(ohci_hcd_mod_init);
1008
1009 static void __exit ohci_hcd_mod_exit(void)
1010 {
1011 #ifdef PCI_DRIVER
1012         pci_unregister_driver(&PCI_DRIVER);
1013 #endif
1014 #ifdef SA1111_DRIVER
1015         sa1111_driver_unregister(&SA1111_DRIVER);
1016 #endif
1017 #ifdef OF_PLATFORM_DRIVER
1018         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1019 #endif
1020 #ifdef PLATFORM_DRIVER
1021         platform_driver_unregister(&PLATFORM_DRIVER);
1022 #endif
1023 #ifdef PS3_SYSTEM_BUS_DRIVER
1024         if (firmware_has_feature(FW_FEATURE_PS3_LV1))
1025                 ps3_system_bus_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1026 #endif
1027 }
1028 module_exit(ohci_hcd_mod_exit);
1029