4f89d7ffd53a23130307ceb7d4af0e27e8c726be
[linux-2.6.git] / drivers / usb / host / ehci-hcd.c
1 /*
2  * Copyright (c) 2000-2004 by David Brownell
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License as published by the
6  * Free Software Foundation; either version 2 of the License, or (at your
7  * option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12  * for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software Foundation,
16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17  */
18
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dmapool.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/vmalloc.h>
28 #include <linux/errno.h>
29 #include <linux/init.h>
30 #include <linux/timer.h>
31 #include <linux/list.h>
32 #include <linux/interrupt.h>
33 #include <linux/usb.h>
34 #include <linux/moduleparam.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/debugfs.h>
37
38 #include "../core/hcd.h"
39
40 #include <asm/byteorder.h>
41 #include <asm/io.h>
42 #include <asm/irq.h>
43 #include <asm/system.h>
44 #include <asm/unaligned.h>
45
46 /*-------------------------------------------------------------------------*/
47
48 /*
49  * EHCI hc_driver implementation ... experimental, incomplete.
50  * Based on the final 1.0 register interface specification.
51  *
52  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
53  * First was PCMCIA, like ISA; then CardBus, which is PCI.
54  * Next comes "CardBay", using USB 2.0 signals.
55  *
56  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
57  * Special thanks to Intel and VIA for providing host controllers to
58  * test this driver on, and Cypress (including In-System Design) for
59  * providing early devices for those host controllers to talk to!
60  */
61
62 #define DRIVER_AUTHOR "David Brownell"
63 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
64
65 static const char       hcd_name [] = "ehci_hcd";
66
67
68 #undef VERBOSE_DEBUG
69 #undef EHCI_URB_TRACE
70
71 #ifdef DEBUG
72 #define EHCI_STATS
73 #endif
74
75 /* magic numbers that can affect system performance */
76 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
77 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
78 #define EHCI_TUNE_RL_TT         0
79 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
80 #define EHCI_TUNE_MULT_TT       1
81 #define EHCI_TUNE_FLS           2       /* (small) 256 frame schedule */
82
83 #define EHCI_IAA_MSECS          10              /* arbitrary */
84 #define EHCI_IO_JIFFIES         (HZ/10)         /* io watchdog > irq_thresh */
85 #define EHCI_ASYNC_JIFFIES      (HZ/20)         /* async idle timeout */
86 #define EHCI_SHRINK_FRAMES      5               /* async qh unlink delay */
87
88 /* Initial IRQ latency:  faster than hw default */
89 static int log2_irq_thresh = 0;         // 0 to 6
90 module_param (log2_irq_thresh, int, S_IRUGO);
91 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
92
93 /* initial park setting:  slower than hw default */
94 static unsigned park = 0;
95 module_param (park, uint, S_IRUGO);
96 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
97
98 /* for flakey hardware, ignore overcurrent indicators */
99 static int ignore_oc = 0;
100 module_param (ignore_oc, bool, S_IRUGO);
101 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
102
103 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
104
105 /*-------------------------------------------------------------------------*/
106
107 #include "ehci.h"
108 #include "ehci-dbg.c"
109
110 /*-------------------------------------------------------------------------*/
111
112 static void
113 timer_action(struct ehci_hcd *ehci, enum ehci_timer_action action)
114 {
115         /* Don't override timeouts which shrink or (later) disable
116          * the async ring; just the I/O watchdog.  Note that if a
117          * SHRINK were pending, OFF would never be requested.
118          */
119         if (timer_pending(&ehci->watchdog)
120                         && ((BIT(TIMER_ASYNC_SHRINK) | BIT(TIMER_ASYNC_OFF))
121                                 & ehci->actions))
122                 return;
123
124         if (!test_and_set_bit(action, &ehci->actions)) {
125                 unsigned long t;
126
127                 switch (action) {
128                 case TIMER_IO_WATCHDOG:
129                         if (!ehci->need_io_watchdog)
130                                 return;
131                         t = EHCI_IO_JIFFIES;
132                         break;
133                 case TIMER_ASYNC_OFF:
134                         t = EHCI_ASYNC_JIFFIES;
135                         break;
136                 /* case TIMER_ASYNC_SHRINK: */
137                 default:
138                         /* add a jiffie since we synch against the
139                          * 8 KHz uframe counter.
140                          */
141                         t = DIV_ROUND_UP(EHCI_SHRINK_FRAMES * HZ, 1000) + 1;
142                         break;
143                 }
144                 mod_timer(&ehci->watchdog, t + jiffies);
145         }
146 }
147
148 /*-------------------------------------------------------------------------*/
149
150 /*
151  * handshake - spin reading hc until handshake completes or fails
152  * @ptr: address of hc register to be read
153  * @mask: bits to look at in result of read
154  * @done: value of those bits when handshake succeeds
155  * @usec: timeout in microseconds
156  *
157  * Returns negative errno, or zero on success
158  *
159  * Success happens when the "mask" bits have the specified value (hardware
160  * handshake done).  There are two failure modes:  "usec" have passed (major
161  * hardware flakeout), or the register reads as all-ones (hardware removed).
162  *
163  * That last failure should_only happen in cases like physical cardbus eject
164  * before driver shutdown. But it also seems to be caused by bugs in cardbus
165  * bridge shutdown:  shutting down the bridge before the devices using it.
166  */
167 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
168                       u32 mask, u32 done, int usec)
169 {
170         u32     result;
171
172         do {
173                 result = ehci_readl(ehci, ptr);
174                 if (result == ~(u32)0)          /* card removed */
175                         return -ENODEV;
176                 result &= mask;
177                 if (result == done)
178                         return 0;
179                 udelay (1);
180                 usec--;
181         } while (usec > 0);
182         return -ETIMEDOUT;
183 }
184
185 /* force HC to halt state from unknown (EHCI spec section 2.3) */
186 static int ehci_halt (struct ehci_hcd *ehci)
187 {
188         u32     temp = ehci_readl(ehci, &ehci->regs->status);
189
190         /* disable any irqs left enabled by previous code */
191         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
192
193         if ((temp & STS_HALT) != 0)
194                 return 0;
195
196         temp = ehci_readl(ehci, &ehci->regs->command);
197         temp &= ~CMD_RUN;
198         ehci_writel(ehci, temp, &ehci->regs->command);
199         return handshake (ehci, &ehci->regs->status,
200                           STS_HALT, STS_HALT, 16 * 125);
201 }
202
203 static int handshake_on_error_set_halt(struct ehci_hcd *ehci, void __iomem *ptr,
204                                        u32 mask, u32 done, int usec)
205 {
206         int error;
207
208         error = handshake(ehci, ptr, mask, done, usec);
209         if (error) {
210                 ehci_halt(ehci);
211                 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
212                 ehci_err(ehci, "force halt; handhake %p %08x %08x -> %d\n",
213                         ptr, mask, done, error);
214         }
215
216         return error;
217 }
218
219 /* put TDI/ARC silicon into EHCI mode */
220 static void tdi_reset (struct ehci_hcd *ehci)
221 {
222         u32 __iomem     *reg_ptr;
223         u32             tmp;
224
225         reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
226         tmp = ehci_readl(ehci, reg_ptr);
227         tmp |= USBMODE_CM_HC;
228         /* The default byte access to MMR space is LE after
229          * controller reset. Set the required endian mode
230          * for transfer buffers to match the host microprocessor
231          */
232         if (ehci_big_endian_mmio(ehci))
233                 tmp |= USBMODE_BE;
234         ehci_writel(ehci, tmp, reg_ptr);
235 }
236
237 /* reset a non-running (STS_HALT == 1) controller */
238 static int ehci_reset (struct ehci_hcd *ehci)
239 {
240         int     retval;
241         u32     command = ehci_readl(ehci, &ehci->regs->command);
242
243         command |= CMD_RESET;
244         dbg_cmd (ehci, "reset", command);
245         ehci_writel(ehci, command, &ehci->regs->command);
246         ehci_to_hcd(ehci)->state = HC_STATE_HALT;
247         ehci->next_statechange = jiffies;
248         retval = handshake (ehci, &ehci->regs->command,
249                             CMD_RESET, 0, 250 * 1000);
250
251         if (ehci->has_hostpc) {
252                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
253                         (u32 __iomem *)(((u8 *)ehci->regs) + USBMODE_EX));
254                 ehci_writel(ehci, TXFIFO_DEFAULT,
255                         (u32 __iomem *)(((u8 *)ehci->regs) + TXFILLTUNING));
256         }
257         if (retval)
258                 return retval;
259
260         if (ehci_is_TDI(ehci))
261                 tdi_reset (ehci);
262
263         return retval;
264 }
265
266 /* idle the controller (from running) */
267 static void ehci_quiesce (struct ehci_hcd *ehci)
268 {
269         u32     temp;
270
271 #ifdef DEBUG
272         if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
273                 BUG ();
274 #endif
275
276         /* wait for any schedule enables/disables to take effect */
277         temp = ehci_readl(ehci, &ehci->regs->command) << 10;
278         temp &= STS_ASS | STS_PSS;
279         if (handshake_on_error_set_halt(ehci, &ehci->regs->status,
280                                         STS_ASS | STS_PSS, temp, 16 * 125))
281                 return;
282
283         /* then disable anything that's still active */
284         temp = ehci_readl(ehci, &ehci->regs->command);
285         temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
286         ehci_writel(ehci, temp, &ehci->regs->command);
287
288         /* hardware can take 16 microframes to turn off ... */
289         handshake_on_error_set_halt(ehci, &ehci->regs->status,
290                                     STS_ASS | STS_PSS, 0, 16 * 125);
291 }
292
293 /*-------------------------------------------------------------------------*/
294
295 static void end_unlink_async(struct ehci_hcd *ehci);
296 static void ehci_work(struct ehci_hcd *ehci);
297
298 #include "ehci-hub.c"
299 #include "ehci-mem.c"
300 #include "ehci-q.c"
301 #include "ehci-sched.c"
302
303 /*-------------------------------------------------------------------------*/
304
305 static void ehci_iaa_watchdog(unsigned long param)
306 {
307         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
308         unsigned long           flags;
309
310         spin_lock_irqsave (&ehci->lock, flags);
311
312         /* Lost IAA irqs wedge things badly; seen first with a vt8235.
313          * So we need this watchdog, but must protect it against both
314          * (a) SMP races against real IAA firing and retriggering, and
315          * (b) clean HC shutdown, when IAA watchdog was pending.
316          */
317         if (ehci->reclaim
318                         && !timer_pending(&ehci->iaa_watchdog)
319                         && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
320                 u32 cmd, status;
321
322                 /* If we get here, IAA is *REALLY* late.  It's barely
323                  * conceivable that the system is so busy that CMD_IAAD
324                  * is still legitimately set, so let's be sure it's
325                  * clear before we read STS_IAA.  (The HC should clear
326                  * CMD_IAAD when it sets STS_IAA.)
327                  */
328                 cmd = ehci_readl(ehci, &ehci->regs->command);
329                 if (cmd & CMD_IAAD)
330                         ehci_writel(ehci, cmd & ~CMD_IAAD,
331                                         &ehci->regs->command);
332
333                 /* If IAA is set here it either legitimately triggered
334                  * before we cleared IAAD above (but _way_ late, so we'll
335                  * still count it as lost) ... or a silicon erratum:
336                  * - VIA seems to set IAA without triggering the IRQ;
337                  * - IAAD potentially cleared without setting IAA.
338                  */
339                 status = ehci_readl(ehci, &ehci->regs->status);
340                 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
341                         COUNT (ehci->stats.lost_iaa);
342                         ehci_writel(ehci, STS_IAA, &ehci->regs->status);
343                 }
344
345                 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
346                                 status, cmd);
347                 end_unlink_async(ehci);
348         }
349
350         spin_unlock_irqrestore(&ehci->lock, flags);
351 }
352
353 static void ehci_watchdog(unsigned long param)
354 {
355         struct ehci_hcd         *ehci = (struct ehci_hcd *) param;
356         unsigned long           flags;
357
358         spin_lock_irqsave(&ehci->lock, flags);
359
360         /* stop async processing after it's idled a bit */
361         if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
362                 start_unlink_async (ehci, ehci->async);
363
364         /* ehci could run by timer, without IRQs ... */
365         ehci_work (ehci);
366
367         spin_unlock_irqrestore (&ehci->lock, flags);
368 }
369
370 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
371  * The firmware seems to think that powering off is a wakeup event!
372  * This routine turns off remote wakeup and everything else, on all ports.
373  */
374 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
375 {
376         int     port = HCS_N_PORTS(ehci->hcs_params);
377
378         while (port--)
379                 ehci_writel(ehci, PORT_RWC_BITS,
380                                 &ehci->regs->port_status[port]);
381 }
382
383 /*
384  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
385  * Should be called with ehci->lock held.
386  */
387 static void ehci_silence_controller(struct ehci_hcd *ehci)
388 {
389         ehci_halt(ehci);
390         ehci_turn_off_all_ports(ehci);
391
392         /* make BIOS/etc use companion controller during reboot */
393         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
394
395         /* unblock posted writes */
396         ehci_readl(ehci, &ehci->regs->configured_flag);
397 }
398
399 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
400  * This forcibly disables dma and IRQs, helping kexec and other cases
401  * where the next system software may expect clean state.
402  */
403 static void ehci_shutdown(struct usb_hcd *hcd)
404 {
405         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
406
407         del_timer_sync(&ehci->watchdog);
408         del_timer_sync(&ehci->iaa_watchdog);
409
410         spin_lock_irq(&ehci->lock);
411         ehci_silence_controller(ehci);
412         spin_unlock_irq(&ehci->lock);
413 }
414
415 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
416 {
417         unsigned port;
418
419         if (!HCS_PPC (ehci->hcs_params))
420                 return;
421
422         ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
423         for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
424                 (void) ehci_hub_control(ehci_to_hcd(ehci),
425                                 is_on ? SetPortFeature : ClearPortFeature,
426                                 USB_PORT_FEAT_POWER,
427                                 port--, NULL, 0);
428         /* Flush those writes */
429         ehci_readl(ehci, &ehci->regs->command);
430         msleep(20);
431 }
432
433 /*-------------------------------------------------------------------------*/
434
435 /*
436  * ehci_work is called from some interrupts, timers, and so on.
437  * it calls driver completion functions, after dropping ehci->lock.
438  */
439 static void ehci_work (struct ehci_hcd *ehci)
440 {
441         timer_action_done (ehci, TIMER_IO_WATCHDOG);
442
443         /* another CPU may drop ehci->lock during a schedule scan while
444          * it reports urb completions.  this flag guards against bogus
445          * attempts at re-entrant schedule scanning.
446          */
447         if (ehci->scanning)
448                 return;
449         ehci->scanning = 1;
450         scan_async (ehci);
451         if (ehci->next_uframe != -1)
452                 scan_periodic (ehci);
453         ehci->scanning = 0;
454
455         /* the IO watchdog guards against hardware or driver bugs that
456          * misplace IRQs, and should let us run completely without IRQs.
457          * such lossage has been observed on both VT6202 and VT8235.
458          */
459         if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
460                         (ehci->async->qh_next.ptr != NULL ||
461                          ehci->periodic_sched != 0))
462                 timer_action (ehci, TIMER_IO_WATCHDOG);
463 }
464
465 /*
466  * Called when the ehci_hcd module is removed.
467  */
468 static void ehci_stop (struct usb_hcd *hcd)
469 {
470         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
471
472         ehci_dbg (ehci, "stop\n");
473
474         /* no more interrupts ... */
475         del_timer_sync (&ehci->watchdog);
476         del_timer_sync(&ehci->iaa_watchdog);
477
478         spin_lock_irq(&ehci->lock);
479         if (HC_IS_RUNNING (hcd->state))
480                 ehci_quiesce (ehci);
481
482         ehci_silence_controller(ehci);
483         ehci_reset (ehci);
484         spin_unlock_irq(&ehci->lock);
485
486         remove_companion_file(ehci);
487         remove_debug_files (ehci);
488
489         /* root hub is shut down separately (first, when possible) */
490         spin_lock_irq (&ehci->lock);
491         if (ehci->async)
492                 ehci_work (ehci);
493         spin_unlock_irq (&ehci->lock);
494         ehci_mem_cleanup (ehci);
495
496 #ifdef  EHCI_STATS
497         ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
498                 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
499                 ehci->stats.lost_iaa);
500         ehci_dbg (ehci, "complete %ld unlink %ld\n",
501                 ehci->stats.complete, ehci->stats.unlink);
502 #endif
503
504         dbg_status (ehci, "ehci_stop completed",
505                     ehci_readl(ehci, &ehci->regs->status));
506 }
507
508 /* one-time init, only for memory state */
509 static int ehci_init(struct usb_hcd *hcd)
510 {
511         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
512         u32                     temp;
513         int                     retval;
514         u32                     hcc_params;
515         struct ehci_qh_hw       *hw;
516
517         spin_lock_init(&ehci->lock);
518
519         /*
520          * keep io watchdog by default, those good HCDs could turn off it later
521          */
522         ehci->need_io_watchdog = 1;
523         init_timer(&ehci->watchdog);
524         ehci->watchdog.function = ehci_watchdog;
525         ehci->watchdog.data = (unsigned long) ehci;
526
527         init_timer(&ehci->iaa_watchdog);
528         ehci->iaa_watchdog.function = ehci_iaa_watchdog;
529         ehci->iaa_watchdog.data = (unsigned long) ehci;
530
531         /*
532          * hw default: 1K periodic list heads, one per frame.
533          * periodic_size can shrink by USBCMD update if hcc_params allows.
534          */
535         ehci->periodic_size = DEFAULT_I_TDPS;
536         INIT_LIST_HEAD(&ehci->cached_itd_list);
537         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
538                 return retval;
539
540         /* controllers may cache some of the periodic schedule ... */
541         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
542         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
543                 ehci->i_thresh = 8;
544         else                                    // N microframes cached
545                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
546
547         ehci->reclaim = NULL;
548         ehci->next_uframe = -1;
549         ehci->clock_frame = -1;
550
551         /*
552          * dedicate a qh for the async ring head, since we couldn't unlink
553          * a 'real' qh without stopping the async schedule [4.8].  use it
554          * as the 'reclamation list head' too.
555          * its dummy is used in hw_alt_next of many tds, to prevent the qh
556          * from automatically advancing to the next td after short reads.
557          */
558         ehci->async->qh_next.qh = NULL;
559         hw = ehci->async->hw;
560         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
561         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
562         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
563         hw->hw_qtd_next = EHCI_LIST_END(ehci);
564         ehci->async->qh_state = QH_STATE_LINKED;
565         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
566
567         /* clear interrupt enables, set irq latency */
568         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
569                 log2_irq_thresh = 0;
570         temp = 1 << (16 + log2_irq_thresh);
571         if (HCC_CANPARK(hcc_params)) {
572                 /* HW default park == 3, on hardware that supports it (like
573                  * NVidia and ALI silicon), maximizes throughput on the async
574                  * schedule by avoiding QH fetches between transfers.
575                  *
576                  * With fast usb storage devices and NForce2, "park" seems to
577                  * make problems:  throughput reduction (!), data errors...
578                  */
579                 if (park) {
580                         park = min(park, (unsigned) 3);
581                         temp |= CMD_PARK;
582                         temp |= park << 8;
583                 }
584                 ehci_dbg(ehci, "park %d\n", park);
585         }
586         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
587                 /* periodic schedule size can be smaller than default */
588                 temp &= ~(3 << 2);
589                 temp |= (EHCI_TUNE_FLS << 2);
590                 switch (EHCI_TUNE_FLS) {
591                 case 0: ehci->periodic_size = 1024; break;
592                 case 1: ehci->periodic_size = 512; break;
593                 case 2: ehci->periodic_size = 256; break;
594                 default:        BUG();
595                 }
596         }
597         ehci->command = temp;
598
599         return 0;
600 }
601
602 /* start HC running; it's halted, ehci_init() has been run (once) */
603 static int ehci_run (struct usb_hcd *hcd)
604 {
605         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
606         int                     retval;
607         u32                     temp;
608         u32                     hcc_params;
609
610         hcd->uses_new_polling = 1;
611         hcd->poll_rh = 0;
612
613         /* EHCI spec section 4.1 */
614         if ((retval = ehci_reset(ehci)) != 0) {
615                 ehci_mem_cleanup(ehci);
616                 return retval;
617         }
618         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
619         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
620
621         /*
622          * hcc_params controls whether ehci->regs->segment must (!!!)
623          * be used; it constrains QH/ITD/SITD and QTD locations.
624          * pci_pool consistent memory always uses segment zero.
625          * streaming mappings for I/O buffers, like pci_map_single(),
626          * can return segments above 4GB, if the device allows.
627          *
628          * NOTE:  the dma mask is visible through dma_supported(), so
629          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
630          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
631          * host side drivers though.
632          */
633         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
634         if (HCC_64BIT_ADDR(hcc_params)) {
635                 ehci_writel(ehci, 0, &ehci->regs->segment);
636 #if 0
637 // this is deeply broken on almost all architectures
638                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
639                         ehci_info(ehci, "enabled 64bit DMA\n");
640 #endif
641         }
642
643
644         // Philips, Intel, and maybe others need CMD_RUN before the
645         // root hub will detect new devices (why?); NEC doesn't
646         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
647         ehci->command |= CMD_RUN;
648         ehci_writel(ehci, ehci->command, &ehci->regs->command);
649         dbg_cmd (ehci, "init", ehci->command);
650
651         /*
652          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
653          * are explicitly handed to companion controller(s), so no TT is
654          * involved with the root hub.  (Except where one is integrated,
655          * and there's no companion controller unless maybe for USB OTG.)
656          *
657          * Turning on the CF flag will transfer ownership of all ports
658          * from the companions to the EHCI controller.  If any of the
659          * companions are in the middle of a port reset at the time, it
660          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
661          * guarantees that no resets are in progress.  After we set CF,
662          * a short delay lets the hardware catch up; new resets shouldn't
663          * be started before the port switching actions could complete.
664          */
665         down_write(&ehci_cf_port_reset_rwsem);
666         hcd->state = HC_STATE_RUNNING;
667         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
668         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
669         msleep(5);
670         up_write(&ehci_cf_port_reset_rwsem);
671
672         temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
673         ehci_info (ehci,
674                 "USB %x.%x started, EHCI %x.%02x%s\n",
675                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
676                 temp >> 8, temp & 0xff,
677                 ignore_oc ? ", overcurrent ignored" : "");
678
679         ehci_writel(ehci, INTR_MASK,
680                     &ehci->regs->intr_enable); /* Turn On Interrupts */
681
682         /* GRR this is run-once init(), being done every time the HC starts.
683          * So long as they're part of class devices, we can't do it init()
684          * since the class device isn't created that early.
685          */
686         create_debug_files(ehci);
687         create_companion_file(ehci);
688
689         return 0;
690 }
691
692 /*-------------------------------------------------------------------------*/
693
694 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
695 {
696         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
697         u32                     status, masked_status, pcd_status = 0, cmd;
698         int                     bh;
699
700         spin_lock (&ehci->lock);
701
702         status = ehci_readl(ehci, &ehci->regs->status);
703
704         /* e.g. cardbus physical eject */
705         if (status == ~(u32) 0) {
706                 ehci_dbg (ehci, "device removed\n");
707                 goto dead;
708         }
709
710         masked_status = status & INTR_MASK;
711         if (!masked_status) {           /* irq sharing? */
712                 spin_unlock(&ehci->lock);
713                 return IRQ_NONE;
714         }
715
716         /* clear (just) interrupts */
717         ehci_writel(ehci, masked_status, &ehci->regs->status);
718         cmd = ehci_readl(ehci, &ehci->regs->command);
719         bh = 0;
720
721 #ifdef  VERBOSE_DEBUG
722         /* unrequested/ignored: Frame List Rollover */
723         dbg_status (ehci, "irq", status);
724 #endif
725
726         /* INT, ERR, and IAA interrupt rates can be throttled */
727
728         /* normal [4.15.1.2] or error [4.15.1.1] completion */
729         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
730                 if (likely ((status & STS_ERR) == 0))
731                         COUNT (ehci->stats.normal);
732                 else
733                         COUNT (ehci->stats.error);
734                 bh = 1;
735         }
736
737         /* complete the unlinking of some qh [4.15.2.3] */
738         if (status & STS_IAA) {
739                 /* guard against (alleged) silicon errata */
740                 if (cmd & CMD_IAAD) {
741                         ehci_writel(ehci, cmd & ~CMD_IAAD,
742                                         &ehci->regs->command);
743                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
744                 }
745                 if (ehci->reclaim) {
746                         COUNT(ehci->stats.reclaim);
747                         end_unlink_async(ehci);
748                 } else
749                         ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
750         }
751
752         /* remote wakeup [4.3.1] */
753         if (status & STS_PCD) {
754                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
755
756                 /* kick root hub later */
757                 pcd_status = status;
758
759                 /* resume root hub? */
760                 if (!(cmd & CMD_RUN))
761                         usb_hcd_resume_root_hub(hcd);
762
763                 while (i--) {
764                         int pstatus = ehci_readl(ehci,
765                                                  &ehci->regs->port_status [i]);
766
767                         if (pstatus & PORT_OWNER)
768                                 continue;
769                         if (!(test_bit(i, &ehci->suspended_ports) &&
770                                         ((pstatus & PORT_RESUME) ||
771                                                 !(pstatus & PORT_SUSPEND)) &&
772                                         (pstatus & PORT_PE) &&
773                                         ehci->reset_done[i] == 0))
774                                 continue;
775
776                         /* start 20 msec resume signaling from this port,
777                          * and make khubd collect PORT_STAT_C_SUSPEND to
778                          * stop that signaling.
779                          */
780                         ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
781                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
782                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
783                 }
784         }
785
786         /* PCI errors [4.15.2.4] */
787         if (unlikely ((status & STS_FATAL) != 0)) {
788                 ehci_err(ehci, "fatal error\n");
789                 dbg_cmd(ehci, "fatal", cmd);
790                 dbg_status(ehci, "fatal", status);
791                 ehci_halt(ehci);
792 dead:
793                 ehci_reset(ehci);
794                 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
795                 /* generic layer kills/unlinks all urbs, then
796                  * uses ehci_stop to clean up the rest
797                  */
798                 bh = 1;
799         }
800
801         if (bh)
802                 ehci_work (ehci);
803         spin_unlock (&ehci->lock);
804         if (pcd_status)
805                 usb_hcd_poll_rh_status(hcd);
806         return IRQ_HANDLED;
807 }
808
809 /*-------------------------------------------------------------------------*/
810
811 /*
812  * non-error returns are a promise to giveback() the urb later
813  * we drop ownership so next owner (or urb unlink) can get it
814  *
815  * urb + dev is in hcd.self.controller.urb_list
816  * we're queueing TDs onto software and hardware lists
817  *
818  * hcd-specific init for hcpriv hasn't been done yet
819  *
820  * NOTE:  control, bulk, and interrupt share the same code to append TDs
821  * to a (possibly active) QH, and the same QH scanning code.
822  */
823 static int ehci_urb_enqueue (
824         struct usb_hcd  *hcd,
825         struct urb      *urb,
826         gfp_t           mem_flags
827 ) {
828         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
829         struct list_head        qtd_list;
830
831         INIT_LIST_HEAD (&qtd_list);
832
833         switch (usb_pipetype (urb->pipe)) {
834         case PIPE_CONTROL:
835                 /* qh_completions() code doesn't handle all the fault cases
836                  * in multi-TD control transfers.  Even 1KB is rare anyway.
837                  */
838                 if (urb->transfer_buffer_length > (16 * 1024))
839                         return -EMSGSIZE;
840                 /* FALLTHROUGH */
841         /* case PIPE_BULK: */
842         default:
843                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
844                         return -ENOMEM;
845                 return submit_async(ehci, urb, &qtd_list, mem_flags);
846
847         case PIPE_INTERRUPT:
848                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
849                         return -ENOMEM;
850                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
851
852         case PIPE_ISOCHRONOUS:
853                 if (urb->dev->speed == USB_SPEED_HIGH)
854                         return itd_submit (ehci, urb, mem_flags);
855                 else
856                         return sitd_submit (ehci, urb, mem_flags);
857         }
858 }
859
860 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
861 {
862         /* failfast */
863         if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
864                 end_unlink_async(ehci);
865
866         /* If the QH isn't linked then there's nothing we can do
867          * unless we were called during a giveback, in which case
868          * qh_completions() has to deal with it.
869          */
870         if (qh->qh_state != QH_STATE_LINKED) {
871                 if (qh->qh_state == QH_STATE_COMPLETING)
872                         qh->needs_rescan = 1;
873                 return;
874         }
875
876         /* defer till later if busy */
877         if (ehci->reclaim) {
878                 struct ehci_qh          *last;
879
880                 for (last = ehci->reclaim;
881                                 last->reclaim;
882                                 last = last->reclaim)
883                         continue;
884                 qh->qh_state = QH_STATE_UNLINK_WAIT;
885                 last->reclaim = qh;
886
887         /* start IAA cycle */
888         } else
889                 start_unlink_async (ehci, qh);
890 }
891
892 /* remove from hardware lists
893  * completions normally happen asynchronously
894  */
895
896 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
897 {
898         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
899         struct ehci_qh          *qh;
900         unsigned long           flags;
901         int                     rc;
902
903         spin_lock_irqsave (&ehci->lock, flags);
904         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
905         if (rc)
906                 goto done;
907
908         switch (usb_pipetype (urb->pipe)) {
909         // case PIPE_CONTROL:
910         // case PIPE_BULK:
911         default:
912                 qh = (struct ehci_qh *) urb->hcpriv;
913                 if (!qh)
914                         break;
915                 switch (qh->qh_state) {
916                 case QH_STATE_LINKED:
917                 case QH_STATE_COMPLETING:
918                         unlink_async(ehci, qh);
919                         break;
920                 case QH_STATE_UNLINK:
921                 case QH_STATE_UNLINK_WAIT:
922                         /* already started */
923                         break;
924                 case QH_STATE_IDLE:
925                         /* QH might be waiting for a Clear-TT-Buffer */
926                         qh_completions(ehci, qh);
927                         break;
928                 }
929                 break;
930
931         case PIPE_INTERRUPT:
932                 qh = (struct ehci_qh *) urb->hcpriv;
933                 if (!qh)
934                         break;
935                 switch (qh->qh_state) {
936                 case QH_STATE_LINKED:
937                 case QH_STATE_COMPLETING:
938                         intr_deschedule (ehci, qh);
939                         break;
940                 case QH_STATE_IDLE:
941                         qh_completions (ehci, qh);
942                         break;
943                 default:
944                         ehci_dbg (ehci, "bogus qh %p state %d\n",
945                                         qh, qh->qh_state);
946                         goto done;
947                 }
948                 break;
949
950         case PIPE_ISOCHRONOUS:
951                 // itd or sitd ...
952
953                 // wait till next completion, do it then.
954                 // completion irqs can wait up to 1024 msec,
955                 break;
956         }
957 done:
958         spin_unlock_irqrestore (&ehci->lock, flags);
959         return rc;
960 }
961
962 /*-------------------------------------------------------------------------*/
963
964 // bulk qh holds the data toggle
965
966 static void
967 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
968 {
969         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
970         unsigned long           flags;
971         struct ehci_qh          *qh, *tmp;
972
973         /* ASSERT:  any requests/urbs are being unlinked */
974         /* ASSERT:  nobody can be submitting urbs for this any more */
975
976 rescan:
977         spin_lock_irqsave (&ehci->lock, flags);
978         qh = ep->hcpriv;
979         if (!qh)
980                 goto done;
981
982         /* endpoints can be iso streams.  for now, we don't
983          * accelerate iso completions ... so spin a while.
984          */
985         if (qh->hw->hw_info1 == 0) {
986                 ehci_vdbg (ehci, "iso delay\n");
987                 goto idle_timeout;
988         }
989
990         if (!HC_IS_RUNNING (hcd->state))
991                 qh->qh_state = QH_STATE_IDLE;
992         switch (qh->qh_state) {
993         case QH_STATE_LINKED:
994         case QH_STATE_COMPLETING:
995                 for (tmp = ehci->async->qh_next.qh;
996                                 tmp && tmp != qh;
997                                 tmp = tmp->qh_next.qh)
998                         continue;
999                 /* periodic qh self-unlinks on empty */
1000                 if (!tmp)
1001                         goto nogood;
1002                 unlink_async (ehci, qh);
1003                 /* FALL THROUGH */
1004         case QH_STATE_UNLINK:           /* wait for hw to finish? */
1005         case QH_STATE_UNLINK_WAIT:
1006 idle_timeout:
1007                 spin_unlock_irqrestore (&ehci->lock, flags);
1008                 schedule_timeout_uninterruptible(1);
1009                 goto rescan;
1010         case QH_STATE_IDLE:             /* fully unlinked */
1011                 if (qh->clearing_tt)
1012                         goto idle_timeout;
1013                 if (list_empty (&qh->qtd_list)) {
1014                         qh_put (qh);
1015                         break;
1016                 }
1017                 /* else FALL THROUGH */
1018         default:
1019 nogood:
1020                 /* caller was supposed to have unlinked any requests;
1021                  * that's not our job.  just leak this memory.
1022                  */
1023                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1024                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1025                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1026                 break;
1027         }
1028         ep->hcpriv = NULL;
1029 done:
1030         spin_unlock_irqrestore (&ehci->lock, flags);
1031         return;
1032 }
1033
1034 static void
1035 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1036 {
1037         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1038         struct ehci_qh          *qh;
1039         int                     eptype = usb_endpoint_type(&ep->desc);
1040         int                     epnum = usb_endpoint_num(&ep->desc);
1041         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1042         unsigned long           flags;
1043
1044         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1045                 return;
1046
1047         spin_lock_irqsave(&ehci->lock, flags);
1048         qh = ep->hcpriv;
1049
1050         /* For Bulk and Interrupt endpoints we maintain the toggle state
1051          * in the hardware; the toggle bits in udev aren't used at all.
1052          * When an endpoint is reset by usb_clear_halt() we must reset
1053          * the toggle bit in the QH.
1054          */
1055         if (qh) {
1056                 usb_settoggle(qh->dev, epnum, is_out, 0);
1057                 if (!list_empty(&qh->qtd_list)) {
1058                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1059                 } else if (qh->qh_state == QH_STATE_LINKED ||
1060                                 qh->qh_state == QH_STATE_COMPLETING) {
1061
1062                         /* The toggle value in the QH can't be updated
1063                          * while the QH is active.  Unlink it now;
1064                          * re-linking will call qh_refresh().
1065                          */
1066                         if (eptype == USB_ENDPOINT_XFER_BULK)
1067                                 unlink_async(ehci, qh);
1068                         else
1069                                 intr_deschedule(ehci, qh);
1070                 }
1071         }
1072         spin_unlock_irqrestore(&ehci->lock, flags);
1073 }
1074
1075 static int ehci_get_frame (struct usb_hcd *hcd)
1076 {
1077         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1078         return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
1079                 ehci->periodic_size;
1080 }
1081
1082 /*-------------------------------------------------------------------------*/
1083
1084 MODULE_DESCRIPTION(DRIVER_DESC);
1085 MODULE_AUTHOR (DRIVER_AUTHOR);
1086 MODULE_LICENSE ("GPL");
1087
1088 #ifdef CONFIG_PCI
1089 #include "ehci-pci.c"
1090 #define PCI_DRIVER              ehci_pci_driver
1091 #endif
1092
1093 #ifdef CONFIG_USB_EHCI_FSL
1094 #include "ehci-fsl.c"
1095 #define PLATFORM_DRIVER         ehci_fsl_driver
1096 #endif
1097
1098 #ifdef CONFIG_SOC_AU1200
1099 #include "ehci-au1xxx.c"
1100 #define PLATFORM_DRIVER         ehci_hcd_au1xxx_driver
1101 #endif
1102
1103 #ifdef CONFIG_PPC_PS3
1104 #include "ehci-ps3.c"
1105 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1106 #endif
1107
1108 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1109 #include "ehci-ppc-of.c"
1110 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1111 #endif
1112
1113 #ifdef CONFIG_PLAT_ORION
1114 #include "ehci-orion.c"
1115 #define PLATFORM_DRIVER         ehci_orion_driver
1116 #endif
1117
1118 #ifdef CONFIG_ARCH_IXP4XX
1119 #include "ehci-ixp4xx.c"
1120 #define PLATFORM_DRIVER         ixp4xx_ehci_driver
1121 #endif
1122
1123 #ifdef CONFIG_USB_W90X900_EHCI
1124 #include "ehci-w90x900.c"
1125 #define PLATFORM_DRIVER         ehci_hcd_w90x900_driver
1126 #endif
1127
1128 #ifdef CONFIG_ARCH_AT91
1129 #include "ehci-atmel.c"
1130 #define PLATFORM_DRIVER         ehci_atmel_driver
1131 #endif
1132
1133 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1134     !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
1135 #error "missing bus glue for ehci-hcd"
1136 #endif
1137
1138 static int __init ehci_hcd_init(void)
1139 {
1140         int retval = 0;
1141
1142         if (usb_disabled())
1143                 return -ENODEV;
1144
1145         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1146         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1147         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1148                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1149                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1150                                 " before uhci_hcd and ohci_hcd, not after\n");
1151
1152         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1153                  hcd_name,
1154                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1155                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1156
1157 #ifdef DEBUG
1158         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1159         if (!ehci_debug_root) {
1160                 retval = -ENOENT;
1161                 goto err_debug;
1162         }
1163 #endif
1164
1165 #ifdef PLATFORM_DRIVER
1166         retval = platform_driver_register(&PLATFORM_DRIVER);
1167         if (retval < 0)
1168                 goto clean0;
1169 #endif
1170
1171 #ifdef PCI_DRIVER
1172         retval = pci_register_driver(&PCI_DRIVER);
1173         if (retval < 0)
1174                 goto clean1;
1175 #endif
1176
1177 #ifdef PS3_SYSTEM_BUS_DRIVER
1178         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1179         if (retval < 0)
1180                 goto clean2;
1181 #endif
1182
1183 #ifdef OF_PLATFORM_DRIVER
1184         retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1185         if (retval < 0)
1186                 goto clean3;
1187 #endif
1188         return retval;
1189
1190 #ifdef OF_PLATFORM_DRIVER
1191         /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1192 clean3:
1193 #endif
1194 #ifdef PS3_SYSTEM_BUS_DRIVER
1195         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1196 clean2:
1197 #endif
1198 #ifdef PCI_DRIVER
1199         pci_unregister_driver(&PCI_DRIVER);
1200 clean1:
1201 #endif
1202 #ifdef PLATFORM_DRIVER
1203         platform_driver_unregister(&PLATFORM_DRIVER);
1204 clean0:
1205 #endif
1206 #ifdef DEBUG
1207         debugfs_remove(ehci_debug_root);
1208         ehci_debug_root = NULL;
1209 err_debug:
1210 #endif
1211         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1212         return retval;
1213 }
1214 module_init(ehci_hcd_init);
1215
1216 static void __exit ehci_hcd_cleanup(void)
1217 {
1218 #ifdef OF_PLATFORM_DRIVER
1219         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1220 #endif
1221 #ifdef PLATFORM_DRIVER
1222         platform_driver_unregister(&PLATFORM_DRIVER);
1223 #endif
1224 #ifdef PCI_DRIVER
1225         pci_unregister_driver(&PCI_DRIVER);
1226 #endif
1227 #ifdef PS3_SYSTEM_BUS_DRIVER
1228         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1229 #endif
1230 #ifdef DEBUG
1231         debugfs_remove(ehci_debug_root);
1232 #endif
1233         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1234 }
1235 module_exit(ehci_hcd_cleanup);
1236