8d349b23249a40fadbffa0ef43d2c46ea2d1fcfa
[linux-2.6.git] / drivers / serial / cpm_uart / cpm_uart_core.c
1 /*
2  *  linux/drivers/serial/cpm_uart.c
3  *
4  *  Driver for CPM (SCC/SMC) serial ports; core driver
5  *
6  *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
7  *  Based on ppc8xx.c by Thomas Gleixner
8  *  Based on drivers/serial/amba.c by Russell King
9  *
10  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
11  *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
12  *
13  *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
14  *            (C) 2004 Intracom, S.A.
15  *            (C) 2005-2006 MontaVista Software, Inc.
16  *              Vitaly Bordug <vbordug@ru.mvista.com>
17  *
18  * This program is free software; you can redistribute it and/or modify
19  * it under the terms of the GNU General Public License as published by
20  * the Free Software Foundation; either version 2 of the License, or
21  * (at your option) any later version.
22  *
23  * This program is distributed in the hope that it will be useful,
24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26  * GNU General Public License for more details.
27  *
28  * You should have received a copy of the GNU General Public License
29  * along with this program; if not, write to the Free Software
30  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
31  *
32  */
33
34 #include <linux/module.h>
35 #include <linux/tty.h>
36 #include <linux/ioport.h>
37 #include <linux/init.h>
38 #include <linux/serial.h>
39 #include <linux/console.h>
40 #include <linux/sysrq.h>
41 #include <linux/device.h>
42 #include <linux/bootmem.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/fs_uart_pd.h>
45 #include <linux/of_platform.h>
46 #include <linux/gpio.h>
47 #include <linux/of_gpio.h>
48 #include <linux/clk.h>
49
50 #include <asm/io.h>
51 #include <asm/irq.h>
52 #include <asm/delay.h>
53 #include <asm/fs_pd.h>
54 #include <asm/udbg.h>
55
56 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
57 #define SUPPORT_SYSRQ
58 #endif
59
60 #include <linux/serial_core.h>
61 #include <linux/kernel.h>
62
63 #include "cpm_uart.h"
64
65
66 /**************************************************************/
67
68 static int  cpm_uart_tx_pump(struct uart_port *port);
69 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
70 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
71 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
72
73 /**************************************************************/
74
75 /*
76  * Check, if transmit buffers are processed
77 */
78 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
79 {
80         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
81         cbd_t __iomem *bdp = pinfo->tx_bd_base;
82         int ret = 0;
83
84         while (1) {
85                 if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
86                         break;
87
88                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
89                         ret = TIOCSER_TEMT;
90                         break;
91                 }
92                 bdp++;
93         }
94
95         pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
96
97         return ret;
98 }
99
100 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
101 {
102         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
103
104         if (pinfo->gpios[GPIO_RTS] >= 0)
105                 gpio_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
106
107         if (pinfo->gpios[GPIO_DTR] >= 0)
108                 gpio_set_value(pinfo->gpios[GPIO_DTR], !(mctrl & TIOCM_DTR));
109 }
110
111 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
112 {
113         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
114         unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
115
116         if (pinfo->gpios[GPIO_CTS] >= 0) {
117                 if (gpio_get_value(pinfo->gpios[GPIO_CTS]))
118                         mctrl &= ~TIOCM_CTS;
119         }
120
121         if (pinfo->gpios[GPIO_DSR] >= 0) {
122                 if (gpio_get_value(pinfo->gpios[GPIO_DSR]))
123                         mctrl &= ~TIOCM_DSR;
124         }
125
126         if (pinfo->gpios[GPIO_DCD] >= 0) {
127                 if (gpio_get_value(pinfo->gpios[GPIO_DCD]))
128                         mctrl &= ~TIOCM_CAR;
129         }
130
131         if (pinfo->gpios[GPIO_RI] >= 0) {
132                 if (!gpio_get_value(pinfo->gpios[GPIO_RI]))
133                         mctrl |= TIOCM_RNG;
134         }
135
136         return mctrl;
137 }
138
139 /*
140  * Stop transmitter
141  */
142 static void cpm_uart_stop_tx(struct uart_port *port)
143 {
144         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
145         smc_t __iomem *smcp = pinfo->smcp;
146         scc_t __iomem *sccp = pinfo->sccp;
147
148         pr_debug("CPM uart[%d]:stop tx\n", port->line);
149
150         if (IS_SMC(pinfo))
151                 clrbits8(&smcp->smc_smcm, SMCM_TX);
152         else
153                 clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
154 }
155
156 /*
157  * Start transmitter
158  */
159 static void cpm_uart_start_tx(struct uart_port *port)
160 {
161         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
162         smc_t __iomem *smcp = pinfo->smcp;
163         scc_t __iomem *sccp = pinfo->sccp;
164
165         pr_debug("CPM uart[%d]:start tx\n", port->line);
166
167         if (IS_SMC(pinfo)) {
168                 if (in_8(&smcp->smc_smcm) & SMCM_TX)
169                         return;
170         } else {
171                 if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
172                         return;
173         }
174
175         if (cpm_uart_tx_pump(port) != 0) {
176                 if (IS_SMC(pinfo)) {
177                         setbits8(&smcp->smc_smcm, SMCM_TX);
178                 } else {
179                         setbits16(&sccp->scc_sccm, UART_SCCM_TX);
180                 }
181         }
182 }
183
184 /*
185  * Stop receiver
186  */
187 static void cpm_uart_stop_rx(struct uart_port *port)
188 {
189         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
190         smc_t __iomem *smcp = pinfo->smcp;
191         scc_t __iomem *sccp = pinfo->sccp;
192
193         pr_debug("CPM uart[%d]:stop rx\n", port->line);
194
195         if (IS_SMC(pinfo))
196                 clrbits8(&smcp->smc_smcm, SMCM_RX);
197         else
198                 clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
199 }
200
201 /*
202  * Enable Modem status interrupts
203  */
204 static void cpm_uart_enable_ms(struct uart_port *port)
205 {
206         pr_debug("CPM uart[%d]:enable ms\n", port->line);
207 }
208
209 /*
210  * Generate a break.
211  */
212 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
213 {
214         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
215
216         pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
217                 break_state);
218
219         if (break_state)
220                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
221         else
222                 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
223 }
224
225 /*
226  * Transmit characters, refill buffer descriptor, if possible
227  */
228 static void cpm_uart_int_tx(struct uart_port *port)
229 {
230         pr_debug("CPM uart[%d]:TX INT\n", port->line);
231
232         cpm_uart_tx_pump(port);
233 }
234
235 #ifdef CONFIG_CONSOLE_POLL
236 static int serial_polled;
237 #endif
238
239 /*
240  * Receive characters
241  */
242 static void cpm_uart_int_rx(struct uart_port *port)
243 {
244         int i;
245         unsigned char ch;
246         u8 *cp;
247         struct tty_struct *tty = port->state->port.tty;
248         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
249         cbd_t __iomem *bdp;
250         u16 status;
251         unsigned int flg;
252
253         pr_debug("CPM uart[%d]:RX INT\n", port->line);
254
255         /* Just loop through the closed BDs and copy the characters into
256          * the buffer.
257          */
258         bdp = pinfo->rx_cur;
259         for (;;) {
260 #ifdef CONFIG_CONSOLE_POLL
261                 if (unlikely(serial_polled)) {
262                         serial_polled = 0;
263                         return;
264                 }
265 #endif
266                 /* get status */
267                 status = in_be16(&bdp->cbd_sc);
268                 /* If this one is empty, return happy */
269                 if (status & BD_SC_EMPTY)
270                         break;
271
272                 /* get number of characters, and check spce in flip-buffer */
273                 i = in_be16(&bdp->cbd_datlen);
274
275                 /* If we have not enough room in tty flip buffer, then we try
276                  * later, which will be the next rx-interrupt or a timeout
277                  */
278                 if(tty_buffer_request_room(tty, i) < i) {
279                         printk(KERN_WARNING "No room in flip buffer\n");
280                         return;
281                 }
282
283                 /* get pointer */
284                 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
285
286                 /* loop through the buffer */
287                 while (i-- > 0) {
288                         ch = *cp++;
289                         port->icount.rx++;
290                         flg = TTY_NORMAL;
291
292                         if (status &
293                             (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
294                                 goto handle_error;
295                         if (uart_handle_sysrq_char(port, ch))
296                                 continue;
297 #ifdef CONFIG_CONSOLE_POLL
298                         if (unlikely(serial_polled)) {
299                                 serial_polled = 0;
300                                 return;
301                         }
302 #endif
303                       error_return:
304                         tty_insert_flip_char(tty, ch, flg);
305
306                 }               /* End while (i--) */
307
308                 /* This BD is ready to be used again. Clear status. get next */
309                 clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
310                                         BD_SC_OV | BD_SC_ID);
311                 setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
312
313                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
314                         bdp = pinfo->rx_bd_base;
315                 else
316                         bdp++;
317
318         } /* End for (;;) */
319
320         /* Write back buffer pointer */
321         pinfo->rx_cur = bdp;
322
323         /* activate BH processing */
324         tty_flip_buffer_push(tty);
325
326         return;
327
328         /* Error processing */
329
330       handle_error:
331         /* Statistics */
332         if (status & BD_SC_BR)
333                 port->icount.brk++;
334         if (status & BD_SC_PR)
335                 port->icount.parity++;
336         if (status & BD_SC_FR)
337                 port->icount.frame++;
338         if (status & BD_SC_OV)
339                 port->icount.overrun++;
340
341         /* Mask out ignored conditions */
342         status &= port->read_status_mask;
343
344         /* Handle the remaining ones */
345         if (status & BD_SC_BR)
346                 flg = TTY_BREAK;
347         else if (status & BD_SC_PR)
348                 flg = TTY_PARITY;
349         else if (status & BD_SC_FR)
350                 flg = TTY_FRAME;
351
352         /* overrun does not affect the current character ! */
353         if (status & BD_SC_OV) {
354                 ch = 0;
355                 flg = TTY_OVERRUN;
356                 /* We skip this buffer */
357                 /* CHECK: Is really nothing senseful there */
358                 /* ASSUMPTION: it contains nothing valid */
359                 i = 0;
360         }
361 #ifdef SUPPORT_SYSRQ
362         port->sysrq = 0;
363 #endif
364         goto error_return;
365 }
366
367 /*
368  * Asynchron mode interrupt handler
369  */
370 static irqreturn_t cpm_uart_int(int irq, void *data)
371 {
372         u8 events;
373         struct uart_port *port = data;
374         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
375         smc_t __iomem *smcp = pinfo->smcp;
376         scc_t __iomem *sccp = pinfo->sccp;
377
378         pr_debug("CPM uart[%d]:IRQ\n", port->line);
379
380         if (IS_SMC(pinfo)) {
381                 events = in_8(&smcp->smc_smce);
382                 out_8(&smcp->smc_smce, events);
383                 if (events & SMCM_BRKE)
384                         uart_handle_break(port);
385                 if (events & SMCM_RX)
386                         cpm_uart_int_rx(port);
387                 if (events & SMCM_TX)
388                         cpm_uart_int_tx(port);
389         } else {
390                 events = in_be16(&sccp->scc_scce);
391                 out_be16(&sccp->scc_scce, events);
392                 if (events & UART_SCCM_BRKE)
393                         uart_handle_break(port);
394                 if (events & UART_SCCM_RX)
395                         cpm_uart_int_rx(port);
396                 if (events & UART_SCCM_TX)
397                         cpm_uart_int_tx(port);
398         }
399         return (events) ? IRQ_HANDLED : IRQ_NONE;
400 }
401
402 static int cpm_uart_startup(struct uart_port *port)
403 {
404         int retval;
405         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
406
407         pr_debug("CPM uart[%d]:startup\n", port->line);
408
409         /* If the port is not the console, make sure rx is disabled. */
410         if (!(pinfo->flags & FLAG_CONSOLE)) {
411                 /* Disable UART rx */
412                 if (IS_SMC(pinfo)) {
413                         clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN);
414                         clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
415                 } else {
416                         clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR);
417                         clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
418                 }
419                 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
420         }
421         /* Install interrupt handler. */
422         retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
423         if (retval)
424                 return retval;
425
426         /* Startup rx-int */
427         if (IS_SMC(pinfo)) {
428                 setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
429                 setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
430         } else {
431                 setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
432                 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
433         }
434
435         return 0;
436 }
437
438 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
439 {
440         set_current_state(TASK_UNINTERRUPTIBLE);
441         schedule_timeout(pinfo->wait_closing);
442 }
443
444 /*
445  * Shutdown the uart
446  */
447 static void cpm_uart_shutdown(struct uart_port *port)
448 {
449         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
450
451         pr_debug("CPM uart[%d]:shutdown\n", port->line);
452
453         /* free interrupt handler */
454         free_irq(port->irq, port);
455
456         /* If the port is not the console, disable Rx and Tx. */
457         if (!(pinfo->flags & FLAG_CONSOLE)) {
458                 /* Wait for all the BDs marked sent */
459                 while(!cpm_uart_tx_empty(port)) {
460                         set_current_state(TASK_UNINTERRUPTIBLE);
461                         schedule_timeout(2);
462                 }
463
464                 if (pinfo->wait_closing)
465                         cpm_uart_wait_until_send(pinfo);
466
467                 /* Stop uarts */
468                 if (IS_SMC(pinfo)) {
469                         smc_t __iomem *smcp = pinfo->smcp;
470                         clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
471                         clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
472                 } else {
473                         scc_t __iomem *sccp = pinfo->sccp;
474                         clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
475                         clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
476                 }
477
478                 /* Shut them really down and reinit buffer descriptors */
479                 if (IS_SMC(pinfo)) {
480                         out_be16(&pinfo->smcup->smc_brkcr, 0);
481                         cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
482                 } else {
483                         out_be16(&pinfo->sccup->scc_brkcr, 0);
484                         cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
485                 }
486
487                 cpm_uart_initbd(pinfo);
488         }
489 }
490
491 static void cpm_uart_set_termios(struct uart_port *port,
492                                  struct ktermios *termios,
493                                  struct ktermios *old)
494 {
495         int baud;
496         unsigned long flags;
497         u16 cval, scval, prev_mode;
498         int bits, sbits;
499         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
500         smc_t __iomem *smcp = pinfo->smcp;
501         scc_t __iomem *sccp = pinfo->sccp;
502
503         pr_debug("CPM uart[%d]:set_termios\n", port->line);
504
505         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
506
507         /* Character length programmed into the mode register is the
508          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
509          * 1 or 2 stop bits, minus 1.
510          * The value 'bits' counts this for us.
511          */
512         cval = 0;
513         scval = 0;
514
515         /* byte size */
516         switch (termios->c_cflag & CSIZE) {
517         case CS5:
518                 bits = 5;
519                 break;
520         case CS6:
521                 bits = 6;
522                 break;
523         case CS7:
524                 bits = 7;
525                 break;
526         case CS8:
527                 bits = 8;
528                 break;
529                 /* Never happens, but GCC is too dumb to figure it out */
530         default:
531                 bits = 8;
532                 break;
533         }
534         sbits = bits - 5;
535
536         if (termios->c_cflag & CSTOPB) {
537                 cval |= SMCMR_SL;       /* Two stops */
538                 scval |= SCU_PSMR_SL;
539                 bits++;
540         }
541
542         if (termios->c_cflag & PARENB) {
543                 cval |= SMCMR_PEN;
544                 scval |= SCU_PSMR_PEN;
545                 bits++;
546                 if (!(termios->c_cflag & PARODD)) {
547                         cval |= SMCMR_PM_EVEN;
548                         scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
549                 }
550         }
551
552         /*
553          * Update the timeout
554          */
555         uart_update_timeout(port, termios->c_cflag, baud);
556
557         /*
558          * Set up parity check flag
559          */
560 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
561
562         port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
563         if (termios->c_iflag & INPCK)
564                 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
565         if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
566                 port->read_status_mask |= BD_SC_BR;
567
568         /*
569          * Characters to ignore
570          */
571         port->ignore_status_mask = 0;
572         if (termios->c_iflag & IGNPAR)
573                 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
574         if (termios->c_iflag & IGNBRK) {
575                 port->ignore_status_mask |= BD_SC_BR;
576                 /*
577                  * If we're ignore parity and break indicators, ignore
578                  * overruns too.  (For real raw support).
579                  */
580                 if (termios->c_iflag & IGNPAR)
581                         port->ignore_status_mask |= BD_SC_OV;
582         }
583         /*
584          * !!! ignore all characters if CREAD is not set
585          */
586         if ((termios->c_cflag & CREAD) == 0)
587                 port->read_status_mask &= ~BD_SC_EMPTY;
588
589         spin_lock_irqsave(&port->lock, flags);
590
591         /* Start bit has not been added (so don't, because we would just
592          * subtract it later), and we need to add one for the number of
593          * stops bits (there is always at least one).
594          */
595         bits++;
596         if (IS_SMC(pinfo)) {
597                 /* Set the mode register.  We want to keep a copy of the
598                  * enables, because we want to put them back if they were
599                  * present.
600                  */
601                 prev_mode = in_be16(&smcp->smc_smcmr) & (SMCMR_REN | SMCMR_TEN);
602                 /* Output in *one* operation, so we don't interrupt RX/TX if they
603                  * were already enabled. */
604                 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval |
605                     SMCMR_SM_UART | prev_mode);
606         } else {
607                 out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
608         }
609
610         if (pinfo->clk)
611                 clk_set_rate(pinfo->clk, baud);
612         else
613                 cpm_set_brg(pinfo->brg - 1, baud);
614         spin_unlock_irqrestore(&port->lock, flags);
615 }
616
617 static const char *cpm_uart_type(struct uart_port *port)
618 {
619         pr_debug("CPM uart[%d]:uart_type\n", port->line);
620
621         return port->type == PORT_CPM ? "CPM UART" : NULL;
622 }
623
624 /*
625  * verify the new serial_struct (for TIOCSSERIAL).
626  */
627 static int cpm_uart_verify_port(struct uart_port *port,
628                                 struct serial_struct *ser)
629 {
630         int ret = 0;
631
632         pr_debug("CPM uart[%d]:verify_port\n", port->line);
633
634         if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
635                 ret = -EINVAL;
636         if (ser->irq < 0 || ser->irq >= nr_irqs)
637                 ret = -EINVAL;
638         if (ser->baud_base < 9600)
639                 ret = -EINVAL;
640         return ret;
641 }
642
643 /*
644  * Transmit characters, refill buffer descriptor, if possible
645  */
646 static int cpm_uart_tx_pump(struct uart_port *port)
647 {
648         cbd_t __iomem *bdp;
649         u8 *p;
650         int count;
651         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
652         struct circ_buf *xmit = &port->info->xmit;
653
654         /* Handle xon/xoff */
655         if (port->x_char) {
656                 /* Pick next descriptor and fill from buffer */
657                 bdp = pinfo->tx_cur;
658
659                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
660
661                 *p++ = port->x_char;
662
663                 out_be16(&bdp->cbd_datlen, 1);
664                 setbits16(&bdp->cbd_sc, BD_SC_READY);
665                 /* Get next BD. */
666                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
667                         bdp = pinfo->tx_bd_base;
668                 else
669                         bdp++;
670                 pinfo->tx_cur = bdp;
671
672                 port->icount.tx++;
673                 port->x_char = 0;
674                 return 1;
675         }
676
677         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
678                 cpm_uart_stop_tx(port);
679                 return 0;
680         }
681
682         /* Pick next descriptor and fill from buffer */
683         bdp = pinfo->tx_cur;
684
685         while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
686                xmit->tail != xmit->head) {
687                 count = 0;
688                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
689                 while (count < pinfo->tx_fifosize) {
690                         *p++ = xmit->buf[xmit->tail];
691                         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
692                         port->icount.tx++;
693                         count++;
694                         if (xmit->head == xmit->tail)
695                                 break;
696                 }
697                 out_be16(&bdp->cbd_datlen, count);
698                 setbits16(&bdp->cbd_sc, BD_SC_READY);
699                 /* Get next BD. */
700                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
701                         bdp = pinfo->tx_bd_base;
702                 else
703                         bdp++;
704         }
705         pinfo->tx_cur = bdp;
706
707         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
708                 uart_write_wakeup(port);
709
710         if (uart_circ_empty(xmit)) {
711                 cpm_uart_stop_tx(port);
712                 return 0;
713         }
714
715         return 1;
716 }
717
718 /*
719  * init buffer descriptors
720  */
721 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
722 {
723         int i;
724         u8 *mem_addr;
725         cbd_t __iomem *bdp;
726
727         pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
728
729         /* Set the physical address of the host memory
730          * buffers in the buffer descriptors, and the
731          * virtual address for us to work with.
732          */
733         mem_addr = pinfo->mem_addr;
734         bdp = pinfo->rx_cur = pinfo->rx_bd_base;
735         for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
736                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
737                 out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
738                 mem_addr += pinfo->rx_fifosize;
739         }
740
741         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
742         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
743
744         /* Set the physical address of the host memory
745          * buffers in the buffer descriptors, and the
746          * virtual address for us to work with.
747          */
748         mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
749         bdp = pinfo->tx_cur = pinfo->tx_bd_base;
750         for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
751                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
752                 out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
753                 mem_addr += pinfo->tx_fifosize;
754         }
755
756         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
757         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
758 }
759
760 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
761 {
762         scc_t __iomem *scp;
763         scc_uart_t __iomem *sup;
764
765         pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
766
767         scp = pinfo->sccp;
768         sup = pinfo->sccup;
769
770         /* Store address */
771         out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
772                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
773         out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
774                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
775
776         /* Set up the uart parameters in the
777          * parameter ram.
778          */
779
780         cpm_set_scc_fcr(sup);
781
782         out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
783         out_be16(&sup->scc_maxidl, pinfo->rx_fifosize);
784         out_be16(&sup->scc_brkcr, 1);
785         out_be16(&sup->scc_parec, 0);
786         out_be16(&sup->scc_frmec, 0);
787         out_be16(&sup->scc_nosec, 0);
788         out_be16(&sup->scc_brkec, 0);
789         out_be16(&sup->scc_uaddr1, 0);
790         out_be16(&sup->scc_uaddr2, 0);
791         out_be16(&sup->scc_toseq, 0);
792         out_be16(&sup->scc_char1, 0x8000);
793         out_be16(&sup->scc_char2, 0x8000);
794         out_be16(&sup->scc_char3, 0x8000);
795         out_be16(&sup->scc_char4, 0x8000);
796         out_be16(&sup->scc_char5, 0x8000);
797         out_be16(&sup->scc_char6, 0x8000);
798         out_be16(&sup->scc_char7, 0x8000);
799         out_be16(&sup->scc_char8, 0x8000);
800         out_be16(&sup->scc_rccm, 0xc0ff);
801
802         /* Send the CPM an initialize command.
803          */
804         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
805
806         /* Set UART mode, 8 bit, no parity, one stop.
807          * Enable receive and transmit.
808          */
809         out_be32(&scp->scc_gsmrh, 0);
810         out_be32(&scp->scc_gsmrl,
811                  SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
812
813         /* Enable rx interrupts  and clear all pending events.  */
814         out_be16(&scp->scc_sccm, 0);
815         out_be16(&scp->scc_scce, 0xffff);
816         out_be16(&scp->scc_dsr, 0x7e7e);
817         out_be16(&scp->scc_psmr, 0x3000);
818
819         setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
820 }
821
822 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
823 {
824         smc_t __iomem *sp;
825         smc_uart_t __iomem *up;
826
827         pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
828
829         sp = pinfo->smcp;
830         up = pinfo->smcup;
831
832         /* Store address */
833         out_be16(&pinfo->smcup->smc_rbase,
834                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
835         out_be16(&pinfo->smcup->smc_tbase,
836                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
837
838 /*
839  *  In case SMC1 is being relocated...
840  */
841 #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
842         out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
843         out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
844         out_be32(&up->smc_rstate, 0);
845         out_be32(&up->smc_tstate, 0);
846         out_be16(&up->smc_brkcr, 1);              /* number of break chars */
847         out_be16(&up->smc_brkec, 0);
848 #endif
849
850         /* Set up the uart parameters in the
851          * parameter ram.
852          */
853         cpm_set_smc_fcr(up);
854
855         /* Using idle charater time requires some additional tuning.  */
856         out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
857         out_be16(&up->smc_maxidl, pinfo->rx_fifosize);
858         out_be16(&up->smc_brklen, 0);
859         out_be16(&up->smc_brkec, 0);
860         out_be16(&up->smc_brkcr, 1);
861
862         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
863
864         /* Set UART mode, 8 bit, no parity, one stop.
865          * Enable receive and transmit.
866          */
867         out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
868
869         /* Enable only rx interrupts clear all pending events. */
870         out_8(&sp->smc_smcm, 0);
871         out_8(&sp->smc_smce, 0xff);
872
873         setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
874 }
875
876 /*
877  * Initialize port. This is called from early_console stuff
878  * so we have to be careful here !
879  */
880 static int cpm_uart_request_port(struct uart_port *port)
881 {
882         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
883         int ret;
884
885         pr_debug("CPM uart[%d]:request port\n", port->line);
886
887         if (pinfo->flags & FLAG_CONSOLE)
888                 return 0;
889
890         if (IS_SMC(pinfo)) {
891                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
892                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
893         } else {
894                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
895                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
896         }
897
898         ret = cpm_uart_allocbuf(pinfo, 0);
899
900         if (ret)
901                 return ret;
902
903         cpm_uart_initbd(pinfo);
904         if (IS_SMC(pinfo))
905                 cpm_uart_init_smc(pinfo);
906         else
907                 cpm_uart_init_scc(pinfo);
908
909         return 0;
910 }
911
912 static void cpm_uart_release_port(struct uart_port *port)
913 {
914         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
915
916         if (!(pinfo->flags & FLAG_CONSOLE))
917                 cpm_uart_freebuf(pinfo);
918 }
919
920 /*
921  * Configure/autoconfigure the port.
922  */
923 static void cpm_uart_config_port(struct uart_port *port, int flags)
924 {
925         pr_debug("CPM uart[%d]:config_port\n", port->line);
926
927         if (flags & UART_CONFIG_TYPE) {
928                 port->type = PORT_CPM;
929                 cpm_uart_request_port(port);
930         }
931 }
932
933 #ifdef CONFIG_CONSOLE_POLL
934 /* Serial polling routines for writing and reading from the uart while
935  * in an interrupt or debug context.
936  */
937
938 #define GDB_BUF_SIZE    512     /* power of 2, please */
939
940 static char poll_buf[GDB_BUF_SIZE];
941 static char *pollp;
942 static int poll_chars;
943
944 static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
945 {
946         u_char          c, *cp;
947         volatile cbd_t  *bdp;
948         int             i;
949
950         /* Get the address of the host memory buffer.
951          */
952         bdp = pinfo->rx_cur;
953         while (bdp->cbd_sc & BD_SC_EMPTY)
954                 ;
955
956         /* If the buffer address is in the CPM DPRAM, don't
957          * convert it.
958          */
959         cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
960
961         if (obuf) {
962                 i = c = bdp->cbd_datlen;
963                 while (i-- > 0)
964                         *obuf++ = *cp++;
965         } else
966                 c = *cp;
967         bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
968         bdp->cbd_sc |= BD_SC_EMPTY;
969
970         if (bdp->cbd_sc & BD_SC_WRAP)
971                 bdp = pinfo->rx_bd_base;
972         else
973                 bdp++;
974         pinfo->rx_cur = (cbd_t *)bdp;
975
976         return (int)c;
977 }
978
979 static int cpm_get_poll_char(struct uart_port *port)
980 {
981         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
982
983         if (!serial_polled) {
984                 serial_polled = 1;
985                 poll_chars = 0;
986         }
987         if (poll_chars <= 0) {
988                 poll_chars = poll_wait_key(poll_buf, pinfo);
989                 pollp = poll_buf;
990         }
991         poll_chars--;
992         return *pollp++;
993 }
994
995 static void cpm_put_poll_char(struct uart_port *port,
996                          unsigned char c)
997 {
998         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
999         static char ch[2];
1000
1001         ch[0] = (char)c;
1002         cpm_uart_early_write(pinfo->port.line, ch, 1);
1003 }
1004 #endif /* CONFIG_CONSOLE_POLL */
1005
1006 static struct uart_ops cpm_uart_pops = {
1007         .tx_empty       = cpm_uart_tx_empty,
1008         .set_mctrl      = cpm_uart_set_mctrl,
1009         .get_mctrl      = cpm_uart_get_mctrl,
1010         .stop_tx        = cpm_uart_stop_tx,
1011         .start_tx       = cpm_uart_start_tx,
1012         .stop_rx        = cpm_uart_stop_rx,
1013         .enable_ms      = cpm_uart_enable_ms,
1014         .break_ctl      = cpm_uart_break_ctl,
1015         .startup        = cpm_uart_startup,
1016         .shutdown       = cpm_uart_shutdown,
1017         .set_termios    = cpm_uart_set_termios,
1018         .type           = cpm_uart_type,
1019         .release_port   = cpm_uart_release_port,
1020         .request_port   = cpm_uart_request_port,
1021         .config_port    = cpm_uart_config_port,
1022         .verify_port    = cpm_uart_verify_port,
1023 #ifdef CONFIG_CONSOLE_POLL
1024         .poll_get_char = cpm_get_poll_char,
1025         .poll_put_char = cpm_put_poll_char,
1026 #endif
1027 };
1028
1029 struct uart_cpm_port cpm_uart_ports[UART_NR];
1030
1031 static int cpm_uart_init_port(struct device_node *np,
1032                               struct uart_cpm_port *pinfo)
1033 {
1034         const u32 *data;
1035         void __iomem *mem, *pram;
1036         int len;
1037         int ret;
1038         int i;
1039
1040         data = of_get_property(np, "clock", NULL);
1041         if (data) {
1042                 struct clk *clk = clk_get(NULL, (const char*)data);
1043                 if (!IS_ERR(clk))
1044                         pinfo->clk = clk;
1045         }
1046         if (!pinfo->clk) {
1047                 data = of_get_property(np, "fsl,cpm-brg", &len);
1048                 if (!data || len != 4) {
1049                         printk(KERN_ERR "CPM UART %s has no/invalid "
1050                                         "fsl,cpm-brg property.\n", np->name);
1051                         return -EINVAL;
1052                 }
1053                 pinfo->brg = *data;
1054         }
1055
1056         data = of_get_property(np, "fsl,cpm-command", &len);
1057         if (!data || len != 4) {
1058                 printk(KERN_ERR "CPM UART %s has no/invalid "
1059                                 "fsl,cpm-command property.\n", np->name);
1060                 return -EINVAL;
1061         }
1062         pinfo->command = *data;
1063
1064         mem = of_iomap(np, 0);
1065         if (!mem)
1066                 return -ENOMEM;
1067
1068         if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
1069             of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
1070                 pinfo->sccp = mem;
1071                 pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1072         } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
1073                    of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
1074                 pinfo->flags |= FLAG_SMC;
1075                 pinfo->smcp = mem;
1076                 pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1077         } else {
1078                 ret = -ENODEV;
1079                 goto out_mem;
1080         }
1081
1082         if (!pram) {
1083                 ret = -ENOMEM;
1084                 goto out_mem;
1085         }
1086
1087         pinfo->tx_nrfifos = TX_NUM_FIFO;
1088         pinfo->tx_fifosize = TX_BUF_SIZE;
1089         pinfo->rx_nrfifos = RX_NUM_FIFO;
1090         pinfo->rx_fifosize = RX_BUF_SIZE;
1091
1092         pinfo->port.uartclk = ppc_proc_freq;
1093         pinfo->port.mapbase = (unsigned long)mem;
1094         pinfo->port.type = PORT_CPM;
1095         pinfo->port.ops = &cpm_uart_pops,
1096         pinfo->port.iotype = UPIO_MEM;
1097         pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1098         spin_lock_init(&pinfo->port.lock);
1099
1100         pinfo->port.irq = of_irq_to_resource(np, 0, NULL);
1101         if (pinfo->port.irq == NO_IRQ) {
1102                 ret = -EINVAL;
1103                 goto out_pram;
1104         }
1105
1106         for (i = 0; i < NUM_GPIOS; i++)
1107                 pinfo->gpios[i] = of_get_gpio(np, i);
1108
1109 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1110         udbg_putc = NULL;
1111 #endif
1112
1113         return cpm_uart_request_port(&pinfo->port);
1114
1115 out_pram:
1116         cpm_uart_unmap_pram(pinfo, pram);
1117 out_mem:
1118         iounmap(mem);
1119         return ret;
1120 }
1121
1122 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1123 /*
1124  *      Print a string to the serial port trying not to disturb
1125  *      any possible real use of the port...
1126  *
1127  *      Note that this is called with interrupts already disabled
1128  */
1129 static void cpm_uart_console_write(struct console *co, const char *s,
1130                                    u_int count)
1131 {
1132         struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1133         unsigned int i;
1134         cbd_t __iomem *bdp, *bdbase;
1135         unsigned char *cp;
1136         unsigned long flags;
1137         int nolock = oops_in_progress;
1138
1139         if (unlikely(nolock)) {
1140                 local_irq_save(flags);
1141         } else {
1142                 spin_lock_irqsave(&pinfo->port.lock, flags);
1143         }
1144
1145         /* Get the address of the host memory buffer.
1146          */
1147         bdp = pinfo->tx_cur;
1148         bdbase = pinfo->tx_bd_base;
1149
1150         /*
1151          * Now, do each character.  This is not as bad as it looks
1152          * since this is a holding FIFO and not a transmitting FIFO.
1153          * We could add the complexity of filling the entire transmit
1154          * buffer, but we would just wait longer between accesses......
1155          */
1156         for (i = 0; i < count; i++, s++) {
1157                 /* Wait for transmitter fifo to empty.
1158                  * Ready indicates output is ready, and xmt is doing
1159                  * that, not that it is ready for us to send.
1160                  */
1161                 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1162                         ;
1163
1164                 /* Send the character out.
1165                  * If the buffer address is in the CPM DPRAM, don't
1166                  * convert it.
1167                  */
1168                 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
1169                 *cp = *s;
1170
1171                 out_be16(&bdp->cbd_datlen, 1);
1172                 setbits16(&bdp->cbd_sc, BD_SC_READY);
1173
1174                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1175                         bdp = bdbase;
1176                 else
1177                         bdp++;
1178
1179                 /* if a LF, also do CR... */
1180                 if (*s == 10) {
1181                         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1182                                 ;
1183
1184                         cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
1185                         *cp = 13;
1186
1187                         out_be16(&bdp->cbd_datlen, 1);
1188                         setbits16(&bdp->cbd_sc, BD_SC_READY);
1189
1190                         if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1191                                 bdp = bdbase;
1192                         else
1193                                 bdp++;
1194                 }
1195         }
1196
1197         /*
1198          * Finally, Wait for transmitter & holding register to empty
1199          *  and restore the IER
1200          */
1201         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1202                 ;
1203
1204         pinfo->tx_cur = bdp;
1205
1206         if (unlikely(nolock)) {
1207                 local_irq_restore(flags);
1208         } else {
1209                 spin_unlock_irqrestore(&pinfo->port.lock, flags);
1210         }
1211 }
1212
1213
1214 static int __init cpm_uart_console_setup(struct console *co, char *options)
1215 {
1216         int baud = 38400;
1217         int bits = 8;
1218         int parity = 'n';
1219         int flow = 'n';
1220         int ret;
1221         struct uart_cpm_port *pinfo;
1222         struct uart_port *port;
1223
1224         struct device_node *np = NULL;
1225         int i = 0;
1226
1227         if (co->index >= UART_NR) {
1228                 printk(KERN_ERR "cpm_uart: console index %d too high\n",
1229                        co->index);
1230                 return -ENODEV;
1231         }
1232
1233         do {
1234                 np = of_find_node_by_type(np, "serial");
1235                 if (!np)
1236                         return -ENODEV;
1237
1238                 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1239                     !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1240                     !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1241                     !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1242                         i--;
1243         } while (i++ != co->index);
1244
1245         pinfo = &cpm_uart_ports[co->index];
1246
1247         pinfo->flags |= FLAG_CONSOLE;
1248         port = &pinfo->port;
1249
1250         ret = cpm_uart_init_port(np, pinfo);
1251         of_node_put(np);
1252         if (ret)
1253                 return ret;
1254
1255         if (options) {
1256                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1257         } else {
1258                 if ((baud = uart_baudrate()) == -1)
1259                         baud = 9600;
1260         }
1261
1262         if (IS_SMC(pinfo)) {
1263                 out_be16(&pinfo->smcup->smc_brkcr, 0);
1264                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1265                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1266                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1267         } else {
1268                 out_be16(&pinfo->sccup->scc_brkcr, 0);
1269                 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
1270                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1271                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1272         }
1273
1274         ret = cpm_uart_allocbuf(pinfo, 1);
1275
1276         if (ret)
1277                 return ret;
1278
1279         cpm_uart_initbd(pinfo);
1280
1281         if (IS_SMC(pinfo))
1282                 cpm_uart_init_smc(pinfo);
1283         else
1284                 cpm_uart_init_scc(pinfo);
1285
1286         uart_set_options(port, co, baud, parity, bits, flow);
1287         cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1288
1289         return 0;
1290 }
1291
1292 static struct uart_driver cpm_reg;
1293 static struct console cpm_scc_uart_console = {
1294         .name           = "ttyCPM",
1295         .write          = cpm_uart_console_write,
1296         .device         = uart_console_device,
1297         .setup          = cpm_uart_console_setup,
1298         .flags          = CON_PRINTBUFFER,
1299         .index          = -1,
1300         .data           = &cpm_reg,
1301 };
1302
1303 static int __init cpm_uart_console_init(void)
1304 {
1305         register_console(&cpm_scc_uart_console);
1306         return 0;
1307 }
1308
1309 console_initcall(cpm_uart_console_init);
1310
1311 #define CPM_UART_CONSOLE        &cpm_scc_uart_console
1312 #else
1313 #define CPM_UART_CONSOLE        NULL
1314 #endif
1315
1316 static struct uart_driver cpm_reg = {
1317         .owner          = THIS_MODULE,
1318         .driver_name    = "ttyCPM",
1319         .dev_name       = "ttyCPM",
1320         .major          = SERIAL_CPM_MAJOR,
1321         .minor          = SERIAL_CPM_MINOR,
1322         .cons           = CPM_UART_CONSOLE,
1323         .nr             = UART_NR,
1324 };
1325
1326 static int probe_index;
1327
1328 static int __devinit cpm_uart_probe(struct of_device *ofdev,
1329                                     const struct of_device_id *match)
1330 {
1331         int index = probe_index++;
1332         struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1333         int ret;
1334
1335         pinfo->port.line = index;
1336
1337         if (index >= UART_NR)
1338                 return -ENODEV;
1339
1340         dev_set_drvdata(&ofdev->dev, pinfo);
1341
1342         /* initialize the device pointer for the port */
1343         pinfo->port.dev = &ofdev->dev;
1344
1345         ret = cpm_uart_init_port(ofdev->node, pinfo);
1346         if (ret)
1347                 return ret;
1348
1349         return uart_add_one_port(&cpm_reg, &pinfo->port);
1350 }
1351
1352 static int __devexit cpm_uart_remove(struct of_device *ofdev)
1353 {
1354         struct uart_cpm_port *pinfo = dev_get_drvdata(&ofdev->dev);
1355         return uart_remove_one_port(&cpm_reg, &pinfo->port);
1356 }
1357
1358 static struct of_device_id cpm_uart_match[] = {
1359         {
1360                 .compatible = "fsl,cpm1-smc-uart",
1361         },
1362         {
1363                 .compatible = "fsl,cpm1-scc-uart",
1364         },
1365         {
1366                 .compatible = "fsl,cpm2-smc-uart",
1367         },
1368         {
1369                 .compatible = "fsl,cpm2-scc-uart",
1370         },
1371         {}
1372 };
1373
1374 static struct of_platform_driver cpm_uart_driver = {
1375         .name = "cpm_uart",
1376         .match_table = cpm_uart_match,
1377         .probe = cpm_uart_probe,
1378         .remove = cpm_uart_remove,
1379  };
1380
1381 static int __init cpm_uart_init(void)
1382 {
1383         int ret = uart_register_driver(&cpm_reg);
1384         if (ret)
1385                 return ret;
1386
1387         ret = of_register_platform_driver(&cpm_uart_driver);
1388         if (ret)
1389                 uart_unregister_driver(&cpm_reg);
1390
1391         return ret;
1392 }
1393
1394 static void __exit cpm_uart_exit(void)
1395 {
1396         of_unregister_platform_driver(&cpm_uart_driver);
1397         uart_unregister_driver(&cpm_reg);
1398 }
1399
1400 module_init(cpm_uart_init);
1401 module_exit(cpm_uart_exit);
1402
1403 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1404 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1405 MODULE_LICENSE("GPL");
1406 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);