Blackfin serial driver: fix up tty core set_ldisc API change breakage bug
[linux-2.6.git] / drivers / serial / bfin_5xx.c
1 /*
2  * Blackfin On-Chip Serial Driver
3  *
4  * Copyright 2006-2007 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
28 #endif
29
30 #include <asm/gpio.h>
31 #include <asm/mach/bfin_serial_5xx.h>
32
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
35 #include <asm/io.h>
36 #include <asm/irq.h>
37 #include <asm/cacheflush.h>
38 #endif
39
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME        "ttyBF"
42 #define BFIN_SERIAL_MAJOR       204
43 #define BFIN_SERIAL_MINOR       64
44
45 /*
46  * Setup for console. Argument comes from the menuconfig
47  */
48 #define DMA_RX_XCOUNT           512
49 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
50
51 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
52
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
55 #else
56 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
57 #endif
58
59 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
60
61 /*
62  * interrupts are disabled on entry
63  */
64 static void bfin_serial_stop_tx(struct uart_port *port)
65 {
66         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67         struct circ_buf *xmit = &uart->port.info->xmit;
68
69         while (!(UART_GET_LSR(uart) & TEMT))
70                 cpu_relax();
71
72 #ifdef CONFIG_SERIAL_BFIN_DMA
73         disable_dma(uart->tx_dma_channel);
74         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
75         uart->port.icount.tx += uart->tx_count;
76         uart->tx_count = 0;
77         uart->tx_done = 1;
78 #else
79 #ifdef CONFIG_BF54x
80         /* Clear TFI bit */
81         UART_PUT_LSR(uart, TFI);
82 #endif
83         UART_CLEAR_IER(uart, ETBEI);
84 #endif
85 }
86
87 /*
88  * port is locked and interrupts are disabled
89  */
90 static void bfin_serial_start_tx(struct uart_port *port)
91 {
92         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
93
94 #ifdef CONFIG_SERIAL_BFIN_DMA
95         if (uart->tx_done)
96                 bfin_serial_dma_tx_chars(uart);
97 #else
98         UART_SET_IER(uart, ETBEI);
99         bfin_serial_tx_chars(uart);
100 #endif
101 }
102
103 /*
104  * Interrupts are enabled
105  */
106 static void bfin_serial_stop_rx(struct uart_port *port)
107 {
108         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
109 #ifdef CONFIG_KGDB_UART
110         if (uart->port.line != CONFIG_KGDB_UART_PORT)
111 #endif
112         UART_CLEAR_IER(uart, ERBFI);
113 }
114
115 /*
116  * Set the modem control timer to fire immediately.
117  */
118 static void bfin_serial_enable_ms(struct uart_port *port)
119 {
120 }
121
122 #ifdef CONFIG_KGDB_UART
123 static int kgdb_entry_state;
124
125 void kgdb_put_debug_char(int chr)
126 {
127         struct bfin_serial_port *uart;
128         
129         if (CONFIG_KGDB_UART_PORT < 0
130                 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
131                 uart = &bfin_serial_ports[0];
132         else
133                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
134         
135         while (!(UART_GET_LSR(uart) & THRE)) {
136                 SSYNC();
137         }
138
139         UART_CLEAR_DLAB(uart);
140         UART_PUT_CHAR(uart, (unsigned char)chr);
141         SSYNC();
142 }
143
144 int kgdb_get_debug_char(void)
145 {
146         struct bfin_serial_port *uart;
147         unsigned char chr;
148
149         if (CONFIG_KGDB_UART_PORT < 0
150                 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
151                 uart = &bfin_serial_ports[0];
152         else
153                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
154         
155         while(!(UART_GET_LSR(uart) & DR)) {
156                 SSYNC();
157         }
158         UART_CLEAR_DLAB(uart);
159         chr = UART_GET_CHAR(uart);
160         SSYNC();
161
162         return chr;
163 }
164 #endif
165
166 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
167 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
168 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
169 #else
170 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
171 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
172 #endif
173
174 #ifdef CONFIG_SERIAL_BFIN_PIO
175 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
176 {
177         struct tty_struct *tty = uart->port.info->tty;
178         unsigned int status, ch, flg;
179         static struct timeval anomaly_start = { .tv_sec = 0 };
180
181         status = UART_GET_LSR(uart);
182         UART_CLEAR_LSR(uart);
183
184         ch = UART_GET_CHAR(uart);
185         uart->port.icount.rx++;
186
187 #ifdef CONFIG_KGDB_UART
188         if (uart->port.line == CONFIG_KGDB_UART_PORT) {
189                 struct pt_regs *regs = get_irq_regs();
190                 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
191                         kgdb_breakkey_pressed(regs);
192                         return;
193                 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
194                         kgdb_entry_state = 1;
195                 } else if (kgdb_entry_state == 1 && ch == 'q') {
196                         kgdb_entry_state = 0;
197                         kgdb_breakkey_pressed(regs);
198                         return;
199                 } else if (ch == 0x3) {/* Ctrl + C */
200                         kgdb_entry_state = 0;
201                         kgdb_breakkey_pressed(regs);
202                         return;
203                 } else {
204                         kgdb_entry_state = 0;
205                 }
206         }
207 #endif
208
209         if (ANOMALY_05000363) {
210                 /* The BF533 (and BF561) family of processors have a nice anomaly
211                  * where they continuously generate characters for a "single" break.
212                  * We have to basically ignore this flood until the "next" valid
213                  * character comes across.  Due to the nature of the flood, it is
214                  * not possible to reliably catch bytes that are sent too quickly
215                  * after this break.  So application code talking to the Blackfin
216                  * which sends a break signal must allow at least 1.5 character
217                  * times after the end of the break for things to stabilize.  This
218                  * timeout was picked as it must absolutely be larger than 1
219                  * character time +/- some percent.  So 1.5 sounds good.  All other
220                  * Blackfin families operate properly.  Woo.
221                  */
222                 if (anomaly_start.tv_sec) {
223                         struct timeval curr;
224                         suseconds_t usecs;
225
226                         if ((~ch & (~ch + 1)) & 0xff)
227                                 goto known_good_char;
228
229                         do_gettimeofday(&curr);
230                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
231                                 goto known_good_char;
232
233                         usecs = 0;
234                         if (curr.tv_sec != anomaly_start.tv_sec)
235                                 usecs += USEC_PER_SEC;
236                         usecs += curr.tv_usec - anomaly_start.tv_usec;
237
238                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
239                                 goto known_good_char;
240
241                         if (ch)
242                                 anomaly_start.tv_sec = 0;
243                         else
244                                 anomaly_start = curr;
245
246                         return;
247
248  known_good_char:
249                         anomaly_start.tv_sec = 0;
250                 }
251         }
252
253         if (status & BI) {
254                 if (ANOMALY_05000363)
255                         if (bfin_revid() < 5)
256                                 do_gettimeofday(&anomaly_start);
257                 uart->port.icount.brk++;
258                 if (uart_handle_break(&uart->port))
259                         goto ignore_char;
260                 status &= ~(PE | FE);
261         }
262         if (status & PE)
263                 uart->port.icount.parity++;
264         if (status & OE)
265                 uart->port.icount.overrun++;
266         if (status & FE)
267                 uart->port.icount.frame++;
268
269         status &= uart->port.read_status_mask;
270
271         if (status & BI)
272                 flg = TTY_BREAK;
273         else if (status & PE)
274                 flg = TTY_PARITY;
275         else if (status & FE)
276                 flg = TTY_FRAME;
277         else
278                 flg = TTY_NORMAL;
279
280         if (uart_handle_sysrq_char(&uart->port, ch))
281                 goto ignore_char;
282
283         uart_insert_char(&uart->port, status, OE, ch, flg);
284
285  ignore_char:
286         tty_flip_buffer_push(tty);
287 }
288
289 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
290 {
291         struct circ_buf *xmit = &uart->port.info->xmit;
292
293         if (uart->port.x_char) {
294                 UART_PUT_CHAR(uart, uart->port.x_char);
295                 uart->port.icount.tx++;
296                 uart->port.x_char = 0;
297         }
298         /*
299          * Check the modem control lines before
300          * transmitting anything.
301          */
302         bfin_serial_mctrl_check(uart);
303
304         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
305                 bfin_serial_stop_tx(&uart->port);
306                 return;
307         }
308
309         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
310                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
311                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
312                 uart->port.icount.tx++;
313                 SSYNC();
314         }
315
316         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
317                 uart_write_wakeup(&uart->port);
318
319         if (uart_circ_empty(xmit))
320                 bfin_serial_stop_tx(&uart->port);
321 }
322
323 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
324 {
325         struct bfin_serial_port *uart = dev_id;
326
327         spin_lock(&uart->port.lock);
328         while (UART_GET_LSR(uart) & DR)
329                 bfin_serial_rx_chars(uart);
330         spin_unlock(&uart->port.lock);
331
332         return IRQ_HANDLED;
333 }
334
335 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
336 {
337         struct bfin_serial_port *uart = dev_id;
338
339         spin_lock(&uart->port.lock);
340         if (UART_GET_LSR(uart) & THRE)
341                 bfin_serial_tx_chars(uart);
342         spin_unlock(&uart->port.lock);
343
344         return IRQ_HANDLED;
345 }
346 #endif
347
348 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
349 static void bfin_serial_do_work(struct work_struct *work)
350 {
351         struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
352
353         bfin_serial_mctrl_check(uart);
354 }
355 #endif
356
357 #ifdef CONFIG_SERIAL_BFIN_DMA
358 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
359 {
360         struct circ_buf *xmit = &uart->port.info->xmit;
361
362         uart->tx_done = 0;
363
364         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
365                 uart->tx_count = 0;
366                 uart->tx_done = 1;
367                 return;
368         }
369
370         if (uart->port.x_char) {
371                 UART_PUT_CHAR(uart, uart->port.x_char);
372                 uart->port.icount.tx++;
373                 uart->port.x_char = 0;
374         }
375
376         /*
377          * Check the modem control lines before
378          * transmitting anything.
379          */
380         bfin_serial_mctrl_check(uart);
381
382         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
383         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
384                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
385         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
386                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
387         set_dma_config(uart->tx_dma_channel,
388                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
389                         INTR_ON_BUF,
390                         DIMENSION_LINEAR,
391                         DATA_SIZE_8,
392                         DMA_SYNC_RESTART));
393         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
394         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
395         set_dma_x_modify(uart->tx_dma_channel, 1);
396         enable_dma(uart->tx_dma_channel);
397
398         UART_SET_IER(uart, ETBEI);
399 }
400
401 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
402 {
403         struct tty_struct *tty = uart->port.info->tty;
404         int i, flg, status;
405
406         status = UART_GET_LSR(uart);
407         UART_CLEAR_LSR(uart);
408
409         uart->port.icount.rx +=
410                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
411                 UART_XMIT_SIZE);
412
413         if (status & BI) {
414                 uart->port.icount.brk++;
415                 if (uart_handle_break(&uart->port))
416                         goto dma_ignore_char;
417                 status &= ~(PE | FE);
418         }
419         if (status & PE)
420                 uart->port.icount.parity++;
421         if (status & OE)
422                 uart->port.icount.overrun++;
423         if (status & FE)
424                 uart->port.icount.frame++;
425
426         status &= uart->port.read_status_mask;
427
428         if (status & BI)
429                 flg = TTY_BREAK;
430         else if (status & PE)
431                 flg = TTY_PARITY;
432         else if (status & FE)
433                 flg = TTY_FRAME;
434         else
435                 flg = TTY_NORMAL;
436
437         for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
438                 if (i >= UART_XMIT_SIZE)
439                         i = 0;
440                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
441                         uart_insert_char(&uart->port, status, OE,
442                                 uart->rx_dma_buf.buf[i], flg);
443         }
444
445  dma_ignore_char:
446         tty_flip_buffer_push(tty);
447 }
448
449 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
450 {
451         int x_pos, pos;
452
453         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
454         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
455         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
456         if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
457                 uart->rx_dma_nrows = 0;
458         x_pos = DMA_RX_XCOUNT - x_pos;
459         if (x_pos == DMA_RX_XCOUNT)
460                 x_pos = 0;
461
462         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
463         if (pos != uart->rx_dma_buf.tail) {
464                 uart->rx_dma_buf.head = pos;
465                 bfin_serial_dma_rx_chars(uart);
466                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
467         }
468
469         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
470 }
471
472 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
473 {
474         struct bfin_serial_port *uart = dev_id;
475         struct circ_buf *xmit = &uart->port.info->xmit;
476
477         spin_lock(&uart->port.lock);
478         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
479                 disable_dma(uart->tx_dma_channel);
480                 clear_dma_irqstat(uart->tx_dma_channel);
481                 UART_CLEAR_IER(uart, ETBEI);
482                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
483                 uart->port.icount.tx += uart->tx_count;
484
485                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
486                         uart_write_wakeup(&uart->port);
487
488                 bfin_serial_dma_tx_chars(uart);
489         }
490
491         spin_unlock(&uart->port.lock);
492         return IRQ_HANDLED;
493 }
494
495 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
496 {
497         struct bfin_serial_port *uart = dev_id;
498         unsigned short irqstat;
499
500         spin_lock(&uart->port.lock);
501         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
502         clear_dma_irqstat(uart->rx_dma_channel);
503         spin_unlock(&uart->port.lock);
504
505         mod_timer(&(uart->rx_dma_timer), jiffies);
506
507         return IRQ_HANDLED;
508 }
509 #endif
510
511 /*
512  * Return TIOCSER_TEMT when transmitter is not busy.
513  */
514 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
515 {
516         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
517         unsigned short lsr;
518
519         lsr = UART_GET_LSR(uart);
520         if (lsr & TEMT)
521                 return TIOCSER_TEMT;
522         else
523                 return 0;
524 }
525
526 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
527 {
528 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
529         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
530         if (uart->cts_pin < 0)
531                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
532
533         if (UART_GET_CTS(uart))
534                 return TIOCM_DSR | TIOCM_CAR;
535         else
536 #endif
537                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
538 }
539
540 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
541 {
542 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
543         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
544         if (uart->rts_pin < 0)
545                 return;
546
547         if (mctrl & TIOCM_RTS)
548                 UART_CLEAR_RTS(uart);
549         else
550                 UART_SET_RTS(uart);
551 #endif
552 }
553
554 /*
555  * Handle any change of modem status signal since we were last called.
556  */
557 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
558 {
559 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
560         unsigned int status;
561         struct uart_info *info = uart->port.info;
562         struct tty_struct *tty = info->tty;
563
564         status = bfin_serial_get_mctrl(&uart->port);
565         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
566         if (!(status & TIOCM_CTS)) {
567                 tty->hw_stopped = 1;
568                 schedule_work(&uart->cts_workqueue);
569         } else {
570                 tty->hw_stopped = 0;
571         }
572 #endif
573 }
574
575 /*
576  * Interrupts are always disabled.
577  */
578 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
579 {
580         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
581         u16 lcr = UART_GET_LCR(uart);
582         if (break_state)
583                 lcr |= SB;
584         else
585                 lcr &= ~SB;
586         UART_PUT_LCR(uart, lcr);
587         SSYNC();
588 }
589
590 static int bfin_serial_startup(struct uart_port *port)
591 {
592         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
593
594 #ifdef CONFIG_SERIAL_BFIN_DMA
595         dma_addr_t dma_handle;
596
597         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
598                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
599                 return -EBUSY;
600         }
601
602         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
603                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
604                 free_dma(uart->rx_dma_channel);
605                 return -EBUSY;
606         }
607
608         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
609         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
610
611         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
612         uart->rx_dma_buf.head = 0;
613         uart->rx_dma_buf.tail = 0;
614         uart->rx_dma_nrows = 0;
615
616         set_dma_config(uart->rx_dma_channel,
617                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
618                                 INTR_ON_ROW, DIMENSION_2D,
619                                 DATA_SIZE_8,
620                                 DMA_SYNC_RESTART));
621         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
622         set_dma_x_modify(uart->rx_dma_channel, 1);
623         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
624         set_dma_y_modify(uart->rx_dma_channel, 1);
625         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
626         enable_dma(uart->rx_dma_channel);
627
628         uart->rx_dma_timer.data = (unsigned long)(uart);
629         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
630         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
631         add_timer(&(uart->rx_dma_timer));
632 #else
633         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
634              "BFIN_UART_RX", uart)) {
635 # ifdef CONFIG_KGDB_UART
636                 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
637 # endif
638                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
639                 return -EBUSY;
640 # ifdef CONFIG_KGDB_UART
641                 }
642 # endif
643         }
644
645         if (request_irq
646             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
647              "BFIN_UART_TX", uart)) {
648                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
649                 free_irq(uart->port.irq, uart);
650                 return -EBUSY;
651         }
652 #endif
653         UART_SET_IER(uart, ERBFI);
654         return 0;
655 }
656
657 static void bfin_serial_shutdown(struct uart_port *port)
658 {
659         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
660
661 #ifdef CONFIG_SERIAL_BFIN_DMA
662         disable_dma(uart->tx_dma_channel);
663         free_dma(uart->tx_dma_channel);
664         disable_dma(uart->rx_dma_channel);
665         free_dma(uart->rx_dma_channel);
666         del_timer(&(uart->rx_dma_timer));
667         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
668 #else
669 #ifdef  CONFIG_KGDB_UART
670         if (uart->port.line != CONFIG_KGDB_UART_PORT)
671 #endif
672         free_irq(uart->port.irq, uart);
673         free_irq(uart->port.irq+1, uart);
674 #endif
675 }
676
677 static void
678 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
679                    struct ktermios *old)
680 {
681         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
682         unsigned long flags;
683         unsigned int baud, quot;
684         unsigned short val, ier, lcr = 0;
685
686         switch (termios->c_cflag & CSIZE) {
687         case CS8:
688                 lcr = WLS(8);
689                 break;
690         case CS7:
691                 lcr = WLS(7);
692                 break;
693         case CS6:
694                 lcr = WLS(6);
695                 break;
696         case CS5:
697                 lcr = WLS(5);
698                 break;
699         default:
700                 printk(KERN_ERR "%s: word lengh not supported\n",
701                         __func__);
702         }
703
704         if (termios->c_cflag & CSTOPB)
705                 lcr |= STB;
706         if (termios->c_cflag & PARENB)
707                 lcr |= PEN;
708         if (!(termios->c_cflag & PARODD))
709                 lcr |= EPS;
710         if (termios->c_cflag & CMSPAR)
711                 lcr |= STP;
712
713         port->read_status_mask = OE;
714         if (termios->c_iflag & INPCK)
715                 port->read_status_mask |= (FE | PE);
716         if (termios->c_iflag & (BRKINT | PARMRK))
717                 port->read_status_mask |= BI;
718
719         /*
720          * Characters to ignore
721          */
722         port->ignore_status_mask = 0;
723         if (termios->c_iflag & IGNPAR)
724                 port->ignore_status_mask |= FE | PE;
725         if (termios->c_iflag & IGNBRK) {
726                 port->ignore_status_mask |= BI;
727                 /*
728                  * If we're ignoring parity and break indicators,
729                  * ignore overruns too (for real raw support).
730                  */
731                 if (termios->c_iflag & IGNPAR)
732                         port->ignore_status_mask |= OE;
733         }
734
735         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
736         quot = uart_get_divisor(port, baud);
737         spin_lock_irqsave(&uart->port.lock, flags);
738
739         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
740
741         /* Disable UART */
742         ier = UART_GET_IER(uart);
743         UART_DISABLE_INTS(uart);
744
745         /* Set DLAB in LCR to Access DLL and DLH */
746         UART_SET_DLAB(uart);
747
748         UART_PUT_DLL(uart, quot & 0xFF);
749         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
750         SSYNC();
751
752         /* Clear DLAB in LCR to Access THR RBR IER */
753         UART_CLEAR_DLAB(uart);
754
755         UART_PUT_LCR(uart, lcr);
756
757         /* Enable UART */
758         UART_ENABLE_INTS(uart, ier);
759
760         val = UART_GET_GCTL(uart);
761         val |= UCEN;
762         UART_PUT_GCTL(uart, val);
763
764         spin_unlock_irqrestore(&uart->port.lock, flags);
765 }
766
767 static const char *bfin_serial_type(struct uart_port *port)
768 {
769         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
770
771         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
772 }
773
774 /*
775  * Release the memory region(s) being used by 'port'.
776  */
777 static void bfin_serial_release_port(struct uart_port *port)
778 {
779 }
780
781 /*
782  * Request the memory region(s) being used by 'port'.
783  */
784 static int bfin_serial_request_port(struct uart_port *port)
785 {
786         return 0;
787 }
788
789 /*
790  * Configure/autoconfigure the port.
791  */
792 static void bfin_serial_config_port(struct uart_port *port, int flags)
793 {
794         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
795
796         if (flags & UART_CONFIG_TYPE &&
797             bfin_serial_request_port(&uart->port) == 0)
798                 uart->port.type = PORT_BFIN;
799 }
800
801 /*
802  * Verify the new serial_struct (for TIOCSSERIAL).
803  * The only change we allow are to the flags and type, and
804  * even then only between PORT_BFIN and PORT_UNKNOWN
805  */
806 static int
807 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
808 {
809         return 0;
810 }
811
812 /*
813  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
814  * In other cases, disable IrDA function.
815  */
816 static void bfin_serial_set_ldisc(struct uart_port *port)
817 {
818         int line = port->line;
819         unsigned short val;
820
821         if (line >= port->info->tty->driver->num)
822                 return;
823
824         switch (port->info->tty->ldisc.num) {
825         case N_IRDA:
826                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
827                 val |= (IREN | RPOLC);
828                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
829                 break;
830         default:
831                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
832                 val &= ~(IREN | RPOLC);
833                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
834         }
835 }
836
837 static struct uart_ops bfin_serial_pops = {
838         .tx_empty       = bfin_serial_tx_empty,
839         .set_mctrl      = bfin_serial_set_mctrl,
840         .get_mctrl      = bfin_serial_get_mctrl,
841         .stop_tx        = bfin_serial_stop_tx,
842         .start_tx       = bfin_serial_start_tx,
843         .stop_rx        = bfin_serial_stop_rx,
844         .enable_ms      = bfin_serial_enable_ms,
845         .break_ctl      = bfin_serial_break_ctl,
846         .startup        = bfin_serial_startup,
847         .shutdown       = bfin_serial_shutdown,
848         .set_termios    = bfin_serial_set_termios,
849         .set_ldisc      = bfin_serial_set_ldisc,
850         .type           = bfin_serial_type,
851         .release_port   = bfin_serial_release_port,
852         .request_port   = bfin_serial_request_port,
853         .config_port    = bfin_serial_config_port,
854         .verify_port    = bfin_serial_verify_port,
855 };
856
857 static void __init bfin_serial_init_ports(void)
858 {
859         static int first = 1;
860         int i;
861
862         if (!first)
863                 return;
864         first = 0;
865
866         for (i = 0; i < nr_ports; i++) {
867                 bfin_serial_ports[i].port.uartclk   = get_sclk();
868                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
869                 bfin_serial_ports[i].port.line      = i;
870                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
871                 bfin_serial_ports[i].port.membase   =
872                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
873                 bfin_serial_ports[i].port.mapbase   =
874                         bfin_serial_resource[i].uart_base_addr;
875                 bfin_serial_ports[i].port.irq       =
876                         bfin_serial_resource[i].uart_irq;
877                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
878 #ifdef CONFIG_SERIAL_BFIN_DMA
879                 bfin_serial_ports[i].tx_done        = 1;
880                 bfin_serial_ports[i].tx_count       = 0;
881                 bfin_serial_ports[i].tx_dma_channel =
882                         bfin_serial_resource[i].uart_tx_dma_channel;
883                 bfin_serial_ports[i].rx_dma_channel =
884                         bfin_serial_resource[i].uart_rx_dma_channel;
885                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
886 #endif
887 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
888                 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
889                 bfin_serial_ports[i].cts_pin        =
890                         bfin_serial_resource[i].uart_cts_pin;
891                 bfin_serial_ports[i].rts_pin        =
892                         bfin_serial_resource[i].uart_rts_pin;
893 #endif
894                 bfin_serial_hw_init(&bfin_serial_ports[i]);
895         }
896
897 }
898
899 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
900 /*
901  * If the port was already initialised (eg, by a boot loader),
902  * try to determine the current setup.
903  */
904 static void __init
905 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
906                            int *parity, int *bits)
907 {
908         unsigned short status;
909
910         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
911         if (status == (ERBFI | ETBEI)) {
912                 /* ok, the port was enabled */
913                 u16 lcr, dlh, dll;
914
915                 lcr = UART_GET_LCR(uart);
916
917                 *parity = 'n';
918                 if (lcr & PEN) {
919                         if (lcr & EPS)
920                                 *parity = 'e';
921                         else
922                                 *parity = 'o';
923                 }
924                 switch (lcr & 0x03) {
925                         case 0: *bits = 5; break;
926                         case 1: *bits = 6; break;
927                         case 2: *bits = 7; break;
928                         case 3: *bits = 8; break;
929                 }
930                 /* Set DLAB in LCR to Access DLL and DLH */
931                 UART_SET_DLAB(uart);
932
933                 dll = UART_GET_DLL(uart);
934                 dlh = UART_GET_DLH(uart);
935
936                 /* Clear DLAB in LCR to Access THR RBR IER */
937                 UART_CLEAR_DLAB(uart);
938
939                 *baud = get_sclk() / (16*(dll | dlh << 8));
940         }
941         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
942 }
943 #endif
944
945 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
946 static struct uart_driver bfin_serial_reg;
947
948 static int __init
949 bfin_serial_console_setup(struct console *co, char *options)
950 {
951         struct bfin_serial_port *uart;
952 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
953         int baud = 57600;
954         int bits = 8;
955         int parity = 'n';
956 #  ifdef CONFIG_SERIAL_BFIN_CTSRTS
957         int flow = 'r';
958 #  else
959         int flow = 'n';
960 #  endif
961 # endif
962
963         /*
964          * Check whether an invalid uart number has been specified, and
965          * if so, search for the first available port that does have
966          * console support.
967          */
968         if (co->index == -1 || co->index >= nr_ports)
969                 co->index = 0;
970         uart = &bfin_serial_ports[co->index];
971
972 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
973         if (options)
974                 uart_parse_options(options, &baud, &parity, &bits, &flow);
975         else
976                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
977
978         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
979 # else
980         return 0;
981 # endif
982 }
983 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
984                                  defined (CONFIG_EARLY_PRINTK) */
985
986 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
987 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
988 {
989         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
990         while (!(UART_GET_LSR(uart) & THRE))
991                 barrier();
992         UART_PUT_CHAR(uart, ch);
993         SSYNC();
994 }
995
996 /*
997  * Interrupts are disabled on entering
998  */
999 static void
1000 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1001 {
1002         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1003         int flags = 0;
1004
1005         spin_lock_irqsave(&uart->port.lock, flags);
1006         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1007         spin_unlock_irqrestore(&uart->port.lock, flags);
1008
1009 }
1010
1011 static struct console bfin_serial_console = {
1012         .name           = BFIN_SERIAL_NAME,
1013         .write          = bfin_serial_console_write,
1014         .device         = uart_console_device,
1015         .setup          = bfin_serial_console_setup,
1016         .flags          = CON_PRINTBUFFER,
1017         .index          = -1,
1018         .data           = &bfin_serial_reg,
1019 };
1020
1021 static int __init bfin_serial_rs_console_init(void)
1022 {
1023         bfin_serial_init_ports();
1024         register_console(&bfin_serial_console);
1025 #ifdef CONFIG_KGDB_UART
1026         kgdb_entry_state = 0;
1027         init_kgdb_uart();
1028 #endif
1029         return 0;
1030 }
1031 console_initcall(bfin_serial_rs_console_init);
1032
1033 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1034 #else
1035 #define BFIN_SERIAL_CONSOLE     NULL
1036 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1037
1038
1039 #ifdef CONFIG_EARLY_PRINTK
1040 static __init void early_serial_putc(struct uart_port *port, int ch)
1041 {
1042         unsigned timeout = 0xffff;
1043         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1044
1045         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1046                 cpu_relax();
1047         UART_PUT_CHAR(uart, ch);
1048 }
1049
1050 static __init void early_serial_write(struct console *con, const char *s,
1051                                         unsigned int n)
1052 {
1053         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1054         unsigned int i;
1055
1056         for (i = 0; i < n; i++, s++) {
1057                 if (*s == '\n')
1058                         early_serial_putc(&uart->port, '\r');
1059                 early_serial_putc(&uart->port, *s);
1060         }
1061 }
1062
1063 static struct __init console bfin_early_serial_console = {
1064         .name = "early_BFuart",
1065         .write = early_serial_write,
1066         .device = uart_console_device,
1067         .flags = CON_PRINTBUFFER,
1068         .setup = bfin_serial_console_setup,
1069         .index = -1,
1070         .data  = &bfin_serial_reg,
1071 };
1072
1073 struct console __init *bfin_earlyserial_init(unsigned int port,
1074                                                 unsigned int cflag)
1075 {
1076         struct bfin_serial_port *uart;
1077         struct ktermios t;
1078
1079         if (port == -1 || port >= nr_ports)
1080                 port = 0;
1081         bfin_serial_init_ports();
1082         bfin_early_serial_console.index = port;
1083         uart = &bfin_serial_ports[port];
1084         t.c_cflag = cflag;
1085         t.c_iflag = 0;
1086         t.c_oflag = 0;
1087         t.c_lflag = ICANON;
1088         t.c_line = port;
1089         bfin_serial_set_termios(&uart->port, &t, &t);
1090         return &bfin_early_serial_console;
1091 }
1092
1093 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1094
1095 static struct uart_driver bfin_serial_reg = {
1096         .owner                  = THIS_MODULE,
1097         .driver_name            = "bfin-uart",
1098         .dev_name               = BFIN_SERIAL_NAME,
1099         .major                  = BFIN_SERIAL_MAJOR,
1100         .minor                  = BFIN_SERIAL_MINOR,
1101         .nr                     = BFIN_UART_NR_PORTS,
1102         .cons                   = BFIN_SERIAL_CONSOLE,
1103 };
1104
1105 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1106 {
1107         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1108
1109         if (uart)
1110                 uart_suspend_port(&bfin_serial_reg, &uart->port);
1111
1112         return 0;
1113 }
1114
1115 static int bfin_serial_resume(struct platform_device *dev)
1116 {
1117         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1118
1119         if (uart)
1120                 uart_resume_port(&bfin_serial_reg, &uart->port);
1121
1122         return 0;
1123 }
1124
1125 static int bfin_serial_probe(struct platform_device *dev)
1126 {
1127         struct resource *res = dev->resource;
1128         int i;
1129
1130         for (i = 0; i < dev->num_resources; i++, res++)
1131                 if (res->flags & IORESOURCE_MEM)
1132                         break;
1133
1134         if (i < dev->num_resources) {
1135                 for (i = 0; i < nr_ports; i++, res++) {
1136                         if (bfin_serial_ports[i].port.mapbase != res->start)
1137                                 continue;
1138                         bfin_serial_ports[i].port.dev = &dev->dev;
1139                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1140                         platform_set_drvdata(dev, &bfin_serial_ports[i]);
1141                 }
1142         }
1143
1144         return 0;
1145 }
1146
1147 static int bfin_serial_remove(struct platform_device *pdev)
1148 {
1149         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1150
1151
1152 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1153         gpio_free(uart->cts_pin);
1154         gpio_free(uart->rts_pin);
1155 #endif
1156
1157         platform_set_drvdata(pdev, NULL);
1158
1159         if (uart)
1160                 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1161
1162         return 0;
1163 }
1164
1165 static struct platform_driver bfin_serial_driver = {
1166         .probe          = bfin_serial_probe,
1167         .remove         = bfin_serial_remove,
1168         .suspend        = bfin_serial_suspend,
1169         .resume         = bfin_serial_resume,
1170         .driver         = {
1171                 .name   = "bfin-uart",
1172                 .owner  = THIS_MODULE,
1173         },
1174 };
1175
1176 static int __init bfin_serial_init(void)
1177 {
1178         int ret;
1179 #ifdef CONFIG_KGDB_UART
1180         struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1181         struct ktermios t;
1182 #endif
1183
1184         pr_info("Serial: Blackfin serial driver\n");
1185
1186         bfin_serial_init_ports();
1187
1188         ret = uart_register_driver(&bfin_serial_reg);
1189         if (ret == 0) {
1190                 ret = platform_driver_register(&bfin_serial_driver);
1191                 if (ret) {
1192                         pr_debug("uart register failed\n");
1193                         uart_unregister_driver(&bfin_serial_reg);
1194                 }
1195         }
1196 #ifdef CONFIG_KGDB_UART
1197         if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1198                 request_irq(uart->port.irq, bfin_serial_rx_int,
1199                         IRQF_DISABLED, "BFIN_UART_RX", uart);
1200                 pr_info("Request irq for kgdb uart port\n");
1201                 UART_SET_IER(uart, ERBFI);
1202                 SSYNC();
1203                 t.c_cflag = CS8|B57600;
1204                 t.c_iflag = 0;
1205                 t.c_oflag = 0;
1206                 t.c_lflag = ICANON;
1207                 t.c_line = CONFIG_KGDB_UART_PORT;
1208                 bfin_serial_set_termios(&uart->port, &t, &t);
1209         }
1210 #endif
1211         return ret;
1212 }
1213
1214 static void __exit bfin_serial_exit(void)
1215 {
1216         platform_driver_unregister(&bfin_serial_driver);
1217         uart_unregister_driver(&bfin_serial_reg);
1218 }
1219
1220 module_init(bfin_serial_init);
1221 module_exit(bfin_serial_exit);
1222
1223 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1224 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1225 MODULE_LICENSE("GPL");
1226 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1227 MODULE_ALIAS("platform:bfin-uart");