drivers/scsi/mpt2sas/mpi/mpi2_ioc.h

   1 /*
   2  *  Copyright (c) 2000-2009 LSI Corporation.
   3  *
   4  *
   5  *           Name:  mpi2_ioc.h
   6  *          Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
   7  *  Creation Date:  October 11, 2006
   8  *
   9  *  mpi2_ioc.h Version:  02.00.11
  10  *
  11  *  Version History
  12  *  ---------------
  13  *
  14  *  Date      Version   Description
  15  *  --------  --------  ------------------------------------------------------
  16  *  04-30-07  02.00.00  Corresponds to Fusion-MPT MPI Specification Rev A.
  17  *  06-04-07  02.00.01  In IOCFacts Reply structure, renamed MaxDevices to
  18  *                      MaxTargets.
  19  *                      Added TotalImageSize field to FWDownload Request.
  20  *                      Added reserved words to FWUpload Request.
  21  *  06-26-07  02.00.02  Added IR Configuration Change List Event.
  22  *  08-31-07  02.00.03  Removed SystemReplyQueueDepth field from the IOCInit
  23  *                      request and replaced it with
  24  *                      ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth.
  25  *                      Replaced the MinReplyQueueDepth field of the IOCFacts
  26  *                      reply with MaxReplyDescriptorPostQueueDepth.
  27  *                      Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum
  28  *                      depth for the Reply Descriptor Post Queue.
  29  *                      Added SASAddress field to Initiator Device Table
  30  *                      Overflow Event data.
  31  *  10-31-07  02.00.04  Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING
  32  *                      for SAS Initiator Device Status Change Event data.
  33  *                      Modified Reason Code defines for SAS Topology Change
  34  *                      List Event data, including adding a bit for PHY Vacant
  35  *                      status, and adding a mask for the Reason Code.
  36  *                      Added define for
  37  *                      MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING.
  38  *                      Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID.
  39  *  12-18-07  02.00.05  Added Boot Status defines for the IOCExceptions field of
  40  *                      the IOCFacts Reply.
  41  *                      Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
  42  *                      Moved MPI2_VERSION_UNION to mpi2.h.
  43  *                      Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks
  44  *                      instead of enables, and added SASBroadcastPrimitiveMasks
  45  *                      field.
  46  *                      Added Log Entry Added Event and related structure.
  47  *  02-29-08  02.00.06  Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID.
  48  *                      Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET.
  49  *                      Added MaxVolumes and MaxPersistentEntries fields to
  50  *                      IOCFacts reply.
  51  *                      Added ProtocalFlags and IOCCapabilities fields to
  52  *                      MPI2_FW_IMAGE_HEADER.
  53  *                      Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT.
  54  *  03-03-08  02.00.07  Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to
  55  *                      a U16 (from a U32).
  56  *                      Removed extra 's' from EventMasks name.
  57  *  06-27-08  02.00.08  Fixed an offset in a comment.
  58  *  10-02-08  02.00.09  Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST.
  59  *                      Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and
  60  *                      renamed MinReplyFrameSize to ReplyFrameSize.
  61  *                      Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX.
  62  *                      Added two new RAIDOperation values for Integrated RAID
  63  *                      Operations Status Event data.
  64  *                      Added four new IR Configuration Change List Event data
  65  *                      ReasonCode values.
  66  *                      Added two new ReasonCode defines for SAS Device Status
  67  *                      Change Event data.
  68  *                      Added three new DiscoveryStatus bits for the SAS
  69  *                      Discovery event data.
  70  *                      Added Multiplexing Status Change bit to the PhyStatus
  71  *                      field of the SAS Topology Change List event data.
  72  *                      Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY.
  73  *                      BootFlags are now product-specific.
  74  *                      Added defines for the indivdual signature bytes
  75  *                      for MPI2_INIT_IMAGE_FOOTER.
  76  *  01-19-09  02.00.10  Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define.
  77  *                      Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR
  78  *                      define.
  79  *                      Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE
  80  *                      define.
  81  *                      Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define.
  82  *  05-06-09  02.00.11  Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define.
  83  *                      Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define.
  84  *                      Added two new reason codes for SAS Device Status Change
  85  *                      Event.
  86  *                      Added new event: SAS PHY Counter.
  87  *  --------------------------------------------------------------------------
  88  */
  89
  90 #ifndef MPI2_IOC_H
  91 #define MPI2_IOC_H
  92
  93 /*****************************************************************************
  94 *
  95 *               IOC Messages
  96 *
  97 *****************************************************************************/
  98
  99 /****************************************************************************
 100 *  IOCInit message
 101 ****************************************************************************/
 102
 103 /* IOCInit Request message */
 104 typedef struct _MPI2_IOC_INIT_REQUEST
 105 {
 106     U8                      WhoInit;                        /* 0x00 */
 107     U8                      Reserved1;                      /* 0x01 */
 108     U8                      ChainOffset;                    /* 0x02 */
 109     U8                      Function;                       /* 0x03 */
 110     U16                     Reserved2;                      /* 0x04 */
 111     U8                      Reserved3;                      /* 0x06 */
 112     U8                      MsgFlags;                       /* 0x07 */
 113     U8                      VP_ID;                          /* 0x08 */
 114     U8                      VF_ID;                          /* 0x09 */
 115     U16                     Reserved4;                      /* 0x0A */
 116     U16                     MsgVersion;                     /* 0x0C */
 117     U16                     HeaderVersion;                  /* 0x0E */
 118     U32                     Reserved5;                      /* 0x10 */
 119     U32                     Reserved6;                      /* 0x14 */
 120     U16                     Reserved7;                      /* 0x18 */
 121     U16                     SystemRequestFrameSize;         /* 0x1A */
 122     U16                     ReplyDescriptorPostQueueDepth;  /* 0x1C */
 123     U16                     ReplyFreeQueueDepth;            /* 0x1E */
 124     U32                     SenseBufferAddressHigh;         /* 0x20 */
 125     U32                     SystemReplyAddressHigh;         /* 0x24 */
 126     U64                     SystemRequestFrameBaseAddress;  /* 0x28 */
 127     U64                     ReplyDescriptorPostQueueAddress;/* 0x30 */
 128     U64                     ReplyFreeQueueAddress;          /* 0x38 */
 129     U64                     TimeStamp;                      /* 0x40 */
 130 } MPI2_IOC_INIT_REQUEST, MPI2_POINTER PTR_MPI2_IOC_INIT_REQUEST,
 131   Mpi2IOCInitRequest_t, MPI2_POINTER pMpi2IOCInitRequest_t;
 132
 133 /* WhoInit values */
 134 #define MPI2_WHOINIT_NOT_INITIALIZED            (0x00)
 135 #define MPI2_WHOINIT_SYSTEM_BIOS                (0x01)
 136 #define MPI2_WHOINIT_ROM_BIOS                   (0x02)
 137 #define MPI2_WHOINIT_PCI_PEER                   (0x03)
 138 #define MPI2_WHOINIT_HOST_DRIVER                (0x04)
 139 #define MPI2_WHOINIT_MANUFACTURER               (0x05)
 140
 141 /* MsgVersion */
 142 #define MPI2_IOCINIT_MSGVERSION_MAJOR_MASK      (0xFF00)
 143 #define MPI2_IOCINIT_MSGVERSION_MAJOR_SHIFT     (8)
 144 #define MPI2_IOCINIT_MSGVERSION_MINOR_MASK      (0x00FF)
 145 #define MPI2_IOCINIT_MSGVERSION_MINOR_SHIFT     (0)
 146
 147 /* HeaderVersion */
 148 #define MPI2_IOCINIT_HDRVERSION_UNIT_MASK       (0xFF00)
 149 #define MPI2_IOCINIT_HDRVERSION_UNIT_SHIFT      (8)
 150 #define MPI2_IOCINIT_HDRVERSION_DEV_MASK        (0x00FF)
 151 #define MPI2_IOCINIT_HDRVERSION_DEV_SHIFT       (0)
 152
 153 /* minimum depth for the Reply Descriptor Post Queue */
 154 #define MPI2_RDPQ_DEPTH_MIN                     (16)
 155
 156
 157 /* IOCInit Reply message */
 158 typedef struct _MPI2_IOC_INIT_REPLY
 159 {
 160     U8                      WhoInit;                        /* 0x00 */
 161     U8                      Reserved1;                      /* 0x01 */
 162     U8                      MsgLength;                      /* 0x02 */
 163     U8                      Function;                       /* 0x03 */
 164     U16                     Reserved2;                      /* 0x04 */
 165     U8                      Reserved3;                      /* 0x06 */
 166     U8                      MsgFlags;                       /* 0x07 */
 167     U8                      VP_ID;                          /* 0x08 */
 168     U8                      VF_ID;                          /* 0x09 */
 169     U16                     Reserved4;                      /* 0x0A */
 170     U16                     Reserved5;                      /* 0x0C */
 171     U16                     IOCStatus;                      /* 0x0E */
 172     U32                     IOCLogInfo;                     /* 0x10 */
 173 } MPI2_IOC_INIT_REPLY, MPI2_POINTER PTR_MPI2_IOC_INIT_REPLY,
 174   Mpi2IOCInitReply_t, MPI2_POINTER pMpi2IOCInitReply_t;
 175
 176
 177 /****************************************************************************
 178 *  IOCFacts message
 179 ****************************************************************************/
 180
 181 /* IOCFacts Request message */
 182 typedef struct _MPI2_IOC_FACTS_REQUEST
 183 {
 184     U16                     Reserved1;                      /* 0x00 */
 185     U8                      ChainOffset;                    /* 0x02 */
 186     U8                      Function;                       /* 0x03 */
 187     U16                     Reserved2;                      /* 0x04 */
 188     U8                      Reserved3;                      /* 0x06 */
 189     U8                      MsgFlags;                       /* 0x07 */
 190     U8                      VP_ID;                          /* 0x08 */
 191     U8                      VF_ID;                          /* 0x09 */
 192     U16                     Reserved4;                      /* 0x0A */
 193 } MPI2_IOC_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_IOC_FACTS_REQUEST,
 194   Mpi2IOCFactsRequest_t, MPI2_POINTER pMpi2IOCFactsRequest_t;
 195
 196
 197 /* IOCFacts Reply message */
 198 typedef struct _MPI2_IOC_FACTS_REPLY
 199 {
 200     U16                     MsgVersion;                     /* 0x00 */
 201     U8                      MsgLength;                      /* 0x02 */
 202     U8                      Function;                       /* 0x03 */
 203     U16                     HeaderVersion;                  /* 0x04 */
 204     U8                      IOCNumber;                      /* 0x06 */
 205     U8                      MsgFlags;                       /* 0x07 */
 206     U8                      VP_ID;                          /* 0x08 */
 207     U8                      VF_ID;                          /* 0x09 */
 208     U16                     Reserved1;                      /* 0x0A */
 209     U16                     IOCExceptions;                  /* 0x0C */
 210     U16                     IOCStatus;                      /* 0x0E */
 211     U32                     IOCLogInfo;                     /* 0x10 */
 212     U8                      MaxChainDepth;                  /* 0x14 */
 213     U8                      WhoInit;                        /* 0x15 */
 214     U8                      NumberOfPorts;                  /* 0x16 */
 215     U8                      Reserved2;                      /* 0x17 */
 216     U16                     RequestCredit;                  /* 0x18 */
 217     U16                     ProductID;                      /* 0x1A */
 218     U32                     IOCCapabilities;                /* 0x1C */
 219     MPI2_VERSION_UNION      FWVersion;                      /* 0x20 */
 220     U16                     IOCRequestFrameSize;            /* 0x24 */
 221     U16                     Reserved3;                      /* 0x26 */
 222     U16                     MaxInitiators;                  /* 0x28 */
 223     U16                     MaxTargets;                     /* 0x2A */
 224     U16                     MaxSasExpanders;                /* 0x2C */
 225     U16                     MaxEnclosures;                  /* 0x2E */
 226     U16                     ProtocolFlags;                  /* 0x30 */
 227     U16                     HighPriorityCredit;             /* 0x32 */
 228     U16                     MaxReplyDescriptorPostQueueDepth; /* 0x34 */
 229     U8                      ReplyFrameSize;                 /* 0x36 */
 230     U8                      MaxVolumes;                     /* 0x37 */
 231     U16                     MaxDevHandle;                   /* 0x38 */
 232     U16                     MaxPersistentEntries;           /* 0x3A */
 233     U32                     Reserved4;                      /* 0x3C */
 234 } MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY,
 235   Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t;
 236
 237 /* MsgVersion */
 238 #define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK             (0xFF00)
 239 #define MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT            (8)
 240 #define MPI2_IOCFACTS_MSGVERSION_MINOR_MASK             (0x00FF)
 241 #define MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT            (0)
 242
 243 /* HeaderVersion */
 244 #define MPI2_IOCFACTS_HDRVERSION_UNIT_MASK              (0xFF00)
 245 #define MPI2_IOCFACTS_HDRVERSION_UNIT_SHIFT             (8)
 246 #define MPI2_IOCFACTS_HDRVERSION_DEV_MASK               (0x00FF)
 247 #define MPI2_IOCFACTS_HDRVERSION_DEV_SHIFT              (0)
 248
 249 /* IOCExceptions */
 250 #define MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX      (0x0100)
 251
 252 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_MASK              (0x00E0)
 253 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_GOOD              (0x0000)
 254 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_BACKUP            (0x0020)
 255 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_RESTORED          (0x0040)
 256 #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_CORRUPT_BACKUP    (0x0060)
 257
 258 #define MPI2_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED       (0x0010)
 259 #define MPI2_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL     (0x0008)
 260 #define MPI2_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL           (0x0004)
 261 #define MPI2_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID        (0x0002)
 262 #define MPI2_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL       (0x0001)
 263
 264 /* defines for WhoInit field are after the IOCInit Request */
 265
 266 /* ProductID field uses MPI2_FW_HEADER_PID_ */
 267
 268 /* IOCCapabilities */
 269 #define MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX            (0x00008000)
 270 #define MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR       (0x00004000)
 271 #define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY           (0x00002000)
 272 #define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID        (0x00001000)
 273 #define MPI2_IOCFACTS_CAPABILITY_TLR                    (0x00000800)
 274 #define MPI2_IOCFACTS_CAPABILITY_MULTICAST              (0x00000100)
 275 #define MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET   (0x00000080)
 276 #define MPI2_IOCFACTS_CAPABILITY_EEDP                   (0x00000040)
 277 #define MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER        (0x00000010)
 278 #define MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER      (0x00000008)
 279 #define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004)
 280
 281 /* ProtocolFlags */
 282 #define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET              (0x0001)
 283 #define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR           (0x0002)
 284
 285
 286 /****************************************************************************
 287 *  PortFacts message
 288 ****************************************************************************/
 289
 290 /* PortFacts Request message */
 291 typedef struct _MPI2_PORT_FACTS_REQUEST
 292 {
 293     U16                     Reserved1;                      /* 0x00 */
 294     U8                      ChainOffset;                    /* 0x02 */
 295     U8                      Function;                       /* 0x03 */
 296     U16                     Reserved2;                      /* 0x04 */
 297     U8                      PortNumber;                     /* 0x06 */
 298     U8                      MsgFlags;                       /* 0x07 */
 299     U8                      VP_ID;                          /* 0x08 */
 300     U8                      VF_ID;                          /* 0x09 */
 301     U16                     Reserved3;                      /* 0x0A */
 302 } MPI2_PORT_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_PORT_FACTS_REQUEST,
 303   Mpi2PortFactsRequest_t, MPI2_POINTER pMpi2PortFactsRequest_t;
 304
 305 /* PortFacts Reply message */
 306 typedef struct _MPI2_PORT_FACTS_REPLY
 307 {
 308     U16                     Reserved1;                      /* 0x00 */
 309     U8                      MsgLength;                      /* 0x02 */
 310     U8                      Function;                       /* 0x03 */
 311     U16                     Reserved2;                      /* 0x04 */
 312     U8                      PortNumber;                     /* 0x06 */
 313     U8                      MsgFlags;                       /* 0x07 */
 314     U8                      VP_ID;                          /* 0x08 */
 315     U8                      VF_ID;                          /* 0x09 */
 316     U16                     Reserved3;                      /* 0x0A */
 317     U16                     Reserved4;                      /* 0x0C */
 318     U16                     IOCStatus;                      /* 0x0E */
 319     U32                     IOCLogInfo;                     /* 0x10 */
 320     U8                      Reserved5;                      /* 0x14 */
 321     U8                      PortType;                       /* 0x15 */
 322     U16                     Reserved6;                      /* 0x16 */
 323     U16                     MaxPostedCmdBuffers;            /* 0x18 */
 324     U16                     Reserved7;                      /* 0x1A */
 325 } MPI2_PORT_FACTS_REPLY, MPI2_POINTER PTR_MPI2_PORT_FACTS_REPLY,
 326   Mpi2PortFactsReply_t, MPI2_POINTER pMpi2PortFactsReply_t;
 327
 328 /* PortType values */
 329 #define MPI2_PORTFACTS_PORTTYPE_INACTIVE            (0x00)
 330 #define MPI2_PORTFACTS_PORTTYPE_FC                  (0x10)
 331 #define MPI2_PORTFACTS_PORTTYPE_ISCSI               (0x20)
 332 #define MPI2_PORTFACTS_PORTTYPE_SAS_PHYSICAL        (0x30)
 333 #define MPI2_PORTFACTS_PORTTYPE_SAS_VIRTUAL         (0x31)
 334
 335
 336 /****************************************************************************
 337 *  PortEnable message
 338 ****************************************************************************/
 339
 340 /* PortEnable Request message */
 341 typedef struct _MPI2_PORT_ENABLE_REQUEST
 342 {
 343     U16                     Reserved1;                      /* 0x00 */
 344     U8                      ChainOffset;                    /* 0x02 */
 345     U8                      Function;                       /* 0x03 */
 346     U8                      Reserved2;                      /* 0x04 */
 347     U8                      PortFlags;                      /* 0x05 */
 348     U8                      Reserved3;                      /* 0x06 */
 349     U8                      MsgFlags;                       /* 0x07 */
 350     U8                      VP_ID;                          /* 0x08 */
 351     U8                      VF_ID;                          /* 0x09 */
 352     U16                     Reserved4;                      /* 0x0A */
 353 } MPI2_PORT_ENABLE_REQUEST, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REQUEST,
 354   Mpi2PortEnableRequest_t, MPI2_POINTER pMpi2PortEnableRequest_t;
 355
 356
 357 /* PortEnable Reply message */
 358 typedef struct _MPI2_PORT_ENABLE_REPLY
 359 {
 360     U16                     Reserved1;                      /* 0x00 */
 361     U8                      MsgLength;                      /* 0x02 */
 362     U8                      Function;                       /* 0x03 */
 363     U8                      Reserved2;                      /* 0x04 */
 364     U8                      PortFlags;                      /* 0x05 */
 365     U8                      Reserved3;                      /* 0x06 */
 366     U8                      MsgFlags;                       /* 0x07 */
 367     U8                      VP_ID;                          /* 0x08 */
 368     U8                      VF_ID;                          /* 0x09 */
 369     U16                     Reserved4;                      /* 0x0A */
 370     U16                     Reserved5;                      /* 0x0C */
 371     U16                     IOCStatus;                      /* 0x0E */
 372     U32                     IOCLogInfo;                     /* 0x10 */
 373 } MPI2_PORT_ENABLE_REPLY, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REPLY,
 374   Mpi2PortEnableReply_t, MPI2_POINTER pMpi2PortEnableReply_t;
 375
 376
 377 /****************************************************************************
 378 *  EventNotification message
 379 ****************************************************************************/
 380
 381 /* EventNotification Request message */
 382 #define MPI2_EVENT_NOTIFY_EVENTMASK_WORDS           (4)
 383
 384 typedef struct _MPI2_EVENT_NOTIFICATION_REQUEST
 385 {
 386     U16                     Reserved1;                      /* 0x00 */
 387     U8                      ChainOffset;                    /* 0x02 */
 388     U8                      Function;                       /* 0x03 */
 389     U16                     Reserved2;                      /* 0x04 */
 390     U8                      Reserved3;                      /* 0x06 */
 391     U8                      MsgFlags;                       /* 0x07 */
 392     U8                      VP_ID;                          /* 0x08 */
 393     U8                      VF_ID;                          /* 0x09 */
 394     U16                     Reserved4;                      /* 0x0A */
 395     U32                     Reserved5;                      /* 0x0C */
 396     U32                     Reserved6;                      /* 0x10 */
 397     U32                     EventMasks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];/* 0x14 */
 398     U16                     SASBroadcastPrimitiveMasks;     /* 0x24 */
 399     U16                     Reserved7;                      /* 0x26 */
 400     U32                     Reserved8;                      /* 0x28 */
 401 } MPI2_EVENT_NOTIFICATION_REQUEST,
 402   MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REQUEST,
 403   Mpi2EventNotificationRequest_t, MPI2_POINTER pMpi2EventNotificationRequest_t;
 404
 405
 406 /* EventNotification Reply message */
 407 typedef struct _MPI2_EVENT_NOTIFICATION_REPLY
 408 {
 409     U16                     EventDataLength;                /* 0x00 */
 410     U8                      MsgLength;                      /* 0x02 */
 411     U8                      Function;                       /* 0x03 */
 412     U16                     Reserved1;                      /* 0x04 */
 413     U8                      AckRequired;                    /* 0x06 */
 414     U8                      MsgFlags;                       /* 0x07 */
 415     U8                      VP_ID;                          /* 0x08 */
 416     U8                      VF_ID;                          /* 0x09 */
 417     U16                     Reserved2;                      /* 0x0A */
 418     U16                     Reserved3;                      /* 0x0C */
 419     U16                     IOCStatus;                      /* 0x0E */
 420     U32                     IOCLogInfo;                     /* 0x10 */
 421     U16                     Event;                          /* 0x14 */
 422     U16                     Reserved4;                      /* 0x16 */
 423     U32                     EventContext;                   /* 0x18 */
 424     U32                     EventData[1];                   /* 0x1C */
 425 } MPI2_EVENT_NOTIFICATION_REPLY, MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REPLY,
 426   Mpi2EventNotificationReply_t, MPI2_POINTER pMpi2EventNotificationReply_t;
 427
 428 /* AckRequired */
 429 #define MPI2_EVENT_NOTIFICATION_ACK_NOT_REQUIRED    (0x00)
 430 #define MPI2_EVENT_NOTIFICATION_ACK_REQUIRED        (0x01)
 431
 432 /* Event */
 433 #define MPI2_EVENT_LOG_DATA                         (0x0001)
 434 #define MPI2_EVENT_STATE_CHANGE                     (0x0002)
 435 #define MPI2_EVENT_HARD_RESET_RECEIVED              (0x0005)
 436 #define MPI2_EVENT_EVENT_CHANGE                     (0x000A)
 437 #define MPI2_EVENT_TASK_SET_FULL                    (0x000E)
 438 #define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE         (0x000F)
 439 #define MPI2_EVENT_IR_OPERATION_STATUS              (0x0014)
 440 #define MPI2_EVENT_SAS_DISCOVERY                    (0x0016)
 441 #define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE          (0x0017)
 442 #define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE    (0x0018)
 443 #define MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW          (0x0019)
 444 #define MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST         (0x001C)
 445 #define MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE    (0x001D)
 446 #define MPI2_EVENT_IR_VOLUME                        (0x001E)
 447 #define MPI2_EVENT_IR_PHYSICAL_DISK                 (0x001F)
 448 #define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST     (0x0020)
 449 #define MPI2_EVENT_LOG_ENTRY_ADDED                  (0x0021)
 450 #define MPI2_EVENT_SAS_PHY_COUNTER                  (0x0022)
 451
 452
 453 /* Log Entry Added Event data */
 454
 455 /* the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */
 456 #define MPI2_EVENT_DATA_LOG_DATA_LENGTH             (0x1C)
 457
 458 typedef struct _MPI2_EVENT_DATA_LOG_ENTRY_ADDED
 459 {
 460     U64         TimeStamp;                          /* 0x00 */
 461     U32         Reserved1;                          /* 0x08 */
 462     U16         LogSequence;                        /* 0x0C */
 463     U16         LogEntryQualifier;                  /* 0x0E */
 464     U8          VP_ID;                              /* 0x10 */
 465     U8          VF_ID;                              /* 0x11 */
 466     U16         Reserved2;                          /* 0x12 */
 467     U8          LogData[MPI2_EVENT_DATA_LOG_DATA_LENGTH];/* 0x14 */
 468 } MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
 469   MPI2_POINTER PTR_MPI2_EVENT_DATA_LOG_ENTRY_ADDED,
 470   Mpi2EventDataLogEntryAdded_t, MPI2_POINTER pMpi2EventDataLogEntryAdded_t;
 471
 472 /* Hard Reset Received Event data */
 473
 474 typedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED
 475 {
 476     U8                      Reserved1;                      /* 0x00 */
 477     U8                      Port;                           /* 0x01 */
 478     U16                     Reserved2;                      /* 0x02 */
 479 } MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
 480   MPI2_POINTER PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED,
 481   Mpi2EventDataHardResetReceived_t,
 482   MPI2_POINTER pMpi2EventDataHardResetReceived_t;
 483
 484 /* Task Set Full Event data */
 485
 486 typedef struct _MPI2_EVENT_DATA_TASK_SET_FULL
 487 {
 488     U16                     DevHandle;                      /* 0x00 */
 489     U16                     CurrentDepth;                   /* 0x02 */
 490 } MPI2_EVENT_DATA_TASK_SET_FULL, MPI2_POINTER PTR_MPI2_EVENT_DATA_TASK_SET_FULL,
 491   Mpi2EventDataTaskSetFull_t, MPI2_POINTER pMpi2EventDataTaskSetFull_t;
 492
 493
 494 /* SAS Device Status Change Event data */
 495
 496 typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
 497 {
 498     U16                     TaskTag;                        /* 0x00 */
 499     U8                      ReasonCode;                     /* 0x02 */
 500     U8                      Reserved1;                      /* 0x03 */
 501     U8                      ASC;                            /* 0x04 */
 502     U8                      ASCQ;                           /* 0x05 */
 503     U16                     DevHandle;                      /* 0x06 */
 504     U32                     Reserved2;                      /* 0x08 */
 505     U64                     SASAddress;                     /* 0x0C */
 506     U8                      LUN[8];                         /* 0x14 */
 507 } MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 508   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
 509   Mpi2EventDataSasDeviceStatusChange_t,
 510   MPI2_POINTER pMpi2EventDataSasDeviceStatusChange_t;
 511
 512 /* SAS Device Status Change Event data ReasonCode values */
 513 #define MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA                           (0x05)
 514 #define MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED                          (0x07)
 515 #define MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET                (0x08)
 516 #define MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL                  (0x09)
 517 #define MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL              (0x0A)
 518 #define MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL              (0x0B)
 519 #define MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL                  (0x0C)
 520 #define MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION                   (0x0D)
 521 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET               (0x0E)
 522 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL              (0x0F)
 523 #define MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE                    (0x10)
 524 #define MPI2_EVENT_SAS_DEV_STAT_RC_EXPANDER_REDUCED_FUNCTIONALITY       (0x11)
 525 #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_EXPANDER_REDUCED_FUNCTIONALITY   (0x12)
 526
 527
 528 /* Integrated RAID Operation Status Event data */
 529
 530 typedef struct _MPI2_EVENT_DATA_IR_OPERATION_STATUS
 531 {
 532     U16                     VolDevHandle;               /* 0x00 */
 533     U16                     Reserved1;                  /* 0x02 */
 534     U8                      RAIDOperation;              /* 0x04 */
 535     U8                      PercentComplete;            /* 0x05 */
 536     U16                     Reserved2;                  /* 0x06 */
 537     U32                     Resereved3;                 /* 0x08 */
 538 } MPI2_EVENT_DATA_IR_OPERATION_STATUS,
 539   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_OPERATION_STATUS,
 540   Mpi2EventDataIrOperationStatus_t,
 541   MPI2_POINTER pMpi2EventDataIrOperationStatus_t;
 542
 543 /* Integrated RAID Operation Status Event data RAIDOperation values */
 544 #define MPI2_EVENT_IR_RAIDOP_RESYNC                     (0x00)
 545 #define MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION       (0x01)
 546 #define MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK          (0x02)
 547 #define MPI2_EVENT_IR_RAIDOP_BACKGROUND_INIT            (0x03)
 548 #define MPI2_EVENT_IR_RAIDOP_MAKE_DATA_CONSISTENT       (0x04)
 549
 550
 551 /* Integrated RAID Volume Event data */
 552
 553 typedef struct _MPI2_EVENT_DATA_IR_VOLUME
 554 {
 555     U16                     VolDevHandle;               /* 0x00 */
 556     U8                      ReasonCode;                 /* 0x02 */
 557     U8                      Reserved1;                  /* 0x03 */
 558     U32                     NewValue;                   /* 0x04 */
 559     U32                     PreviousValue;              /* 0x08 */
 560 } MPI2_EVENT_DATA_IR_VOLUME, MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_VOLUME,
 561   Mpi2EventDataIrVolume_t, MPI2_POINTER pMpi2EventDataIrVolume_t;
 562
 563 /* Integrated RAID Volume Event data ReasonCode values */
 564 #define MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED        (0x01)
 565 #define MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED    (0x02)
 566 #define MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED           (0x03)
 567
 568
 569 /* Integrated RAID Physical Disk Event data */
 570
 571 typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK
 572 {
 573     U16                     Reserved1;                  /* 0x00 */
 574     U8                      ReasonCode;                 /* 0x02 */
 575     U8                      PhysDiskNum;                /* 0x03 */
 576     U16                     PhysDiskDevHandle;          /* 0x04 */
 577     U16                     Reserved2;                  /* 0x06 */
 578     U16                     Slot;                       /* 0x08 */
 579     U16                     EnclosureHandle;            /* 0x0A */
 580     U32                     NewValue;                   /* 0x0C */
 581     U32                     PreviousValue;              /* 0x10 */
 582 } MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
 583   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_PHYSICAL_DISK,
 584   Mpi2EventDataIrPhysicalDisk_t, MPI2_POINTER pMpi2EventDataIrPhysicalDisk_t;
 585
 586 /* Integrated RAID Physical Disk Event data ReasonCode values */
 587 #define MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED      (0x01)
 588 #define MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED  (0x02)
 589 #define MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED         (0x03)
 590
 591
 592 /* Integrated RAID Configuration Change List Event data */
 593
 594 /*
 595  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 596  * one and check NumElements at runtime.
 597  */
 598 #ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT
 599 #define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT          (1)
 600 #endif
 601
 602 typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT
 603 {
 604     U16                     ElementFlags;               /* 0x00 */
 605     U16                     VolDevHandle;               /* 0x02 */
 606     U8                      ReasonCode;                 /* 0x04 */
 607     U8                      PhysDiskNum;                /* 0x05 */
 608     U16                     PhysDiskDevHandle;          /* 0x06 */
 609 } MPI2_EVENT_IR_CONFIG_ELEMENT, MPI2_POINTER PTR_MPI2_EVENT_IR_CONFIG_ELEMENT,
 610   Mpi2EventIrConfigElement_t, MPI2_POINTER pMpi2EventIrConfigElement_t;
 611
 612 /* IR Configuration Change List Event data ElementFlags values */
 613 #define MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK   (0x000F)
 614 #define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT      (0x0000)
 615 #define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT (0x0001)
 616 #define MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT    (0x0002)
 617
 618 /* IR Configuration Change List Event data ReasonCode values */
 619 #define MPI2_EVENT_IR_CHANGE_RC_ADDED                   (0x01)
 620 #define MPI2_EVENT_IR_CHANGE_RC_REMOVED                 (0x02)
 621 #define MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE               (0x03)
 622 #define MPI2_EVENT_IR_CHANGE_RC_HIDE                    (0x04)
 623 #define MPI2_EVENT_IR_CHANGE_RC_UNHIDE                  (0x05)
 624 #define MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED          (0x06)
 625 #define MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED          (0x07)
 626 #define MPI2_EVENT_IR_CHANGE_RC_PD_CREATED              (0x08)
 627 #define MPI2_EVENT_IR_CHANGE_RC_PD_DELETED              (0x09)
 628
 629 typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST
 630 {
 631     U8                              NumElements;        /* 0x00 */
 632     U8                              Reserved1;          /* 0x01 */
 633     U8                              Reserved2;          /* 0x02 */
 634     U8                              ConfigNum;          /* 0x03 */
 635     U32                             Flags;              /* 0x04 */
 636     MPI2_EVENT_IR_CONFIG_ELEMENT    ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT];    /* 0x08 */
 637 } MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
 638   MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST,
 639   Mpi2EventDataIrConfigChangeList_t,
 640   MPI2_POINTER pMpi2EventDataIrConfigChangeList_t;
 641
 642 /* IR Configuration Change List Event data Flags values */
 643 #define MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG   (0x00000001)
 644
 645
 646 /* SAS Discovery Event data */
 647
 648 typedef struct _MPI2_EVENT_DATA_SAS_DISCOVERY
 649 {
 650     U8                      Flags;                      /* 0x00 */
 651     U8                      ReasonCode;                 /* 0x01 */
 652     U8                      PhysicalPort;               /* 0x02 */
 653     U8                      Reserved1;                  /* 0x03 */
 654     U32                     DiscoveryStatus;            /* 0x04 */
 655 } MPI2_EVENT_DATA_SAS_DISCOVERY,
 656   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DISCOVERY,
 657   Mpi2EventDataSasDiscovery_t, MPI2_POINTER pMpi2EventDataSasDiscovery_t;
 658
 659 /* SAS Discovery Event data Flags values */
 660 #define MPI2_EVENT_SAS_DISC_DEVICE_CHANGE                   (0x02)
 661 #define MPI2_EVENT_SAS_DISC_IN_PROGRESS                     (0x01)
 662
 663 /* SAS Discovery Event data ReasonCode values */
 664 #define MPI2_EVENT_SAS_DISC_RC_STARTED                      (0x01)
 665 #define MPI2_EVENT_SAS_DISC_RC_COMPLETED                    (0x02)
 666
 667 /* SAS Discovery Event data DiscoveryStatus values */
 668 #define MPI2_EVENT_SAS_DISC_DS_MAX_ENCLOSURES_EXCEED            (0x80000000)
 669 #define MPI2_EVENT_SAS_DISC_DS_MAX_EXPANDERS_EXCEED             (0x40000000)
 670 #define MPI2_EVENT_SAS_DISC_DS_MAX_DEVICES_EXCEED               (0x20000000)
 671 #define MPI2_EVENT_SAS_DISC_DS_MAX_TOPO_PHYS_EXCEED             (0x10000000)
 672 #define MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR             (0x08000000)
 673 #define MPI2_EVENT_SAS_DISC_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE    (0x00008000)
 674 #define MPI2_EVENT_SAS_DISC_DS_EXP_MULTI_SUBTRACTIVE            (0x00004000)
 675 #define MPI2_EVENT_SAS_DISC_DS_MULTI_PORT_DOMAIN                (0x00002000)
 676 #define MPI2_EVENT_SAS_DISC_DS_TABLE_TO_SUBTRACTIVE_LINK        (0x00001000)
 677 #define MPI2_EVENT_SAS_DISC_DS_UNSUPPORTED_DEVICE               (0x00000800)
 678 #define MPI2_EVENT_SAS_DISC_DS_TABLE_LINK                       (0x00000400)
 679 #define MPI2_EVENT_SAS_DISC_DS_SUBTRACTIVE_LINK                 (0x00000200)
 680 #define MPI2_EVENT_SAS_DISC_DS_SMP_CRC_ERROR                    (0x00000100)
 681 #define MPI2_EVENT_SAS_DISC_DS_SMP_FUNCTION_FAILED              (0x00000080)
 682 #define MPI2_EVENT_SAS_DISC_DS_INDEX_NOT_EXIST                  (0x00000040)
 683 #define MPI2_EVENT_SAS_DISC_DS_OUT_ROUTE_ENTRIES                (0x00000020)
 684 #define MPI2_EVENT_SAS_DISC_DS_SMP_TIMEOUT                      (0x00000010)
 685 #define MPI2_EVENT_SAS_DISC_DS_MULTIPLE_PORTS                   (0x00000004)
 686 #define MPI2_EVENT_SAS_DISC_DS_UNADDRESSABLE_DEVICE             (0x00000002)
 687 #define MPI2_EVENT_SAS_DISC_DS_LOOP_DETECTED                    (0x00000001)
 688
 689
 690 /* SAS Broadcast Primitive Event data */
 691
 692 typedef struct _MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE
 693 {
 694     U8                      PhyNum;                     /* 0x00 */
 695     U8                      Port;                       /* 0x01 */
 696     U8                      PortWidth;                  /* 0x02 */
 697     U8                      Primitive;                  /* 0x03 */
 698 } MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 699   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
 700   Mpi2EventDataSasBroadcastPrimitive_t,
 701   MPI2_POINTER pMpi2EventDataSasBroadcastPrimitive_t;
 702
 703 /* defines for the Primitive field */
 704 #define MPI2_EVENT_PRIMITIVE_CHANGE                         (0x01)
 705 #define MPI2_EVENT_PRIMITIVE_SES                            (0x02)
 706 #define MPI2_EVENT_PRIMITIVE_EXPANDER                       (0x03)
 707 #define MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT             (0x04)
 708 #define MPI2_EVENT_PRIMITIVE_RESERVED3                      (0x05)
 709 #define MPI2_EVENT_PRIMITIVE_RESERVED4                      (0x06)
 710 #define MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED               (0x07)
 711 #define MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED               (0x08)
 712
 713
 714 /* SAS Initiator Device Status Change Event data */
 715
 716 typedef struct _MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
 717 {
 718     U8                      ReasonCode;                 /* 0x00 */
 719     U8                      PhysicalPort;               /* 0x01 */
 720     U16                     DevHandle;                  /* 0x02 */
 721     U64                     SASAddress;                 /* 0x04 */
 722 } MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 723   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
 724   Mpi2EventDataSasInitDevStatusChange_t,
 725   MPI2_POINTER pMpi2EventDataSasInitDevStatusChange_t;
 726
 727 /* SAS Initiator Device Status Change event ReasonCode values */
 728 #define MPI2_EVENT_SAS_INIT_RC_ADDED                (0x01)
 729 #define MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING       (0x02)
 730
 731
 732 /* SAS Initiator Device Table Overflow Event data */
 733
 734 typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
 735 {
 736     U16                     MaxInit;                    /* 0x00 */
 737     U16                     CurrentInit;                /* 0x02 */
 738     U64                     SASAddress;                 /* 0x04 */
 739 } MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 740   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
 741   Mpi2EventDataSasInitTableOverflow_t,
 742   MPI2_POINTER pMpi2EventDataSasInitTableOverflow_t;
 743
 744
 745 /* SAS Topology Change List Event data */
 746
 747 /*
 748  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
 749  * one and check NumEntries at runtime.
 750  */
 751 #ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT
 752 #define MPI2_EVENT_SAS_TOPO_PHY_COUNT           (1)
 753 #endif
 754
 755 typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY
 756 {
 757     U16                     AttachedDevHandle;          /* 0x00 */
 758     U8                      LinkRate;                   /* 0x02 */
 759     U8                      PhyStatus;                  /* 0x03 */
 760 } MPI2_EVENT_SAS_TOPO_PHY_ENTRY, MPI2_POINTER PTR_MPI2_EVENT_SAS_TOPO_PHY_ENTRY,
 761   Mpi2EventSasTopoPhyEntry_t, MPI2_POINTER pMpi2EventSasTopoPhyEntry_t;
 762
 763 typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST
 764 {
 765     U16                             EnclosureHandle;            /* 0x00 */
 766     U16                             ExpanderDevHandle;          /* 0x02 */
 767     U8                              NumPhys;                    /* 0x04 */
 768     U8                              Reserved1;                  /* 0x05 */
 769     U16                             Reserved2;                  /* 0x06 */
 770     U8                              NumEntries;                 /* 0x08 */
 771     U8                              StartPhyNum;                /* 0x09 */
 772     U8                              ExpStatus;                  /* 0x0A */
 773     U8                              PhysicalPort;               /* 0x0B */
 774     MPI2_EVENT_SAS_TOPO_PHY_ENTRY   PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C*/
 775 } MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
 776   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST,
 777   Mpi2EventDataSasTopologyChangeList_t,
 778   MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t;
 779
 780 /* values for the ExpStatus field */
 781 #define MPI2_EVENT_SAS_TOPO_ES_ADDED                        (0x01)
 782 #define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING               (0x02)
 783 #define MPI2_EVENT_SAS_TOPO_ES_RESPONDING                   (0x03)
 784 #define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING         (0x04)
 785
 786 /* defines for the LinkRate field */
 787 #define MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK                 (0xF0)
 788 #define MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT                (4)
 789 #define MPI2_EVENT_SAS_TOPO_LR_PREV_MASK                    (0x0F)
 790 #define MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT                   (0)
 791
 792 #define MPI2_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE            (0x00)
 793 #define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED                 (0x01)
 794 #define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED           (0x02)
 795 #define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE            (0x03)
 796 #define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR                (0x04)
 797 #define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS        (0x05)
 798 #define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5                     (0x08)
 799 #define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0                     (0x09)
 800 #define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0                     (0x0A)
 801
 802 /* values for the PhyStatus field */
 803 #define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT                (0x80)
 804 #define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE             (0x10)
 805 /* values for the PhyStatus ReasonCode sub-field */
 806 #define MPI2_EVENT_SAS_TOPO_RC_MASK                         (0x0F)
 807 #define MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED                   (0x01)
 808 #define MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING          (0x02)
 809 #define MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED                  (0x03)
 810 #define MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE                    (0x04)
 811 #define MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING         (0x05)
 812
 813
 814 /* SAS Enclosure Device Status Change Event data */
 815
 816 typedef struct _MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE
 817 {
 818     U16                     EnclosureHandle;            /* 0x00 */
 819     U8                      ReasonCode;                 /* 0x02 */
 820     U8                      PhysicalPort;               /* 0x03 */
 821     U64                     EnclosureLogicalID;         /* 0x04 */
 822     U16                     NumSlots;                   /* 0x0C */
 823     U16                     StartSlot;                  /* 0x0E */
 824     U32                     PhyBits;                    /* 0x10 */
 825 } MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
 826   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE,
 827   Mpi2EventDataSasEnclDevStatusChange_t,
 828   MPI2_POINTER pMpi2EventDataSasEnclDevStatusChange_t;
 829
 830 /* SAS Enclosure Device Status Change event ReasonCode values */
 831 #define MPI2_EVENT_SAS_ENCL_RC_ADDED                (0x01)
 832 #define MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING       (0x02)
 833
 834
 835 /* SAS PHY Counter Event data */
 836
 837 typedef struct _MPI2_EVENT_DATA_SAS_PHY_COUNTER {
 838     U64         TimeStamp;          /* 0x00 */
 839     U32         Reserved1;          /* 0x08 */
 840     U8          PhyEventCode;       /* 0x0C */
 841     U8          PhyNum;             /* 0x0D */
 842     U16         Reserved2;          /* 0x0E */
 843     U32         PhyEventInfo;       /* 0x10 */
 844     U8          CounterType;        /* 0x14 */
 845     U8          ThresholdWindow;    /* 0x15 */
 846     U8          TimeUnits;          /* 0x16 */
 847     U8          Reserved3;          /* 0x17 */
 848     U32         EventThreshold;     /* 0x18 */
 849     U16         ThresholdFlags;     /* 0x1C */
 850     U16         Reserved4;          /* 0x1E */
 851 } MPI2_EVENT_DATA_SAS_PHY_COUNTER,
 852   MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_PHY_COUNTER,
 853   Mpi2EventDataSasPhyCounter_t, MPI2_POINTER pMpi2EventDataSasPhyCounter_t;
 854
 855 /* use MPI2_SASPHY3_EVENT_CODE_ values from mpi2_cnfg.h for the
 856  * PhyEventCode field
 857  * use MPI2_SASPHY3_COUNTER_TYPE_ values from mpi2_cnfg.h for the
 858  * CounterType field
 859  * use MPI2_SASPHY3_TIME_UNITS_ values from mpi2_cnfg.h for the
 860  * TimeUnits field
 861  * use MPI2_SASPHY3_TFLAGS_ values from mpi2_cnfg.h for the
 862  * ThresholdFlags field
 863  * */
 864
 865
 866 /****************************************************************************
 867 *  EventAck message
 868 ****************************************************************************/
 869
 870 /* EventAck Request message */
 871 typedef struct _MPI2_EVENT_ACK_REQUEST
 872 {
 873     U16                     Reserved1;                      /* 0x00 */
 874     U8                      ChainOffset;                    /* 0x02 */
 875     U8                      Function;                       /* 0x03 */
 876     U16                     Reserved2;                      /* 0x04 */
 877     U8                      Reserved3;                      /* 0x06 */
 878     U8                      MsgFlags;                       /* 0x07 */
 879     U8                      VP_ID;                          /* 0x08 */
 880     U8                      VF_ID;                          /* 0x09 */
 881     U16                     Reserved4;                      /* 0x0A */
 882     U16                     Event;                          /* 0x0C */
 883     U16                     Reserved5;                      /* 0x0E */
 884     U32                     EventContext;                   /* 0x10 */
 885 } MPI2_EVENT_ACK_REQUEST, MPI2_POINTER PTR_MPI2_EVENT_ACK_REQUEST,
 886   Mpi2EventAckRequest_t, MPI2_POINTER pMpi2EventAckRequest_t;
 887
 888
 889 /* EventAck Reply message */
 890 typedef struct _MPI2_EVENT_ACK_REPLY
 891 {
 892     U16                     Reserved1;                      /* 0x00 */
 893     U8                      MsgLength;                      /* 0x02 */
 894     U8                      Function;                       /* 0x03 */
 895     U16                     Reserved2;                      /* 0x04 */
 896     U8                      Reserved3;                      /* 0x06 */
 897     U8                      MsgFlags;                       /* 0x07 */
 898     U8                      VP_ID;                          /* 0x08 */
 899     U8                      VF_ID;                          /* 0x09 */
 900     U16                     Reserved4;                      /* 0x0A */
 901     U16                     Reserved5;                      /* 0x0C */
 902     U16                     IOCStatus;                      /* 0x0E */
 903     U32                     IOCLogInfo;                     /* 0x10 */
 904 } MPI2_EVENT_ACK_REPLY, MPI2_POINTER PTR_MPI2_EVENT_ACK_REPLY,
 905   Mpi2EventAckReply_t, MPI2_POINTER pMpi2EventAckReply_t;
 906
 907
 908 /****************************************************************************
 909 *  FWDownload message
 910 ****************************************************************************/
 911
 912 /* FWDownload Request message */
 913 typedef struct _MPI2_FW_DOWNLOAD_REQUEST
 914 {
 915     U8                      ImageType;                  /* 0x00 */
 916     U8                      Reserved1;                  /* 0x01 */
 917     U8                      ChainOffset;                /* 0x02 */
 918     U8                      Function;                   /* 0x03 */
 919     U16                     Reserved2;                  /* 0x04 */
 920     U8                      Reserved3;                  /* 0x06 */
 921     U8                      MsgFlags;                   /* 0x07 */
 922     U8                      VP_ID;                      /* 0x08 */
 923     U8                      VF_ID;                      /* 0x09 */
 924     U16                     Reserved4;                  /* 0x0A */
 925     U32                     TotalImageSize;             /* 0x0C */
 926     U32                     Reserved5;                  /* 0x10 */
 927     MPI2_MPI_SGE_UNION      SGL;                        /* 0x14 */
 928 } MPI2_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REQUEST,
 929   Mpi2FWDownloadRequest, MPI2_POINTER pMpi2FWDownloadRequest;
 930
 931 #define MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT   (0x01)
 932
 933 #define MPI2_FW_DOWNLOAD_ITYPE_FW                   (0x01)
 934 #define MPI2_FW_DOWNLOAD_ITYPE_BIOS                 (0x02)
 935 #define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING        (0x06)
 936 #define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1             (0x07)
 937 #define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2             (0x08)
 938 #define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID             (0x09)
 939 #define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK    (0x0B)
 940
 941 /* FWDownload TransactionContext Element */
 942 typedef struct _MPI2_FW_DOWNLOAD_TCSGE
 943 {
 944     U8                      Reserved1;                  /* 0x00 */
 945     U8                      ContextSize;                /* 0x01 */
 946     U8                      DetailsLength;              /* 0x02 */
 947     U8                      Flags;                      /* 0x03 */
 948     U32                     Reserved2;                  /* 0x04 */
 949     U32                     ImageOffset;                /* 0x08 */
 950     U32                     ImageSize;                  /* 0x0C */
 951 } MPI2_FW_DOWNLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_TCSGE,
 952   Mpi2FWDownloadTCSGE_t, MPI2_POINTER pMpi2FWDownloadTCSGE_t;
 953
 954 /* FWDownload Reply message */
 955 typedef struct _MPI2_FW_DOWNLOAD_REPLY
 956 {
 957     U8                      ImageType;                  /* 0x00 */
 958     U8                      Reserved1;                  /* 0x01 */
 959     U8                      MsgLength;                  /* 0x02 */
 960     U8                      Function;                   /* 0x03 */
 961     U16                     Reserved2;                  /* 0x04 */
 962     U8                      Reserved3;                  /* 0x06 */
 963     U8                      MsgFlags;                   /* 0x07 */
 964     U8                      VP_ID;                      /* 0x08 */
 965     U8                      VF_ID;                      /* 0x09 */
 966     U16                     Reserved4;                  /* 0x0A */
 967     U16                     Reserved5;                  /* 0x0C */
 968     U16                     IOCStatus;                  /* 0x0E */
 969     U32                     IOCLogInfo;                 /* 0x10 */
 970 } MPI2_FW_DOWNLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REPLY,
 971   Mpi2FWDownloadReply_t, MPI2_POINTER pMpi2FWDownloadReply_t;
 972
 973
 974 /****************************************************************************
 975 *  FWUpload message
 976 ****************************************************************************/
 977
 978 /* FWUpload Request message */
 979 typedef struct _MPI2_FW_UPLOAD_REQUEST
 980 {
 981     U8                      ImageType;                  /* 0x00 */
 982     U8                      Reserved1;                  /* 0x01 */
 983     U8                      ChainOffset;                /* 0x02 */
 984     U8                      Function;                   /* 0x03 */
 985     U16                     Reserved2;                  /* 0x04 */
 986     U8                      Reserved3;                  /* 0x06 */
 987     U8                      MsgFlags;                   /* 0x07 */
 988     U8                      VP_ID;                      /* 0x08 */
 989     U8                      VF_ID;                      /* 0x09 */
 990     U16                     Reserved4;                  /* 0x0A */
 991     U32                     Reserved5;                  /* 0x0C */
 992     U32                     Reserved6;                  /* 0x10 */
 993     MPI2_MPI_SGE_UNION      SGL;                        /* 0x14 */
 994 } MPI2_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REQUEST,
 995   Mpi2FWUploadRequest_t, MPI2_POINTER pMpi2FWUploadRequest_t;
 996
 997 #define MPI2_FW_UPLOAD_ITYPE_FW_CURRENT         (0x00)
 998 #define MPI2_FW_UPLOAD_ITYPE_FW_FLASH           (0x01)
 999 #define MPI2_FW_UPLOAD_ITYPE_BIOS_FLASH         (0x02)
1000 #define MPI2_FW_UPLOAD_ITYPE_FW_BACKUP          (0x05)
1001 #define MPI2_FW_UPLOAD_ITYPE_MANUFACTURING      (0x06)
1002 #define MPI2_FW_UPLOAD_ITYPE_CONFIG_1           (0x07)
1003 #define MPI2_FW_UPLOAD_ITYPE_CONFIG_2           (0x08)
1004 #define MPI2_FW_UPLOAD_ITYPE_MEGARAID           (0x09)
1005 #define MPI2_FW_UPLOAD_ITYPE_COMPLETE           (0x0A)
1006 #define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK  (0x0B)
1007
1008 typedef struct _MPI2_FW_UPLOAD_TCSGE
1009 {
1010     U8                      Reserved1;                  /* 0x00 */
1011     U8                      ContextSize;                /* 0x01 */
1012     U8                      DetailsLength;              /* 0x02 */
1013     U8                      Flags;                      /* 0x03 */
1014     U32                     Reserved2;                  /* 0x04 */
1015     U32                     ImageOffset;                /* 0x08 */
1016     U32                     ImageSize;                  /* 0x0C */
1017 } MPI2_FW_UPLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_UPLOAD_TCSGE,
1018   Mpi2FWUploadTCSGE_t, MPI2_POINTER pMpi2FWUploadTCSGE_t;
1019
1020 /* FWUpload Reply message */
1021 typedef struct _MPI2_FW_UPLOAD_REPLY
1022 {
1023     U8                      ImageType;                  /* 0x00 */
1024     U8                      Reserved1;                  /* 0x01 */
1025     U8                      MsgLength;                  /* 0x02 */
1026     U8                      Function;                   /* 0x03 */
1027     U16                     Reserved2;                  /* 0x04 */
1028     U8                      Reserved3;                  /* 0x06 */
1029     U8                      MsgFlags;                   /* 0x07 */
1030     U8                      VP_ID;                      /* 0x08 */
1031     U8                      VF_ID;                      /* 0x09 */
1032     U16                     Reserved4;                  /* 0x0A */
1033     U16                     Reserved5;                  /* 0x0C */
1034     U16                     IOCStatus;                  /* 0x0E */
1035     U32                     IOCLogInfo;                 /* 0x10 */
1036     U32                     ActualImageSize;            /* 0x14 */
1037 } MPI2_FW_UPLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REPLY,
1038   Mpi2FWUploadReply_t, MPI2_POINTER pMPi2FWUploadReply_t;
1039
1040
1041 /* FW Image Header */
1042 typedef struct _MPI2_FW_IMAGE_HEADER
1043 {
1044     U32                     Signature;                  /* 0x00 */
1045     U32                     Signature0;                 /* 0x04 */
1046     U32                     Signature1;                 /* 0x08 */
1047     U32                     Signature2;                 /* 0x0C */
1048     MPI2_VERSION_UNION      MPIVersion;                 /* 0x10 */
1049     MPI2_VERSION_UNION      FWVersion;                  /* 0x14 */
1050     MPI2_VERSION_UNION      NVDATAVersion;              /* 0x18 */
1051     MPI2_VERSION_UNION      PackageVersion;             /* 0x1C */
1052     U16                     VendorID;                   /* 0x20 */
1053     U16                     ProductID;                  /* 0x22 */
1054     U16                     ProtocolFlags;              /* 0x24 */
1055     U16                     Reserved26;                 /* 0x26 */
1056     U32                     IOCCapabilities;            /* 0x28 */
1057     U32                     ImageSize;                  /* 0x2C */
1058     U32                     NextImageHeaderOffset;      /* 0x30 */
1059     U32                     Checksum;                   /* 0x34 */
1060     U32                     Reserved38;                 /* 0x38 */
1061     U32                     Reserved3C;                 /* 0x3C */
1062     U32                     Reserved40;                 /* 0x40 */
1063     U32                     Reserved44;                 /* 0x44 */
1064     U32                     Reserved48;                 /* 0x48 */
1065     U32                     Reserved4C;                 /* 0x4C */
1066     U32                     Reserved50;                 /* 0x50 */
1067     U32                     Reserved54;                 /* 0x54 */
1068     U32                     Reserved58;                 /* 0x58 */
1069     U32                     Reserved5C;                 /* 0x5C */
1070     U32                     Reserved60;                 /* 0x60 */
1071     U32                     FirmwareVersionNameWhat;    /* 0x64 */
1072     U8                      FirmwareVersionName[32];    /* 0x68 */
1073     U32                     VendorNameWhat;             /* 0x88 */
1074     U8                      VendorName[32];             /* 0x8C */
1075     U32                     PackageNameWhat;            /* 0x88 */
1076     U8                      PackageName[32];            /* 0x8C */
1077     U32                     ReservedD0;                 /* 0xD0 */
1078     U32                     ReservedD4;                 /* 0xD4 */
1079     U32                     ReservedD8;                 /* 0xD8 */
1080     U32                     ReservedDC;                 /* 0xDC */
1081     U32                     ReservedE0;                 /* 0xE0 */
1082     U32                     ReservedE4;                 /* 0xE4 */
1083     U32                     ReservedE8;                 /* 0xE8 */
1084     U32                     ReservedEC;                 /* 0xEC */
1085     U32                     ReservedF0;                 /* 0xF0 */
1086     U32                     ReservedF4;                 /* 0xF4 */
1087     U32                     ReservedF8;                 /* 0xF8 */
1088     U32                     ReservedFC;                 /* 0xFC */
1089 } MPI2_FW_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_FW_IMAGE_HEADER,
1090   Mpi2FWImageHeader_t, MPI2_POINTER pMpi2FWImageHeader_t;
1091
1092 /* Signature field */
1093 #define MPI2_FW_HEADER_SIGNATURE_OFFSET         (0x00)
1094 #define MPI2_FW_HEADER_SIGNATURE_MASK           (0xFF000000)
1095 #define MPI2_FW_HEADER_SIGNATURE                (0xEA000000)
1096
1097 /* Signature0 field */
1098 #define MPI2_FW_HEADER_SIGNATURE0_OFFSET        (0x04)
1099 #define MPI2_FW_HEADER_SIGNATURE0               (0x5AFAA55A)
1100
1101 /* Signature1 field */
1102 #define MPI2_FW_HEADER_SIGNATURE1_OFFSET        (0x08)
1103 #define MPI2_FW_HEADER_SIGNATURE1               (0xA55AFAA5)
1104
1105 /* Signature2 field */
1106 #define MPI2_FW_HEADER_SIGNATURE2_OFFSET        (0x0C)
1107 #define MPI2_FW_HEADER_SIGNATURE2               (0x5AA55AFA)
1108
1109
1110 /* defines for using the ProductID field */
1111 #define MPI2_FW_HEADER_PID_TYPE_MASK            (0xF000)
1112 #define MPI2_FW_HEADER_PID_TYPE_SAS             (0x2000)
1113
1114 #define MPI2_FW_HEADER_PID_PROD_MASK            (0x0F00)
1115 #define MPI2_FW_HEADER_PID_PROD_A               (0x0000)
1116
1117 #define MPI2_FW_HEADER_PID_FAMILY_MASK          (0x00FF)
1118 /* SAS */
1119 #define MPI2_FW_HEADER_PID_FAMILY_2108_SAS      (0x0010)
1120
1121 /* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
1122
1123 /* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
1124
1125
1126 #define MPI2_FW_HEADER_IMAGESIZE_OFFSET         (0x2C)
1127 #define MPI2_FW_HEADER_NEXTIMAGE_OFFSET         (0x30)
1128 #define MPI2_FW_HEADER_VERNMHWAT_OFFSET         (0x64)
1129
1130 #define MPI2_FW_HEADER_WHAT_SIGNATURE           (0x29232840)
1131
1132 #define MPI2_FW_HEADER_SIZE                     (0x100)
1133
1134
1135 /* Extended Image Header */
1136 typedef struct _MPI2_EXT_IMAGE_HEADER
1137
1138 {
1139     U8                      ImageType;                  /* 0x00 */
1140     U8                      Reserved1;                  /* 0x01 */
1141     U16                     Reserved2;                  /* 0x02 */
1142     U32                     Checksum;                   /* 0x04 */
1143     U32                     ImageSize;                  /* 0x08 */
1144     U32                     NextImageHeaderOffset;      /* 0x0C */
1145     U32                     PackageVersion;             /* 0x10 */
1146     U32                     Reserved3;                  /* 0x14 */
1147     U32                     Reserved4;                  /* 0x18 */
1148     U32                     Reserved5;                  /* 0x1C */
1149     U8                      IdentifyString[32];         /* 0x20 */
1150 } MPI2_EXT_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_EXT_IMAGE_HEADER,
1151   Mpi2ExtImageHeader_t, MPI2_POINTER pMpi2ExtImageHeader_t;
1152
1153 /* useful offsets */
1154 #define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET         (0x00)
1155 #define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET         (0x08)
1156 #define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET         (0x0C)
1157
1158 #define MPI2_EXT_IMAGE_HEADER_SIZE              (0x40)
1159
1160 /* defines for the ImageType field */
1161 #define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED         (0x00)
1162 #define MPI2_EXT_IMAGE_TYPE_FW                  (0x01)
1163 #define MPI2_EXT_IMAGE_TYPE_NVDATA              (0x03)
1164 #define MPI2_EXT_IMAGE_TYPE_BOOTLOADER          (0x04)
1165 #define MPI2_EXT_IMAGE_TYPE_INITIALIZATION      (0x05)
1166 #define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT        (0x06)
1167 #define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES   (0x07)
1168 #define MPI2_EXT_IMAGE_TYPE_MEGARAID            (0x08)
1169
1170 #define MPI2_EXT_IMAGE_TYPE_MAX                 (MPI2_EXT_IMAGE_TYPE_MEGARAID)
1171
1172
1173
1174 /* FLASH Layout Extended Image Data */
1175
1176 /*
1177  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1178  * one and check RegionsPerLayout at runtime.
1179  */
1180 #ifndef MPI2_FLASH_NUMBER_OF_REGIONS
1181 #define MPI2_FLASH_NUMBER_OF_REGIONS        (1)
1182 #endif
1183
1184 /*
1185  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1186  * one and check NumberOfLayouts at runtime.
1187  */
1188 #ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS
1189 #define MPI2_FLASH_NUMBER_OF_LAYOUTS        (1)
1190 #endif
1191
1192 typedef struct _MPI2_FLASH_REGION
1193 {
1194     U8                      RegionType;                 /* 0x00 */
1195     U8                      Reserved1;                  /* 0x01 */
1196     U16                     Reserved2;                  /* 0x02 */
1197     U32                     RegionOffset;               /* 0x04 */
1198     U32                     RegionSize;                 /* 0x08 */
1199     U32                     Reserved3;                  /* 0x0C */
1200 } MPI2_FLASH_REGION, MPI2_POINTER PTR_MPI2_FLASH_REGION,
1201   Mpi2FlashRegion_t, MPI2_POINTER pMpi2FlashRegion_t;
1202
1203 typedef struct _MPI2_FLASH_LAYOUT
1204 {
1205     U32                     FlashSize;                  /* 0x00 */
1206     U32                     Reserved1;                  /* 0x04 */
1207     U32                     Reserved2;                  /* 0x08 */
1208     U32                     Reserved3;                  /* 0x0C */
1209     MPI2_FLASH_REGION       Region[MPI2_FLASH_NUMBER_OF_REGIONS];/* 0x10 */
1210 } MPI2_FLASH_LAYOUT, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT,
1211   Mpi2FlashLayout_t, MPI2_POINTER pMpi2FlashLayout_t;
1212
1213 typedef struct _MPI2_FLASH_LAYOUT_DATA
1214 {
1215     U8                      ImageRevision;              /* 0x00 */
1216     U8                      Reserved1;                  /* 0x01 */
1217     U8                      SizeOfRegion;               /* 0x02 */
1218     U8                      Reserved2;                  /* 0x03 */
1219     U16                     NumberOfLayouts;            /* 0x04 */
1220     U16                     RegionsPerLayout;           /* 0x06 */
1221     U16                     MinimumSectorAlignment;     /* 0x08 */
1222     U16                     Reserved3;                  /* 0x0A */
1223     U32                     Reserved4;                  /* 0x0C */
1224     MPI2_FLASH_LAYOUT       Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];/* 0x10 */
1225 } MPI2_FLASH_LAYOUT_DATA, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT_DATA,
1226   Mpi2FlashLayoutData_t, MPI2_POINTER pMpi2FlashLayoutData_t;
1227
1228 /* defines for the RegionType field */
1229 #define MPI2_FLASH_REGION_UNUSED                (0x00)
1230 #define MPI2_FLASH_REGION_FIRMWARE              (0x01)
1231 #define MPI2_FLASH_REGION_BIOS                  (0x02)
1232 #define MPI2_FLASH_REGION_NVDATA                (0x03)
1233 #define MPI2_FLASH_REGION_FIRMWARE_BACKUP       (0x05)
1234 #define MPI2_FLASH_REGION_MFG_INFORMATION       (0x06)
1235 #define MPI2_FLASH_REGION_CONFIG_1              (0x07)
1236 #define MPI2_FLASH_REGION_CONFIG_2              (0x08)
1237 #define MPI2_FLASH_REGION_MEGARAID              (0x09)
1238 #define MPI2_FLASH_REGION_INIT                  (0x0A)
1239
1240 /* ImageRevision */
1241 #define MPI2_FLASH_LAYOUT_IMAGE_REVISION        (0x00)
1242
1243
1244
1245 /* Supported Devices Extended Image Data */
1246
1247 /*
1248  * Host code (drivers, BIOS, utilities, etc.) should leave this define set to
1249  * one and check NumberOfDevices at runtime.
1250  */
1251 #ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES
1252 #define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES    (1)
1253 #endif
1254
1255 typedef struct _MPI2_SUPPORTED_DEVICE
1256 {
1257     U16                     DeviceID;                   /* 0x00 */
1258     U16                     VendorID;                   /* 0x02 */
1259     U16                     DeviceIDMask;               /* 0x04 */
1260     U16                     Reserved1;                  /* 0x06 */
1261     U8                      LowPCIRev;                  /* 0x08 */
1262     U8                      HighPCIRev;                 /* 0x09 */
1263     U16                     Reserved2;                  /* 0x0A */
1264     U32                     Reserved3;                  /* 0x0C */
1265 } MPI2_SUPPORTED_DEVICE, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICE,
1266   Mpi2SupportedDevice_t, MPI2_POINTER pMpi2SupportedDevice_t;
1267
1268 typedef struct _MPI2_SUPPORTED_DEVICES_DATA
1269 {
1270     U8                      ImageRevision;              /* 0x00 */
1271     U8                      Reserved1;                  /* 0x01 */
1272     U8                      NumberOfDevices;            /* 0x02 */
1273     U8                      Reserved2;                  /* 0x03 */
1274     U32                     Reserved3;                  /* 0x04 */
1275     MPI2_SUPPORTED_DEVICE   SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES]; /* 0x08 */
1276 } MPI2_SUPPORTED_DEVICES_DATA, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICES_DATA,
1277   Mpi2SupportedDevicesData_t, MPI2_POINTER pMpi2SupportedDevicesData_t;
1278
1279 /* ImageRevision */
1280 #define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION   (0x00)
1281
1282
1283 /* Init Extended Image Data */
1284
1285 typedef struct _MPI2_INIT_IMAGE_FOOTER
1286
1287 {
1288     U32                     BootFlags;                  /* 0x00 */
1289     U32                     ImageSize;                  /* 0x04 */
1290     U32                     Signature0;                 /* 0x08 */
1291     U32                     Signature1;                 /* 0x0C */
1292     U32                     Signature2;                 /* 0x10 */
1293     U32                     ResetVector;                /* 0x14 */
1294 } MPI2_INIT_IMAGE_FOOTER, MPI2_POINTER PTR_MPI2_INIT_IMAGE_FOOTER,
1295   Mpi2InitImageFooter_t, MPI2_POINTER pMpi2InitImageFooter_t;
1296
1297 /* defines for the BootFlags field */
1298 #define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET        (0x00)
1299
1300 /* defines for the ImageSize field */
1301 #define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET        (0x04)
1302
1303 /* defines for the Signature0 field */
1304 #define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET       (0x08)
1305 #define MPI2_INIT_IMAGE_SIGNATURE0              (0x5AA55AEA)
1306
1307 /* defines for the Signature1 field */
1308 #define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET       (0x0C)
1309 #define MPI2_INIT_IMAGE_SIGNATURE1              (0xA55AEAA5)
1310
1311 /* defines for the Signature2 field */
1312 #define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET       (0x10)
1313 #define MPI2_INIT_IMAGE_SIGNATURE2              (0x5AEAA55A)
1314
1315 /* Signature fields as individual bytes */
1316 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0        (0xEA)
1317 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1        (0x5A)
1318 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2        (0xA5)
1319 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3        (0x5A)
1320
1321 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4        (0xA5)
1322 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5        (0xEA)
1323 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6        (0x5A)
1324 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7        (0xA5)
1325
1326 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8        (0x5A)
1327 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9        (0xA5)
1328 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A        (0xEA)
1329 #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B        (0x5A)
1330
1331 /* defines for the ResetVector field */
1332 #define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET      (0x14)
1333
1334
1335 #endif
1336