iwlwifi: drop lib80211 dependency
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/ieee80211_radiotap.h>
44 #include <net/mac80211.h>
45
46 #include <asm/div64.h>
47
48 #define DRV_NAME        "iwl3945"
49
50 #include "iwl-fh.h"
51 #include "iwl-3945-fh.h"
52 #include "iwl-commands.h"
53 #include "iwl-sta.h"
54 #include "iwl-3945.h"
55 #include "iwl-helpers.h"
56 #include "iwl-core.h"
57 #include "iwl-dev.h"
58
59 /*
60  * module name, copyright, version, etc.
61  */
62
63 #define DRV_DESCRIPTION \
64 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
65
66 #ifdef CONFIG_IWLWIFI_DEBUG
67 #define VD "d"
68 #else
69 #define VD
70 #endif
71
72 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
73 #define VS "s"
74 #else
75 #define VS
76 #endif
77
78 #define IWL39_VERSION "1.2.26k" VD VS
79 #define DRV_COPYRIGHT   "Copyright(c) 2003-2009 Intel Corporation"
80 #define DRV_AUTHOR     "<ilw@linux.intel.com>"
81 #define DRV_VERSION     IWL39_VERSION
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88
89  /* module parameters */
90 struct iwl_mod_params iwl3945_mod_params = {
91         .num_of_queues = IWL39_NUM_QUEUES, /* Not used */
92         .sw_crypto = 1,
93         .restart_fw = 1,
94         /* the rest are 0 by default */
95 };
96
97 /**
98  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
99  * @priv: eeprom and antenna fields are used to determine antenna flags
100  *
101  * priv->eeprom39  is used to determine if antenna AUX/MAIN are reversed
102  * iwl3945_mod_params.antenna specifies the antenna diversity mode:
103  *
104  * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
105  * IWL_ANTENNA_MAIN      - Force MAIN antenna
106  * IWL_ANTENNA_AUX       - Force AUX antenna
107  */
108 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
109 {
110         struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
111
112         switch (iwl3945_mod_params.antenna) {
113         case IWL_ANTENNA_DIVERSITY:
114                 return 0;
115
116         case IWL_ANTENNA_MAIN:
117                 if (eeprom->antenna_switch_type)
118                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
119                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
120
121         case IWL_ANTENNA_AUX:
122                 if (eeprom->antenna_switch_type)
123                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
124                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
125         }
126
127         /* bad antenna selector value */
128         IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
129                 iwl3945_mod_params.antenna);
130
131         return 0;               /* "diversity" is default if error */
132 }
133
134 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
135                                    struct ieee80211_key_conf *keyconf,
136                                    u8 sta_id)
137 {
138         unsigned long flags;
139         __le16 key_flags = 0;
140         int ret;
141
142         key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
143         key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
144
145         if (sta_id == priv->hw_params.bcast_sta_id)
146                 key_flags |= STA_KEY_MULTICAST_MSK;
147
148         keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
149         keyconf->hw_key_idx = keyconf->keyidx;
150         key_flags &= ~STA_KEY_FLG_INVALID;
151
152         spin_lock_irqsave(&priv->sta_lock, flags);
153         priv->stations[sta_id].keyinfo.alg = keyconf->alg;
154         priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
155         memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
156                keyconf->keylen);
157
158         memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
159                keyconf->keylen);
160
161         if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
162                         == STA_KEY_FLG_NO_ENC)
163                 priv->stations[sta_id].sta.key.key_offset =
164                                  iwl_get_free_ucode_key_index(priv);
165         /* else, we are overriding an existing key => no need to allocated room
166         * in uCode. */
167
168         WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
169                 "no space for a new key");
170
171         priv->stations[sta_id].sta.key.key_flags = key_flags;
172         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
173         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
174
175         IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
176
177         ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
178
179         spin_unlock_irqrestore(&priv->sta_lock, flags);
180
181         return ret;
182 }
183
184 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
185                                   struct ieee80211_key_conf *keyconf,
186                                   u8 sta_id)
187 {
188         return -EOPNOTSUPP;
189 }
190
191 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
192                                   struct ieee80211_key_conf *keyconf,
193                                   u8 sta_id)
194 {
195         return -EOPNOTSUPP;
196 }
197
198 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
199 {
200         unsigned long flags;
201
202         spin_lock_irqsave(&priv->sta_lock, flags);
203         memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
204         memset(&priv->stations[sta_id].sta.key, 0,
205                 sizeof(struct iwl4965_keyinfo));
206         priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
207         priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
208         priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
209         spin_unlock_irqrestore(&priv->sta_lock, flags);
210
211         IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
212         iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
213         return 0;
214 }
215
216 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
217                         struct ieee80211_key_conf *keyconf, u8 sta_id)
218 {
219         int ret = 0;
220
221         keyconf->hw_key_idx = HW_KEY_DYNAMIC;
222
223         switch (keyconf->alg) {
224         case ALG_CCMP:
225                 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
226                 break;
227         case ALG_TKIP:
228                 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
229                 break;
230         case ALG_WEP:
231                 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
232                 break;
233         default:
234                 IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
235                 ret = -EINVAL;
236         }
237
238         IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
239                       keyconf->alg, keyconf->keylen, keyconf->keyidx,
240                       sta_id, ret);
241
242         return ret;
243 }
244
245 static int iwl3945_remove_static_key(struct iwl_priv *priv)
246 {
247         int ret = -EOPNOTSUPP;
248
249         return ret;
250 }
251
252 static int iwl3945_set_static_key(struct iwl_priv *priv,
253                                 struct ieee80211_key_conf *key)
254 {
255         if (key->alg == ALG_WEP)
256                 return -EOPNOTSUPP;
257
258         IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
259         return -EINVAL;
260 }
261
262 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
263 {
264         struct list_head *element;
265
266         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
267                        priv->frames_count);
268
269         while (!list_empty(&priv->free_frames)) {
270                 element = priv->free_frames.next;
271                 list_del(element);
272                 kfree(list_entry(element, struct iwl3945_frame, list));
273                 priv->frames_count--;
274         }
275
276         if (priv->frames_count) {
277                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
278                             priv->frames_count);
279                 priv->frames_count = 0;
280         }
281 }
282
283 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
284 {
285         struct iwl3945_frame *frame;
286         struct list_head *element;
287         if (list_empty(&priv->free_frames)) {
288                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
289                 if (!frame) {
290                         IWL_ERR(priv, "Could not allocate frame!\n");
291                         return NULL;
292                 }
293
294                 priv->frames_count++;
295                 return frame;
296         }
297
298         element = priv->free_frames.next;
299         list_del(element);
300         return list_entry(element, struct iwl3945_frame, list);
301 }
302
303 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
304 {
305         memset(frame, 0, sizeof(*frame));
306         list_add(&frame->list, &priv->free_frames);
307 }
308
309 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
310                                 struct ieee80211_hdr *hdr,
311                                 int left)
312 {
313
314         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
315             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
316              (priv->iw_mode != NL80211_IFTYPE_AP)))
317                 return 0;
318
319         if (priv->ibss_beacon->len > left)
320                 return 0;
321
322         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
323
324         return priv->ibss_beacon->len;
325 }
326
327 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
328 {
329         struct iwl3945_frame *frame;
330         unsigned int frame_size;
331         int rc;
332         u8 rate;
333
334         frame = iwl3945_get_free_frame(priv);
335
336         if (!frame) {
337                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
338                           "command.\n");
339                 return -ENOMEM;
340         }
341
342         rate = iwl_rate_get_lowest_plcp(priv);
343
344         frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
345
346         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
347                               &frame->u.cmd[0]);
348
349         iwl3945_free_frame(priv, frame);
350
351         return rc;
352 }
353
354 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
355 {
356         if (priv->shared_virt)
357                 pci_free_consistent(priv->pci_dev,
358                                     sizeof(struct iwl3945_shared),
359                                     priv->shared_virt,
360                                     priv->shared_phys);
361 }
362
363 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
364                                       struct ieee80211_tx_info *info,
365                                       struct iwl_device_cmd *cmd,
366                                       struct sk_buff *skb_frag,
367                                       int sta_id)
368 {
369         struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
370         struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
371
372         switch (keyinfo->alg) {
373         case ALG_CCMP:
374                 tx->sec_ctl = TX_CMD_SEC_CCM;
375                 memcpy(tx->key, keyinfo->key, keyinfo->keylen);
376                 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
377                 break;
378
379         case ALG_TKIP:
380                 break;
381
382         case ALG_WEP:
383                 tx->sec_ctl = TX_CMD_SEC_WEP |
384                     (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
385
386                 if (keyinfo->keylen == 13)
387                         tx->sec_ctl |= TX_CMD_SEC_KEY128;
388
389                 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
390
391                 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
392                              "with key %d\n", info->control.hw_key->hw_key_idx);
393                 break;
394
395         default:
396                 IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
397                 break;
398         }
399 }
400
401 /*
402  * handle build REPLY_TX command notification.
403  */
404 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
405                                   struct iwl_device_cmd *cmd,
406                                   struct ieee80211_tx_info *info,
407                                   struct ieee80211_hdr *hdr, u8 std_id)
408 {
409         struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
410         __le32 tx_flags = tx->tx_flags;
411         __le16 fc = hdr->frame_control;
412         u8 rc_flags = info->control.rates[0].flags;
413
414         tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
415         if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
416                 tx_flags |= TX_CMD_FLG_ACK_MSK;
417                 if (ieee80211_is_mgmt(fc))
418                         tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
419                 if (ieee80211_is_probe_resp(fc) &&
420                     !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
421                         tx_flags |= TX_CMD_FLG_TSF_MSK;
422         } else {
423                 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
424                 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
425         }
426
427         tx->sta_id = std_id;
428         if (ieee80211_has_morefrags(fc))
429                 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
430
431         if (ieee80211_is_data_qos(fc)) {
432                 u8 *qc = ieee80211_get_qos_ctl(hdr);
433                 tx->tid_tspec = qc[0] & 0xf;
434                 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
435         } else {
436                 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
437         }
438
439         if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
440                 tx_flags |= TX_CMD_FLG_RTS_MSK;
441                 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
442         } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
443                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
444                 tx_flags |= TX_CMD_FLG_CTS_MSK;
445         }
446
447         if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
448                 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
449
450         tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
451         if (ieee80211_is_mgmt(fc)) {
452                 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
453                         tx->timeout.pm_frame_timeout = cpu_to_le16(3);
454                 else
455                         tx->timeout.pm_frame_timeout = cpu_to_le16(2);
456         } else {
457                 tx->timeout.pm_frame_timeout = 0;
458 #ifdef CONFIG_IWLWIFI_LEDS
459                 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
460 #endif
461         }
462
463         tx->driver_txop = 0;
464         tx->tx_flags = tx_flags;
465         tx->next_frame_len = 0;
466 }
467
468 /*
469  * start REPLY_TX command process
470  */
471 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
472 {
473         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
474         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
475         struct iwl3945_tx_cmd *tx;
476         struct iwl_tx_queue *txq = NULL;
477         struct iwl_queue *q = NULL;
478         struct iwl_device_cmd *out_cmd;
479         struct iwl_cmd_meta *out_meta;
480         dma_addr_t phys_addr;
481         dma_addr_t txcmd_phys;
482         int txq_id = skb_get_queue_mapping(skb);
483         u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
484         u8 id;
485         u8 unicast;
486         u8 sta_id;
487         u8 tid = 0;
488         u16 seq_number = 0;
489         __le16 fc;
490         u8 wait_write_ptr = 0;
491         u8 *qc = NULL;
492         unsigned long flags;
493         int rc;
494
495         spin_lock_irqsave(&priv->lock, flags);
496         if (iwl_is_rfkill(priv)) {
497                 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
498                 goto drop_unlock;
499         }
500
501         if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
502                 IWL_ERR(priv, "ERROR: No TX rate available.\n");
503                 goto drop_unlock;
504         }
505
506         unicast = !is_multicast_ether_addr(hdr->addr1);
507         id = 0;
508
509         fc = hdr->frame_control;
510
511 #ifdef CONFIG_IWLWIFI_DEBUG
512         if (ieee80211_is_auth(fc))
513                 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
514         else if (ieee80211_is_assoc_req(fc))
515                 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
516         else if (ieee80211_is_reassoc_req(fc))
517                 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
518 #endif
519
520         /* drop all non-injected data frame if we are not associated */
521         if (ieee80211_is_data(fc) &&
522             !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
523             (!iwl_is_associated(priv) ||
524              ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
525                 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
526                 goto drop_unlock;
527         }
528
529         spin_unlock_irqrestore(&priv->lock, flags);
530
531         hdr_len = ieee80211_hdrlen(fc);
532
533         /* Find (or create) index into station table for destination station */
534         if (info->flags & IEEE80211_TX_CTL_INJECTED)
535                 sta_id = priv->hw_params.bcast_sta_id;
536         else
537                 sta_id = iwl_get_sta_id(priv, hdr);
538         if (sta_id == IWL_INVALID_STATION) {
539                 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
540                                hdr->addr1);
541                 goto drop;
542         }
543
544         IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
545
546         if (ieee80211_is_data_qos(fc)) {
547                 qc = ieee80211_get_qos_ctl(hdr);
548                 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
549                 if (unlikely(tid >= MAX_TID_COUNT))
550                         goto drop;
551                 seq_number = priv->stations[sta_id].tid[tid].seq_number &
552                                 IEEE80211_SCTL_SEQ;
553                 hdr->seq_ctrl = cpu_to_le16(seq_number) |
554                         (hdr->seq_ctrl &
555                                 cpu_to_le16(IEEE80211_SCTL_FRAG));
556                 seq_number += 0x10;
557         }
558
559         /* Descriptor for chosen Tx queue */
560         txq = &priv->txq[txq_id];
561         q = &txq->q;
562
563         spin_lock_irqsave(&priv->lock, flags);
564
565         idx = get_cmd_index(q, q->write_ptr, 0);
566
567         /* Set up driver data for this TFD */
568         memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
569         txq->txb[q->write_ptr].skb[0] = skb;
570
571         /* Init first empty entry in queue's array of Tx/cmd buffers */
572         out_cmd = txq->cmd[idx];
573         out_meta = &txq->meta[idx];
574         tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
575         memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
576         memset(tx, 0, sizeof(*tx));
577
578         /*
579          * Set up the Tx-command (not MAC!) header.
580          * Store the chosen Tx queue and TFD index within the sequence field;
581          * after Tx, uCode's Tx response will return this value so driver can
582          * locate the frame within the tx queue and do post-tx processing.
583          */
584         out_cmd->hdr.cmd = REPLY_TX;
585         out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
586                                 INDEX_TO_SEQ(q->write_ptr)));
587
588         /* Copy MAC header from skb into command buffer */
589         memcpy(tx->hdr, hdr, hdr_len);
590
591
592         if (info->control.hw_key)
593                 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
594
595         /* TODO need this for burst mode later on */
596         iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
597
598         /* set is_hcca to 0; it probably will never be implemented */
599         iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
600
601         /* Total # bytes to be transmitted */
602         len = (u16)skb->len;
603         tx->len = cpu_to_le16(len);
604
605         iwl_dbg_log_tx_data_frame(priv, len, hdr);
606         iwl_update_stats(priv, true, fc, len);
607         tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
608         tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
609
610         if (!ieee80211_has_morefrags(hdr->frame_control)) {
611                 txq->need_update = 1;
612                 if (qc)
613                         priv->stations[sta_id].tid[tid].seq_number = seq_number;
614         } else {
615                 wait_write_ptr = 1;
616                 txq->need_update = 0;
617         }
618
619         IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
620                      le16_to_cpu(out_cmd->hdr.sequence));
621         IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
622         iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
623         iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
624                            ieee80211_hdrlen(fc));
625
626         /*
627          * Use the first empty entry in this queue's command buffer array
628          * to contain the Tx command and MAC header concatenated together
629          * (payload data will be in another buffer).
630          * Size of this varies, due to varying MAC header length.
631          * If end is not dword aligned, we'll have 2 extra bytes at the end
632          * of the MAC header (device reads on dword boundaries).
633          * We'll tell device about this padding later.
634          */
635         len = sizeof(struct iwl3945_tx_cmd) +
636                         sizeof(struct iwl_cmd_header) + hdr_len;
637
638         len_org = len;
639         len = (len + 3) & ~3;
640
641         if (len_org != len)
642                 len_org = 1;
643         else
644                 len_org = 0;
645
646         /* Physical address of this Tx command's header (not MAC header!),
647          * within command buffer array. */
648         txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
649                                     len, PCI_DMA_TODEVICE);
650         /* we do not map meta data ... so we can safely access address to
651          * provide to unmap command*/
652         pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
653         pci_unmap_len_set(out_meta, len, len);
654
655         /* Add buffer containing Tx command and MAC(!) header to TFD's
656          * first entry */
657         priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
658                                                    txcmd_phys, len, 1, 0);
659
660
661         /* Set up TFD's 2nd entry to point directly to remainder of skb,
662          * if any (802.11 null frames have no payload). */
663         len = skb->len - hdr_len;
664         if (len) {
665                 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
666                                            len, PCI_DMA_TODEVICE);
667                 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
668                                                            phys_addr, len,
669                                                            0, U32_PAD(len));
670         }
671
672
673         /* Tell device the write index *just past* this latest filled TFD */
674         q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
675         rc = iwl_txq_update_write_ptr(priv, txq);
676         spin_unlock_irqrestore(&priv->lock, flags);
677
678         if (rc)
679                 return rc;
680
681         if ((iwl_queue_space(q) < q->high_mark)
682             && priv->mac80211_registered) {
683                 if (wait_write_ptr) {
684                         spin_lock_irqsave(&priv->lock, flags);
685                         txq->need_update = 1;
686                         iwl_txq_update_write_ptr(priv, txq);
687                         spin_unlock_irqrestore(&priv->lock, flags);
688                 }
689
690                 iwl_stop_queue(priv, skb_get_queue_mapping(skb));
691         }
692
693         return 0;
694
695 drop_unlock:
696         spin_unlock_irqrestore(&priv->lock, flags);
697 drop:
698         return -1;
699 }
700
701 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
702
703 #include "iwl-spectrum.h"
704
705 #define BEACON_TIME_MASK_LOW    0x00FFFFFF
706 #define BEACON_TIME_MASK_HIGH   0xFF000000
707 #define TIME_UNIT               1024
708
709 /*
710  * extended beacon time format
711  * time in usec will be changed into a 32-bit value in 8:24 format
712  * the high 1 byte is the beacon counts
713  * the lower 3 bytes is the time in usec within one beacon interval
714  */
715
716 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
717 {
718         u32 quot;
719         u32 rem;
720         u32 interval = beacon_interval * 1024;
721
722         if (!interval || !usec)
723                 return 0;
724
725         quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
726         rem = (usec % interval) & BEACON_TIME_MASK_LOW;
727
728         return (quot << 24) + rem;
729 }
730
731 /* base is usually what we get from ucode with each received frame,
732  * the same as HW timer counter counting down
733  */
734
735 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
736 {
737         u32 base_low = base & BEACON_TIME_MASK_LOW;
738         u32 addon_low = addon & BEACON_TIME_MASK_LOW;
739         u32 interval = beacon_interval * TIME_UNIT;
740         u32 res = (base & BEACON_TIME_MASK_HIGH) +
741             (addon & BEACON_TIME_MASK_HIGH);
742
743         if (base_low > addon_low)
744                 res += base_low - addon_low;
745         else if (base_low < addon_low) {
746                 res += interval + base_low - addon_low;
747                 res += (1 << 24);
748         } else
749                 res += (1 << 24);
750
751         return cpu_to_le32(res);
752 }
753
754 static int iwl3945_get_measurement(struct iwl_priv *priv,
755                                struct ieee80211_measurement_params *params,
756                                u8 type)
757 {
758         struct iwl_spectrum_cmd spectrum;
759         struct iwl_rx_packet *res;
760         struct iwl_host_cmd cmd = {
761                 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
762                 .data = (void *)&spectrum,
763                 .flags = CMD_WANT_SKB,
764         };
765         u32 add_time = le64_to_cpu(params->start_time);
766         int rc;
767         int spectrum_resp_status;
768         int duration = le16_to_cpu(params->duration);
769
770         if (iwl_is_associated(priv))
771                 add_time =
772                     iwl3945_usecs_to_beacons(
773                         le64_to_cpu(params->start_time) - priv->last_tsf,
774                         le16_to_cpu(priv->rxon_timing.beacon_interval));
775
776         memset(&spectrum, 0, sizeof(spectrum));
777
778         spectrum.channel_count = cpu_to_le16(1);
779         spectrum.flags =
780             RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
781         spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
782         cmd.len = sizeof(spectrum);
783         spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
784
785         if (iwl_is_associated(priv))
786                 spectrum.start_time =
787                     iwl3945_add_beacon_time(priv->last_beacon_time,
788                                 add_time,
789                                 le16_to_cpu(priv->rxon_timing.beacon_interval));
790         else
791                 spectrum.start_time = 0;
792
793         spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
794         spectrum.channels[0].channel = params->channel;
795         spectrum.channels[0].type = type;
796         if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
797                 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
798                     RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
799
800         rc = iwl_send_cmd_sync(priv, &cmd);
801         if (rc)
802                 return rc;
803
804         res = (struct iwl_rx_packet *)cmd.reply_skb->data;
805         if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
806                 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
807                 rc = -EIO;
808         }
809
810         spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
811         switch (spectrum_resp_status) {
812         case 0:         /* Command will be handled */
813                 if (res->u.spectrum.id != 0xff) {
814                         IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
815                                                 res->u.spectrum.id);
816                         priv->measurement_status &= ~MEASUREMENT_READY;
817                 }
818                 priv->measurement_status |= MEASUREMENT_ACTIVE;
819                 rc = 0;
820                 break;
821
822         case 1:         /* Command will not be handled */
823                 rc = -EAGAIN;
824                 break;
825         }
826
827         dev_kfree_skb_any(cmd.reply_skb);
828
829         return rc;
830 }
831 #endif
832
833 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
834                                struct iwl_rx_mem_buffer *rxb)
835 {
836         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
837         struct iwl_alive_resp *palive;
838         struct delayed_work *pwork;
839
840         palive = &pkt->u.alive_frame;
841
842         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
843                        "0x%01X 0x%01X\n",
844                        palive->is_valid, palive->ver_type,
845                        palive->ver_subtype);
846
847         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
848                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
849                 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
850                        sizeof(struct iwl_alive_resp));
851                 pwork = &priv->init_alive_start;
852         } else {
853                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
854                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
855                        sizeof(struct iwl_alive_resp));
856                 pwork = &priv->alive_start;
857                 iwl3945_disable_events(priv);
858         }
859
860         /* We delay the ALIVE response by 5ms to
861          * give the HW RF Kill time to activate... */
862         if (palive->is_valid == UCODE_VALID_OK)
863                 queue_delayed_work(priv->workqueue, pwork,
864                                    msecs_to_jiffies(5));
865         else
866                 IWL_WARN(priv, "uCode did not respond OK.\n");
867 }
868
869 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
870                                  struct iwl_rx_mem_buffer *rxb)
871 {
872 #ifdef CONFIG_IWLWIFI_DEBUG
873         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
874 #endif
875
876         IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
877         return;
878 }
879
880 static void iwl3945_bg_beacon_update(struct work_struct *work)
881 {
882         struct iwl_priv *priv =
883                 container_of(work, struct iwl_priv, beacon_update);
884         struct sk_buff *beacon;
885
886         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
887         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
888
889         if (!beacon) {
890                 IWL_ERR(priv, "update beacon failed\n");
891                 return;
892         }
893
894         mutex_lock(&priv->mutex);
895         /* new beacon skb is allocated every time; dispose previous.*/
896         if (priv->ibss_beacon)
897                 dev_kfree_skb(priv->ibss_beacon);
898
899         priv->ibss_beacon = beacon;
900         mutex_unlock(&priv->mutex);
901
902         iwl3945_send_beacon_cmd(priv);
903 }
904
905 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
906                                 struct iwl_rx_mem_buffer *rxb)
907 {
908 #ifdef CONFIG_IWLWIFI_DEBUG
909         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
910         struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
911         u8 rate = beacon->beacon_notify_hdr.rate;
912
913         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
914                 "tsf %d %d rate %d\n",
915                 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
916                 beacon->beacon_notify_hdr.failure_frame,
917                 le32_to_cpu(beacon->ibss_mgr_status),
918                 le32_to_cpu(beacon->high_tsf),
919                 le32_to_cpu(beacon->low_tsf), rate);
920 #endif
921
922         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
923             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
924                 queue_work(priv->workqueue, &priv->beacon_update);
925 }
926
927 /* Handle notification from uCode that card's power state is changing
928  * due to software, hardware, or critical temperature RFKILL */
929 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
930                                     struct iwl_rx_mem_buffer *rxb)
931 {
932         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
933         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
934         unsigned long status = priv->status;
935
936         IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
937                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
938                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
939
940         iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
941                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
942
943         if (flags & HW_CARD_DISABLED)
944                 set_bit(STATUS_RF_KILL_HW, &priv->status);
945         else
946                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
947
948
949         iwl_scan_cancel(priv);
950
951         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
952              test_bit(STATUS_RF_KILL_HW, &priv->status)))
953                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
954                                 test_bit(STATUS_RF_KILL_HW, &priv->status));
955         else
956                 wake_up_interruptible(&priv->wait_command_queue);
957 }
958
959 /**
960  * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
961  *
962  * Setup the RX handlers for each of the reply types sent from the uCode
963  * to the host.
964  *
965  * This function chains into the hardware specific files for them to setup
966  * any hardware specific handlers as well.
967  */
968 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
969 {
970         priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
971         priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
972         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
973         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
974         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
975         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
976             iwl_rx_pm_debug_statistics_notif;
977         priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
978
979         /*
980          * The same handler is used for both the REPLY to a discrete
981          * statistics request from the host as well as for the periodic
982          * statistics notifications (after received beacons) from the uCode.
983          */
984         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
985         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
986
987         iwl_setup_spectrum_handlers(priv);
988         iwl_setup_rx_scan_handlers(priv);
989         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
990
991         /* Set up hardware specific Rx handlers */
992         iwl3945_hw_rx_handler_setup(priv);
993 }
994
995 /************************** RX-FUNCTIONS ****************************/
996 /*
997  * Rx theory of operation
998  *
999  * The host allocates 32 DMA target addresses and passes the host address
1000  * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
1001  * 0 to 31
1002  *
1003  * Rx Queue Indexes
1004  * The host/firmware share two index registers for managing the Rx buffers.
1005  *
1006  * The READ index maps to the first position that the firmware may be writing
1007  * to -- the driver can read up to (but not including) this position and get
1008  * good data.
1009  * The READ index is managed by the firmware once the card is enabled.
1010  *
1011  * The WRITE index maps to the last position the driver has read from -- the
1012  * position preceding WRITE is the last slot the firmware can place a packet.
1013  *
1014  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
1015  * WRITE = READ.
1016  *
1017  * During initialization, the host sets up the READ queue position to the first
1018  * INDEX position, and WRITE to the last (READ - 1 wrapped)
1019  *
1020  * When the firmware places a packet in a buffer, it will advance the READ index
1021  * and fire the RX interrupt.  The driver can then query the READ index and
1022  * process as many packets as possible, moving the WRITE index forward as it
1023  * resets the Rx queue buffers with new memory.
1024  *
1025  * The management in the driver is as follows:
1026  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
1027  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
1028  *   to replenish the iwl->rxq->rx_free.
1029  * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
1030  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
1031  *   'processed' and 'read' driver indexes as well)
1032  * + A received packet is processed and handed to the kernel network stack,
1033  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
1034  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
1035  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
1036  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
1037  *   were enough free buffers and RX_STALLED is set it is cleared.
1038  *
1039  *
1040  * Driver sequence:
1041  *
1042  * iwl3945_rx_replenish()     Replenishes rx_free list from rx_used, and calls
1043  *                            iwl3945_rx_queue_restock
1044  * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
1045  *                            queue, updates firmware pointers, and updates
1046  *                            the WRITE index.  If insufficient rx_free buffers
1047  *                            are available, schedules iwl3945_rx_replenish
1048  *
1049  * -- enable interrupts --
1050  * ISR - iwl3945_rx()         Detach iwl_rx_mem_buffers from pool up to the
1051  *                            READ INDEX, detaching the SKB from the pool.
1052  *                            Moves the packet buffer from queue to rx_used.
1053  *                            Calls iwl3945_rx_queue_restock to refill any empty
1054  *                            slots.
1055  * ...
1056  *
1057  */
1058
1059 /**
1060  * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
1061  */
1062 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1063                                           dma_addr_t dma_addr)
1064 {
1065         return cpu_to_le32((u32)dma_addr);
1066 }
1067
1068 /**
1069  * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
1070  *
1071  * If there are slots in the RX queue that need to be restocked,
1072  * and we have free pre-allocated buffers, fill the ranks as much
1073  * as we can, pulling from rx_free.
1074  *
1075  * This moves the 'write' index forward to catch up with 'processed', and
1076  * also updates the memory address in the firmware to reference the new
1077  * target buffer.
1078  */
1079 static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
1080 {
1081         struct iwl_rx_queue *rxq = &priv->rxq;
1082         struct list_head *element;
1083         struct iwl_rx_mem_buffer *rxb;
1084         unsigned long flags;
1085         int write, rc;
1086
1087         spin_lock_irqsave(&rxq->lock, flags);
1088         write = rxq->write & ~0x7;
1089         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
1090                 /* Get next free Rx buffer, remove from free list */
1091                 element = rxq->rx_free.next;
1092                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1093                 list_del(element);
1094
1095                 /* Point to Rx buffer via next RBD in circular buffer */
1096                 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
1097                 rxq->queue[rxq->write] = rxb;
1098                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1099                 rxq->free_count--;
1100         }
1101         spin_unlock_irqrestore(&rxq->lock, flags);
1102         /* If the pre-allocated buffer pool is dropping low, schedule to
1103          * refill it */
1104         if (rxq->free_count <= RX_LOW_WATERMARK)
1105                 queue_work(priv->workqueue, &priv->rx_replenish);
1106
1107
1108         /* If we've added more space for the firmware to place data, tell it.
1109          * Increment device's write pointer in multiples of 8. */
1110         if ((rxq->write_actual != (rxq->write & ~0x7))
1111             || (abs(rxq->write - rxq->read) > 7)) {
1112                 spin_lock_irqsave(&rxq->lock, flags);
1113                 rxq->need_update = 1;
1114                 spin_unlock_irqrestore(&rxq->lock, flags);
1115                 rc = iwl_rx_queue_update_write_ptr(priv, rxq);
1116                 if (rc)
1117                         return rc;
1118         }
1119
1120         return 0;
1121 }
1122
1123 /**
1124  * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1125  *
1126  * When moving to rx_free an SKB is allocated for the slot.
1127  *
1128  * Also restock the Rx queue via iwl3945_rx_queue_restock.
1129  * This is called as a scheduled work item (except for during initialization)
1130  */
1131 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1132 {
1133         struct iwl_rx_queue *rxq = &priv->rxq;
1134         struct list_head *element;
1135         struct iwl_rx_mem_buffer *rxb;
1136         struct sk_buff *skb;
1137         unsigned long flags;
1138
1139         while (1) {
1140                 spin_lock_irqsave(&rxq->lock, flags);
1141
1142                 if (list_empty(&rxq->rx_used)) {
1143                         spin_unlock_irqrestore(&rxq->lock, flags);
1144                         return;
1145                 }
1146                 spin_unlock_irqrestore(&rxq->lock, flags);
1147
1148                 if (rxq->free_count > RX_LOW_WATERMARK)
1149                         priority |= __GFP_NOWARN;
1150                 /* Alloc a new receive buffer */
1151                 skb = alloc_skb(priv->hw_params.rx_buf_size, priority);
1152                 if (!skb) {
1153                         if (net_ratelimit())
1154                                 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1155                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1156                             net_ratelimit())
1157                                 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1158                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
1159                                          rxq->free_count);
1160                         /* We don't reschedule replenish work here -- we will
1161                          * call the restock method and if it still needs
1162                          * more buffers it will schedule replenish */
1163                         break;
1164                 }
1165
1166                 spin_lock_irqsave(&rxq->lock, flags);
1167                 if (list_empty(&rxq->rx_used)) {
1168                         spin_unlock_irqrestore(&rxq->lock, flags);
1169                         dev_kfree_skb_any(skb);
1170                         return;
1171                 }
1172                 element = rxq->rx_used.next;
1173                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1174                 list_del(element);
1175                 spin_unlock_irqrestore(&rxq->lock, flags);
1176
1177                 rxb->skb = skb;
1178
1179                 /* If radiotap head is required, reserve some headroom here.
1180                  * The physical head count is a variable rx_stats->phy_count.
1181                  * We reserve 4 bytes here. Plus these extra bytes, the
1182                  * headroom of the physical head should be enough for the
1183                  * radiotap head that iwl3945 supported. See iwl3945_rt.
1184                  */
1185                 skb_reserve(rxb->skb, 4);
1186
1187                 /* Get physical address of RB/SKB */
1188                 rxb->real_dma_addr = pci_map_single(priv->pci_dev,
1189                                                 rxb->skb->data,
1190                                                 priv->hw_params.rx_buf_size,
1191                                                 PCI_DMA_FROMDEVICE);
1192
1193                 spin_lock_irqsave(&rxq->lock, flags);
1194                 list_add_tail(&rxb->list, &rxq->rx_free);
1195                 priv->alloc_rxb_skb++;
1196                 rxq->free_count++;
1197                 spin_unlock_irqrestore(&rxq->lock, flags);
1198         }
1199 }
1200
1201 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1202 {
1203         unsigned long flags;
1204         int i;
1205         spin_lock_irqsave(&rxq->lock, flags);
1206         INIT_LIST_HEAD(&rxq->rx_free);
1207         INIT_LIST_HEAD(&rxq->rx_used);
1208         /* Fill the rx_used queue with _all_ of the Rx buffers */
1209         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1210                 /* In the reset function, these buffers may have been allocated
1211                  * to an SKB, so we need to unmap and free potential storage */
1212                 if (rxq->pool[i].skb != NULL) {
1213                         pci_unmap_single(priv->pci_dev,
1214                                          rxq->pool[i].real_dma_addr,
1215                                          priv->hw_params.rx_buf_size,
1216                                          PCI_DMA_FROMDEVICE);
1217                         priv->alloc_rxb_skb--;
1218                         dev_kfree_skb(rxq->pool[i].skb);
1219                         rxq->pool[i].skb = NULL;
1220                 }
1221                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1222         }
1223
1224         /* Set us so that we have processed and used all buffers, but have
1225          * not restocked the Rx queue with fresh buffers */
1226         rxq->read = rxq->write = 0;
1227         rxq->free_count = 0;
1228         rxq->write_actual = 0;
1229         spin_unlock_irqrestore(&rxq->lock, flags);
1230 }
1231
1232 void iwl3945_rx_replenish(void *data)
1233 {
1234         struct iwl_priv *priv = data;
1235         unsigned long flags;
1236
1237         iwl3945_rx_allocate(priv, GFP_KERNEL);
1238
1239         spin_lock_irqsave(&priv->lock, flags);
1240         iwl3945_rx_queue_restock(priv);
1241         spin_unlock_irqrestore(&priv->lock, flags);
1242 }
1243
1244 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1245 {
1246         iwl3945_rx_allocate(priv, GFP_ATOMIC);
1247
1248         iwl3945_rx_queue_restock(priv);
1249 }
1250
1251
1252 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1253  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1254  * This free routine walks the list of POOL entries and if SKB is set to
1255  * non NULL it is unmapped and freed
1256  */
1257 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1258 {
1259         int i;
1260         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1261                 if (rxq->pool[i].skb != NULL) {
1262                         pci_unmap_single(priv->pci_dev,
1263                                          rxq->pool[i].real_dma_addr,
1264                                          priv->hw_params.rx_buf_size,
1265                                          PCI_DMA_FROMDEVICE);
1266                         dev_kfree_skb(rxq->pool[i].skb);
1267                 }
1268         }
1269
1270         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1271                             rxq->dma_addr);
1272         pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
1273                             rxq->rb_stts, rxq->rb_stts_dma);
1274         rxq->bd = NULL;
1275         rxq->rb_stts  = NULL;
1276 }
1277
1278
1279 /* Convert linear signal-to-noise ratio into dB */
1280 static u8 ratio2dB[100] = {
1281 /*       0   1   2   3   4   5   6   7   8   9 */
1282          0,  0,  6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1283         20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1284         26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1285         29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1286         32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1287         34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1288         36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1289         37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1290         38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1291         39, 39, 39, 39, 39, 40, 40, 40, 40, 40  /* 90 - 99 */
1292 };
1293
1294 /* Calculates a relative dB value from a ratio of linear
1295  *   (i.e. not dB) signal levels.
1296  * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1297 int iwl3945_calc_db_from_ratio(int sig_ratio)
1298 {
1299         /* 1000:1 or higher just report as 60 dB */
1300         if (sig_ratio >= 1000)
1301                 return 60;
1302
1303         /* 100:1 or higher, divide by 10 and use table,
1304          *   add 20 dB to make up for divide by 10 */
1305         if (sig_ratio >= 100)
1306                 return 20 + (int)ratio2dB[sig_ratio/10];
1307
1308         /* We shouldn't see this */
1309         if (sig_ratio < 1)
1310                 return 0;
1311
1312         /* Use table for ratios 1:1 - 99:1 */
1313         return (int)ratio2dB[sig_ratio];
1314 }
1315
1316 #define PERFECT_RSSI (-20) /* dBm */
1317 #define WORST_RSSI (-95)   /* dBm */
1318 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1319
1320 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
1321  * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1322  *   about formulas used below. */
1323 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
1324 {
1325         int sig_qual;
1326         int degradation = PERFECT_RSSI - rssi_dbm;
1327
1328         /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1329          * as indicator; formula is (signal dbm - noise dbm).
1330          * SNR at or above 40 is a great signal (100%).
1331          * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1332          * Weakest usable signal is usually 10 - 15 dB SNR. */
1333         if (noise_dbm) {
1334                 if (rssi_dbm - noise_dbm >= 40)
1335                         return 100;
1336                 else if (rssi_dbm < noise_dbm)
1337                         return 0;
1338                 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1339
1340         /* Else use just the signal level.
1341          * This formula is a least squares fit of data points collected and
1342          *   compared with a reference system that had a percentage (%) display
1343          *   for signal quality. */
1344         } else
1345                 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1346                             (15 * RSSI_RANGE + 62 * degradation)) /
1347                            (RSSI_RANGE * RSSI_RANGE);
1348
1349         if (sig_qual > 100)
1350                 sig_qual = 100;
1351         else if (sig_qual < 1)
1352                 sig_qual = 0;
1353
1354         return sig_qual;
1355 }
1356
1357 /**
1358  * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1359  *
1360  * Uses the priv->rx_handlers callback function array to invoke
1361  * the appropriate handlers, including command responses,
1362  * frame-received notifications, and other notifications.
1363  */
1364 static void iwl3945_rx_handle(struct iwl_priv *priv)
1365 {
1366         struct iwl_rx_mem_buffer *rxb;
1367         struct iwl_rx_packet *pkt;
1368         struct iwl_rx_queue *rxq = &priv->rxq;
1369         u32 r, i;
1370         int reclaim;
1371         unsigned long flags;
1372         u8 fill_rx = 0;
1373         u32 count = 8;
1374         int total_empty = 0;
1375
1376         /* uCode's read index (stored in shared DRAM) indicates the last Rx
1377          * buffer that the driver may process (last buffer filled by ucode). */
1378         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
1379         i = rxq->read;
1380
1381         /* calculate total frames need to be restock after handling RX */
1382         total_empty = r - priv->rxq.write_actual;
1383         if (total_empty < 0)
1384                 total_empty += RX_QUEUE_SIZE;
1385
1386         if (total_empty > (RX_QUEUE_SIZE / 2))
1387                 fill_rx = 1;
1388         /* Rx interrupt, but nothing sent from uCode */
1389         if (i == r)
1390                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1391
1392         while (i != r) {
1393                 rxb = rxq->queue[i];
1394
1395                 /* If an RXB doesn't have a Rx queue slot associated with it,
1396                  * then a bug has been introduced in the queue refilling
1397                  * routines -- catch it here */
1398                 BUG_ON(rxb == NULL);
1399
1400                 rxq->queue[i] = NULL;
1401
1402                 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
1403                                 priv->hw_params.rx_buf_size,
1404                                 PCI_DMA_FROMDEVICE);
1405                 pkt = (struct iwl_rx_packet *)rxb->skb->data;
1406
1407                 /* Reclaim a command buffer only if this packet is a response
1408                  *   to a (driver-originated) command.
1409                  * If the packet (e.g. Rx frame) originated from uCode,
1410                  *   there is no command buffer to reclaim.
1411                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1412                  *   but apparently a few don't get set; catch them here. */
1413                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1414                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1415                         (pkt->hdr.cmd != REPLY_TX);
1416
1417                 /* Based on type of command response or notification,
1418                  *   handle those that need handling via function in
1419                  *   rx_handlers table.  See iwl3945_setup_rx_handlers() */
1420                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1421                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1422                                 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1423                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1424                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1425                 } else {
1426                         /* No handling needed */
1427                         IWL_DEBUG_RX(priv, "r %d i %d No handler needed for %s, 0x%02x\n",
1428                                 r, i, get_cmd_string(pkt->hdr.cmd),
1429                                 pkt->hdr.cmd);
1430                 }
1431
1432                 if (reclaim) {
1433                         /* Invoke any callbacks, transfer the skb to caller, and
1434                          * fire off the (possibly) blocking iwl_send_cmd()
1435                          * as we reclaim the driver command queue */
1436                         if (rxb && rxb->skb)
1437                                 iwl_tx_cmd_complete(priv, rxb);
1438                         else
1439                                 IWL_WARN(priv, "Claim null rxb?\n");
1440                 }
1441
1442                 /* For now we just don't re-use anything.  We can tweak this
1443                  * later to try and re-use notification packets and SKBs that
1444                  * fail to Rx correctly */
1445                 if (rxb->skb != NULL) {
1446                         priv->alloc_rxb_skb--;
1447                         dev_kfree_skb_any(rxb->skb);
1448                         rxb->skb = NULL;
1449                 }
1450
1451                 spin_lock_irqsave(&rxq->lock, flags);
1452                 list_add_tail(&rxb->list, &priv->rxq.rx_used);
1453                 spin_unlock_irqrestore(&rxq->lock, flags);
1454                 i = (i + 1) & RX_QUEUE_MASK;
1455                 /* If there are a lot of unused frames,
1456                  * restock the Rx queue so ucode won't assert. */
1457                 if (fill_rx) {
1458                         count++;
1459                         if (count >= 8) {
1460                                 priv->rxq.read = i;
1461                                 iwl3945_rx_replenish_now(priv);
1462                                 count = 0;
1463                         }
1464                 }
1465         }
1466
1467         /* Backtrack one entry */
1468         priv->rxq.read = i;
1469         if (fill_rx)
1470                 iwl3945_rx_replenish_now(priv);
1471         else
1472                 iwl3945_rx_queue_restock(priv);
1473 }
1474
1475 /* call this function to flush any scheduled tasklet */
1476 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1477 {
1478         /* wait to make sure we flush pending tasklet*/
1479         synchronize_irq(priv->pci_dev->irq);
1480         tasklet_kill(&priv->irq_tasklet);
1481 }
1482
1483 #ifdef CONFIG_IWLWIFI_DEBUG
1484 static const char *desc_lookup(int i)
1485 {
1486         switch (i) {
1487         case 1:
1488                 return "FAIL";
1489         case 2:
1490                 return "BAD_PARAM";
1491         case 3:
1492                 return "BAD_CHECKSUM";
1493         case 4:
1494                 return "NMI_INTERRUPT";
1495         case 5:
1496                 return "SYSASSERT";
1497         case 6:
1498                 return "FATAL_ERROR";
1499         }
1500
1501         return "UNKNOWN";
1502 }
1503
1504 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1505 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1506
1507 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1508 {
1509         u32 i;
1510         u32 desc, time, count, base, data1;
1511         u32 blink1, blink2, ilink1, ilink2;
1512
1513         base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1514
1515         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1516                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1517                 return;
1518         }
1519
1520
1521         count = iwl_read_targ_mem(priv, base);
1522
1523         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1524                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1525                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1526                         priv->status, count);
1527         }
1528
1529         IWL_ERR(priv, "Desc       Time       asrtPC  blink2 "
1530                   "ilink1  nmiPC   Line\n");
1531         for (i = ERROR_START_OFFSET;
1532              i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1533              i += ERROR_ELEM_SIZE) {
1534                 desc = iwl_read_targ_mem(priv, base + i);
1535                 time =
1536                     iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1537                 blink1 =
1538                     iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1539                 blink2 =
1540                     iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1541                 ilink1 =
1542                     iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1543                 ilink2 =
1544                     iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1545                 data1 =
1546                     iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1547
1548                 IWL_ERR(priv,
1549                         "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1550                         desc_lookup(desc), desc, time, blink1, blink2,
1551                         ilink1, ilink2, data1);
1552         }
1553
1554 }
1555
1556 #define EVENT_START_OFFSET  (6 * sizeof(u32))
1557
1558 /**
1559  * iwl3945_print_event_log - Dump error event log to syslog
1560  *
1561  */
1562 static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1563                                 u32 num_events, u32 mode)
1564 {
1565         u32 i;
1566         u32 base;       /* SRAM byte address of event log header */
1567         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1568         u32 ptr;        /* SRAM byte address of log data */
1569         u32 ev, time, data; /* event log data */
1570
1571         if (num_events == 0)
1572                 return;
1573
1574         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1575
1576         if (mode == 0)
1577                 event_size = 2 * sizeof(u32);
1578         else
1579                 event_size = 3 * sizeof(u32);
1580
1581         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1582
1583         /* "time" is actually "data" for mode 0 (no timestamp).
1584          * place event id # at far right for easier visual parsing. */
1585         for (i = 0; i < num_events; i++) {
1586                 ev = iwl_read_targ_mem(priv, ptr);
1587                 ptr += sizeof(u32);
1588                 time = iwl_read_targ_mem(priv, ptr);
1589                 ptr += sizeof(u32);
1590                 if (mode == 0) {
1591                         /* data, ev */
1592                         IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1593                 } else {
1594                         data = iwl_read_targ_mem(priv, ptr);
1595                         ptr += sizeof(u32);
1596                         IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
1597                 }
1598         }
1599 }
1600
1601 void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1602 {
1603         u32 base;       /* SRAM byte address of event log header */
1604         u32 capacity;   /* event log capacity in # entries */
1605         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1606         u32 num_wraps;  /* # times uCode wrapped to top of log */
1607         u32 next_entry; /* index of next entry to be written by uCode */
1608         u32 size;       /* # entries that we'll print */
1609
1610         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1611         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1612                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1613                 return;
1614         }
1615
1616         /* event log header */
1617         capacity = iwl_read_targ_mem(priv, base);
1618         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1619         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1620         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1621
1622         size = num_wraps ? capacity : next_entry;
1623
1624         /* bail out if nothing in log */
1625         if (size == 0) {
1626                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1627                 return;
1628         }
1629
1630         IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1631                   size, num_wraps);
1632
1633         /* if uCode has wrapped back to top of log, start at the oldest entry,
1634          * i.e the next one that uCode would fill. */
1635         if (num_wraps)
1636                 iwl3945_print_event_log(priv, next_entry,
1637                                     capacity - next_entry, mode);
1638
1639         /* (then/else) start at top of log */
1640         iwl3945_print_event_log(priv, 0, next_entry, mode);
1641
1642 }
1643 #else
1644 void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1645 {
1646 }
1647
1648 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1649 {
1650 }
1651
1652 #endif
1653
1654 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1655 {
1656         u32 inta, handled = 0;
1657         u32 inta_fh;
1658         unsigned long flags;
1659 #ifdef CONFIG_IWLWIFI_DEBUG
1660         u32 inta_mask;
1661 #endif
1662
1663         spin_lock_irqsave(&priv->lock, flags);
1664
1665         /* Ack/clear/reset pending uCode interrupts.
1666          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1667          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1668         inta = iwl_read32(priv, CSR_INT);
1669         iwl_write32(priv, CSR_INT, inta);
1670
1671         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1672          * Any new interrupts that happen after this, either while we're
1673          * in this tasklet, or later, will show up in next ISR/tasklet. */
1674         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1675         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1676
1677 #ifdef CONFIG_IWLWIFI_DEBUG
1678         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1679                 /* just for debug */
1680                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1681                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1682                               inta, inta_mask, inta_fh);
1683         }
1684 #endif
1685
1686         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1687          * atomic, make sure that inta covers all the interrupts that
1688          * we've discovered, even if FH interrupt came in just after
1689          * reading CSR_INT. */
1690         if (inta_fh & CSR39_FH_INT_RX_MASK)
1691                 inta |= CSR_INT_BIT_FH_RX;
1692         if (inta_fh & CSR39_FH_INT_TX_MASK)
1693                 inta |= CSR_INT_BIT_FH_TX;
1694
1695         /* Now service all interrupt bits discovered above. */
1696         if (inta & CSR_INT_BIT_HW_ERR) {
1697                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1698
1699                 /* Tell the device to stop sending interrupts */
1700                 iwl_disable_interrupts(priv);
1701
1702                 priv->isr_stats.hw++;
1703                 iwl_irq_handle_error(priv);
1704
1705                 handled |= CSR_INT_BIT_HW_ERR;
1706
1707                 spin_unlock_irqrestore(&priv->lock, flags);
1708
1709                 return;
1710         }
1711
1712 #ifdef CONFIG_IWLWIFI_DEBUG
1713         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1714                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1715                 if (inta & CSR_INT_BIT_SCD) {
1716                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1717                                       "the frame/frames.\n");
1718                         priv->isr_stats.sch++;
1719                 }
1720
1721                 /* Alive notification via Rx interrupt will do the real work */
1722                 if (inta & CSR_INT_BIT_ALIVE) {
1723                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1724                         priv->isr_stats.alive++;
1725                 }
1726         }
1727 #endif
1728         /* Safely ignore these bits for debug checks below */
1729         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1730
1731         /* Error detected by uCode */
1732         if (inta & CSR_INT_BIT_SW_ERR) {
1733                 IWL_ERR(priv, "Microcode SW error detected. "
1734                         "Restarting 0x%X.\n", inta);
1735                 priv->isr_stats.sw++;
1736                 priv->isr_stats.sw_err = inta;
1737                 iwl_irq_handle_error(priv);
1738                 handled |= CSR_INT_BIT_SW_ERR;
1739         }
1740
1741         /* uCode wakes up after power-down sleep */
1742         if (inta & CSR_INT_BIT_WAKEUP) {
1743                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1744                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1745                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1746                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1747                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1748                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1749                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1750                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1751
1752                 priv->isr_stats.wakeup++;
1753                 handled |= CSR_INT_BIT_WAKEUP;
1754         }
1755
1756         /* All uCode command responses, including Tx command responses,
1757          * Rx "responses" (frame-received notification), and other
1758          * notifications from uCode come through here*/
1759         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1760                 iwl3945_rx_handle(priv);
1761                 priv->isr_stats.rx++;
1762                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1763         }
1764
1765         if (inta & CSR_INT_BIT_FH_TX) {
1766                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1767                 priv->isr_stats.tx++;
1768
1769                 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1770                 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1771                                         (FH39_SRVC_CHNL), 0x0);
1772                 handled |= CSR_INT_BIT_FH_TX;
1773         }
1774
1775         if (inta & ~handled) {
1776                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1777                 priv->isr_stats.unhandled++;
1778         }
1779
1780         if (inta & ~priv->inta_mask) {
1781                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1782                          inta & ~priv->inta_mask);
1783                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1784         }
1785
1786         /* Re-enable all interrupts */
1787         /* only Re-enable if disabled by irq */
1788         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1789                 iwl_enable_interrupts(priv);
1790
1791 #ifdef CONFIG_IWLWIFI_DEBUG
1792         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1793                 inta = iwl_read32(priv, CSR_INT);
1794                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1795                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1796                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1797                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1798         }
1799 #endif
1800         spin_unlock_irqrestore(&priv->lock, flags);
1801 }
1802
1803 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1804                                          enum ieee80211_band band,
1805                                      u8 is_active, u8 n_probes,
1806                                      struct iwl3945_scan_channel *scan_ch)
1807 {
1808         struct ieee80211_channel *chan;
1809         const struct ieee80211_supported_band *sband;
1810         const struct iwl_channel_info *ch_info;
1811         u16 passive_dwell = 0;
1812         u16 active_dwell = 0;
1813         int added, i;
1814
1815         sband = iwl_get_hw_mode(priv, band);
1816         if (!sband)
1817                 return 0;
1818
1819         active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1820         passive_dwell = iwl_get_passive_dwell_time(priv, band);
1821
1822         if (passive_dwell <= active_dwell)
1823                 passive_dwell = active_dwell + 1;
1824
1825         for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1826                 chan = priv->scan_request->channels[i];
1827
1828                 if (chan->band != band)
1829                         continue;
1830
1831                 scan_ch->channel = chan->hw_value;
1832
1833                 ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
1834                 if (!is_channel_valid(ch_info)) {
1835                         IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1836                                        scan_ch->channel);
1837                         continue;
1838                 }
1839
1840                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1841                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1842                 /* If passive , set up for auto-switch
1843                  *  and use long active_dwell time.
1844                  */
1845                 if (!is_active || is_channel_passive(ch_info) ||
1846                     (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1847                         scan_ch->type = 0;      /* passive */
1848                         if (IWL_UCODE_API(priv->ucode_ver) == 1)
1849                                 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1850                 } else {
1851                         scan_ch->type = 1;      /* active */
1852                 }
1853
1854                 /* Set direct probe bits. These may be used both for active
1855                  * scan channels (probes gets sent right away),
1856                  * or for passive channels (probes get se sent only after
1857                  * hearing clear Rx packet).*/
1858                 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1859                         if (n_probes)
1860                                 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1861                 } else {
1862                         /* uCode v1 does not allow setting direct probe bits on
1863                          * passive channel. */
1864                         if ((scan_ch->type & 1) && n_probes)
1865                                 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1866                 }
1867
1868                 /* Set txpower levels to defaults */
1869                 scan_ch->tpc.dsp_atten = 110;
1870                 /* scan_pwr_info->tpc.dsp_atten; */
1871
1872                 /*scan_pwr_info->tpc.tx_gain; */
1873                 if (band == IEEE80211_BAND_5GHZ)
1874                         scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1875                 else {
1876                         scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1877                         /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1878                          * power level:
1879                          * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1880                          */
1881                 }
1882
1883                 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1884                                scan_ch->channel,
1885                                (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1886                                (scan_ch->type & 1) ?
1887                                active_dwell : passive_dwell);
1888
1889                 scan_ch++;
1890                 added++;
1891         }
1892
1893         IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
1894         return added;
1895 }
1896
1897 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1898                               struct ieee80211_rate *rates)
1899 {
1900         int i;
1901
1902         for (i = 0; i < IWL_RATE_COUNT; i++) {
1903                 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1904                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1905                 rates[i].hw_value_short = i;
1906                 rates[i].flags = 0;
1907                 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1908                         /*
1909                          * If CCK != 1M then set short preamble rate flag.
1910                          */
1911                         rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1912                                 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1913                 }
1914         }
1915 }
1916
1917 /******************************************************************************
1918  *
1919  * uCode download functions
1920  *
1921  ******************************************************************************/
1922
1923 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1924 {
1925         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1926         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1927         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1928         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1929         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1930         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1931 }
1932
1933 /**
1934  * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1935  *     looking at all data.
1936  */
1937 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1938 {
1939         u32 val;
1940         u32 save_len = len;
1941         int rc = 0;
1942         u32 errcnt;
1943
1944         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1945
1946         iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1947                                IWL39_RTC_INST_LOWER_BOUND);
1948
1949         errcnt = 0;
1950         for (; len > 0; len -= sizeof(u32), image++) {
1951                 /* read data comes through single port, auto-incr addr */
1952                 /* NOTE: Use the debugless read so we don't flood kernel log
1953                  * if IWL_DL_IO is set */
1954                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1955                 if (val != le32_to_cpu(*image)) {
1956                         IWL_ERR(priv, "uCode INST section is invalid at "
1957                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
1958                                   save_len - len, val, le32_to_cpu(*image));
1959                         rc = -EIO;
1960                         errcnt++;
1961                         if (errcnt >= 20)
1962                                 break;
1963                 }
1964         }
1965
1966
1967         if (!errcnt)
1968                 IWL_DEBUG_INFO(priv,
1969                         "ucode image in INSTRUCTION memory is good\n");
1970
1971         return rc;
1972 }
1973
1974
1975 /**
1976  * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1977  *   using sample data 100 bytes apart.  If these sample points are good,
1978  *   it's a pretty good bet that everything between them is good, too.
1979  */
1980 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1981 {
1982         u32 val;
1983         int rc = 0;
1984         u32 errcnt = 0;
1985         u32 i;
1986
1987         IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1988
1989         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1990                 /* read data comes through single port, auto-incr addr */
1991                 /* NOTE: Use the debugless read so we don't flood kernel log
1992                  * if IWL_DL_IO is set */
1993                 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1994                         i + IWL39_RTC_INST_LOWER_BOUND);
1995                 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1996                 if (val != le32_to_cpu(*image)) {
1997 #if 0 /* Enable this if you want to see details */
1998                         IWL_ERR(priv, "uCode INST section is invalid at "
1999                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
2000                                   i, val, *image);
2001 #endif
2002                         rc = -EIO;
2003                         errcnt++;
2004                         if (errcnt >= 3)
2005                                 break;
2006                 }
2007         }
2008
2009         return rc;
2010 }
2011
2012
2013 /**
2014  * iwl3945_verify_ucode - determine which instruction image is in SRAM,
2015  *    and verify its contents
2016  */
2017 static int iwl3945_verify_ucode(struct iwl_priv *priv)
2018 {
2019         __le32 *image;
2020         u32 len;
2021         int rc = 0;
2022
2023         /* Try bootstrap */
2024         image = (__le32 *)priv->ucode_boot.v_addr;
2025         len = priv->ucode_boot.len;
2026         rc = iwl3945_verify_inst_sparse(priv, image, len);
2027         if (rc == 0) {
2028                 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
2029                 return 0;
2030         }
2031
2032         /* Try initialize */
2033         image = (__le32 *)priv->ucode_init.v_addr;
2034         len = priv->ucode_init.len;
2035         rc = iwl3945_verify_inst_sparse(priv, image, len);
2036         if (rc == 0) {
2037                 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
2038                 return 0;
2039         }
2040
2041         /* Try runtime/protocol */
2042         image = (__le32 *)priv->ucode_code.v_addr;
2043         len = priv->ucode_code.len;
2044         rc = iwl3945_verify_inst_sparse(priv, image, len);
2045         if (rc == 0) {
2046                 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
2047                 return 0;
2048         }
2049
2050         IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
2051
2052         /* Since nothing seems to match, show first several data entries in
2053          * instruction SRAM, so maybe visual inspection will give a clue.
2054          * Selection of bootstrap image (vs. other images) is arbitrary. */
2055         image = (__le32 *)priv->ucode_boot.v_addr;
2056         len = priv->ucode_boot.len;
2057         rc = iwl3945_verify_inst_full(priv, image, len);
2058
2059         return rc;
2060 }
2061
2062 static void iwl3945_nic_start(struct iwl_priv *priv)
2063 {
2064         /* Remove all resets to allow NIC to operate */
2065         iwl_write32(priv, CSR_RESET, 0);
2066 }
2067
2068 /**
2069  * iwl3945_read_ucode - Read uCode images from disk file.
2070  *
2071  * Copy into buffers for card to fetch via bus-mastering
2072  */
2073 static int iwl3945_read_ucode(struct iwl_priv *priv)
2074 {
2075         const struct iwl_ucode_header *ucode;
2076         int ret = -EINVAL, index;
2077         const struct firmware *ucode_raw;
2078         /* firmware file name contains uCode/driver compatibility version */
2079         const char *name_pre = priv->cfg->fw_name_pre;
2080         const unsigned int api_max = priv->cfg->ucode_api_max;
2081         const unsigned int api_min = priv->cfg->ucode_api_min;
2082         char buf[25];
2083         u8 *src;
2084         size_t len;
2085         u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
2086
2087         /* Ask kernel firmware_class module to get the boot firmware off disk.
2088          * request_firmware() is synchronous, file is in memory on return. */
2089         for (index = api_max; index >= api_min; index--) {
2090                 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
2091                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
2092                 if (ret < 0) {
2093                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
2094                                   buf, ret);
2095                         if (ret == -ENOENT)
2096                                 continue;
2097                         else
2098                                 goto error;
2099                 } else {
2100                         if (index < api_max)
2101                                 IWL_ERR(priv, "Loaded firmware %s, "
2102                                         "which is deprecated. "
2103                                         " Please use API v%u instead.\n",
2104                                           buf, api_max);
2105                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
2106                                        "(%zd bytes) from disk\n",
2107                                        buf, ucode_raw->size);
2108                         break;
2109                 }
2110         }
2111
2112         if (ret < 0)
2113                 goto error;
2114
2115         /* Make sure that we got at least our header! */
2116         if (ucode_raw->size <  priv->cfg->ops->ucode->get_header_size(1)) {
2117                 IWL_ERR(priv, "File size way too small!\n");
2118                 ret = -EINVAL;
2119                 goto err_release;
2120         }
2121
2122         /* Data from ucode file:  header followed by uCode images */
2123         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2124
2125         priv->ucode_ver = le32_to_cpu(ucode->ver);
2126         api_ver = IWL_UCODE_API(priv->ucode_ver);
2127         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
2128         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
2129         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
2130         init_data_size =
2131                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
2132         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
2133         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
2134
2135         /* api_ver should match the api version forming part of the
2136          * firmware filename ... but we don't check for that and only rely
2137          * on the API version read from firmware header from here on forward */
2138
2139         if (api_ver < api_min || api_ver > api_max) {
2140                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2141                           "Driver supports v%u, firmware is v%u.\n",
2142                           api_max, api_ver);
2143                 priv->ucode_ver = 0;
2144                 ret = -EINVAL;
2145                 goto err_release;
2146         }
2147         if (api_ver != api_max)
2148                 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
2149                           "got %u. New firmware can be obtained "
2150                           "from http://www.intellinuxwireless.org.\n",
2151                           api_max, api_ver);
2152
2153         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
2154                 IWL_UCODE_MAJOR(priv->ucode_ver),
2155                 IWL_UCODE_MINOR(priv->ucode_ver),
2156                 IWL_UCODE_API(priv->ucode_ver),
2157                 IWL_UCODE_SERIAL(priv->ucode_ver));
2158
2159         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2160                        priv->ucode_ver);
2161         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
2162                        inst_size);
2163         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
2164                        data_size);
2165         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
2166                        init_size);
2167         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
2168                        init_data_size);
2169         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
2170                        boot_size);
2171
2172
2173         /* Verify size of file vs. image size info in file's header */
2174         if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
2175                 inst_size + data_size + init_size +
2176                 init_data_size + boot_size) {
2177
2178                 IWL_DEBUG_INFO(priv,
2179                         "uCode file size %zd does not match expected size\n",
2180                         ucode_raw->size);
2181                 ret = -EINVAL;
2182                 goto err_release;
2183         }
2184
2185         /* Verify that uCode images will fit in card's SRAM */
2186         if (inst_size > IWL39_MAX_INST_SIZE) {
2187                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
2188                                inst_size);
2189                 ret = -EINVAL;
2190                 goto err_release;
2191         }
2192
2193         if (data_size > IWL39_MAX_DATA_SIZE) {
2194                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
2195                                data_size);
2196                 ret = -EINVAL;
2197                 goto err_release;
2198         }
2199         if (init_size > IWL39_MAX_INST_SIZE) {
2200                 IWL_DEBUG_INFO(priv,
2201                                 "uCode init instr len %d too large to fit in\n",
2202                                 init_size);
2203                 ret = -EINVAL;
2204                 goto err_release;
2205         }
2206         if (init_data_size > IWL39_MAX_DATA_SIZE) {
2207                 IWL_DEBUG_INFO(priv,
2208                                 "uCode init data len %d too large to fit in\n",
2209                                 init_data_size);
2210                 ret = -EINVAL;
2211                 goto err_release;
2212         }
2213         if (boot_size > IWL39_MAX_BSM_SIZE) {
2214                 IWL_DEBUG_INFO(priv,
2215                                 "uCode boot instr len %d too large to fit in\n",
2216                                 boot_size);
2217                 ret = -EINVAL;
2218                 goto err_release;
2219         }
2220
2221         /* Allocate ucode buffers for card's bus-master loading ... */
2222
2223         /* Runtime instructions and 2 copies of data:
2224          * 1) unmodified from disk
2225          * 2) backup cache for save/restore during power-downs */
2226         priv->ucode_code.len = inst_size;
2227         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2228
2229         priv->ucode_data.len = data_size;
2230         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2231
2232         priv->ucode_data_backup.len = data_size;
2233         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2234
2235         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2236             !priv->ucode_data_backup.v_addr)
2237                 goto err_pci_alloc;
2238
2239         /* Initialization instructions and data */
2240         if (init_size && init_data_size) {
2241                 priv->ucode_init.len = init_size;
2242                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2243
2244                 priv->ucode_init_data.len = init_data_size;
2245                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2246
2247                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2248                         goto err_pci_alloc;
2249         }
2250
2251         /* Bootstrap (instructions only, no data) */
2252         if (boot_size) {
2253                 priv->ucode_boot.len = boot_size;
2254                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2255
2256                 if (!priv->ucode_boot.v_addr)
2257                         goto err_pci_alloc;
2258         }
2259
2260         /* Copy images into buffers for card's bus-master reads ... */
2261
2262         /* Runtime instructions (first block of data in file) */
2263         len = inst_size;
2264         IWL_DEBUG_INFO(priv,
2265                 "Copying (but not loading) uCode instr len %zd\n", len);
2266         memcpy(priv->ucode_code.v_addr, src, len);
2267         src += len;
2268
2269         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2270                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2271
2272         /* Runtime data (2nd block)
2273          * NOTE:  Copy into backup buffer will be done in iwl3945_up()  */
2274         len = data_size;
2275         IWL_DEBUG_INFO(priv,
2276                 "Copying (but not loading) uCode data len %zd\n", len);
2277         memcpy(priv->ucode_data.v_addr, src, len);
2278         memcpy(priv->ucode_data_backup.v_addr, src, len);
2279         src += len;
2280
2281         /* Initialization instructions (3rd block) */
2282         if (init_size) {
2283                 len = init_size;
2284                 IWL_DEBUG_INFO(priv,
2285                         "Copying (but not loading) init instr len %zd\n", len);
2286                 memcpy(priv->ucode_init.v_addr, src, len);
2287                 src += len;
2288         }
2289
2290         /* Initialization data (4th block) */
2291         if (init_data_size) {
2292                 len = init_data_size;
2293                 IWL_DEBUG_INFO(priv,
2294                         "Copying (but not loading) init data len %zd\n", len);
2295                 memcpy(priv->ucode_init_data.v_addr, src, len);
2296                 src += len;
2297         }
2298
2299         /* Bootstrap instructions (5th block) */
2300         len = boot_size;
2301         IWL_DEBUG_INFO(priv,
2302                 "Copying (but not loading) boot instr len %zd\n", len);
2303         memcpy(priv->ucode_boot.v_addr, src, len);
2304
2305         /* We have our copies now, allow OS release its copies */
2306         release_firmware(ucode_raw);
2307         return 0;
2308
2309  err_pci_alloc:
2310         IWL_ERR(priv, "failed to allocate pci memory\n");
2311         ret = -ENOMEM;
2312         iwl3945_dealloc_ucode_pci(priv);
2313
2314  err_release:
2315         release_firmware(ucode_raw);
2316
2317  error:
2318         return ret;
2319 }
2320
2321
2322 /**
2323  * iwl3945_set_ucode_ptrs - Set uCode address location
2324  *
2325  * Tell initialization uCode where to find runtime uCode.
2326  *
2327  * BSM registers initially contain pointers to initialization uCode.
2328  * We need to replace them to load runtime uCode inst and data,
2329  * and to save runtime data when powering down.
2330  */
2331 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2332 {
2333         dma_addr_t pinst;
2334         dma_addr_t pdata;
2335
2336         /* bits 31:0 for 3945 */
2337         pinst = priv->ucode_code.p_addr;
2338         pdata = priv->ucode_data_backup.p_addr;
2339
2340         /* Tell bootstrap uCode where to find image to load */
2341         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2342         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2343         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2344                                  priv->ucode_data.len);
2345
2346         /* Inst byte count must be last to set up, bit 31 signals uCode
2347          *   that all new ptr/size info is in place */
2348         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2349                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2350
2351         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2352
2353         return 0;
2354 }
2355
2356 /**
2357  * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2358  *
2359  * Called after REPLY_ALIVE notification received from "initialize" uCode.
2360  *
2361  * Tell "initialize" uCode to go ahead and load the runtime uCode.
2362  */
2363 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2364 {
2365         /* Check alive response for "valid" sign from uCode */
2366         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2367                 /* We had an error bringing up the hardware, so take it
2368                  * all the way back down so we can try again */
2369                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2370                 goto restart;
2371         }
2372
2373         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2374          * This is a paranoid check, because we would not have gotten the
2375          * "initialize" alive if code weren't properly loaded.  */
2376         if (iwl3945_verify_ucode(priv)) {
2377                 /* Runtime instruction load was bad;
2378                  * take it all the way back down so we can try again */
2379                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2380                 goto restart;
2381         }
2382
2383         /* Send pointers to protocol/runtime uCode image ... init code will
2384          * load and launch runtime uCode, which will send us another "Alive"
2385          * notification. */
2386         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2387         if (iwl3945_set_ucode_ptrs(priv)) {
2388                 /* Runtime instruction load won't happen;
2389                  * take it all the way back down so we can try again */
2390                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2391                 goto restart;
2392         }
2393         return;
2394
2395  restart:
2396         queue_work(priv->workqueue, &priv->restart);
2397 }
2398
2399 /**
2400  * iwl3945_alive_start - called after REPLY_ALIVE notification received
2401  *                   from protocol/runtime uCode (initialization uCode's
2402  *                   Alive gets handled by iwl3945_init_alive_start()).
2403  */
2404 static void iwl3945_alive_start(struct iwl_priv *priv)
2405 {
2406         int thermal_spin = 0;
2407         u32 rfkill;
2408
2409         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2410
2411         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2412                 /* We had an error bringing up the hardware, so take it
2413                  * all the way back down so we can try again */
2414                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2415                 goto restart;
2416         }
2417
2418         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2419          * This is a paranoid check, because we would not have gotten the
2420          * "runtime" alive if code weren't properly loaded.  */
2421         if (iwl3945_verify_ucode(priv)) {
2422                 /* Runtime instruction load was bad;
2423                  * take it all the way back down so we can try again */
2424                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2425                 goto restart;
2426         }
2427
2428         iwl_clear_stations_table(priv);
2429
2430         rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
2431         IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2432
2433         if (rfkill & 0x1) {
2434                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2435                 /* if RFKILL is not on, then wait for thermal
2436                  * sensor in adapter to kick in */
2437                 while (iwl3945_hw_get_temperature(priv) == 0) {
2438                         thermal_spin++;
2439                         udelay(10);
2440                 }
2441
2442                 if (thermal_spin)
2443                         IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2444                                        thermal_spin * 10);
2445         } else
2446                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2447
2448         /* After the ALIVE response, we can send commands to 3945 uCode */
2449         set_bit(STATUS_ALIVE, &priv->status);
2450
2451         if (iwl_is_rfkill(priv))
2452                 return;
2453
2454         ieee80211_wake_queues(priv->hw);
2455
2456         priv->active_rate = priv->rates_mask;
2457         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2458
2459         iwl_power_update_mode(priv, false);
2460
2461         if (iwl_is_associated(priv)) {
2462                 struct iwl3945_rxon_cmd *active_rxon =
2463                                 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
2464
2465                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2466                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2467         } else {
2468                 /* Initialize our rx_config data */
2469                 iwl_connection_init_rx_config(priv, priv->iw_mode);
2470         }
2471
2472         /* Configure Bluetooth device coexistence support */
2473         iwl_send_bt_config(priv);
2474
2475         /* Configure the adapter for unassociated operation */
2476         iwlcore_commit_rxon(priv);
2477
2478         iwl3945_reg_txpower_periodic(priv);
2479
2480         iwl3945_led_register(priv);
2481
2482         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2483         set_bit(STATUS_READY, &priv->status);
2484         wake_up_interruptible(&priv->wait_command_queue);
2485
2486         /* reassociate for ADHOC mode */
2487         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
2488                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
2489                                                                 priv->vif);
2490                 if (beacon)
2491                         iwl_mac_beacon_update(priv->hw, beacon);
2492         }
2493
2494         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
2495                 iwl_set_mode(priv, priv->iw_mode);
2496
2497         return;
2498
2499  restart:
2500         queue_work(priv->workqueue, &priv->restart);
2501 }
2502
2503 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2504
2505 static void __iwl3945_down(struct iwl_priv *priv)
2506 {
2507         unsigned long flags;
2508         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2509         struct ieee80211_conf *conf = NULL;
2510
2511         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2512
2513         conf = ieee80211_get_hw_conf(priv->hw);
2514
2515         if (!exit_pending)
2516                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2517
2518         iwl3945_led_unregister(priv);
2519         iwl_clear_stations_table(priv);
2520
2521         /* Unblock any waiting calls */
2522         wake_up_interruptible_all(&priv->wait_command_queue);
2523
2524         /* Wipe out the EXIT_PENDING status bit if we are not actually
2525          * exiting the module */
2526         if (!exit_pending)
2527                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2528
2529         /* stop and reset the on-board processor */
2530         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2531
2532         /* tell the device to stop sending interrupts */
2533         spin_lock_irqsave(&priv->lock, flags);
2534         iwl_disable_interrupts(priv);
2535         spin_unlock_irqrestore(&priv->lock, flags);
2536         iwl_synchronize_irq(priv);
2537
2538         if (priv->mac80211_registered)
2539                 ieee80211_stop_queues(priv->hw);
2540
2541         /* If we have not previously called iwl3945_init() then
2542          * clear all bits but the RF Kill bits and return */
2543         if (!iwl_is_init(priv)) {
2544                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2545                                         STATUS_RF_KILL_HW |
2546                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2547                                         STATUS_GEO_CONFIGURED |
2548                                 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2549                                         STATUS_EXIT_PENDING;
2550                 goto exit;
2551         }
2552
2553         /* ...otherwise clear out all the status bits but the RF Kill
2554          * bit and continue taking the NIC down. */
2555         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2556                                 STATUS_RF_KILL_HW |
2557                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2558                                 STATUS_GEO_CONFIGURED |
2559                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2560                                 STATUS_FW_ERROR |
2561                         test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2562                                 STATUS_EXIT_PENDING;
2563
2564         priv->cfg->ops->lib->apm_ops.reset(priv);
2565         spin_lock_irqsave(&priv->lock, flags);
2566         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2567         spin_unlock_irqrestore(&priv->lock, flags);
2568
2569         iwl3945_hw_txq_ctx_stop(priv);
2570         iwl3945_hw_rxq_stop(priv);
2571
2572         iwl_write_prph(priv, APMG_CLK_DIS_REG,
2573                                 APMG_CLK_VAL_DMA_CLK_RQT);
2574
2575         udelay(5);
2576
2577         if (exit_pending)
2578                 priv->cfg->ops->lib->apm_ops.stop(priv);
2579         else
2580                 priv->cfg->ops->lib->apm_ops.reset(priv);
2581
2582  exit:
2583         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2584
2585         if (priv->ibss_beacon)
2586                 dev_kfree_skb(priv->ibss_beacon);
2587         priv->ibss_beacon = NULL;
2588
2589         /* clear out any free frames */
2590         iwl3945_clear_free_frames(priv);
2591 }
2592
2593 static void iwl3945_down(struct iwl_priv *priv)
2594 {
2595         mutex_lock(&priv->mutex);
2596         __iwl3945_down(priv);
2597         mutex_unlock(&priv->mutex);
2598
2599         iwl3945_cancel_deferred_work(priv);
2600 }
2601
2602 #define MAX_HW_RESTARTS 5
2603
2604 static int __iwl3945_up(struct iwl_priv *priv)
2605 {
2606         int rc, i;
2607
2608         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2609                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2610                 return -EIO;
2611         }
2612
2613         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2614                 IWL_ERR(priv, "ucode not available for device bring up\n");
2615                 return -EIO;
2616         }
2617
2618         /* If platform's RF_KILL switch is NOT set to KILL */
2619         if (iwl_read32(priv, CSR_GP_CNTRL) &
2620                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2621                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2622         else {
2623                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2624                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2625                 return -ENODEV;
2626         }
2627
2628         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2629
2630         rc = iwl3945_hw_nic_init(priv);
2631         if (rc) {
2632                 IWL_ERR(priv, "Unable to int nic\n");
2633                 return rc;
2634         }
2635
2636         /* make sure rfkill handshake bits are cleared */
2637         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2638         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2639                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2640
2641         /* clear (again), then enable host interrupts */
2642         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2643         iwl_enable_interrupts(priv);
2644
2645         /* really make sure rfkill handshake bits are cleared */
2646         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2647         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2648
2649         /* Copy original ucode data image from disk into backup cache.
2650          * This will be used to initialize the on-board processor's
2651          * data SRAM for a clean start when the runtime program first loads. */
2652         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2653                priv->ucode_data.len);
2654
2655         /* We return success when we resume from suspend and rf_kill is on. */
2656         if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2657                 return 0;
2658
2659         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2660
2661                 iwl_clear_stations_table(priv);
2662
2663                 /* load bootstrap state machine,
2664                  * load bootstrap program into processor's memory,
2665                  * prepare to load the "initialize" uCode */
2666                 priv->cfg->ops->lib->load_ucode(priv);
2667
2668                 if (rc) {
2669                         IWL_ERR(priv,
2670                                 "Unable to set up bootstrap uCode: %d\n", rc);
2671                         continue;
2672                 }
2673
2674                 /* start card; "initialize" will load runtime ucode */
2675                 iwl3945_nic_start(priv);
2676
2677                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2678
2679                 return 0;
2680         }
2681
2682         set_bit(STATUS_EXIT_PENDING, &priv->status);
2683         __iwl3945_down(priv);
2684         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2685
2686         /* tried to restart and config the device for as long as our
2687          * patience could withstand */
2688         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2689         return -EIO;
2690 }
2691
2692
2693 /*****************************************************************************
2694  *
2695  * Workqueue callbacks
2696  *
2697  *****************************************************************************/
2698
2699 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2700 {
2701         struct iwl_priv *priv =
2702             container_of(data, struct iwl_priv, init_alive_start.work);
2703
2704         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2705                 return;
2706
2707         mutex_lock(&priv->mutex);
2708         iwl3945_init_alive_start(priv);
2709         mutex_unlock(&priv->mutex);
2710 }
2711
2712 static void iwl3945_bg_alive_start(struct work_struct *data)
2713 {
2714         struct iwl_priv *priv =
2715             container_of(data, struct iwl_priv, alive_start.work);
2716
2717         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2718                 return;
2719
2720         mutex_lock(&priv->mutex);
2721         iwl3945_alive_start(priv);
2722         mutex_unlock(&priv->mutex);
2723 }
2724
2725 static void iwl3945_rfkill_poll(struct work_struct *data)
2726 {
2727         struct iwl_priv *priv =
2728             container_of(data, struct iwl_priv, rfkill_poll.work);
2729
2730         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2731                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2732         else
2733                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2734
2735         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
2736                         test_bit(STATUS_RF_KILL_HW, &priv->status));
2737
2738         queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
2739                            round_jiffies_relative(2 * HZ));
2740
2741 }
2742
2743 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
2744 static void iwl3945_bg_request_scan(struct work_struct *data)
2745 {
2746         struct iwl_priv *priv =
2747             container_of(data, struct iwl_priv, request_scan);
2748         struct iwl_host_cmd cmd = {
2749                 .id = REPLY_SCAN_CMD,
2750                 .len = sizeof(struct iwl3945_scan_cmd),
2751                 .flags = CMD_SIZE_HUGE,
2752         };
2753         int rc = 0;
2754         struct iwl3945_scan_cmd *scan;
2755         struct ieee80211_conf *conf = NULL;
2756         u8 n_probes = 0;
2757         enum ieee80211_band band;
2758         bool is_active = false;
2759
2760         conf = ieee80211_get_hw_conf(priv->hw);
2761
2762         mutex_lock(&priv->mutex);
2763
2764         cancel_delayed_work(&priv->scan_check);
2765
2766         if (!iwl_is_ready(priv)) {
2767                 IWL_WARN(priv, "request scan called when driver not ready.\n");
2768                 goto done;
2769         }
2770
2771         /* Make sure the scan wasn't canceled before this queued work
2772          * was given the chance to run... */
2773         if (!test_bit(STATUS_SCANNING, &priv->status))
2774                 goto done;
2775
2776         /* This should never be called or scheduled if there is currently
2777          * a scan active in the hardware. */
2778         if (test_bit(STATUS_SCAN_HW, &priv->status)) {
2779                 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests  "
2780                                 "Ignoring second request.\n");
2781                 rc = -EIO;
2782                 goto done;
2783         }
2784
2785         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2786                 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
2787                 goto done;
2788         }
2789
2790         if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2791                 IWL_DEBUG_HC(priv,
2792                         "Scan request while abort pending. Queuing.\n");
2793                 goto done;
2794         }
2795
2796         if (iwl_is_rfkill(priv)) {
2797                 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
2798                 goto done;
2799         }
2800
2801         if (!test_bit(STATUS_READY, &priv->status)) {
2802                 IWL_DEBUG_HC(priv,
2803                         "Scan request while uninitialized. Queuing.\n");
2804                 goto done;
2805         }
2806
2807         if (!priv->scan_bands) {
2808                 IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
2809                 goto done;
2810         }
2811
2812         if (!priv->scan) {
2813                 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2814                                      IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2815                 if (!priv->scan) {
2816                         rc = -ENOMEM;
2817                         goto done;
2818                 }
2819         }
2820         scan = priv->scan;
2821         memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2822
2823         scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2824         scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2825
2826         if (iwl_is_associated(priv)) {
2827                 u16 interval = 0;
2828                 u32 extra;
2829                 u32 suspend_time = 100;
2830                 u32 scan_suspend_time = 100;
2831                 unsigned long flags;
2832
2833                 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2834
2835                 spin_lock_irqsave(&priv->lock, flags);
2836                 interval = priv->beacon_int;
2837                 spin_unlock_irqrestore(&priv->lock, flags);
2838
2839                 scan->suspend_time = 0;
2840                 scan->max_out_time = cpu_to_le32(200 * 1024);
2841                 if (!interval)
2842                         interval = suspend_time;
2843                 /*
2844                  * suspend time format:
2845                  *  0-19: beacon interval in usec (time before exec.)
2846                  * 20-23: 0
2847                  * 24-31: number of beacons (suspend between channels)
2848                  */
2849
2850                 extra = (suspend_time / interval) << 24;
2851                 scan_suspend_time = 0xFF0FFFFF &
2852                     (extra | ((suspend_time % interval) * 1024));
2853
2854                 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2855                 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2856                                scan_suspend_time, interval);
2857         }
2858
2859         if (priv->scan_request->n_ssids) {
2860                 int i, p = 0;
2861                 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2862                 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2863                         /* always does wildcard anyway */
2864                         if (!priv->scan_request->ssids[i].ssid_len)
2865                                 continue;
2866                         scan->direct_scan[p].id = WLAN_EID_SSID;
2867                         scan->direct_scan[p].len =
2868                                 priv->scan_request->ssids[i].ssid_len;
2869                         memcpy(scan->direct_scan[p].ssid,
2870                                priv->scan_request->ssids[i].ssid,
2871                                priv->scan_request->ssids[i].ssid_len);
2872                         n_probes++;
2873                         p++;
2874                 }
2875                 is_active = true;
2876         } else
2877                 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2878
2879         /* We don't build a direct scan probe request; the uCode will do
2880          * that based on the direct_mask added to each channel entry */
2881         scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2882         scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
2883         scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2884
2885         /* flags + rate selection */
2886
2887         if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
2888                 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2889                 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2890                 scan->good_CRC_th = 0;
2891                 band = IEEE80211_BAND_2GHZ;
2892         } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
2893                 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2894                 /*
2895                  * If active scaning is requested but a certain channel
2896                  * is marked passive, we can do active scanning if we
2897                  * detect transmissions.
2898                  */
2899                 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
2900                 band = IEEE80211_BAND_5GHZ;
2901         } else {
2902                 IWL_WARN(priv, "Invalid scan band count\n");
2903                 goto done;
2904         }
2905
2906         scan->tx_cmd.len = cpu_to_le16(
2907                         iwl_fill_probe_req(priv,
2908                                 (struct ieee80211_mgmt *)scan->data,
2909                                 priv->scan_request->ie,
2910                                 priv->scan_request->ie_len,
2911                                 IWL_MAX_SCAN_SIZE - sizeof(*scan)));
2912
2913         /* select Rx antennas */
2914         scan->flags |= iwl3945_get_antenna_flags(priv);
2915
2916         if (iwl_is_monitor_mode(priv))
2917                 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
2918
2919         scan->channel_count =
2920                 iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2921                         (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
2922
2923         if (scan->channel_count == 0) {
2924                 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2925                 goto done;
2926         }
2927
2928         cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2929             scan->channel_count * sizeof(struct iwl3945_scan_channel);
2930         cmd.data = scan;
2931         scan->len = cpu_to_le16(cmd.len);
2932
2933         set_bit(STATUS_SCAN_HW, &priv->status);
2934         rc = iwl_send_cmd_sync(priv, &cmd);
2935         if (rc)
2936                 goto done;
2937
2938         queue_delayed_work(priv->workqueue, &priv->scan_check,
2939                            IWL_SCAN_CHECK_WATCHDOG);
2940
2941         mutex_unlock(&priv->mutex);
2942         return;
2943
2944  done:
2945         /* can not perform scan make sure we clear scanning
2946          * bits from status so next scan request can be performed.
2947          * if we dont clear scanning status bit here all next scan
2948          * will fail
2949         */
2950         clear_bit(STATUS_SCAN_HW, &priv->status);
2951         clear_bit(STATUS_SCANNING, &priv->status);
2952
2953         /* inform mac80211 scan aborted */
2954         queue_work(priv->workqueue, &priv->scan_completed);
2955         mutex_unlock(&priv->mutex);
2956 }
2957
2958 static void iwl3945_bg_up(struct work_struct *data)
2959 {
2960         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2961
2962         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2963                 return;
2964
2965         mutex_lock(&priv->mutex);
2966         __iwl3945_up(priv);
2967         mutex_unlock(&priv->mutex);
2968 }
2969
2970 static void iwl3945_bg_restart(struct work_struct *data)
2971 {
2972         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2973
2974         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2975                 return;
2976
2977         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2978                 mutex_lock(&priv->mutex);
2979                 priv->vif = NULL;
2980                 priv->is_open = 0;
2981                 mutex_unlock(&priv->mutex);
2982                 iwl3945_down(priv);
2983                 ieee80211_restart_hw(priv->hw);
2984         } else {
2985                 iwl3945_down(priv);
2986                 queue_work(priv->workqueue, &priv->up);
2987         }
2988 }
2989
2990 static void iwl3945_bg_rx_replenish(struct work_struct *data)
2991 {
2992         struct iwl_priv *priv =
2993             container_of(data, struct iwl_priv, rx_replenish);
2994
2995         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2996                 return;
2997
2998         mutex_lock(&priv->mutex);
2999         iwl3945_rx_replenish(priv);
3000         mutex_unlock(&priv->mutex);
3001 }
3002
3003 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3004
3005 void iwl3945_post_associate(struct iwl_priv *priv)
3006 {
3007         int rc = 0;
3008         struct ieee80211_conf *conf = NULL;
3009
3010         if (priv->iw_mode == NL80211_IFTYPE_AP) {
3011                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3012                 return;
3013         }
3014
3015
3016         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3017                         priv->assoc_id, priv->active_rxon.bssid_addr);
3018
3019         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3020                 return;
3021
3022         if (!priv->vif || !priv->is_open)
3023                 return;
3024
3025         iwl_scan_cancel_timeout(priv, 200);
3026
3027         conf = ieee80211_get_hw_conf(priv->hw);
3028
3029         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3030         iwlcore_commit_rxon(priv);
3031
3032         memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
3033         iwl_setup_rxon_timing(priv);
3034         rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3035                               sizeof(priv->rxon_timing), &priv->rxon_timing);
3036         if (rc)
3037                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3038                             "Attempting to continue.\n");
3039
3040         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3041
3042         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
3043
3044         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3045                         priv->assoc_id, priv->beacon_int);
3046
3047         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
3048                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3049         else
3050                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3051
3052         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3053                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
3054                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3055                 else
3056                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3057
3058                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
3059                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3060
3061         }
3062
3063         iwlcore_commit_rxon(priv);
3064
3065         switch (priv->iw_mode) {
3066         case NL80211_IFTYPE_STATION:
3067                 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
3068                 break;
3069
3070         case NL80211_IFTYPE_ADHOC:
3071
3072                 priv->assoc_id = 1;
3073                 iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
3074                 iwl3945_sync_sta(priv, IWL_STA_ID,
3075                                  (priv->band == IEEE80211_BAND_5GHZ) ?
3076                                  IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
3077                                  CMD_ASYNC);
3078                 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
3079                 iwl3945_send_beacon_cmd(priv);
3080
3081                 break;
3082
3083      &