drivers/net/wireless/iwlwifi/iwl-eeprom.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22  * USA
  23  *
  24  * The full GNU General Public License is included in this distribution
  25  * in the file called LICENSE.GPL.
  26  *
  27  * Contact Information:
  28  *  Intel Linux Wireless <ilw@linux.intel.com>
  29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30  *
  31  * BSD LICENSE
  32  *
  33  * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
  34  * All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  *
  40  *  * Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  *  * Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in
  44  *    the documentation and/or other materials provided with the
  45  *    distribution.
  46  *  * Neither the name Intel Corporation nor the names of its
  47  *    contributors may be used to endorse or promote products derived
  48  *    from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61  *****************************************************************************/
  62
  63
  64 #include <linux/kernel.h>
  65 #include <linux/module.h>
  66 #include <linux/init.h>
  67
  68 #include <net/mac80211.h>
  69
  70 #include "iwl-commands.h"
  71 #include "iwl-dev.h"
  72 #include "iwl-core.h"
  73 #include "iwl-debug.h"
  74 #include "iwl-eeprom.h"
  75 #include "iwl-io.h"
  76
  77 /************************** EEPROM BANDS ****************************
  78  *
  79  * The iwl_eeprom_band definitions below provide the mapping from the
  80  * EEPROM contents to the specific channel number supported for each
  81  * band.
  82  *
  83  * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  84  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  85  * The specific geography and calibration information for that channel
  86  * is contained in the eeprom map itself.
  87  *
  88  * During init, we copy the eeprom information and channel map
  89  * information into priv->channel_info_24/52 and priv->channel_map_24/52
  90  *
  91  * channel_map_24/52 provides the index in the channel_info array for a
  92  * given channel.  We have to have two separate maps as there is channel
  93  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  94  * band_2
  95  *
  96  * A value of 0xff stored in the channel_map indicates that the channel
  97  * is not supported by the hardware at all.
  98  *
  99  * A value of 0xfe in the channel_map indicates that the channel is not
 100  * valid for Tx with the current hardware.  This means that
 101  * while the system can tune and receive on a given channel, it may not
 102  * be able to associate or transmit any frames on that
 103  * channel.  There is no corresponding channel information for that
 104  * entry.
 105  *
 106  *********************************************************************/
 107
 108 /* 2.4 GHz */
 109 const u8 iwl_eeprom_band_1[14] = {
 110         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
 111 };
 112
 113 /* 5.2 GHz bands */
 114 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
 115         183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
 116 };
 117
 118 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
 119         34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
 120 };
 121
 122 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
 123         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
 124 };
 125
 126 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
 127         145, 149, 153, 157, 161, 165
 128 };
 129
 130 static const u8 iwl_eeprom_band_6[] = {       /* 2.4 ht40 channel */
 131         1, 2, 3, 4, 5, 6, 7
 132 };
 133
 134 static const u8 iwl_eeprom_band_7[] = {       /* 5.2 ht40 channel */
 135         36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
 136 };
 137
 138 /**
 139  * struct iwl_txpwr_section: eeprom section information
 140  * @offset: indirect address into eeprom image
 141  * @count: number of "struct iwl_eeprom_enhanced_txpwr" in this section
 142  * @band: band type for the section
 143  * @is_common - true: common section, false: channel section
 144  * @is_cck - true: cck section, false: not cck section
 145  * @is_ht_40 - true: all channel in the section are HT40 channel,
 146  *             false: legacy or HT 20 MHz
 147  *             ignore if it is common section
 148  * @iwl_eeprom_section_channel: channel array in the section,
 149  *             ignore if common section
 150  */
 151 struct iwl_txpwr_section {
 152         u32 offset;
 153         u8 count;
 154         enum ieee80211_band band;
 155         bool is_common;
 156         bool is_cck;
 157         bool is_ht40;
 158         u8 iwl_eeprom_section_channel[EEPROM_MAX_TXPOWER_SECTION_ELEMENTS];
 159 };
 160
 161 /**
 162  * section 1 - 3 are regulatory tx power apply to all channels based on
 163  *    modulation: CCK, OFDM
 164  *    Band: 2.4GHz, 5.2GHz
 165  * section 4 - 10 are regulatory tx power apply to specified channels
 166  *    For example:
 167  *      1L - Channel 1 Legacy
 168  *      1HT - Channel 1 HT
 169  *      (1,+1) - Channel 1 HT40 "_above_"
 170  *
 171  * Section 1: all CCK channels
 172  * Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40) channels
 173  * Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels
 174  * Section 4: 2.4 GHz 20MHz channels: 1L, 1HT, 2L, 2HT, 10L, 10HT, 11L, 11HT
 175  * Section 5: 2.4 GHz 40MHz channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1)
 176  * Section 6: 5.2 GHz 20MHz channels: 36L, 64L, 100L, 36HT, 64HT, 100HT
 177  * Section 7: 5.2 GHz 40MHz channels: (36,+1) (60,+1) (100,+1)
 178  * Section 8: 2.4 GHz channel: 13L, 13HT
 179  * Section 9: 2.4 GHz channel: 140L, 140HT
 180  * Section 10: 2.4 GHz 40MHz channels: (132,+1)  (44,+1)
 181  *
 182  */
 183 static const struct iwl_txpwr_section enhinfo[] = {
 184         { EEPROM_LB_CCK_20_COMMON, 1, IEEE80211_BAND_2GHZ, true, true, false },
 185         { EEPROM_LB_OFDM_COMMON, 3, IEEE80211_BAND_2GHZ, true, false, false },
 186         { EEPROM_HB_OFDM_COMMON, 3, IEEE80211_BAND_5GHZ, true, false, false },
 187         { EEPROM_LB_OFDM_20_BAND, 8, IEEE80211_BAND_2GHZ,
 188                 false, false, false,
 189                 {1, 1, 2, 2, 10, 10, 11, 11 } },
 190         { EEPROM_LB_OFDM_HT40_BAND, 5, IEEE80211_BAND_2GHZ,
 191                 false, false, true,
 192                 { 1, 2, 6, 7, 9 } },
 193         { EEPROM_HB_OFDM_20_BAND, 6, IEEE80211_BAND_5GHZ,
 194                 false, false, false,
 195                 { 36, 64, 100, 36, 64, 100 } },
 196         { EEPROM_HB_OFDM_HT40_BAND, 3, IEEE80211_BAND_5GHZ,
 197                 false, false, true,
 198                 { 36, 60, 100 } },
 199         { EEPROM_LB_OFDM_20_CHANNEL_13, 2, IEEE80211_BAND_2GHZ,
 200                 false, false, false,
 201                 { 13, 13 } },
 202         { EEPROM_HB_OFDM_20_CHANNEL_140, 2, IEEE80211_BAND_5GHZ,
 203                 false, false, false,
 204                 { 140, 140 } },
 205         { EEPROM_HB_OFDM_HT40_BAND_1, 2, IEEE80211_BAND_5GHZ,
 206                 false, false, true,
 207                 { 132, 44 } },
 208 };
 209
 210 /******************************************************************************
 211  *
 212  * EEPROM related functions
 213  *
 214 ******************************************************************************/
 215
 216 int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
 217 {
 218         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
 219         if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
 220                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 221                 return -ENOENT;
 222         }
 223         return 0;
 224 }
 225 EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
 226
 227 static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode)
 228 {
 229         u32 otpgp;
 230
 231         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 232         if (mode == IWL_OTP_ACCESS_ABSOLUTE)
 233                 iwl_clear_bit(priv, CSR_OTP_GP_REG,
 234                                 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 235         else
 236                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 237                                 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 238 }
 239
 240 static int iwlcore_get_nvm_type(struct iwl_priv *priv)
 241 {
 242         u32 otpgp;
 243         int nvm_type;
 244
 245         /* OTP only valid for CP/PP and after */
 246         switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
 247         case CSR_HW_REV_TYPE_NONE:
 248                 IWL_ERR(priv, "Unknown hardware type\n");
 249                 return -ENOENT;
 250         case CSR_HW_REV_TYPE_3945:
 251         case CSR_HW_REV_TYPE_4965:
 252         case CSR_HW_REV_TYPE_5300:
 253         case CSR_HW_REV_TYPE_5350:
 254         case CSR_HW_REV_TYPE_5100:
 255         case CSR_HW_REV_TYPE_5150:
 256                 nvm_type = NVM_DEVICE_TYPE_EEPROM;
 257                 break;
 258         default:
 259                 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 260                 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
 261                         nvm_type = NVM_DEVICE_TYPE_OTP;
 262                 else
 263                         nvm_type = NVM_DEVICE_TYPE_EEPROM;
 264                 break;
 265         }
 266         return  nvm_type;
 267 }
 268
 269 /*
 270  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 271  * when accessing the EEPROM; each access is a series of pulses to/from the
 272  * EEPROM chip, not a single event, so even reads could conflict if they
 273  * weren't arbitrated by the semaphore.
 274  */
 275 int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
 276 {
 277         u16 count;
 278         int ret;
 279
 280         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 281                 /* Request semaphore */
 282                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 283                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 284
 285                 /* See if we got it */
 286                 ret = iwl_poll_direct_bit(priv, CSR_HW_IF_CONFIG_REG,
 287                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 288                                 EEPROM_SEM_TIMEOUT);
 289                 if (ret >= 0) {
 290                         IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
 291                                 count+1);
 292                         return ret;
 293                 }
 294         }
 295
 296         return ret;
 297 }
 298 EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
 299
 300 void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
 301 {
 302         iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 303                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 304
 305 }
 306 EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
 307
 308 const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 309 {
 310         BUG_ON(offset >= priv->cfg->eeprom_size);
 311         return &priv->eeprom[offset];
 312 }
 313 EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
 314
 315 static int iwl_init_otp_access(struct iwl_priv *priv)
 316 {
 317         int ret;
 318
 319         /* Enable 40MHz radio clock */
 320         _iwl_write32(priv, CSR_GP_CNTRL,
 321                      _iwl_read32(priv, CSR_GP_CNTRL) |
 322                      CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 323
 324         /* wait for clock to be ready */
 325         ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
 326                                   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 327                                   25000);
 328         if (ret < 0)
 329                 IWL_ERR(priv, "Time out access OTP\n");
 330         else {
 331                 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
 332                                   APMG_PS_CTRL_VAL_RESET_REQ);
 333                 udelay(5);
 334                 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
 335                                     APMG_PS_CTRL_VAL_RESET_REQ);
 336         }
 337         return ret;
 338 }
 339
 340 static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
 341 {
 342         int ret = 0;
 343         u32 r;
 344         u32 otpgp;
 345
 346         _iwl_write32(priv, CSR_EEPROM_REG,
 347                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 348         ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
 349                                   CSR_EEPROM_REG_READ_VALID_MSK,
 350                                   IWL_EEPROM_ACCESS_TIMEOUT);
 351         if (ret < 0) {
 352                 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
 353                 return ret;
 354         }
 355         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 356         /* check for ECC errors: */
 357         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
 358         if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
 359                 /* stop in this case */
 360                 /* set the uncorrectable OTP ECC bit for acknowledgement */
 361                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 362                         CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 363                 IWL_ERR(priv, "Uncorrectable OTP ECC error, abort OTP read\n");
 364                 return -EINVAL;
 365         }
 366         if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
 367                 /* continue in this case */
 368                 /* set the correctable OTP ECC bit for acknowledgement */
 369                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 370                                 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
 371                 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
 372         }
 373         *eeprom_data = le16_to_cpu((__force __le16)(r >> 16));
 374         return 0;
 375 }
 376
 377 /*
 378  * iwl_is_otp_empty: check for empty OTP
 379  */
 380 static bool iwl_is_otp_empty(struct iwl_priv *priv)
 381 {
 382         u16 next_link_addr = 0, link_value;
 383         bool is_empty = false;
 384
 385         /* locate the beginning of OTP link list */
 386         if (!iwl_read_otp_word(priv, next_link_addr, &link_value)) {
 387                 if (!link_value) {
 388                         IWL_ERR(priv, "OTP is empty\n");
 389                         is_empty = true;
 390                 }
 391         } else {
 392                 IWL_ERR(priv, "Unable to read first block of OTP list.\n");
 393                 is_empty = true;
 394         }
 395
 396         return is_empty;
 397 }
 398
 399
 400 /*
 401  * iwl_find_otp_image: find EEPROM image in OTP
 402  *   finding the OTP block that contains the EEPROM image.
 403  *   the last valid block on the link list (the block _before_ the last block)
 404  *   is the block we should read and used to configure the device.
 405  *   If all the available OTP blocks are full, the last block will be the block
 406  *   we should read and used to configure the device.
 407  *   only perform this operation if shadow RAM is disabled
 408  */
 409 static int iwl_find_otp_image(struct iwl_priv *priv,
 410                                         u16 *validblockaddr)
 411 {
 412         u16 next_link_addr = 0, link_value = 0, valid_addr;
 413         int ret = 0;
 414         int usedblocks = 0;
 415
 416         /* set addressing mode to absolute to traverse the link list */
 417         iwl_set_otp_access(priv, IWL_OTP_ACCESS_ABSOLUTE);
 418
 419         /* checking for empty OTP or error */
 420         if (iwl_is_otp_empty(priv))
 421                 return -EINVAL;
 422
 423         /*
 424          * start traverse link list
 425          * until reach the max number of OTP blocks
 426          * different devices have different number of OTP blocks
 427          */
 428         do {
 429                 /* save current valid block address
 430                  * check for more block on the link list
 431                  */
 432                 valid_addr = next_link_addr;
 433                 next_link_addr = link_value;
 434                 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
 435                                usedblocks, next_link_addr);
 436                 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
 437                         return -EINVAL;
 438                 if (!link_value) {
 439                         /*
 440                          * reach the end of link list,
 441                          * set address point to the starting address
 442                          * of the image
 443                          */
 444                         goto done;
 445                 }
 446                 /* more in the link list, continue */
 447                 usedblocks++;
 448         } while (usedblocks < priv->cfg->max_ll_items);
 449         /* OTP full, use last block */
 450         IWL_DEBUG_INFO(priv, "OTP is full, use last block\n");
 451 done:
 452         *validblockaddr = valid_addr;
 453         /* skip first 2 bytes (link list pointer) */
 454         *validblockaddr += 2;
 455         return ret;
 456 }
 457
 458 /**
 459  * iwl_eeprom_init - read EEPROM contents
 460  *
 461  * Load the EEPROM contents from adapter into priv->eeprom
 462  *
 463  * NOTE:  This routine uses the non-debug IO access functions.
 464  */
 465 int iwl_eeprom_init(struct iwl_priv *priv)
 466 {
 467         u16 *e;
 468         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
 469         int sz;
 470         int ret;
 471         u16 addr;
 472         u16 validblockaddr = 0;
 473         u16 cache_addr = 0;
 474
 475         priv->nvm_device_type = iwlcore_get_nvm_type(priv);
 476         if (priv->nvm_device_type == -ENOENT)
 477                 return -ENOENT;
 478         /* allocate eeprom */
 479         IWL_DEBUG_INFO(priv, "NVM size = %d\n", priv->cfg->eeprom_size);
 480         sz = priv->cfg->eeprom_size;
 481         priv->eeprom = kzalloc(sz, GFP_KERNEL);
 482         if (!priv->eeprom) {
 483                 ret = -ENOMEM;
 484                 goto alloc_err;
 485         }
 486         e = (u16 *)priv->eeprom;
 487
 488         ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
 489         if (ret < 0) {
 490                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 491                 ret = -ENOENT;
 492                 goto err;
 493         }
 494
 495         /* Make sure driver (instead of uCode) is allowed to read EEPROM */
 496         ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
 497         if (ret < 0) {
 498                 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
 499                 ret = -ENOENT;
 500                 goto err;
 501         }
 502         if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
 503                 ret = iwl_init_otp_access(priv);
 504                 if (ret) {
 505                         IWL_ERR(priv, "Failed to initialize OTP access.\n");
 506                         ret = -ENOENT;
 507                         goto done;
 508                 }
 509                 _iwl_write32(priv, CSR_EEPROM_GP,
 510                              iwl_read32(priv, CSR_EEPROM_GP) &
 511                              ~CSR_EEPROM_GP_IF_OWNER_MSK);
 512
 513                 iwl_set_bit(priv, CSR_OTP_GP_REG,
 514                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
 515                              CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 516                 /* traversing the linked list if no shadow ram supported */
 517                 if (!priv->cfg->shadow_ram_support) {
 518                         if (iwl_find_otp_image(priv, &validblockaddr)) {
 519                                 ret = -ENOENT;
 520                                 goto done;
 521                         }
 522                 }
 523                 for (addr = validblockaddr; addr < validblockaddr + sz;
 524                      addr += sizeof(u16)) {
 525                         u16 eeprom_data;
 526
 527                         ret = iwl_read_otp_word(priv, addr, &eeprom_data);
 528                         if (ret)
 529                                 goto done;
 530                         e[cache_addr / 2] = eeprom_data;
 531                         cache_addr += sizeof(u16);
 532                 }
 533         } else {
 534                 /* eeprom is an array of 16bit values */
 535                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
 536                         u32 r;
 537
 538                         _iwl_write32(priv, CSR_EEPROM_REG,
 539                                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 540
 541                         ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
 542                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 543                                                   IWL_EEPROM_ACCESS_TIMEOUT);
 544                         if (ret < 0) {
 545                                 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
 546                                 goto done;
 547                         }
 548                         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
 549                         e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
 550                 }
 551         }
 552         ret = 0;
 553 done:
 554         priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
 555 err:
 556         if (ret)
 557                 iwl_eeprom_free(priv);
 558 alloc_err:
 559         return ret;
 560 }
 561 EXPORT_SYMBOL(iwl_eeprom_init);
 562
 563 void iwl_eeprom_free(struct iwl_priv *priv)
 564 {
 565         kfree(priv->eeprom);
 566         priv->eeprom = NULL;
 567 }
 568 EXPORT_SYMBOL(iwl_eeprom_free);
 569
 570 int iwl_eeprom_check_version(struct iwl_priv *priv)
 571 {
 572         u16 eeprom_ver;
 573         u16 calib_ver;
 574
 575         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
 576         calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
 577
 578         if (eeprom_ver < priv->cfg->eeprom_ver ||
 579             calib_ver < priv->cfg->eeprom_calib_ver)
 580                 goto err;
 581
 582         return 0;
 583 err:
 584         IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
 585                   eeprom_ver, priv->cfg->eeprom_ver,
 586                   calib_ver,  priv->cfg->eeprom_calib_ver);
 587         return -EINVAL;
 588
 589 }
 590 EXPORT_SYMBOL(iwl_eeprom_check_version);
 591
 592 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
 593 {
 594         return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
 595 }
 596 EXPORT_SYMBOL(iwl_eeprom_query_addr);
 597
 598 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
 599 {
 600         if (!priv->eeprom)
 601                 return 0;
 602         return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
 603 }
 604 EXPORT_SYMBOL(iwl_eeprom_query16);
 605
 606 void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
 607 {
 608         const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
 609                                         EEPROM_MAC_ADDRESS);
 610         memcpy(mac, addr, ETH_ALEN);
 611 }
 612 EXPORT_SYMBOL(iwl_eeprom_get_mac);
 613
 614 static void iwl_init_band_reference(const struct iwl_priv *priv,
 615                         int eep_band, int *eeprom_ch_count,
 616                         const struct iwl_eeprom_channel **eeprom_ch_info,
 617                         const u8 **eeprom_ch_index)
 618 {
 619         u32 offset = priv->cfg->ops->lib->
 620                         eeprom_ops.regulatory_bands[eep_band - 1];
 621         switch (eep_band) {
 622         case 1:         /* 2.4GHz band */
 623                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
 624                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 625                                 iwl_eeprom_query_addr(priv, offset);
 626                 *eeprom_ch_index = iwl_eeprom_band_1;
 627                 break;
 628         case 2:         /* 4.9GHz band */
 629                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
 630                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 631                                 iwl_eeprom_query_addr(priv, offset);
 632                 *eeprom_ch_index = iwl_eeprom_band_2;
 633                 break;
 634         case 3:         /* 5.2GHz band */
 635                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
 636                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 637                                 iwl_eeprom_query_addr(priv, offset);
 638                 *eeprom_ch_index = iwl_eeprom_band_3;
 639                 break;
 640         case 4:         /* 5.5GHz band */
 641                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
 642                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 643                                 iwl_eeprom_query_addr(priv, offset);
 644                 *eeprom_ch_index = iwl_eeprom_band_4;
 645                 break;
 646         case 5:         /* 5.7GHz band */
 647                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
 648                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 649                                 iwl_eeprom_query_addr(priv, offset);
 650                 *eeprom_ch_index = iwl_eeprom_band_5;
 651                 break;
 652         case 6:         /* 2.4GHz ht40 channels */
 653                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
 654                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 655                                 iwl_eeprom_query_addr(priv, offset);
 656                 *eeprom_ch_index = iwl_eeprom_band_6;
 657                 break;
 658         case 7:         /* 5 GHz ht40 channels */
 659                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
 660                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 661                                 iwl_eeprom_query_addr(priv, offset);
 662                 *eeprom_ch_index = iwl_eeprom_band_7;
 663                 break;
 664         default:
 665                 BUG();
 666                 return;
 667         }
 668 }
 669
 670 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
 671                             ? # x " " : "")
 672
 673 /**
 674  * iwl_mod_ht40_chan_info - Copy ht40 channel info into driver's priv.
 675  *
 676  * Does not set up a command, or touch hardware.
 677  */
 678 static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
 679                               enum ieee80211_band band, u16 channel,
 680                               const struct iwl_eeprom_channel *eeprom_ch,
 681                               u8 clear_ht40_extension_channel)
 682 {
 683         struct iwl_channel_info *ch_info;
 684
 685         ch_info = (struct iwl_channel_info *)
 686                         iwl_get_channel_info(priv, band, channel);
 687
 688         if (!is_channel_valid(ch_info))
 689                 return -1;
 690
 691         IWL_DEBUG_INFO(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
 692                         " Ad-Hoc %ssupported\n",
 693                         ch_info->channel,
 694                         is_channel_a_band(ch_info) ?
 695                         "5.2" : "2.4",
 696                         CHECK_AND_PRINT(IBSS),
 697                         CHECK_AND_PRINT(ACTIVE),
 698                         CHECK_AND_PRINT(RADAR),
 699                         CHECK_AND_PRINT(WIDE),
 700                         CHECK_AND_PRINT(DFS),
 701                         eeprom_ch->flags,
 702                         eeprom_ch->max_power_avg,
 703                         ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
 704                          && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
 705                         "" : "not ");
 706
 707         ch_info->ht40_eeprom = *eeprom_ch;
 708         ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
 709         ch_info->ht40_curr_txpow = eeprom_ch->max_power_avg;
 710         ch_info->ht40_min_power = 0;
 711         ch_info->ht40_scan_power = eeprom_ch->max_power_avg;
 712         ch_info->ht40_flags = eeprom_ch->flags;
 713         ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
 714
 715         return 0;
 716 }
 717
 718 /**
 719  * iwl_get_max_txpower_avg - get the highest tx power from all chains.
 720  *     find the highest tx power from all chains for the channel
 721  */
 722 static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
 723                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower, int element)
 724 {
 725         s8 max_txpower_avg = 0; /* (dBm) */
 726
 727         IWL_DEBUG_INFO(priv, "%d - "
 728                         "chain_a: %d dB chain_b: %d dB "
 729                         "chain_c: %d dB mimo2: %d dB mimo3: %d dB\n",
 730                         element,
 731                         enhanced_txpower[element].chain_a_max >> 1,
 732                         enhanced_txpower[element].chain_b_max >> 1,
 733                         enhanced_txpower[element].chain_c_max >> 1,
 734                         enhanced_txpower[element].mimo2_max >> 1,
 735                         enhanced_txpower[element].mimo3_max >> 1);
 736         /* Take the highest tx power from any valid chains */
 737         if ((priv->cfg->valid_tx_ant & ANT_A) &&
 738             (enhanced_txpower[element].chain_a_max > max_txpower_avg))
 739                 max_txpower_avg = enhanced_txpower[element].chain_a_max;
 740         if ((priv->cfg->valid_tx_ant & ANT_B) &&
 741             (enhanced_txpower[element].chain_b_max > max_txpower_avg))
 742                 max_txpower_avg = enhanced_txpower[element].chain_b_max;
 743         if ((priv->cfg->valid_tx_ant & ANT_C) &&
 744             (enhanced_txpower[element].chain_c_max > max_txpower_avg))
 745                 max_txpower_avg = enhanced_txpower[element].chain_c_max;
 746         if (((priv->cfg->valid_tx_ant == ANT_AB) |
 747             (priv->cfg->valid_tx_ant == ANT_BC) |
 748             (priv->cfg->valid_tx_ant == ANT_AC)) &&
 749             (enhanced_txpower[element].mimo2_max > max_txpower_avg))
 750                 max_txpower_avg =  enhanced_txpower[element].mimo2_max;
 751         if ((priv->cfg->valid_tx_ant == ANT_ABC) &&
 752             (enhanced_txpower[element].mimo3_max > max_txpower_avg))
 753                 max_txpower_avg = enhanced_txpower[element].mimo3_max;
 754
 755         /* max. tx power in EEPROM is in 1/2 dBm format
 756          * convert from 1/2 dBm to dBm
 757          */
 758         return max_txpower_avg >> 1;
 759 }
 760
 761 /**
 762  * iwl_update_common_txpower: update channel tx power
 763  *     update tx power per band based on EEPROM enhanced tx power info.
 764  */
 765 static s8 iwl_update_common_txpower(struct iwl_priv *priv,
 766                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 767                 int section, int element)
 768 {
 769         struct iwl_channel_info *ch_info;
 770         int ch;
 771         bool is_ht40 = false;
 772         s8 max_txpower_avg; /* (dBm) */
 773
 774         /* it is common section, contain all type (Legacy, HT and HT40)
 775          * based on the element in the section to determine
 776          * is it HT 40 or not
 777          */
 778         if (element == EEPROM_TXPOWER_COMMON_HT40_INDEX)
 779                 is_ht40 = true;
 780         max_txpower_avg =
 781                 iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
 782         ch_info = priv->channel_info;
 783
 784         for (ch = 0; ch < priv->channel_count; ch++) {
 785                 /* find matching band and update tx power if needed */
 786                 if ((ch_info->band == enhinfo[section].band) &&
 787                     (ch_info->max_power_avg < max_txpower_avg) && (!is_ht40)) {
 788                         /* Update regulatory-based run-time data */
 789                         ch_info->max_power_avg = ch_info->curr_txpow =
 790                             max_txpower_avg;
 791                         ch_info->scan_power = max_txpower_avg;
 792                 }
 793                 if ((ch_info->band == enhinfo[section].band) && is_ht40 &&
 794                     ch_info->ht40_max_power_avg &&
 795                     (ch_info->ht40_max_power_avg < max_txpower_avg)) {
 796                         /* Update regulatory-based run-time data */
 797                         ch_info->ht40_max_power_avg = max_txpower_avg;
 798                         ch_info->ht40_curr_txpow = max_txpower_avg;
 799                         ch_info->ht40_scan_power = max_txpower_avg;
 800                 }
 801                 ch_info++;
 802         }
 803         return max_txpower_avg;
 804 }
 805
 806 /**
 807  * iwl_update_channel_txpower: update channel tx power
 808  *      update channel tx power based on EEPROM enhanced tx power info.
 809  */
 810 static s8 iwl_update_channel_txpower(struct iwl_priv *priv,
 811                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 812                 int section, int element)
 813 {
 814         struct iwl_channel_info *ch_info;
 815         int ch;
 816         u8 channel;
 817         s8 max_txpower_avg; /* (dBm) */
 818
 819         channel = enhinfo[section].iwl_eeprom_section_channel[element];
 820         max_txpower_avg =
 821                 iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
 822
 823         ch_info = priv->channel_info;
 824         for (ch = 0; ch < priv->channel_count; ch++) {
 825                 /* find matching channel and update tx power if needed */
 826                 if (ch_info->channel == channel) {
 827                         if ((ch_info->max_power_avg < max_txpower_avg) &&
 828                             (!enhinfo[section].is_ht40)) {
 829                                 /* Update regulatory-based run-time data */
 830                                 ch_info->max_power_avg = max_txpower_avg;
 831                                 ch_info->curr_txpow = max_txpower_avg;
 832                                 ch_info->scan_power = max_txpower_avg;
 833                         }
 834                         if ((enhinfo[section].is_ht40) &&
 835                             (ch_info->ht40_max_power_avg) &&
 836                             (ch_info->ht40_max_power_avg < max_txpower_avg)) {
 837                                 /* Update regulatory-based run-time data */
 838                                 ch_info->ht40_max_power_avg = max_txpower_avg;
 839                                 ch_info->ht40_curr_txpow = max_txpower_avg;
 840                                 ch_info->ht40_scan_power = max_txpower_avg;
 841                         }
 842                         break;
 843                 }
 844                 ch_info++;
 845         }
 846         return max_txpower_avg;
 847 }
 848
 849 /**
 850  * iwlcore_eeprom_enhanced_txpower: process enhanced tx power info
 851  */
 852 void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv)
 853 {
 854         int eeprom_section_count = 0;
 855         int section, element;
 856         struct iwl_eeprom_enhanced_txpwr *enhanced_txpower;
 857         u32 offset;
 858         s8 max_txpower_avg; /* (dBm) */
 859
 860         /* Loop through all the sections
 861          * adjust bands and channel's max tx power
 862          * Set the tx_power_user_lmt to the highest power
 863          * supported by any channels and chains
 864          */
 865         for (section = 0; section < ARRAY_SIZE(enhinfo); section++) {
 866                 eeprom_section_count = enhinfo[section].count;
 867                 offset = enhinfo[section].offset;
 868                 enhanced_txpower = (struct iwl_eeprom_enhanced_txpwr *)
 869                                 iwl_eeprom_query_addr(priv, offset);
 870
 871                 for (element = 0; element < eeprom_section_count; element++) {
 872                         if (enhinfo[section].is_common)
 873                                 max_txpower_avg =
 874                                         iwl_update_common_txpower(priv,
 875                                         enhanced_txpower, section, element);
 876                         else
 877                                 max_txpower_avg =
 878                                         iwl_update_channel_txpower(priv,
 879                                         enhanced_txpower, section, element);
 880
 881                         /* Update the tx_power_user_lmt to the highest power
 882                          * supported by any channel */
 883                         if (max_txpower_avg > priv->tx_power_user_lmt)
 884                                 priv->tx_power_user_lmt = max_txpower_avg;
 885                 }
 886         }
 887 }
 888 EXPORT_SYMBOL(iwlcore_eeprom_enhanced_txpower);
 889
 890 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
 891                             ? # x " " : "")
 892
 893 /**
 894  * iwl_init_channel_map - Set up driver's info for all possible channels
 895  */
 896 int iwl_init_channel_map(struct iwl_priv *priv)
 897 {
 898         int eeprom_ch_count = 0;
 899         const u8 *eeprom_ch_index = NULL;
 900         const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
 901         int band, ch;
 902         struct iwl_channel_info *ch_info;
 903
 904         if (priv->channel_count) {
 905                 IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
 906                 return 0;
 907         }
 908
 909         IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
 910
 911         priv->channel_count =
 912             ARRAY_SIZE(iwl_eeprom_band_1) +
 913             ARRAY_SIZE(iwl_eeprom_band_2) +
 914             ARRAY_SIZE(iwl_eeprom_band_3) +
 915             ARRAY_SIZE(iwl_eeprom_band_4) +
 916             ARRAY_SIZE(iwl_eeprom_band_5);
 917
 918         IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
 919
 920         priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
 921                                      priv->channel_count, GFP_KERNEL);
 922         if (!priv->channel_info) {
 923                 IWL_ERR(priv, "Could not allocate channel_info\n");
 924                 priv->channel_count = 0;
 925                 return -ENOMEM;
 926         }
 927
 928         ch_info = priv->channel_info;
 929
 930         /* Loop through the 5 EEPROM bands adding them in order to the
 931          * channel map we maintain (that contains additional information than
 932          * what just in the EEPROM) */
 933         for (band = 1; band <= 5; band++) {
 934
 935                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 936                                         &eeprom_ch_info, &eeprom_ch_index);
 937
 938                 /* Loop through each band adding each of the channels */
 939                 for (ch = 0; ch < eeprom_ch_count; ch++) {
 940                         ch_info->channel = eeprom_ch_index[ch];
 941                         ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
 942                             IEEE80211_BAND_5GHZ;
 943
 944                         /* permanently store EEPROM's channel regulatory flags
 945                          *   and max power in channel info database. */
 946                         ch_info->eeprom = eeprom_ch_info[ch];
 947
 948                         /* Copy the run-time flags so they are there even on
 949                          * invalid channels */
 950                         ch_info->flags = eeprom_ch_info[ch].flags;
 951                         /* First write that ht40 is not enabled, and then enable
 952                          * one by one */
 953                         ch_info->ht40_extension_channel =
 954                                         IEEE80211_CHAN_NO_HT40;
 955
 956                         if (!(is_channel_valid(ch_info))) {
 957                                 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
 958                                                "No traffic\n",
 959                                                ch_info->channel,
 960                                                ch_info->flags,
 961                                                is_channel_a_band(ch_info) ?
 962                                                "5.2" : "2.4");
 963                                 ch_info++;
 964                                 continue;
 965                         }
 966
 967                         /* Initialize regulatory-based run-time data */
 968                         ch_info->max_power_avg = ch_info->curr_txpow =
 969                             eeprom_ch_info[ch].max_power_avg;
 970                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
 971                         ch_info->min_power = 0;
 972
 973                         IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
 974                                        " Ad-Hoc %ssupported\n",
 975                                        ch_info->channel,
 976                                        is_channel_a_band(ch_info) ?
 977                                        "5.2" : "2.4",
 978                                        CHECK_AND_PRINT_I(VALID),
 979                                        CHECK_AND_PRINT_I(IBSS),
 980                                        CHECK_AND_PRINT_I(ACTIVE),
 981                                        CHECK_AND_PRINT_I(RADAR),
 982                                        CHECK_AND_PRINT_I(WIDE),
 983                                        CHECK_AND_PRINT_I(DFS),
 984                                        eeprom_ch_info[ch].flags,
 985                                        eeprom_ch_info[ch].max_power_avg,
 986                                        ((eeprom_ch_info[ch].
 987                                          flags & EEPROM_CHANNEL_IBSS)
 988                                         && !(eeprom_ch_info[ch].
 989                                              flags & EEPROM_CHANNEL_RADAR))
 990                                        ? "" : "not ");
 991
 992                         /* Set the tx_power_user_lmt to the highest power
 993                          * supported by any channel */
 994                         if (eeprom_ch_info[ch].max_power_avg >
 995                                                 priv->tx_power_user_lmt)
 996                                 priv->tx_power_user_lmt =
 997                                     eeprom_ch_info[ch].max_power_avg;
 998
 999                         ch_info++;
1000                 }
1001         }
1002
1003         /* Check if we do have HT40 channels */
1004         if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
1005             EEPROM_REGULATORY_BAND_NO_HT40 &&
1006             priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
1007             EEPROM_REGULATORY_BAND_NO_HT40)
1008                 return 0;
1009
1010         /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
1011         for (band = 6; band <= 7; band++) {
1012                 enum ieee80211_band ieeeband;
1013
1014                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
1015                                         &eeprom_ch_info, &eeprom_ch_index);
1016
1017                 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
1018                 ieeeband =
1019                         (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1020
1021                 /* Loop through each band adding each of the channels */
1022                 for (ch = 0; ch < eeprom_ch_count; ch++) {
1023                         /* Set up driver's info for lower half */
1024                         iwl_mod_ht40_chan_info(priv, ieeeband,
1025                                                 eeprom_ch_index[ch],
1026                                                 &eeprom_ch_info[ch],
1027                                                 IEEE80211_CHAN_NO_HT40PLUS);
1028
1029                         /* Set up driver's info for upper half */
1030                         iwl_mod_ht40_chan_info(priv, ieeeband,
1031                                                 eeprom_ch_index[ch] + 4,
1032                                                 &eeprom_ch_info[ch],
1033                                                 IEEE80211_CHAN_NO_HT40MINUS);
1034                 }
1035         }
1036
1037         /* for newer device (6000 series and up)
1038          * EEPROM contain enhanced tx power information
1039          * driver need to process addition information
1040          * to determine the max channel tx power limits
1041          */
1042         if (priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower)
1043                 priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower(priv);
1044
1045         return 0;
1046 }
1047 EXPORT_SYMBOL(iwl_init_channel_map);
1048
1049 /*
1050  * iwl_free_channel_map - undo allocations in iwl_init_channel_map
1051  */
1052 void iwl_free_channel_map(struct iwl_priv *priv)
1053 {
1054         kfree(priv->channel_info);
1055         priv->channel_count = 0;
1056 }
1057 EXPORT_SYMBOL(iwl_free_channel_map);
1058
1059 /**
1060  * iwl_get_channel_info - Find driver's private channel info
1061  *
1062  * Based on band and channel number.
1063  */
1064 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
1065                                         enum ieee80211_band band, u16 channel)
1066 {
1067         int i;
1068
1069         switch (band) {
1070         case IEEE80211_BAND_5GHZ:
1071                 for (i = 14; i < priv->channel_count; i++) {
1072                         if (priv->channel_info[i].channel == channel)
1073                                 return &priv->channel_info[i];
1074                 }
1075                 break;
1076         case IEEE80211_BAND_2GHZ:
1077                 if (channel >= 1 && channel <= 14)
1078                         return &priv->channel_info[channel - 1];
1079                 break;
1080         default:
1081                 BUG();
1082         }
1083
1084         return NULL;
1085 }
1086 EXPORT_SYMBOL(iwl_get_channel_info);
1087