iwlwifi: replace iwl_poll_direct_bit with iwl_poll_bit for CSR access
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-eeprom.c
1 /******************************************************************************
2  *
3  * This file is provided under a dual BSD/GPLv2 license.  When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * GPL LICENSE SUMMARY
7  *
8  * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of version 2 of the GNU General Public License as
12  * published by the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but
15  * WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17  * General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22  * USA
23  *
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25  * in the file called LICENSE.GPL.
26  *
27  * Contact Information:
28  *  Intel Linux Wireless <ilw@linux.intel.com>
29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30  *
31  * BSD LICENSE
32  *
33  * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved.
34  * All rights reserved.
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37  * modification, are permitted provided that the following conditions
38  * are met:
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41  *    notice, this list of conditions and the following disclaimer.
42  *  * Redistributions in binary form must reproduce the above copyright
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44  *    the documentation and/or other materials provided with the
45  *    distribution.
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47  *    contributors may be used to endorse or promote products derived
48  *    from this software without specific prior written permission.
49  *
50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61  *****************************************************************************/
62
63
64 #include <linux/kernel.h>
65 #include <linux/module.h>
66 #include <linux/init.h>
67
68 #include <net/mac80211.h>
69
70 #include "iwl-commands.h"
71 #include "iwl-dev.h"
72 #include "iwl-core.h"
73 #include "iwl-debug.h"
74 #include "iwl-eeprom.h"
75 #include "iwl-io.h"
76
77 /************************** EEPROM BANDS ****************************
78  *
79  * The iwl_eeprom_band definitions below provide the mapping from the
80  * EEPROM contents to the specific channel number supported for each
81  * band.
82  *
83  * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
84  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
85  * The specific geography and calibration information for that channel
86  * is contained in the eeprom map itself.
87  *
88  * During init, we copy the eeprom information and channel map
89  * information into priv->channel_info_24/52 and priv->channel_map_24/52
90  *
91  * channel_map_24/52 provides the index in the channel_info array for a
92  * given channel.  We have to have two separate maps as there is channel
93  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
94  * band_2
95  *
96  * A value of 0xff stored in the channel_map indicates that the channel
97  * is not supported by the hardware at all.
98  *
99  * A value of 0xfe in the channel_map indicates that the channel is not
100  * valid for Tx with the current hardware.  This means that
101  * while the system can tune and receive on a given channel, it may not
102  * be able to associate or transmit any frames on that
103  * channel.  There is no corresponding channel information for that
104  * entry.
105  *
106  *********************************************************************/
107
108 /* 2.4 GHz */
109 const u8 iwl_eeprom_band_1[14] = {
110         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
111 };
112
113 /* 5.2 GHz bands */
114 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
115         183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
116 };
117
118 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
119         34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
120 };
121
122 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
123         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
124 };
125
126 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
127         145, 149, 153, 157, 161, 165
128 };
129
130 static const u8 iwl_eeprom_band_6[] = {       /* 2.4 ht40 channel */
131         1, 2, 3, 4, 5, 6, 7
132 };
133
134 static const u8 iwl_eeprom_band_7[] = {       /* 5.2 ht40 channel */
135         36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
136 };
137
138 /**
139  * struct iwl_txpwr_section: eeprom section information
140  * @offset: indirect address into eeprom image
141  * @count: number of "struct iwl_eeprom_enhanced_txpwr" in this section
142  * @band: band type for the section
143  * @is_common - true: common section, false: channel section
144  * @is_cck - true: cck section, false: not cck section
145  * @is_ht_40 - true: all channel in the section are HT40 channel,
146  *             false: legacy or HT 20 MHz
147  *             ignore if it is common section
148  * @iwl_eeprom_section_channel: channel array in the section,
149  *             ignore if common section
150  */
151 struct iwl_txpwr_section {
152         u32 offset;
153         u8 count;
154         enum ieee80211_band band;
155         bool is_common;
156         bool is_cck;
157         bool is_ht40;
158         u8 iwl_eeprom_section_channel[EEPROM_MAX_TXPOWER_SECTION_ELEMENTS];
159 };
160
161 /**
162  * section 1 - 3 are regulatory tx power apply to all channels based on
163  *    modulation: CCK, OFDM
164  *    Band: 2.4GHz, 5.2GHz
165  * section 4 - 10 are regulatory tx power apply to specified channels
166  *    For example:
167  *      1L - Channel 1 Legacy
168  *      1HT - Channel 1 HT
169  *      (1,+1) - Channel 1 HT40 "_above_"
170  *
171  * Section 1: all CCK channels
172  * Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40) channels
173  * Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels
174  * Section 4: 2.4 GHz 20MHz channels: 1L, 1HT, 2L, 2HT, 10L, 10HT, 11L, 11HT
175  * Section 5: 2.4 GHz 40MHz channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1)
176  * Section 6: 5.2 GHz 20MHz channels: 36L, 64L, 100L, 36HT, 64HT, 100HT
177  * Section 7: 5.2 GHz 40MHz channels: (36,+1) (60,+1) (100,+1)
178  * Section 8: 2.4 GHz channel: 13L, 13HT
179  * Section 9: 2.4 GHz channel: 140L, 140HT
180  * Section 10: 2.4 GHz 40MHz channels: (132,+1)  (44,+1)
181  *
182  */
183 static const struct iwl_txpwr_section enhinfo[] = {
184         { EEPROM_LB_CCK_20_COMMON, 1, IEEE80211_BAND_2GHZ, true, true, false },
185         { EEPROM_LB_OFDM_COMMON, 3, IEEE80211_BAND_2GHZ, true, false, false },
186         { EEPROM_HB_OFDM_COMMON, 3, IEEE80211_BAND_5GHZ, true, false, false },
187         { EEPROM_LB_OFDM_20_BAND, 8, IEEE80211_BAND_2GHZ,
188                 false, false, false,
189                 {1, 1, 2, 2, 10, 10, 11, 11 } },
190         { EEPROM_LB_OFDM_HT40_BAND, 5, IEEE80211_BAND_2GHZ,
191                 false, false, true,
192                 { 1, 2, 6, 7, 9 } },
193         { EEPROM_HB_OFDM_20_BAND, 6, IEEE80211_BAND_5GHZ,
194                 false, false, false,
195                 { 36, 64, 100, 36, 64, 100 } },
196         { EEPROM_HB_OFDM_HT40_BAND, 3, IEEE80211_BAND_5GHZ,
197                 false, false, true,
198                 { 36, 60, 100 } },
199         { EEPROM_LB_OFDM_20_CHANNEL_13, 2, IEEE80211_BAND_2GHZ,
200                 false, false, false,
201                 { 13, 13 } },
202         { EEPROM_HB_OFDM_20_CHANNEL_140, 2, IEEE80211_BAND_5GHZ,
203                 false, false, false,
204                 { 140, 140 } },
205         { EEPROM_HB_OFDM_HT40_BAND_1, 2, IEEE80211_BAND_5GHZ,
206                 false, false, true,
207                 { 132, 44 } },
208 };
209
210 /******************************************************************************
211  *
212  * EEPROM related functions
213  *
214 ******************************************************************************/
215
216 int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
217 {
218         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
219         if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
220                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
221                 return -ENOENT;
222         }
223         return 0;
224 }
225 EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
226
227 static void iwl_set_otp_access(struct iwl_priv *priv, enum iwl_access_mode mode)
228 {
229         u32 otpgp;
230
231         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
232         if (mode == IWL_OTP_ACCESS_ABSOLUTE)
233                 iwl_clear_bit(priv, CSR_OTP_GP_REG,
234                                 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
235         else
236                 iwl_set_bit(priv, CSR_OTP_GP_REG,
237                                 CSR_OTP_GP_REG_OTP_ACCESS_MODE);
238 }
239
240 static int iwlcore_get_nvm_type(struct iwl_priv *priv)
241 {
242         u32 otpgp;
243         int nvm_type;
244
245         /* OTP only valid for CP/PP and after */
246         switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
247         case CSR_HW_REV_TYPE_NONE:
248                 IWL_ERR(priv, "Unknown hardware type\n");
249                 return -ENOENT;
250         case CSR_HW_REV_TYPE_3945:
251         case CSR_HW_REV_TYPE_4965:
252         case CSR_HW_REV_TYPE_5300:
253         case CSR_HW_REV_TYPE_5350:
254         case CSR_HW_REV_TYPE_5100:
255         case CSR_HW_REV_TYPE_5150:
256                 nvm_type = NVM_DEVICE_TYPE_EEPROM;
257                 break;
258         default:
259                 otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
260                 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
261                         nvm_type = NVM_DEVICE_TYPE_OTP;
262                 else
263                         nvm_type = NVM_DEVICE_TYPE_EEPROM;
264                 break;
265         }
266         return  nvm_type;
267 }
268
269 /*
270  * The device's EEPROM semaphore prevents conflicts between driver and uCode
271  * when accessing the EEPROM; each access is a series of pulses to/from the
272  * EEPROM chip, not a single event, so even reads could conflict if they
273  * weren't arbitrated by the semaphore.
274  */
275 int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
276 {
277         u16 count;
278         int ret;
279
280         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
281                 /* Request semaphore */
282                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
283                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
284
285                 /* See if we got it */
286                 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
287                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
288                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
289                                 EEPROM_SEM_TIMEOUT);
290                 if (ret >= 0) {
291                         IWL_DEBUG_IO(priv, "Acquired semaphore after %d tries.\n",
292                                 count+1);
293                         return ret;
294                 }
295         }
296
297         return ret;
298 }
299 EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
300
301 void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
302 {
303         iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
304                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
305
306 }
307 EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
308
309 const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
310 {
311         BUG_ON(offset >= priv->cfg->eeprom_size);
312         return &priv->eeprom[offset];
313 }
314 EXPORT_SYMBOL(iwlcore_eeprom_query_addr);
315
316 static int iwl_init_otp_access(struct iwl_priv *priv)
317 {
318         int ret;
319
320         /* Enable 40MHz radio clock */
321         _iwl_write32(priv, CSR_GP_CNTRL,
322                      _iwl_read32(priv, CSR_GP_CNTRL) |
323                      CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
324
325         /* wait for clock to be ready */
326         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
327                                   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
328                                   CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
329                                   25000);
330         if (ret < 0)
331                 IWL_ERR(priv, "Time out access OTP\n");
332         else {
333                 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
334                                   APMG_PS_CTRL_VAL_RESET_REQ);
335                 udelay(5);
336                 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
337                                     APMG_PS_CTRL_VAL_RESET_REQ);
338         }
339         return ret;
340 }
341
342 static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
343 {
344         int ret = 0;
345         u32 r;
346         u32 otpgp;
347
348         _iwl_write32(priv, CSR_EEPROM_REG,
349                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
350         ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
351                                   CSR_EEPROM_REG_READ_VALID_MSK,
352                                   CSR_EEPROM_REG_READ_VALID_MSK,
353                                   IWL_EEPROM_ACCESS_TIMEOUT);
354         if (ret < 0) {
355                 IWL_ERR(priv, "Time out reading OTP[%d]\n", addr);
356                 return ret;
357         }
358         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
359         /* check for ECC errors: */
360         otpgp = iwl_read32(priv, CSR_OTP_GP_REG);
361         if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
362                 /* stop in this case */
363                 /* set the uncorrectable OTP ECC bit for acknowledgement */
364                 iwl_set_bit(priv, CSR_OTP_GP_REG,
365                         CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
366                 IWL_ERR(priv, "Uncorrectable OTP ECC error, abort OTP read\n");
367                 return -EINVAL;
368         }
369         if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
370                 /* continue in this case */
371                 /* set the correctable OTP ECC bit for acknowledgement */
372                 iwl_set_bit(priv, CSR_OTP_GP_REG,
373                                 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
374                 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
375         }
376         *eeprom_data = le16_to_cpu((__force __le16)(r >> 16));
377         return 0;
378 }
379
380 /*
381  * iwl_is_otp_empty: check for empty OTP
382  */
383 static bool iwl_is_otp_empty(struct iwl_priv *priv)
384 {
385         u16 next_link_addr = 0, link_value;
386         bool is_empty = false;
387
388         /* locate the beginning of OTP link list */
389         if (!iwl_read_otp_word(priv, next_link_addr, &link_value)) {
390                 if (!link_value) {
391                         IWL_ERR(priv, "OTP is empty\n");
392                         is_empty = true;
393                 }
394         } else {
395                 IWL_ERR(priv, "Unable to read first block of OTP list.\n");
396                 is_empty = true;
397         }
398
399         return is_empty;
400 }
401
402
403 /*
404  * iwl_find_otp_image: find EEPROM image in OTP
405  *   finding the OTP block that contains the EEPROM image.
406  *   the last valid block on the link list (the block _before_ the last block)
407  *   is the block we should read and used to configure the device.
408  *   If all the available OTP blocks are full, the last block will be the block
409  *   we should read and used to configure the device.
410  *   only perform this operation if shadow RAM is disabled
411  */
412 static int iwl_find_otp_image(struct iwl_priv *priv,
413                                         u16 *validblockaddr)
414 {
415         u16 next_link_addr = 0, link_value = 0, valid_addr;
416         int ret = 0;
417         int usedblocks = 0;
418
419         /* set addressing mode to absolute to traverse the link list */
420         iwl_set_otp_access(priv, IWL_OTP_ACCESS_ABSOLUTE);
421
422         /* checking for empty OTP or error */
423         if (iwl_is_otp_empty(priv))
424                 return -EINVAL;
425
426         /*
427          * start traverse link list
428          * until reach the max number of OTP blocks
429          * different devices have different number of OTP blocks
430          */
431         do {
432                 /* save current valid block address
433                  * check for more block on the link list
434                  */
435                 valid_addr = next_link_addr;
436                 next_link_addr = link_value;
437                 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
438                                usedblocks, next_link_addr);
439                 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
440                         return -EINVAL;
441                 if (!link_value) {
442                         /*
443                          * reach the end of link list,
444                          * set address point to the starting address
445                          * of the image
446                          */
447                         goto done;
448                 }
449                 /* more in the link list, continue */
450                 usedblocks++;
451         } while (usedblocks < priv->cfg->max_ll_items);
452         /* OTP full, use last block */
453         IWL_DEBUG_INFO(priv, "OTP is full, use last block\n");
454 done:
455         *validblockaddr = valid_addr;
456         /* skip first 2 bytes (link list pointer) */
457         *validblockaddr += 2;
458         return ret;
459 }
460
461 /**
462  * iwl_eeprom_init - read EEPROM contents
463  *
464  * Load the EEPROM contents from adapter into priv->eeprom
465  *
466  * NOTE:  This routine uses the non-debug IO access functions.
467  */
468 int iwl_eeprom_init(struct iwl_priv *priv)
469 {
470         u16 *e;
471         u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
472         int sz;
473         int ret;
474         u16 addr;
475         u16 validblockaddr = 0;
476         u16 cache_addr = 0;
477
478         priv->nvm_device_type = iwlcore_get_nvm_type(priv);
479         if (priv->nvm_device_type == -ENOENT)
480                 return -ENOENT;
481         /* allocate eeprom */
482         IWL_DEBUG_INFO(priv, "NVM size = %d\n", priv->cfg->eeprom_size);
483         sz = priv->cfg->eeprom_size;
484         priv->eeprom = kzalloc(sz, GFP_KERNEL);
485         if (!priv->eeprom) {
486                 ret = -ENOMEM;
487                 goto alloc_err;
488         }
489         e = (u16 *)priv->eeprom;
490
491         ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
492         if (ret < 0) {
493                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
494                 ret = -ENOENT;
495                 goto err;
496         }
497
498         /* Make sure driver (instead of uCode) is allowed to read EEPROM */
499         ret = priv->cfg->ops->lib->eeprom_ops.acquire_semaphore(priv);
500         if (ret < 0) {
501                 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
502                 ret = -ENOENT;
503                 goto err;
504         }
505         if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
506                 ret = iwl_init_otp_access(priv);
507                 if (ret) {
508                         IWL_ERR(priv, "Failed to initialize OTP access.\n");
509                         ret = -ENOENT;
510                         goto done;
511                 }
512                 _iwl_write32(priv, CSR_EEPROM_GP,
513                              iwl_read32(priv, CSR_EEPROM_GP) &
514                              ~CSR_EEPROM_GP_IF_OWNER_MSK);
515
516                 iwl_set_bit(priv, CSR_OTP_GP_REG,
517                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
518                              CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
519                 /* traversing the linked list if no shadow ram supported */
520                 if (!priv->cfg->shadow_ram_support) {
521                         if (iwl_find_otp_image(priv, &validblockaddr)) {
522                                 ret = -ENOENT;
523                                 goto done;
524                         }
525                 }
526                 for (addr = validblockaddr; addr < validblockaddr + sz;
527                      addr += sizeof(u16)) {
528                         u16 eeprom_data;
529
530                         ret = iwl_read_otp_word(priv, addr, &eeprom_data);
531                         if (ret)
532                                 goto done;
533                         e[cache_addr / 2] = eeprom_data;
534                         cache_addr += sizeof(u16);
535                 }
536         } else {
537                 /* eeprom is an array of 16bit values */
538                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
539                         u32 r;
540
541                         _iwl_write32(priv, CSR_EEPROM_REG,
542                                      CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
543
544                         ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
545                                                   CSR_EEPROM_REG_READ_VALID_MSK,
546                                                   CSR_EEPROM_REG_READ_VALID_MSK,
547                                                   IWL_EEPROM_ACCESS_TIMEOUT);
548                         if (ret < 0) {
549                                 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
550                                 goto done;
551                         }
552                         r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
553                         e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
554                 }
555         }
556         ret = 0;
557 done:
558         priv->cfg->ops->lib->eeprom_ops.release_semaphore(priv);
559 err:
560         if (ret)
561                 iwl_eeprom_free(priv);
562 alloc_err:
563         return ret;
564 }
565 EXPORT_SYMBOL(iwl_eeprom_init);
566
567 void iwl_eeprom_free(struct iwl_priv *priv)
568 {
569         kfree(priv->eeprom);
570         priv->eeprom = NULL;
571 }
572 EXPORT_SYMBOL(iwl_eeprom_free);
573
574 int iwl_eeprom_check_version(struct iwl_priv *priv)
575 {
576         u16 eeprom_ver;
577         u16 calib_ver;
578
579         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
580         calib_ver = priv->cfg->ops->lib->eeprom_ops.calib_version(priv);
581
582         if (eeprom_ver < priv->cfg->eeprom_ver ||
583             calib_ver < priv->cfg->eeprom_calib_ver)
584                 goto err;
585
586         return 0;
587 err:
588         IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
589                   eeprom_ver, priv->cfg->eeprom_ver,
590                   calib_ver,  priv->cfg->eeprom_calib_ver);
591         return -EINVAL;
592
593 }
594 EXPORT_SYMBOL(iwl_eeprom_check_version);
595
596 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset)
597 {
598         return priv->cfg->ops->lib->eeprom_ops.query_addr(priv, offset);
599 }
600 EXPORT_SYMBOL(iwl_eeprom_query_addr);
601
602 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset)
603 {
604         if (!priv->eeprom)
605                 return 0;
606         return (u16)priv->eeprom[offset] | ((u16)priv->eeprom[offset + 1] << 8);
607 }
608 EXPORT_SYMBOL(iwl_eeprom_query16);
609
610 void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
611 {
612         const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,
613                                         EEPROM_MAC_ADDRESS);
614         memcpy(mac, addr, ETH_ALEN);
615 }
616 EXPORT_SYMBOL(iwl_eeprom_get_mac);
617
618 static void iwl_init_band_reference(const struct iwl_priv *priv,
619                         int eep_band, int *eeprom_ch_count,
620                         const struct iwl_eeprom_channel **eeprom_ch_info,
621                         const u8 **eeprom_ch_index)
622 {
623         u32 offset = priv->cfg->ops->lib->
624                         eeprom_ops.regulatory_bands[eep_band - 1];
625         switch (eep_band) {
626         case 1:         /* 2.4GHz band */
627                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
628                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
629                                 iwl_eeprom_query_addr(priv, offset);
630                 *eeprom_ch_index = iwl_eeprom_band_1;
631                 break;
632         case 2:         /* 4.9GHz band */
633                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
634                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
635                                 iwl_eeprom_query_addr(priv, offset);
636                 *eeprom_ch_index = iwl_eeprom_band_2;
637                 break;
638         case 3:         /* 5.2GHz band */
639                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
640                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
641                                 iwl_eeprom_query_addr(priv, offset);
642                 *eeprom_ch_index = iwl_eeprom_band_3;
643                 break;
644         case 4:         /* 5.5GHz band */
645                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
646                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
647                                 iwl_eeprom_query_addr(priv, offset);
648                 *eeprom_ch_index = iwl_eeprom_band_4;
649                 break;
650         case 5:         /* 5.7GHz band */
651                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
652                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
653                                 iwl_eeprom_query_addr(priv, offset);
654                 *eeprom_ch_index = iwl_eeprom_band_5;
655                 break;
656         case 6:         /* 2.4GHz ht40 channels */
657                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
658                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
659                                 iwl_eeprom_query_addr(priv, offset);
660                 *eeprom_ch_index = iwl_eeprom_band_6;
661                 break;
662         case 7:         /* 5 GHz ht40 channels */
663                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
664                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
665                                 iwl_eeprom_query_addr(priv, offset);
666                 *eeprom_ch_index = iwl_eeprom_band_7;
667                 break;
668         default:
669                 BUG();
670                 return;
671         }
672 }
673
674 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
675                             ? # x " " : "")
676
677 /**
678  * iwl_mod_ht40_chan_info - Copy ht40 channel info into driver's priv.
679  *
680  * Does not set up a command, or touch hardware.
681  */
682 static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
683                               enum ieee80211_band band, u16 channel,
684                               const struct iwl_eeprom_channel *eeprom_ch,
685                               u8 clear_ht40_extension_channel)
686 {
687         struct iwl_channel_info *ch_info;
688
689         ch_info = (struct iwl_channel_info *)
690                         iwl_get_channel_info(priv, band, channel);
691
692         if (!is_channel_valid(ch_info))
693                 return -1;
694
695         IWL_DEBUG_INFO(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
696                         " Ad-Hoc %ssupported\n",
697                         ch_info->channel,
698                         is_channel_a_band(ch_info) ?
699                         "5.2" : "2.4",
700                         CHECK_AND_PRINT(IBSS),
701                         CHECK_AND_PRINT(ACTIVE),
702                         CHECK_AND_PRINT(RADAR),
703                         CHECK_AND_PRINT(WIDE),
704                         CHECK_AND_PRINT(DFS),
705                         eeprom_ch->flags,
706                         eeprom_ch->max_power_avg,
707                         ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
708                          && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
709                         "" : "not ");
710
711         ch_info->ht40_eeprom = *eeprom_ch;
712         ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
713         ch_info->ht40_curr_txpow = eeprom_ch->max_power_avg;
714         ch_info->ht40_min_power = 0;
715         ch_info->ht40_scan_power = eeprom_ch->max_power_avg;
716         ch_info->ht40_flags = eeprom_ch->flags;
717         ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
718
719         return 0;
720 }
721
722 /**
723  * iwl_get_max_txpower_avg - get the highest tx power from all chains.
724  *     find the highest tx power from all chains for the channel
725  */
726 static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
727                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower, int element)
728 {
729         s8 max_txpower_avg = 0; /* (dBm) */
730
731         IWL_DEBUG_INFO(priv, "%d - "
732                         "chain_a: %d dB chain_b: %d dB "
733                         "chain_c: %d dB mimo2: %d dB mimo3: %d dB\n",
734                         element,
735                         enhanced_txpower[element].chain_a_max >> 1,
736                         enhanced_txpower[element].chain_b_max >> 1,
737                         enhanced_txpower[element].chain_c_max >> 1,
738                         enhanced_txpower[element].mimo2_max >> 1,
739                         enhanced_txpower[element].mimo3_max >> 1);
740         /* Take the highest tx power from any valid chains */
741         if ((priv->cfg->valid_tx_ant & ANT_A) &&
742             (enhanced_txpower[element].chain_a_max > max_txpower_avg))
743                 max_txpower_avg = enhanced_txpower[element].chain_a_max;
744         if ((priv->cfg->valid_tx_ant & ANT_B) &&
745             (enhanced_txpower[element].chain_b_max > max_txpower_avg))
746                 max_txpower_avg = enhanced_txpower[element].chain_b_max;
747         if ((priv->cfg->valid_tx_ant & ANT_C) &&
748             (enhanced_txpower[element].chain_c_max > max_txpower_avg))
749                 max_txpower_avg = enhanced_txpower[element].chain_c_max;
750         if (((priv->cfg->valid_tx_ant == ANT_AB) |
751             (priv->cfg->valid_tx_ant == ANT_BC) |
752             (priv->cfg->valid_tx_ant == ANT_AC)) &&
753             (enhanced_txpower[element].mimo2_max > max_txpower_avg))
754                 max_txpower_avg =  enhanced_txpower[element].mimo2_max;
755         if ((priv->cfg->valid_tx_ant == ANT_ABC) &&
756             (enhanced_txpower[element].mimo3_max > max_txpower_avg))
757                 max_txpower_avg = enhanced_txpower[element].mimo3_max;
758
759         /* max. tx power in EEPROM is in 1/2 dBm format
760          * convert from 1/2 dBm to dBm
761          */
762         return max_txpower_avg >> 1;
763 }
764
765 /**
766  * iwl_update_common_txpower: update channel tx power
767  *     update tx power per band based on EEPROM enhanced tx power info.
768  */
769 static s8 iwl_update_common_txpower(struct iwl_priv *priv,
770                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
771                 int section, int element)
772 {
773         struct iwl_channel_info *ch_info;
774         int ch;
775         bool is_ht40 = false;
776         s8 max_txpower_avg; /* (dBm) */
777
778         /* it is common section, contain all type (Legacy, HT and HT40)
779          * based on the element in the section to determine
780          * is it HT 40 or not
781          */
782         if (element == EEPROM_TXPOWER_COMMON_HT40_INDEX)
783                 is_ht40 = true;
784         max_txpower_avg =
785                 iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
786         ch_info = priv->channel_info;
787
788         for (ch = 0; ch < priv->channel_count; ch++) {
789                 /* find matching band and update tx power if needed */
790                 if ((ch_info->band == enhinfo[section].band) &&
791                     (ch_info->max_power_avg < max_txpower_avg) && (!is_ht40)) {
792                         /* Update regulatory-based run-time data */
793                         ch_info->max_power_avg = ch_info->curr_txpow =
794                             max_txpower_avg;
795                         ch_info->scan_power = max_txpower_avg;
796                 }
797                 if ((ch_info->band == enhinfo[section].band) && is_ht40 &&
798                     ch_info->ht40_max_power_avg &&
799                     (ch_info->ht40_max_power_avg < max_txpower_avg)) {
800                         /* Update regulatory-based run-time data */
801                         ch_info->ht40_max_power_avg = max_txpower_avg;
802                         ch_info->ht40_curr_txpow = max_txpower_avg;
803                         ch_info->ht40_scan_power = max_txpower_avg;
804                 }
805                 ch_info++;
806         }
807         return max_txpower_avg;
808 }
809
810 /**
811  * iwl_update_channel_txpower: update channel tx power
812  *      update channel tx power based on EEPROM enhanced tx power info.
813  */
814 static s8 iwl_update_channel_txpower(struct iwl_priv *priv,
815                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
816                 int section, int element)
817 {
818         struct iwl_channel_info *ch_info;
819         int ch;
820         u8 channel;
821         s8 max_txpower_avg; /* (dBm) */
822
823         channel = enhinfo[section].iwl_eeprom_section_channel[element];
824         max_txpower_avg =
825                 iwl_get_max_txpower_avg(priv, enhanced_txpower, element);
826
827         ch_info = priv->channel_info;
828         for (ch = 0; ch < priv->channel_count; ch++) {
829                 /* find matching channel and update tx power if needed */
830                 if (ch_info->channel == channel) {
831                         if ((ch_info->max_power_avg < max_txpower_avg) &&
832                             (!enhinfo[section].is_ht40)) {
833                                 /* Update regulatory-based run-time data */
834                                 ch_info->max_power_avg = max_txpower_avg;
835                                 ch_info->curr_txpow = max_txpower_avg;
836                                 ch_info->scan_power = max_txpower_avg;
837                         }
838                         if ((enhinfo[section].is_ht40) &&
839                             (ch_info->ht40_max_power_avg) &&
840                             (ch_info->ht40_max_power_avg < max_txpower_avg)) {
841                                 /* Update regulatory-based run-time data */
842                                 ch_info->ht40_max_power_avg = max_txpower_avg;
843                                 ch_info->ht40_curr_txpow = max_txpower_avg;
844                                 ch_info->ht40_scan_power = max_txpower_avg;
845                         }
846                         break;
847                 }
848                 ch_info++;
849         }
850         return max_txpower_avg;
851 }
852
853 /**
854  * iwlcore_eeprom_enhanced_txpower: process enhanced tx power info
855  */
856 void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv)
857 {
858         int eeprom_section_count = 0;
859         int section, element;
860         struct iwl_eeprom_enhanced_txpwr *enhanced_txpower;
861         u32 offset;
862         s8 max_txpower_avg; /* (dBm) */
863
864         /* Loop through all the sections
865          * adjust bands and channel's max tx power
866          * Set the tx_power_user_lmt to the highest power
867          * supported by any channels and chains
868          */
869         for (section = 0; section < ARRAY_SIZE(enhinfo); section++) {
870                 eeprom_section_count = enhinfo[section].count;
871                 offset = enhinfo[section].offset;
872                 enhanced_txpower = (struct iwl_eeprom_enhanced_txpwr *)
873                                 iwl_eeprom_query_addr(priv, offset);
874
875                 for (element = 0; element < eeprom_section_count; element++) {
876                         if (enhinfo[section].is_common)
877                                 max_txpower_avg =
878                                         iwl_update_common_txpower(priv,
879                                         enhanced_txpower, section, element);
880                         else
881                                 max_txpower_avg =
882                                         iwl_update_channel_txpower(priv,
883                                         enhanced_txpower, section, element);
884
885                         /* Update the tx_power_user_lmt to the highest power
886                          * supported by any channel */
887                         if (max_txpower_avg > priv->tx_power_user_lmt)
888                                 priv->tx_power_user_lmt = max_txpower_avg;
889                 }
890         }
891 }
892 EXPORT_SYMBOL(iwlcore_eeprom_enhanced_txpower);
893
894 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
895                             ? # x " " : "")
896
897 /**
898  * iwl_init_channel_map - Set up driver's info for all possible channels
899  */
900 int iwl_init_channel_map(struct iwl_priv *priv)
901 {
902         int eeprom_ch_count = 0;
903         const u8 *eeprom_ch_index = NULL;
904         const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
905         int band, ch;
906         struct iwl_channel_info *ch_info;
907
908         if (priv->channel_count) {
909                 IWL_DEBUG_INFO(priv, "Channel map already initialized.\n");
910                 return 0;
911         }
912
913         IWL_DEBUG_INFO(priv, "Initializing regulatory info from EEPROM\n");
914
915         priv->channel_count =
916             ARRAY_SIZE(iwl_eeprom_band_1) +
917             ARRAY_SIZE(iwl_eeprom_band_2) +
918             ARRAY_SIZE(iwl_eeprom_band_3) +
919             ARRAY_SIZE(iwl_eeprom_band_4) +
920             ARRAY_SIZE(iwl_eeprom_band_5);
921
922         IWL_DEBUG_INFO(priv, "Parsing data for %d channels.\n", priv->channel_count);
923
924         priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
925                                      priv->channel_count, GFP_KERNEL);
926         if (!priv->channel_info) {
927                 IWL_ERR(priv, "Could not allocate channel_info\n");
928                 priv->channel_count = 0;
929                 return -ENOMEM;
930         }
931
932         ch_info = priv->channel_info;
933
934         /* Loop through the 5 EEPROM bands adding them in order to the
935          * channel map we maintain (that contains additional information than
936          * what just in the EEPROM) */
937         for (band = 1; band <= 5; band++) {
938
939                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
940                                         &eeprom_ch_info, &eeprom_ch_index);
941
942                 /* Loop through each band adding each of the channels */
943                 for (ch = 0; ch < eeprom_ch_count; ch++) {
944                         ch_info->channel = eeprom_ch_index[ch];
945                         ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
946                             IEEE80211_BAND_5GHZ;
947
948                         /* permanently store EEPROM's channel regulatory flags
949                          *   and max power in channel info database. */
950                         ch_info->eeprom = eeprom_ch_info[ch];
951
952                         /* Copy the run-time flags so they are there even on
953                          * invalid channels */
954                         ch_info->flags = eeprom_ch_info[ch].flags;
955                         /* First write that ht40 is not enabled, and then enable
956                          * one by one */
957                         ch_info->ht40_extension_channel =
958                                         IEEE80211_CHAN_NO_HT40;
959
960                         if (!(is_channel_valid(ch_info))) {
961                                 IWL_DEBUG_INFO(priv, "Ch. %d Flags %x [%sGHz] - "
962                                                "No traffic\n",
963                                                ch_info->channel,
964                                                ch_info->flags,
965                                                is_channel_a_band(ch_info) ?
966                                                "5.2" : "2.4");
967                                 ch_info++;
968                                 continue;
969                         }
970
971                         /* Initialize regulatory-based run-time data */
972                         ch_info->max_power_avg = ch_info->curr_txpow =
973                             eeprom_ch_info[ch].max_power_avg;
974                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
975                         ch_info->min_power = 0;
976
977                         IWL_DEBUG_INFO(priv, "Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x %ddBm):"
978                                        " Ad-Hoc %ssupported\n",
979                                        ch_info->channel,
980                                        is_channel_a_band(ch_info) ?
981                                        "5.2" : "2.4",
982                                        CHECK_AND_PRINT_I(VALID),
983                                        CHECK_AND_PRINT_I(IBSS),
984                                        CHECK_AND_PRINT_I(ACTIVE),
985                                        CHECK_AND_PRINT_I(RADAR),
986                                        CHECK_AND_PRINT_I(WIDE),
987                                        CHECK_AND_PRINT_I(DFS),
988                                        eeprom_ch_info[ch].flags,
989                                        eeprom_ch_info[ch].max_power_avg,
990                                        ((eeprom_ch_info[ch].
991                                          flags & EEPROM_CHANNEL_IBSS)
992                                         && !(eeprom_ch_info[ch].
993                                              flags & EEPROM_CHANNEL_RADAR))
994                                        ? "" : "not ");
995
996                         /* Set the tx_power_user_lmt to the highest power
997                          * supported by any channel */
998                         if (eeprom_ch_info[ch].max_power_avg >
999                                                 priv->tx_power_user_lmt)
1000                                 priv->tx_power_user_lmt =
1001                                     eeprom_ch_info[ch].max_power_avg;
1002
1003                         ch_info++;
1004                 }
1005         }
1006
1007         /* Check if we do have HT40 channels */
1008         if (priv->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
1009             EEPROM_REGULATORY_BAND_NO_HT40 &&
1010             priv->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
1011             EEPROM_REGULATORY_BAND_NO_HT40)
1012                 return 0;
1013
1014         /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
1015         for (band = 6; band <= 7; band++) {
1016                 enum ieee80211_band ieeeband;
1017
1018                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
1019                                         &eeprom_ch_info, &eeprom_ch_index);
1020
1021                 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
1022                 ieeeband =
1023                         (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1024
1025                 /* Loop through each band adding each of the channels */
1026                 for (ch = 0; ch < eeprom_ch_count; ch++) {
1027                         /* Set up driver's info for lower half */
1028                         iwl_mod_ht40_chan_info(priv, ieeeband,
1029                                                 eeprom_ch_index[ch],
1030                                                 &eeprom_ch_info[ch],
1031                                                 IEEE80211_CHAN_NO_HT40PLUS);
1032
1033                         /* Set up driver's info for upper half */
1034                         iwl_mod_ht40_chan_info(priv, ieeeband,
1035                                                 eeprom_ch_index[ch] + 4,
1036                                                 &eeprom_ch_info[ch],
1037                                                 IEEE80211_CHAN_NO_HT40MINUS);
1038                 }
1039         }
1040
1041         /* for newer device (6000 series and up)
1042          * EEPROM contain enhanced tx power information
1043          * driver need to process addition information
1044          * to determine the max channel tx power limits
1045          */
1046         if (priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower)
1047                 priv->cfg->ops->lib->eeprom_ops.update_enhanced_txpower(priv);
1048
1049         return 0;
1050 }
1051 EXPORT_SYMBOL(iwl_init_channel_map);
1052
1053 /*
1054  * iwl_free_channel_map - undo allocations in iwl_init_channel_map
1055  */
1056 void iwl_free_channel_map(struct iwl_priv *priv)
1057 {
1058         kfree(priv->channel_info);
1059         priv->channel_count = 0;
1060 }
1061 EXPORT_SYMBOL(iwl_free_channel_map);
1062
1063 /**
1064  * iwl_get_channel_info - Find driver's private channel info
1065  *
1066  * Based on band and channel number.
1067  */
1068 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
1069                                         enum ieee80211_band band, u16 channel)
1070 {
1071         int i;
1072
1073         switch (band) {
1074         case IEEE80211_BAND_5GHZ:
1075                 for (i = 14; i < priv->channel_count; i++) {
1076                         if (priv->channel_info[i].channel == channel)
1077                                 return &priv->channel_info[i];
1078                 }
1079                 break;
1080         case IEEE80211_BAND_2GHZ:
1081                 if (channel >= 1 && channel <= 14)
1082                         return &priv->channel_info[channel - 1];
1083                 break;
1084         default:
1085                 BUG();
1086         }
1087
1088         return NULL;
1089 }
1090 EXPORT_SYMBOL(iwl_get_channel_info);
1091