iwlwifi: Use RTS/CTS as the preferred protection mechanism for 6000 series
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-agn.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/delay.h>
36 #include <linux/skbuff.h>
37 #include <linux/netdevice.h>
38 #include <linux/wireless.h>
39 #include <linux/firmware.h>
40 #include <linux/etherdevice.h>
41 #include <linux/if_arp.h>
42
43 #include <net/mac80211.h>
44
45 #include <asm/div64.h>
46
47 #define DRV_NAME        "iwlagn"
48
49 #include "iwl-eeprom.h"
50 #include "iwl-dev.h"
51 #include "iwl-core.h"
52 #include "iwl-io.h"
53 #include "iwl-helpers.h"
54 #include "iwl-sta.h"
55 #include "iwl-calib.h"
56
57
58 /******************************************************************************
59  *
60  * module boiler plate
61  *
62  ******************************************************************************/
63
64 /*
65  * module name, copyright, version, etc.
66  */
67 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
68
69 #ifdef CONFIG_IWLWIFI_DEBUG
70 #define VD "d"
71 #else
72 #define VD
73 #endif
74
75 #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
76 #define VS "s"
77 #else
78 #define VS
79 #endif
80
81 #define DRV_VERSION     IWLWIFI_VERSION VD VS
82
83
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
89
90 /*************** STATION TABLE MANAGEMENT ****
91  * mac80211 should be examined to determine if sta_info is duplicating
92  * the functionality provided here
93  */
94
95 /**************************************************************/
96
97 /**
98  * iwl_commit_rxon - commit staging_rxon to hardware
99  *
100  * The RXON command in staging_rxon is committed to the hardware and
101  * the active_rxon structure is updated with the new data.  This
102  * function correctly transitions out of the RXON_ASSOC_MSK state if
103  * a HW tune is required based on the RXON structure changes.
104  */
105 int iwl_commit_rxon(struct iwl_priv *priv)
106 {
107         /* cast away the const for active_rxon in this function */
108         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
109         int ret;
110         bool new_assoc =
111                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
112
113         if (!iwl_is_alive(priv))
114                 return -EBUSY;
115
116         /* always get timestamp with Rx frame */
117         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
118
119         ret = iwl_check_rxon_cmd(priv);
120         if (ret) {
121                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
122                 return -EINVAL;
123         }
124
125         /* If we don't need to send a full RXON, we can use
126          * iwl_rxon_assoc_cmd which is used to reconfigure filter
127          * and other flags for the current radio configuration. */
128         if (!iwl_full_rxon_required(priv)) {
129                 ret = iwl_send_rxon_assoc(priv);
130                 if (ret) {
131                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
132                         return ret;
133                 }
134
135                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
136                 return 0;
137         }
138
139         /* station table will be cleared */
140         priv->assoc_station_added = 0;
141
142         /* If we are currently associated and the new config requires
143          * an RXON_ASSOC and the new config wants the associated mask enabled,
144          * we must clear the associated from the active configuration
145          * before we apply the new config */
146         if (iwl_is_associated(priv) && new_assoc) {
147                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
148                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
149
150                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
151                                       sizeof(struct iwl_rxon_cmd),
152                                       &priv->active_rxon);
153
154                 /* If the mask clearing failed then we set
155                  * active_rxon back to what it was previously */
156                 if (ret) {
157                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
158                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
159                         return ret;
160                 }
161         }
162
163         IWL_DEBUG_INFO(priv, "Sending RXON\n"
164                        "* with%s RXON_FILTER_ASSOC_MSK\n"
165                        "* channel = %d\n"
166                        "* bssid = %pM\n",
167                        (new_assoc ? "" : "out"),
168                        le16_to_cpu(priv->staging_rxon.channel),
169                        priv->staging_rxon.bssid_addr);
170
171         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
172
173         /* Apply the new configuration
174          * RXON unassoc clears the station table in uCode, send it before
175          * we add the bcast station. If assoc bit is set, we will send RXON
176          * after having added the bcast and bssid station.
177          */
178         if (!new_assoc) {
179                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
180                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
181                 if (ret) {
182                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
183                         return ret;
184                 }
185                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
186         }
187
188         iwl_clear_stations_table(priv);
189
190         priv->start_calib = 0;
191
192         /* Add the broadcast address so we can send broadcast frames */
193         if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) ==
194                                                 IWL_INVALID_STATION) {
195                 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
196                 return -EIO;
197         }
198
199         /* If we have set the ASSOC_MSK and we are in BSS mode then
200          * add the IWL_AP_ID to the station rate table */
201         if (new_assoc) {
202                 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
203                         ret = iwl_rxon_add_station(priv,
204                                            priv->active_rxon.bssid_addr, 1);
205                         if (ret == IWL_INVALID_STATION) {
206                                 IWL_ERR(priv,
207                                         "Error adding AP address for TX.\n");
208                                 return -EIO;
209                         }
210                         priv->assoc_station_added = 1;
211                         if (priv->default_wep_key &&
212                             iwl_send_static_wepkey_cmd(priv, 0))
213                                 IWL_ERR(priv,
214                                         "Could not send WEP static key.\n");
215                 }
216
217                 /*
218                  * allow CTS-to-self if possible for new association.
219                  * this is relevant only for 5000 series and up,
220                  * but will not damage 4965
221                  */
222                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
223
224                 /* Apply the new configuration
225                  * RXON assoc doesn't clear the station table in uCode,
226                  */
227                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
228                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
229                 if (ret) {
230                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
231                         return ret;
232                 }
233                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
234         }
235
236         iwl_init_sensitivity(priv);
237
238         /* If we issue a new RXON command which required a tune then we must
239          * send a new TXPOWER command or we won't be able to Tx any frames */
240         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
241         if (ret) {
242                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
243                 return ret;
244         }
245
246         return 0;
247 }
248
249 void iwl_update_chain_flags(struct iwl_priv *priv)
250 {
251
252         if (priv->cfg->ops->hcmd->set_rxon_chain)
253                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
254         iwlcore_commit_rxon(priv);
255 }
256
257 static void iwl_clear_free_frames(struct iwl_priv *priv)
258 {
259         struct list_head *element;
260
261         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
262                        priv->frames_count);
263
264         while (!list_empty(&priv->free_frames)) {
265                 element = priv->free_frames.next;
266                 list_del(element);
267                 kfree(list_entry(element, struct iwl_frame, list));
268                 priv->frames_count--;
269         }
270
271         if (priv->frames_count) {
272                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
273                             priv->frames_count);
274                 priv->frames_count = 0;
275         }
276 }
277
278 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
279 {
280         struct iwl_frame *frame;
281         struct list_head *element;
282         if (list_empty(&priv->free_frames)) {
283                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
284                 if (!frame) {
285                         IWL_ERR(priv, "Could not allocate frame!\n");
286                         return NULL;
287                 }
288
289                 priv->frames_count++;
290                 return frame;
291         }
292
293         element = priv->free_frames.next;
294         list_del(element);
295         return list_entry(element, struct iwl_frame, list);
296 }
297
298 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
299 {
300         memset(frame, 0, sizeof(*frame));
301         list_add(&frame->list, &priv->free_frames);
302 }
303
304 static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
305                                           struct ieee80211_hdr *hdr,
306                                           int left)
307 {
308         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
309             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
310              (priv->iw_mode != NL80211_IFTYPE_AP)))
311                 return 0;
312
313         if (priv->ibss_beacon->len > left)
314                 return 0;
315
316         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
317
318         return priv->ibss_beacon->len;
319 }
320
321 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
322                                        struct iwl_frame *frame, u8 rate)
323 {
324         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
325         unsigned int frame_size;
326
327         tx_beacon_cmd = &frame->u.beacon;
328         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
329
330         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
331         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
332
333         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
334                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
335
336         BUG_ON(frame_size > MAX_MPDU_SIZE);
337         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
338
339         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
340                 tx_beacon_cmd->tx.rate_n_flags =
341                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
342         else
343                 tx_beacon_cmd->tx.rate_n_flags =
344                         iwl_hw_set_rate_n_flags(rate, 0);
345
346         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
347                                      TX_CMD_FLG_TSF_MSK |
348                                      TX_CMD_FLG_STA_RATE_MSK;
349
350         return sizeof(*tx_beacon_cmd) + frame_size;
351 }
352 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
353 {
354         struct iwl_frame *frame;
355         unsigned int frame_size;
356         int rc;
357         u8 rate;
358
359         frame = iwl_get_free_frame(priv);
360
361         if (!frame) {
362                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
363                           "command.\n");
364                 return -ENOMEM;
365         }
366
367         rate = iwl_rate_get_lowest_plcp(priv);
368
369         frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
370
371         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
372                               &frame->u.cmd[0]);
373
374         iwl_free_frame(priv, frame);
375
376         return rc;
377 }
378
379 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
380 {
381         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
382
383         dma_addr_t addr = get_unaligned_le32(&tb->lo);
384         if (sizeof(dma_addr_t) > sizeof(u32))
385                 addr |=
386                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
387
388         return addr;
389 }
390
391 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
392 {
393         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
394
395         return le16_to_cpu(tb->hi_n_len) >> 4;
396 }
397
398 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
399                                   dma_addr_t addr, u16 len)
400 {
401         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
402         u16 hi_n_len = len << 4;
403
404         put_unaligned_le32(addr, &tb->lo);
405         if (sizeof(dma_addr_t) > sizeof(u32))
406                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
407
408         tb->hi_n_len = cpu_to_le16(hi_n_len);
409
410         tfd->num_tbs = idx + 1;
411 }
412
413 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
414 {
415         return tfd->num_tbs & 0x1f;
416 }
417
418 /**
419  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
420  * @priv - driver private data
421  * @txq - tx queue
422  *
423  * Does NOT advance any TFD circular buffer read/write indexes
424  * Does NOT free the TFD itself (which is within circular buffer)
425  */
426 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
427 {
428         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
429         struct iwl_tfd *tfd;
430         struct pci_dev *dev = priv->pci_dev;
431         int index = txq->q.read_ptr;
432         int i;
433         int num_tbs;
434
435         tfd = &tfd_tmp[index];
436
437         /* Sanity check on number of chunks */
438         num_tbs = iwl_tfd_get_num_tbs(tfd);
439
440         if (num_tbs >= IWL_NUM_OF_TBS) {
441                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
442                 /* @todo issue fatal error, it is quite serious situation */
443                 return;
444         }
445
446         /* Unmap tx_cmd */
447         if (num_tbs)
448                 pci_unmap_single(dev,
449                                 pci_unmap_addr(&txq->meta[index], mapping),
450                                 pci_unmap_len(&txq->meta[index], len),
451                                 PCI_DMA_BIDIRECTIONAL);
452
453         /* Unmap chunks, if any. */
454         for (i = 1; i < num_tbs; i++) {
455                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
456                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
457
458                 if (txq->txb) {
459                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
460                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
461                 }
462         }
463 }
464
465 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
466                                  struct iwl_tx_queue *txq,
467                                  dma_addr_t addr, u16 len,
468                                  u8 reset, u8 pad)
469 {
470         struct iwl_queue *q;
471         struct iwl_tfd *tfd, *tfd_tmp;
472         u32 num_tbs;
473
474         q = &txq->q;
475         tfd_tmp = (struct iwl_tfd *)txq->tfds;
476         tfd = &tfd_tmp[q->write_ptr];
477
478         if (reset)
479                 memset(tfd, 0, sizeof(*tfd));
480
481         num_tbs = iwl_tfd_get_num_tbs(tfd);
482
483         /* Each TFD can point to a maximum 20 Tx buffers */
484         if (num_tbs >= IWL_NUM_OF_TBS) {
485                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
486                           IWL_NUM_OF_TBS);
487                 return -EINVAL;
488         }
489
490         BUG_ON(addr & ~DMA_BIT_MASK(36));
491         if (unlikely(addr & ~IWL_TX_DMA_MASK))
492                 IWL_ERR(priv, "Unaligned address = %llx\n",
493                           (unsigned long long)addr);
494
495         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
496
497         return 0;
498 }
499
500 /*
501  * Tell nic where to find circular buffer of Tx Frame Descriptors for
502  * given Tx queue, and enable the DMA channel used for that queue.
503  *
504  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
505  * channels supported in hardware.
506  */
507 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
508                          struct iwl_tx_queue *txq)
509 {
510         int txq_id = txq->q.id;
511
512         /* Circular buffer (TFD queue in DRAM) physical base address */
513         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
514                              txq->q.dma_addr >> 8);
515
516         return 0;
517 }
518
519 /******************************************************************************
520  *
521  * Generic RX handler implementations
522  *
523  ******************************************************************************/
524 static void iwl_rx_reply_alive(struct iwl_priv *priv,
525                                 struct iwl_rx_mem_buffer *rxb)
526 {
527         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
528         struct iwl_alive_resp *palive;
529         struct delayed_work *pwork;
530
531         palive = &pkt->u.alive_frame;
532
533         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
534                        "0x%01X 0x%01X\n",
535                        palive->is_valid, palive->ver_type,
536                        palive->ver_subtype);
537
538         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
539                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
540                 memcpy(&priv->card_alive_init,
541                        &pkt->u.alive_frame,
542                        sizeof(struct iwl_init_alive_resp));
543                 pwork = &priv->init_alive_start;
544         } else {
545                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
546                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
547                        sizeof(struct iwl_alive_resp));
548                 pwork = &priv->alive_start;
549         }
550
551         /* We delay the ALIVE response by 5ms to
552          * give the HW RF Kill time to activate... */
553         if (palive->is_valid == UCODE_VALID_OK)
554                 queue_delayed_work(priv->workqueue, pwork,
555                                    msecs_to_jiffies(5));
556         else
557                 IWL_WARN(priv, "uCode did not respond OK.\n");
558 }
559
560 static void iwl_bg_beacon_update(struct work_struct *work)
561 {
562         struct iwl_priv *priv =
563                 container_of(work, struct iwl_priv, beacon_update);
564         struct sk_buff *beacon;
565
566         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
567         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
568
569         if (!beacon) {
570                 IWL_ERR(priv, "update beacon failed\n");
571                 return;
572         }
573
574         mutex_lock(&priv->mutex);
575         /* new beacon skb is allocated every time; dispose previous.*/
576         if (priv->ibss_beacon)
577                 dev_kfree_skb(priv->ibss_beacon);
578
579         priv->ibss_beacon = beacon;
580         mutex_unlock(&priv->mutex);
581
582         iwl_send_beacon_cmd(priv);
583 }
584
585 /**
586  * iwl_bg_statistics_periodic - Timer callback to queue statistics
587  *
588  * This callback is provided in order to send a statistics request.
589  *
590  * This timer function is continually reset to execute within
591  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
592  * was received.  We need to ensure we receive the statistics in order
593  * to update the temperature used for calibrating the TXPOWER.
594  */
595 static void iwl_bg_statistics_periodic(unsigned long data)
596 {
597         struct iwl_priv *priv = (struct iwl_priv *)data;
598
599         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
600                 return;
601
602         /* dont send host command if rf-kill is on */
603         if (!iwl_is_ready_rf(priv))
604                 return;
605
606         iwl_send_statistics_request(priv, CMD_ASYNC);
607 }
608
609 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
610                                 struct iwl_rx_mem_buffer *rxb)
611 {
612 #ifdef CONFIG_IWLWIFI_DEBUG
613         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
614         struct iwl4965_beacon_notif *beacon =
615                 (struct iwl4965_beacon_notif *)pkt->u.raw;
616         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
617
618         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
619                 "tsf %d %d rate %d\n",
620                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
621                 beacon->beacon_notify_hdr.failure_frame,
622                 le32_to_cpu(beacon->ibss_mgr_status),
623                 le32_to_cpu(beacon->high_tsf),
624                 le32_to_cpu(beacon->low_tsf), rate);
625 #endif
626
627         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
628             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
629                 queue_work(priv->workqueue, &priv->beacon_update);
630 }
631
632 /* Handle notification from uCode that card's power state is changing
633  * due to software, hardware, or critical temperature RFKILL */
634 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
635                                     struct iwl_rx_mem_buffer *rxb)
636 {
637         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
638         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
639         unsigned long status = priv->status;
640
641         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
642                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
643                           (flags & SW_CARD_DISABLED) ? "Kill" : "On");
644
645         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
646                      RF_CARD_DISABLED)) {
647
648                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
649                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
650
651                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
652                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
653
654                 if (!(flags & RXON_CARD_DISABLED)) {
655                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
656                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
657                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
658                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
659                 }
660                 if (flags & RF_CARD_DISABLED)
661                         iwl_tt_enter_ct_kill(priv);
662         }
663         if (!(flags & RF_CARD_DISABLED))
664                 iwl_tt_exit_ct_kill(priv);
665
666         if (flags & HW_CARD_DISABLED)
667                 set_bit(STATUS_RF_KILL_HW, &priv->status);
668         else
669                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
670
671
672         if (!(flags & RXON_CARD_DISABLED))
673                 iwl_scan_cancel(priv);
674
675         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
676              test_bit(STATUS_RF_KILL_HW, &priv->status)))
677                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
678                         test_bit(STATUS_RF_KILL_HW, &priv->status));
679         else
680                 wake_up_interruptible(&priv->wait_command_queue);
681 }
682
683 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
684 {
685         if (src == IWL_PWR_SRC_VAUX) {
686                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
687                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
688                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
689                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
690         } else {
691                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
692                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
693                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
694         }
695
696         return 0;
697 }
698
699 /**
700  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
701  *
702  * Setup the RX handlers for each of the reply types sent from the uCode
703  * to the host.
704  *
705  * This function chains into the hardware specific files for them to setup
706  * any hardware specific handlers as well.
707  */
708 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
709 {
710         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
711         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
712         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
713         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
714         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
715             iwl_rx_pm_debug_statistics_notif;
716         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
717
718         /*
719          * The same handler is used for both the REPLY to a discrete
720          * statistics request from the host as well as for the periodic
721          * statistics notifications (after received beacons) from the uCode.
722          */
723         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics;
724         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
725
726         iwl_setup_spectrum_handlers(priv);
727         iwl_setup_rx_scan_handlers(priv);
728
729         /* status change handler */
730         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
731
732         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
733             iwl_rx_missed_beacon_notif;
734         /* Rx handlers */
735         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
736         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
737         /* block ack */
738         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl_rx_reply_compressed_ba;
739         /* Set up hardware specific Rx handlers */
740         priv->cfg->ops->lib->rx_handler_setup(priv);
741 }
742
743 /**
744  * iwl_rx_handle - Main entry function for receiving responses from uCode
745  *
746  * Uses the priv->rx_handlers callback function array to invoke
747  * the appropriate handlers, including command responses,
748  * frame-received notifications, and other notifications.
749  */
750 void iwl_rx_handle(struct iwl_priv *priv)
751 {
752         struct iwl_rx_mem_buffer *rxb;
753         struct iwl_rx_packet *pkt;
754         struct iwl_rx_queue *rxq = &priv->rxq;
755         u32 r, i;
756         int reclaim;
757         unsigned long flags;
758         u8 fill_rx = 0;
759         u32 count = 8;
760         int total_empty;
761
762         /* uCode's read index (stored in shared DRAM) indicates the last Rx
763          * buffer that the driver may process (last buffer filled by ucode). */
764         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
765         i = rxq->read;
766
767         /* Rx interrupt, but nothing sent from uCode */
768         if (i == r)
769                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
770
771         /* calculate total frames need to be restock after handling RX */
772         total_empty = r - priv->rxq.write_actual;
773         if (total_empty < 0)
774                 total_empty += RX_QUEUE_SIZE;
775
776         if (total_empty > (RX_QUEUE_SIZE / 2))
777                 fill_rx = 1;
778
779         while (i != r) {
780                 rxb = rxq->queue[i];
781
782                 /* If an RXB doesn't have a Rx queue slot associated with it,
783                  * then a bug has been introduced in the queue refilling
784                  * routines -- catch it here */
785                 BUG_ON(rxb == NULL);
786
787                 rxq->queue[i] = NULL;
788
789                 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
790                                  priv->hw_params.rx_buf_size + 256,
791                                  PCI_DMA_FROMDEVICE);
792                 pkt = (struct iwl_rx_packet *)rxb->skb->data;
793
794                 /* Reclaim a command buffer only if this packet is a response
795                  *   to a (driver-originated) command.
796                  * If the packet (e.g. Rx frame) originated from uCode,
797                  *   there is no command buffer to reclaim.
798                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
799                  *   but apparently a few don't get set; catch them here. */
800                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
801                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
802                         (pkt->hdr.cmd != REPLY_RX) &&
803                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
804                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
805                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
806                         (pkt->hdr.cmd != REPLY_TX);
807
808                 /* Based on type of command response or notification,
809                  *   handle those that need handling via function in
810                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
811                 if (priv->rx_handlers[pkt->hdr.cmd]) {
812                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
813                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
814                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
815                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
816                 } else {
817                         /* No handling needed */
818                         IWL_DEBUG_RX(priv,
819                                 "r %d i %d No handler needed for %s, 0x%02x\n",
820                                 r, i, get_cmd_string(pkt->hdr.cmd),
821                                 pkt->hdr.cmd);
822                 }
823
824                 if (reclaim) {
825                         /* Invoke any callbacks, transfer the skb to caller, and
826                          * fire off the (possibly) blocking iwl_send_cmd()
827                          * as we reclaim the driver command queue */
828                         if (rxb && rxb->skb)
829                                 iwl_tx_cmd_complete(priv, rxb);
830                         else
831                                 IWL_WARN(priv, "Claim null rxb?\n");
832                 }
833
834                 /* For now we just don't re-use anything.  We can tweak this
835                  * later to try and re-use notification packets and SKBs that
836                  * fail to Rx correctly */
837                 if (rxb->skb != NULL) {
838                         priv->alloc_rxb_skb--;
839                         dev_kfree_skb_any(rxb->skb);
840                         rxb->skb = NULL;
841                 }
842
843                 spin_lock_irqsave(&rxq->lock, flags);
844                 list_add_tail(&rxb->list, &priv->rxq.rx_used);
845                 spin_unlock_irqrestore(&rxq->lock, flags);
846                 i = (i + 1) & RX_QUEUE_MASK;
847                 /* If there are a lot of unused frames,
848                  * restock the Rx queue so ucode wont assert. */
849                 if (fill_rx) {
850                         count++;
851                         if (count >= 8) {
852                                 priv->rxq.read = i;
853                                 iwl_rx_replenish_now(priv);
854                                 count = 0;
855                         }
856                 }
857         }
858
859         /* Backtrack one entry */
860         priv->rxq.read = i;
861         if (fill_rx)
862                 iwl_rx_replenish_now(priv);
863         else
864                 iwl_rx_queue_restock(priv);
865 }
866
867 /* call this function to flush any scheduled tasklet */
868 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
869 {
870         /* wait to make sure we flush pending tasklet*/
871         synchronize_irq(priv->pci_dev->irq);
872         tasklet_kill(&priv->irq_tasklet);
873 }
874
875 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
876 {
877         u32 inta, handled = 0;
878         u32 inta_fh;
879         unsigned long flags;
880 #ifdef CONFIG_IWLWIFI_DEBUG
881         u32 inta_mask;
882 #endif
883
884         spin_lock_irqsave(&priv->lock, flags);
885
886         /* Ack/clear/reset pending uCode interrupts.
887          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
888          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
889         inta = iwl_read32(priv, CSR_INT);
890         iwl_write32(priv, CSR_INT, inta);
891
892         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
893          * Any new interrupts that happen after this, either while we're
894          * in this tasklet, or later, will show up in next ISR/tasklet. */
895         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
896         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
897
898 #ifdef CONFIG_IWLWIFI_DEBUG
899         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
900                 /* just for debug */
901                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
902                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
903                               inta, inta_mask, inta_fh);
904         }
905 #endif
906
907         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
908          * atomic, make sure that inta covers all the interrupts that
909          * we've discovered, even if FH interrupt came in just after
910          * reading CSR_INT. */
911         if (inta_fh & CSR49_FH_INT_RX_MASK)
912                 inta |= CSR_INT_BIT_FH_RX;
913         if (inta_fh & CSR49_FH_INT_TX_MASK)
914                 inta |= CSR_INT_BIT_FH_TX;
915
916         /* Now service all interrupt bits discovered above. */
917         if (inta & CSR_INT_BIT_HW_ERR) {
918                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
919
920                 /* Tell the device to stop sending interrupts */
921                 iwl_disable_interrupts(priv);
922
923                 priv->isr_stats.hw++;
924                 iwl_irq_handle_error(priv);
925
926                 handled |= CSR_INT_BIT_HW_ERR;
927
928                 spin_unlock_irqrestore(&priv->lock, flags);
929
930                 return;
931         }
932
933 #ifdef CONFIG_IWLWIFI_DEBUG
934         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
935                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
936                 if (inta & CSR_INT_BIT_SCD) {
937                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
938                                       "the frame/frames.\n");
939                         priv->isr_stats.sch++;
940                 }
941
942                 /* Alive notification via Rx interrupt will do the real work */
943                 if (inta & CSR_INT_BIT_ALIVE) {
944                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
945                         priv->isr_stats.alive++;
946                 }
947         }
948 #endif
949         /* Safely ignore these bits for debug checks below */
950         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
951
952         /* HW RF KILL switch toggled */
953         if (inta & CSR_INT_BIT_RF_KILL) {
954                 int hw_rf_kill = 0;
955                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
956                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
957                         hw_rf_kill = 1;
958
959                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
960                                 hw_rf_kill ? "disable radio" : "enable radio");
961
962                 priv->isr_stats.rfkill++;
963
964                 /* driver only loads ucode once setting the interface up.
965                  * the driver allows loading the ucode even if the radio
966                  * is killed. Hence update the killswitch state here. The
967                  * rfkill handler will care about restarting if needed.
968                  */
969                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
970                         if (hw_rf_kill)
971                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
972                         else
973                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
974                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
975                 }
976
977                 handled |= CSR_INT_BIT_RF_KILL;
978         }
979
980         /* Chip got too hot and stopped itself */
981         if (inta & CSR_INT_BIT_CT_KILL) {
982                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
983                 priv->isr_stats.ctkill++;
984                 handled |= CSR_INT_BIT_CT_KILL;
985         }
986
987         /* Error detected by uCode */
988         if (inta & CSR_INT_BIT_SW_ERR) {
989                 IWL_ERR(priv, "Microcode SW error detected. "
990                         " Restarting 0x%X.\n", inta);
991                 priv->isr_stats.sw++;
992                 priv->isr_stats.sw_err = inta;
993                 iwl_irq_handle_error(priv);
994                 handled |= CSR_INT_BIT_SW_ERR;
995         }
996
997         /* uCode wakes up after power-down sleep */
998         if (inta & CSR_INT_BIT_WAKEUP) {
999                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1000                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1001                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1002                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1003                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1004                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1005                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1006                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1007
1008                 priv->isr_stats.wakeup++;
1009
1010                 handled |= CSR_INT_BIT_WAKEUP;
1011         }
1012
1013         /* All uCode command responses, including Tx command responses,
1014          * Rx "responses" (frame-received notification), and other
1015          * notifications from uCode come through here*/
1016         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1017                 iwl_rx_handle(priv);
1018                 priv->isr_stats.rx++;
1019                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1020         }
1021
1022         if (inta & CSR_INT_BIT_FH_TX) {
1023                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1024                 priv->isr_stats.tx++;
1025                 handled |= CSR_INT_BIT_FH_TX;
1026                 /* FH finished to write, send event */
1027                 priv->ucode_write_complete = 1;
1028                 wake_up_interruptible(&priv->wait_command_queue);
1029         }
1030
1031         if (inta & ~handled) {
1032                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1033                 priv->isr_stats.unhandled++;
1034         }
1035
1036         if (inta & ~(priv->inta_mask)) {
1037                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1038                          inta & ~priv->inta_mask);
1039                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1040         }
1041
1042         /* Re-enable all interrupts */
1043         /* only Re-enable if diabled by irq */
1044         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1045                 iwl_enable_interrupts(priv);
1046
1047 #ifdef CONFIG_IWLWIFI_DEBUG
1048         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1049                 inta = iwl_read32(priv, CSR_INT);
1050                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1051                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1052                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1053                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1054         }
1055 #endif
1056         spin_unlock_irqrestore(&priv->lock, flags);
1057 }
1058
1059 /* tasklet for iwlagn interrupt */
1060 static void iwl_irq_tasklet(struct iwl_priv *priv)
1061 {
1062         u32 inta = 0;
1063         u32 handled = 0;
1064         unsigned long flags;
1065 #ifdef CONFIG_IWLWIFI_DEBUG
1066         u32 inta_mask;
1067 #endif
1068
1069         spin_lock_irqsave(&priv->lock, flags);
1070
1071         /* Ack/clear/reset pending uCode interrupts.
1072          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1073          */
1074         iwl_write32(priv, CSR_INT, priv->inta);
1075
1076         inta = priv->inta;
1077
1078 #ifdef CONFIG_IWLWIFI_DEBUG
1079         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1080                 /* just for debug */
1081                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1082                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1083                                 inta, inta_mask);
1084         }
1085 #endif
1086         /* saved interrupt in inta variable now we can reset priv->inta */
1087         priv->inta = 0;
1088
1089         /* Now service all interrupt bits discovered above. */
1090         if (inta & CSR_INT_BIT_HW_ERR) {
1091                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1092
1093                 /* Tell the device to stop sending interrupts */
1094                 iwl_disable_interrupts(priv);
1095
1096                 priv->isr_stats.hw++;
1097                 iwl_irq_handle_error(priv);
1098
1099                 handled |= CSR_INT_BIT_HW_ERR;
1100
1101                 spin_unlock_irqrestore(&priv->lock, flags);
1102
1103                 return;
1104         }
1105
1106 #ifdef CONFIG_IWLWIFI_DEBUG
1107         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1108                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1109                 if (inta & CSR_INT_BIT_SCD) {
1110                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1111                                       "the frame/frames.\n");
1112                         priv->isr_stats.sch++;
1113                 }
1114
1115                 /* Alive notification via Rx interrupt will do the real work */
1116                 if (inta & CSR_INT_BIT_ALIVE) {
1117                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1118                         priv->isr_stats.alive++;
1119                 }
1120         }
1121 #endif
1122         /* Safely ignore these bits for debug checks below */
1123         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1124
1125         /* HW RF KILL switch toggled */
1126         if (inta & CSR_INT_BIT_RF_KILL) {
1127                 int hw_rf_kill = 0;
1128                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1129                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1130                         hw_rf_kill = 1;
1131
1132                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1133                                 hw_rf_kill ? "disable radio" : "enable radio");
1134
1135                 priv->isr_stats.rfkill++;
1136
1137                 /* driver only loads ucode once setting the interface up.
1138                  * the driver allows loading the ucode even if the radio
1139                  * is killed. Hence update the killswitch state here. The
1140                  * rfkill handler will care about restarting if needed.
1141                  */
1142                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1143                         if (hw_rf_kill)
1144                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1145                         else
1146                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1147                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1148                 }
1149
1150                 handled |= CSR_INT_BIT_RF_KILL;
1151         }
1152
1153         /* Chip got too hot and stopped itself */
1154         if (inta & CSR_INT_BIT_CT_KILL) {
1155                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1156                 priv->isr_stats.ctkill++;
1157                 handled |= CSR_INT_BIT_CT_KILL;
1158         }
1159
1160         /* Error detected by uCode */
1161         if (inta & CSR_INT_BIT_SW_ERR) {
1162                 IWL_ERR(priv, "Microcode SW error detected. "
1163                         " Restarting 0x%X.\n", inta);
1164                 priv->isr_stats.sw++;
1165                 priv->isr_stats.sw_err = inta;
1166                 iwl_irq_handle_error(priv);
1167                 handled |= CSR_INT_BIT_SW_ERR;
1168         }
1169
1170         /* uCode wakes up after power-down sleep */
1171         if (inta & CSR_INT_BIT_WAKEUP) {
1172                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1173                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1174                 iwl_txq_update_write_ptr(priv, &priv->txq[0]);
1175                 iwl_txq_update_write_ptr(priv, &priv->txq[1]);
1176                 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1177                 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1178                 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1179                 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1180
1181                 priv->isr_stats.wakeup++;
1182
1183                 handled |= CSR_INT_BIT_WAKEUP;
1184         }
1185
1186         /* All uCode command responses, including Tx command responses,
1187          * Rx "responses" (frame-received notification), and other
1188          * notifications from uCode come through here*/
1189         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1190                         CSR_INT_BIT_RX_PERIODIC)) {
1191                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1192                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1193                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1194                         iwl_write32(priv, CSR_FH_INT_STATUS,
1195                                         CSR49_FH_INT_RX_MASK);
1196                 }
1197                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1198                         handled |= CSR_INT_BIT_RX_PERIODIC;
1199                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1200                 }
1201                 /* Sending RX interrupt require many steps to be done in the
1202                  * the device:
1203                  * 1- write interrupt to current index in ICT table.
1204                  * 2- dma RX frame.
1205                  * 3- update RX shared data to indicate last write index.
1206                  * 4- send interrupt.
1207                  * This could lead to RX race, driver could receive RX interrupt
1208                  * but the shared data changes does not reflect this.
1209                  * this could lead to RX race, RX periodic will solve this race
1210                  */
1211                 iwl_write32(priv, CSR_INT_PERIODIC_REG,
1212                             CSR_INT_PERIODIC_DIS);
1213                 iwl_rx_handle(priv);
1214                 /* Only set RX periodic if real RX is received. */
1215                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1216                         iwl_write32(priv, CSR_INT_PERIODIC_REG,
1217                                     CSR_INT_PERIODIC_ENA);
1218
1219                 priv->isr_stats.rx++;
1220         }
1221
1222         if (inta & CSR_INT_BIT_FH_TX) {
1223                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1224                 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1225                 priv->isr_stats.tx++;
1226                 handled |= CSR_INT_BIT_FH_TX;
1227                 /* FH finished to write, send event */
1228                 priv->ucode_write_complete = 1;
1229                 wake_up_interruptible(&priv->wait_command_queue);
1230         }
1231
1232         if (inta & ~handled) {
1233                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1234                 priv->isr_stats.unhandled++;
1235         }
1236
1237         if (inta & ~(priv->inta_mask)) {
1238                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1239                          inta & ~priv->inta_mask);
1240         }
1241
1242
1243         /* Re-enable all interrupts */
1244         /* only Re-enable if diabled by irq */
1245         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1246                 iwl_enable_interrupts(priv);
1247
1248         spin_unlock_irqrestore(&priv->lock, flags);
1249
1250 }
1251
1252
1253 /******************************************************************************
1254  *
1255  * uCode download functions
1256  *
1257  ******************************************************************************/
1258
1259 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1260 {
1261         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1262         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1263         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1264         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1265         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1266         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1267 }
1268
1269 static void iwl_nic_start(struct iwl_priv *priv)
1270 {
1271         /* Remove all resets to allow NIC to operate */
1272         iwl_write32(priv, CSR_RESET, 0);
1273 }
1274
1275
1276 /**
1277  * iwl_read_ucode - Read uCode images from disk file.
1278  *
1279  * Copy into buffers for card to fetch via bus-mastering
1280  */
1281 static int iwl_read_ucode(struct iwl_priv *priv)
1282 {
1283         struct iwl_ucode_header *ucode;
1284         int ret = -EINVAL, index;
1285         const struct firmware *ucode_raw;
1286         const char *name_pre = priv->cfg->fw_name_pre;
1287         const unsigned int api_max = priv->cfg->ucode_api_max;
1288         const unsigned int api_min = priv->cfg->ucode_api_min;
1289         char buf[25];
1290         u8 *src;
1291         size_t len;
1292         u32 api_ver, build;
1293         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1294         u16 eeprom_ver;
1295
1296         /* Ask kernel firmware_class module to get the boot firmware off disk.
1297          * request_firmware() is synchronous, file is in memory on return. */
1298         for (index = api_max; index >= api_min; index--) {
1299                 sprintf(buf, "%s%d%s", name_pre, index, ".ucode");
1300                 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1301                 if (ret < 0) {
1302                         IWL_ERR(priv, "%s firmware file req failed: %d\n",
1303                                   buf, ret);
1304                         if (ret == -ENOENT)
1305                                 continue;
1306                         else
1307                                 goto error;
1308                 } else {
1309                         if (index < api_max)
1310                                 IWL_ERR(priv, "Loaded firmware %s, "
1311                                         "which is deprecated. "
1312                                         "Please use API v%u instead.\n",
1313                                           buf, api_max);
1314
1315                         IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1316                                        buf, ucode_raw->size);
1317                         break;
1318                 }
1319         }
1320
1321         if (ret < 0)
1322                 goto error;
1323
1324         /* Make sure that we got at least the v1 header! */
1325         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1326                 IWL_ERR(priv, "File size way too small!\n");
1327                 ret = -EINVAL;
1328                 goto err_release;
1329         }
1330
1331         /* Data from ucode file:  header followed by uCode images */
1332         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1333
1334         priv->ucode_ver = le32_to_cpu(ucode->ver);
1335         api_ver = IWL_UCODE_API(priv->ucode_ver);
1336         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1337         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1338         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1339         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1340         init_data_size =
1341                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1342         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1343         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1344
1345         /* api_ver should match the api version forming part of the
1346          * firmware filename ... but we don't check for that and only rely
1347          * on the API version read from firmware header from here on forward */
1348
1349         if (api_ver < api_min || api_ver > api_max) {
1350                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1351                           "Driver supports v%u, firmware is v%u.\n",
1352                           api_max, api_ver);
1353                 priv->ucode_ver = 0;
1354                 ret = -EINVAL;
1355                 goto err_release;
1356         }
1357         if (api_ver != api_max)
1358                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1359                           "got v%u. New firmware can be obtained "
1360                           "from http://www.intellinuxwireless.org.\n",
1361                           api_max, api_ver);
1362
1363         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1364                IWL_UCODE_MAJOR(priv->ucode_ver),
1365                IWL_UCODE_MINOR(priv->ucode_ver),
1366                IWL_UCODE_API(priv->ucode_ver),
1367                IWL_UCODE_SERIAL(priv->ucode_ver));
1368
1369         if (build)
1370                 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1371
1372         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1373         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1374                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1375                        ? "OTP" : "EEPROM", eeprom_ver);
1376
1377         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1378                        priv->ucode_ver);
1379         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1380                        inst_size);
1381         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1382                        data_size);
1383         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1384                        init_size);
1385         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1386                        init_data_size);
1387         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1388                        boot_size);
1389
1390         /* Verify size of file vs. image size info in file's header */
1391         if (ucode_raw->size !=
1392                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1393                 inst_size + data_size + init_size +
1394                 init_data_size + boot_size) {
1395
1396                 IWL_DEBUG_INFO(priv,
1397                         "uCode file size %d does not match expected size\n",
1398                         (int)ucode_raw->size);
1399                 ret = -EINVAL;
1400                 goto err_release;
1401         }
1402
1403         /* Verify that uCode images will fit in card's SRAM */
1404         if (inst_size > priv->hw_params.max_inst_size) {
1405                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1406                                inst_size);
1407                 ret = -EINVAL;
1408                 goto err_release;
1409         }
1410
1411         if (data_size > priv->hw_params.max_data_size) {
1412                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1413                                 data_size);
1414                 ret = -EINVAL;
1415                 goto err_release;
1416         }
1417         if (init_size > priv->hw_params.max_inst_size) {
1418                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1419                         init_size);
1420                 ret = -EINVAL;
1421                 goto err_release;
1422         }
1423         if (init_data_size > priv->hw_params.max_data_size) {
1424                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1425                       init_data_size);
1426                 ret = -EINVAL;
1427                 goto err_release;
1428         }
1429         if (boot_size > priv->hw_params.max_bsm_size) {
1430                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1431                         boot_size);
1432                 ret = -EINVAL;
1433                 goto err_release;
1434         }
1435
1436         /* Allocate ucode buffers for card's bus-master loading ... */
1437
1438         /* Runtime instructions and 2 copies of data:
1439          * 1) unmodified from disk
1440          * 2) backup cache for save/restore during power-downs */
1441         priv->ucode_code.len = inst_size;
1442         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1443
1444         priv->ucode_data.len = data_size;
1445         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1446
1447         priv->ucode_data_backup.len = data_size;
1448         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1449
1450         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1451             !priv->ucode_data_backup.v_addr)
1452                 goto err_pci_alloc;
1453
1454         /* Initialization instructions and data */
1455         if (init_size && init_data_size) {
1456                 priv->ucode_init.len = init_size;
1457                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1458
1459                 priv->ucode_init_data.len = init_data_size;
1460                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1461
1462                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1463                         goto err_pci_alloc;
1464         }
1465
1466         /* Bootstrap (instructions only, no data) */
1467         if (boot_size) {
1468                 priv->ucode_boot.len = boot_size;
1469                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1470
1471                 if (!priv->ucode_boot.v_addr)
1472                         goto err_pci_alloc;
1473         }
1474
1475         /* Copy images into buffers for card's bus-master reads ... */
1476
1477         /* Runtime instructions (first block of data in file) */
1478         len = inst_size;
1479         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1480         memcpy(priv->ucode_code.v_addr, src, len);
1481         src += len;
1482
1483         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1484                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1485
1486         /* Runtime data (2nd block)
1487          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1488         len = data_size;
1489         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1490         memcpy(priv->ucode_data.v_addr, src, len);
1491         memcpy(priv->ucode_data_backup.v_addr, src, len);
1492         src += len;
1493
1494         /* Initialization instructions (3rd block) */
1495         if (init_size) {
1496                 len = init_size;
1497                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1498                                 len);
1499                 memcpy(priv->ucode_init.v_addr, src, len);
1500                 src += len;
1501         }
1502
1503         /* Initialization data (4th block) */
1504         if (init_data_size) {
1505                 len = init_data_size;
1506                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1507                                len);
1508                 memcpy(priv->ucode_init_data.v_addr, src, len);
1509                 src += len;
1510         }
1511
1512         /* Bootstrap instructions (5th block) */
1513         len = boot_size;
1514         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1515         memcpy(priv->ucode_boot.v_addr, src, len);
1516
1517         /* We have our copies now, allow OS release its copies */
1518         release_firmware(ucode_raw);
1519         return 0;
1520
1521  err_pci_alloc:
1522         IWL_ERR(priv, "failed to allocate pci memory\n");
1523         ret = -ENOMEM;
1524         iwl_dealloc_ucode_pci(priv);
1525
1526  err_release:
1527         release_firmware(ucode_raw);
1528
1529  error:
1530         return ret;
1531 }
1532
1533 #ifdef CONFIG_IWLWIFI_DEBUG
1534 static const char *desc_lookup_text[] = {
1535         "OK",
1536         "FAIL",
1537         "BAD_PARAM",
1538         "BAD_CHECKSUM",
1539         "NMI_INTERRUPT_WDG",
1540         "SYSASSERT",
1541         "FATAL_ERROR",
1542         "BAD_COMMAND",
1543         "HW_ERROR_TUNE_LOCK",
1544         "HW_ERROR_TEMPERATURE",
1545         "ILLEGAL_CHAN_FREQ",
1546         "VCC_NOT_STABLE",
1547         "FH_ERROR",
1548         "NMI_INTERRUPT_HOST",
1549         "NMI_INTERRUPT_ACTION_PT",
1550         "NMI_INTERRUPT_UNKNOWN",
1551         "UCODE_VERSION_MISMATCH",
1552         "HW_ERROR_ABS_LOCK",
1553         "HW_ERROR_CAL_LOCK_FAIL",
1554         "NMI_INTERRUPT_INST_ACTION_PT",
1555         "NMI_INTERRUPT_DATA_ACTION_PT",
1556         "NMI_TRM_HW_ER",
1557         "NMI_INTERRUPT_TRM",
1558         "NMI_INTERRUPT_BREAK_POINT"
1559         "DEBUG_0",
1560         "DEBUG_1",
1561         "DEBUG_2",
1562         "DEBUG_3",
1563         "UNKNOWN"
1564 };
1565
1566 static const char *desc_lookup(int i)
1567 {
1568         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1569
1570         if (i < 0 || i > max)
1571                 i = max;
1572
1573         return desc_lookup_text[i];
1574 }
1575
1576 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1577 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1578
1579 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1580 {
1581         u32 data2, line;
1582         u32 desc, time, count, base, data1;
1583         u32 blink1, blink2, ilink1, ilink2;
1584
1585         if (priv->ucode_type == UCODE_INIT)
1586                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1587         else
1588                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1589
1590         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1591                 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1592                 return;
1593         }
1594
1595         count = iwl_read_targ_mem(priv, base);
1596
1597         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1598                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1599                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1600                         priv->status, count);
1601         }
1602
1603         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1604         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1605         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1606         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1607         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1608         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1609         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1610         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1611         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1612
1613         IWL_ERR(priv, "Desc                               Time       "
1614                 "data1      data2      line\n");
1615         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1616                 desc_lookup(desc), desc, time, data1, data2, line);
1617         IWL_ERR(priv, "blink1  blink2  ilink1  ilink2\n");
1618         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1619                 ilink1, ilink2);
1620
1621 }
1622
1623 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1624
1625 /**
1626  * iwl_print_event_log - Dump error event log to syslog
1627  *
1628  */
1629 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1630                                 u32 num_events, u32 mode)
1631 {
1632         u32 i;
1633         u32 base;       /* SRAM byte address of event log header */
1634         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1635         u32 ptr;        /* SRAM byte address of log data */
1636         u32 ev, time, data; /* event log data */
1637
1638         if (num_events == 0)
1639                 return;
1640         if (priv->ucode_type == UCODE_INIT)
1641                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1642         else
1643                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1644
1645         if (mode == 0)
1646                 event_size = 2 * sizeof(u32);
1647         else
1648                 event_size = 3 * sizeof(u32);
1649
1650         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1651
1652         /* "time" is actually "data" for mode 0 (no timestamp).
1653         * place event id # at far right for easier visual parsing. */
1654         for (i = 0; i < num_events; i++) {
1655                 ev = iwl_read_targ_mem(priv, ptr);
1656                 ptr += sizeof(u32);
1657                 time = iwl_read_targ_mem(priv, ptr);
1658                 ptr += sizeof(u32);
1659                 if (mode == 0) {
1660                         /* data, ev */
1661                         IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1662                 } else {
1663                         data = iwl_read_targ_mem(priv, ptr);
1664                         ptr += sizeof(u32);
1665                         IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1666                                         time, data, ev);
1667                 }
1668         }
1669 }
1670
1671 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1672 {
1673         u32 base;       /* SRAM byte address of event log header */
1674         u32 capacity;   /* event log capacity in # entries */
1675         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
1676         u32 num_wraps;  /* # times uCode wrapped to top of log */
1677         u32 next_entry; /* index of next entry to be written by uCode */
1678         u32 size;       /* # entries that we'll print */
1679
1680         if (priv->ucode_type == UCODE_INIT)
1681                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1682         else
1683                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1684
1685         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1686                 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1687                 return;
1688         }
1689
1690         /* event log header */
1691         capacity = iwl_read_targ_mem(priv, base);
1692         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1693         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1694         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1695
1696         size = num_wraps ? capacity : next_entry;
1697
1698         /* bail out if nothing in log */
1699         if (size == 0) {
1700                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1701                 return;
1702         }
1703
1704         IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1705                         size, num_wraps);
1706
1707         /* if uCode has wrapped back to top of log, start at the oldest entry,
1708          * i.e the next one that uCode would fill. */
1709         if (num_wraps)
1710                 iwl_print_event_log(priv, next_entry,
1711                                         capacity - next_entry, mode);
1712         /* (then/else) start at top of log */
1713         iwl_print_event_log(priv, 0, next_entry, mode);
1714
1715 }
1716 #endif
1717
1718 /**
1719  * iwl_alive_start - called after REPLY_ALIVE notification received
1720  *                   from protocol/runtime uCode (initialization uCode's
1721  *                   Alive gets handled by iwl_init_alive_start()).
1722  */
1723 static void iwl_alive_start(struct iwl_priv *priv)
1724 {
1725         int ret = 0;
1726
1727         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
1728
1729         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
1730                 /* We had an error bringing up the hardware, so take it
1731                  * all the way back down so we can try again */
1732                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
1733                 goto restart;
1734         }
1735
1736         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
1737          * This is a paranoid check, because we would not have gotten the
1738          * "runtime" alive if code weren't properly loaded.  */
1739         if (iwl_verify_ucode(priv)) {
1740                 /* Runtime instruction load was bad;
1741                  * take it all the way back down so we can try again */
1742                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
1743                 goto restart;
1744         }
1745
1746         iwl_clear_stations_table(priv);
1747         ret = priv->cfg->ops->lib->alive_notify(priv);
1748         if (ret) {
1749                 IWL_WARN(priv,
1750                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
1751                 goto restart;
1752         }
1753
1754         /* After the ALIVE response, we can send host commands to the uCode */
1755         set_bit(STATUS_ALIVE, &priv->status);
1756
1757         if (iwl_is_rfkill(priv))
1758                 return;
1759
1760         ieee80211_wake_queues(priv->hw);
1761
1762         priv->active_rate = priv->rates_mask;
1763         priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1764
1765         if (iwl_is_associated(priv)) {
1766                 struct iwl_rxon_cmd *active_rxon =
1767                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
1768                 /* apply any changes in staging */
1769                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
1770                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1771         } else {
1772                 /* Initialize our rx_config data */
1773                 iwl_connection_init_rx_config(priv, priv->iw_mode);
1774
1775                 if (priv->cfg->ops->hcmd->set_rxon_chain)
1776                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
1777
1778                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1779         }
1780
1781         /* Configure Bluetooth device coexistence support */
1782         iwl_send_bt_config(priv);
1783
1784         iwl_reset_run_time_calib(priv);
1785
1786         /* Configure the adapter for unassociated operation */
1787         iwlcore_commit_rxon(priv);
1788
1789         /* At this point, the NIC is initialized and operational */
1790         iwl_rf_kill_ct_config(priv);
1791
1792         iwl_leds_register(priv);
1793
1794         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1795         set_bit(STATUS_READY, &priv->status);
1796         wake_up_interruptible(&priv->wait_command_queue);
1797
1798         iwl_power_update_mode(priv, true);
1799
1800         /* reassociate for ADHOC mode */
1801         if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
1802                 struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
1803                                                                 priv->vif);
1804                 if (beacon)
1805                         iwl_mac_beacon_update(priv->hw, beacon);
1806         }
1807
1808
1809         if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
1810                 iwl_set_mode(priv, priv->iw_mode);
1811
1812         return;
1813
1814  restart:
1815         queue_work(priv->workqueue, &priv->restart);
1816 }
1817
1818 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
1819
1820 static void __iwl_down(struct iwl_priv *priv)
1821 {
1822         unsigned long flags;
1823         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
1824
1825         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
1826
1827         if (!exit_pending)
1828                 set_bit(STATUS_EXIT_PENDING, &priv->status);
1829
1830         iwl_leds_unregister(priv);
1831
1832         iwl_clear_stations_table(priv);
1833
1834         /* Unblock any waiting calls */
1835         wake_up_interruptible_all(&priv->wait_command_queue);
1836
1837         /* Wipe out the EXIT_PENDING status bit if we are not actually
1838          * exiting the module */
1839         if (!exit_pending)
1840                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
1841
1842         /* stop and reset the on-board processor */
1843         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
1844
1845         /* tell the device to stop sending interrupts */
1846         spin_lock_irqsave(&priv->lock, flags);
1847         iwl_disable_interrupts(priv);
1848         spin_unlock_irqrestore(&priv->lock, flags);
1849         iwl_synchronize_irq(priv);
1850
1851         if (priv->mac80211_registered)
1852                 ieee80211_stop_queues(priv->hw);
1853
1854         /* If we have not previously called iwl_init() then
1855          * clear all bits but the RF Kill bit and return */
1856         if (!iwl_is_init(priv)) {
1857                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1858                                         STATUS_RF_KILL_HW |
1859                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1860                                         STATUS_GEO_CONFIGURED |
1861                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1862                                         STATUS_EXIT_PENDING;
1863                 goto exit;
1864         }
1865
1866         /* ...otherwise clear out all the status bits but the RF Kill
1867          * bit and continue taking the NIC down. */
1868         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
1869                                 STATUS_RF_KILL_HW |
1870                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
1871                                 STATUS_GEO_CONFIGURED |
1872                         test_bit(STATUS_FW_ERROR, &priv->status) <<
1873                                 STATUS_FW_ERROR |
1874                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
1875                                 STATUS_EXIT_PENDING;
1876
1877         /* device going down, Stop using ICT table */
1878         iwl_disable_ict(priv);
1879         spin_lock_irqsave(&priv->lock, flags);
1880         iwl_clear_bit(priv, CSR_GP_CNTRL,
1881                          CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1882         spin_unlock_irqrestore(&priv->lock, flags);
1883
1884         iwl_txq_ctx_stop(priv);
1885         iwl_rxq_stop(priv);
1886
1887         iwl_write_prph(priv, APMG_CLK_DIS_REG,
1888                                 APMG_CLK_VAL_DMA_CLK_RQT);
1889
1890         udelay(5);
1891
1892         /* FIXME: apm_ops.suspend(priv) */
1893         if (exit_pending)
1894                 priv->cfg->ops->lib->apm_ops.stop(priv);
1895         else
1896                 priv->cfg->ops->lib->apm_ops.reset(priv);
1897  exit:
1898         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1899
1900         if (priv->ibss_beacon)
1901                 dev_kfree_skb(priv->ibss_beacon);
1902         priv->ibss_beacon = NULL;
1903
1904         /* clear out any free frames */
1905         iwl_clear_free_frames(priv);
1906 }
1907
1908 static void iwl_down(struct iwl_priv *priv)
1909 {
1910         mutex_lock(&priv->mutex);
1911         __iwl_down(priv);
1912         mutex_unlock(&priv->mutex);
1913
1914         iwl_cancel_deferred_work(priv);
1915 }
1916
1917 #define HW_READY_TIMEOUT (50)
1918
1919 static int iwl_set_hw_ready(struct iwl_priv *priv)
1920 {
1921         int ret = 0;
1922
1923         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1924                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
1925
1926         /* See if we got it */
1927         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1928                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1929                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
1930                                 HW_READY_TIMEOUT);
1931         if (ret != -ETIMEDOUT)
1932                 priv->hw_ready = true;
1933         else
1934                 priv->hw_ready = false;
1935
1936         IWL_DEBUG_INFO(priv, "hardware %s\n",
1937                       (priv->hw_ready == 1) ? "ready" : "not ready");
1938         return ret;
1939 }
1940
1941 static int iwl_prepare_card_hw(struct iwl_priv *priv)
1942 {
1943         int ret = 0;
1944
1945         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter \n");
1946
1947         ret = iwl_set_hw_ready(priv);
1948         if (priv->hw_ready)
1949                 return ret;
1950
1951         /* If HW is not ready, prepare the conditions to check again */
1952         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1953                         CSR_HW_IF_CONFIG_REG_PREPARE);
1954
1955         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
1956                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
1957                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
1958
1959         /* HW should be ready by now, check again. */
1960         if (ret != -ETIMEDOUT)
1961                 iwl_set_hw_ready(priv);
1962
1963         return ret;
1964 }
1965
1966 #define MAX_HW_RESTARTS 5
1967
1968 static int __iwl_up(struct iwl_priv *priv)
1969 {
1970         int i;
1971         int ret;
1972
1973         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1974                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
1975                 return -EIO;
1976         }
1977
1978         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
1979                 IWL_ERR(priv, "ucode not available for device bringup\n");
1980                 return -EIO;
1981         }
1982
1983         iwl_prepare_card_hw(priv);
1984
1985         if (!priv->hw_ready) {
1986                 IWL_WARN(priv, "Exit HW not ready\n");
1987                 return -EIO;
1988         }
1989
1990         /* If platform's RF_KILL switch is NOT set to KILL */
1991         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
1992                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1993         else
1994                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1995
1996         if (iwl_is_rfkill(priv)) {
1997                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
1998
1999                 iwl_enable_interrupts(priv);
2000                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2001                 return 0;
2002         }
2003
2004         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2005
2006         ret = iwl_hw_nic_init(priv);
2007         if (ret) {
2008                 IWL_ERR(priv, "Unable to init nic\n");
2009                 return ret;
2010         }
2011
2012         /* make sure rfkill handshake bits are cleared */
2013         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2014         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2015                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2016
2017         /* clear (again), then enable host interrupts */
2018         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2019         iwl_enable_interrupts(priv);
2020
2021         /* really make sure rfkill handshake bits are cleared */
2022         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2023         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2024
2025         /* Copy original ucode data image from disk into backup cache.
2026          * This will be used to initialize the on-board processor's
2027          * data SRAM for a clean start when the runtime program first loads. */
2028         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2029                priv->ucode_data.len);
2030
2031         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2032
2033                 iwl_clear_stations_table(priv);
2034
2035                 /* load bootstrap state machine,
2036                  * load bootstrap program into processor's memory,
2037                  * prepare to load the "initialize" uCode */
2038                 ret = priv->cfg->ops->lib->load_ucode(priv);
2039
2040                 if (ret) {
2041                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2042                                 ret);
2043                         continue;
2044                 }
2045
2046                 /* start card; "initialize" will load runtime ucode */
2047                 iwl_nic_start(priv);
2048
2049                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2050
2051                 return 0;
2052         }
2053
2054         set_bit(STATUS_EXIT_PENDING, &priv->status);
2055         __iwl_down(priv);
2056         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2057
2058         /* tried to restart and config the device for as long as our
2059          * patience could withstand */
2060         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2061         return -EIO;
2062 }
2063
2064
2065 /*****************************************************************************
2066  *
2067  * Workqueue callbacks
2068  *
2069  *****************************************************************************/
2070
2071 static void iwl_bg_init_alive_start(struct work_struct *data)
2072 {
2073         struct iwl_priv *priv =
2074             container_of(data, struct iwl_priv, init_alive_start.work);
2075
2076         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2077                 return;
2078
2079         mutex_lock(&priv->mutex);
2080         priv->cfg->ops->lib->init_alive_start(priv);
2081         mutex_unlock(&priv->mutex);
2082 }
2083
2084 static void iwl_bg_alive_start(struct work_struct *data)
2085 {
2086         struct iwl_priv *priv =
2087             container_of(data, struct iwl_priv, alive_start.work);
2088
2089         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2090                 return;
2091
2092         /* enable dram interrupt */
2093         iwl_reset_ict(priv);
2094
2095         mutex_lock(&priv->mutex);
2096         iwl_alive_start(priv);
2097         mutex_unlock(&priv->mutex);
2098 }
2099
2100 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2101 {
2102         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2103                         run_time_calib_work);
2104
2105         mutex_lock(&priv->mutex);
2106
2107         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2108             test_bit(STATUS_SCANNING, &priv->status)) {
2109                 mutex_unlock(&priv->mutex);
2110                 return;
2111         }
2112
2113         if (priv->start_calib) {
2114                 iwl_chain_noise_calibration(priv, &priv->statistics);
2115
2116                 iwl_sensitivity_calibration(priv, &priv->statistics);
2117         }
2118
2119         mutex_unlock(&priv->mutex);
2120         return;
2121 }
2122
2123 static void iwl_bg_up(struct work_struct *data)
2124 {
2125         struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2126
2127         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2128                 return;
2129
2130         mutex_lock(&priv->mutex);
2131         __iwl_up(priv);
2132         mutex_unlock(&priv->mutex);
2133 }
2134
2135 static void iwl_bg_restart(struct work_struct *data)
2136 {
2137         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2138
2139         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2140                 return;
2141
2142         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2143                 mutex_lock(&priv->mutex);
2144                 priv->vif = NULL;
2145                 priv->is_open = 0;
2146                 mutex_unlock(&priv->mutex);
2147                 iwl_down(priv);
2148                 ieee80211_restart_hw(priv->hw);
2149         } else {
2150                 iwl_down(priv);
2151                 queue_work(priv->workqueue, &priv->up);
2152         }
2153 }
2154
2155 static void iwl_bg_rx_replenish(struct work_struct *data)
2156 {
2157         struct iwl_priv *priv =
2158             container_of(data, struct iwl_priv, rx_replenish);
2159
2160         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2161                 return;
2162
2163         mutex_lock(&priv->mutex);
2164         iwl_rx_replenish(priv);
2165         mutex_unlock(&priv->mutex);
2166 }
2167
2168 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2169
2170 void iwl_post_associate(struct iwl_priv *priv)
2171 {
2172         struct ieee80211_conf *conf = NULL;
2173         int ret = 0;
2174         unsigned long flags;
2175
2176         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2177                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2178                 return;
2179         }
2180
2181         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2182                         priv->assoc_id, priv->active_rxon.bssid_addr);
2183
2184
2185         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2186                 return;
2187
2188
2189         if (!priv->vif || !priv->is_open)
2190                 return;
2191
2192         iwl_scan_cancel_timeout(priv, 200);
2193
2194         conf = ieee80211_get_hw_conf(priv->hw);
2195
2196         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2197         iwlcore_commit_rxon(priv);
2198
2199         iwl_setup_rxon_timing(priv);
2200         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2201                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2202         if (ret)
2203                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2204                             "Attempting to continue.\n");
2205
2206         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2207
2208         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2209
2210         if (priv->cfg->ops->hcmd->set_rxon_chain)
2211                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2212
2213         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2214
2215         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2216                         priv->assoc_id, priv->beacon_int);
2217
2218         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2219                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2220         else
2221                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2222
2223         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2224                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2225                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2226                 else
2227                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2228
2229                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2230                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2231
2232         }
2233
2234         iwlcore_commit_rxon(priv);
2235
2236         switch (priv->iw_mode) {
2237         case NL80211_IFTYPE_STATION:
2238                 break;
2239
2240         case NL80211_IFTYPE_ADHOC:
2241
2242                 /* assume default assoc id */
2243                 priv->assoc_id = 1;
2244
2245                 iwl_rxon_add_station(priv, priv->bssid, 0);
2246                 iwl_send_beacon_cmd(priv);
2247
2248                 break;
2249
2250         default:
2251                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2252                           __func__, priv->iw_mode);
2253                 break;
2254         }
2255
2256         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2257                 priv->assoc_station_added = 1;
2258
2259         spin_lock_irqsave(&priv->lock, flags);
2260         iwl_activate_qos(priv, 0);
2261         spin_unlock_irqrestore(&priv->lock, flags);
2262
2263         /* the chain noise calibration will enabled PM upon completion
2264          * If chain noise has already been run, then we need to enable
2265          * power management here */
2266         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2267                 iwl_power_update_mode(priv, false);
2268
2269         /* Enable Rx differential gain and sensitivity calibrations */
2270         iwl_chain_noise_reset(priv);
2271         priv->start_calib = 1;
2272
2273 }
2274
2275 /*****************************************************************************
2276  *
2277  * mac80211 entry point functions
2278  *
2279  *****************************************************************************/
2280
2281 #define UCODE_READY_TIMEOUT     (4 * HZ)
2282
2283 static int iwl_mac_start(struct ieee80211_hw *hw)
2284 {
2285         struct iwl_priv *priv = hw->priv;
2286         int ret;
2287
2288         IWL_DEBUG_MAC80211(priv, "enter\n");
2289
2290         /* we should be verifying the device is ready to be opened */
2291         mutex_lock(&priv->mutex);
2292
2293         /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2294          * ucode filename and max sizes are card-specific. */
2295
2296         if (!priv->ucode_code.len) {
2297                 ret = iwl_read_ucode(priv);
2298                 if (ret) {
2299                         IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2300                         mutex_unlock(&priv->mutex);
2301                         return ret;
2302                 }
2303         }
2304
2305         ret = __iwl_up(priv);
2306
2307         mutex_unlock(&priv->mutex);
2308
2309         if (ret)
2310                 return ret;
2311
2312         if (iwl_is_rfkill(priv))
2313                 goto out;
2314
2315         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2316
2317         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2318          * mac80211 will not be run successfully. */
2319         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2320                         test_bit(STATUS_READY, &priv->status),
2321                         UCODE_READY_TIMEOUT);
2322         if (!ret) {
2323                 if (!test_bit(STATUS_READY, &priv->status)) {
2324                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2325                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2326                         return -ETIMEDOUT;
2327                 }
2328         }
2329
2330 out:
2331         priv->is_open = 1;
2332         IWL_DEBUG_MAC80211(priv, "leave\n");
2333         return 0;
2334 }
2335
2336 static void iwl_mac_stop(struct ieee80211_hw *hw)
2337 {
2338         struct iwl_priv *priv = hw->priv;
2339
2340         IWL_DEBUG_MAC80211(priv, "enter\n");
2341
2342         if (!priv->is_open)
2343                 return;
2344
2345         priv->is_open = 0;
2346
2347         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2348                 /* stop mac, cancel any scan request and clear
2349                  * RXON_FILTER_ASSOC_MSK BIT
2350                  */
2351                 mutex_lock(&priv->mutex);
2352                 iwl_scan_cancel_timeout(priv, 100);
2353                 mutex_unlock(&priv->mutex);
2354         }
2355
2356         iwl_down(priv);
2357
2358         flush_workqueue(priv->workqueue);
2359
2360         /* enable interrupts again in order to receive rfkill changes */
2361         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2362         iwl_enable_interrupts(priv);
2363
2364         IWL_DEBUG_MAC80211(priv, "leave\n");
2365 }
2366
2367 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2368 {
2369         struct iwl_priv *priv = hw->priv;
2370
2371         IWL_DEBUG_MACDUMP(priv, "enter\n");
2372
2373         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2374                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2375
2376         if (iwl_tx_skb(priv, skb))
2377                 dev_kfree_skb_any(skb);
2378
2379         IWL_DEBUG_MACDUMP(priv, "leave\n");
2380         return NETDEV_TX_OK;
2381 }
2382
2383 void iwl_config_ap(struct iwl_priv *priv)
2384 {
2385         int ret = 0;
2386         unsigned long flags;
2387
2388         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2389                 return;
2390
2391         /* The following should be done only at AP bring up */
2392         if (!iwl_is_associated(priv)) {
2393
2394                 /* RXON - unassoc (to set timing command) */
2395                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2396                 iwlcore_commit_rxon(priv);
2397
2398                 /* RXON Timing */
2399                 iwl_setup_rxon_timing(priv);
2400                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2401                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2402                 if (ret)
2403                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2404                                         "Attempting to continue.\n");
2405
2406                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2407                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2408
2409                 /* FIXME: what should be the assoc_id for AP? */
2410                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2411                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2412                         priv->staging_rxon.flags |=
2413                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2414                 else
2415                         priv->staging_rxon.flags &=
2416                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2417
2418                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2419                         if (priv->assoc_capability &
2420                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2421                                 priv->staging_rxon.flags |=
2422                                         RXON_FLG_SHORT_SLOT_MSK;
2423                         else
2424                                 priv->staging_rxon.flags &=
2425                                         ~RXON_FLG_SHORT_SLOT_MSK;
2426
2427                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2428                                 priv->staging_rxon.flags &=
2429                                         ~RXON_FLG_SHORT_SLOT_MSK;
2430                 }
2431                 /* restore RXON assoc */
2432                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2433                 iwlcore_commit_rxon(priv);
2434                 spin_lock_irqsave(&priv->lock, flags);
2435                 iwl_activate_qos(priv, 1);
2436                 spin_unlock_irqrestore(&priv->lock, flags);
2437                 iwl_rxon_add_station(priv, iwl_bcast_addr, 0);
2438         }
2439         iwl_send_beacon_cmd(priv);
2440
2441         /* FIXME - we need to add code here to detect a totally new
2442          * configuration, reset the AP, unassoc, rxon timing, assoc,
2443          * clear sta table, add BCAST sta... */
2444 }
2445
2446 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2447                         struct ieee80211_key_conf *keyconf, const u8 *addr,
2448                         u32 iv32, u16 *phase1key)
2449 {
2450
2451         struct iwl_priv *priv = hw->priv;
2452         IWL_DEBUG_MAC80211(priv, "enter\n");
2453
2454         iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key);
2455
2456         IWL_DEBUG_MAC80211(priv, "leave\n");
2457 }
2458
2459 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2460                            struct ieee80211_vif *vif,
2461                            struct ieee80211_sta *sta,
2462                            struct ieee80211_key_conf *key)
2463 {
2464         struct iwl_priv *priv = hw->priv;
2465         const u8 *addr;
2466         int ret;
2467         u8 sta_id;
2468         bool is_default_wep_key = false;
2469
2470         IWL_DEBUG_MAC80211(priv, "enter\n");
2471
2472         if (priv->cfg->mod_params->sw_crypto) {
2473                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2474                 return -EOPNOTSUPP;
2475         }
2476         addr = sta ? sta->addr : iwl_bcast_addr;
2477         sta_id = iwl_find_station(priv, addr);
2478         if (sta_id == IWL_INVALID_STATION) {
2479                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2480                                    addr);
2481                 return -EINVAL;
2482
2483         }
2484
2485         mutex_lock(&priv->mutex);
2486         iwl_scan_cancel_timeout(priv, 100);
2487         mutex_unlock(&priv->mutex);
2488
2489         /* If we are getting WEP group key and we didn't receive any key mapping
2490          * so far, we are in legacy wep mode (group key only), otherwise we are
2491          * in 1X mode.
2492          * In legacy wep mode, we use another host command to the uCode */
2493         if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id &&
2494                 priv->iw_mode != NL80211_IFTYPE_AP) {
2495                 if (cmd == SET_KEY)
2496                         is_default_wep_key = !priv->key_mapping_key;
2497                 else
2498                         is_default_wep_key =
2499                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2500         }
2501
2502         switch (cmd) {
2503         case SET_KEY:
2504                 if (is_default_wep_key)
2505                         ret = iwl_set_default_wep_key(priv, key);
2506                 else
2507                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2508
2509                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2510                 break;
2511         case DISABLE_KEY:
2512                 if (is_default_wep_key)
2513                         ret = iwl_remove_default_wep_key(priv, key);
2514                 else
2515                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2516
2517                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2518                 break;
2519         default:
2520                 ret = -EINVAL;
2521         }
2522
2523         IWL_DEBUG_MAC80211(priv, "leave\n");
2524
2525         return ret;
2526 }
2527
2528 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2529                              enum ieee80211_ampdu_mlme_action action,
2530                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2531 {
2532         struct iwl_priv *priv = hw->priv;
2533         int ret;
2534
2535         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2536                      sta->addr, tid);
2537
2538         if (!(priv->cfg->sku & IWL_SKU_N))
2539                 return -EACCES;
2540
2541         switch (action) {
2542         case IEEE80211_AMPDU_RX_START:
2543                 IWL_DEBUG_HT(priv, "start Rx\n");
2544                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2545         case IEEE80211_AMPDU_RX_STOP:
2546                 IWL_DEBUG_HT(priv, "stop Rx\n");
2547                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2548                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2549                         return 0;
2550                 else
2551                         return ret;
2552         case IEEE80211_AMPDU_TX_START:
2553                 IWL_DEBUG_HT(priv, "start Tx\n");
2554                 return iwl_tx_agg_start(priv, sta->addr, tid, ssn);
2555         case IEEE80211_AMPDU_TX_STOP:
2556                 IWL_DEBUG_HT(priv, "stop Tx\n");
2557                 ret = iwl_tx_agg_stop(priv, sta->addr, tid);
2558                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2559                         return 0;
2560                 else
2561                         return ret;
2562         default:
2563                 IWL_DEBUG_HT(priv, "unknown\n");
2564                 return -EINVAL;
2565                 break;
2566         }
2567         return 0;
2568 }
2569
2570 static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2571                              struct ieee80211_low_level_stats *stats)
2572 {
2573         struct iwl_priv *priv = hw->priv;
2574
2575         priv = hw->priv;
2576         IWL_DEBUG_MAC80211(priv, "enter\n");
2577         IWL_DEBUG_MAC80211(priv, "leave\n");
2578
2579         return 0;
2580 }
2581
2582 /*****************************************************************************
2583  *
2584  * sysfs attributes
2585  *
2586  *****************************************************************************/
2587
2588 #ifdef CONFIG_IWLWIFI_DEBUG
2589
2590 /*
2591  * The following adds a new attribute to the sysfs representation
2592  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
2593  * used for controlling the debug level.
2594  *
2595  * See the level definitions in iwl for details.
2596  *
2597  * The debug_level being managed using sysfs below is a per device debug
2598  * level that is used instead of the global debug level if it (the per
2599  * device debug level) is set.
2600  */
2601 static ssize_t show_debug_level(struct device *d,
2602                                 struct device_attribute *attr, char *buf)
2603 {
2604         struct iwl_priv *priv = dev_get_drvdata(d);
2605         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
2606 }
2607 static ssize_t store_debug_level(struct device *d,
2608                                 struct device_attribute *attr,
2609                                  const char *buf, size_t count)
2610 {
2611         struct iwl_priv *priv = dev_get_drvdata(d);
2612         unsigned long val;
2613         int ret;
2614
2615         ret = strict_strtoul(buf, 0, &val);
2616         if (ret)
2617                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
2618         else {
2619                 priv->debug_level = val;
2620                 if (iwl_alloc_traffic_mem(priv))
2621                         IWL_ERR(priv,
2622                                 "Not enough memory to generate traffic log\n");
2623         }
2624         return strnlen(buf, count);
2625 }
2626
2627 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
2628                         show_debug_level, store_debug_level);
2629
2630
2631 #endif /* CONFIG_IWLWIFI_DEBUG */
2632
2633
2634 static ssize_t show_temperature(struct device *d,
2635                                 struct device_attribute *attr, char *buf)
2636 {
2637         struct iwl_priv *priv = dev_get_drvdata(d);
2638
2639         if (!iwl_is_alive(priv))
2640                 return -EAGAIN;
2641
2642         return sprintf(buf, "%d\n", priv->temperature);
2643 }
2644
2645 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
2646
2647 static ssize_t show_tx_power(struct device *d,
2648                              struct device_attribute *attr, char *buf)
2649 {
2650         struct iwl_priv *priv = dev_get_drvdata(d);
2651
2652         if (!iwl_is_ready_rf(priv))
2653                 return sprintf(buf, "off\n");
2654         else
2655                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
2656 }
2657
2658 static ssize_t store_tx_power(struct device *d,
2659                               struct device_attribute *attr,
2660                               const char *buf, size_t count)
2661 {
2662         struct iwl_priv *priv = dev_get_drvdata(d);
2663         unsigned long val;
2664         int ret;
2665
2666         ret = strict_strtoul(buf, 10, &val);
2667         if (ret)
2668                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
2669         else {
2670                 ret = iwl_set_tx_power(priv, val, false);
2671                 if (ret)
2672                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
2673                                 ret);
2674                 else
2675                         ret = count;
2676         }
2677         return ret;
2678 }
2679
2680 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
2681
2682 static ssize_t show_flags(struct device *d,
2683                           struct device_attribute *attr, char *buf)
2684 {
2685         struct iwl_priv *priv = dev_get_drvdata(d);
2686
2687         return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
2688 }
2689
2690 static ssize_t store_flags(struct device *d,
2691                            struct device_attribute *attr,
2692                            const char *buf, size_t count)
2693 {
2694         struct iwl_priv *priv = dev_get_drvdata(d);
2695         unsigned long val;
2696         u32 flags;
2697         int ret = strict_strtoul(buf, 0, &val);
2698         if (ret)
2699                 return ret;
2700         flags = (u32)val;
2701
2702         mutex_lock(&priv->mutex);
2703         if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
2704                 /* Cancel any currently running scans... */
2705                 if (iwl_scan_cancel_timeout(priv, 100))
2706                         IWL_WARN(priv, "Could not cancel scan.\n");
2707                 else {
2708                         IWL_DEBUG_INFO(priv, "Commit rxon.flags = 0x%04X\n", flags);
2709                         priv->staging_rxon.flags = cpu_to_le32(flags);
2710                         iwlcore_commit_rxon(priv);
2711                 }
2712         }
2713         mutex_unlock(&priv->mutex);
2714
2715         return count;
2716 }
2717
2718 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
2719
2720 static ssize_t show_filter_flags(struct device *d,
2721                                  struct device_attribute *attr, char *buf)
2722 {
2723         struct iwl_priv *priv = dev_get_drvdata(d);
2724
2725         return sprintf(buf, "0x%04X\n",
2726                 le32_to_cpu(priv->active_rxon.filter_flags));
2727 }
2728
2729 static ssize_t store_filter_flags(struct device *d,
2730                                   struct device_attribute *attr,
2731                                   const char *buf, size_t count)
2732 {
2733         struct iwl_priv *priv = dev_get_drvdata(d);
2734         unsigned long val;
2735         u32 filter_flags;
2736         int ret = strict_strtoul(buf, 0, &val);
2737         if (ret)
2738                 return ret;
2739         filter_flags = (u32)val;
2740
2741         mutex_lock(&priv->mutex);
2742         if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
2743                 /* Cancel any currently running scans... */
2744                 if (iwl_scan_cancel_timeout(priv, 100))
2745                         IWL_WARN(priv, "Could not cancel scan.\n");
2746                 else {
2747                         IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
2748                                        "0x%04X\n", filter_flags);
2749                         priv->staging_rxon.filter_flags =
2750                                 cpu_to_le32(filter_flags);
2751                         iwlcore_commit_rxon(priv);
2752                 }
2753         }
2754         mutex_unlock(&priv->mutex);
2755
2756         return count;
2757 }
2758
2759 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
2760                    store_filter_flags);
2761
2762
2763 static ssize_t show_statistics(struct device *d,
2764                                struct device_attribute *attr, char *buf)
2765 {
2766         struct iwl_priv *priv = dev_get_drvdata(d);
2767         u32 size = sizeof(struct iwl_notif_statistics);
2768         u32 len = 0, ofs = 0;
2769         u8 *data = (u8 *)&priv->statistics;
2770         int rc = 0;
2771
2772         if (!iwl_is_alive(priv))
2773                 return -EAGAIN;
2774
2775         mutex_lock(&priv->mutex);
2776         rc = iwl_send_statistics_request(priv, 0);
2777         mutex_unlock(&priv->mutex);
2778
2779         if (rc) {
2780                 len = sprintf(buf,
2781                               "Error sending statistics request: 0x%08X\n", rc);
2782                 return len;
2783         }
2784
2785         while (size && (PAGE_SIZE - len)) {
2786                 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
2787                                    PAGE_SIZE - len, 1);
2788                 len = strlen(buf);
2789                 if (PAGE_SIZE - len)
2790                         buf[len++] = '\n';
2791
2792                 ofs += 16;
2793                 size -= min(size, 16U);
2794         }
2795
2796         return len;
2797 }
2798
2799 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2800
2801
2802 /*****************************************************************************
2803  *
2804  * driver setup and teardown
2805  *
2806  *****************************************************************************/
2807
2808 static void iwl_setup_deferred_work(struct iwl_priv *priv)
2809 {
2810         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
2811
2812         init_waitqueue_head(&priv->wait_command_queue);
2813
2814         INIT_WORK(&priv->up, iwl_bg_up);
2815         INIT_WORK(&priv->restart, iwl_bg_restart);
2816         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2817         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
2818         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
2819         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
2820         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
2821
2822         iwl_setup_scan_deferred_work(priv);
2823
2824         if (priv->cfg->ops->lib->setup_deferred_work)
2825                 priv->cfg->ops->lib->setup_deferred_work(priv);
2826
2827         init_timer(&priv->statistics_periodic);
2828         priv->statistics_periodic.data = (unsigned long)priv;
2829         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2830
2831         if (!priv->cfg->use_isr_legacy)
2832                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2833                         iwl_irq_tasklet, (unsigned long)priv);
2834         else
2835                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2836                         iwl_irq_tasklet_legacy, (unsigned long)priv);
2837 }
2838
2839 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2840 {
2841         if (priv->cfg->ops->lib->cancel_deferred_work)
2842                 priv->cfg->ops->lib->cancel_deferred_work(priv);
2843
2844         cancel_delayed_work_sync(&priv->init_alive_start);
2845         cancel_delayed_work(&priv->scan_check);
2846         cancel_delayed_work(&priv->alive_start);
2847         cancel_work_sync(&priv->beacon_update);
2848         del_timer_sync(&priv->statistics_periodic);
2849 }
2850
2851 static struct attribute *iwl_sysfs_entries[] = {
2852         &dev_attr_flags.attr,
2853         &dev_attr_filter_flags.attr,
2854         &dev_attr_statistics.attr,
2855         &dev_attr_temperature.attr,
2856         &dev_attr_tx_power.attr,
2857 #ifdef CONFIG_IWLWIFI_DEBUG
2858         &dev_attr_debug_level.attr,
2859 #endif
2860         NULL
2861 };
2862
2863 static struct attribute_group iwl_attribute_group = {
2864         .name = NULL,           /* put in device directory */
2865         .attrs = iwl_sysfs_entries,
2866 };
2867
2868 static struct ieee80211_ops iwl_hw_ops = {
2869         .tx = iwl_mac_tx,
2870         .start = iwl_mac_start,
2871         .stop = iwl_mac_stop,
2872         .add_interface = iwl_mac_add_interface,
2873         .remove_interface = iwl_mac_remove_interface,
2874         .config = iwl_mac_config,
2875         .configure_filter = iwl_configure_filter,
2876         .set_key = iwl_mac_set_key,
2877         .update_tkip_key = iwl_mac_update_tkip_key,
2878         .get_stats = iwl_mac_get_stats,
2879         .get_tx_stats = iwl_mac_get_tx_stats,
2880         .conf_tx = iwl_mac_conf_tx,
2881         .reset_tsf = iwl_mac_reset_tsf,
2882         .bss_info_changed = iwl_bss_info_changed,
2883         .ampdu_action = iwl_mac_ampdu_action,
2884         .hw_scan = iwl_mac_hw_scan
2885 };
2886
2887 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2888 {
2889         int err = 0;
2890         struct iwl_priv *priv;
2891         struct ieee80211_hw *hw;
2892         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
2893         unsigned long flags;
2894         u16 pci_cmd;
2895
2896         /************************
2897          * 1. Allocating HW data
2898          ************************/
2899
2900         /* Disabling hardware scan means that mac80211 will perform scans
2901          * "the hard way", rather than using device's scan. */
2902         if (cfg->mod_params->disable_hw_scan) {
2903                 if (iwl_debug_level & IWL_DL_INFO)
2904                         dev_printk(KERN_DEBUG, &(pdev->dev),
2905                                    "Disabling hw_scan\n");
2906                 iwl_hw_ops.hw_scan = NULL;
2907         }
2908
2909         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
2910         if (!hw) {
2911                 err = -ENOMEM;
2912                 goto out;
2913         }
2914         priv = hw->priv;
2915         /* At this point both hw and priv are allocated. */
2916
2917         SET_IEEE80211_DEV(hw, &pdev->dev);
2918
2919         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
2920         priv->cfg = cfg;
2921         priv->pci_dev = pdev;
2922         priv->inta_mask = CSR_INI_SET_MASK;
2923
2924 #ifdef CONFIG_IWLWIFI_DEBUG
2925         atomic_set(&priv->restrict_refcnt, 0);
2926 #endif
2927         if (iwl_alloc_traffic_mem(priv))
2928                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
2929
2930         /**************************
2931          * 2. Initializing PCI bus
2932          **************************/
2933         if (pci_enable_device(pdev)) {
2934                 err = -ENODEV;
2935                 goto out_ieee80211_free_hw;
2936         }
2937
2938         pci_set_master(pdev);
2939
2940         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
2941         if (!err)
2942                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
2943         if (err) {
2944                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2945                 if (!err)
2946                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2947                 /* both attempts failed: */
2948                 if (err) {
2949                         IWL_WARN(priv, "No suitable DMA available.\n");
2950                         goto out_pci_disable_device;
2951                 }
2952         }
2953
2954         err = pci_request_regions(pdev, DRV_NAME);
2955         if (err)
2956                 goto out_pci_disable_device;
2957
2958         pci_set_drvdata(pdev, priv);
2959
2960
2961         /***********************
2962          * 3. Read REV register
2963          ***********************/
2964         priv->hw_base = pci_iomap(pdev, 0, 0);
2965         if (!priv->hw_base) {
2966                 err = -ENODEV;
2967                 goto out_pci_release_regions;
2968         }
2969
2970         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
2971                 (unsigned long long) pci_resource_len(pdev, 0));
2972         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2973
2974         /* this spin lock will be used in apm_ops.init and EEPROM access
2975          * we should init now
2976          */
2977         spin_lock_init(&priv->reg_lock);
2978         iwl_hw_detect(priv);
2979         IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2980                 priv->cfg->name, priv->hw_rev);
2981
2982         /* We disable the RETRY_TIMEOUT register (0x41) to keep
2983          * PCI Tx retries from interfering with C3 CPU state */
2984         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2985
2986         iwl_prepare_card_hw(priv);
2987         if (!priv->hw_ready) {
2988                 IWL_WARN(priv, "Failed, HW not ready\n");
2989                 goto out_iounmap;
2990         }
2991
2992         /* amp init */
2993         err = priv->cfg->ops->lib->apm_ops.init(priv);
2994         if (err < 0) {
2995                 IWL_ERR(priv, "Failed to init APMG\n");
2996                 goto out_iounmap;
2997         }
2998         /*****************
2999          * 4. Read EEPROM
3000          *****************/
3001         /* Read the EEPROM */
3002         err = iwl_eeprom_init(priv);
3003         if (err) {
3004                 IWL_ERR(priv, "Unable to init EEPROM\n");
3005                 goto out_iounmap;
3006         }
3007         err = iwl_eeprom_check_version(priv);
3008         if (err)
3009                 goto out_free_eeprom;
3010
3011         /* extract MAC Address */
3012         iwl_eeprom_get_mac(priv, priv->mac_addr);
3013         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3014         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3015
3016         /************************
3017          * 5. Setup HW constants
3018          ************************/
3019         if (iwl_set_hw_params(priv)) {
3020                 IWL_ERR(priv, "failed to set hw parameters\n");
3021                 goto out_free_eeprom;
3022         }
3023
3024         /*******************
3025          * 6. Setup priv
3026          *******************/
3027
3028         err = iwl_init_drv(priv);
3029         if (err)
3030                 goto out_free_eeprom;
3031         /* At this point both hw and priv are initialized. */
3032
3033         /********************
3034          * 7. Setup services
3035          ********************/
3036         spin_lock_irqsave(&priv->lock, flags);
3037         iwl_disable_interrupts(priv);
3038         spin_unlock_irqrestore(&priv->lock, flags);
3039
3040         pci_enable_msi(priv->pci_dev);
3041
3042         iwl_alloc_isr_ict(priv);
3043         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3044                           IRQF_SHARED, DRV_NAME, priv);
3045         if (err) {
3046                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3047                 goto out_disable_msi;
3048         }
3049         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3050         if (err) {
3051                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3052                 goto out_free_irq;
3053         }
3054
3055         iwl_setup_deferred_work(priv);
3056         iwl_setup_rx_handlers(priv);
3057
3058         /**********************************
3059          * 8. Setup and register mac80211
3060          **********************************/
3061
3062         /* enable interrupts if needed: hw bug w/a */
3063         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3064         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3065                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3066                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3067         }
3068
3069         iwl_enable_interrupts(priv);
3070
3071         err = iwl_setup_mac(priv);
3072         if (err)
3073                 goto out_remove_sysfs;
3074
3075         err = iwl_dbgfs_register(priv, DRV_NAME);
3076         if (err)
3077                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3078
3079         /* If platform's RF_KILL switch is NOT set to KILL */
3080         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3081                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3082         else
3083                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3084
3085         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3086                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3087
3088         iwl_power_initialize(priv);
3089         iwl_tt_initialize(priv);
3090         return 0;
3091
3092  out_remove_sysfs:
3093         destroy_workqueue(priv->workqueue);
3094         priv->workqueue = NULL;
3095         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3096  out_free_irq:
3097         free_irq(priv->pci_dev->irq, priv);
3098         iwl_free_isr_ict(priv);
3099  out_disable_msi:
3100         pci_disable_msi(priv->pci_dev);
3101         iwl_uninit_drv(priv);
3102  out_free_eeprom:
3103         iwl_eeprom_free(priv);
3104  out_iounmap:
3105         pci_iounmap(pdev, priv->hw_base);
3106  out_pci_release_regions:
3107         pci_set_drvdata(pdev, NULL);
3108         pci_release_regions(pdev);
3109  out_pci_disable_device:
3110         pci_disable_device(pdev);
3111  out_ieee80211_free_hw:
3112         ieee80211_free_hw(priv->hw);
3113         iwl_free_traffic_mem(priv);
3114  out:
3115         return err;
3116 }
3117
3118 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3119 {
3120         struct iwl_priv *priv = pci_get_drvdata(pdev);
3121         unsigned long flags;
3122
3123         if (!priv)
3124                 return;
3125
3126         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3127
3128         iwl_dbgfs_unregister(priv);
3129         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3130
3131         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3132          * to be called and iwl_down since we are removing the device
3133          * we need to set STATUS_EXIT_PENDING bit.
3134          */
3135         set_bit(STATUS_EXIT_PENDING, &priv->status);
3136         if (priv->mac80211_registered) {
3137                 ieee80211_unregister_hw(priv->hw);
3138                 priv->mac80211_registered = 0;
3139         } else {
3140                 iwl_down(priv);
3141         }
3142
3143         iwl_tt_exit(priv);
3144
3145         /* make sure we flush any pending irq or
3146          * tasklet for the driver
3147          */
3148         spin_lock_irqsave(&priv->lock, flags);
3149         iwl_disable_interrupts(priv);
3150         spin_unlock_irqrestore(&priv->lock, flags);
3151
3152         iwl_synchronize_irq(priv);
3153
3154         iwl_dealloc_ucode_pci(priv);
3155
3156         if (priv->rxq.bd)
3157                 iwl_rx_queue_free(priv, &priv->rxq);
3158         iwl_hw_txq_ctx_free(priv);
3159
3160         iwl_clear_stations_table(priv);
3161         iwl_eeprom_free(priv);
3162
3163
3164         /*netif_stop_queue(dev); */
3165         flush_workqueue(priv->workqueue);
3166
3167         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3168          * priv->workqueue... so we can't take down the workqueue
3169          * until now... */
3170         destroy_workqueue(priv->workqueue);