drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <net/mac80211.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40
  41 #include "iwl-4965.h"
  42 #include "iwl-helpers.h"
  43
  44 static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv);
  45
  46 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np)    \
  47         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,      \
  48                                     IWL_RATE_SISO_##s##M_PLCP, \
  49                                     IWL_RATE_MIMO_##s##M_PLCP, \
  50                                     IWL_RATE_##r##M_IEEE,      \
  51                                     IWL_RATE_##ip##M_INDEX,    \
  52                                     IWL_RATE_##in##M_INDEX,    \
  53                                     IWL_RATE_##rp##M_INDEX,    \
  54                                     IWL_RATE_##rn##M_INDEX,    \
  55                                     IWL_RATE_##pp##M_INDEX,    \
  56                                     IWL_RATE_##np##M_INDEX }
  57
  58 /*
  59  * Parameter order:
  60  *   rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  61  *
  62  * If there isn't a valid next or previous rate then INV is used which
  63  * maps to IWL_RATE_INVALID
  64  *
  65  */
  66 const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = {
  67         IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  68         IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  69         IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  70         IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18),      /* 11mbps */
  71         IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  72         IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11),       /*  9mbps */
  73         IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  74         IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  75         IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  76         IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  77         IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  78         IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  79         IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  80 };
  81
  82 static int is_fat_channel(__le32 rxon_flags)
  83 {
  84         return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
  85                 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
  86 }
  87
  88 static u8 is_single_stream(struct iwl4965_priv *priv)
  89 {
  90 #ifdef CONFIG_IWL4965_HT
  91         if (!priv->current_ht_config.is_ht ||
  92             (priv->current_ht_config.supp_mcs_set[1] == 0) ||
  93             (priv->ps_mode == IWL_MIMO_PS_STATIC))
  94                 return 1;
  95 #else
  96         return 1;
  97 #endif  /*CONFIG_IWL4965_HT */
  98         return 0;
  99 }
 100
 101 /*
 102  * Determine how many receiver/antenna chains to use.
 103  * More provides better reception via diversity.  Fewer saves power.
 104  * MIMO (dual stream) requires at least 2, but works better with 3.
 105  * This does not determine *which* chains to use, just how many.
 106  */
 107 static int iwl4965_get_rx_chain_counter(struct iwl4965_priv *priv,
 108                                         u8 *idle_state, u8 *rx_state)
 109 {
 110         u8 is_single = is_single_stream(priv);
 111         u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
 112
 113         /* # of Rx chains to use when expecting MIMO. */
 114         if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
 115                 *rx_state = 2;
 116         else
 117                 *rx_state = 3;
 118
 119         /* # Rx chains when idling and maybe trying to save power */
 120         switch (priv->ps_mode) {
 121         case IWL_MIMO_PS_STATIC:
 122         case IWL_MIMO_PS_DYNAMIC:
 123                 *idle_state = (is_cam) ? 2 : 1;
 124                 break;
 125         case IWL_MIMO_PS_NONE:
 126                 *idle_state = (is_cam) ? *rx_state : 1;
 127                 break;
 128         default:
 129                 *idle_state = 1;
 130                 break;
 131         }
 132
 133         return 0;
 134 }
 135
 136 int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv)
 137 {
 138         int rc;
 139         unsigned long flags;
 140
 141         spin_lock_irqsave(&priv->lock, flags);
 142         rc = iwl4965_grab_nic_access(priv);
 143         if (rc) {
 144                 spin_unlock_irqrestore(&priv->lock, flags);
 145                 return rc;
 146         }
 147
 148         /* stop Rx DMA */
 149         iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 150         rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
 151                                      (1 << 24), 1000);
 152         if (rc < 0)
 153                 IWL_ERROR("Can't stop Rx DMA.\n");
 154
 155         iwl4965_release_nic_access(priv);
 156         spin_unlock_irqrestore(&priv->lock, flags);
 157
 158         return 0;
 159 }
 160
 161 u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *addr)
 162 {
 163         int i;
 164         int start = 0;
 165         int ret = IWL_INVALID_STATION;
 166         unsigned long flags;
 167         DECLARE_MAC_BUF(mac);
 168
 169         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) ||
 170             (priv->iw_mode == IEEE80211_IF_TYPE_AP))
 171                 start = IWL_STA_ID;
 172
 173         if (is_broadcast_ether_addr(addr))
 174                 return IWL4965_BROADCAST_ID;
 175
 176         spin_lock_irqsave(&priv->sta_lock, flags);
 177         for (i = start; i < priv->hw_setting.max_stations; i++)
 178                 if ((priv->stations[i].used) &&
 179                     (!compare_ether_addr
 180                      (priv->stations[i].sta.sta.addr, addr))) {
 181                         ret = i;
 182                         goto out;
 183                 }
 184
 185         IWL_DEBUG_ASSOC_LIMIT("can not find STA %s total %d\n",
 186                         print_mac(mac, addr), priv->num_stations);
 187
 188  out:
 189         spin_unlock_irqrestore(&priv->sta_lock, flags);
 190         return ret;
 191 }
 192
 193 static int iwl4965_nic_set_pwr_src(struct iwl4965_priv *priv, int pwr_max)
 194 {
 195         int ret;
 196         unsigned long flags;
 197
 198         spin_lock_irqsave(&priv->lock, flags);
 199         ret = iwl4965_grab_nic_access(priv);
 200         if (ret) {
 201                 spin_unlock_irqrestore(&priv->lock, flags);
 202                 return ret;
 203         }
 204
 205         if (!pwr_max) {
 206                 u32 val;
 207
 208                 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
 209                                            &val);
 210
 211                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
 212                         iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 213                                 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 214                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 215         } else
 216                 iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 217                         APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 218                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 219
 220         iwl4965_release_nic_access(priv);
 221         spin_unlock_irqrestore(&priv->lock, flags);
 222
 223         return ret;
 224 }
 225
 226 static int iwl4965_rx_init(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
 227 {
 228         int rc;
 229         unsigned long flags;
 230         unsigned int rb_size;
 231
 232         spin_lock_irqsave(&priv->lock, flags);
 233         rc = iwl4965_grab_nic_access(priv);
 234         if (rc) {
 235                 spin_unlock_irqrestore(&priv->lock, flags);
 236                 return rc;
 237         }
 238
 239         if (iwl4965_param_amsdu_size_8K)
 240                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
 241         else
 242                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
 243
 244         /* Stop Rx DMA */
 245         iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 246
 247         /* Reset driver's Rx queue write index */
 248         iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
 249
 250         /* Tell device where to find RBD circular buffer in DRAM */
 251         iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
 252                              rxq->dma_addr >> 8);
 253
 254         /* Tell device where in DRAM to update its Rx status */
 255         iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
 256                              (priv->hw_setting.shared_phys +
 257                               offsetof(struct iwl4965_shared, val0)) >> 4);
 258
 259         /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
 260         iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
 261                              FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
 262                              FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
 263                              rb_size |
 264                              /*0x10 << 4 | */
 265                              (RX_QUEUE_SIZE_LOG <<
 266                               FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
 267
 268         /*
 269          * iwl4965_write32(priv,CSR_INT_COAL_REG,0);
 270          */
 271
 272         iwl4965_release_nic_access(priv);
 273         spin_unlock_irqrestore(&priv->lock, flags);
 274
 275         return 0;
 276 }
 277
 278 /* Tell 4965 where to find the "keep warm" buffer */
 279 static int iwl4965_kw_init(struct iwl4965_priv *priv)
 280 {
 281         unsigned long flags;
 282         int rc;
 283
 284         spin_lock_irqsave(&priv->lock, flags);
 285         rc = iwl4965_grab_nic_access(priv);
 286         if (rc)
 287                 goto out;
 288
 289         iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
 290                              priv->kw.dma_addr >> 4);
 291         iwl4965_release_nic_access(priv);
 292 out:
 293         spin_unlock_irqrestore(&priv->lock, flags);
 294         return rc;
 295 }
 296
 297 static int iwl4965_kw_alloc(struct iwl4965_priv *priv)
 298 {
 299         struct pci_dev *dev = priv->pci_dev;
 300         struct iwl4965_kw *kw = &priv->kw;
 301
 302         kw->size = IWL4965_KW_SIZE;     /* TBW need set somewhere else */
 303         kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
 304         if (!kw->v_addr)
 305                 return -ENOMEM;
 306
 307         return 0;
 308 }
 309
 310 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
 311                             ? # x " " : "")
 312
 313 /**
 314  * iwl4965_set_fat_chan_info - Copy fat channel info into driver's priv.
 315  *
 316  * Does not set up a command, or touch hardware.
 317  */
 318 int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv, int phymode, u16 channel,
 319                               const struct iwl4965_eeprom_channel *eeprom_ch,
 320                               u8 fat_extension_channel)
 321 {
 322         struct iwl4965_channel_info *ch_info;
 323
 324         ch_info = (struct iwl4965_channel_info *)
 325                         iwl4965_get_channel_info(priv, phymode, channel);
 326
 327         if (!is_channel_valid(ch_info))
 328                 return -1;
 329
 330         IWL_DEBUG_INFO("FAT Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
 331                         " %ddBm): Ad-Hoc %ssupported\n",
 332                         ch_info->channel,
 333                         is_channel_a_band(ch_info) ?
 334                         "5.2" : "2.4",
 335                         CHECK_AND_PRINT(IBSS),
 336                         CHECK_AND_PRINT(ACTIVE),
 337                         CHECK_AND_PRINT(RADAR),
 338                         CHECK_AND_PRINT(WIDE),
 339                         CHECK_AND_PRINT(NARROW),
 340                         CHECK_AND_PRINT(DFS),
 341                         eeprom_ch->flags,
 342                         eeprom_ch->max_power_avg,
 343                         ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
 344                          && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
 345                         "" : "not ");
 346
 347         ch_info->fat_eeprom = *eeprom_ch;
 348         ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
 349         ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
 350         ch_info->fat_min_power = 0;
 351         ch_info->fat_scan_power = eeprom_ch->max_power_avg;
 352         ch_info->fat_flags = eeprom_ch->flags;
 353         ch_info->fat_extension_channel = fat_extension_channel;
 354
 355         return 0;
 356 }
 357
 358 /**
 359  * iwl4965_kw_free - Free the "keep warm" buffer
 360  */
 361 static void iwl4965_kw_free(struct iwl4965_priv *priv)
 362 {
 363         struct pci_dev *dev = priv->pci_dev;
 364         struct iwl4965_kw *kw = &priv->kw;
 365
 366         if (kw->v_addr) {
 367                 pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
 368                 memset(kw, 0, sizeof(*kw));
 369         }
 370 }
 371
 372 /**
 373  * iwl4965_txq_ctx_reset - Reset TX queue context
 374  * Destroys all DMA structures and initialise them again
 375  *
 376  * @param priv
 377  * @return error code
 378  */
 379 static int iwl4965_txq_ctx_reset(struct iwl4965_priv *priv)
 380 {
 381         int rc = 0;
 382         int txq_id, slots_num;
 383         unsigned long flags;
 384
 385         iwl4965_kw_free(priv);
 386
 387         /* Free all tx/cmd queues and keep-warm buffer */
 388         iwl4965_hw_txq_ctx_free(priv);
 389
 390         /* Alloc keep-warm buffer */
 391         rc = iwl4965_kw_alloc(priv);
 392         if (rc) {
 393                 IWL_ERROR("Keep Warm allocation failed");
 394                 goto error_kw;
 395         }
 396
 397         spin_lock_irqsave(&priv->lock, flags);
 398
 399         rc = iwl4965_grab_nic_access(priv);
 400         if (unlikely(rc)) {
 401                 IWL_ERROR("TX reset failed");
 402                 spin_unlock_irqrestore(&priv->lock, flags);
 403                 goto error_reset;
 404         }
 405
 406         /* Turn off all Tx DMA channels */
 407         iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0);
 408         iwl4965_release_nic_access(priv);
 409         spin_unlock_irqrestore(&priv->lock, flags);
 410
 411         /* Tell 4965 where to find the keep-warm buffer */
 412         rc = iwl4965_kw_init(priv);
 413         if (rc) {
 414                 IWL_ERROR("kw_init failed\n");
 415                 goto error_reset;
 416         }
 417
 418         /* Alloc and init all (default 16) Tx queues,
 419          * including the command queue (#4) */
 420         for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
 421                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
 422                                         TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
 423                 rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
 424                                        txq_id);
 425                 if (rc) {
 426                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
 427                         goto error;
 428                 }
 429         }
 430
 431         return rc;
 432
 433  error:
 434         iwl4965_hw_txq_ctx_free(priv);
 435  error_reset:
 436         iwl4965_kw_free(priv);
 437  error_kw:
 438         return rc;
 439 }
 440
 441 int iwl4965_hw_nic_init(struct iwl4965_priv *priv)
 442 {
 443         int rc;
 444         unsigned long flags;
 445         struct iwl4965_rx_queue *rxq = &priv->rxq;
 446         u8 rev_id;
 447         u32 val;
 448         u8 val_link;
 449
 450         iwl4965_power_init_handle(priv);
 451
 452         /* nic_init */
 453         spin_lock_irqsave(&priv->lock, flags);
 454
 455         iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 456                     CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 457
 458         iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 459         rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
 460                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 461                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 462         if (rc < 0) {
 463                 spin_unlock_irqrestore(&priv->lock, flags);
 464                 IWL_DEBUG_INFO("Failed to init the card\n");
 465                 return rc;
 466         }
 467
 468         rc = iwl4965_grab_nic_access(priv);
 469         if (rc) {
 470                 spin_unlock_irqrestore(&priv->lock, flags);
 471                 return rc;
 472         }
 473
 474         iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
 475
 476         iwl4965_write_prph(priv, APMG_CLK_CTRL_REG,
 477                                  APMG_CLK_VAL_DMA_CLK_RQT |
 478                                  APMG_CLK_VAL_BSM_CLK_RQT);
 479         iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
 480
 481         udelay(20);
 482
 483         iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 484                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 485
 486         iwl4965_release_nic_access(priv);
 487         iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32);
 488         spin_unlock_irqrestore(&priv->lock, flags);
 489
 490         /* Determine HW type */
 491         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
 492         if (rc)
 493                 return rc;
 494
 495         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
 496
 497         iwl4965_nic_set_pwr_src(priv, 1);
 498         spin_lock_irqsave(&priv->lock, flags);
 499
 500         if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) {
 501                 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
 502                 /* Enable No Snoop field */
 503                 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
 504                                        val & ~(1 << 11));
 505         }
 506
 507         spin_unlock_irqrestore(&priv->lock, flags);
 508
 509         /* Read the EEPROM */
 510         rc = iwl4965_eeprom_init(priv);
 511         if (rc)
 512                 return rc;
 513
 514         if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) {
 515                 IWL_ERROR("Older EEPROM detected!  Aborting.\n");
 516                 return -EINVAL;
 517         }
 518
 519         pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
 520
 521         /* disable L1 entry -- workaround for pre-B1 */
 522         pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
 523
 524         spin_lock_irqsave(&priv->lock, flags);
 525
 526         /* set CSR_HW_CONFIG_REG for uCode use */
 527
 528         iwl4965_set_bit(priv, CSR_SW_VER, CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R |
 529                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 530                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 531
 532         rc = iwl4965_grab_nic_access(priv);
 533         if (rc < 0) {
 534                 spin_unlock_irqrestore(&priv->lock, flags);
 535                 IWL_DEBUG_INFO("Failed to init the card\n");
 536                 return rc;
 537         }
 538
 539         iwl4965_read_prph(priv, APMG_PS_CTRL_REG);
 540         iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG,
 541                                     APMG_PS_CTRL_VAL_RESET_REQ);
 542         udelay(5);
 543         iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG,
 544                                       APMG_PS_CTRL_VAL_RESET_REQ);
 545
 546         iwl4965_release_nic_access(priv);
 547         spin_unlock_irqrestore(&priv->lock, flags);
 548
 549         iwl4965_hw_card_show_info(priv);
 550
 551         /* end nic_init */
 552
 553         /* Allocate the RX queue, or reset if it is already allocated */
 554         if (!rxq->bd) {
 555                 rc = iwl4965_rx_queue_alloc(priv);
 556                 if (rc) {
 557                         IWL_ERROR("Unable to initialize Rx queue\n");
 558                         return -ENOMEM;
 559                 }
 560         } else
 561                 iwl4965_rx_queue_reset(priv, rxq);
 562
 563         iwl4965_rx_replenish(priv);
 564
 565         iwl4965_rx_init(priv, rxq);
 566
 567         spin_lock_irqsave(&priv->lock, flags);
 568
 569         rxq->need_update = 1;
 570         iwl4965_rx_queue_update_write_ptr(priv, rxq);
 571
 572         spin_unlock_irqrestore(&priv->lock, flags);
 573
 574         /* Allocate and init all Tx and Command queues */
 575         rc = iwl4965_txq_ctx_reset(priv);
 576         if (rc)
 577                 return rc;
 578
 579         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
 580                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
 581
 582         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
 583                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
 584
 585         set_bit(STATUS_INIT, &priv->status);
 586
 587         return 0;
 588 }
 589
 590 int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv)
 591 {
 592         int rc = 0;
 593         u32 reg_val;
 594         unsigned long flags;
 595
 596         spin_lock_irqsave(&priv->lock, flags);
 597
 598         /* set stop master bit */
 599         iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
 600
 601         reg_val = iwl4965_read32(priv, CSR_GP_CNTRL);
 602
 603         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
 604             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
 605                 IWL_DEBUG_INFO("Card in power save, master is already "
 606                                "stopped\n");
 607         else {
 608                 rc = iwl4965_poll_bit(priv, CSR_RESET,
 609                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
 610                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
 611                 if (rc < 0) {
 612                         spin_unlock_irqrestore(&priv->lock, flags);
 613                         return rc;
 614                 }
 615         }
 616
 617         spin_unlock_irqrestore(&priv->lock, flags);
 618         IWL_DEBUG_INFO("stop master\n");
 619
 620         return rc;
 621 }
 622
 623 /**
 624  * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
 625  */
 626 void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv)
 627 {
 628
 629         int txq_id;
 630         unsigned long flags;
 631
 632         /* Stop each Tx DMA channel, and wait for it to be idle */
 633         for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
 634                 spin_lock_irqsave(&priv->lock, flags);
 635                 if (iwl4965_grab_nic_access(priv)) {
 636                         spin_unlock_irqrestore(&priv->lock, flags);
 637                         continue;
 638                 }
 639
 640                 iwl4965_write_direct32(priv,
 641                                      IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
 642                                      0x0);
 643                 iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
 644                                         IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
 645                                         (txq_id), 200);
 646                 iwl4965_release_nic_access(priv);
 647                 spin_unlock_irqrestore(&priv->lock, flags);
 648         }
 649
 650         /* Deallocate memory for all Tx queues */
 651         iwl4965_hw_txq_ctx_free(priv);
 652 }
 653
 654 int iwl4965_hw_nic_reset(struct iwl4965_priv *priv)
 655 {
 656         int rc = 0;
 657         unsigned long flags;
 658
 659         iwl4965_hw_nic_stop_master(priv);
 660
 661         spin_lock_irqsave(&priv->lock, flags);
 662
 663         iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 664
 665         udelay(10);
 666
 667         iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 668         rc = iwl4965_poll_bit(priv, CSR_RESET,
 669                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 670                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
 671
 672         udelay(10);
 673
 674         rc = iwl4965_grab_nic_access(priv);
 675         if (!rc) {
 676                 iwl4965_write_prph(priv, APMG_CLK_EN_REG,
 677                                          APMG_CLK_VAL_DMA_CLK_RQT |
 678                                          APMG_CLK_VAL_BSM_CLK_RQT);
 679
 680                 udelay(10);
 681
 682                 iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 683                                 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 684
 685                 iwl4965_release_nic_access(priv);
 686         }
 687
 688         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 689         wake_up_interruptible(&priv->wait_command_queue);
 690
 691         spin_unlock_irqrestore(&priv->lock, flags);
 692
 693         return rc;
 694
 695 }
 696
 697 #define REG_RECALIB_PERIOD (60)
 698
 699 /**
 700  * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
 701  *
 702  * This callback is provided in order to queue the statistics_work
 703  * in work_queue context (v. softirq)
 704  *
 705  * This timer function is continually reset to execute within
 706  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 707  * was received.  We need to ensure we receive the statistics in order
 708  * to update the temperature used for calibrating the TXPOWER.  However,
 709  * we can't send the statistics command from softirq context (which
 710  * is the context which timers run at) so we have to queue off the
 711  * statistics_work to actually send the command to the hardware.
 712  */
 713 static void iwl4965_bg_statistics_periodic(unsigned long data)
 714 {
 715         struct iwl4965_priv *priv = (struct iwl4965_priv *)data;
 716
 717         queue_work(priv->workqueue, &priv->statistics_work);
 718 }
 719
 720 /**
 721  * iwl4965_bg_statistics_work - Send the statistics request to the hardware.
 722  *
 723  * This is queued by iwl4965_bg_statistics_periodic.
 724  */
 725 static void iwl4965_bg_statistics_work(struct work_struct *work)
 726 {
 727         struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
 728                                              statistics_work);
 729
 730         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 731                 return;
 732
 733         mutex_lock(&priv->mutex);
 734         iwl4965_send_statistics_request(priv);
 735         mutex_unlock(&priv->mutex);
 736 }
 737
 738 #define CT_LIMIT_CONST          259
 739 #define TM_CT_KILL_THRESHOLD    110
 740
 741 void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv)
 742 {
 743         struct iwl4965_ct_kill_config cmd;
 744         u32 R1, R2, R3;
 745         u32 temp_th;
 746         u32 crit_temperature;
 747         unsigned long flags;
 748         int rc = 0;
 749
 750         spin_lock_irqsave(&priv->lock, flags);
 751         iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 752                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
 753         spin_unlock_irqrestore(&priv->lock, flags);
 754
 755         if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) {
 756                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
 757                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
 758                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
 759         } else {
 760                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
 761                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
 762                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
 763         }
 764
 765         temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD);
 766
 767         crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
 768         cmd.critical_temperature_R =  cpu_to_le32(crit_temperature);
 769         rc = iwl4965_send_cmd_pdu(priv,
 770                               REPLY_CT_KILL_CONFIG_CMD, sizeof(cmd), &cmd);
 771         if (rc)
 772                 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
 773         else
 774                 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n");
 775 }
 776
 777 #ifdef CONFIG_IWL4965_SENSITIVITY
 778
 779 /* "false alarms" are signals that our DSP tries to lock onto,
 780  *   but then determines that they are either noise, or transmissions
 781  *   from a distant wireless network (also "noise", really) that get
 782  *   "stepped on" by stronger transmissions within our own network.
 783  * This algorithm attempts to set a sensitivity level that is high
 784  *   enough to receive all of our own network traffic, but not so
 785  *   high that our DSP gets too busy trying to lock onto non-network
 786  *   activity/noise. */
 787 static int iwl4965_sens_energy_cck(struct iwl4965_priv *priv,
 788                                    u32 norm_fa,
 789                                    u32 rx_enable_time,
 790                                    struct statistics_general_data *rx_info)
 791 {
 792         u32 max_nrg_cck = 0;
 793         int i = 0;
 794         u8 max_silence_rssi = 0;
 795         u32 silence_ref = 0;
 796         u8 silence_rssi_a = 0;
 797         u8 silence_rssi_b = 0;
 798         u8 silence_rssi_c = 0;
 799         u32 val;
 800
 801         /* "false_alarms" values below are cross-multiplications to assess the
 802          *   numbers of false alarms within the measured period of actual Rx
 803          *   (Rx is off when we're txing), vs the min/max expected false alarms
 804          *   (some should be expected if rx is sensitive enough) in a
 805          *   hypothetical listening period of 200 time units (TU), 204.8 msec:
 806          *
 807          * MIN_FA/fixed-time < false_alarms/actual-rx-time < MAX_FA/beacon-time
 808          *
 809          * */
 810         u32 false_alarms = norm_fa * 200 * 1024;
 811         u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;
 812         u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;
 813         struct iwl4965_sensitivity_data *data = NULL;
 814
 815         data = &(priv->sensitivity_data);
 816
 817         data->nrg_auto_corr_silence_diff = 0;
 818
 819         /* Find max silence rssi among all 3 receivers.
 820          * This is background noise, which may include transmissions from other
 821          *    networks, measured during silence before our network's beacon */
 822         silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a &
 823                             ALL_BAND_FILTER)>>8);
 824         silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b &
 825                             ALL_BAND_FILTER)>>8);
 826         silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c &
 827                             ALL_BAND_FILTER)>>8);
 828
 829         val = max(silence_rssi_b, silence_rssi_c);
 830         max_silence_rssi = max(silence_rssi_a, (u8) val);
 831
 832         /* Store silence rssi in 20-beacon history table */
 833         data->nrg_silence_rssi[data->nrg_silence_idx] = max_silence_rssi;
 834         data->nrg_silence_idx++;
 835         if (data->nrg_silence_idx >= NRG_NUM_PREV_STAT_L)
 836                 data->nrg_silence_idx = 0;
 837
 838         /* Find max silence rssi across 20 beacon history */
 839         for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) {
 840                 val = data->nrg_silence_rssi[i];
 841                 silence_ref = max(silence_ref, val);
 842         }
 843         IWL_DEBUG_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n",
 844                         silence_rssi_a, silence_rssi_b, silence_rssi_c,
 845                         silence_ref);
 846
 847         /* Find max rx energy (min value!) among all 3 receivers,
 848          *   measured during beacon frame.
 849          * Save it in 10-beacon history table. */
 850         i = data->nrg_energy_idx;
 851         val = min(rx_info->beacon_energy_b, rx_info->beacon_energy_c);
 852         data->nrg_value[i] = min(rx_info->beacon_energy_a, val);
 853
 854         data->nrg_energy_idx++;
 855         if (data->nrg_energy_idx >= 10)
 856                 data->nrg_energy_idx = 0;
 857
 858         /* Find min rx energy (max value) across 10 beacon history.
 859          * This is the minimum signal level that we want to receive well.
 860          * Add backoff (margin so we don't miss slightly lower energy frames).
 861          * This establishes an upper bound (min value) for energy threshold. */
 862         max_nrg_cck = data->nrg_value[0];
 863         for (i = 1; i < 10; i++)
 864                 max_nrg_cck = (u32) max(max_nrg_cck, (data->nrg_value[i]));
 865         max_nrg_cck += 6;
 866
 867         IWL_DEBUG_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n",
 868                         rx_info->beacon_energy_a, rx_info->beacon_energy_b,
 869                         rx_info->beacon_energy_c, max_nrg_cck - 6);
 870
 871         /* Count number of consecutive beacons with fewer-than-desired
 872          *   false alarms. */
 873         if (false_alarms < min_false_alarms)
 874                 data->num_in_cck_no_fa++;
 875         else
 876                 data->num_in_cck_no_fa = 0;
 877         IWL_DEBUG_CALIB("consecutive bcns with few false alarms = %u\n",
 878                         data->num_in_cck_no_fa);
 879
 880         /* If we got too many false alarms this time, reduce sensitivity */
 881         if (false_alarms > max_false_alarms) {
 882                 IWL_DEBUG_CALIB("norm FA %u > max FA %u\n",
 883                              false_alarms, max_false_alarms);
 884                 IWL_DEBUG_CALIB("... reducing sensitivity\n");
 885                 data->nrg_curr_state = IWL_FA_TOO_MANY;
 886
 887                 if (data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) {
 888                         /* Store for "fewer than desired" on later beacon */
 889                         data->nrg_silence_ref = silence_ref;
 890
 891                         /* increase energy threshold (reduce nrg value)
 892                          *   to decrease sensitivity */
 893                         if (data->nrg_th_cck > (NRG_MAX_CCK + NRG_STEP_CCK))
 894                                 data->nrg_th_cck = data->nrg_th_cck
 895                                                          - NRG_STEP_CCK;
 896                 }
 897
 898                 /* increase auto_corr values to decrease sensitivity */
 899                 if (data->auto_corr_cck < AUTO_CORR_MAX_TH_CCK)
 900                         data->auto_corr_cck = AUTO_CORR_MAX_TH_CCK + 1;
 901                 else {
 902                         val = data->auto_corr_cck + AUTO_CORR_STEP_CCK;
 903                         data->auto_corr_cck = min((u32)AUTO_CORR_MAX_CCK, val);
 904                 }
 905                 val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK;
 906                 data->auto_corr_cck_mrc = min((u32)AUTO_CORR_MAX_CCK_MRC, val);
 907
 908         /* Else if we got fewer than desired, increase sensitivity */
 909         } else if (false_alarms < min_false_alarms) {
 910                 data->nrg_curr_state = IWL_FA_TOO_FEW;
 911
 912                 /* Compare silence level with silence level for most recent
 913                  *   healthy number or too many false alarms */
 914                 data->nrg_auto_corr_silence_diff = (s32)data->nrg_silence_ref -
 915                                                    (s32)silence_ref;
 916
 917                 IWL_DEBUG_CALIB("norm FA %u < min FA %u, silence diff %d\n",
 918                          false_alarms, min_false_alarms,
 919                          data->nrg_auto_corr_silence_diff);
 920
 921                 /* Increase value to increase sensitivity, but only if:
 922                  * 1a) previous beacon did *not* have *too many* false alarms
 923                  * 1b) AND there's a significant difference in Rx levels
 924                  *      from a previous beacon with too many, or healthy # FAs
 925                  * OR 2) We've seen a lot of beacons (100) with too few
 926                  *       false alarms */
 927                 if ((data->nrg_prev_state != IWL_FA_TOO_MANY) &&
 928                         ((data->nrg_auto_corr_silence_diff > NRG_DIFF) ||
 929                         (data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA))) {
 930
 931                         IWL_DEBUG_CALIB("... increasing sensitivity\n");
 932                         /* Increase nrg value to increase sensitivity */
 933                         val = data->nrg_th_cck + NRG_STEP_CCK;
 934                         data->nrg_th_cck = min((u32)NRG_MIN_CCK, val);
 935
 936                         /* Decrease auto_corr values to increase sensitivity */
 937                         val = data->auto_corr_cck - AUTO_CORR_STEP_CCK;
 938                         data->auto_corr_cck = max((u32)AUTO_CORR_MIN_CCK, val);
 939
 940                         val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK;
 941                         data->auto_corr_cck_mrc =
 942                                          max((u32)AUTO_CORR_MIN_CCK_MRC, val);
 943
 944                 } else
 945                         IWL_DEBUG_CALIB("... but not changing sensitivity\n");
 946
 947         /* Else we got a healthy number of false alarms, keep status quo */
 948         } else {
 949                 IWL_DEBUG_CALIB(" FA in safe zone\n");
 950                 data->nrg_curr_state = IWL_FA_GOOD_RANGE;
 951
 952                 /* Store for use in "fewer than desired" with later beacon */
 953                 data->nrg_silence_ref = silence_ref;
 954
 955                 /* If previous beacon had too many false alarms,
 956                  *   give it some extra margin by reducing sensitivity again
 957                  *   (but don't go below measured energy of desired Rx) */
 958                 if (IWL_FA_TOO_MANY == data->nrg_prev_state) {
 959                         IWL_DEBUG_CALIB("... increasing margin\n");
 960                         data->nrg_th_cck -= NRG_MARGIN;
 961                 }
 962         }
 963
 964         /* Make sure the energy threshold does not go above the measured
 965          * energy of the desired Rx signals (reduced by backoff margin),
 966          * or else we might start missing Rx frames.
 967          * Lower value is higher energy, so we use max()!
 968          */
 969         data->nrg_th_cck = max(max_nrg_cck, data->nrg_th_cck);
 970         IWL_DEBUG_CALIB("new nrg_th_cck %u\n", data->nrg_th_cck);
 971
 972         data->nrg_prev_state = data->nrg_curr_state;
 973
 974         return 0;
 975 }
 976
 977
 978 static int iwl4965_sens_auto_corr_ofdm(struct iwl4965_priv *priv,
 979                                        u32 norm_fa,
 980                                        u32 rx_enable_time)
 981 {
 982         u32 val;
 983         u32 false_alarms = norm_fa * 200 * 1024;
 984         u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;
 985         u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;
 986         struct iwl4965_sensitivity_data *data = NULL;
 987
 988         data = &(priv->sensitivity_data);
 989
 990         /* If we got too many false alarms this time, reduce sensitivity */
 991         if (false_alarms > max_false_alarms) {
 992
 993                 IWL_DEBUG_CALIB("norm FA %u > max FA %u)\n",
 994                              false_alarms, max_false_alarms);
 995
 996                 val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM;
 997                 data->auto_corr_ofdm =
 998                                 min((u32)AUTO_CORR_MAX_OFDM, val);
 999
1000                 val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM;
1001                 data->auto_corr_ofdm_mrc =
1002                                 min((u32)AUTO_CORR_MAX_OFDM_MRC, val);
1003
1004                 val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM;
1005                 data->auto_corr_ofdm_x1 =
1006                                 min((u32)AUTO_CORR_MAX_OFDM_X1, val);
1007
1008                 val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM;
1009                 data->auto_corr_ofdm_mrc_x1 =
1010                                 min((u32)AUTO_CORR_MAX_OFDM_MRC_X1, val);
1011         }
1012
1013         /* Else if we got fewer than desired, increase sensitivity */
1014         else if (false_alarms < min_false_alarms) {
1015
1016                 IWL_DEBUG_CALIB("norm FA %u < min FA %u\n",
1017                              false_alarms, min_false_alarms);
1018
1019                 val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM;
1020                 data->auto_corr_ofdm =
1021                                 max((u32)AUTO_CORR_MIN_OFDM, val);
1022
1023                 val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM;
1024                 data->auto_corr_ofdm_mrc =
1025                                 max((u32)AUTO_CORR_MIN_OFDM_MRC, val);
1026
1027                 val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM;
1028                 data->auto_corr_ofdm_x1 =
1029                                 max((u32)AUTO_CORR_MIN_OFDM_X1, val);
1030
1031                 val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM;
1032                 data->auto_corr_ofdm_mrc_x1 =
1033                                 max((u32)AUTO_CORR_MIN_OFDM_MRC_X1, val);
1034         }
1035
1036         else
1037                 IWL_DEBUG_CALIB("min FA %u < norm FA %u < max FA %u OK\n",
1038                          min_false_alarms, false_alarms, max_false_alarms);
1039
1040         return 0;
1041 }
1042
1043 static int iwl4965_sensitivity_callback(struct iwl4965_priv *priv,
1044                                     struct iwl4965_cmd *cmd, struct sk_buff *skb)
1045 {
1046         /* We didn't cache the SKB; let the caller free it */
1047         return 1;
1048 }
1049
1050 /* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
1051 static int iwl4965_sensitivity_write(struct iwl4965_priv *priv, u8 flags)
1052 {
1053         int rc = 0;
1054         struct iwl4965_sensitivity_cmd cmd ;
1055         struct iwl4965_sensitivity_data *data = NULL;
1056         struct iwl4965_host_cmd cmd_out = {
1057                 .id = SENSITIVITY_CMD,
1058                 .len = sizeof(struct iwl4965_sensitivity_cmd),
1059                 .meta.flags = flags,
1060                 .data = &cmd,
1061         };
1062
1063         data = &(priv->sensitivity_data);
1064
1065         memset(&cmd, 0, sizeof(cmd));
1066
1067         cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX] =
1068                                 cpu_to_le16((u16)data->auto_corr_ofdm);
1069         cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX] =
1070                                 cpu_to_le16((u16)data->auto_corr_ofdm_mrc);
1071         cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX] =
1072                                 cpu_to_le16((u16)data->auto_corr_ofdm_x1);
1073         cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX] =
1074                                 cpu_to_le16((u16)data->auto_corr_ofdm_mrc_x1);
1075
1076         cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX] =
1077                                 cpu_to_le16((u16)data->auto_corr_cck);
1078         cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX] =
1079                                 cpu_to_le16((u16)data->auto_corr_cck_mrc);
1080
1081         cmd.table[HD_MIN_ENERGY_CCK_DET_INDEX] =
1082                                 cpu_to_le16((u16)data->nrg_th_cck);
1083         cmd.table[HD_MIN_ENERGY_OFDM_DET_INDEX] =
1084                                 cpu_to_le16((u16)data->nrg_th_ofdm);
1085
1086         cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] =
1087                                 __constant_cpu_to_le16(190);
1088         cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] =
1089                                 __constant_cpu_to_le16(390);
1090         cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] =
1091                                 __constant_cpu_to_le16(62);
1092
1093         IWL_DEBUG_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n",
1094                         data->auto_corr_ofdm, data->auto_corr_ofdm_mrc,
1095                         data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1,
1096                         data->nrg_th_ofdm);
1097
1098         IWL_DEBUG_CALIB("cck: ac %u mrc %u thresh %u\n",
1099                         data->auto_corr_cck, data->auto_corr_cck_mrc,
1100                         data->nrg_th_cck);
1101
1102         /* Update uCode's "work" table, and copy it to DSP */
1103         cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE;
1104
1105         if (flags & CMD_ASYNC)
1106                 cmd_out.meta.u.callback = iwl4965_sensitivity_callback;
1107
1108         /* Don't send command to uCode if nothing has changed */
1109         if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]),
1110                     sizeof(u16)*HD_TABLE_SIZE)) {
1111                 IWL_DEBUG_CALIB("No change in SENSITIVITY_CMD\n");
1112                 return 0;
1113         }
1114
1115         /* Copy table for comparison next time */
1116         memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
1117                sizeof(u16)*HD_TABLE_SIZE);
1118
1119         rc = iwl4965_send_cmd(priv, &cmd_out);
1120         if (!rc) {
1121                 IWL_DEBUG_CALIB("SENSITIVITY_CMD succeeded\n");
1122                 return rc;
1123         }
1124
1125         return 0;
1126 }
1127
1128 void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags, u8 force)
1129 {
1130         int rc = 0;
1131         int i;
1132         struct iwl4965_sensitivity_data *data = NULL;
1133
1134         IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n");
1135
1136         if (force)
1137                 memset(&(priv->sensitivity_tbl[0]), 0,
1138                         sizeof(u16)*HD_TABLE_SIZE);
1139
1140         /* Clear driver's sensitivity algo data */
1141         data = &(priv->sensitivity_data);
1142         memset(data, 0, sizeof(struct iwl4965_sensitivity_data));
1143
1144         data->num_in_cck_no_fa = 0;
1145         data->nrg_curr_state = IWL_FA_TOO_MANY;
1146         data->nrg_prev_state = IWL_FA_TOO_MANY;
1147         data->nrg_silence_ref = 0;
1148         data->nrg_silence_idx = 0;
1149         data->nrg_energy_idx = 0;
1150
1151         for (i = 0; i < 10; i++)
1152                 data->nrg_value[i] = 0;
1153
1154         for (i = 0; i < NRG_NUM_PREV_STAT_L; i++)
1155                 data->nrg_silence_rssi[i] = 0;
1156
1157         data->auto_corr_ofdm = 90;
1158         data->auto_corr_ofdm_mrc = 170;
1159         data->auto_corr_ofdm_x1  = 105;
1160         data->auto_corr_ofdm_mrc_x1 = 220;
1161         data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF;
1162         data->auto_corr_cck_mrc = 200;
1163         data->nrg_th_cck = 100;
1164         data->nrg_th_ofdm = 100;
1165
1166         data->last_bad_plcp_cnt_ofdm = 0;
1167         data->last_fa_cnt_ofdm = 0;
1168         data->last_bad_plcp_cnt_cck = 0;
1169         data->last_fa_cnt_cck = 0;
1170
1171         /* Clear prior Sensitivity command data to force send to uCode */
1172         if (force)
1173                 memset(&(priv->sensitivity_tbl[0]), 0,
1174                     sizeof(u16)*HD_TABLE_SIZE);
1175
1176         rc |= iwl4965_sensitivity_write(priv, flags);
1177         IWL_DEBUG_CALIB("<<return 0x%X\n", rc);
1178
1179         return;
1180 }
1181
1182
1183 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
1184  * Called after every association, but this runs only once!
1185  *  ... once chain noise is calibrated the first time, it's good forever.  */
1186 void iwl4965_chain_noise_reset(struct iwl4965_priv *priv)
1187 {
1188         struct iwl4965_chain_noise_data *data = NULL;
1189         int rc = 0;
1190
1191         data = &(priv->chain_noise_data);
1192         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl4965_is_associated(priv)) {
1193                 struct iwl4965_calibration_cmd cmd;
1194
1195                 memset(&cmd, 0, sizeof(cmd));
1196                 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1197                 cmd.diff_gain_a = 0;
1198                 cmd.diff_gain_b = 0;
1199                 cmd.diff_gain_c = 0;
1200                 rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1201                                  sizeof(cmd), &cmd);
1202                 msleep(4);
1203                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
1204                 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
1205         }
1206         return;
1207 }
1208
1209 /*
1210  * Accumulate 20 beacons of signal and noise statistics for each of
1211  *   3 receivers/antennas/rx-chains, then figure out:
1212  * 1)  Which antennas are connected.
1213  * 2)  Differential rx gain settings to balance the 3 receivers.
1214  */
1215 static void iwl4965_noise_calibration(struct iwl4965_priv *priv,
1216                                       struct iwl4965_notif_statistics *stat_resp)
1217 {
1218         struct iwl4965_chain_noise_data *data = NULL;
1219         int rc = 0;
1220
1221         u32 chain_noise_a;
1222         u32 chain_noise_b;
1223         u32 chain_noise_c;
1224         u32 chain_sig_a;
1225         u32 chain_sig_b;
1226         u32 chain_sig_c;
1227         u32 average_sig[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1228         u32 average_noise[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1229         u32 max_average_sig;
1230         u16 max_average_sig_antenna_i;
1231         u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE;
1232         u16 min_average_noise_antenna_i = INITIALIZATION_VALUE;
1233         u16 i = 0;
1234         u16 chan_num = INITIALIZATION_VALUE;
1235         u32 band = INITIALIZATION_VALUE;
1236         u32 active_chains = 0;
1237         unsigned long flags;
1238         struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general);
1239
1240         data = &(priv->chain_noise_data);
1241
1242         /* Accumulate just the first 20 beacons after the first association,
1243          *   then we're done forever. */
1244         if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) {
1245                 if (data->state == IWL_CHAIN_NOISE_ALIVE)
1246                         IWL_DEBUG_CALIB("Wait for noise calib reset\n");
1247                 return;
1248         }
1249
1250         spin_lock_irqsave(&priv->lock, flags);
1251         if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1252                 IWL_DEBUG_CALIB(" << Interference data unavailable\n");
1253                 spin_unlock_irqrestore(&priv->lock, flags);
1254                 return;
1255         }
1256
1257         band = (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) ? 0 : 1;
1258         chan_num = le16_to_cpu(priv->staging_rxon.channel);
1259
1260         /* Make sure we accumulate data for just the associated channel
1261          *   (even if scanning). */
1262         if ((chan_num != (le32_to_cpu(stat_resp->flag) >> 16)) ||
1263             ((STATISTICS_REPLY_FLG_BAND_24G_MSK ==
1264              (stat_resp->flag & STATISTICS_REPLY_FLG_BAND_24G_MSK)) && band)) {
1265                 IWL_DEBUG_CALIB("Stats not from chan=%d, band=%d\n",
1266                                 chan_num, band);
1267                 spin_unlock_irqrestore(&priv->lock, flags);
1268                 return;
1269         }
1270
1271         /* Accumulate beacon statistics values across 20 beacons */
1272         chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) &
1273                                 IN_BAND_FILTER;
1274         chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) &
1275                                 IN_BAND_FILTER;
1276         chain_noise_c = le32_to_cpu(rx_info->beacon_silence_rssi_c) &
1277                                 IN_BAND_FILTER;
1278
1279         chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER;
1280         chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER;
1281         chain_sig_c = le32_to_cpu(rx_info->beacon_rssi_c) & IN_BAND_FILTER;
1282
1283         spin_unlock_irqrestore(&priv->lock, flags);
1284
1285         data->beacon_count++;
1286
1287         data->chain_noise_a = (chain_noise_a + data->chain_noise_a);
1288         data->chain_noise_b = (chain_noise_b + data->chain_noise_b);
1289         data->chain_noise_c = (chain_noise_c + data->chain_noise_c);
1290
1291         data->chain_signal_a = (chain_sig_a + data->chain_signal_a);
1292         data->chain_signal_b = (chain_sig_b + data->chain_signal_b);
1293         data->chain_signal_c = (chain_sig_c + data->chain_signal_c);
1294
1295         IWL_DEBUG_CALIB("chan=%d, band=%d, beacon=%d\n", chan_num, band,
1296                         data->beacon_count);
1297         IWL_DEBUG_CALIB("chain_sig: a %d b %d c %d\n",
1298                         chain_sig_a, chain_sig_b, chain_sig_c);
1299         IWL_DEBUG_CALIB("chain_noise: a %d b %d c %d\n",
1300                         chain_noise_a, chain_noise_b, chain_noise_c);
1301
1302         /* If this is the 20th beacon, determine:
1303          * 1)  Disconnected antennas (using signal strengths)
1304          * 2)  Differential gain (using silence noise) to balance receivers */
1305         if (data->beacon_count == CAL_NUM_OF_BEACONS) {
1306
1307                 /* Analyze signal for disconnected antenna */
1308                 average_sig[0] = (data->chain_signal_a) / CAL_NUM_OF_BEACONS;
1309                 average_sig[1] = (data->chain_signal_b) / CAL_NUM_OF_BEACONS;
1310                 average_sig[2] = (data->chain_signal_c) / CAL_NUM_OF_BEACONS;
1311
1312                 if (average_sig[0] >= average_sig[1]) {
1313                         max_average_sig = average_sig[0];
1314                         max_average_sig_antenna_i = 0;
1315                         active_chains = (1 << max_average_sig_antenna_i);
1316                 } else {
1317                         max_average_sig = average_sig[1];
1318                         max_average_sig_antenna_i = 1;
1319                         active_chains = (1 << max_average_sig_antenna_i);
1320                 }
1321
1322                 if (average_sig[2] >= max_average_sig) {
1323                         max_average_sig = average_sig[2];
1324                         max_average_sig_antenna_i = 2;
1325                         active_chains = (1 << max_average_sig_antenna_i);
1326                 }
1327
1328                 IWL_DEBUG_CALIB("average_sig: a %d b %d c %d\n",
1329                              average_sig[0], average_sig[1], average_sig[2]);
1330                 IWL_DEBUG_CALIB("max_average_sig = %d, antenna %d\n",
1331                              max_average_sig, max_average_sig_antenna_i);
1332
1333                 /* Compare signal strengths for all 3 receivers. */
1334                 for (i = 0; i < NUM_RX_CHAINS; i++) {
1335                         if (i != max_average_sig_antenna_i) {
1336                                 s32 rssi_delta = (max_average_sig -
1337                                                   average_sig[i]);
1338
1339                                 /* If signal is very weak, compared with
1340                                  * strongest, mark it as disconnected. */
1341                                 if (rssi_delta > MAXIMUM_ALLOWED_PATHLOSS)
1342                                         data->disconn_array[i] = 1;
1343                                 else
1344                                         active_chains |= (1 << i);
1345                         IWL_DEBUG_CALIB("i = %d  rssiDelta = %d  "
1346                                      "disconn_array[i] = %d\n",
1347                                      i, rssi_delta, data->disconn_array[i]);
1348                         }
1349                 }
1350
1351                 /*If both chains A & B are disconnected -
1352                  * connect B and leave A as is */
1353                 if (data->disconn_array[CHAIN_A] &&
1354                     data->disconn_array[CHAIN_B]) {
1355                         data->disconn_array[CHAIN_B] = 0;
1356                         active_chains |= (1 << CHAIN_B);
1357                         IWL_DEBUG_CALIB("both A & B chains are disconnected! "
1358                                      "W/A - declare B as connected\n");
1359                 }
1360
1361                 IWL_DEBUG_CALIB("active_chains (bitwise) = 0x%x\n",
1362                                 active_chains);
1363
1364                 /* Save for use within RXON, TX, SCAN commands, etc. */
1365                 priv->valid_antenna = active_chains;
1366
1367                 /* Analyze noise for rx balance */
1368                 average_noise[0] = ((data->chain_noise_a)/CAL_NUM_OF_BEACONS);
1369                 average_noise[1] = ((data->chain_noise_b)/CAL_NUM_OF_BEACONS);
1370                 average_noise[2] = ((data->chain_noise_c)/CAL_NUM_OF_BEACONS);
1371
1372                 for (i = 0; i < NUM_RX_CHAINS; i++) {
1373                         if (!(data->disconn_array[i]) &&
1374                            (average_noise[i] <= min_average_noise)) {
1375                                 /* This means that chain i is active and has
1376                                  * lower noise values so far: */
1377                                 min_average_noise = average_noise[i];
1378                                 min_average_noise_antenna_i = i;
1379                         }
1380                 }
1381
1382                 data->delta_gain_code[min_average_noise_antenna_i] = 0;
1383
1384                 IWL_DEBUG_CALIB("average_noise: a %d b %d c %d\n",
1385                                 average_noise[0], average_noise[1],
1386                                 average_noise[2]);
1387
1388                 IWL_DEBUG_CALIB("min_average_noise = %d, antenna %d\n",
1389                                 min_average_noise, min_average_noise_antenna_i);
1390
1391                 for (i = 0; i < NUM_RX_CHAINS; i++) {
1392                         s32 delta_g = 0;
1393
1394                         if (!(data->disconn_array[i]) &&
1395                             (data->delta_gain_code[i] ==
1396                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
1397                                 delta_g = average_noise[i] - min_average_noise;
1398                                 data->delta_gain_code[i] = (u8)((delta_g *
1399                                                                     10) / 15);
1400                                 if (CHAIN_NOISE_MAX_DELTA_GAIN_CODE <
1401                                    data->delta_gain_code[i])
1402                                         data->delta_gain_code[i] =
1403                                           CHAIN_NOISE_MAX_DELTA_GAIN_CODE;
1404
1405                                 data->delta_gain_code[i] =
1406                                         (data->delta_gain_code[i] | (1 << 2));
1407                         } else
1408                                 data->delta_gain_code[i] = 0;
1409                 }
1410                 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
1411                              data->delta_gain_code[0],
1412                              data->delta_gain_code[1],
1413                              data->delta_gain_code[2]);
1414
1415                 /* Differential gain gets sent to uCode only once */
1416                 if (!data->radio_write) {
1417                         struct iwl4965_calibration_cmd cmd;
1418                         data->radio_write = 1;
1419
1420                         memset(&cmd, 0, sizeof(cmd));
1421                         cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1422                         cmd.diff_gain_a = data->delta_gain_code[0];
1423                         cmd.diff_gain_b = data->delta_gain_code[1];
1424                         cmd.diff_gain_c = data->delta_gain_code[2];
1425                         rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1426                                               sizeof(cmd), &cmd);
1427                         if (rc)
1428                                 IWL_DEBUG_CALIB("fail sending cmd "
1429                                              "REPLY_PHY_CALIBRATION_CMD \n");
1430
1431                         /* TODO we might want recalculate
1432                          * rx_chain in rxon cmd */
1433
1434                         /* Mark so we run this algo only once! */
1435                         data->state = IWL_CHAIN_NOISE_CALIBRATED;
1436                 }
1437                 data->chain_noise_a = 0;
1438                 data->chain_noise_b = 0;
1439                 data->chain_noise_c = 0;
1440                 data->chain_signal_a = 0;
1441                 data->chain_signal_b = 0;
1442                 data->chain_signal_c = 0;
1443                 data->beacon_count = 0;
1444         }
1445         return;
1446 }
1447
1448 static void iwl4965_sensitivity_calibration(struct iwl4965_priv *priv,
1449                                             struct iwl4965_notif_statistics *resp)
1450 {
1451         int rc = 0;
1452         u32 rx_enable_time;
1453         u32 fa_cck;
1454         u32 fa_ofdm;
1455         u32 bad_plcp_cck;
1456         u32 bad_plcp_ofdm;
1457         u32 norm_fa_ofdm;
1458         u32 norm_fa_cck;
1459         struct iwl4965_sensitivity_data *data = NULL;
1460         struct statistics_rx_non_phy *rx_info = &(resp->rx.general);
1461         struct statistics_rx *statistics = &(resp->rx);
1462         unsigned long flags;
1463         struct statistics_general_data statis;
1464
1465         data = &(priv->sensitivity_data);
1466
1467         if (!iwl4965_is_associated(priv)) {
1468                 IWL_DEBUG_CALIB("<< - not associated\n");
1469                 return;
1470         }
1471
1472         spin_lock_irqsave(&priv->lock, flags);
1473         if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1474                 IWL_DEBUG_CALIB("<< invalid data.\n");
1475                 spin_unlock_irqrestore(&priv->lock, flags);
1476                 return;
1477         }
1478
1479         /* Extract Statistics: */
1480         rx_enable_time = le32_to_cpu(rx_info->channel_load);
1481         fa_cck = le32_to_cpu(statistics->cck.false_alarm_cnt);
1482         fa_ofdm = le32_to_cpu(statistics->ofdm.false_alarm_cnt);
1483         bad_plcp_cck = le32_to_cpu(statistics->cck.plcp_err);
1484         bad_plcp_ofdm = le32_to_cpu(statistics->ofdm.plcp_err);
1485
1486         statis.beacon_silence_rssi_a =
1487                         le32_to_cpu(statistics->general.beacon_silence_rssi_a);
1488         statis.beacon_silence_rssi_b =
1489                         le32_to_cpu(statistics->general.beacon_silence_rssi_b);
1490         statis.beacon_silence_rssi_c =
1491                         le32_to_cpu(statistics->general.beacon_silence_rssi_c);
1492         statis.beacon_energy_a =
1493                         le32_to_cpu(statistics->general.beacon_energy_a);
1494         statis.beacon_energy_b =
1495                         le32_to_cpu(statistics->general.beacon_energy_b);
1496         statis.beacon_energy_c =
1497                         le32_to_cpu(statistics->general.beacon_energy_c);
1498
1499         spin_unlock_irqrestore(&priv->lock, flags);
1500
1501         IWL_DEBUG_CALIB("rx_enable_time = %u usecs\n", rx_enable_time);
1502
1503         if (!rx_enable_time) {
1504                 IWL_DEBUG_CALIB("<< RX Enable Time == 0! \n");
1505                 return;
1506         }
1507
1508         /* These statistics increase monotonically, and do not reset
1509          *   at each beacon.  Calculate difference from last value, or just
1510          *   use the new statistics value if it has reset or wrapped around. */
1511         if (data->last_bad_plcp_cnt_cck > bad_plcp_cck)
1512                 data->last_bad_plcp_cnt_cck = bad_plcp_cck;
1513         else {
1514                 bad_plcp_cck -= data->last_bad_plcp_cnt_cck;
1515                 data->last_bad_plcp_cnt_cck += bad_plcp_cck;
1516         }
1517
1518         if (data->last_bad_plcp_cnt_ofdm > bad_plcp_ofdm)
1519                 data->last_bad_plcp_cnt_ofdm = bad_plcp_ofdm;
1520         else {
1521                 bad_plcp_ofdm -= data->last_bad_plcp_cnt_ofdm;
1522                 data->last_bad_plcp_cnt_ofdm += bad_plcp_ofdm;
1523         }
1524
1525         if (data->last_fa_cnt_ofdm > fa_ofdm)
1526                 data->last_fa_cnt_ofdm = fa_ofdm;
1527         else {
1528                 fa_ofdm -= data->last_fa_cnt_ofdm;
1529                 data->last_fa_cnt_ofdm += fa_ofdm;
1530         }
1531
1532         if (data->last_fa_cnt_cck > fa_cck)
1533                 data->last_fa_cnt_cck = fa_cck;
1534         else {
1535                 fa_cck -= data->last_fa_cnt_cck;
1536                 data->last_fa_cnt_cck += fa_cck;
1537         }
1538
1539         /* Total aborted signal locks */
1540         norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm;
1541         norm_fa_cck = fa_cck + bad_plcp_cck;
1542
1543         IWL_DEBUG_CALIB("cck: fa %u badp %u  ofdm: fa %u badp %u\n", fa_cck,
1544                         bad_plcp_cck, fa_ofdm, bad_plcp_ofdm);
1545
1546         iwl4965_sens_auto_corr_ofdm(priv, norm_fa_ofdm, rx_enable_time);
1547         iwl4965_sens_energy_cck(priv, norm_fa_cck, rx_enable_time, &statis);
1548         rc |= iwl4965_sensitivity_write(priv, CMD_ASYNC);
1549
1550         return;
1551 }
1552
1553 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
1554 {
1555         struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
1556                         sensitivity_work);
1557
1558         mutex_lock(&priv->mutex);
1559
1560         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1561             test_bit(STATUS_SCANNING, &priv->status)) {
1562                 mutex_unlock(&priv->mutex);
1563                 return;
1564         }
1565
1566         if (priv->start_calib) {
1567                 iwl4965_noise_calibration(priv, &priv->statistics);
1568
1569                 if (priv->sensitivity_data.state ==
1570                                         IWL_SENS_CALIB_NEED_REINIT) {
1571                         iwl4965_init_sensitivity(priv, CMD_ASYNC, 0);
1572                         priv->sensitivity_data.state = IWL_SENS_CALIB_ALLOWED;
1573                 } else
1574                         iwl4965_sensitivity_calibration(priv,
1575                                         &priv->statistics);
1576         }
1577
1578         mutex_unlock(&priv->mutex);
1579         return;
1580 }
1581 #endif /*CONFIG_IWL4965_SENSITIVITY*/
1582
1583 static void iwl4965_bg_txpower_work(struct work_struct *work)
1584 {
1585         struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv,
1586                         txpower_work);
1587
1588         /* If a scan happened to start before we got here
1589          * then just return; the statistics notification will
1590          * kick off another scheduled work to compensate for
1591          * any temperature delta we missed here. */
1592         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1593             test_bit(STATUS_SCANNING, &priv->status))
1594                 return;
1595
1596         mutex_lock(&priv->mutex);
1597
1598         /* Regardless of if we are assocaited, we must reconfigure the
1599          * TX power since frames can be sent on non-radar channels while
1600          * not associated */
1601         iwl4965_hw_reg_send_txpower(priv);
1602
1603         /* Update last_temperature to keep is_calib_needed from running
1604          * when it isn't needed... */
1605         priv->last_temperature = priv->temperature;
1606
1607         mutex_unlock(&priv->mutex);
1608 }
1609
1610 /*
1611  * Acquire priv->lock before calling this function !
1612  */
1613 static void iwl4965_set_wr_ptrs(struct iwl4965_priv *priv, int txq_id, u32 index)
1614 {
1615         iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
1616                              (index & 0xff) | (txq_id << 8));
1617         iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
1618 }
1619
1620 /**
1621  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
1622  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
1623  * @scd_retry: (1) Indicates queue will be used in aggregation mode
1624  *
1625  * NOTE:  Acquire priv->lock before calling this function !
1626  */
1627 static void iwl4965_tx_queue_set_status(struct iwl4965_priv *priv,
1628                                         struct iwl4965_tx_queue *txq,
1629                                         int tx_fifo_id, int scd_retry)
1630 {
1631         int txq_id = txq->q.id;
1632
1633         /* Find out whether to activate Tx queue */
1634         int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
1635
1636         /* Set up and activate */
1637         iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
1638                                  (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
1639                                  (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
1640                                  (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
1641                                  (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
1642                                  SCD_QUEUE_STTS_REG_MSK);
1643
1644         txq->sched_retry = scd_retry;
1645
1646         IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
1647                        active ? "Activate" : "Deactivate",
1648                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
1649 }
1650
1651 static const u16 default_queue_to_tx_fifo[] = {
1652         IWL_TX_FIFO_AC3,
1653         IWL_TX_FIFO_AC2,
1654         IWL_TX_FIFO_AC1,
1655         IWL_TX_FIFO_AC0,
1656         IWL_CMD_FIFO_NUM,
1657         IWL_TX_FIFO_HCCA_1,
1658         IWL_TX_FIFO_HCCA_2
1659 };
1660
1661 static inline void iwl4965_txq_ctx_activate(struct iwl4965_priv *priv, int txq_id)
1662 {
1663         set_bit(txq_id, &priv->txq_ctx_active_msk);
1664 }
1665
1666 static inline void iwl4965_txq_ctx_deactivate(struct iwl4965_priv *priv, int txq_id)
1667 {
1668         clear_bit(txq_id, &priv->txq_ctx_active_msk);
1669 }
1670
1671 int iwl4965_alive_notify(struct iwl4965_priv *priv)
1672 {
1673         u32 a;
1674         int i = 0;
1675         unsigned long flags;
1676         int rc;
1677
1678         spin_lock_irqsave(&priv->lock, flags);
1679
1680 #ifdef CONFIG_IWL4965_SENSITIVITY
1681         memset(&(priv->sensitivity_data), 0,
1682                sizeof(struct iwl4965_sensitivity_data));
1683         memset(&(priv->chain_noise_data), 0,
1684                sizeof(struct iwl4965_chain_noise_data));
1685         for (i = 0; i < NUM_RX_CHAINS; i++)
1686                 priv->chain_noise_data.delta_gain_code[i] =
1687                                 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
1688 #endif /* CONFIG_IWL4965_SENSITIVITY*/
1689         rc = iwl4965_grab_nic_access(priv);
1690         if (rc) {
1691                 spin_unlock_irqrestore(&priv->lock, flags);
1692                 return rc;
1693         }
1694
1695         /* Clear 4965's internal Tx Scheduler data base */
1696         priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
1697         a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
1698         for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1699                 iwl4965_write_targ_mem(priv, a, 0);
1700         for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
1701                 iwl4965_write_targ_mem(priv, a, 0);
1702         for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
1703                 iwl4965_write_targ_mem(priv, a, 0);
1704
1705         /* Tel 4965 where to find Tx byte count tables */
1706         iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
1707                 (priv->hw_setting.shared_phys +
1708                  offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
1709
1710         /* Disable chain mode for all queues */
1711         iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
1712
1713         /* Initialize each Tx queue (including the command queue) */
1714         for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
1715
1716                 /* TFD circular buffer read/write indexes */
1717                 iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
1718                 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
1719
1720                 /* Max Tx Window size for Scheduler-ACK mode */
1721                 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
1722                                         SCD_CONTEXT_QUEUE_OFFSET(i),
1723                                         (SCD_WIN_SIZE <<
1724                                         SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1725                                         SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1726
1727                 /* Frame limit */
1728                 iwl4965_write_targ_mem(priv, priv->scd_base_addr +
1729                                         SCD_CONTEXT_QUEUE_OFFSET(i) +
1730                                         sizeof(u32),
1731                                         (SCD_FRAME_LIMIT <<
1732                                         SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
1733                                         SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1734
1735         }
1736         iwl4965_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
1737                                  (1 << priv->hw_setting.max_txq_num) - 1);
1738
1739         /* Activate all Tx DMA/FIFO channels */
1740         iwl4965_write_prph(priv, KDR_SCD_TXFACT,
1741                                  SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
1742
1743         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
1744
1745         /* Map each Tx/cmd queue to its corresponding fifo */
1746         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
1747                 int ac = default_queue_to_tx_fifo[i];
1748                 iwl4965_txq_ctx_activate(priv, i);
1749                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1750         }
1751
1752         iwl4965_release_nic_access(priv);
1753         spin_unlock_irqrestore(&priv->lock, flags);
1754
1755         return 0;
1756 }
1757
1758 /**
1759  * iwl4965_hw_set_hw_setting
1760  *
1761  * Called when initializing driver
1762  */
1763 int iwl4965_hw_set_hw_setting(struct iwl4965_priv *priv)
1764 {
1765         /* Allocate area for Tx byte count tables and Rx queue status */
1766         priv->hw_setting.shared_virt =
1767             pci_alloc_consistent(priv->pci_dev,
1768                                  sizeof(struct iwl4965_shared),
1769                                  &priv->hw_setting.shared_phys);
1770
1771         if (!priv->hw_setting.shared_virt)
1772                 return -1;
1773
1774         memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl4965_shared));
1775
1776         priv->hw_setting.max_txq_num = iwl4965_param_queues_num;
1777         priv->hw_setting.ac_queue_count = AC_NUM;
1778         priv->hw_setting.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
1779         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
1780         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
1781         if (iwl4965_param_amsdu_size_8K)
1782                 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1783         else
1784                 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1785         priv->hw_setting.max_pkt_size = priv->hw_setting.rx_buf_size - 256;
1786         priv->hw_setting.max_stations = IWL4965_STATION_COUNT;
1787         priv->hw_setting.bcast_sta_id = IWL4965_BROADCAST_ID;
1788         return 0;
1789 }
1790
1791 /**
1792  * iwl4965_hw_txq_ctx_free - Free TXQ Context
1793  *
1794  * Destroy all TX DMA queues and structures
1795  */
1796 void iwl4965_hw_txq_ctx_free(struct iwl4965_priv *priv)
1797 {
1798         int txq_id;
1799
1800         /* Tx queues */
1801         for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
1802                 iwl4965_tx_queue_free(priv, &priv->txq[txq_id]);
1803
1804         /* Keep-warm buffer */
1805         iwl4965_kw_free(priv);
1806 }
1807
1808 /**
1809  * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
1810  *
1811  * Does NOT advance any TFD circular buffer read/write indexes
1812  * Does NOT free the TFD itself (which is within circular buffer)
1813  */
1814 int iwl4965_hw_txq_free_tfd(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
1815 {
1816         struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0];
1817         struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
1818         struct pci_dev *dev = priv->pci_dev;
1819         int i;
1820         int counter = 0;
1821         int index, is_odd;
1822
1823         /* Host command buffers stay mapped in memory, nothing to clean */
1824         if (txq->q.id == IWL_CMD_QUEUE_NUM)
1825                 return 0;
1826
1827         /* Sanity check on number of chunks */
1828         counter = IWL_GET_BITS(*bd, num_tbs);
1829         if (counter > MAX_NUM_OF_TBS) {
1830                 IWL_ERROR("Too many chunks: %i\n", counter);
1831                 /* @todo issue fatal error, it is quite serious situation */
1832                 return 0;
1833         }
1834
1835         /* Unmap chunks, if any.
1836          * TFD info for odd chunks is different format than for even chunks. */
1837         for (i = 0; i < counter; i++) {
1838                 index = i / 2;
1839                 is_odd = i & 0x1;
1840
1841                 if (is_odd)
1842                         pci_unmap_single(
1843                                 dev,
1844                                 IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
1845                                 (IWL_GET_BITS(bd->pa[index],
1846                                               tb2_addr_hi20) << 16),
1847                                 IWL_GET_BITS(bd->pa[index], tb2_len),
1848                                 PCI_DMA_TODEVICE);
1849
1850                 else if (i > 0)
1851                         pci_unmap_single(dev,
1852                                          le32_to_cpu(bd->pa[index].tb1_addr),
1853                                          IWL_GET_BITS(bd->pa[index], tb1_len),
1854                                          PCI_DMA_TODEVICE);
1855
1856                 /* Free SKB, if any, for this chunk */
1857                 if (txq->txb[txq->q.read_ptr].skb[i]) {
1858                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i];
1859
1860                         dev_kfree_skb(skb);
1861                         txq->txb[txq->q.read_ptr].skb[i] = NULL;
1862                 }
1863         }
1864         return 0;
1865 }
1866
1867 int iwl4965_hw_reg_set_txpower(struct iwl4965_priv *priv, s8 power)
1868 {
1869         IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
1870         return -EINVAL;
1871 }
1872
1873 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1874 {
1875         s32 sign = 1;
1876
1877         if (num < 0) {
1878                 sign = -sign;
1879                 num = -num;
1880         }
1881         if (denom < 0) {
1882                 sign = -sign;
1883                 denom = -denom;
1884         }
1885         *res = 1;
1886         *res = ((num * 2 + denom) / (denom * 2)) * sign;
1887
1888         return 1;
1889 }
1890
1891 /**
1892  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1893  *
1894  * Determines power supply voltage compensation for txpower calculations.
1895  * Returns number of 1/2-dB steps to subtract from gain table index,
1896  * to compensate for difference between power supply voltage during
1897  * factory measurements, vs. current power supply voltage.
1898  *
1899  * Voltage indication is higher for lower voltage.
1900  * Lower voltage requires more gain (lower gain table index).
1901  */
1902 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1903                                             s32 current_voltage)
1904 {
1905         s32 comp = 0;
1906
1907         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1908             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1909                 return 0;
1910
1911         iwl4965_math_div_round(current_voltage - eeprom_voltage,
1912                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1913
1914         if (current_voltage > eeprom_voltage)
1915                 comp *= 2;
1916         if ((comp < -2) || (comp > 2))
1917                 comp = 0;
1918
1919         return comp;
1920 }
1921
1922 static const struct iwl4965_channel_info *
1923 iwl4965_get_channel_txpower_info(struct iwl4965_priv *priv, u8 phymode, u16 channel)
1924 {
1925         const struct iwl4965_channel_info *ch_info;
1926
1927         ch_info = iwl4965_get_channel_info(priv, phymode, channel);
1928
1929         if (!is_channel_valid(ch_info))
1930                 return NULL;
1931
1932         return ch_info;
1933 }
1934
1935 static s32 iwl4965_get_tx_atten_grp(u16 channel)
1936 {
1937         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1938             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1939                 return CALIB_CH_GROUP_5;
1940
1941         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1942             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1943                 return CALIB_CH_GROUP_1;
1944
1945         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1946             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1947                 return CALIB_CH_GROUP_2;
1948
1949         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1950             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1951                 return CALIB_CH_GROUP_3;
1952
1953         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1954             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1955                 return CALIB_CH_GROUP_4;
1956
1957         IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1958         return -1;
1959 }
1960
1961 static u32 iwl4965_get_sub_band(const struct iwl4965_priv *priv, u32 channel)
1962 {
1963         s32 b = -1;
1964
1965         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
1966                 if (priv->eeprom.calib_info.band_info[b].ch_from == 0)
1967                         continue;
1968
1969                 if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from)
1970                     && (channel <= priv->eeprom.calib_info.band_info[b].ch_to))
1971                         break;
1972         }
1973
1974         return b;
1975 }
1976
1977 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1978 {
1979         s32 val;
1980
1981         if (x2 == x1)
1982                 return y1;
1983         else {
1984                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
1985                 return val + y2;
1986         }
1987 }
1988
1989 /**
1990  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
1991  *
1992  * Interpolates factory measurements from the two sample channels within a
1993  * sub-band, to apply to channel of interest.  Interpolation is proportional to
1994  * differences in channel frequencies, which is proportional to differences
1995  * in channel number.
1996  */
1997 static int iwl4965_interpolate_chan(struct iwl4965_priv *priv, u32 channel,
1998                                     struct iwl4965_eeprom_calib_ch_info *chan_info)
1999 {
2000         s32 s = -1;
2001         u32 c;
2002         u32 m;
2003         const struct iwl4965_eeprom_calib_measure *m1;
2004         const struct iwl4965_eeprom_calib_measure *m2;
2005         struct iwl4965_eeprom_calib_measure *omeas;
2006         u32 ch_i1;
2007         u32 ch_i2;
2008
2009         s = iwl4965_get_sub_band(priv, channel);
2010         if (s >= EEPROM_TX_POWER_BANDS) {
2011                 IWL_ERROR("Tx Power can not find channel %d ", channel);
2012                 return -1;
2013         }
2014
2015         ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num;
2016         ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num;
2017         chan_info->ch_num = (u8) channel;
2018
2019         IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
2020                           channel, s, ch_i1, ch_i2);
2021
2022         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
2023                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
2024                         m1 = &(priv->eeprom.calib_info.band_info[s].ch1.
2025                                measurements[c][m]);
2026                         m2 = &(priv->eeprom.calib_info.band_info[s].ch2.
2027                                measurements[c][m]);
2028                         omeas = &(chan_info->measurements[c][m]);
2029
2030                         omeas->actual_pow =
2031                             (u8) iwl4965_interpolate_value(channel, ch_i1,
2032                                                            m1->actual_pow,
2033                                                            ch_i2,
2034                                                            m2->actual_pow);
2035                         omeas->gain_idx =
2036                             (u8) iwl4965_interpolate_value(channel, ch_i1,
2037                                                            m1->gain_idx, ch_i2,
2038                                                            m2->gain_idx);
2039                         omeas->temperature =
2040                             (u8) iwl4965_interpolate_value(channel, ch_i1,
2041                                                            m1->temperature,
2042                                                            ch_i2,
2043                                                            m2->temperature);
2044                         omeas->pa_det =
2045                             (s8) iwl4965_interpolate_value(channel, ch_i1,
2046                                                            m1->pa_det, ch_i2,
2047                                                            m2->pa_det);
2048
2049                         IWL_DEBUG_TXPOWER
2050                             ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
2051                              m1->actual_pow, m2->actual_pow, omeas->actual_pow);
2052                         IWL_DEBUG_TXPOWER
2053                             ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
2054                              m1->gain_idx, m2->gain_idx, omeas->gain_idx);
2055                         IWL_DEBUG_TXPOWER
2056                             ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
2057                              m1->pa_det, m2->pa_det, omeas->pa_det);
2058                         IWL_DEBUG_TXPOWER
2059                             ("chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
2060                              m1->temperature, m2->temperature,
2061                              omeas->temperature);
2062                 }
2063         }
2064
2065         return 0;
2066 }
2067
2068 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
2069  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
2070 static s32 back_off_table[] = {
2071         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
2072         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
2073         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
2074         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
2075         10                      /* CCK */
2076 };
2077
2078 /* Thermal compensation values for txpower for various frequency ranges ...
2079  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
2080 static struct iwl4965_txpower_comp_entry {
2081         s32 degrees_per_05db_a;
2082         s32 degrees_per_05db_a_denom;
2083 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
2084         {9, 2},                 /* group 0 5.2, ch  34-43 */
2085         {4, 1},                 /* group 1 5.2, ch  44-70 */
2086         {4, 1},                 /* group 2 5.2, ch  71-124 */
2087         {4, 1},                 /* group 3 5.2, ch 125-200 */
2088         {3, 1}                  /* group 4 2.4, ch   all */
2089 };
2090
2091 static s32 get_min_power_index(s32 rate_power_index, u32 band)
2092 {
2093         if (!band) {
2094                 if ((rate_power_index & 7) <= 4)
2095                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
2096         }
2097         return MIN_TX_GAIN_INDEX;
2098 }
2099
2100 struct gain_entry {
2101         u8 dsp;
2102         u8 radio;
2103 };
2104
2105 static const struct gain_entry gain_table[2][108] = {
2106         /* 5.2GHz power gain index table */
2107         {
2108          {123, 0x3F},           /* highest txpower */
2109          {117, 0x3F},
2110          {110, 0x3F},
2111          {104, 0x3F},
2112          {98, 0x3F},
2113          {110, 0x3E},
2114          {104, 0x3E},
2115          {98, 0x3E},
2116          {110, 0x3D},
2117          {104, 0x3D},
2118          {98, 0x3D},
2119          {110, 0x3C},
2120          {104, 0x3C},
2121          {98, 0x3C},
2122          {110, 0x3B},
2123          {104, 0x3B},
2124          {98, 0x3B},
2125          {110, 0x3A},
2126          {104, 0x3A},
2127          {98, 0x3A},
2128          {110, 0x39},
2129          {104, 0x39},
2130          {98, 0x39},
2131          {110, 0x38},
2132          {104, 0x38},
2133          {98, 0x38},
2134          {110, 0x37},
2135          {104, 0x37},
2136          {98, 0x37},
2137          {110, 0x36},
2138          {104, 0x36},
2139          {98, 0x36},
2140          {110, 0x35},
2141          {104, 0x35},
2142          {98, 0x35},
2143          {110, 0x34},
2144          {104, 0x34},
2145          {98, 0x34},
2146          {110, 0x33},
2147          {104, 0x33},
2148          {98, 0x33},
2149          {110, 0x32},
2150          {104, 0x32},
2151          {98, 0x32},
2152          {110, 0x31},
2153          {104, 0x31},
2154          {98, 0x31},
2155          {110, 0x30},
2156          {104, 0x30},
2157          {98, 0x30},
2158          {110, 0x25},
2159          {104, 0x25},
2160          {98, 0x25},
2161          {110, 0x24},
2162          {104, 0x24},
2163          {98, 0x24},
2164          {110, 0x23},
2165          {104, 0x23},
2166          {98, 0x23},
2167          {110, 0x22},
2168          {104, 0x18},
2169          {98, 0x18},
2170          {110, 0x17},
2171          {104, 0x17},
2172          {98, 0x17},
2173          {110, 0x16},
2174          {104, 0x16},
2175          {98, 0x16},
2176          {110, 0x15},
2177          {104, 0x15},
2178          {98, 0x15},
2179          {110, 0x14},
2180          {104, 0x14},
2181          {98, 0x14},
2182          {110, 0x13},
2183          {104, 0x13},
2184          {98, 0x13},
2185          {110, 0x12},
2186          {104, 0x08},
2187          {98, 0x08},
2188          {110, 0x07},
2189          {104, 0x07},
2190          {98, 0x07},
2191          {110, 0x06},
2192          {104, 0x06},
2193          {98, 0x06},
2194          {110, 0x05},
2195          {104, 0x05},
2196          {98, 0x05},
2197          {110, 0x04},
2198          {104, 0x04},
2199          {98, 0x04},
2200          {110, 0x03},
2201          {104, 0x03},
2202          {98, 0x03},
2203          {110, 0x02},
2204          {104, 0x02},
2205          {98, 0x02},
2206          {110, 0x01},
2207          {104, 0x01},
2208          {98, 0x01},
2209          {110, 0x00},
2210          {104, 0x00},
2211          {98, 0x00},
2212          {93, 0x00},
2213          {88, 0x00},
2214          {83, 0x00},
2215          {78, 0x00},
2216          },
2217         /* 2.4GHz power gain index table */
2218         {
2219          {110, 0x3f},           /* highest txpower */
2220          {104, 0x3f},
2221          {98, 0x3f},
2222          {110, 0x3e},
2223          {104, 0x3e},
2224          {98, 0x3e},
2225          {110, 0x3d},
2226          {104, 0x3d},
2227          {98, 0x3d},
2228          {110, 0x3c},
2229          {104, 0x3c},
2230          {98, 0x3c},
2231          {110, 0x3b},
2232          {104, 0x3b},
2233          {98, 0x3b},
2234          {110, 0x3a},
2235          {104, 0x3a},
2236          {98, 0x3a},
2237          {110, 0x39},
2238          {104, 0x39},
2239          {98, 0x39},
2240          {110, 0x38},
2241          {104, 0x38},
2242          {98, 0x38},
2243          {110, 0x37},
2244          {104, 0x37},
2245          {98, 0x37},
2246          {110, 0x36},
2247          {104, 0x36},
2248          {98, 0x36},
2249          {110, 0x35},
2250          {104, 0x35},
2251          {98, 0x35},
2252          {110, 0x34},
2253          {104, 0x34},
2254          {98, 0x34},
2255          {110, 0x33},
2256          {104, 0x33},
2257          {98, 0x33},
2258          {110, 0x32},
2259          {104, 0x32},
2260          {98, 0x32},
2261          {110, 0x31},
2262          {104, 0x31},
2263          {98, 0x31},
2264          {110, 0x30},
2265          {104, 0x30},
2266          {98, 0x30},
2267          {110, 0x6},
2268          {104, 0x6},
2269          {98, 0x6},
2270          {110, 0x5},
2271          {104, 0x5},
2272          {98, 0x5},
2273          {110, 0x4},
2274          {104, 0x4},
2275          {98, 0x4},
2276          {110, 0x3},
2277          {104, 0x3},
2278          {98, 0x3},
2279          {110, 0x2},
2280          {104, 0x2},
2281          {98, 0x2},
2282          {110, 0x1},
2283          {104, 0x1},
2284          {98, 0x1},
2285          {110, 0x0},
2286          {104, 0x0},
2287          {98, 0x0},
2288          {97, 0},
2289          {96, 0},
2290          {95, 0},
2291          {94, 0},
2292          {93, 0},
2293          {92, 0},
2294          {91, 0},
2295          {90, 0},
2296          {89, 0},
2297          {88, 0},
2298          {87, 0},
2299          {86, 0},
2300          {85, 0},
2301          {84, 0},
2302          {83, 0},
2303          {82, 0},
2304          {81, 0},
2305          {80, 0},
2306          {79, 0},
2307          {78, 0},
2308          {77, 0},
2309          {76, 0},
2310          {75, 0},
2311          {74, 0},
2312          {73, 0},
2313          {72, 0},
2314          {71, 0},
2315          {70, 0},
2316          {69, 0},
2317          {68, 0},
2318          {67, 0},
2319          {66, 0},
2320          {65, 0},
2321          {64, 0},
2322          {63, 0},
2323          {62, 0},
2324          {61, 0},
2325          {60, 0},
2326          {59, 0},
2327          }
2328 };
2329
2330 static int iwl4965_fill_txpower_tbl(struct iwl4965_priv *priv, u8 band, u16 channel,
2331                                     u8 is_fat, u8 ctrl_chan_high,
2332                                     struct iwl4965_tx_power_db *tx_power_tbl)
2333 {
2334         u8 saturation_power;
2335         s32 target_power;
2336         s32 user_target_power;
2337         s32 power_limit;
2338         s32 current_temp;
2339         s32 reg_limit;
2340         s32 current_regulatory;
2341         s32 txatten_grp = CALIB_CH_GROUP_MAX;
2342         int i;
2343         int c;
2344         const struct iwl4965_channel_info *ch_info = NULL;
2345         struct iwl4965_eeprom_calib_ch_info ch_eeprom_info;
2346         const struct iwl4965_eeprom_calib_measure *measurement;
2347         s16 voltage;
2348         s32 init_voltage;
2349         s32 voltage_compensation;
2350         s32 degrees_per_05db_num;
2351         s32 degrees_per_05db_denom;
2352         s32 factory_temp;
2353         s32 temperature_comp[2];
2354         s32 factory_gain_index[2];
2355         s32 factory_actual_pwr[2];
2356         s32 power_index;
2357
2358         /* Sanity check requested level (dBm) */
2359         if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
2360                 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
2361                             priv->user_txpower_limit);
2362                 return -EINVAL;
2363         }
2364         if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
2365                 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
2366                             priv->user_txpower_limit);
2367                 return -EINVAL;
2368         }
2369
2370         /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
2371          *   are used for indexing into txpower table) */
2372         user_target_power = 2 * priv->user_txpower_limit;
2373
2374         /* Get current (RXON) channel, band, width */
2375         ch_info =
2376                 iwl4965_get_channel_txpower_info(priv, priv->phymode, channel);
2377
2378         IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
2379                           is_fat);
2380
2381         if (!ch_info)
2382                 return -EINVAL;
2383
2384         /* get txatten group, used to select 1) thermal txpower adjustment
2385          *   and 2) mimo txpower balance between Tx chains. */
2386         txatten_grp = iwl4965_get_tx_atten_grp(channel);
2387         if (txatten_grp < 0)
2388                 return -EINVAL;
2389
2390         IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
2391                           channel, txatten_grp);
2392
2393         if (is_fat) {
2394                 if (ctrl_chan_high)
2395                         channel -= 2;
2396                 else
2397                         channel += 2;
2398         }
2399
2400         /* hardware txpower limits ...
2401          * saturation (clipping distortion) txpowers are in half-dBm */
2402         if (band)
2403                 saturation_power = priv->eeprom.calib_info.saturation_power24;
2404         else
2405                 saturation_power = priv->eeprom.calib_info.saturation_power52;
2406
2407         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
2408             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
2409                 if (band)
2410                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
2411                 else
2412                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
2413         }
2414
2415         /* regulatory txpower limits ... reg_limit values are in half-dBm,
2416          *   max_power_avg values are in dBm, convert * 2 */
2417         if (is_fat)
2418                 reg_limit = ch_info->fat_max_power_avg * 2;
2419         else
2420                 reg_limit = ch_info->max_power_avg * 2;
2421
2422         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
2423             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
2424                 if (band)
2425                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
2426                 else
2427                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
2428         }
2429
2430         /* Interpolate txpower calibration values for this channel,
2431          *   based on factory calibration tests on spaced channels. */
2432         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
2433
2434         /* calculate tx gain adjustment based on power supply voltage */
2435         voltage = priv->eeprom.calib_info.voltage;
2436         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
2437         voltage_compensation =
2438             iwl4965_get_voltage_compensation(voltage, init_voltage);
2439
2440         IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
2441                           init_voltage,
2442                           voltage, voltage_compensation);
2443
2444         /* get current temperature (Celsius) */
2445         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
2446         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
2447         current_temp = KELVIN_TO_CELSIUS(current_temp);
2448
2449         /* select thermal txpower adjustment params, based on channel group
2450          *   (same frequency group used for mimo txatten adjustment) */
2451         degrees_per_05db_num =
2452             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
2453         degrees_per_05db_denom =
2454             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
2455
2456         /* get per-chain txpower values from factory measurements */
2457         for (c = 0; c < 2; c++) {
2458                 measurement = &ch_eeprom_info.measurements[c][1];
2459
2460                 /* txgain adjustment (in half-dB steps) based on difference
2461                  *   between factory and current temperature */
2462                 factory_temp = measurement->temperature;
2463                 iwl4965_math_div_round((current_temp - factory_temp) *
2464                                        degrees_per_05db_denom,
2465                                        degrees_per_05db_num,
2466                                        &temperature_comp[c]);
2467
2468                 factory_gain_index[c] = measurement->gain_idx;
2469                 factory_actual_pwr[c] = measurement->actual_pow;
2470
2471                 IWL_DEBUG_TXPOWER("chain = %d\n", c);
2472                 IWL_DEBUG_TXPOWER("fctry tmp %d, "
2473                                   "curr tmp %d, comp %d steps\n",
2474                                   factory_temp, current_temp,
2475                                   temperature_comp[c]);
2476
2477                 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
2478                                   factory_gain_index[c],
2479                                   factory_actual_pwr[c]);
2480         }
2481
2482         /* for each of 33 bit-rates (including 1 for CCK) */
2483         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
2484                 u8 is_mimo_rate;
2485                 union iwl4965_tx_power_dual_stream tx_power;
2486
2487                 /* for mimo, reduce each chain's txpower by half
2488                  * (3dB, 6 steps), so total output power is regulatory
2489                  * compliant. */
2490                 if (i & 0x8) {
2491                         current_regulatory = reg_limit -
2492                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
2493                         is_mimo_rate = 1;
2494                 } else {
2495                         current_regulatory = reg_limit;
2496                         is_mimo_rate = 0;
2497                 }
2498
2499                 /* find txpower limit, either hardware or regulatory */
2500                 power_limit = saturation_power - back_off_table[i];
2501                 if (power_limit > current_regulatory)
2502                         power_limit = current_regulatory;
2503
2504                 /* reduce user's txpower request if necessary
2505                  * for this rate on this channel */
2506                 target_power = user_target_power;
2507                 if (target_power > power_limit)
2508                         target_power = power_limit;
2509
2510                 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
2511                                   i, saturation_power - back_off_table[i],
2512                                   current_regulatory, user_target_power,
2513                                   target_power);
2514
2515                 /* for each of 2 Tx chains (radio transmitters) */
2516                 for (c = 0; c < 2; c++) {
2517                         s32 atten_value;
2518
2519                         if (is_mimo_rate)
2520                                 atten_value =
2521                                     (s32)le32_to_cpu(priv->card_alive_init.
2522                                     tx_atten[txatten_grp][c]);
2523                         else
2524                                 atten_value = 0;
2525
2526                         /* calculate index; higher index means lower txpower */
2527                         power_index = (u8) (factory_gain_index[c] -
2528                                             (target_power -
2529                                              factory_actual_pwr[c]) -
2530                                             temperature_comp[c] -
2531                                             voltage_compensation +
2532                                             atten_value);
2533
2534 /*                      IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
2535                                                 power_index); */
2536
2537                         if (power_index < get_min_power_index(i, band))
2538                                 power_index = get_min_power_index(i, band);
2539
2540                         /* adjust 5 GHz index to support negative indexes */
2541                         if (!band)
2542                                 power_index += 9;
2543
2544                         /* CCK, rate 32, reduce txpower for CCK */
2545                         if (i == POWER_TABLE_CCK_ENTRY)
2546                                 power_index +=
2547                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
2548
2549                         /* stay within the table! */
2550                         if (power_index > 107) {
2551                                 IWL_WARNING("txpower index %d > 107\n",
2552                                             power_index);
2553                                 power_index = 107;
2554                         }
2555                         if (power_index < 0) {
2556                                 IWL_WARNING("txpower index %d < 0\n",
2557                                             power_index);
2558                                 power_index = 0;
2559                         }
2560
2561                         /* fill txpower command for this rate/chain */
2562                         tx_power.s.radio_tx_gain[c] =
2563                                 gain_table[band][power_index].radio;
2564                         tx_power.s.dsp_predis_atten[c] =
2565                                 gain_table[band][power_index].dsp;
2566
2567                         IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
2568                                           "gain 0x%02x dsp %d\n",
2569                                           c, atten_value, power_index,
2570                                         tx_power.s.radio_tx_gain[c],
2571                                         tx_power.s.dsp_predis_atten[c]);
2572                 }/* for each chain */
2573
2574                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
2575
2576         }/* for each rate */
2577
2578         return 0;
2579 }
2580
2581 /**
2582  * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
2583  *
2584  * Uses the active RXON for channel, band, and characteristics (fat, high)
2585  * The power limit is taken from priv->user_txpower_limit.
2586  */
2587 int iwl4965_hw_reg_send_txpower(struct iwl4965_priv *priv)
2588 {
2589         struct iwl4965_txpowertable_cmd cmd = { 0 };
2590         int rc = 0;
2591         u8 band = 0;
2592         u8 is_fat = 0;
2593         u8 ctrl_chan_high = 0;
2594
2595         if (test_bit(STATUS_SCANNING, &priv->status)) {
2596                 /* If this gets hit a lot, switch it to a BUG() and catch
2597                  * the stack trace to find out who is calling this during
2598                  * a scan. */
2599                 IWL_WARNING("TX Power requested while scanning!\n");
2600                 return -EAGAIN;
2601         }
2602
2603         band = ((priv->phymode == MODE_IEEE80211B) ||
2604                 (priv->phymode == MODE_IEEE80211G));
2605
2606         is_fat =  is_fat_channel(priv->active_rxon.flags);
2607
2608         if (is_fat &&
2609             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2610                 ctrl_chan_high = 1;
2611
2612         cmd.band = band;
2613         cmd.channel = priv->active_rxon.channel;
2614
2615         rc = iwl4965_fill_txpower_tbl(priv, band,
2616                                 le16_to_cpu(priv->active_rxon.channel),
2617                                 is_fat, ctrl_chan_high, &cmd.tx_power);
2618         if (rc)
2619                 return rc;
2620
2621         rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
2622         return rc;
2623 }
2624
2625 int iwl4965_hw_channel_switch(struct iwl4965_priv *priv, u16 channel)
2626 {
2627         int rc;
2628         u8 band = 0;
2629         u8 is_fat = 0;
2630         u8 ctrl_chan_high = 0;
2631         struct iwl4965_channel_switch_cmd cmd = { 0 };
2632         const struct iwl4965_channel_info *ch_info;
2633
2634         band = ((priv->phymode == MODE_IEEE80211B) ||
2635                 (priv->phymode == MODE_IEEE80211G));
2636
2637         ch_info = iwl4965_get_channel_info(priv, priv->phymode, channel);
2638
2639         is_fat = is_fat_channel(priv->staging_rxon.flags);
2640
2641         if (is_fat &&
2642             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2643                 ctrl_chan_high = 1;
2644
2645         cmd.band = band;
2646         cmd.expect_beacon = 0;
2647         cmd.channel = cpu_to_le16(channel);
2648         cmd.rxon_flags = priv->active_rxon.flags;
2649         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
2650         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
2651         if (ch_info)
2652                 cmd.expect_beacon = is_channel_radar(ch_info);
2653         else
2654                 cmd.expect_beacon = 1;
2655
2656         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
2657                                       ctrl_chan_high, &cmd.tx_power);
2658         if (rc) {
2659                 IWL_DEBUG_11H("error:%d  fill txpower_tbl\n", rc);
2660                 return rc;
2661         }
2662
2663         rc = iwl4965_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
2664         return rc;
2665 }
2666
2667 #define RTS_HCCA_RETRY_LIMIT            3
2668 #define RTS_DFAULT_RETRY_LIMIT          60
2669
2670 void iwl4965_hw_build_tx_cmd_rate(struct iwl4965_priv *priv,
2671                               struct iwl4965_cmd *cmd,
2672                               struct ieee80211_tx_control *ctrl,
2673                               struct ieee80211_hdr *hdr, int sta_id,
2674                               int is_hcca)
2675 {
2676         u8 rate;
2677         u8 rts_retry_limit = 0;
2678         u8 data_retry_limit = 0;
2679         __le32 tx_flags;
2680         u16 fc = le16_to_cpu(hdr->frame_control);
2681
2682         tx_flags = cmd->cmd.tx.tx_flags;
2683
2684         rate = iwl4965_rates[ctrl->tx_rate].plcp;
2685
2686         rts_retry_limit = (is_hcca) ?
2687             RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
2688
2689         if (ieee80211_is_probe_response(fc)) {
2690                 data_retry_limit = 3;
2691                 if (data_retry_limit < rts_retry_limit)
2692                         rts_retry_limit = data_retry_limit;
2693         } else
2694                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
2695
2696         if (priv->data_retry_limit != -1)
2697                 data_retry_limit = priv->data_retry_limit;
2698
2699         if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2700                 switch (fc & IEEE80211_FCTL_STYPE) {
2701                 case IEEE80211_STYPE_AUTH:
2702                 case IEEE80211_STYPE_DEAUTH:
2703                 case IEEE80211_STYPE_ASSOC_REQ:
2704                 case IEEE80211_STYPE_REASSOC_REQ:
2705                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
2706                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2707                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
2708                         }
2709                         break;
2710                 default:
2711                         break;
2712                 }
2713         }
2714
2715         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
2716         cmd->cmd.tx.data_retry_limit = data_retry_limit;
2717         cmd->cmd.tx.rate_n_flags = iwl4965_hw_set_rate_n_flags(rate, 0);
2718         cmd->cmd.tx.tx_flags = tx_flags;
2719 }
2720
2721 int iwl4965_hw_get_rx_read(struct iwl4965_priv *priv)
2722 {
2723         struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
2724
2725         return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num);
2726 }
2727
2728 int iwl4965_hw_get_temperature(struct iwl4965_priv *priv)
2729 {
2730         return priv->temperature;
2731 }
2732
2733 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl4965_priv *priv,
2734                           struct iwl4965_frame *frame, u8 rate)
2735 {
2736         struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
2737         unsigned int frame_size;
2738
2739         tx_beacon_cmd = &frame->u.beacon;
2740         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2741
2742         tx_beacon_cmd->tx.sta_id = IWL4965_BROADCAST_ID;
2743         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2744
2745         frame_size = iwl4965_fill_beacon_frame(priv,
2746                                 tx_beacon_cmd->frame,
2747                                 iwl4965_broadcast_addr,
2748                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2749
2750         BUG_ON(frame_size > MAX_MPDU_SIZE);
2751         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2752
2753         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
2754                 tx_beacon_cmd->tx.rate_n_flags =
2755                         iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
2756         else
2757                 tx_beacon_cmd->tx.rate_n_flags =
2758                         iwl4965_hw_set_rate_n_flags(rate, 0);
2759
2760         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2761                                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
2762         return (sizeof(*tx_beacon_cmd) + frame_size);
2763 }
2764
2765 /*
2766  * Tell 4965 where to find circular buffer of Tx Frame Descriptors for
2767  * given Tx queue, and enable the DMA channel used for that queue.
2768  *
2769  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
2770  * channels supported in hardware.
2771  */
2772 int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
2773 {
2774         int rc;
2775         unsigned long flags;
2776         int txq_id = txq->q.id;
2777
2778         spin_lock_irqsave(&priv->lock, flags);
2779         rc = iwl4965_grab_nic_access(priv);
2780         if (rc) {
2781                 spin_unlock_irqrestore(&priv->lock, flags);
2782                 return rc;
2783         }
2784
2785         /* Circular buffer (TFD queue in DRAM) physical base address */
2786         iwl4965_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
2787                              txq->q.dma_addr >> 8);
2788
2789         /* Enable DMA channel, using same id as for TFD queue */
2790         iwl4965_write_direct32(
2791                 priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
2792                 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
2793                 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
2794         iwl4965_release_nic_access(priv);
2795         spin_unlock_irqrestore(&priv->lock, flags);
2796
2797         return 0;
2798 }
2799
2800 int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *ptr,
2801                                  dma_addr_t addr, u16 len)
2802 {
2803         int index, is_odd;
2804         struct iwl4965_tfd_frame *tfd = ptr;
2805         u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
2806
2807         /* Each TFD can point to a maximum 20 Tx buffers */
2808         if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
2809                 IWL_ERROR("Error can not send more than %d chunks\n",
2810                           MAX_NUM_OF_TBS);
2811                 return -EINVAL;
2812         }
2813
2814         index = num_tbs / 2;
2815         is_odd = num_tbs & 0x1;
2816
2817         if (!is_odd) {
2818                 tfd->pa[index].tb1_addr = cpu_to_le32(addr);
2819                 IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
2820                              iwl_get_dma_hi_address(addr));
2821                 IWL_SET_BITS(tfd->pa[index], tb1_len, len);
2822         } else {
2823                 IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
2824                              (u32) (addr & 0xffff));
2825                 IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
2826                 IWL_SET_BITS(tfd->pa[index], tb2_len, len);
2827         }
2828
2829         IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
2830
2831         return 0;
2832 }
2833
2834 static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv)
2835 {
2836         u16 hw_version = priv->eeprom.board_revision_4965;
2837
2838         IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n",
2839                        ((hw_version >> 8) & 0x0F),
2840                        ((hw_version >> 8) >> 4), (hw_version & 0x00FF));
2841
2842         IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n",
2843                        priv->eeprom.board_pba_number_4965);
2844 }
2845
2846 #define IWL_TX_CRC_SIZE         4
2847 #define IWL_TX_DELIMITER_SIZE   4
2848
2849 /**
2850  * iwl4965_tx_queue_update_wr_ptr - Set up entry in Tx byte-count array
2851  */
2852 int iwl4965_tx_queue_update_wr_ptr(struct iwl4965_priv *priv,
2853                                    struct iwl4965_tx_queue *txq, u16 byte_cnt)
2854 {
2855         int len;
2856         int txq_id = txq->q.id;
2857         struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
2858
2859         if (txq->need_update == 0)
2860                 return 0;
2861
2862         len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
2863
2864         /* Set up byte count within first 256 entries */
2865         IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2866                        tfd_offset[txq->q.write_ptr], byte_cnt, len);
2867
2868         /* If within first 64 entries, duplicate at end */
2869         if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE)
2870                 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2871                         tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr],
2872                         byte_cnt, len);
2873
2874         return 0;
2875 }
2876
2877 /**
2878  * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
2879  *
2880  * Selects how many and which Rx receivers/antennas/chains to use.
2881  * This should not be used for scan command ... it puts data in wrong place.
2882  */
2883 void iwl4965_set_rxon_chain(struct iwl4965_priv *priv)
2884 {
2885         u8 is_single = is_single_stream(priv);
2886         u8 idle_state, rx_state;
2887
2888         priv->staging_rxon.rx_chain = 0;
2889         rx_state = idle_state = 3;
2890
2891         /* Tell uCode which antennas are actually connected.
2892          * Before first association, we assume all antennas are connected.
2893          * Just after first association, iwl4965_noise_calibration()
2894          *    checks which antennas actually *are* connected. */
2895         priv->staging_rxon.rx_chain |=
2896             cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS);
2897
2898         /* How many receivers should we use? */
2899         iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state);
2900         priv->staging_rxon.rx_chain |=
2901                 cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
2902         priv->staging_rxon.rx_chain |=
2903                 cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
2904
2905         if (!is_single && (rx_state >= 2) &&
2906             !test_bit(STATUS_POWER_PMI, &priv->status))
2907                 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
2908         else
2909                 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
2910
2911         IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
2912 }
2913
2914 #ifdef CONFIG_IWL4965_HT
2915 #ifdef CONFIG_IWL4965_HT_AGG
2916 /*
2917         get the traffic load value for tid
2918 */
2919 static u32 iwl4965_tl_get_load(struct iwl4965_priv *priv, u8 tid)
2920 {
2921         u32 load = 0;
2922         u32 current_time = jiffies_to_msecs(jiffies);
2923         u32 time_diff;
2924         s32 index;
2925         unsigned long flags;
2926         struct iwl4965_traffic_load *tid_ptr = NULL;
2927
2928         if (tid >= TID_MAX_LOAD_COUNT)
2929                 return 0;
2930
2931         tid_ptr = &(priv->lq_mngr.agg_ctrl.traffic_load[tid]);
2932
2933         current_time -= current_time % TID_ROUND_VALUE;
2934
2935         spin_lock_irqsave(&priv->lq_mngr.lock, flags);
2936         if (!(tid_ptr->queue_count))
2937                 goto out;
2938
2939         time_diff = TIME_WRAP_AROUND(tid_ptr->time_stamp, current_time);
2940         index = time_diff / TID_QUEUE_CELL_SPACING;
2941
2942         if (index >= TID_QUEUE_MAX_SIZE) {
2943                 u32 oldest_time = current_time - TID_MAX_TIME_DIFF;
2944
2945                 while (tid_ptr->queue_count &&
2946                        (tid_ptr->time_stamp < oldest_time)) {
2947                         tid_ptr->total -= tid_ptr->packet_count[tid_ptr->head];
2948                         tid_ptr->packet_count[tid_ptr->head] = 0;
2949                         tid_ptr->time_stamp += TID_QUEUE_CELL_SPACING;
2950                         tid_ptr->queue_count--;
2951                         tid_ptr->head++;
2952                         if (tid_ptr->head >= TID_QUEUE_MAX_SIZE)
2953                                 tid_ptr->head = 0;
2954                 }
2955         }
2956         load = tid_ptr->total;
2957
2958  out:
2959         spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
2960         return load;
2961 }
2962
2963 /*
2964         increment traffic load value for tid and also remove
2965         any old values if passed the certian time period
2966 */
2967 static void iwl4965_tl_add_packet(struct iwl4965_priv *priv, u8 tid)
2968 {
2969         u32 current_time = jiffies_to_msecs(jiffies);
2970         u32 time_diff;
2971         s32 index;
2972         unsigned long flags;
2973         struct iwl4965_traffic_load *tid_ptr = NULL;
2974
2975         if (tid >= TID_MAX_LOAD_COUNT)
2976                 return;
2977
2978         tid_ptr = &(priv->lq_mngr.agg_ctrl.traffic_load[tid]);
2979
2980         current_time -= current_time % TID_ROUND_VALUE;
2981
2982         spin_lock_irqsave(&priv->lq_mngr.lock, flags);
2983         if (!(tid_ptr->queue_count)) {
2984                 tid_ptr->total = 1;
2985                 tid_ptr->time_stamp = current_time;
2986                 tid_ptr->queue_count = 1;
2987                 tid_ptr->head = 0;
2988                 tid_ptr->packet_count[0] = 1;
2989                 goto out;
2990         }
2991
2992         time_diff = TIME_WRAP_AROUND(tid_ptr->time_stamp, current_time);
2993         index = time_diff / TID_QUEUE_CELL_SPACING;
2994
2995         if (index >= TID_QUEUE_MAX_SIZE) {
2996                 u32 oldest_time = current_time - TID_MAX_TIME_DIFF;
2997
2998                 while (tid_ptr->queue_count &&
2999                        (tid_ptr->time_stamp < oldest_time)) {
3000                         tid_ptr->total -= tid_ptr->packet_count[tid_ptr->head];
3001                         tid_ptr->packet_count[tid_ptr->head] = 0;
3002                         tid_ptr->time_stamp += TID_QUEUE_CELL_SPACING;
3003                         tid_ptr->queue_count--;
3004                         tid_ptr->head++;
3005                         if (tid_ptr->head >= TID_QUEUE_MAX_SIZE)
3006                                 tid_ptr->head = 0;
3007                 }
3008         }
3009
3010         index = (tid_ptr->head + index) % TID_QUEUE_MAX_SIZE;
3011         tid_ptr->packet_count[index] = tid_ptr->packet_count[index] + 1;
3012         tid_ptr->total = tid_ptr->total + 1;
3013
3014         if ((index + 1) > tid_ptr->queue_count)
3015                 tid_ptr->queue_count = index + 1;
3016  out:
3017         spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3018
3019 }
3020
3021 #define MMAC_SCHED_MAX_NUMBER_OF_HT_BACK_FLOWS   7
3022 enum HT_STATUS {
3023         BA_STATUS_FAILURE = 0,
3024         BA_STATUS_INITIATOR_DELBA,
3025         BA_STATUS_RECIPIENT_DELBA,
3026         BA_STATUS_RENEW_ADDBA_REQUEST,
3027         BA_STATUS_ACTIVE,
3028 };
3029
3030 /**
3031  * iwl4964_tl_ba_avail - Find out if an unused aggregation queue is available
3032  */
3033 static u8 iwl4964_tl_ba_avail(struct iwl4965_priv *priv)
3034 {
3035         int i;
3036         struct iwl4965_lq_mngr *lq;
3037         u8 count = 0;
3038         u16 msk;
3039
3040         lq = (struct iwl4965_lq_mngr *)&(priv->lq_mngr);
3041
3042         /* Find out how many agg queues are in use */
3043         for (i = 0; i < TID_MAX_LOAD_COUNT ; i++) {
3044                 msk = 1 << i;
3045                 if ((lq->agg_ctrl.granted_ba & msk) ||
3046                     (lq->agg_ctrl.wait_for_agg_status & msk))
3047                         count++;
3048         }
3049
3050         if (count < MMAC_SCHED_MAX_NUMBER_OF_HT_BACK_FLOWS)
3051                 return 1;
3052
3053         return 0;
3054 }
3055
3056 static void iwl4965_ba_status(struct iwl4965_priv *priv,
3057                               u8 tid, enum HT_STATUS status);
3058
3059 static int iwl4965_perform_addba(struct iwl4965_priv *priv, u8 tid, u32 length,
3060                                  u32 ba_timeout)
3061 {
3062         int rc;
3063
3064         rc = ieee80211_start_BA_session(priv->hw, priv->bssid, tid);
3065         if (rc)
3066                 iwl4965_ba_status(priv, tid, BA_STATUS_FAILURE);
3067
3068         return rc;
3069 }
3070
3071 static int iwl4965_perform_delba(struct iwl4965_priv *priv, u8 tid)
3072 {
3073         int rc;
3074
3075         rc = ieee80211_stop_BA_session(priv->hw, priv->bssid, tid);
3076         if (rc)
3077                 iwl4965_ba_status(priv, tid, BA_STATUS_FAILURE);
3078
3079         return rc;
3080 }
3081
3082 static void iwl4965_turn_on_agg_for_tid(struct iwl4965_priv *priv,
3083                                         struct iwl4965_lq_mngr *lq,
3084                                         u8 auto_agg, u8 tid)
3085 {
3086         u32 tid_msk = (1 << tid);
3087         unsigned long flags;
3088
3089         spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3090 /*
3091         if ((auto_agg) && (!lq->enable_counter)){
3092                 lq->agg_ctrl.next_retry = 0;
3093                 lq->agg_ctrl.tid_retry = 0;
3094                 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3095                 return;
3096         }
3097 */
3098         if (!(lq->agg_ctrl.granted_ba & tid_msk) &&
3099             (lq->agg_ctrl.requested_ba & tid_msk)) {
3100                 u8 available_queues;
3101                 u32 load;
3102
3103                 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3104                 available_queues = iwl4964_tl_ba_avail(priv);
3105                 load = iwl4965_tl_get_load(priv, tid);
3106