[IPV6]: Reorg struct ifmcaddr6 to save some bytes
[linux-2.6.git] / drivers / net / wireless / iwlwifi / iwl-3945.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24  *
25  *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <linux/firmware.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40 #include <net/mac80211.h>
41
42 #include "iwl-3945.h"
43 #include "iwl-helpers.h"
44 #include "iwl-3945-rs.h"
45
46 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
47         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
48                                     IWL_RATE_##r##M_IEEE,   \
49                                     IWL_RATE_##ip##M_INDEX, \
50                                     IWL_RATE_##in##M_INDEX, \
51                                     IWL_RATE_##rp##M_INDEX, \
52                                     IWL_RATE_##rn##M_INDEX, \
53                                     IWL_RATE_##pp##M_INDEX, \
54                                     IWL_RATE_##np##M_INDEX, \
55                                     IWL_RATE_##r##M_INDEX_TABLE, \
56                                     IWL_RATE_##ip##M_INDEX_TABLE }
57
58 /*
59  * Parameter order:
60  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
61  *
62  * If there isn't a valid next or previous rate then INV is used which
63  * maps to IWL_RATE_INVALID
64  *
65  */
66 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
67         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
68         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
69         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
70         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
71         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
72         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
73         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
74         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
75         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
76         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
77         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
78         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
79 };
80
81 /* 1 = enable the iwl3945_disable_events() function */
82 #define IWL_EVT_DISABLE (0)
83 #define IWL_EVT_DISABLE_SIZE (1532/32)
84
85 /**
86  * iwl3945_disable_events - Disable selected events in uCode event log
87  *
88  * Disable an event by writing "1"s into "disable"
89  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
90  *   Default values of 0 enable uCode events to be logged.
91  * Use for only special debugging.  This function is just a placeholder as-is,
92  *   you'll need to provide the special bits! ...
93  *   ... and set IWL_EVT_DISABLE to 1. */
94 void iwl3945_disable_events(struct iwl3945_priv *priv)
95 {
96         int ret;
97         int i;
98         u32 base;               /* SRAM address of event log header */
99         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
100         u32 array_size;         /* # of u32 entries in array */
101         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
102                 0x00000000,     /*   31 -    0  Event id numbers */
103                 0x00000000,     /*   63 -   32 */
104                 0x00000000,     /*   95 -   64 */
105                 0x00000000,     /*  127 -   96 */
106                 0x00000000,     /*  159 -  128 */
107                 0x00000000,     /*  191 -  160 */
108                 0x00000000,     /*  223 -  192 */
109                 0x00000000,     /*  255 -  224 */
110                 0x00000000,     /*  287 -  256 */
111                 0x00000000,     /*  319 -  288 */
112                 0x00000000,     /*  351 -  320 */
113                 0x00000000,     /*  383 -  352 */
114                 0x00000000,     /*  415 -  384 */
115                 0x00000000,     /*  447 -  416 */
116                 0x00000000,     /*  479 -  448 */
117                 0x00000000,     /*  511 -  480 */
118                 0x00000000,     /*  543 -  512 */
119                 0x00000000,     /*  575 -  544 */
120                 0x00000000,     /*  607 -  576 */
121                 0x00000000,     /*  639 -  608 */
122                 0x00000000,     /*  671 -  640 */
123                 0x00000000,     /*  703 -  672 */
124                 0x00000000,     /*  735 -  704 */
125                 0x00000000,     /*  767 -  736 */
126                 0x00000000,     /*  799 -  768 */
127                 0x00000000,     /*  831 -  800 */
128                 0x00000000,     /*  863 -  832 */
129                 0x00000000,     /*  895 -  864 */
130                 0x00000000,     /*  927 -  896 */
131                 0x00000000,     /*  959 -  928 */
132                 0x00000000,     /*  991 -  960 */
133                 0x00000000,     /* 1023 -  992 */
134                 0x00000000,     /* 1055 - 1024 */
135                 0x00000000,     /* 1087 - 1056 */
136                 0x00000000,     /* 1119 - 1088 */
137                 0x00000000,     /* 1151 - 1120 */
138                 0x00000000,     /* 1183 - 1152 */
139                 0x00000000,     /* 1215 - 1184 */
140                 0x00000000,     /* 1247 - 1216 */
141                 0x00000000,     /* 1279 - 1248 */
142                 0x00000000,     /* 1311 - 1280 */
143                 0x00000000,     /* 1343 - 1312 */
144                 0x00000000,     /* 1375 - 1344 */
145                 0x00000000,     /* 1407 - 1376 */
146                 0x00000000,     /* 1439 - 1408 */
147                 0x00000000,     /* 1471 - 1440 */
148                 0x00000000,     /* 1503 - 1472 */
149         };
150
151         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
152         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
153                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
154                 return;
155         }
156
157         ret = iwl3945_grab_nic_access(priv);
158         if (ret) {
159                 IWL_WARNING("Can not read from adapter at this time.\n");
160                 return;
161         }
162
163         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
164         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
165         iwl3945_release_nic_access(priv);
166
167         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
168                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
169                                disable_ptr);
170                 ret = iwl3945_grab_nic_access(priv);
171                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
172                         iwl3945_write_targ_mem(priv,
173                                            disable_ptr + (i * sizeof(u32)),
174                                            evt_disable[i]);
175
176                 iwl3945_release_nic_access(priv);
177         } else {
178                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
179                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
180                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
181                                disable_ptr, array_size);
182         }
183
184 }
185
186 /**
187  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
188  * @priv: eeprom and antenna fields are used to determine antenna flags
189  *
190  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
191  * priv->antenna specifies the antenna diversity mode:
192  *
193  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
194  * IWL_ANTENNA_MAIN      - Force MAIN antenna
195  * IWL_ANTENNA_AUX       - Force AUX antenna
196  */
197 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
198 {
199         switch (priv->antenna) {
200         case IWL_ANTENNA_DIVERSITY:
201                 return 0;
202
203         case IWL_ANTENNA_MAIN:
204                 if (priv->eeprom.antenna_switch_type)
205                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
206                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
207
208         case IWL_ANTENNA_AUX:
209                 if (priv->eeprom.antenna_switch_type)
210                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
211                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
212         }
213
214         /* bad antenna selector value */
215         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
216         return 0;               /* "diversity" is default if error */
217 }
218
219 /*****************************************************************************
220  *
221  * Intel PRO/Wireless 3945ABG/BG Network Connection
222  *
223  *  RX handler implementations
224  *
225  *  Used by iwl-base.c
226  *
227  *****************************************************************************/
228
229 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
230 {
231         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
232         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
233                      (int)sizeof(struct iwl3945_notif_statistics),
234                      le32_to_cpu(pkt->len));
235
236         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
237
238         priv->last_statistics_time = jiffies;
239 }
240
241 void iwl3945_add_radiotap(struct iwl3945_priv *priv, struct sk_buff *skb,
242                           struct iwl3945_rx_frame_hdr *rx_hdr,
243                           struct ieee80211_rx_status *stats)
244 {
245         /* First cache any information we need before we overwrite
246          * the information provided in the skb from the hardware */
247         s8 signal = stats->ssi;
248         s8 noise = 0;
249         int rate = stats->rate;
250         u64 tsf = stats->mactime;
251         __le16 phy_flags_hw = rx_hdr->phy_flags;
252
253         struct iwl3945_rt_rx_hdr {
254                 struct ieee80211_radiotap_header rt_hdr;
255                 __le64 rt_tsf;          /* TSF */
256                 u8 rt_flags;            /* radiotap packet flags */
257                 u8 rt_rate;             /* rate in 500kb/s */
258                 __le16 rt_channelMHz;   /* channel in MHz */
259                 __le16 rt_chbitmask;    /* channel bitfield */
260                 s8 rt_dbmsignal;        /* signal in dBm, kluged to signed */
261                 s8 rt_dbmnoise;
262                 u8 rt_antenna;          /* antenna number */
263         } __attribute__ ((packed)) *iwl3945_rt;
264
265         if (skb_headroom(skb) < sizeof(*iwl3945_rt)) {
266                 if (net_ratelimit())
267                         printk(KERN_ERR "not enough headroom [%d] for "
268                                "radiotap head [%zd]\n",
269                                skb_headroom(skb), sizeof(*iwl3945_rt));
270                 return;
271         }
272
273         /* put radiotap header in front of 802.11 header and data */
274         iwl3945_rt = (void *)skb_push(skb, sizeof(*iwl3945_rt));
275
276         /* initialise radiotap header */
277         iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
278         iwl3945_rt->rt_hdr.it_pad = 0;
279
280         /* total header + data */
281         put_unaligned(cpu_to_le16(sizeof(*iwl3945_rt)),
282                       &iwl3945_rt->rt_hdr.it_len);
283
284         /* Indicate all the fields we add to the radiotap header */
285         put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
286                                   (1 << IEEE80211_RADIOTAP_FLAGS) |
287                                   (1 << IEEE80211_RADIOTAP_RATE) |
288                                   (1 << IEEE80211_RADIOTAP_CHANNEL) |
289                                   (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
290                                   (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
291                                   (1 << IEEE80211_RADIOTAP_ANTENNA)),
292                       &iwl3945_rt->rt_hdr.it_present);
293
294         /* Zero the flags, we'll add to them as we go */
295         iwl3945_rt->rt_flags = 0;
296
297         put_unaligned(cpu_to_le64(tsf), &iwl3945_rt->rt_tsf);
298
299         iwl3945_rt->rt_dbmsignal = signal;
300         iwl3945_rt->rt_dbmnoise = noise;
301
302         /* Convert the channel frequency and set the flags */
303         put_unaligned(cpu_to_le16(stats->freq), &iwl3945_rt->rt_channelMHz);
304         if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
305                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
306                                           IEEE80211_CHAN_5GHZ),
307                               &iwl3945_rt->rt_chbitmask);
308         else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
309                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
310                                           IEEE80211_CHAN_2GHZ),
311                               &iwl3945_rt->rt_chbitmask);
312         else    /* 802.11g */
313                 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
314                                           IEEE80211_CHAN_2GHZ),
315                               &iwl3945_rt->rt_chbitmask);
316
317         rate = iwl3945_rate_index_from_plcp(rate);
318         if (rate == -1)
319                 iwl3945_rt->rt_rate = 0;
320         else
321                 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
322
323         /* antenna number */
324         iwl3945_rt->rt_antenna =
325                 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
326
327         /* set the preamble flag if we have it */
328         if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
329                 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
330
331         stats->flag |= RX_FLAG_RADIOTAP;
332 }
333
334 static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
335                                    struct iwl3945_rx_mem_buffer *rxb,
336                                    struct ieee80211_rx_status *stats)
337 {
338         struct ieee80211_hdr *hdr;
339         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
340         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
341         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
342         short len = le16_to_cpu(rx_hdr->len);
343
344         /* We received data from the HW, so stop the watchdog */
345         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
346                 IWL_DEBUG_DROP("Corruption detected!\n");
347                 return;
348         }
349
350         /* We only process data packets if the interface is open */
351         if (unlikely(!priv->is_open)) {
352                 IWL_DEBUG_DROP_LIMIT
353                     ("Dropping packet while interface is not open.\n");
354                 return;
355         }
356
357         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
358         /* Set the size of the skb to the size of the frame */
359         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
360
361         hdr = (void *)rxb->skb->data;
362
363         if (iwl3945_param_hwcrypto)
364                 iwl3945_set_decrypted_flag(priv, rxb->skb,
365                                        le32_to_cpu(rx_end->status), stats);
366
367         if (priv->add_radiotap)
368                 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
369
370         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
371         rxb->skb = NULL;
372 }
373
374 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
375
376 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
377                                 struct iwl3945_rx_mem_buffer *rxb)
378 {
379         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
380         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
381         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
382         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
383         struct ieee80211_hdr *header;
384         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
385         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
386         struct ieee80211_rx_status stats = {
387                 .mactime = le64_to_cpu(rx_end->timestamp),
388                 .freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel)),
389                 .channel = le16_to_cpu(rx_hdr->channel),
390                 .phymode = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
391                 MODE_IEEE80211G : MODE_IEEE80211A,
392                 .antenna = 0,
393                 .rate = rx_hdr->rate,
394                 .flag = 0,
395         };
396         u8 network_packet;
397         int snr;
398
399         if ((unlikely(rx_stats->phy_count > 20))) {
400                 IWL_DEBUG_DROP
401                     ("dsp size out of range [0,20]: "
402                      "%d/n", rx_stats->phy_count);
403                 return;
404         }
405
406         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
407             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
408                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
409                 return;
410         }
411
412         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
413                 iwl3945_handle_data_packet(priv, 1, rxb, &stats);
414                 return;
415         }
416
417         /* Convert 3945's rssi indicator to dBm */
418         stats.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
419
420         /* Set default noise value to -127 */
421         if (priv->last_rx_noise == 0)
422                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
423
424         /* 3945 provides noise info for OFDM frames only.
425          * sig_avg and noise_diff are measured by the 3945's digital signal
426          *   processor (DSP), and indicate linear levels of signal level and
427          *   distortion/noise within the packet preamble after
428          *   automatic gain control (AGC).  sig_avg should stay fairly
429          *   constant if the radio's AGC is working well.
430          * Since these values are linear (not dB or dBm), linear
431          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
432          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
433          *   to obtain noise level in dBm.
434          * Calculate stats.signal (quality indicator in %) based on SNR. */
435         if (rx_stats_noise_diff) {
436                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
437                 stats.noise = stats.ssi - iwl3945_calc_db_from_ratio(snr);
438                 stats.signal = iwl3945_calc_sig_qual(stats.ssi, stats.noise);
439
440         /* If noise info not available, calculate signal quality indicator (%)
441          *   using just the dBm signal level. */
442         } else {
443                 stats.noise = priv->last_rx_noise;
444                 stats.signal = iwl3945_calc_sig_qual(stats.ssi, 0);
445         }
446
447
448         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
449                         stats.ssi, stats.noise, stats.signal,
450                         rx_stats_sig_avg, rx_stats_noise_diff);
451
452         stats.freq = ieee80211chan2mhz(stats.channel);
453
454         /* can be covered by iwl3945_report_frame() in most cases */
455 /*      IWL_DEBUG_RX("RX status: 0x%08X\n", rx_end->status); */
456
457         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
458
459         network_packet = iwl3945_is_network_packet(priv, header);
460
461 #ifdef CONFIG_IWL3945_DEBUG
462         if (iwl3945_debug_level & IWL_DL_STATS && net_ratelimit())
463                 IWL_DEBUG_STATS
464                     ("[%c] %d RSSI: %d Signal: %u, Noise: %u, Rate: %u\n",
465                      network_packet ? '*' : ' ',
466                      stats.channel, stats.ssi, stats.ssi,
467                      stats.ssi, stats.rate);
468
469         if (iwl3945_debug_level & (IWL_DL_RX))
470                 /* Set "1" to report good data frames in groups of 100 */
471                 iwl3945_report_frame(priv, pkt, header, 1);
472 #endif
473
474         if (network_packet) {
475                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
476                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
477                 priv->last_rx_rssi = stats.ssi;
478                 priv->last_rx_noise = stats.noise;
479         }
480
481         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
482         case IEEE80211_FTYPE_MGMT:
483                 switch (le16_to_cpu(header->frame_control) &
484                         IEEE80211_FCTL_STYPE) {
485                 case IEEE80211_STYPE_PROBE_RESP:
486                 case IEEE80211_STYPE_BEACON:{
487                                 /* If this is a beacon or probe response for
488                                  * our network then cache the beacon
489                                  * timestamp */
490                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
491                                       && !compare_ether_addr(header->addr2,
492                                                              priv->bssid)) ||
493                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
494                                       && !compare_ether_addr(header->addr3,
495                                                              priv->bssid)))) {
496                                         struct ieee80211_mgmt *mgmt =
497                                             (struct ieee80211_mgmt *)header;
498                                         __le32 *pos;
499                                         pos =
500                                             (__le32 *) & mgmt->u.beacon.
501                                             timestamp;
502                                         priv->timestamp0 = le32_to_cpu(pos[0]);
503                                         priv->timestamp1 = le32_to_cpu(pos[1]);
504                                         priv->beacon_int = le16_to_cpu(
505                                             mgmt->u.beacon.beacon_int);
506                                         if (priv->call_post_assoc_from_beacon &&
507                                             (priv->iw_mode ==
508                                                 IEEE80211_IF_TYPE_STA))
509                                                 queue_work(priv->workqueue,
510                                                     &priv->post_associate.work);
511
512                                         priv->call_post_assoc_from_beacon = 0;
513                                 }
514
515                                 break;
516                         }
517
518                 case IEEE80211_STYPE_ACTION:
519                         /* TODO: Parse 802.11h frames for CSA... */
520                         break;
521
522                         /*
523                          * TODO: Use the new callback function from
524                          * mac80211 instead of sniffing these packets.
525                          */
526                 case IEEE80211_STYPE_ASSOC_RESP:
527                 case IEEE80211_STYPE_REASSOC_RESP:{
528                                 struct ieee80211_mgmt *mgnt =
529                                     (struct ieee80211_mgmt *)header;
530
531                                 /* We have just associated, give some
532                                  * time for the 4-way handshake if
533                                  * any. Don't start scan too early. */
534                                 priv->next_scan_jiffies = jiffies +
535                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
536
537                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
538                                                   le16_to_cpu(mgnt->u.
539                                                               assoc_resp.aid));
540                                 priv->assoc_capability =
541                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
542                                 if (priv->beacon_int)
543                                         queue_work(priv->workqueue,
544                                             &priv->post_associate.work);
545                                 else
546                                         priv->call_post_assoc_from_beacon = 1;
547                                 break;
548                         }
549
550                 case IEEE80211_STYPE_PROBE_REQ:{
551                                 DECLARE_MAC_BUF(mac1);
552                                 DECLARE_MAC_BUF(mac2);
553                                 DECLARE_MAC_BUF(mac3);
554                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
555                                         IWL_DEBUG_DROP
556                                             ("Dropping (non network): %s"
557                                              ", %s, %s\n",
558                                              print_mac(mac1, header->addr1),
559                                              print_mac(mac2, header->addr2),
560                                              print_mac(mac3, header->addr3));
561                                 return;
562                         }
563                 }
564
565                 iwl3945_handle_data_packet(priv, 0, rxb, &stats);
566                 break;
567
568         case IEEE80211_FTYPE_CTL:
569                 break;
570
571         case IEEE80211_FTYPE_DATA: {
572                 DECLARE_MAC_BUF(mac1);
573                 DECLARE_MAC_BUF(mac2);
574                 DECLARE_MAC_BUF(mac3);
575
576                 if (unlikely(iwl3945_is_duplicate_packet(priv, header)))
577                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
578                                        print_mac(mac1, header->addr1),
579                                        print_mac(mac2, header->addr2),
580                                        print_mac(mac3, header->addr3));
581                 else
582                         iwl3945_handle_data_packet(priv, 1, rxb, &stats);
583                 break;
584         }
585         }
586 }
587
588 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
589                                  dma_addr_t addr, u16 len)
590 {
591         int count;
592         u32 pad;
593         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
594
595         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
596         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
597
598         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
599                 IWL_ERROR("Error can not send more than %d chunks\n",
600                           NUM_TFD_CHUNKS);
601                 return -EINVAL;
602         }
603
604         tfd->pa[count].addr = cpu_to_le32(addr);
605         tfd->pa[count].len = cpu_to_le32(len);
606
607         count++;
608
609         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
610                                          TFD_CTL_PAD_SET(pad));
611
612         return 0;
613 }
614
615 /**
616  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
617  *
618  * Does NOT advance any indexes
619  */
620 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
621 {
622         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
623         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
624         struct pci_dev *dev = priv->pci_dev;
625         int i;
626         int counter;
627
628         /* classify bd */
629         if (txq->q.id == IWL_CMD_QUEUE_NUM)
630                 /* nothing to cleanup after for host commands */
631                 return 0;
632
633         /* sanity check */
634         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
635         if (counter > NUM_TFD_CHUNKS) {
636                 IWL_ERROR("Too many chunks: %i\n", counter);
637                 /* @todo issue fatal error, it is quite serious situation */
638                 return 0;
639         }
640
641         /* unmap chunks if any */
642
643         for (i = 1; i < counter; i++) {
644                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
645                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
646                 if (txq->txb[txq->q.read_ptr].skb[0]) {
647                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
648                         if (txq->txb[txq->q.read_ptr].skb[0]) {
649                                 /* Can be called from interrupt context */
650                                 dev_kfree_skb_any(skb);
651                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
652                         }
653                 }
654         }
655         return 0;
656 }
657
658 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
659 {
660         int i;
661         int ret = IWL_INVALID_STATION;
662         unsigned long flags;
663         DECLARE_MAC_BUF(mac);
664
665         spin_lock_irqsave(&priv->sta_lock, flags);
666         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
667                 if ((priv->stations[i].used) &&
668                     (!compare_ether_addr
669                      (priv->stations[i].sta.sta.addr, addr))) {
670                         ret = i;
671                         goto out;
672                 }
673
674         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
675                        print_mac(mac, addr), priv->num_stations);
676  out:
677         spin_unlock_irqrestore(&priv->sta_lock, flags);
678         return ret;
679 }
680
681 /**
682  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
683  *
684 */
685 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
686                               struct iwl3945_cmd *cmd,
687                               struct ieee80211_tx_control *ctrl,
688                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
689 {
690         unsigned long flags;
691         u16 rate_index = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
692         u16 rate_mask;
693         int rate;
694         u8 rts_retry_limit;
695         u8 data_retry_limit;
696         __le32 tx_flags;
697         u16 fc = le16_to_cpu(hdr->frame_control);
698
699         rate = iwl3945_rates[rate_index].plcp;
700         tx_flags = cmd->cmd.tx.tx_flags;
701
702         /* We need to figure out how to get the sta->supp_rates while
703          * in this running context; perhaps encoding into ctrl->tx_rate? */
704         rate_mask = IWL_RATES_MASK;
705
706         spin_lock_irqsave(&priv->sta_lock, flags);
707
708         priv->stations[sta_id].current_rate.rate_n_flags = rate;
709
710         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
711             (sta_id != IWL3945_BROADCAST_ID) &&
712                 (sta_id != IWL_MULTICAST_ID))
713                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
714
715         spin_unlock_irqrestore(&priv->sta_lock, flags);
716
717         if (tx_id >= IWL_CMD_QUEUE_NUM)
718                 rts_retry_limit = 3;
719         else
720                 rts_retry_limit = 7;
721
722         if (ieee80211_is_probe_response(fc)) {
723                 data_retry_limit = 3;
724                 if (data_retry_limit < rts_retry_limit)
725                         rts_retry_limit = data_retry_limit;
726         } else
727                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
728
729         if (priv->data_retry_limit != -1)
730                 data_retry_limit = priv->data_retry_limit;
731
732         if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
733                 switch (fc & IEEE80211_FCTL_STYPE) {
734                 case IEEE80211_STYPE_AUTH:
735                 case IEEE80211_STYPE_DEAUTH:
736                 case IEEE80211_STYPE_ASSOC_REQ:
737                 case IEEE80211_STYPE_REASSOC_REQ:
738                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
739                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
740                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
741                         }
742                         break;
743                 default:
744                         break;
745                 }
746         }
747
748         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
749         cmd->cmd.tx.data_retry_limit = data_retry_limit;
750         cmd->cmd.tx.rate = rate;
751         cmd->cmd.tx.tx_flags = tx_flags;
752
753         /* OFDM */
754         cmd->cmd.tx.supp_rates[0] =
755            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
756
757         /* CCK */
758         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
759
760         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
761                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
762                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
763                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
764 }
765
766 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
767 {
768         unsigned long flags_spin;
769         struct iwl3945_station_entry *station;
770
771         if (sta_id == IWL_INVALID_STATION)
772                 return IWL_INVALID_STATION;
773
774         spin_lock_irqsave(&priv->sta_lock, flags_spin);
775         station = &priv->stations[sta_id];
776
777         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
778         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
779         station->current_rate.rate_n_flags = tx_rate;
780         station->sta.mode = STA_CONTROL_MODIFY_MSK;
781
782         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
783
784         iwl3945_send_add_station(priv, &station->sta, flags);
785         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
786                         sta_id, tx_rate);
787         return sta_id;
788 }
789
790 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
791 {
792         int rc;
793         unsigned long flags;
794
795         spin_lock_irqsave(&priv->lock, flags);
796         rc = iwl3945_grab_nic_access(priv);
797         if (rc) {
798                 spin_unlock_irqrestore(&priv->lock, flags);
799                 return rc;
800         }
801
802         if (!pwr_max) {
803                 u32 val;
804
805                 rc = pci_read_config_dword(priv->pci_dev,
806                                 PCI_POWER_SOURCE, &val);
807                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
808                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
809                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
810                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
811                         iwl3945_release_nic_access(priv);
812
813                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
814                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
815                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
816                 } else
817                         iwl3945_release_nic_access(priv);
818         } else {
819                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
820                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
821                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
822
823                 iwl3945_release_nic_access(priv);
824                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
825                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
826         }
827         spin_unlock_irqrestore(&priv->lock, flags);
828
829         return rc;
830 }
831
832 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
833 {
834         int rc;
835         unsigned long flags;
836
837         spin_lock_irqsave(&priv->lock, flags);
838         rc = iwl3945_grab_nic_access(priv);
839         if (rc) {
840                 spin_unlock_irqrestore(&priv->lock, flags);
841                 return rc;
842         }
843
844         iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
845         iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
846                              priv->hw_setting.shared_phys +
847                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
848         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
849         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
850                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
851                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
852                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
853                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
854                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
855                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
856                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
857                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
858
859         /* fake read to flush all prev I/O */
860         iwl3945_read_direct32(priv, FH_RSSR_CTRL);
861
862         iwl3945_release_nic_access(priv);
863         spin_unlock_irqrestore(&priv->lock, flags);
864
865         return 0;
866 }
867
868 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
869 {
870         int rc;
871         unsigned long flags;
872
873         spin_lock_irqsave(&priv->lock, flags);
874         rc = iwl3945_grab_nic_access(priv);
875         if (rc) {
876                 spin_unlock_irqrestore(&priv->lock, flags);
877                 return rc;
878         }
879
880         /* bypass mode */
881         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
882
883         /* RA 0 is active */
884         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
885
886         /* all 6 fifo are active */
887         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
888
889         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
890         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
891         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
892         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
893
894         iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
895                              priv->hw_setting.shared_phys);
896
897         iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
898                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
899                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
900                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
901                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
902                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
903                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
904                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
905
906         iwl3945_release_nic_access(priv);
907         spin_unlock_irqrestore(&priv->lock, flags);
908
909         return 0;
910 }
911
912 /**
913  * iwl3945_txq_ctx_reset - Reset TX queue context
914  *
915  * Destroys all DMA structures and initialize them again
916  */
917 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
918 {
919         int rc;
920         int txq_id, slots_num;
921
922         iwl3945_hw_txq_ctx_free(priv);
923
924         /* Tx CMD queue */
925         rc = iwl3945_tx_reset(priv);
926         if (rc)
927                 goto error;
928
929         /* Tx queue(s) */
930         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
931                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
932                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
933                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
934                                 txq_id);
935                 if (rc) {
936                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
937                         goto error;
938                 }
939         }
940
941         return rc;
942
943  error:
944         iwl3945_hw_txq_ctx_free(priv);
945         return rc;
946 }
947
948 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
949 {
950         u8 rev_id;
951         int rc;
952         unsigned long flags;
953         struct iwl3945_rx_queue *rxq = &priv->rxq;
954
955         iwl3945_power_init_handle(priv);
956
957         spin_lock_irqsave(&priv->lock, flags);
958         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
959         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
960                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
961
962         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
963         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
964                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
965                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
966         if (rc < 0) {
967                 spin_unlock_irqrestore(&priv->lock, flags);
968                 IWL_DEBUG_INFO("Failed to init the card\n");
969                 return rc;
970         }
971
972         rc = iwl3945_grab_nic_access(priv);
973         if (rc) {
974                 spin_unlock_irqrestore(&priv->lock, flags);
975                 return rc;
976         }
977         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
978                                  APMG_CLK_VAL_DMA_CLK_RQT |
979                                  APMG_CLK_VAL_BSM_CLK_RQT);
980         udelay(20);
981         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
982                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
983         iwl3945_release_nic_access(priv);
984         spin_unlock_irqrestore(&priv->lock, flags);
985
986         /* Determine HW type */
987         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
988         if (rc)
989                 return rc;
990         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
991
992         iwl3945_nic_set_pwr_src(priv, 1);
993         spin_lock_irqsave(&priv->lock, flags);
994
995         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
996                 IWL_DEBUG_INFO("RTP type \n");
997         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
998                 IWL_DEBUG_INFO("ALM-MB type\n");
999                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1000                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB);
1001         } else {
1002                 IWL_DEBUG_INFO("ALM-MM type\n");
1003                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1004                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM);
1005         }
1006
1007         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1008                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1009                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1010                             CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1011         } else
1012                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1013
1014         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1015                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1016                                priv->eeprom.board_revision);
1017                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1018                             CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1019         } else {
1020                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1021                                priv->eeprom.board_revision);
1022                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1023                               CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1024         }
1025
1026         if (priv->eeprom.almgor_m_version <= 1) {
1027                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1028                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1029                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1030                                priv->eeprom.almgor_m_version);
1031         } else {
1032                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1033                                priv->eeprom.almgor_m_version);
1034                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1035                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1036         }
1037         spin_unlock_irqrestore(&priv->lock, flags);
1038
1039         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1040                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1041
1042         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1043                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1044
1045         /* Allocate the RX queue, or reset if it is already allocated */
1046         if (!rxq->bd) {
1047                 rc = iwl3945_rx_queue_alloc(priv);
1048                 if (rc) {
1049                         IWL_ERROR("Unable to initialize Rx queue\n");
1050                         return -ENOMEM;
1051                 }
1052         } else
1053                 iwl3945_rx_queue_reset(priv, rxq);
1054
1055         iwl3945_rx_replenish(priv);
1056
1057         iwl3945_rx_init(priv, rxq);
1058
1059         spin_lock_irqsave(&priv->lock, flags);
1060
1061         /* Look at using this instead:
1062         rxq->need_update = 1;
1063         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1064         */
1065
1066         rc = iwl3945_grab_nic_access(priv);
1067         if (rc) {
1068                 spin_unlock_irqrestore(&priv->lock, flags);
1069                 return rc;
1070         }
1071         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1072         iwl3945_release_nic_access(priv);
1073
1074         spin_unlock_irqrestore(&priv->lock, flags);
1075
1076         rc = iwl3945_txq_ctx_reset(priv);
1077         if (rc)
1078                 return rc;
1079
1080         set_bit(STATUS_INIT, &priv->status);
1081
1082         return 0;
1083 }
1084
1085 /**
1086  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1087  *
1088  * Destroy all TX DMA queues and structures
1089  */
1090 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1091 {
1092         int txq_id;
1093
1094         /* Tx queues */
1095         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1096                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1097 }
1098
1099 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1100 {
1101         int queue;
1102         unsigned long flags;
1103
1104         spin_lock_irqsave(&priv->lock, flags);
1105         if (iwl3945_grab_nic_access(priv)) {
1106                 spin_unlock_irqrestore(&priv->lock, flags);
1107                 iwl3945_hw_txq_ctx_free(priv);
1108                 return;
1109         }
1110
1111         /* stop SCD */
1112         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1113
1114         /* reset TFD queues */
1115         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1116                 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1117                 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1118                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1119                                 1000);
1120         }
1121
1122         iwl3945_release_nic_access(priv);
1123         spin_unlock_irqrestore(&priv->lock, flags);
1124
1125         iwl3945_hw_txq_ctx_free(priv);
1126 }
1127
1128 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1129 {
1130         int rc = 0;
1131         u32 reg_val;
1132         unsigned long flags;
1133
1134         spin_lock_irqsave(&priv->lock, flags);
1135
1136         /* set stop master bit */
1137         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1138
1139         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1140
1141         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1142             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1143                 IWL_DEBUG_INFO("Card in power save, master is already "
1144                                "stopped\n");
1145         else {
1146                 rc = iwl3945_poll_bit(priv, CSR_RESET,
1147                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1148                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1149                 if (rc < 0) {
1150                         spin_unlock_irqrestore(&priv->lock, flags);
1151                         return rc;
1152                 }
1153         }
1154
1155         spin_unlock_irqrestore(&priv->lock, flags);
1156         IWL_DEBUG_INFO("stop master\n");
1157
1158         return rc;
1159 }
1160
1161 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1162 {
1163         int rc;
1164         unsigned long flags;
1165
1166         iwl3945_hw_nic_stop_master(priv);
1167
1168         spin_lock_irqsave(&priv->lock, flags);
1169
1170         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1171
1172         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1173                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1174                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1175
1176         rc = iwl3945_grab_nic_access(priv);
1177         if (!rc) {
1178                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1179                                          APMG_CLK_VAL_BSM_CLK_RQT);
1180
1181                 udelay(10);
1182
1183                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1184                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1185
1186                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1187                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1188                                         0xFFFFFFFF);
1189
1190                 /* enable DMA */
1191                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1192                                          APMG_CLK_VAL_DMA_CLK_RQT |
1193                                          APMG_CLK_VAL_BSM_CLK_RQT);
1194                 udelay(10);
1195
1196                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1197                                 APMG_PS_CTRL_VAL_RESET_REQ);
1198                 udelay(5);
1199                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1200                                 APMG_PS_CTRL_VAL_RESET_REQ);
1201                 iwl3945_release_nic_access(priv);
1202         }
1203
1204         /* Clear the 'host command active' bit... */
1205         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1206
1207         wake_up_interruptible(&priv->wait_command_queue);
1208         spin_unlock_irqrestore(&priv->lock, flags);
1209
1210         return rc;
1211 }
1212
1213 /**
1214  * iwl3945_hw_reg_adjust_power_by_temp
1215  * return index delta into power gain settings table
1216 */
1217 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1218 {
1219         return (new_reading - old_reading) * (-11) / 100;
1220 }
1221
1222 /**
1223  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1224  */
1225 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1226 {
1227         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1228 }
1229
1230 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1231 {
1232         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1233 }
1234
1235 /**
1236  * iwl3945_hw_reg_txpower_get_temperature
1237  * get the current temperature by reading from NIC
1238 */
1239 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1240 {
1241         int temperature;
1242
1243         temperature = iwl3945_hw_get_temperature(priv);
1244
1245         /* driver's okay range is -260 to +25.
1246          *   human readable okay range is 0 to +285 */
1247         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1248
1249         /* handle insane temp reading */
1250         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1251                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1252
1253                 /* if really really hot(?),
1254                  *   substitute the 3rd band/group's temp measured at factory */
1255                 if (priv->last_temperature > 100)
1256                         temperature = priv->eeprom.groups[2].temperature;
1257                 else /* else use most recent "sane" value from driver */
1258                         temperature = priv->last_temperature;
1259         }
1260
1261         return temperature;     /* raw, not "human readable" */
1262 }
1263
1264 /* Adjust Txpower only if temperature variance is greater than threshold.
1265  *
1266  * Both are lower than older versions' 9 degrees */
1267 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1268
1269 /**
1270  * is_temp_calib_needed - determines if new calibration is needed
1271  *
1272  * records new temperature in tx_mgr->temperature.
1273  * replaces tx_mgr->last_temperature *only* if calib needed
1274  *    (assumes caller will actually do the calibration!). */
1275 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1276 {
1277         int temp_diff;
1278
1279         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1280         temp_diff = priv->temperature - priv->last_temperature;
1281
1282         /* get absolute value */
1283         if (temp_diff < 0) {
1284                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1285                 temp_diff = -temp_diff;
1286         } else if (temp_diff == 0)
1287                 IWL_DEBUG_POWER("Same temp,\n");
1288         else
1289                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1290
1291         /* if we don't need calibration, *don't* update last_temperature */
1292         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1293                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1294                 return 0;
1295         }
1296
1297         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1298
1299         /* assume that caller will actually do calib ...
1300          *   update the "last temperature" value */
1301         priv->last_temperature = priv->temperature;
1302         return 1;
1303 }
1304
1305 #define IWL_MAX_GAIN_ENTRIES 78
1306 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1307 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1308
1309 /* radio and DSP power table, each step is 1/2 dB.
1310  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1311 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1312         {
1313          {251, 127},            /* 2.4 GHz, highest power */
1314          {251, 127},
1315          {251, 127},
1316          {251, 127},
1317          {251, 125},
1318          {251, 110},
1319          {251, 105},
1320          {251, 98},
1321          {187, 125},
1322          {187, 115},
1323          {187, 108},
1324          {187, 99},
1325          {243, 119},
1326          {243, 111},
1327          {243, 105},
1328          {243, 97},
1329          {243, 92},
1330          {211, 106},
1331          {211, 100},
1332          {179, 120},
1333          {179, 113},
1334          {179, 107},
1335          {147, 125},
1336          {147, 119},
1337          {147, 112},
1338          {147, 106},
1339          {147, 101},
1340          {147, 97},
1341          {147, 91},
1342          {115, 107},
1343          {235, 121},
1344          {235, 115},
1345          {235, 109},
1346          {203, 127},
1347          {203, 121},
1348          {203, 115},
1349          {203, 108},
1350          {203, 102},
1351          {203, 96},
1352          {203, 92},
1353          {171, 110},
1354          {171, 104},
1355          {171, 98},
1356          {139, 116},
1357          {227, 125},
1358          {227, 119},
1359          {227, 113},
1360          {227, 107},
1361          {227, 101},
1362          {227, 96},
1363          {195, 113},
1364          {195, 106},
1365          {195, 102},
1366          {195, 95},
1367          {163, 113},
1368          {163, 106},
1369          {163, 102},
1370          {163, 95},
1371          {131, 113},
1372          {131, 106},
1373          {131, 102},
1374          {131, 95},
1375          {99, 113},
1376          {99, 106},
1377          {99, 102},
1378          {99, 95},
1379          {67, 113},
1380          {67, 106},
1381          {67, 102},
1382          {67, 95},
1383          {35, 113},
1384          {35, 106},
1385          {35, 102},
1386          {35, 95},
1387          {3, 113},
1388          {3, 106},
1389          {3, 102},
1390          {3, 95} },             /* 2.4 GHz, lowest power */
1391         {
1392          {251, 127},            /* 5.x GHz, highest power */
1393          {251, 120},
1394          {251, 114},
1395          {219, 119},
1396          {219, 101},
1397          {187, 113},
1398          {187, 102},
1399          {155, 114},
1400          {155, 103},
1401          {123, 117},
1402          {123, 107},
1403          {123, 99},
1404          {123, 92},
1405          {91, 108},
1406          {59, 125},
1407          {59, 118},
1408          {59, 109},
1409          {59, 102},
1410          {59, 96},
1411          {59, 90},
1412          {27, 104},
1413          {27, 98},
1414          {27, 92},
1415          {115, 118},
1416          {115, 111},
1417          {115, 104},
1418          {83, 126},
1419          {83, 121},
1420          {83, 113},
1421          {83, 105},
1422          {83, 99},
1423          {51, 118},
1424          {51, 111},
1425          {51, 104},
1426          {51, 98},
1427          {19, 116},
1428          {19, 109},
1429          {19, 102},
1430          {19, 98},
1431          {19, 93},
1432          {171, 113},
1433          {171, 107},
1434          {171, 99},
1435          {139, 120},
1436          {139, 113},
1437          {139, 107},
1438          {139, 99},
1439          {107, 120},
1440          {107, 113},
1441          {107, 107},
1442          {107, 99},
1443          {75, 120},
1444          {75, 113},
1445          {75, 107},
1446          {75, 99},
1447          {43, 120},
1448          {43, 113},
1449          {43, 107},
1450          {43, 99},
1451          {11, 120},
1452          {11, 113},
1453          {11, 107},
1454          {11, 99},
1455          {131, 107},
1456          {131, 99},
1457          {99, 120},
1458          {99, 113},
1459          {99, 107},
1460          {99, 99},
1461          {67, 120},
1462          {67, 113},
1463          {67, 107},
1464          {67, 99},
1465          {35, 120},
1466          {35, 113},
1467          {35, 107},
1468          {35, 99},
1469          {3, 120} }             /* 5.x GHz, lowest power */
1470 };
1471
1472 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1473 {
1474         if (index < 0)
1475                 return 0;
1476         if (index >= IWL_MAX_GAIN_ENTRIES)
1477                 return IWL_MAX_GAIN_ENTRIES - 1;
1478         return (u8) index;
1479 }
1480
1481 /* Kick off thermal recalibration check every 60 seconds */
1482 #define REG_RECALIB_PERIOD (60)
1483
1484 /**
1485  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1486  *
1487  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1488  * or 6 Mbit (OFDM) rates.
1489  */
1490 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1491                                s32 rate_index, const s8 *clip_pwrs,
1492                                struct iwl3945_channel_info *ch_info,
1493                                int band_index)
1494 {
1495         struct iwl3945_scan_power_info *scan_power_info;
1496         s8 power;
1497         u8 power_index;
1498
1499         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1500
1501         /* use this channel group's 6Mbit clipping/saturation pwr,
1502          *   but cap at regulatory scan power restriction (set during init
1503          *   based on eeprom channel data) for this channel.  */
1504         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1505
1506         /* further limit to user's max power preference.
1507          * FIXME:  Other spectrum management power limitations do not
1508          *   seem to apply?? */
1509         power = min(power, priv->user_txpower_limit);
1510         scan_power_info->requested_power = power;
1511
1512         /* find difference between new scan *power* and current "normal"
1513          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1514          *   current "normal" temperature-compensated Tx power *index* for
1515          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1516          *   *index*. */
1517         power_index = ch_info->power_info[rate_index].power_table_index
1518             - (power - ch_info->power_info
1519                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1520
1521         /* store reference index that we use when adjusting *all* scan
1522          *   powers.  So we can accommodate user (all channel) or spectrum
1523          *   management (single channel) power changes "between" temperature
1524          *   feedback compensation procedures.
1525          * don't force fit this reference index into gain table; it may be a
1526          *   negative number.  This will help avoid errors when we're at
1527          *   the lower bounds (highest gains, for warmest temperatures)
1528          *   of the table. */
1529
1530         /* don't exceed table bounds for "real" setting */
1531         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1532
1533         scan_power_info->power_table_index = power_index;
1534         scan_power_info->tpc.tx_gain =
1535             power_gain_table[band_index][power_index].tx_gain;
1536         scan_power_info->tpc.dsp_atten =
1537             power_gain_table[band_index][power_index].dsp_atten;
1538 }
1539
1540 /**
1541  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1542  *
1543  * Configures power settings for all rates for the current channel,
1544  * using values from channel info struct, and send to NIC
1545  */
1546 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1547 {
1548         int rate_idx, i;
1549         const struct iwl3945_channel_info *ch_info = NULL;
1550         struct iwl3945_txpowertable_cmd txpower = {
1551                 .channel = priv->active_rxon.channel,
1552         };
1553
1554         txpower.band = (priv->phymode == MODE_IEEE80211A) ? 0 : 1;
1555         ch_info = iwl3945_get_channel_info(priv,
1556                                        priv->phymode,
1557                                        le16_to_cpu(priv->active_rxon.channel));
1558         if (!ch_info) {
1559                 IWL_ERROR
1560                     ("Failed to get channel info for channel %d [%d]\n",
1561                      le16_to_cpu(priv->active_rxon.channel), priv->phymode);
1562                 return -EINVAL;
1563         }
1564
1565         if (!is_channel_valid(ch_info)) {
1566                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1567                                 "non-Tx channel.\n");
1568                 return 0;
1569         }
1570
1571         /* fill cmd with power settings for all rates for current channel */
1572         /* Fill OFDM rate */
1573         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1574              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1575
1576                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1577                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1578
1579                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1580                                 le16_to_cpu(txpower.channel),
1581                                 txpower.band,
1582                                 txpower.power[i].tpc.tx_gain,
1583                                 txpower.power[i].tpc.dsp_atten,
1584                                 txpower.power[i].rate);
1585         }
1586         /* Fill CCK rates */
1587         for (rate_idx = IWL_FIRST_CCK_RATE;
1588              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1589                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1590                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1591
1592                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1593                                 le16_to_cpu(txpower.channel),
1594                                 txpower.band,
1595                                 txpower.power[i].tpc.tx_gain,
1596                                 txpower.power[i].tpc.dsp_atten,
1597                                 txpower.power[i].rate);
1598         }
1599
1600         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1601                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1602
1603 }
1604
1605 /**
1606  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1607  * @ch_info: Channel to update.  Uses power_info.requested_power.
1608  *
1609  * Replace requested_power and base_power_index ch_info fields for
1610  * one channel.
1611  *
1612  * Called if user or spectrum management changes power preferences.
1613  * Takes into account h/w and modulation limitations (clip power).
1614  *
1615  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1616  *
1617  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1618  *       properly fill out the scan powers, and actual h/w gain settings,
1619  *       and send changes to NIC
1620  */
1621 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1622                              struct iwl3945_channel_info *ch_info)
1623 {
1624         struct iwl3945_channel_power_info *power_info;
1625         int power_changed = 0;
1626         int i;
1627         const s8 *clip_pwrs;
1628         int power;
1629
1630         /* Get this chnlgrp's rate-to-max/clip-powers table */
1631         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1632
1633         /* Get this channel's rate-to-current-power settings table */
1634         power_info = ch_info->power_info;
1635
1636         /* update OFDM Txpower settings */
1637         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1638              i++, ++power_info) {
1639                 int delta_idx;
1640
1641                 /* limit new power to be no more than h/w capability */
1642                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1643                 if (power == power_info->requested_power)
1644                         continue;
1645
1646                 /* find difference between old and new requested powers,
1647                  *    update base (non-temp-compensated) power index */
1648                 delta_idx = (power - power_info->requested_power) * 2;
1649                 power_info->base_power_index -= delta_idx;
1650
1651                 /* save new requested power value */
1652                 power_info->requested_power = power;
1653
1654                 power_changed = 1;
1655         }
1656
1657         /* update CCK Txpower settings, based on OFDM 12M setting ...
1658          *    ... all CCK power settings for a given channel are the *same*. */
1659         if (power_changed) {
1660                 power =
1661                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1662                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1663
1664                 /* do all CCK rates' iwl3945_channel_power_info structures */
1665                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1666                         power_info->requested_power = power;
1667                         power_info->base_power_index =
1668                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1669                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1670                         ++power_info;
1671                 }
1672         }
1673
1674         return 0;
1675 }
1676
1677 /**
1678  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1679  *
1680  * NOTE: Returned power limit may be less (but not more) than requested,
1681  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1682  *       (no consideration for h/w clipping limitations).
1683  */
1684 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1685 {
1686         s8 max_power;
1687
1688 #if 0
1689         /* if we're using TGd limits, use lower of TGd or EEPROM */
1690         if (ch_info->tgd_data.max_power != 0)
1691                 max_power = min(ch_info->tgd_data.max_power,
1692                                 ch_info->eeprom.max_power_avg);
1693
1694         /* else just use EEPROM limits */
1695         else
1696 #endif
1697                 max_power = ch_info->eeprom.max_power_avg;
1698
1699         return min(max_power, ch_info->max_power_avg);
1700 }
1701
1702 /**
1703  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1704  *
1705  * Compensate txpower settings of *all* channels for temperature.
1706  * This only accounts for the difference between current temperature
1707  *   and the factory calibration temperatures, and bases the new settings
1708  *   on the channel's base_power_index.
1709  *
1710  * If RxOn is "associated", this sends the new Txpower to NIC!
1711  */
1712 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1713 {
1714         struct iwl3945_channel_info *ch_info = NULL;
1715         int delta_index;
1716         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1717         u8 a_band;
1718         u8 rate_index;
1719         u8 scan_tbl_index;
1720         u8 i;
1721         int ref_temp;
1722         int temperature = priv->temperature;
1723
1724         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1725         for (i = 0; i < priv->channel_count; i++) {
1726                 ch_info = &priv->channel_info[i];
1727                 a_band = is_channel_a_band(ch_info);
1728
1729                 /* Get this chnlgrp's factory calibration temperature */
1730                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1731                     temperature;
1732
1733                 /* get power index adjustment based on curr and factory
1734                  * temps */
1735                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1736                                                               ref_temp);
1737
1738                 /* set tx power value for all rates, OFDM and CCK */
1739                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1740                      rate_index++) {
1741                         int power_idx =
1742                             ch_info->power_info[rate_index].base_power_index;
1743
1744                         /* temperature compensate */
1745                         power_idx += delta_index;
1746
1747                         /* stay within table range */
1748                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1749                         ch_info->power_info[rate_index].
1750                             power_table_index = (u8) power_idx;
1751                         ch_info->power_info[rate_index].tpc =
1752                             power_gain_table[a_band][power_idx];
1753                 }
1754
1755                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1756                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1757
1758                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1759                 for (scan_tbl_index = 0;
1760                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1761                         s32 actual_index = (scan_tbl_index == 0) ?
1762                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1763                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1764                                            actual_index, clip_pwrs,
1765                                            ch_info, a_band);
1766                 }
1767         }
1768
1769         /* send Txpower command for current channel to ucode */
1770         return iwl3945_hw_reg_send_txpower(priv);
1771 }
1772
1773 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
1774 {
1775         struct iwl3945_channel_info *ch_info;
1776         s8 max_power;
1777         u8 a_band;
1778         u8 i;
1779
1780         if (priv->user_txpower_limit == power) {
1781                 IWL_DEBUG_POWER("Requested Tx power same as current "
1782                                 "limit: %ddBm.\n", power);
1783                 return 0;
1784         }
1785
1786         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1787         priv->user_txpower_limit = power;
1788
1789         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1790
1791         for (i = 0; i < priv->channel_count; i++) {
1792                 ch_info = &priv->channel_info[i];
1793                 a_band = is_channel_a_band(ch_info);
1794
1795                 /* find minimum power of all user and regulatory constraints
1796                  *    (does not consider h/w clipping limitations) */
1797                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1798                 max_power = min(power, max_power);
1799                 if (max_power != ch_info->curr_txpow) {
1800                         ch_info->curr_txpow = max_power;
1801
1802                         /* this considers the h/w clipping limitations */
1803                         iwl3945_hw_reg_set_new_power(priv, ch_info);
1804                 }
1805         }
1806
1807         /* update txpower settings for all channels,
1808          *   send to NIC if associated. */
1809         is_temp_calib_needed(priv);
1810         iwl3945_hw_reg_comp_txpower_temp(priv);
1811
1812         return 0;
1813 }
1814
1815 /* will add 3945 channel switch cmd handling later */
1816 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
1817 {
1818         return 0;
1819 }
1820
1821 /**
1822  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1823  *
1824  * -- reset periodic timer
1825  * -- see if temp has changed enough to warrant re-calibration ... if so:
1826  *     -- correct coeffs for temp (can reset temp timer)
1827  *     -- save this temp as "last",
1828  *     -- send new set of gain settings to NIC
1829  * NOTE:  This should continue working, even when we're not associated,
1830  *   so we can keep our internal table of scan powers current. */
1831 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
1832 {
1833         /* This will kick in the "brute force"
1834          * iwl3945_hw_reg_comp_txpower_temp() below */
1835         if (!is_temp_calib_needed(priv))
1836                 goto reschedule;
1837
1838         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1839          * This is based *only* on current temperature,
1840          * ignoring any previous power measurements */
1841         iwl3945_hw_reg_comp_txpower_temp(priv);
1842
1843  reschedule:
1844         queue_delayed_work(priv->workqueue,
1845                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1846 }
1847
1848 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1849 {
1850         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
1851                                              thermal_periodic.work);
1852
1853         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1854                 return;
1855
1856         mutex_lock(&priv->mutex);
1857         iwl3945_reg_txpower_periodic(priv);
1858         mutex_unlock(&priv->mutex);
1859 }
1860
1861 /**
1862  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1863  *                                 for the channel.
1864  *
1865  * This function is used when initializing channel-info structs.
1866  *
1867  * NOTE: These channel groups do *NOT* match the bands above!
1868  *       These channel groups are based on factory-tested channels;
1869  *       on A-band, EEPROM's "group frequency" entries represent the top
1870  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1871  */
1872 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
1873                                        const struct iwl3945_channel_info *ch_info)
1874 {
1875         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
1876         u8 group;
1877         u16 group_index = 0;    /* based on factory calib frequencies */
1878         u8 grp_channel;
1879
1880         /* Find the group index for the channel ... don't use index 1(?) */
1881         if (is_channel_a_band(ch_info)) {
1882                 for (group = 1; group < 5; group++) {
1883                         grp_channel = ch_grp[group].group_channel;
1884                         if (ch_info->channel <= grp_channel) {
1885                                 group_index = group;
1886                                 break;
1887                         }
1888                 }
1889                 /* group 4 has a few channels *above* its factory cal freq */
1890                 if (group == 5)
1891                         group_index = 4;
1892         } else
1893                 group_index = 0;        /* 2.4 GHz, group 0 */
1894
1895         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
1896                         group_index);
1897         return group_index;
1898 }
1899
1900 /**
1901  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
1902  *
1903  * Interpolate to get nominal (i.e. at factory calibration temperature) index
1904  *   into radio/DSP gain settings table for requested power.
1905  */
1906 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
1907                                        s8 requested_power,
1908                                        s32 setting_index, s32 *new_index)
1909 {
1910         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
1911         s32 index0, index1;
1912         s32 power = 2 * requested_power;
1913         s32 i;
1914         const struct iwl3945_eeprom_txpower_sample *samples;
1915         s32 gains0, gains1;
1916         s32 res;
1917         s32 denominator;
1918
1919         chnl_grp = &priv->eeprom.groups[setting_index];
1920         samples = chnl_grp->samples;
1921         for (i = 0; i < 5; i++) {
1922                 if (power == samples[i].power) {
1923                         *new_index = samples[i].gain_index;
1924                         return 0;
1925                 }
1926         }
1927
1928         if (power > samples[1].power) {
1929                 index0 = 0;
1930                 index1 = 1;
1931         } else if (power > samples[2].power) {
1932                 index0 = 1;
1933                 index1 = 2;
1934         } else if (power > samples[3].power) {
1935                 index0 = 2;
1936                 index1 = 3;
1937         } else {
1938                 index0 = 3;
1939                 index1 = 4;
1940         }
1941
1942         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
1943         if (denominator == 0)
1944                 return -EINVAL;
1945         gains0 = (s32) samples[index0].gain_index * (1 << 19);
1946         gains1 = (s32) samples[index1].gain_index * (1 << 19);
1947         res = gains0 + (gains1 - gains0) *
1948             ((s32) power - (s32) samples[index0].power) / denominator +
1949             (1 << 18);
1950         *new_index = res >> 19;
1951         return 0;
1952 }
1953
1954 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
1955 {
1956         u32 i;
1957         s32 rate_index;
1958         const struct iwl3945_eeprom_txpower_group *group;
1959
1960         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
1961
1962         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
1963                 s8 *clip_pwrs;  /* table of power levels for each rate */
1964                 s8 satur_pwr;   /* saturation power for each chnl group */
1965                 group = &priv->eeprom.groups[i];
1966
1967                 /* sanity check on factory saturation power value */
1968                 if (group->saturation_power < 40) {
1969                         IWL_WARNING("Error: saturation power is %d, "
1970                                     "less than minimum expected 40\n",
1971                                     group->saturation_power);
1972                         return;
1973                 }
1974
1975                 /*
1976                  * Derive requested power levels for each rate, based on
1977                  *   hardware capabilities (saturation power for band).
1978                  * Basic value is 3dB down from saturation, with further
1979                  *   power reductions for highest 3 data rates.  These
1980                  *   backoffs provide headroom for high rate modulation
1981                  *   power peaks, without too much distortion (clipping).
1982                  */
1983                 /* we'll fill in this array with h/w max power levels */
1984                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
1985
1986                 /* divide factory saturation power by 2 to find -3dB level */
1987                 satur_pwr = (s8) (group->saturation_power >> 1);
1988
1989                 /* fill in channel group's nominal powers for each rate */
1990                 for (rate_index = 0;
1991                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
1992                         switch (rate_index) {
1993                         case IWL_RATE_36M_INDEX_TABLE:
1994                                 if (i == 0)     /* B/G */
1995                                         *clip_pwrs = satur_pwr;
1996                                 else    /* A */
1997                                         *clip_pwrs = satur_pwr - 5;
1998                                 break;
1999                         case IWL_RATE_48M_INDEX_TABLE:
2000                                 if (i == 0)
2001                                         *clip_pwrs = satur_pwr - 7;
2002                                 else
2003                                         *clip_pwrs = satur_pwr - 10;
2004                                 break;
2005                         case IWL_RATE_54M_INDEX_TABLE:
2006                                 if (i == 0)
2007                                         *clip_pwrs = satur_pwr - 9;
2008                                 else
2009                                         *clip_pwrs = satur_pwr - 12;
2010                                 break;
2011                         default:
2012                                 *clip_pwrs = satur_pwr;
2013                                 break;
2014                         }
2015                 }
2016         }
2017 }
2018
2019 /**
2020  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2021  *
2022  * Second pass (during init) to set up priv->channel_info
2023  *
2024  * Set up Tx-power settings in our channel info database for each VALID
2025  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2026  * and current temperature.
2027  *
2028  * Since this is based on current temperature (at init time), these values may
2029  * not be valid for very long, but it gives us a starting/default point,
2030  * and allows us to active (i.e. using Tx) scan.
2031  *
2032  * This does *not* write values to NIC, just sets up our internal table.
2033  */
2034 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2035 {
2036         struct iwl3945_channel_info *ch_info = NULL;
2037         struct iwl3945_channel_power_info *pwr_info;
2038         int delta_index;
2039         u8 rate_index;
2040         u8 scan_tbl_index;
2041         const s8 *clip_pwrs;    /* array of power levels for each rate */
2042         u8 gain, dsp_atten;
2043         s8 power;
2044         u8 pwr_index, base_pwr_index, a_band;
2045         u8 i;
2046         int temperature;
2047
2048         /* save temperature reference,
2049          *   so we can determine next time to calibrate */
2050         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2051         priv->last_temperature = temperature;
2052
2053         iwl3945_hw_reg_init_channel_groups(priv);
2054
2055         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2056         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2057              i++, ch_info++) {
2058                 a_band = is_channel_a_band(ch_info);
2059                 if (!is_channel_valid(ch_info))
2060                         continue;
2061
2062                 /* find this channel's channel group (*not* "band") index */
2063                 ch_info->group_index =
2064                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2065
2066                 /* Get this chnlgrp's rate->max/clip-powers table */
2067                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2068
2069                 /* calculate power index *adjustment* value according to
2070                  *  diff between current temperature and factory temperature */
2071                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2072                                 priv->eeprom.groups[ch_info->group_index].
2073                                 temperature);
2074
2075                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2076                                 ch_info->channel, delta_index, temperature +
2077                                 IWL_TEMP_CONVERT);
2078
2079                 /* set tx power value for all OFDM rates */
2080                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2081                      rate_index++) {
2082                         s32 power_idx;
2083                         int rc;
2084
2085                         /* use channel group's clip-power table,
2086                          *   but don't exceed channel's max power */
2087                         s8 pwr = min(ch_info->max_power_avg,
2088                                      clip_pwrs[rate_index]);
2089
2090                         pwr_info = &ch_info->power_info[rate_index];
2091
2092                         /* get base (i.e. at factory-measured temperature)
2093                          *    power table index for this rate's power */
2094                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2095                                                          ch_info->group_index,
2096                                                          &power_idx);
2097                         if (rc) {
2098                                 IWL_ERROR("Invalid power index\n");
2099                                 return rc;
2100                         }
2101                         pwr_info->base_power_index = (u8) power_idx;
2102
2103                         /* temperature compensate */
2104                         power_idx += delta_index;
2105
2106                         /* stay within range of gain table */
2107                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2108
2109                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2110                         pwr_info->requested_power = pwr;
2111                         pwr_info->power_table_index = (u8) power_idx;
2112                         pwr_info->tpc.tx_gain =
2113                             power_gain_table[a_band][power_idx].tx_gain;
2114                         pwr_info->tpc.dsp_atten =
2115                             power_gain_table[a_band][power_idx].dsp_atten;
2116                 }
2117
2118                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2119                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2120                 power = pwr_info->requested_power +
2121                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2122                 pwr_index = pwr_info->power_table_index +
2123                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2124                 base_pwr_index = pwr_info->base_power_index +
2125                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2126
2127                 /* stay within table range */
2128                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2129                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2130                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2131
2132                 /* fill each CCK rate's iwl3945_channel_power_info structure
2133                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2134                  * NOTE:  CCK rates start at end of OFDM rates! */
2135                 for (rate_index = 0;
2136                      rate_index < IWL_CCK_RATES; rate_index++) {
2137                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2138                         pwr_info->requested_power = power;
2139                         pwr_info->power_table_index = pwr_index;
2140                         pwr_info->base_power_index = base_pwr_index;
2141                         pwr_info->tpc.tx_gain = gain;
2142                         pwr_info->tpc.dsp_atten = dsp_atten;
2143                 }
2144
2145                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2146                 for (scan_tbl_index = 0;
2147                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2148                         s32 actual_index = (scan_tbl_index == 0) ?
2149                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2150                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2151                                 actual_index, clip_pwrs, ch_info, a_band);
2152                 }
2153         }
2154
2155         return 0;
2156 }
2157
2158 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2159 {
2160         int rc;
2161         unsigned long flags;
2162
2163         spin_lock_irqsave(&priv->lock, flags);
2164         rc = iwl3945_grab_nic_access(priv);
2165         if (rc) {
2166                 spin_unlock_irqrestore(&priv->lock, flags);
2167                 return rc;
2168         }
2169
2170         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2171         rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2172         if (rc < 0)
2173                 IWL_ERROR("Can't stop Rx DMA.\n");
2174
2175         iwl3945_release_nic_access(priv);
2176         spin_unlock_irqrestore(&priv->lock, flags);
2177
2178         return 0;
2179 }
2180
2181 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2182 {
2183         int rc;
2184         unsigned long flags;
2185         int txq_id = txq->q.id;
2186
2187         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2188
2189         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2190
2191         spin_lock_irqsave(&priv->lock, flags);
2192         rc = iwl3945_grab_nic_access(priv);
2193         if (rc) {
2194                 spin_unlock_irqrestore(&priv->lock, flags);
2195                 return rc;
2196         }
2197         iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2198         iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2199
2200         iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2201                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2202                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2203                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2204                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2205                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2206         iwl3945_release_nic_access(priv);
2207
2208         /* fake read to flush all prev. writes */
2209         iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2210         spin_unlock_irqrestore(&priv->lock, flags);
2211
2212         return 0;
2213 }
2214
2215 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2216 {
2217         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2218
2219         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2220 }
2221
2222 /**
2223  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2224  */
2225 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2226 {
2227         int rc, i, index, prev_index;
2228         struct iwl3945_rate_scaling_cmd rate_cmd = {
2229                 .reserved = {0, 0, 0},
2230         };
2231         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2232
2233         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2234                 index = iwl3945_rates[i].table_rs_index;
2235
2236                 table[index].rate_n_flags =
2237                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2238                 table[index].try_cnt = priv->retry_rate;
2239                 prev_index = iwl3945_get_prev_ieee_rate(i);
2240                 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2241         }
2242
2243         switch (priv->phymode) {
2244         case MODE_IEEE80211A:
2245                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2246                 /* If one of the following CCK rates is used,
2247                  * have it fall back to the 6M OFDM rate */
2248                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2249                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2250
2251                 /* Don't fall back to CCK rates */
2252                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2253
2254                 /* Don't drop out of OFDM rates */
2255                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2256                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2257                 break;
2258
2259         case MODE_IEEE80211B:
2260                 IWL_DEBUG_RATE("Select B mode rate scale\n");
2261                 /* If an OFDM rate is used, have it fall back to the
2262                  * 1M CCK rates */
2263                 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2264                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2265
2266                 /* CCK shouldn't fall back to OFDM... */
2267                 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2268                 break;
2269
2270         default:
2271                 IWL_DEBUG_RATE("Select G mode rate scale\n");
2272                 break;
2273         }
2274
2275         /* Update the rate scaling for control frame Tx */
2276         rate_cmd.table_id = 0;
2277         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2278                               &rate_cmd);
2279         if (rc)
2280                 return rc;
2281
2282         /* Update the rate scaling for data frame Tx */
2283         rate_cmd.table_id = 1;
2284         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2285                                 &rate_cmd);
2286 }
2287
2288 /* Called when initializing driver */
2289 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2290 {
2291         memset((void *)&priv->hw_setting, 0,
2292                sizeof(struct iwl3945_driver_hw_info));
2293
2294         priv->hw_setting.shared_virt =
2295             pci_alloc_consistent(priv->pci_dev,
2296                                  sizeof(struct iwl3945_shared),
2297                                  &priv->hw_setting.shared_phys);
2298
2299         if (!priv->hw_setting.shared_virt) {
2300                 IWL_ERROR("failed to allocate pci memory\n");
2301                 mutex_unlock(&priv->mutex);
2302                 return -ENOMEM;
2303         }
2304
2305         priv->hw_setting.ac_queue_count = AC_NUM;
2306         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2307         priv->hw_setting.max_pkt_size = 2342;
2308         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2309         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2310         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2311         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2312         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2313         return 0;
2314 }
2315
2316 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2317                           struct iwl3945_frame *frame, u8 rate)
2318 {
2319         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2320         unsigned int frame_size;
2321
2322         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2323         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2324
2325         tx_beacon_cmd->tx.sta_id = IWL3945_BROADCAST_ID;
2326         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2327
2328         frame_size = iwl3945_fill_beacon_frame(priv,
2329                                 tx_beacon_cmd->frame,
2330                                 iwl3945_broadcast_addr,
2331                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2332
2333         BUG_ON(frame_size > MAX_MPDU_SIZE);
2334         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2335
2336         tx_beacon_cmd->tx.rate = rate;
2337         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2338                                       TX_CMD_FLG_TSF_MSK);
2339
2340         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2341         tx_beacon_cmd->tx.supp_rates[0] =
2342                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2343
2344         tx_beacon_cmd->tx.supp_rates[1] =
2345                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2346
2347         return (sizeof(struct iwl3945_tx_beacon_cmd) + frame_size);
2348 }
2349
2350 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2351 {
2352         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2353 }
2354
2355 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2356 {
2357         INIT_DELAYED_WORK(&priv->thermal_periodic,
2358                           iwl3945_bg_reg_txpower_periodic);
2359 }
2360
2361 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2362 {
2363         cancel_delayed_work(&priv->thermal_periodic);
2364 }
2365
2366 struct pci_device_id iwl3945_hw_card_ids[] = {
2367         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4222)},
2368         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4227)},
2369         {0}
2370 };
2371
2372 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);