ath: move ath_bcast_mac to common header
[linux-2.6.git] / drivers / net / wireless / ath / ath5k / attach.c
1 /*
2  * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3  * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
4  *
5  * Permission to use, copy, modify, and distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  *
17  */
18
19 /*************************************\
20 * Attach/Detach Functions and helpers *
21 \*************************************/
22
23 #include <linux/pci.h>
24 #include "ath5k.h"
25 #include "reg.h"
26 #include "debug.h"
27 #include "base.h"
28
29 /**
30  * ath5k_hw_post - Power On Self Test helper function
31  *
32  * @ah: The &struct ath5k_hw
33  */
34 static int ath5k_hw_post(struct ath5k_hw *ah)
35 {
36
37         static const u32 static_pattern[4] = {
38                 0x55555555,     0xaaaaaaaa,
39                 0x66666666,     0x99999999
40         };
41         static const u16 regs[2] = { AR5K_STA_ID0, AR5K_PHY(8) };
42         int i, c;
43         u16 cur_reg;
44         u32 var_pattern;
45         u32 init_val;
46         u32 cur_val;
47
48         for (c = 0; c < 2; c++) {
49
50                 cur_reg = regs[c];
51
52                 /* Save previous value */
53                 init_val = ath5k_hw_reg_read(ah, cur_reg);
54
55                 for (i = 0; i < 256; i++) {
56                         var_pattern = i << 16 | i;
57                         ath5k_hw_reg_write(ah, var_pattern, cur_reg);
58                         cur_val = ath5k_hw_reg_read(ah, cur_reg);
59
60                         if (cur_val != var_pattern) {
61                                 ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n");
62                                 return -EAGAIN;
63                         }
64
65                         /* Found on ndiswrapper dumps */
66                         var_pattern = 0x0039080f;
67                         ath5k_hw_reg_write(ah, var_pattern, cur_reg);
68                 }
69
70                 for (i = 0; i < 4; i++) {
71                         var_pattern = static_pattern[i];
72                         ath5k_hw_reg_write(ah, var_pattern, cur_reg);
73                         cur_val = ath5k_hw_reg_read(ah, cur_reg);
74
75                         if (cur_val != var_pattern) {
76                                 ATH5K_ERR(ah->ah_sc, "POST Failed !!!\n");
77                                 return -EAGAIN;
78                         }
79
80                         /* Found on ndiswrapper dumps */
81                         var_pattern = 0x003b080f;
82                         ath5k_hw_reg_write(ah, var_pattern, cur_reg);
83                 }
84
85                 /* Restore previous value */
86                 ath5k_hw_reg_write(ah, init_val, cur_reg);
87
88         }
89
90         return 0;
91
92 }
93
94 /**
95  * ath5k_hw_attach - Check if hw is supported and init the needed structs
96  *
97  * @sc: The &struct ath5k_softc we got from the driver's attach function
98  *
99  * Check if the device is supported, perform a POST and initialize the needed
100  * structs. Returns -ENOMEM if we don't have memory for the needed structs,
101  * -ENODEV if the device is not supported or prints an error msg if something
102  * else went wrong.
103  */
104 struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc)
105 {
106         struct ath5k_hw *ah;
107         struct pci_dev *pdev = sc->pdev;
108         struct ath5k_eeprom_info *ee;
109         int ret;
110         u32 srev;
111
112         /*If we passed the test malloc a ath5k_hw struct*/
113         ah = kzalloc(sizeof(struct ath5k_hw), GFP_KERNEL);
114         if (ah == NULL) {
115                 ret = -ENOMEM;
116                 ATH5K_ERR(sc, "out of memory\n");
117                 goto err;
118         }
119
120         ah->ah_sc = sc;
121         ah->ah_iobase = sc->iobase;
122
123         /*
124          * HW information
125          */
126         ah->ah_op_mode = NL80211_IFTYPE_STATION;
127         ah->ah_radar.r_enabled = AR5K_TUNE_RADAR_ALERT;
128         ah->ah_turbo = false;
129         ah->ah_txpower.txp_tpc = AR5K_TUNE_TPC_TXPOWER;
130         ah->ah_imr = 0;
131         ah->ah_atim_window = 0;
132         ah->ah_aifs = AR5K_TUNE_AIFS;
133         ah->ah_cw_min = AR5K_TUNE_CWMIN;
134         ah->ah_limit_tx_retries = AR5K_INIT_TX_RETRY;
135         ah->ah_software_retry = false;
136
137         /*
138          * Find the mac version
139          */
140         srev = ath5k_hw_reg_read(ah, AR5K_SREV);
141         if (srev < AR5K_SREV_AR5311)
142                 ah->ah_version = AR5K_AR5210;
143         else if (srev < AR5K_SREV_AR5212)
144                 ah->ah_version = AR5K_AR5211;
145         else
146                 ah->ah_version = AR5K_AR5212;
147
148         /*Fill the ath5k_hw struct with the needed functions*/
149         ret = ath5k_hw_init_desc_functions(ah);
150         if (ret)
151                 goto err_free;
152
153         /* Bring device out of sleep and reset it's units */
154         ret = ath5k_hw_nic_wakeup(ah, 0, true);
155         if (ret)
156                 goto err_free;
157
158         /* Get MAC, PHY and RADIO revisions */
159         ah->ah_mac_srev = srev;
160         ah->ah_mac_version = AR5K_REG_MS(srev, AR5K_SREV_VER);
161         ah->ah_mac_revision = AR5K_REG_MS(srev, AR5K_SREV_REV);
162         ah->ah_phy_revision = ath5k_hw_reg_read(ah, AR5K_PHY_CHIP_ID) &
163                         0xffffffff;
164         ah->ah_radio_5ghz_revision = ath5k_hw_radio_revision(ah,
165                         CHANNEL_5GHZ);
166         ah->ah_phy = AR5K_PHY(0);
167
168         /* Try to identify radio chip based on it's srev */
169         switch (ah->ah_radio_5ghz_revision & 0xf0) {
170         case AR5K_SREV_RAD_5111:
171                 ah->ah_radio = AR5K_RF5111;
172                 ah->ah_single_chip = false;
173                 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
174                                                         CHANNEL_2GHZ);
175                 break;
176         case AR5K_SREV_RAD_5112:
177         case AR5K_SREV_RAD_2112:
178                 ah->ah_radio = AR5K_RF5112;
179                 ah->ah_single_chip = false;
180                 ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
181                                                         CHANNEL_2GHZ);
182                 break;
183         case AR5K_SREV_RAD_2413:
184                 ah->ah_radio = AR5K_RF2413;
185                 ah->ah_single_chip = true;
186                 break;
187         case AR5K_SREV_RAD_5413:
188                 ah->ah_radio = AR5K_RF5413;
189                 ah->ah_single_chip = true;
190                 break;
191         case AR5K_SREV_RAD_2316:
192                 ah->ah_radio = AR5K_RF2316;
193                 ah->ah_single_chip = true;
194                 break;
195         case AR5K_SREV_RAD_2317:
196                 ah->ah_radio = AR5K_RF2317;
197                 ah->ah_single_chip = true;
198                 break;
199         case AR5K_SREV_RAD_5424:
200                 if (ah->ah_mac_version == AR5K_SREV_AR2425 ||
201                 ah->ah_mac_version == AR5K_SREV_AR2417){
202                         ah->ah_radio = AR5K_RF2425;
203                         ah->ah_single_chip = true;
204                 } else {
205                         ah->ah_radio = AR5K_RF5413;
206                         ah->ah_single_chip = true;
207                 }
208                 break;
209         default:
210                 /* Identify radio based on mac/phy srev */
211                 if (ah->ah_version == AR5K_AR5210) {
212                         ah->ah_radio = AR5K_RF5110;
213                         ah->ah_single_chip = false;
214                 } else if (ah->ah_version == AR5K_AR5211) {
215                         ah->ah_radio = AR5K_RF5111;
216                         ah->ah_single_chip = false;
217                         ah->ah_radio_2ghz_revision = ath5k_hw_radio_revision(ah,
218                                                                 CHANNEL_2GHZ);
219                 } else if (ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4) ||
220                 ah->ah_mac_version == (AR5K_SREV_AR2417 >> 4) ||
221                 ah->ah_phy_revision == AR5K_SREV_PHY_2425) {
222                         ah->ah_radio = AR5K_RF2425;
223                         ah->ah_single_chip = true;
224                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2425;
225                 } else if (srev == AR5K_SREV_AR5213A &&
226                 ah->ah_phy_revision == AR5K_SREV_PHY_5212B) {
227                         ah->ah_radio = AR5K_RF5112;
228                         ah->ah_single_chip = false;
229                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_5112B;
230                 } else if (ah->ah_mac_version == (AR5K_SREV_AR2415 >> 4)) {
231                         ah->ah_radio = AR5K_RF2316;
232                         ah->ah_single_chip = true;
233                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2316;
234                 } else if (ah->ah_mac_version == (AR5K_SREV_AR5414 >> 4) ||
235                 ah->ah_phy_revision == AR5K_SREV_PHY_5413) {
236                         ah->ah_radio = AR5K_RF5413;
237                         ah->ah_single_chip = true;
238                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_5413;
239                 } else if (ah->ah_mac_version == (AR5K_SREV_AR2414 >> 4) ||
240                 ah->ah_phy_revision == AR5K_SREV_PHY_2413) {
241                         ah->ah_radio = AR5K_RF2413;
242                         ah->ah_single_chip = true;
243                         ah->ah_radio_5ghz_revision = AR5K_SREV_RAD_2413;
244                 } else {
245                         ATH5K_ERR(sc, "Couldn't identify radio revision.\n");
246                         ret = -ENODEV;
247                         goto err_free;
248                 }
249         }
250
251
252         /* Return on unsuported chips (unsupported eeprom etc) */
253         if ((srev >= AR5K_SREV_AR5416) &&
254         (srev < AR5K_SREV_AR2425)) {
255                 ATH5K_ERR(sc, "Device not yet supported.\n");
256                 ret = -ENODEV;
257                 goto err_free;
258         }
259
260         /*
261          * POST
262          */
263         ret = ath5k_hw_post(ah);
264         if (ret)
265                 goto err_free;
266
267         /* Enable pci core retry fix on Hainan (5213A) and later chips */
268         if (srev >= AR5K_SREV_AR5213A)
269                 AR5K_REG_ENABLE_BITS(ah, AR5K_PCICFG, AR5K_PCICFG_RETRY_FIX);
270
271         /*
272          * Get card capabilities, calibration values etc
273          * TODO: EEPROM work
274          */
275         ret = ath5k_eeprom_init(ah);
276         if (ret) {
277                 ATH5K_ERR(sc, "unable to init EEPROM\n");
278                 goto err_free;
279         }
280
281         /*
282          * Write PCI-E power save settings
283          */
284         if ((ah->ah_version == AR5K_AR5212) && (pdev->is_pcie)) {
285                 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
286
287                 ath5k_hw_reg_write(ah, 0x9248fc00, AR5K_PCIE_SERDES);
288                 ath5k_hw_reg_write(ah, 0x24924924, AR5K_PCIE_SERDES);
289
290                 /* Shut off RX when elecidle is asserted */
291                 ath5k_hw_reg_write(ah, 0x28000039, AR5K_PCIE_SERDES);
292                 ath5k_hw_reg_write(ah, 0x53160824, AR5K_PCIE_SERDES);
293
294                 /* If serdes programing is enabled, increase PCI-E
295                  * tx power for systems with long trace from host
296                  * to minicard connector. */
297                 if (ee->ee_serdes)
298                         ath5k_hw_reg_write(ah, 0xe5980579, AR5K_PCIE_SERDES);
299                 else
300                         ath5k_hw_reg_write(ah, 0xf6800579, AR5K_PCIE_SERDES);
301
302                 /* Shut off PLL and CLKREQ active in L1 */
303                 ath5k_hw_reg_write(ah, 0x001defff, AR5K_PCIE_SERDES);
304
305                 /* Preserve other settings */
306                 ath5k_hw_reg_write(ah, 0x1aaabe40, AR5K_PCIE_SERDES);
307                 ath5k_hw_reg_write(ah, 0xbe105554, AR5K_PCIE_SERDES);
308                 ath5k_hw_reg_write(ah, 0x000e3007, AR5K_PCIE_SERDES);
309
310                 /* Reset SERDES to load new settings */
311                 ath5k_hw_reg_write(ah, 0x00000000, AR5K_PCIE_SERDES_RESET);
312                 mdelay(1);
313         }
314
315         /* Get misc capabilities */
316         ret = ath5k_hw_set_capabilities(ah);
317         if (ret) {
318                 ATH5K_ERR(sc, "unable to get device capabilities: 0x%04x\n",
319                         sc->pdev->device);
320                 goto err_free;
321         }
322
323         /* Crypto settings */
324         ee = &ah->ah_capabilities.cap_eeprom;
325         ah->ah_aes_support = srev >= AR5K_SREV_AR5212_V4 &&
326                 (ee->ee_version >= AR5K_EEPROM_VERSION_5_0 &&
327                  !AR5K_EEPROM_AES_DIS(ee->ee_misc5));
328
329         if (srev >= AR5K_SREV_AR2414) {
330                 ah->ah_combined_mic = true;
331                 AR5K_REG_ENABLE_BITS(ah, AR5K_MISC_MODE,
332                         AR5K_MISC_MODE_COMBINED_MIC);
333         }
334
335         /* MAC address is cleared until add_interface */
336         ath5k_hw_set_lladdr(ah, (u8[ETH_ALEN]){});
337
338         /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */
339         memcpy(ah->ah_bssid, ath_bcast_mac, ETH_ALEN);
340         ath5k_hw_set_associd(ah, ah->ah_bssid, 0);
341         ath5k_hw_set_opmode(ah);
342
343         ath5k_hw_rfgain_opt_init(ah);
344
345         /* turn on HW LEDs */
346         ath5k_hw_set_ledstate(ah, AR5K_LED_INIT);
347
348         return ah;
349 err_free:
350         kfree(ah);
351 err:
352         return ERR_PTR(ret);
353 }
354
355 /**
356  * ath5k_hw_detach - Free the ath5k_hw struct
357  *
358  * @ah: The &struct ath5k_hw
359  */
360 void ath5k_hw_detach(struct ath5k_hw *ah)
361 {
362         ATH5K_TRACE(ah->ah_sc);
363
364         __set_bit(ATH_STAT_INVALID, ah->ah_sc->status);
365
366         if (ah->ah_rf_banks != NULL)
367                 kfree(ah->ah_rf_banks);
368
369         ath5k_eeprom_detach(ah);
370
371         /* assume interrupts are down */
372         kfree(ah);
373 }