]> nv-tegra.nvidia Code Review - linux-2.6.git/blob - drivers/net/sk98lin/skge.c
Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik...
[linux-2.6.git] / drivers / net / sk98lin / skge.c
1 /******************************************************************************
2  *
3  * Name:        skge.c
4  * Project:     GEnesis, PCI Gigabit Ethernet Adapter
5  * Version:     $Revision: 1.45 $
6  * Date:        $Date: 2004/02/12 14:41:02 $
7  * Purpose:     The main driver source module
8  *
9  ******************************************************************************/
10
11 /******************************************************************************
12  *
13  *      (C)Copyright 1998-2002 SysKonnect GmbH.
14  *      (C)Copyright 2002-2003 Marvell.
15  *
16  *      Driver for Marvell Yukon chipset and SysKonnect Gigabit Ethernet 
17  *      Server Adapters.
18  *
19  *      Created 10-Feb-1999, based on Linux' acenic.c, 3c59x.c and
20  *      SysKonnects GEnesis Solaris driver
21  *      Author: Christoph Goos (cgoos@syskonnect.de)
22  *              Mirko Lindner (mlindner@syskonnect.de)
23  *
24  *      Address all question to: linux@syskonnect.de
25  *
26  *      The technical manual for the adapters is available from SysKonnect's
27  *      web pages: www.syskonnect.com
28  *      Goto "Support" and search Knowledge Base for "manual".
29  *      
30  *      This program is free software; you can redistribute it and/or modify
31  *      it under the terms of the GNU General Public License as published by
32  *      the Free Software Foundation; either version 2 of the License, or
33  *      (at your option) any later version.
34  *
35  *      The information in this file is provided "AS IS" without warranty.
36  *
37  ******************************************************************************/
38
39 /******************************************************************************
40  *
41  * Possible compiler options (#define xxx / -Dxxx):
42  *
43  *      debugging can be enable by changing SK_DEBUG_CHKMOD and
44  *      SK_DEBUG_CHKCAT in makefile (described there).
45  *
46  ******************************************************************************/
47
48 /******************************************************************************
49  *
50  * Description:
51  *
52  *      This is the main module of the Linux GE driver.
53  *      
54  *      All source files except skge.c, skdrv1st.h, skdrv2nd.h and sktypes.h
55  *      are part of SysKonnect's COMMON MODULES for the SK-98xx adapters.
56  *      Those are used for drivers on multiple OS', so some thing may seem
57  *      unnecessary complicated on Linux. Please do not try to 'clean up'
58  *      them without VERY good reasons, because this will make it more
59  *      difficult to keep the Linux driver in synchronisation with the
60  *      other versions.
61  *
62  * Include file hierarchy:
63  *
64  *      <linux/module.h>
65  *
66  *      "h/skdrv1st.h"
67  *              <linux/types.h>
68  *              <linux/kernel.h>
69  *              <linux/string.h>
70  *              <linux/errno.h>
71  *              <linux/ioport.h>
72  *              <linux/slab.h>
73  *              <linux/interrupt.h>
74  *              <linux/pci.h>
75  *              <linux/bitops.h>
76  *              <asm/byteorder.h>
77  *              <asm/io.h>
78  *              <linux/netdevice.h>
79  *              <linux/etherdevice.h>
80  *              <linux/skbuff.h>
81  *          those three depending on kernel version used:
82  *              <linux/bios32.h>
83  *              <linux/init.h>
84  *              <asm/uaccess.h>
85  *              <net/checksum.h>
86  *
87  *              "h/skerror.h"
88  *              "h/skdebug.h"
89  *              "h/sktypes.h"
90  *              "h/lm80.h"
91  *              "h/xmac_ii.h"
92  *
93  *      "h/skdrv2nd.h"
94  *              "h/skqueue.h"
95  *              "h/skgehwt.h"
96  *              "h/sktimer.h"
97  *              "h/ski2c.h"
98  *              "h/skgepnmi.h"
99  *              "h/skvpd.h"
100  *              "h/skgehw.h"
101  *              "h/skgeinit.h"
102  *              "h/skaddr.h"
103  *              "h/skgesirq.h"
104  *              "h/skrlmt.h"
105  *
106  ******************************************************************************/
107
108 #include        "h/skversion.h"
109
110 #include        <linux/in.h>
111 #include        <linux/module.h>
112 #include        <linux/moduleparam.h>
113 #include        <linux/init.h>
114 #include        <linux/dma-mapping.h>
115 #include        <linux/ip.h>
116
117 #include        "h/skdrv1st.h"
118 #include        "h/skdrv2nd.h"
119
120 /*******************************************************************************
121  *
122  * Defines
123  *
124  ******************************************************************************/
125
126 /* for debuging on x86 only */
127 /* #define BREAKPOINT() asm(" int $3"); */
128
129 /* use the transmit hw checksum driver functionality */
130 #define USE_SK_TX_CHECKSUM
131
132 /* use the receive hw checksum driver functionality */
133 #define USE_SK_RX_CHECKSUM
134
135 /* use the scatter-gather functionality with sendfile() */
136 #define SK_ZEROCOPY
137
138 /* use of a transmit complete interrupt */
139 #define USE_TX_COMPLETE
140
141 /*
142  * threshold for copying small receive frames
143  * set to 0 to avoid copying, set to 9001 to copy all frames
144  */
145 #define SK_COPY_THRESHOLD       50
146
147 /* number of adapters that can be configured via command line params */
148 #define SK_MAX_CARD_PARAM       16
149
150
151
152 /*
153  * use those defines for a compile-in version of the driver instead
154  * of command line parameters
155  */
156 // #define LINK_SPEED_A {"Auto", }
157 // #define LINK_SPEED_B {"Auto", }
158 // #define AUTO_NEG_A   {"Sense", }
159 // #define AUTO_NEG_B   {"Sense", }
160 // #define DUP_CAP_A    {"Both", }
161 // #define DUP_CAP_B    {"Both", }
162 // #define FLOW_CTRL_A  {"SymOrRem", }
163 // #define FLOW_CTRL_B  {"SymOrRem", }
164 // #define ROLE_A       {"Auto", }
165 // #define ROLE_B       {"Auto", }
166 // #define PREF_PORT    {"A", }
167 // #define CON_TYPE     {"Auto", }
168 // #define RLMT_MODE    {"CheckLinkState", }
169
170 #define DEV_KFREE_SKB(skb) dev_kfree_skb(skb)
171 #define DEV_KFREE_SKB_IRQ(skb) dev_kfree_skb_irq(skb)
172 #define DEV_KFREE_SKB_ANY(skb) dev_kfree_skb_any(skb)
173
174
175 /* Set blink mode*/
176 #define OEM_CONFIG_VALUE (      SK_ACT_LED_BLINK | \
177                                 SK_DUP_LED_NORMAL | \
178                                 SK_LED_LINK100_ON)
179
180
181 /* Isr return value */
182 #define SkIsrRetVar     irqreturn_t
183 #define SkIsrRetNone    IRQ_NONE
184 #define SkIsrRetHandled IRQ_HANDLED
185
186
187 /*******************************************************************************
188  *
189  * Local Function Prototypes
190  *
191  ******************************************************************************/
192
193 static void     FreeResources(struct SK_NET_DEVICE *dev);
194 static int      SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC);
195 static SK_BOOL  BoardAllocMem(SK_AC *pAC);
196 static void     BoardFreeMem(SK_AC *pAC);
197 static void     BoardInitMem(SK_AC *pAC);
198 static void     SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**, int*, SK_BOOL);
199 static SkIsrRetVar      SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
200 static SkIsrRetVar      SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
201 static int      SkGeOpen(struct SK_NET_DEVICE *dev);
202 static int      SkGeClose(struct SK_NET_DEVICE *dev);
203 static int      SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
204 static int      SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p);
205 static void     SkGeSetRxMode(struct SK_NET_DEVICE *dev);
206 static struct   net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev);
207 static int      SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd);
208 static void     GetConfiguration(SK_AC*);
209 static int      XmitFrame(SK_AC*, TX_PORT*, struct sk_buff*);
210 static void     FreeTxDescriptors(SK_AC*pAC, TX_PORT*);
211 static void     FillRxRing(SK_AC*, RX_PORT*);
212 static SK_BOOL  FillRxDescriptor(SK_AC*, RX_PORT*);
213 static void     ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
214 static void     ClearAndStartRx(SK_AC*, int);
215 static void     ClearTxIrq(SK_AC*, int, int);
216 static void     ClearRxRing(SK_AC*, RX_PORT*);
217 static void     ClearTxRing(SK_AC*, TX_PORT*);
218 static int      SkGeChangeMtu(struct SK_NET_DEVICE *dev, int new_mtu);
219 static void     PortReInitBmu(SK_AC*, int);
220 static int      SkGeIocMib(DEV_NET*, unsigned int, int);
221 static int      SkGeInitPCI(SK_AC *pAC);
222 static void     StartDrvCleanupTimer(SK_AC *pAC);
223 static void     StopDrvCleanupTimer(SK_AC *pAC);
224 static int      XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
225
226 #ifdef SK_DIAG_SUPPORT
227 static SK_U32   ParseDeviceNbrFromSlotName(const char *SlotName);
228 static int      SkDrvInitAdapter(SK_AC *pAC, int devNbr);
229 static int      SkDrvDeInitAdapter(SK_AC *pAC, int devNbr);
230 #endif
231
232 /*******************************************************************************
233  *
234  * Extern Function Prototypes
235  *
236  ******************************************************************************/
237 extern void SkDimEnableModerationIfNeeded(SK_AC *pAC);  
238 extern void SkDimDisplayModerationSettings(SK_AC *pAC);
239 extern void SkDimStartModerationTimer(SK_AC *pAC);
240 extern void SkDimModerate(SK_AC *pAC);
241 extern void SkGeBlinkTimer(unsigned long data);
242
243 #ifdef DEBUG
244 static void     DumpMsg(struct sk_buff*, char*);
245 static void     DumpData(char*, int);
246 static void     DumpLong(char*, int);
247 #endif
248
249 /* global variables *********************************************************/
250 static SK_BOOL DoPrintInterfaceChange = SK_TRUE;
251 extern  struct ethtool_ops SkGeEthtoolOps;
252
253 /* local variables **********************************************************/
254 static uintptr_t TxQueueAddr[SK_MAX_MACS][2] = {{0x680, 0x600},{0x780, 0x700}};
255 static uintptr_t RxQueueAddr[SK_MAX_MACS] = {0x400, 0x480};
256
257 /*****************************************************************************
258  *
259  *      SkPciWriteCfgDWord - write a 32 bit value to pci config space
260  *
261  * Description:
262  *      This routine writes a 32 bit value to the pci configuration
263  *      space.
264  *
265  * Returns:
266  *      0 - indicate everything worked ok.
267  *      != 0 - error indication
268  */
269 static inline int SkPciWriteCfgDWord(
270 SK_AC *pAC,     /* Adapter Control structure pointer */
271 int PciAddr,            /* PCI register address */
272 SK_U32 Val)             /* pointer to store the read value */
273 {
274         pci_write_config_dword(pAC->PciDev, PciAddr, Val);
275         return(0);
276 } /* SkPciWriteCfgDWord */
277
278 /*****************************************************************************
279  *
280  *      SkGeInitPCI - Init the PCI resources
281  *
282  * Description:
283  *      This function initialize the PCI resources and IO
284  *
285  * Returns: N/A
286  *      
287  */
288 int SkGeInitPCI(SK_AC *pAC)
289 {
290         struct SK_NET_DEVICE *dev = pAC->dev[0];
291         struct pci_dev *pdev = pAC->PciDev;
292         int retval;
293
294         if (pci_enable_device(pdev) != 0) {
295                 return 1;
296         }
297
298         dev->mem_start = pci_resource_start (pdev, 0);
299         pci_set_master(pdev);
300
301         if (pci_request_regions(pdev, "sk98lin") != 0) {
302                 retval = 2;
303                 goto out_disable;
304         }
305
306 #ifdef SK_BIG_ENDIAN
307         /*
308          * On big endian machines, we use the adapter's aibility of
309          * reading the descriptors as big endian.
310          */
311         {
312                 SK_U32          our2;
313                 SkPciReadCfgDWord(pAC, PCI_OUR_REG_2, &our2);
314                 our2 |= PCI_REV_DESC;
315                 SkPciWriteCfgDWord(pAC, PCI_OUR_REG_2, our2);
316         }
317 #endif
318
319         /*
320          * Remap the regs into kernel space.
321          */
322         pAC->IoBase = ioremap_nocache(dev->mem_start, 0x4000);
323
324         if (!pAC->IoBase){
325                 retval = 3;
326                 goto out_release;
327         }
328
329         return 0;
330
331  out_release:
332         pci_release_regions(pdev);
333  out_disable:
334         pci_disable_device(pdev);
335         return retval;
336 }
337
338
339 /*****************************************************************************
340  *
341  *      FreeResources - release resources allocated for adapter
342  *
343  * Description:
344  *      This function releases the IRQ, unmaps the IO and
345  *      frees the desriptor ring.
346  *
347  * Returns: N/A
348  *      
349  */
350 static void FreeResources(struct SK_NET_DEVICE *dev)
351 {
352 SK_U32 AllocFlag;
353 DEV_NET         *pNet;
354 SK_AC           *pAC;
355
356         pNet = netdev_priv(dev);
357         pAC = pNet->pAC;
358         AllocFlag = pAC->AllocFlag;
359         if (pAC->PciDev) {
360                 pci_release_regions(pAC->PciDev);
361         }
362         if (AllocFlag & SK_ALLOC_IRQ) {
363                 free_irq(dev->irq, dev);
364         }
365         if (pAC->IoBase) {
366                 iounmap(pAC->IoBase);
367         }
368         if (pAC->pDescrMem) {
369                 BoardFreeMem(pAC);
370         }
371         
372 } /* FreeResources */
373
374 MODULE_AUTHOR("Mirko Lindner <mlindner@syskonnect.de>");
375 MODULE_DESCRIPTION("SysKonnect SK-NET Gigabit Ethernet SK-98xx driver");
376 MODULE_LICENSE("GPL");
377
378 #ifdef LINK_SPEED_A
379 static char *Speed_A[SK_MAX_CARD_PARAM] = LINK_SPEED;
380 #else
381 static char *Speed_A[SK_MAX_CARD_PARAM] = {"", };
382 #endif
383
384 #ifdef LINK_SPEED_B
385 static char *Speed_B[SK_MAX_CARD_PARAM] = LINK_SPEED;
386 #else
387 static char *Speed_B[SK_MAX_CARD_PARAM] = {"", };
388 #endif
389
390 #ifdef AUTO_NEG_A
391 static char *AutoNeg_A[SK_MAX_CARD_PARAM] = AUTO_NEG_A;
392 #else
393 static char *AutoNeg_A[SK_MAX_CARD_PARAM] = {"", };
394 #endif
395
396 #ifdef DUP_CAP_A
397 static char *DupCap_A[SK_MAX_CARD_PARAM] = DUP_CAP_A;
398 #else
399 static char *DupCap_A[SK_MAX_CARD_PARAM] = {"", };
400 #endif
401
402 #ifdef FLOW_CTRL_A
403 static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = FLOW_CTRL_A;
404 #else
405 static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = {"", };
406 #endif
407
408 #ifdef ROLE_A
409 static char *Role_A[SK_MAX_CARD_PARAM] = ROLE_A;
410 #else
411 static char *Role_A[SK_MAX_CARD_PARAM] = {"", };
412 #endif
413
414 #ifdef AUTO_NEG_B
415 static char *AutoNeg_B[SK_MAX_CARD_PARAM] = AUTO_NEG_B;
416 #else
417 static char *AutoNeg_B[SK_MAX_CARD_PARAM] = {"", };
418 #endif
419
420 #ifdef DUP_CAP_B
421 static char *DupCap_B[SK_MAX_CARD_PARAM] = DUP_CAP_B;
422 #else
423 static char *DupCap_B[SK_MAX_CARD_PARAM] = {"", };
424 #endif
425
426 #ifdef FLOW_CTRL_B
427 static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = FLOW_CTRL_B;
428 #else
429 static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = {"", };
430 #endif
431
432 #ifdef ROLE_B
433 static char *Role_B[SK_MAX_CARD_PARAM] = ROLE_B;
434 #else
435 static char *Role_B[SK_MAX_CARD_PARAM] = {"", };
436 #endif
437
438 #ifdef CON_TYPE
439 static char *ConType[SK_MAX_CARD_PARAM] = CON_TYPE;
440 #else
441 static char *ConType[SK_MAX_CARD_PARAM] = {"", };
442 #endif
443
444 #ifdef PREF_PORT
445 static char *PrefPort[SK_MAX_CARD_PARAM] = PREF_PORT;
446 #else
447 static char *PrefPort[SK_MAX_CARD_PARAM] = {"", };
448 #endif
449
450 #ifdef RLMT_MODE
451 static char *RlmtMode[SK_MAX_CARD_PARAM] = RLMT_MODE;
452 #else
453 static char *RlmtMode[SK_MAX_CARD_PARAM] = {"", };
454 #endif
455
456 static int   IntsPerSec[SK_MAX_CARD_PARAM];
457 static char *Moderation[SK_MAX_CARD_PARAM];
458 static char *ModerationMask[SK_MAX_CARD_PARAM];
459 static char *AutoSizing[SK_MAX_CARD_PARAM];
460 static char *Stats[SK_MAX_CARD_PARAM];
461
462 module_param_array(Speed_A, charp, NULL, 0);
463 module_param_array(Speed_B, charp, NULL, 0);
464 module_param_array(AutoNeg_A, charp, NULL, 0);
465 module_param_array(AutoNeg_B, charp, NULL, 0);
466 module_param_array(DupCap_A, charp, NULL, 0);
467 module_param_array(DupCap_B, charp, NULL, 0);
468 module_param_array(FlowCtrl_A, charp, NULL, 0);
469 module_param_array(FlowCtrl_B, charp, NULL, 0);
470 module_param_array(Role_A, charp, NULL, 0);
471 module_param_array(Role_B, charp, NULL, 0);
472 module_param_array(ConType, charp, NULL, 0);
473 module_param_array(PrefPort, charp, NULL, 0);
474 module_param_array(RlmtMode, charp, NULL, 0);
475 /* used for interrupt moderation */
476 module_param_array(IntsPerSec, int, NULL, 0);
477 module_param_array(Moderation, charp, NULL, 0);
478 module_param_array(Stats, charp, NULL, 0);
479 module_param_array(ModerationMask, charp, NULL, 0);
480 module_param_array(AutoSizing, charp, NULL, 0);
481
482 /*****************************************************************************
483  *
484  *      SkGeBoardInit - do level 0 and 1 initialization
485  *
486  * Description:
487  *      This function prepares the board hardware for running. The desriptor
488  *      ring is set up, the IRQ is allocated and the configuration settings
489  *      are examined.
490  *
491  * Returns:
492  *      0, if everything is ok
493  *      !=0, on error
494  */
495 static int __init SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC)
496 {
497 short   i;
498 unsigned long Flags;
499 char    *DescrString = "sk98lin: Driver for Linux"; /* this is given to PNMI */
500 char    *VerStr = VER_STRING;
501 int     Ret;                    /* return code of request_irq */
502 SK_BOOL DualNet;
503
504         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
505                 ("IoBase: %08lX\n", (unsigned long)pAC->IoBase));
506         for (i=0; i<SK_MAX_MACS; i++) {
507                 pAC->TxPort[i][0].HwAddr = pAC->IoBase + TxQueueAddr[i][0];
508                 pAC->TxPort[i][0].PortIndex = i;
509                 pAC->RxPort[i].HwAddr = pAC->IoBase + RxQueueAddr[i];
510                 pAC->RxPort[i].PortIndex = i;
511         }
512
513         /* Initialize the mutexes */
514         for (i=0; i<SK_MAX_MACS; i++) {
515                 spin_lock_init(&pAC->TxPort[i][0].TxDesRingLock);
516                 spin_lock_init(&pAC->RxPort[i].RxDesRingLock);
517         }
518         spin_lock_init(&pAC->SlowPathLock);
519
520         /* setup phy_id blink timer */
521         pAC->BlinkTimer.function = SkGeBlinkTimer;
522         pAC->BlinkTimer.data = (unsigned long) dev;
523         init_timer(&pAC->BlinkTimer);
524
525         /* level 0 init common modules here */
526         
527         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
528         /* Does a RESET on board ...*/
529         if (SkGeInit(pAC, pAC->IoBase, SK_INIT_DATA) != 0) {
530                 printk("HWInit (0) failed.\n");
531                 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
532                 return(-EAGAIN);
533         }
534         SkI2cInit(  pAC, pAC->IoBase, SK_INIT_DATA);
535         SkEventInit(pAC, pAC->IoBase, SK_INIT_DATA);
536         SkPnmiInit( pAC, pAC->IoBase, SK_INIT_DATA);
537         SkAddrInit( pAC, pAC->IoBase, SK_INIT_DATA);
538         SkRlmtInit( pAC, pAC->IoBase, SK_INIT_DATA);
539         SkTimerInit(pAC, pAC->IoBase, SK_INIT_DATA);
540
541         pAC->BoardLevel = SK_INIT_DATA;
542         pAC->RxBufSize  = ETH_BUF_SIZE;
543
544         SK_PNMI_SET_DRIVER_DESCR(pAC, DescrString);
545         SK_PNMI_SET_DRIVER_VER(pAC, VerStr);
546
547         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
548
549         /* level 1 init common modules here (HW init) */
550         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
551         if (SkGeInit(pAC, pAC->IoBase, SK_INIT_IO) != 0) {
552                 printk("sk98lin: HWInit (1) failed.\n");
553                 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
554                 return(-EAGAIN);
555         }
556         SkI2cInit(  pAC, pAC->IoBase, SK_INIT_IO);
557         SkEventInit(pAC, pAC->IoBase, SK_INIT_IO);
558         SkPnmiInit( pAC, pAC->IoBase, SK_INIT_IO);
559         SkAddrInit( pAC, pAC->IoBase, SK_INIT_IO);
560         SkRlmtInit( pAC, pAC->IoBase, SK_INIT_IO);
561         SkTimerInit(pAC, pAC->IoBase, SK_INIT_IO);
562
563         /* Set chipset type support */
564         pAC->ChipsetType = 0;
565         if ((pAC->GIni.GIChipId == CHIP_ID_YUKON) ||
566                 (pAC->GIni.GIChipId == CHIP_ID_YUKON_LITE)) {
567                 pAC->ChipsetType = 1;
568         }
569
570         GetConfiguration(pAC);
571         if (pAC->RlmtNets == 2) {
572                 pAC->GIni.GIPortUsage = SK_MUL_LINK;
573         }
574
575         pAC->BoardLevel = SK_INIT_IO;
576         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
577
578         if (pAC->GIni.GIMacsFound == 2) {
579                  Ret = request_irq(dev->irq, SkGeIsr, SA_SHIRQ, "sk98lin", dev);
580         } else if (pAC->GIni.GIMacsFound == 1) {
581                 Ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ,
582                         "sk98lin", dev);
583         } else {
584                 printk(KERN_WARNING "sk98lin: Illegal number of ports: %d\n",
585                        pAC->GIni.GIMacsFound);
586                 return -EAGAIN;
587         }
588
589         if (Ret) {
590                 printk(KERN_WARNING "sk98lin: Requested IRQ %d is busy.\n",
591                        dev->irq);
592                 return -EAGAIN;
593         }
594         pAC->AllocFlag |= SK_ALLOC_IRQ;
595
596         /* Alloc memory for this board (Mem for RxD/TxD) : */
597         if(!BoardAllocMem(pAC)) {
598                 printk("No memory for descriptor rings.\n");
599                 return(-EAGAIN);
600         }
601
602         BoardInitMem(pAC);
603         /* tschilling: New common function with minimum size check. */
604         DualNet = SK_FALSE;
605         if (pAC->RlmtNets == 2) {
606                 DualNet = SK_TRUE;
607         }
608         
609         if (SkGeInitAssignRamToQueues(
610                 pAC,
611                 pAC->ActivePort,
612                 DualNet)) {
613                 BoardFreeMem(pAC);
614                 printk("sk98lin: SkGeInitAssignRamToQueues failed.\n");
615                 return(-EAGAIN);
616         }
617
618         return (0);
619 } /* SkGeBoardInit */
620
621
622 /*****************************************************************************
623  *
624  *      BoardAllocMem - allocate the memory for the descriptor rings
625  *
626  * Description:
627  *      This function allocates the memory for all descriptor rings.
628  *      Each ring is aligned for the desriptor alignment and no ring
629  *      has a 4 GByte boundary in it (because the upper 32 bit must
630  *      be constant for all descriptiors in one rings).
631  *
632  * Returns:
633  *      SK_TRUE, if all memory could be allocated
634  *      SK_FALSE, if not
635  */
636 static SK_BOOL BoardAllocMem(
637 SK_AC   *pAC)
638 {
639 caddr_t         pDescrMem;      /* pointer to descriptor memory area */
640 size_t          AllocLength;    /* length of complete descriptor area */
641 int             i;              /* loop counter */
642 unsigned long   BusAddr;
643
644         
645         /* rings plus one for alignment (do not cross 4 GB boundary) */
646         /* RX_RING_SIZE is assumed bigger than TX_RING_SIZE */
647 #if (BITS_PER_LONG == 32)
648         AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
649 #else
650         AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
651                 + RX_RING_SIZE + 8;
652 #endif
653
654         pDescrMem = pci_alloc_consistent(pAC->PciDev, AllocLength,
655                                          &pAC->pDescrMemDMA);
656
657         if (pDescrMem == NULL) {
658                 return (SK_FALSE);
659         }
660         pAC->pDescrMem = pDescrMem;
661         BusAddr = (unsigned long) pAC->pDescrMemDMA;
662
663         /* Descriptors need 8 byte alignment, and this is ensured
664          * by pci_alloc_consistent.
665          */
666         for (i=0; i<pAC->GIni.GIMacsFound; i++) {
667                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
668                         ("TX%d/A: pDescrMem: %lX,   PhysDescrMem: %lX\n",
669                         i, (unsigned long) pDescrMem,
670                         BusAddr));
671                 pAC->TxPort[i][0].pTxDescrRing = pDescrMem;
672                 pAC->TxPort[i][0].VTxDescrRing = BusAddr;
673                 pDescrMem += TX_RING_SIZE;
674                 BusAddr += TX_RING_SIZE;
675         
676                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
677                         ("RX%d: pDescrMem: %lX,   PhysDescrMem: %lX\n",
678                         i, (unsigned long) pDescrMem,
679                         (unsigned long)BusAddr));
680                 pAC->RxPort[i].pRxDescrRing = pDescrMem;
681                 pAC->RxPort[i].VRxDescrRing = BusAddr;
682                 pDescrMem += RX_RING_SIZE;
683                 BusAddr += RX_RING_SIZE;
684         } /* for */
685         
686         return (SK_TRUE);
687 } /* BoardAllocMem */
688
689
690 /****************************************************************************
691  *
692  *      BoardFreeMem - reverse of BoardAllocMem
693  *
694  * Description:
695  *      Free all memory allocated in BoardAllocMem: adapter context,
696  *      descriptor rings, locks.
697  *
698  * Returns:     N/A
699  */
700 static void BoardFreeMem(
701 SK_AC           *pAC)
702 {
703 size_t          AllocLength;    /* length of complete descriptor area */
704
705         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
706                 ("BoardFreeMem\n"));
707 #if (BITS_PER_LONG == 32)
708         AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
709 #else
710         AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
711                 + RX_RING_SIZE + 8;
712 #endif
713
714         pci_free_consistent(pAC->PciDev, AllocLength,
715                             pAC->pDescrMem, pAC->pDescrMemDMA);
716         pAC->pDescrMem = NULL;
717 } /* BoardFreeMem */
718
719
720 /*****************************************************************************
721  *
722  *      BoardInitMem - initiate the descriptor rings
723  *
724  * Description:
725  *      This function sets the descriptor rings up in memory.
726  *      The adapter is initialized with the descriptor start addresses.
727  *
728  * Returns:     N/A
729  */
730 static void BoardInitMem(
731 SK_AC   *pAC)   /* pointer to adapter context */
732 {
733 int     i;              /* loop counter */
734 int     RxDescrSize;    /* the size of a rx descriptor rounded up to alignment*/
735 int     TxDescrSize;    /* the size of a tx descriptor rounded up to alignment*/
736
737         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
738                 ("BoardInitMem\n"));
739
740         RxDescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
741         pAC->RxDescrPerRing = RX_RING_SIZE / RxDescrSize;
742         TxDescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
743         pAC->TxDescrPerRing = TX_RING_SIZE / RxDescrSize;
744         
745         for (i=0; i<pAC->GIni.GIMacsFound; i++) {
746                 SetupRing(
747                         pAC,
748                         pAC->TxPort[i][0].pTxDescrRing,
749                         pAC->TxPort[i][0].VTxDescrRing,
750                         (RXD**)&pAC->TxPort[i][0].pTxdRingHead,
751                         (RXD**)&pAC->TxPort[i][0].pTxdRingTail,
752                         (RXD**)&pAC->TxPort[i][0].pTxdRingPrev,
753                         &pAC->TxPort[i][0].TxdRingFree,
754                         SK_TRUE);
755                 SetupRing(
756                         pAC,
757                         pAC->RxPort[i].pRxDescrRing,
758                         pAC->RxPort[i].VRxDescrRing,
759                         &pAC->RxPort[i].pRxdRingHead,
760                         &pAC->RxPort[i].pRxdRingTail,
761                         &pAC->RxPort[i].pRxdRingPrev,
762                         &pAC->RxPort[i].RxdRingFree,
763                         SK_FALSE);
764         }
765 } /* BoardInitMem */
766
767
768 /*****************************************************************************
769  *
770  *      SetupRing - create one descriptor ring
771  *
772  * Description:
773  *      This function creates one descriptor ring in the given memory area.
774  *      The head, tail and number of free descriptors in the ring are set.
775  *
776  * Returns:
777  *      none
778  */
779 static void SetupRing(
780 SK_AC           *pAC,
781 void            *pMemArea,      /* a pointer to the memory area for the ring */
782 uintptr_t       VMemArea,       /* the virtual bus address of the memory area */
783 RXD             **ppRingHead,   /* address where the head should be written */
784 RXD             **ppRingTail,   /* address where the tail should be written */
785 RXD             **ppRingPrev,   /* address where the tail should be written */
786 int             *pRingFree,     /* address where the # of free descr. goes */
787 SK_BOOL         IsTx)           /* flag: is this a tx ring */
788 {
789 int     i;              /* loop counter */
790 int     DescrSize;      /* the size of a descriptor rounded up to alignment*/
791 int     DescrNum;       /* number of descriptors per ring */
792 RXD     *pDescr;        /* pointer to a descriptor (receive or transmit) */
793 RXD     *pNextDescr;    /* pointer to the next descriptor */
794 RXD     *pPrevDescr;    /* pointer to the previous descriptor */
795 uintptr_t VNextDescr;   /* the virtual bus address of the next descriptor */
796
797         if (IsTx == SK_TRUE) {
798                 DescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) *
799                         DESCR_ALIGN;
800                 DescrNum = TX_RING_SIZE / DescrSize;
801         } else {
802                 DescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) *
803                         DESCR_ALIGN;
804                 DescrNum = RX_RING_SIZE / DescrSize;
805         }
806         
807         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
808                 ("Descriptor size: %d   Descriptor Number: %d\n",
809                 DescrSize,DescrNum));
810         
811         pDescr = (RXD*) pMemArea;
812         pPrevDescr = NULL;
813         pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
814         VNextDescr = VMemArea + DescrSize;
815         for(i=0; i<DescrNum; i++) {
816                 /* set the pointers right */
817                 pDescr->VNextRxd = VNextDescr & 0xffffffffULL;
818                 pDescr->pNextRxd = pNextDescr;
819                 if (!IsTx) pDescr->TcpSumStarts = ETH_HLEN << 16 | ETH_HLEN;
820
821                 /* advance one step */
822                 pPrevDescr = pDescr;
823                 pDescr = pNextDescr;
824                 pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
825                 VNextDescr += DescrSize;
826         }
827         pPrevDescr->pNextRxd = (RXD*) pMemArea;
828         pPrevDescr->VNextRxd = VMemArea;
829         pDescr = (RXD*) pMemArea;
830         *ppRingHead = (RXD*) pMemArea;
831         *ppRingTail = *ppRingHead;
832         *ppRingPrev = pPrevDescr;
833         *pRingFree = DescrNum;
834 } /* SetupRing */
835
836
837 /*****************************************************************************
838  *
839  *      PortReInitBmu - re-initiate the descriptor rings for one port
840  *
841  * Description:
842  *      This function reinitializes the descriptor rings of one port
843  *      in memory. The port must be stopped before.
844  *      The HW is initialized with the descriptor start addresses.
845  *
846  * Returns:
847  *      none
848  */
849 static void PortReInitBmu(
850 SK_AC   *pAC,           /* pointer to adapter context */
851 int     PortIndex)      /* index of the port for which to re-init */
852 {
853         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
854                 ("PortReInitBmu "));
855
856         /* set address of first descriptor of ring in BMU */
857         SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+ Q_DA_L,
858                 (uint32_t)(((caddr_t)
859                 (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
860                 pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
861                 pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) &
862                 0xFFFFFFFF));
863         SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+ Q_DA_H,
864                 (uint32_t)(((caddr_t)
865                 (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
866                 pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
867                 pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) >> 32));
868         SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+Q_DA_L,
869                 (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
870                 pAC->RxPort[PortIndex].pRxDescrRing +
871                 pAC->RxPort[PortIndex].VRxDescrRing) & 0xFFFFFFFF));
872         SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+Q_DA_H,
873                 (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
874                 pAC->RxPort[PortIndex].pRxDescrRing +
875                 pAC->RxPort[PortIndex].VRxDescrRing) >> 32));
876 } /* PortReInitBmu */
877
878
879 /****************************************************************************
880  *
881  *      SkGeIsr - handle adapter interrupts
882  *
883  * Description:
884  *      The interrupt routine is called when the network adapter
885  *      generates an interrupt. It may also be called if another device
886  *      shares this interrupt vector with the driver.
887  *
888  * Returns: N/A
889  *
890  */
891 static SkIsrRetVar SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
892 {
893 struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
894 DEV_NET         *pNet;
895 SK_AC           *pAC;
896 SK_U32          IntSrc;         /* interrupts source register contents */       
897
898         pNet = netdev_priv(dev);
899         pAC = pNet->pAC;
900         
901         /*
902          * Check and process if its our interrupt
903          */
904         SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
905         if (IntSrc == 0) {
906                 return SkIsrRetNone;
907         }
908
909         while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
910 #if 0 /* software irq currently not used */
911                 if (IntSrc & IS_IRQ_SW) {
912                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
913                                 SK_DBGCAT_DRV_INT_SRC,
914                                 ("Software IRQ\n"));
915                 }
916 #endif
917                 if (IntSrc & IS_R1_F) {
918                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
919                                 SK_DBGCAT_DRV_INT_SRC,
920                                 ("EOF RX1 IRQ\n"));
921                         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
922                         SK_PNMI_CNT_RX_INTR(pAC, 0);
923                 }
924                 if (IntSrc & IS_R2_F) {
925                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
926                                 SK_DBGCAT_DRV_INT_SRC,
927                                 ("EOF RX2 IRQ\n"));
928                         ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
929                         SK_PNMI_CNT_RX_INTR(pAC, 1);
930                 }
931 #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
932                 if (IntSrc & IS_XA1_F) {
933                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
934                                 SK_DBGCAT_DRV_INT_SRC,
935                                 ("EOF AS TX1 IRQ\n"));
936                         SK_PNMI_CNT_TX_INTR(pAC, 0);
937                         spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
938                         FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
939                         spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
940                 }
941                 if (IntSrc & IS_XA2_F) {
942                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
943                                 SK_DBGCAT_DRV_INT_SRC,
944                                 ("EOF AS TX2 IRQ\n"));
945                         SK_PNMI_CNT_TX_INTR(pAC, 1);
946                         spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
947                         FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
948                         spin_unlock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
949                 }
950 #if 0 /* only if sync. queues used */
951                 if (IntSrc & IS_XS1_F) {
952                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
953                                 SK_DBGCAT_DRV_INT_SRC,
954                                 ("EOF SY TX1 IRQ\n"));
955                         SK_PNMI_CNT_TX_INTR(pAC, 1);
956                         spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
957                         FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
958                         spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
959                         ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
960                 }
961                 if (IntSrc & IS_XS2_F) {
962                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
963                                 SK_DBGCAT_DRV_INT_SRC,
964                                 ("EOF SY TX2 IRQ\n"));
965                         SK_PNMI_CNT_TX_INTR(pAC, 1);
966                         spin_lock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
967                         FreeTxDescriptors(pAC, 1, TX_PRIO_HIGH);
968                         spin_unlock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
969                         ClearTxIrq(pAC, 1, TX_PRIO_HIGH);
970                 }
971 #endif
972 #endif
973
974                 /* do all IO at once */
975                 if (IntSrc & IS_R1_F)
976                         ClearAndStartRx(pAC, 0);
977                 if (IntSrc & IS_R2_F)
978                         ClearAndStartRx(pAC, 1);
979 #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
980                 if (IntSrc & IS_XA1_F)
981                         ClearTxIrq(pAC, 0, TX_PRIO_LOW);
982                 if (IntSrc & IS_XA2_F)
983                         ClearTxIrq(pAC, 1, TX_PRIO_LOW);
984 #endif
985                 SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
986         } /* while (IntSrc & IRQ_MASK != 0) */
987
988         IntSrc &= pAC->GIni.GIValIrqMask;
989         if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
990                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
991                         ("SPECIAL IRQ DP-Cards => %x\n", IntSrc));
992                 pAC->CheckQueue = SK_FALSE;
993                 spin_lock(&pAC->SlowPathLock);
994                 if (IntSrc & SPECIAL_IRQS)
995                         SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
996
997                 SkEventDispatcher(pAC, pAC->IoBase);
998                 spin_unlock(&pAC->SlowPathLock);
999         }
1000         /*
1001          * do it all again is case we cleared an interrupt that
1002          * came in after handling the ring (OUTs may be delayed
1003          * in hardware buffers, but are through after IN)
1004          *
1005          * rroesler: has been commented out and shifted to
1006          *           SkGeDrvEvent(), because it is timer
1007          *           guarded now
1008          *
1009         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1010         ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
1011          */
1012
1013         if (pAC->CheckQueue) {
1014                 pAC->CheckQueue = SK_FALSE;
1015                 spin_lock(&pAC->SlowPathLock);
1016                 SkEventDispatcher(pAC, pAC->IoBase);
1017                 spin_unlock(&pAC->SlowPathLock);
1018         }
1019
1020         /* IRQ is processed - Enable IRQs again*/
1021         SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
1022
1023                 return SkIsrRetHandled;
1024 } /* SkGeIsr */
1025
1026
1027 /****************************************************************************
1028  *
1029  *      SkGeIsrOnePort - handle adapter interrupts for single port adapter
1030  *
1031  * Description:
1032  *      The interrupt routine is called when the network adapter
1033  *      generates an interrupt. It may also be called if another device
1034  *      shares this interrupt vector with the driver.
1035  *      This is the same as above, but handles only one port.
1036  *
1037  * Returns: N/A
1038  *
1039  */
1040 static SkIsrRetVar SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
1041 {
1042 struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
1043 DEV_NET         *pNet;
1044 SK_AC           *pAC;
1045 SK_U32          IntSrc;         /* interrupts source register contents */       
1046
1047         pNet = netdev_priv(dev);
1048         pAC = pNet->pAC;
1049         
1050         /*
1051          * Check and process if its our interrupt
1052          */
1053         SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
1054         if (IntSrc == 0) {
1055                 return SkIsrRetNone;
1056         }
1057         
1058         while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
1059 #if 0 /* software irq currently not used */
1060                 if (IntSrc & IS_IRQ_SW) {
1061                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1062                                 SK_DBGCAT_DRV_INT_SRC,
1063                                 ("Software IRQ\n"));
1064                 }
1065 #endif
1066                 if (IntSrc & IS_R1_F) {
1067                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1068                                 SK_DBGCAT_DRV_INT_SRC,
1069                                 ("EOF RX1 IRQ\n"));
1070                         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1071                         SK_PNMI_CNT_RX_INTR(pAC, 0);
1072                 }
1073 #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
1074                 if (IntSrc & IS_XA1_F) {
1075                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1076                                 SK_DBGCAT_DRV_INT_SRC,
1077                                 ("EOF AS TX1 IRQ\n"));
1078                         SK_PNMI_CNT_TX_INTR(pAC, 0);
1079                         spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1080                         FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
1081                         spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1082                 }
1083 #if 0 /* only if sync. queues used */
1084                 if (IntSrc & IS_XS1_F) {
1085                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1086                                 SK_DBGCAT_DRV_INT_SRC,
1087                                 ("EOF SY TX1 IRQ\n"));
1088                         SK_PNMI_CNT_TX_INTR(pAC, 0);
1089                         spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1090                         FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
1091                         spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1092                         ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
1093                 }
1094 #endif
1095 #endif
1096
1097                 /* do all IO at once */
1098                 if (IntSrc & IS_R1_F)
1099                         ClearAndStartRx(pAC, 0);
1100 #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
1101                 if (IntSrc & IS_XA1_F)
1102                         ClearTxIrq(pAC, 0, TX_PRIO_LOW);
1103 #endif
1104                 SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
1105         } /* while (IntSrc & IRQ_MASK != 0) */
1106         
1107         IntSrc &= pAC->GIni.GIValIrqMask;
1108         if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
1109                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
1110                         ("SPECIAL IRQ SP-Cards => %x\n", IntSrc));
1111                 pAC->CheckQueue = SK_FALSE;
1112                 spin_lock(&pAC->SlowPathLock);
1113                 if (IntSrc & SPECIAL_IRQS)
1114                         SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
1115
1116                 SkEventDispatcher(pAC, pAC->IoBase);
1117                 spin_unlock(&pAC->SlowPathLock);
1118         }
1119         /*
1120          * do it all again is case we cleared an interrupt that
1121          * came in after handling the ring (OUTs may be delayed
1122          * in hardware buffers, but are through after IN)
1123          *
1124          * rroesler: has been commented out and shifted to
1125          *           SkGeDrvEvent(), because it is timer
1126          *           guarded now
1127          *
1128         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1129          */
1130
1131         /* IRQ is processed - Enable IRQs again*/
1132         SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
1133
1134                 return SkIsrRetHandled;
1135 } /* SkGeIsrOnePort */
1136
1137 #ifdef CONFIG_NET_POLL_CONTROLLER
1138 /****************************************************************************
1139  *
1140  *      SkGePollController - polling receive, for netconsole
1141  *
1142  * Description:
1143  *      Polling receive - used by netconsole and other diagnostic tools
1144  *      to allow network i/o with interrupts disabled.
1145  *
1146  * Returns: N/A
1147  */
1148 static void SkGePollController(struct net_device *dev)
1149 {
1150         disable_irq(dev->irq);
1151         SkGeIsr(dev->irq, dev, NULL);
1152         enable_irq(dev->irq);
1153 }
1154 #endif
1155
1156 /****************************************************************************
1157  *
1158  *      SkGeOpen - handle start of initialized adapter
1159  *
1160  * Description:
1161  *      This function starts the initialized adapter.
1162  *      The board level variable is set and the adapter is
1163  *      brought to full functionality.
1164  *      The device flags are set for operation.
1165  *      Do all necessary level 2 initialization, enable interrupts and
1166  *      give start command to RLMT.
1167  *
1168  * Returns:
1169  *      0 on success
1170  *      != 0 on error
1171  */
1172 static int SkGeOpen(
1173 struct SK_NET_DEVICE    *dev)
1174 {
1175         DEV_NET                 *pNet;
1176         SK_AC                   *pAC;
1177         unsigned long   Flags;          /* for spin lock */
1178         int                             i;
1179         SK_EVPARA               EvPara;         /* an event parameter union */
1180
1181         pNet = netdev_priv(dev);
1182         pAC = pNet->pAC;
1183         
1184         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1185                 ("SkGeOpen: pAC=0x%lX:\n", (unsigned long)pAC));
1186
1187 #ifdef SK_DIAG_SUPPORT
1188         if (pAC->DiagModeActive == DIAG_ACTIVE) {
1189                 if (pAC->Pnmi.DiagAttached == SK_DIAG_RUNNING) {
1190                         return (-1);   /* still in use by diag; deny actions */
1191                 } 
1192         }
1193 #endif
1194
1195         /* Set blink mode */
1196         if ((pAC->PciDev->vendor == 0x1186) || (pAC->PciDev->vendor == 0x11ab ))
1197                 pAC->GIni.GILedBlinkCtrl = OEM_CONFIG_VALUE;
1198
1199         if (pAC->BoardLevel == SK_INIT_DATA) {
1200                 /* level 1 init common modules here */
1201                 if (SkGeInit(pAC, pAC->IoBase, SK_INIT_IO) != 0) {
1202                         printk("%s: HWInit (1) failed.\n", pAC->dev[pNet->PortNr]->name);
1203                         return (-1);
1204                 }
1205                 SkI2cInit       (pAC, pAC->IoBase, SK_INIT_IO);
1206                 SkEventInit     (pAC, pAC->IoBase, SK_INIT_IO);
1207                 SkPnmiInit      (pAC, pAC->IoBase, SK_INIT_IO);
1208                 SkAddrInit      (pAC, pAC->IoBase, SK_INIT_IO);
1209                 SkRlmtInit      (pAC, pAC->IoBase, SK_INIT_IO);
1210                 SkTimerInit     (pAC, pAC->IoBase, SK_INIT_IO);
1211                 pAC->BoardLevel = SK_INIT_IO;
1212         }
1213
1214         if (pAC->BoardLevel != SK_INIT_RUN) {
1215                 /* tschilling: Level 2 init modules here, check return value. */
1216                 if (SkGeInit(pAC, pAC->IoBase, SK_INIT_RUN) != 0) {
1217                         printk("%s: HWInit (2) failed.\n", pAC->dev[pNet->PortNr]->name);
1218                         return (-1);
1219                 }
1220                 SkI2cInit       (pAC, pAC->IoBase, SK_INIT_RUN);
1221                 SkEventInit     (pAC, pAC->IoBase, SK_INIT_RUN);
1222                 SkPnmiInit      (pAC, pAC->IoBase, SK_INIT_RUN);
1223                 SkAddrInit      (pAC, pAC->IoBase, SK_INIT_RUN);
1224                 SkRlmtInit      (pAC, pAC->IoBase, SK_INIT_RUN);
1225                 SkTimerInit     (pAC, pAC->IoBase, SK_INIT_RUN);
1226                 pAC->BoardLevel = SK_INIT_RUN;
1227         }
1228
1229         for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1230                 /* Enable transmit descriptor polling. */
1231                 SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
1232                 FillRxRing(pAC, &pAC->RxPort[i]);
1233         }
1234         SkGeYellowLED(pAC, pAC->IoBase, 1);
1235
1236         StartDrvCleanupTimer(pAC);
1237         SkDimEnableModerationIfNeeded(pAC);     
1238         SkDimDisplayModerationSettings(pAC);
1239
1240         pAC->GIni.GIValIrqMask &= IRQ_MASK;
1241
1242         /* enable Interrupts */
1243         SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
1244         SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
1245
1246         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1247
1248         if ((pAC->RlmtMode != 0) && (pAC->MaxPorts == 0)) {
1249                 EvPara.Para32[0] = pAC->RlmtNets;
1250                 EvPara.Para32[1] = -1;
1251                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
1252                         EvPara);
1253                 EvPara.Para32[0] = pAC->RlmtMode;
1254                 EvPara.Para32[1] = 0;
1255                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_MODE_CHANGE,
1256                         EvPara);
1257         }
1258
1259         EvPara.Para32[0] = pNet->NetNr;
1260         EvPara.Para32[1] = -1;
1261         SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
1262         SkEventDispatcher(pAC, pAC->IoBase);
1263         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1264
1265         pAC->MaxPorts++;
1266
1267
1268         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1269                 ("SkGeOpen suceeded\n"));
1270
1271         return (0);
1272 } /* SkGeOpen */
1273
1274
1275 /****************************************************************************
1276  *
1277  *      SkGeClose - Stop initialized adapter
1278  *
1279  * Description:
1280  *      Close initialized adapter.
1281  *
1282  * Returns:
1283  *      0 - on success
1284  *      error code - on error
1285  */
1286 static int SkGeClose(
1287 struct SK_NET_DEVICE    *dev)
1288 {
1289         DEV_NET         *pNet;
1290         DEV_NET         *newPtrNet;
1291         SK_AC           *pAC;
1292
1293         unsigned long   Flags;          /* for spin lock */
1294         int             i;
1295         int             PortIdx;
1296         SK_EVPARA       EvPara;
1297
1298         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1299                 ("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
1300
1301         pNet = netdev_priv(dev);
1302         pAC = pNet->pAC;
1303
1304 #ifdef SK_DIAG_SUPPORT
1305         if (pAC->DiagModeActive == DIAG_ACTIVE) {
1306                 if (pAC->DiagFlowCtrl == SK_FALSE) {
1307                         /* 
1308                         ** notify that the interface which has been closed
1309                         ** by operator interaction must not be started up 
1310                         ** again when the DIAG has finished. 
1311                         */
1312                         newPtrNet = netdev_priv(pAC->dev[0]);
1313                         if (newPtrNet == pNet) {
1314                                 pAC->WasIfUp[0] = SK_FALSE;
1315                         } else {
1316                                 pAC->WasIfUp[1] = SK_FALSE;
1317                         }
1318                         return 0; /* return to system everything is fine... */
1319                 } else {
1320                         pAC->DiagFlowCtrl = SK_FALSE;
1321                 }
1322         }
1323 #endif
1324
1325         netif_stop_queue(dev);
1326
1327         if (pAC->RlmtNets == 1)
1328                 PortIdx = pAC->ActivePort;
1329         else
1330                 PortIdx = pNet->NetNr;
1331
1332         StopDrvCleanupTimer(pAC);
1333
1334         /*
1335          * Clear multicast table, promiscuous mode ....
1336          */
1337         SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
1338         SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
1339                 SK_PROM_MODE_NONE);
1340
1341         if (pAC->MaxPorts == 1) {
1342                 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1343                 /* disable interrupts */
1344                 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
1345                 EvPara.Para32[0] = pNet->NetNr;
1346                 EvPara.Para32[1] = -1;
1347                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1348                 SkEventDispatcher(pAC, pAC->IoBase);
1349                 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
1350                 /* stop the hardware */
1351                 SkGeDeInit(pAC, pAC->IoBase);
1352                 pAC->BoardLevel = SK_INIT_DATA;
1353                 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1354         } else {
1355
1356                 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1357                 EvPara.Para32[0] = pNet->NetNr;
1358                 EvPara.Para32[1] = -1;
1359                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1360                 SkPnmiEvent(pAC, pAC->IoBase, SK_PNMI_EVT_XMAC_RESET, EvPara);
1361                 SkEventDispatcher(pAC, pAC->IoBase);
1362                 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1363                 
1364                 /* Stop port */
1365                 spin_lock_irqsave(&pAC->TxPort[pNet->PortNr]
1366                         [TX_PRIO_LOW].TxDesRingLock, Flags);
1367                 SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
1368                         SK_STOP_ALL, SK_HARD_RST);
1369                 spin_unlock_irqrestore(&pAC->TxPort[pNet->PortNr]
1370                         [TX_PRIO_LOW].TxDesRingLock, Flags);
1371         }
1372
1373         if (pAC->RlmtNets == 1) {
1374                 /* clear all descriptor rings */
1375                 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1376                         ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
1377                         ClearRxRing(pAC, &pAC->RxPort[i]);
1378                         ClearTxRing(pAC, &pAC->TxPort[i][TX_PRIO_LOW]);
1379                 }
1380         } else {
1381                 /* clear port descriptor rings */
1382                 ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
1383                 ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
1384                 ClearTxRing(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]);
1385         }
1386
1387         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1388                 ("SkGeClose: done "));
1389
1390         SK_MEMSET(&(pAC->PnmiBackup), 0, sizeof(SK_PNMI_STRUCT_DATA));
1391         SK_MEMCPY(&(pAC->PnmiBackup), &(pAC->PnmiStruct), 
1392                         sizeof(SK_PNMI_STRUCT_DATA));
1393
1394         pAC->MaxPorts--;
1395
1396         return (0);
1397 } /* SkGeClose */
1398
1399
1400 /*****************************************************************************
1401  *
1402  *      SkGeXmit - Linux frame transmit function
1403  *
1404  * Description:
1405  *      The system calls this function to send frames onto the wire.
1406  *      It puts the frame in the tx descriptor ring. If the ring is
1407  *      full then, the 'tbusy' flag is set.
1408  *
1409  * Returns:
1410  *      0, if everything is ok
1411  *      !=0, on error
1412  * WARNING: returning 1 in 'tbusy' case caused system crashes (double
1413  *      allocated skb's) !!!
1414  */
1415 static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
1416 {
1417 DEV_NET         *pNet;
1418 SK_AC           *pAC;
1419 int                     Rc;     /* return code of XmitFrame */
1420
1421         pNet = netdev_priv(dev);
1422         pAC = pNet->pAC;
1423
1424         if ((!skb_shinfo(skb)->nr_frags) ||
1425                 (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) {
1426                 /* Don't activate scatter-gather and hardware checksum */
1427
1428                 if (pAC->RlmtNets == 2)
1429                         Rc = XmitFrame(
1430                                 pAC,
1431                                 &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
1432                                 skb);
1433                 else
1434                         Rc = XmitFrame(
1435                                 pAC,
1436                                 &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
1437                                 skb);
1438         } else {
1439                 /* scatter-gather and hardware TCP checksumming anabled*/
1440                 if (pAC->RlmtNets == 2)
1441                         Rc = XmitFrameSG(
1442                                 pAC,
1443                                 &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
1444                                 skb);
1445                 else
1446                         Rc = XmitFrameSG(
1447                                 pAC,
1448                                 &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
1449                                 skb);
1450         }
1451
1452         /* Transmitter out of resources? */
1453         if (Rc <= 0) {
1454                 netif_stop_queue(dev);
1455         }
1456
1457         /* If not taken, give buffer ownership back to the
1458          * queueing layer.
1459          */
1460         if (Rc < 0)
1461                 return (1);
1462
1463         dev->trans_start = jiffies;
1464         return (0);
1465 } /* SkGeXmit */
1466
1467
1468 /*****************************************************************************
1469  *
1470  *      XmitFrame - fill one socket buffer into the transmit ring
1471  *
1472  * Description:
1473  *      This function puts a message into the transmit descriptor ring
1474  *      if there is a descriptors left.
1475  *      Linux skb's consist of only one continuous buffer.
1476  *      The first step locks the ring. It is held locked
1477  *      all time to avoid problems with SWITCH_../PORT_RESET.
1478  *      Then the descriptoris allocated.
1479  *      The second part is linking the buffer to the descriptor.
1480  *      At the very last, the Control field of the descriptor
1481  *      is made valid for the BMU and a start TX command is given
1482  *      if necessary.
1483  *
1484  * Returns:
1485  *      > 0 - on succes: the number of bytes in the message
1486  *      = 0 - on resource shortage: this frame sent or dropped, now
1487  *              the ring is full ( -> set tbusy)
1488  *      < 0 - on failure: other problems ( -> return failure to upper layers)
1489  */
1490 static int XmitFrame(
1491 SK_AC           *pAC,           /* pointer to adapter context           */
1492 TX_PORT         *pTxPort,       /* pointer to struct of port to send to */
1493 struct sk_buff  *pMessage)      /* pointer to send-message              */
1494 {
1495         TXD             *pTxd;          /* the rxd to fill */
1496         TXD             *pOldTxd;
1497         unsigned long    Flags;
1498         SK_U64           PhysAddr;
1499         int              BytesSend = pMessage->len;
1500
1501         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS, ("X"));
1502
1503         spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
1504 #ifndef USE_TX_COMPLETE
1505         FreeTxDescriptors(pAC, pTxPort);
1506 #endif
1507         if (pTxPort->TxdRingFree == 0) {
1508                 /* 
1509                 ** no enough free descriptors in ring at the moment.
1510                 ** Maybe free'ing some old one help?
1511                 */
1512                 FreeTxDescriptors(pAC, pTxPort);
1513                 if (pTxPort->TxdRingFree == 0) {
1514                         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
1515                         SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
1516                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1517                                 SK_DBGCAT_DRV_TX_PROGRESS,
1518                                 ("XmitFrame failed\n"));
1519                         /* 
1520                         ** the desired message can not be sent
1521                         ** Because tbusy seems to be set, the message 
1522                         ** should not be freed here. It will be used 
1523                         ** by the scheduler of the ethernet handler 
1524                         */
1525                         return (-1);
1526                 }
1527         }
1528
1529         /*
1530         ** If the passed socket buffer is of smaller MTU-size than 60,
1531         ** copy everything into new buffer and fill all bytes between
1532         ** the original packet end and the new packet end of 60 with 0x00.
1533         ** This is to resolve faulty padding by the HW with 0xaa bytes.
1534         */
1535         if (BytesSend < C_LEN_ETHERNET_MINSIZE) {
1536                 if ((pMessage = skb_padto(pMessage, C_LEN_ETHERNET_MINSIZE)) == NULL) {
1537                         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
1538                         return 0;
1539                 }
1540                 pMessage->len = C_LEN_ETHERNET_MINSIZE;
1541         }
1542
1543         /* 
1544         ** advance head counter behind descriptor needed for this frame, 
1545         ** so that needed descriptor is reserved from that on. The next
1546         ** action will be to add the passed buffer to the TX-descriptor
1547         */
1548         pTxd = pTxPort->pTxdRingHead;
1549         pTxPort->pTxdRingHead = pTxd->pNextTxd;
1550         pTxPort->TxdRingFree--;
1551
1552 #ifdef SK_DUMP_TX
1553         DumpMsg(pMessage, "XmitFrame");
1554 #endif
1555
1556         /* 
1557         ** First step is to map the data to be sent via the adapter onto
1558         ** the DMA memory. Kernel 2.2 uses virt_to_bus(), but kernels 2.4
1559         ** and 2.6 need to use pci_map_page() for that mapping.
1560         */
1561         PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
1562                                         virt_to_page(pMessage->data),
1563                                         ((unsigned long) pMessage->data & ~PAGE_MASK),
1564                                         pMessage->len,
1565                                         PCI_DMA_TODEVICE);
1566         pTxd->VDataLow  = (SK_U32) (PhysAddr & 0xffffffff);
1567         pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
1568         pTxd->pMBuf     = pMessage;
1569
1570         if (pMessage->ip_summed == CHECKSUM_HW) {
1571                 u16 hdrlen = pMessage->h.raw - pMessage->data;
1572                 u16 offset = hdrlen + pMessage->csum;
1573
1574                 if ((pMessage->h.ipiph->protocol == IPPROTO_UDP ) &&
1575                         (pAC->GIni.GIChipRev == 0) &&
1576                         (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
1577                         pTxd->TBControl = BMU_TCP_CHECK;
1578                 } else {
1579                         pTxd->TBControl = BMU_UDP_CHECK;
1580                 }
1581
1582                 pTxd->TcpSumOfs = 0;
1583                 pTxd->TcpSumSt  = hdrlen;
1584                 pTxd->TcpSumWr  = offset;
1585
1586                 pTxd->TBControl |= BMU_OWN | BMU_STF | 
1587                                    BMU_SW  | BMU_EOF |
1588 #ifdef USE_TX_COMPLETE
1589                                    BMU_IRQ_EOF |
1590 #endif
1591                                    pMessage->len;
1592         } else {
1593                 pTxd->TBControl = BMU_OWN | BMU_STF | BMU_CHECK | 
1594                                   BMU_SW  | BMU_EOF |
1595 #ifdef USE_TX_COMPLETE
1596                                    BMU_IRQ_EOF |
1597 #endif
1598                         pMessage->len;
1599         }
1600
1601         /* 
1602         ** If previous descriptor already done, give TX start cmd 
1603         */
1604         pOldTxd = xchg(&pTxPort->pTxdRingPrev, pTxd);
1605         if ((pOldTxd->TBControl & BMU_OWN) == 0) {
1606                 SK_OUT8(pTxPort->HwAddr, Q_CSR, CSR_START);
1607         }       
1608
1609         /* 
1610         ** after releasing the lock, the skb may immediately be free'd 
1611         */
1612         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
1613         if (pTxPort->TxdRingFree != 0) {
1614                 return (BytesSend);
1615         } else {
1616                 return (0);
1617         }
1618
1619 } /* XmitFrame */
1620
1621 /*****************************************************************************
1622  *
1623  *      XmitFrameSG - fill one socket buffer into the transmit ring
1624  *                (use SG and TCP/UDP hardware checksumming)
1625  *
1626  * Description:
1627  *      This function puts a message into the transmit descriptor ring
1628  *      if there is a descriptors left.
1629  *
1630  * Returns:
1631  *      > 0 - on succes: the number of bytes in the message
1632  *      = 0 - on resource shortage: this frame sent or dropped, now
1633  *              the ring is full ( -> set tbusy)
1634  *      < 0 - on failure: other problems ( -> return failure to upper layers)
1635  */
1636 static int XmitFrameSG(
1637 SK_AC           *pAC,           /* pointer to adapter context           */
1638 TX_PORT         *pTxPort,       /* pointer to struct of port to send to */
1639 struct sk_buff  *pMessage)      /* pointer to send-message              */
1640 {
1641
1642         TXD             *pTxd;
1643         TXD             *pTxdFst;
1644         TXD             *pTxdLst;
1645         int              CurrFrag;
1646         int              BytesSend;
1647         skb_frag_t      *sk_frag;
1648         SK_U64           PhysAddr;
1649         unsigned long    Flags;
1650         SK_U32           Control;
1651
1652         spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
1653 #ifndef USE_TX_COMPLETE
1654         FreeTxDescriptors(pAC, pTxPort);
1655 #endif
1656         if ((skb_shinfo(pMessage)->nr_frags +1) > pTxPort->TxdRingFree) {
1657                 FreeTxDescriptors(pAC, pTxPort);
1658                 if ((skb_shinfo(pMessage)->nr_frags + 1) > pTxPort->TxdRingFree) {
1659                         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
1660                         SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
1661                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1662                                 SK_DBGCAT_DRV_TX_PROGRESS,
1663                                 ("XmitFrameSG failed - Ring full\n"));
1664                                 /* this message can not be sent now */
1665                         return(-1);
1666                 }
1667         }
1668
1669         pTxd      = pTxPort->pTxdRingHead;
1670         pTxdFst   = pTxd;
1671         pTxdLst   = pTxd;
1672         BytesSend = 0;
1673
1674         /* 
1675         ** Map the first fragment (header) into the DMA-space
1676         */
1677         PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
1678                         virt_to_page(pMessage->data),
1679                         ((unsigned long) pMessage->data & ~PAGE_MASK),
1680                         skb_headlen(pMessage),
1681                         PCI_DMA_TODEVICE);
1682
1683         pTxd->VDataLow  = (SK_U32) (PhysAddr & 0xffffffff);
1684         pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
1685
1686         /* 
1687         ** Does the HW need to evaluate checksum for TCP or UDP packets? 
1688         */
1689         if (pMessage->ip_summed == CHECKSUM_HW) {
1690                 u16 hdrlen = pMessage->h.raw - pMessage->data;
1691                 u16 offset = hdrlen + pMessage->csum;
1692
1693                 Control = BMU_STFWD;
1694
1695                 /* 
1696                 ** We have to use the opcode for tcp here,  because the
1697                 ** opcode for udp is not working in the hardware yet 
1698                 ** (Revision 2.0)
1699                 */
1700                 if ((pMessage->h.ipiph->protocol == IPPROTO_UDP ) &&
1701                         (pAC->GIni.GIChipRev == 0) &&
1702                         (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
1703                         Control |= BMU_TCP_CHECK;
1704                 } else {
1705                         Control |= BMU_UDP_CHECK;
1706                 }
1707
1708                 pTxd->TcpSumOfs = 0;
1709                 pTxd->TcpSumSt  = hdrlen;
1710                 pTxd->TcpSumWr  = offset;
1711         } else
1712                 Control = BMU_CHECK | BMU_SW;
1713
1714         pTxd->TBControl = BMU_STF | Control | skb_headlen(pMessage);
1715
1716         pTxd = pTxd->pNextTxd;
1717         pTxPort->TxdRingFree--;
1718         BytesSend += skb_headlen(pMessage);
1719
1720         /* 
1721         ** Browse over all SG fragments and map each of them into the DMA space
1722         */
1723         for (CurrFrag = 0; CurrFrag < skb_shinfo(pMessage)->nr_frags; CurrFrag++) {
1724                 sk_frag = &skb_shinfo(pMessage)->frags[CurrFrag];
1725                 /* 
1726                 ** we already have the proper value in entry
1727                 */
1728                 PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
1729                                                  sk_frag->page,
1730                                                  sk_frag->page_offset,
1731                                                  sk_frag->size,
1732                                                  PCI_DMA_TODEVICE);
1733
1734                 pTxd->VDataLow  = (SK_U32) (PhysAddr & 0xffffffff);
1735                 pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
1736                 pTxd->pMBuf     = pMessage;
1737                 
1738                 pTxd->TBControl = Control | BMU_OWN | sk_frag->size;;
1739
1740                 /* 
1741                 ** Do we have the last fragment? 
1742                 */
1743                 if( (CurrFrag+1) == skb_shinfo(pMessage)->nr_frags )  {
1744 #ifdef USE_TX_COMPLETE
1745                         pTxd->TBControl |= BMU_EOF | BMU_IRQ_EOF;
1746 #else
1747                         pTxd->TBControl |= BMU_EOF;
1748 #endif
1749                         pTxdFst->TBControl |= BMU_OWN | BMU_SW;
1750                 }
1751                 pTxdLst = pTxd;
1752                 pTxd    = pTxd->pNextTxd;
1753                 pTxPort->TxdRingFree--;
1754                 BytesSend += sk_frag->size;
1755         }
1756
1757         /* 
1758         ** If previous descriptor already done, give TX start cmd 
1759         */
1760         if ((pTxPort->pTxdRingPrev->TBControl & BMU_OWN) == 0) {
1761                 SK_OUT8(pTxPort->HwAddr, Q_CSR, CSR_START);
1762         }
1763
1764         pTxPort->pTxdRingPrev = pTxdLst;
1765         pTxPort->pTxdRingHead = pTxd;
1766
1767         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
1768
1769         if (pTxPort->TxdRingFree > 0) {
1770                 return (BytesSend);
1771         } else {
1772                 return (0);
1773         }
1774 }
1775
1776 /*****************************************************************************
1777  *
1778  *      FreeTxDescriptors - release descriptors from the descriptor ring
1779  *
1780  * Description:
1781  *      This function releases descriptors from a transmit ring if they
1782  *      have been sent by the BMU.
1783  *      If a descriptors is sent, it can be freed and the message can
1784  *      be freed, too.
1785  *      The SOFTWARE controllable bit is used to prevent running around a
1786  *      completely free ring for ever. If this bit is no set in the
1787  *      frame (by XmitFrame), this frame has never been sent or is
1788  *      already freed.
1789  *      The Tx descriptor ring lock must be held while calling this function !!!
1790  *
1791  * Returns:
1792  *      none
1793  */
1794 static void FreeTxDescriptors(
1795 SK_AC   *pAC,           /* pointer to the adapter context */
1796 TX_PORT *pTxPort)       /* pointer to destination port structure */
1797 {
1798 TXD     *pTxd;          /* pointer to the checked descriptor */
1799 TXD     *pNewTail;      /* pointer to 'end' of the ring */
1800 SK_U32  Control;        /* TBControl field of descriptor */
1801 SK_U64  PhysAddr;       /* address of DMA mapping */
1802
1803         pNewTail = pTxPort->pTxdRingTail;
1804         pTxd     = pNewTail;
1805         /*
1806         ** loop forever; exits if BMU_SW bit not set in start frame
1807         ** or BMU_OWN bit set in any frame
1808         */
1809         while (1) {
1810                 Control = pTxd->TBControl;
1811                 if ((Control & BMU_SW) == 0) {
1812                         /*
1813                         ** software controllable bit is set in first
1814                         ** fragment when given to BMU. Not set means that
1815                         ** this fragment was never sent or is already
1816                         ** freed ( -> ring completely free now).
1817                         */
1818                         pTxPort->pTxdRingTail = pTxd;
1819                         netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
1820                         return;
1821                 }
1822                 if (Control & BMU_OWN) {
1823                         pTxPort->pTxdRingTail = pTxd;
1824                         if (pTxPort->TxdRingFree > 0) {
1825                                 netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
1826                         }
1827                         return;
1828                 }
1829                 
1830                 /* 
1831                 ** release the DMA mapping, because until not unmapped
1832                 ** this buffer is considered being under control of the
1833                 ** adapter card!
1834                 */
1835                 PhysAddr = ((SK_U64) pTxd->VDataHigh) << (SK_U64) 32;
1836                 PhysAddr |= (SK_U64) pTxd->VDataLow;
1837                 pci_unmap_page(pAC->PciDev, PhysAddr,
1838                                  pTxd->pMBuf->len,
1839                                  PCI_DMA_TODEVICE);
1840
1841                 if (Control & BMU_EOF)
1842                         DEV_KFREE_SKB_ANY(pTxd->pMBuf); /* free message */
1843
1844                 pTxPort->TxdRingFree++;
1845                 pTxd->TBControl &= ~BMU_SW;
1846                 pTxd = pTxd->pNextTxd; /* point behind fragment with EOF */
1847         } /* while(forever) */
1848 } /* FreeTxDescriptors */
1849
1850 /*****************************************************************************
1851  *
1852  *      FillRxRing - fill the receive ring with valid descriptors
1853  *
1854  * Description:
1855  *      This function fills the receive ring descriptors with data
1856  *      segments and makes them valid for the BMU.
1857  *      The active ring is filled completely, if possible.
1858  *      The non-active ring is filled only partial to save memory.
1859  *
1860  * Description of rx ring structure:
1861  *      head - points to the descriptor which will be used next by the BMU
1862  *      tail - points to the next descriptor to give to the BMU
1863  *      
1864  * Returns:     N/A
1865  */
1866 static void FillRxRing(
1867 SK_AC           *pAC,           /* pointer to the adapter context */
1868 RX_PORT         *pRxPort)       /* ptr to port struct for which the ring
1869                                    should be filled */
1870 {
1871 unsigned long   Flags;
1872
1873         spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
1874         while (pRxPort->RxdRingFree > pRxPort->RxFillLimit) {
1875                 if(!FillRxDescriptor(pAC, pRxPort))
1876                         break;
1877         }
1878         spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
1879 } /* FillRxRing */
1880
1881
1882 /*****************************************************************************
1883  *
1884  *      FillRxDescriptor - fill one buffer into the receive ring
1885  *
1886  * Description:
1887  *      The function allocates a new receive buffer and
1888  *      puts it into the next descriptor.
1889  *
1890  * Returns:
1891  *      SK_TRUE - a buffer was added to the ring
1892  *      SK_FALSE - a buffer could not be added
1893  */
1894 static SK_BOOL FillRxDescriptor(
1895 SK_AC           *pAC,           /* pointer to the adapter context struct */
1896 RX_PORT         *pRxPort)       /* ptr to port struct of ring to fill */
1897 {
1898 struct sk_buff  *pMsgBlock;     /* pointer to a new message block */
1899 RXD             *pRxd;          /* the rxd to fill */
1900 SK_U16          Length;         /* data fragment length */
1901 SK_U64          PhysAddr;       /* physical address of a rx buffer */
1902
1903         pMsgBlock = alloc_skb(pAC->RxBufSize, GFP_ATOMIC);
1904         if (pMsgBlock == NULL) {
1905                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1906                         SK_DBGCAT_DRV_ENTRY,
1907                         ("%s: Allocation of rx buffer failed !\n",
1908                         pAC->dev[pRxPort->PortIndex]->name));
1909                 SK_PNMI_CNT_NO_RX_BUF(pAC, pRxPort->PortIndex);
1910                 return(SK_FALSE);
1911         }
1912         skb_reserve(pMsgBlock, 2); /* to align IP frames */
1913         /* skb allocated ok, so add buffer */
1914         pRxd = pRxPort->pRxdRingTail;
1915         pRxPort->pRxdRingTail = pRxd->pNextRxd;
1916         pRxPort->RxdRingFree--;
1917         Length = pAC->RxBufSize;
1918         PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
1919                 virt_to_page(pMsgBlock->data),
1920                 ((unsigned long) pMsgBlock->data &
1921                 ~PAGE_MASK),
1922                 pAC->RxBufSize - 2,
1923                 PCI_DMA_FROMDEVICE);
1924
1925         pRxd->VDataLow  = (SK_U32) (PhysAddr & 0xffffffff);
1926         pRxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
1927         pRxd->pMBuf     = pMsgBlock;
1928         pRxd->RBControl = BMU_OWN       | 
1929                           BMU_STF       | 
1930                           BMU_IRQ_EOF   | 
1931                           BMU_TCP_CHECK | 
1932                           Length;
1933         return (SK_TRUE);
1934
1935 } /* FillRxDescriptor */
1936
1937
1938 /*****************************************************************************
1939  *
1940  *      ReQueueRxBuffer - fill one buffer back into the receive ring
1941  *
1942  * Description:
1943  *      Fill a given buffer back into the rx ring. The buffer
1944  *      has been previously allocated and aligned, and its phys.
1945  *      address calculated, so this is no more necessary.
1946  *
1947  * Returns: N/A
1948  */
1949 static void ReQueueRxBuffer(
1950 SK_AC           *pAC,           /* pointer to the adapter context struct */
1951 RX_PORT         *pRxPort,       /* ptr to port struct of ring to fill */
1952 struct sk_buff  *pMsg,          /* pointer to the buffer */
1953 SK_U32          PhysHigh,       /* phys address high dword */
1954 SK_U32          PhysLow)        /* phys address low dword */
1955 {
1956 RXD             *pRxd;          /* the rxd to fill */
1957 SK_U16          Length;         /* data fragment length */
1958
1959         pRxd = pRxPort->pRxdRingTail;
1960         pRxPort->pRxdRingTail = pRxd->pNextRxd;
1961         pRxPort->RxdRingFree--;
1962         Length = pAC->RxBufSize;
1963
1964         pRxd->VDataLow  = PhysLow;
1965         pRxd->VDataHigh = PhysHigh;
1966         pRxd->pMBuf     = pMsg;
1967         pRxd->RBControl = BMU_OWN       | 
1968                           BMU_STF       |
1969                           BMU_IRQ_EOF   | 
1970                           BMU_TCP_CHECK | 
1971                           Length;
1972         return;
1973 } /* ReQueueRxBuffer */
1974
1975 /*****************************************************************************
1976  *
1977  *      ReceiveIrq - handle a receive IRQ
1978  *
1979  * Description:
1980  *      This function is called when a receive IRQ is set.
1981  *      It walks the receive descriptor ring and sends up all
1982  *      frames that are complete.
1983  *
1984  * Returns:     N/A
1985  */
1986 static void ReceiveIrq(
1987         SK_AC           *pAC,                   /* pointer to adapter context */
1988         RX_PORT         *pRxPort,               /* pointer to receive port struct */
1989         SK_BOOL         SlowPathLock)   /* indicates if SlowPathLock is needed */
1990 {
1991 RXD                             *pRxd;                  /* pointer to receive descriptors */
1992 SK_U32                  Control;                /* control field of descriptor */
1993 struct sk_buff  *pMsg;                  /* pointer to message holding frame */
1994 struct sk_buff  *pNewMsg;               /* pointer to a new message for copying frame */
1995 int                             FrameLength;    /* total length of received frame */
1996 SK_MBUF                 *pRlmtMbuf;             /* ptr to a buffer for giving a frame to rlmt */
1997 SK_EVPARA               EvPara;                 /* an event parameter union */  
1998 unsigned long   Flags;                  /* for spin lock */
1999 int                             PortIndex = pRxPort->PortIndex;
2000 unsigned int    Offset;
2001 unsigned int    NumBytes;
2002 unsigned int    ForRlmt;
2003 SK_BOOL                 IsBc;
2004 SK_BOOL                 IsMc;
2005 SK_BOOL  IsBadFrame;                    /* Bad frame */
2006
2007 SK_U32                  FrameStat;
2008 SK_U64                  PhysAddr;
2009
2010 rx_start:       
2011         /* do forever; exit if BMU_OWN found */
2012         for ( pRxd = pRxPort->pRxdRingHead ;
2013                   pRxPort->RxdRingFree < pAC->RxDescrPerRing ;
2014                   pRxd = pRxd->pNextRxd,
2015                   pRxPort->pRxdRingHead = pRxd,
2016                   pRxPort->RxdRingFree ++) {
2017
2018                 /*
2019                  * For a better understanding of this loop
2020                  * Go through every descriptor beginning at the head
2021                  * Please note: the ring might be completely received so the OWN bit
2022                  * set is not a good crirteria to leave that loop.
2023                  * Therefore the RingFree counter is used.
2024                  * On entry of this loop pRxd is a pointer to the Rxd that needs
2025                  * to be checked next.
2026                  */
2027
2028                 Control = pRxd->RBControl;
2029         
2030                 /* check if this descriptor is ready */
2031                 if ((Control & BMU_OWN) != 0) {
2032                         /* this descriptor is not yet ready */
2033                         /* This is the usual end of the loop */
2034                         /* We don't need to start the ring again */
2035                         FillRxRing(pAC, pRxPort);
2036                         return;
2037                 }
2038                 pAC->DynIrqModInfo.NbrProcessedDescr++;
2039
2040                 /* get length of frame and check it */
2041                 FrameLength = Control & BMU_BBC;
2042                 if (FrameLength > pAC->RxBufSize) {
2043                         goto rx_failed;
2044                 }
2045
2046                 /* check for STF and EOF */
2047                 if ((Control & (BMU_STF | BMU_EOF)) != (BMU_STF | BMU_EOF)) {
2048                         goto rx_failed;
2049                 }
2050
2051                 /* here we have a complete frame in the ring */
2052                 pMsg = pRxd->pMBuf;
2053
2054                 FrameStat = pRxd->FrameStat;
2055
2056                 /* check for frame length mismatch */
2057 #define XMR_FS_LEN_SHIFT        18
2058 #define GMR_FS_LEN_SHIFT        16
2059                 if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
2060                         if (FrameLength != (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)) {
2061                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2062                                         SK_DBGCAT_DRV_RX_PROGRESS,
2063                                         ("skge: Frame length mismatch (%u/%u).\n",
2064                                         FrameLength,
2065                                         (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
2066                                 goto rx_failed;
2067                         }
2068                 }
2069                 else {
2070                         if (FrameLength != (SK_U32) (FrameStat >> GMR_FS_LEN_SHIFT)) {
2071                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2072                                         SK_DBGCAT_DRV_RX_PROGRESS,
2073                                         ("skge: Frame length mismatch (%u/%u).\n",
2074                                         FrameLength,
2075                                         (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
2076                                 goto rx_failed;
2077                         }
2078                 }
2079
2080                 /* Set Rx Status */
2081                 if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
2082                         IsBc = (FrameStat & XMR_FS_BC) != 0;
2083                         IsMc = (FrameStat & XMR_FS_MC) != 0;
2084                         IsBadFrame = (FrameStat &
2085                                 (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0;
2086                 } else {
2087                         IsBc = (FrameStat & GMR_FS_BC) != 0;
2088                         IsMc = (FrameStat & GMR_FS_MC) != 0;
2089                         IsBadFrame = (((FrameStat & GMR_FS_ANY_ERR) != 0) ||
2090                                                         ((FrameStat & GMR_FS_RX_OK) == 0));
2091                 }
2092
2093                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
2094                         ("Received frame of length %d on port %d\n",
2095                         FrameLength, PortIndex));
2096                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
2097                         ("Number of free rx descriptors: %d\n",
2098                         pRxPort->RxdRingFree));
2099 /* DumpMsg(pMsg, "Rx"); */
2100
2101                 if ((Control & BMU_STAT_VAL) != BMU_STAT_VAL || (IsBadFrame)) {
2102 #if 0
2103                         (FrameStat & (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0) {
2104 #endif
2105                         /* there is a receive error in this frame */
2106                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2107                                 SK_DBGCAT_DRV_RX_PROGRESS,
2108                                 ("skge: Error in received frame, dropped!\n"
2109                                 "Control: %x\nRxStat: %x\n",
2110                                 Control, FrameStat));
2111
2112                         ReQueueRxBuffer(pAC, pRxPort, pMsg,
2113                                 pRxd->VDataHigh, pRxd->VDataLow);
2114
2115                         continue;
2116                 }
2117
2118                 /*
2119                  * if short frame then copy data to reduce memory waste
2120                  */
2121                 if ((FrameLength < SK_COPY_THRESHOLD) &&
2122                         ((pNewMsg = alloc_skb(FrameLength+2, GFP_ATOMIC)) != NULL)) {
2123                         /*
2124                          * Short frame detected and allocation successfull
2125                          */
2126                         /* use new skb and copy data */
2127                         skb_reserve(pNewMsg, 2);
2128                         skb_put(pNewMsg, FrameLength);
2129                         PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2130                         PhysAddr |= (SK_U64) pRxd->VDataLow;
2131
2132                         pci_dma_sync_single_for_cpu(pAC->PciDev,
2133                                                     (dma_addr_t) PhysAddr,
2134                                                     FrameLength,
2135                                                     PCI_DMA_FROMDEVICE);
2136                         memcpy(pNewMsg->data, pMsg, FrameLength);
2137
2138                         pci_dma_sync_single_for_device(pAC->PciDev,
2139                                                        (dma_addr_t) PhysAddr,
2140                                                        FrameLength,
2141                                                        PCI_DMA_FROMDEVICE);
2142                         ReQueueRxBuffer(pAC, pRxPort, pMsg,
2143                                 pRxd->VDataHigh, pRxd->VDataLow);
2144
2145                         pMsg = pNewMsg;
2146
2147                 }
2148                 else {
2149                         /*
2150                          * if large frame, or SKB allocation failed, pass
2151                          * the SKB directly to the networking
2152                          */
2153
2154                         PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2155                         PhysAddr |= (SK_U64) pRxd->VDataLow;
2156
2157                         /* release the DMA mapping */
2158                         pci_unmap_single(pAC->PciDev,
2159                                          PhysAddr,
2160                                          pAC->RxBufSize - 2,
2161                                          PCI_DMA_FROMDEVICE);
2162
2163                         /* set length in message */
2164                         skb_put(pMsg, FrameLength);
2165                 } /* frame > SK_COPY_TRESHOLD */
2166
2167 #ifdef USE_SK_RX_CHECKSUM
2168                 pMsg->csum = pRxd->TcpSums & 0xffff;
2169                 pMsg->ip_summed = CHECKSUM_HW;
2170 #else
2171                 pMsg->ip_summed = CHECKSUM_NONE;
2172 #endif
2173
2174                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("V"));
2175                 ForRlmt = SK_RLMT_RX_PROTOCOL;
2176 #if 0
2177                 IsBc = (FrameStat & XMR_FS_BC)==XMR_FS_BC;
2178 #endif
2179                 SK_RLMT_PRE_LOOKAHEAD(pAC, PortIndex, FrameLength,
2180                         IsBc, &Offset, &NumBytes);
2181                 if (NumBytes != 0) {
2182 #if 0
2183                         IsMc = (FrameStat & XMR_FS_MC)==XMR_FS_MC;
2184 #endif
2185                         SK_RLMT_LOOKAHEAD(pAC, PortIndex,
2186                                 &pMsg->data[Offset],
2187                                 IsBc, IsMc, &ForRlmt);
2188                 }
2189                 if (ForRlmt == SK_RLMT_RX_PROTOCOL) {
2190                                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("W"));
2191                         /* send up only frames from active port */
2192                         if ((PortIndex == pAC->ActivePort) ||
2193                                 (pAC->RlmtNets == 2)) {
2194                                 /* frame for upper layer */
2195                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("U"));
2196 #ifdef xDEBUG
2197                                 DumpMsg(pMsg, "Rx");
2198 #endif
2199                                 SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,
2200                                         FrameLength, pRxPort->PortIndex);
2201
2202                                 pMsg->dev = pAC->dev[pRxPort->PortIndex];
2203                                 pMsg->protocol = eth_type_trans(pMsg,
2204                                         pAC->dev[pRxPort->PortIndex]);
2205                                 netif_rx(pMsg);
2206                                 pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
2207                         }
2208                         else {
2209                                 /* drop frame */
2210                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2211                                         SK_DBGCAT_DRV_RX_PROGRESS,
2212                                         ("D"));
2213                                 DEV_KFREE_SKB(pMsg);
2214                         }
2215                         
2216                 } /* if not for rlmt */
2217                 else {
2218                         /* packet for rlmt */
2219                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2220                                 SK_DBGCAT_DRV_RX_PROGRESS, ("R"));
2221                         pRlmtMbuf = SkDrvAllocRlmtMbuf(pAC,
2222                                 pAC->IoBase, FrameLength);
2223                         if (pRlmtMbuf != NULL) {
2224                                 pRlmtMbuf->pNext = NULL;
2225                                 pRlmtMbuf->Length = FrameLength;
2226                                 pRlmtMbuf->PortIdx = PortIndex;
2227                                 EvPara.pParaPtr = pRlmtMbuf;
2228                                 memcpy((char*)(pRlmtMbuf->pData),
2229                                            (char*)(pMsg->data),
2230                                            FrameLength);
2231
2232                                 /* SlowPathLock needed? */
2233                                 if (SlowPathLock == SK_TRUE) {
2234                                         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2235                                         SkEventQueue(pAC, SKGE_RLMT,
2236                                                 SK_RLMT_PACKET_RECEIVED,
2237                                                 EvPara);
2238                                         pAC->CheckQueue = SK_TRUE;
2239                                         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2240                                 } else {
2241                                         SkEventQueue(pAC, SKGE_RLMT,
2242                                                 SK_RLMT_PACKET_RECEIVED,
2243                                                 EvPara);
2244                                         pAC->CheckQueue = SK_TRUE;
2245                                 }
2246
2247                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2248                                         SK_DBGCAT_DRV_RX_PROGRESS,
2249                                         ("Q"));
2250                         }
2251                         if ((pAC->dev[pRxPort->PortIndex]->flags &
2252                                 (IFF_PROMISC | IFF_ALLMULTI)) != 0 ||
2253                                 (ForRlmt & SK_RLMT_RX_PROTOCOL) ==
2254                                 SK_RLMT_RX_PROTOCOL) {
2255                                 pMsg->dev = pAC->dev[pRxPort->PortIndex];
2256                                 pMsg->protocol = eth_type_trans(pMsg,
2257                                         pAC->dev[pRxPort->PortIndex]);
2258                                 netif_rx(pMsg);
2259                                 pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
2260                         }
2261                         else {
2262                                 DEV_KFREE_SKB(pMsg);
2263                         }
2264
2265                 } /* if packet for rlmt */
2266         } /* for ... scanning the RXD ring */
2267
2268         /* RXD ring is empty -> fill and restart */
2269         FillRxRing(pAC, pRxPort);
2270         /* do not start if called from Close */
2271         if (pAC->BoardLevel > SK_INIT_DATA) {
2272                 ClearAndStartRx(pAC, PortIndex);
2273         }
2274         return;
2275
2276 rx_failed:
2277         /* remove error frame */
2278         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
2279                 ("Schrottdescriptor, length: 0x%x\n", FrameLength));
2280
2281         /* release the DMA mapping */
2282
2283         PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2284         PhysAddr |= (SK_U64) pRxd->VDataLow;
2285         pci_unmap_page(pAC->PciDev,
2286                          PhysAddr,
2287                          pAC->RxBufSize - 2,
2288                          PCI_DMA_FROMDEVICE);
2289         DEV_KFREE_SKB_IRQ(pRxd->pMBuf);
2290         pRxd->pMBuf = NULL;
2291         pRxPort->RxdRingFree++;
2292         pRxPort->pRxdRingHead = pRxd->pNextRxd;
2293         goto rx_start;
2294
2295 } /* ReceiveIrq */
2296
2297
2298 /*****************************************************************************
2299  *
2300  *      ClearAndStartRx - give a start receive command to BMU, clear IRQ
2301  *
2302  * Description:
2303  *      This function sends a start command and a clear interrupt
2304  *      command for one receive queue to the BMU.
2305  *
2306  * Returns: N/A
2307  *      none
2308  */
2309 static void ClearAndStartRx(
2310 SK_AC   *pAC,           /* pointer to the adapter context */
2311 int     PortIndex)      /* index of the receive port (XMAC) */
2312 {
2313         SK_OUT8(pAC->IoBase,
2314                 RxQueueAddr[PortIndex]+Q_CSR,
2315                 CSR_START | CSR_IRQ_CL_F);
2316 } /* ClearAndStartRx */
2317
2318
2319 /*****************************************************************************
2320  *
2321  *      ClearTxIrq - give a clear transmit IRQ command to BMU
2322  *
2323  * Description:
2324  *      This function sends a clear tx IRQ command for one
2325  *      transmit queue to the BMU.
2326  *
2327  * Returns: N/A
2328  */
2329 static void ClearTxIrq(
2330 SK_AC   *pAC,           /* pointer to the adapter context */
2331 int     PortIndex,      /* index of the transmit port (XMAC) */
2332 int     Prio)           /* priority or normal queue */
2333 {
2334         SK_OUT8(pAC->IoBase, 
2335                 TxQueueAddr[PortIndex][Prio]+Q_CSR,
2336                 CSR_IRQ_CL_F);
2337 } /* ClearTxIrq */
2338
2339
2340 /*****************************************************************************
2341  *
2342  *      ClearRxRing - remove all buffers from the receive ring
2343  *
2344  * Description:
2345  *      This function removes all receive buffers from the ring.
2346  *      The receive BMU must be stopped before calling this function.
2347  *
2348  * Returns: N/A
2349  */
2350 static void ClearRxRing(
2351 SK_AC   *pAC,           /* pointer to adapter context */
2352 RX_PORT *pRxPort)       /* pointer to rx port struct */
2353 {
2354 RXD             *pRxd;  /* pointer to the current descriptor */
2355 unsigned long   Flags;
2356 SK_U64          PhysAddr;
2357
2358         if (pRxPort->RxdRingFree == pAC->RxDescrPerRing) {
2359                 return;
2360         }
2361         spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
2362         pRxd = pRxPort->pRxdRingHead;
2363         do {
2364                 if (pRxd->pMBuf != NULL) {
2365
2366                         PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2367                         PhysAddr |= (SK_U64) pRxd->VDataLow;
2368                         pci_unmap_page(pAC->PciDev,
2369                                          PhysAddr,
2370                                          pAC->RxBufSize - 2,
2371                                          PCI_DMA_FROMDEVICE);
2372                         DEV_KFREE_SKB(pRxd->pMBuf);
2373                         pRxd->pMBuf = NULL;
2374                 }
2375                 pRxd->RBControl &= BMU_OWN;
2376                 pRxd = pRxd->pNextRxd;
2377                 pRxPort->RxdRingFree++;
2378         } while (pRxd != pRxPort->pRxdRingTail);
2379         pRxPort->pRxdRingTail = pRxPort->pRxdRingHead;
2380         spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
2381 } /* ClearRxRing */
2382
2383 /*****************************************************************************
2384  *
2385  *      ClearTxRing - remove all buffers from the transmit ring
2386  *
2387  * Description:
2388  *      This function removes all transmit buffers from the ring.
2389  *      The transmit BMU must be stopped before calling this function
2390  *      and transmitting at the upper level must be disabled.
2391  *      The BMU own bit of all descriptors is cleared, the rest is
2392  *      done by calling FreeTxDescriptors.
2393  *
2394  * Returns: N/A
2395  */
2396 static void ClearTxRing(
2397 SK_AC   *pAC,           /* pointer to adapter context */
2398 TX_PORT *pTxPort)       /* pointer to tx prt struct */
2399 {
2400 TXD             *pTxd;          /* pointer to the current descriptor */
2401 int             i;
2402 unsigned long   Flags;
2403
2404         spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
2405         pTxd = pTxPort->pTxdRingHead;
2406         for (i=0; i<pAC->TxDescrPerRing; i++) {
2407                 pTxd->TBControl &= ~BMU_OWN;
2408                 pTxd = pTxd->pNextTxd;
2409         }
2410         FreeTxDescriptors(pAC, pTxPort);
2411         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
2412 } /* ClearTxRing */
2413
2414 /*****************************************************************************
2415  *
2416  *      SkGeSetMacAddr - Set the hardware MAC address
2417  *
2418  * Description:
2419  *      This function sets the MAC address used by the adapter.
2420  *
2421  * Returns:
2422  *      0, if everything is ok
2423  *      !=0, on error
2424  */
2425 static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p)
2426 {
2427
2428 DEV_NET *pNet = netdev_priv(dev);
2429 SK_AC   *pAC = pNet->pAC;
2430
2431 struct sockaddr *addr = p;
2432 unsigned long   Flags;
2433         
2434         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2435                 ("SkGeSetMacAddr starts now...\n"));
2436         if(netif_running(dev))
2437                 return -EBUSY;
2438
2439         memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2440         
2441         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2442
2443         if (pAC->RlmtNets == 2)
2444                 SkAddrOverride(pAC, pAC->IoBase, pNet->NetNr,
2445                         (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
2446         else
2447                 SkAddrOverride(pAC, pAC->IoBase, pAC->ActivePort,
2448                         (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
2449
2450         
2451         
2452         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2453         return 0;
2454 } /* SkGeSetMacAddr */
2455
2456
2457 /*****************************************************************************
2458  *
2459  *      SkGeSetRxMode - set receive mode
2460  *
2461  * Description:
2462  *      This function sets the receive mode of an adapter. The adapter
2463  *      supports promiscuous mode, allmulticast mode and a number of
2464  *      multicast addresses. If more multicast addresses the available
2465  *      are selected, a hash function in the hardware is used.
2466  *
2467  * Returns:
2468  *      0, if everything is ok
2469  *      !=0, on error
2470  */
2471 static void SkGeSetRxMode(struct SK_NET_DEVICE *dev)
2472 {
2473
2474 DEV_NET         *pNet;
2475 SK_AC           *pAC;
2476
2477 struct dev_mc_list      *pMcList;
2478 int                     i;
2479 int                     PortIdx;
2480 unsigned long           Flags;
2481
2482         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2483                 ("SkGeSetRxMode starts now... "));
2484
2485         pNet = netdev_priv(dev);
2486         pAC = pNet->pAC;
2487         if (pAC->RlmtNets == 1)
2488                 PortIdx = pAC->ActivePort;
2489         else
2490                 PortIdx = pNet->NetNr;
2491
2492         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2493         if (dev->flags & IFF_PROMISC) {
2494                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2495                         ("PROMISCUOUS mode\n"));
2496                 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
2497                         SK_PROM_MODE_LLC);
2498         } else if (dev->flags & IFF_ALLMULTI) {
2499                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2500                         ("ALLMULTI mode\n"));
2501                 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
2502                         SK_PROM_MODE_ALL_MC);
2503         } else {
2504                 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
2505                         SK_PROM_MODE_NONE);
2506                 SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
2507
2508                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2509                         ("Number of MC entries: %d ", dev->mc_count));
2510                 
2511                 pMcList = dev->mc_list;
2512                 for (i=0; i<dev->mc_count; i++, pMcList = pMcList->next) {
2513                         SkAddrMcAdd(pAC, pAC->IoBase, PortIdx,
2514                                 (SK_MAC_ADDR*)pMcList->dmi_addr, 0);
2515                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MCA,
2516                                 ("%02x:%02x:%02x:%02x:%02x:%02x\n",
2517                                 pMcList->dmi_addr[0],
2518                                 pMcList->dmi_addr[1],
2519                                 pMcList->dmi_addr[2],
2520                                 pMcList->dmi_addr[3],
2521                                 pMcList->dmi_addr[4],
2522                                 pMcList->dmi_addr[5]));
2523                 }
2524                 SkAddrMcUpdate(pAC, pAC->IoBase, PortIdx);
2525         }
2526         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2527         
2528         return;
2529 } /* SkGeSetRxMode */
2530
2531
2532 /*****************************************************************************
2533  *
2534  *      SkGeChangeMtu - set the MTU to another value
2535  *
2536  * Description:
2537  *      This function sets is called whenever the MTU size is changed
2538  *      (ifconfig mtu xxx dev ethX). If the MTU is bigger than standard
2539  *      ethernet MTU size, long frame support is activated.
2540  *
2541  * Returns:
2542  *      0, if everything is ok
2543  *      !=0, on error
2544  */
2545 static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int NewMtu)
2546 {
2547 DEV_NET         *pNet;
2548 struct net_device *pOtherDev;
2549 SK_AC           *pAC;
2550 unsigned long   Flags;
2551 int             i;
2552 SK_EVPARA       EvPara;
2553
2554         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2555                 ("SkGeChangeMtu starts now...\n"));
2556
2557         pNet = netdev_priv(dev);
2558         pAC  = pNet->pAC;
2559
2560         if ((NewMtu < 68) || (NewMtu > SK_JUMBO_MTU)) {
2561                 return -EINVAL;
2562         }
2563
2564         if(pAC->BoardLevel != SK_INIT_RUN) {
2565                 return -EINVAL;
2566         }
2567
2568 #ifdef SK_DIAG_SUPPORT
2569         if (pAC->DiagModeActive == DIAG_ACTIVE) {
2570                 if (pAC->DiagFlowCtrl == SK_FALSE) {
2571                         return -1; /* still in use, deny any actions of MTU */
2572                 } else {
2573                         pAC->DiagFlowCtrl = SK_FALSE;
2574                 }
2575         }
2576 #endif
2577
2578         pOtherDev = pAC->dev[1 - pNet->NetNr];
2579
2580         if ( netif_running(pOtherDev) && (pOtherDev->mtu > 1500)
2581              && (NewMtu <= 1500))
2582                 return 0;
2583
2584         pAC->RxBufSize = NewMtu + 32;
2585         dev->mtu = NewMtu;
2586
2587         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2588                 ("New MTU: %d\n", NewMtu));
2589
2590         /* 
2591         ** Prevent any reconfiguration while changing the MTU 
2592         ** by disabling any interrupts 
2593         */
2594         SK_OUT32(pAC->IoBase, B0_IMSK, 0);
2595         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2596
2597         /* 
2598         ** Notify RLMT that any ports are to be stopped
2599         */
2600         EvPara.Para32[0] =  0;
2601         EvPara.Para32[1] = -1;
2602         if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
2603                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
2604                 EvPara.Para32[0] =  1;
2605                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
2606         } else {
2607                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
2608         }
2609
2610         /*
2611         ** After calling the SkEventDispatcher(), RLMT is aware about
2612         ** the stopped ports -> configuration can take place!
2613         */
2614         SkEventDispatcher(pAC, pAC->IoBase);
2615
2616         for (i=0; i<pAC->GIni.GIMacsFound; i++) {
2617                 spin_lock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
2618                 netif_stop_queue(pAC->dev[i]);
2619
2620         }
2621
2622         /*
2623         ** Depending on the desired MTU size change, a different number of 
2624         ** RX buffers need to be allocated
2625         */
2626         if (NewMtu > 1500) {
2627             /* 
2628             ** Use less rx buffers 
2629             */
2630             for (i=0; i<pAC->GIni.GIMacsFound; i++) {
2631                 if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
2632                     pAC->RxPort[i].RxFillLimit =  pAC->RxDescrPerRing -
2633                                                  (pAC->RxDescrPerRing / 4);
2634                 } else {
2635                     if (i == pAC->ActivePort) {
2636                         pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 
2637                                                     (pAC->RxDescrPerRing / 4);
2638                     } else {
2639                         pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 
2640                                                     (pAC->RxDescrPerRing / 10);
2641                     }
2642                 }
2643             }
2644         } else {
2645             /* 
2646             ** Use the normal amount of rx buffers 
2647             */
2648             for (i=0; i<pAC->GIni.GIMacsFound; i++) {
2649                 if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
2650                     pAC->RxPort[i].RxFillLimit = 1;
2651                 } else {
2652                     if (i == pAC->ActivePort) {
2653                         pAC->RxPort[i].RxFillLimit = 1;
2654                     } else {
2655                         pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
2656                                                     (pAC->RxDescrPerRing / 4);
2657                     }
2658                 }
2659             }
2660         }
2661         
2662         SkGeDeInit(pAC, pAC->IoBase);
2663
2664         /*
2665         ** enable/disable hardware support for long frames
2666         */
2667         if (NewMtu > 1500) {
2668 // pAC->JumboActivated = SK_TRUE; /* is never set back !!! */
2669                 pAC->GIni.GIPortUsage = SK_JUMBO_LINK;
2670         } else {
2671             if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
2672                 pAC->GIni.GIPortUsage = SK_MUL_LINK;
2673             } else {
2674                 pAC->GIni.GIPortUsage = SK_RED_LINK;
2675             }
2676         }
2677
2678         SkGeInit(   pAC, pAC->IoBase, SK_INIT_IO);
2679         SkI2cInit(  pAC, pAC->IoBase, SK_INIT_IO);
2680         SkEventInit(pAC, pAC->IoBase, SK_INIT_IO);
2681         SkPnmiInit( pAC, pAC->IoBase, SK_INIT_IO);
2682         SkAddrInit( pAC, pAC->IoBase, SK_INIT_IO);
2683         SkRlmtInit( pAC, pAC->IoBase, SK_INIT_IO);
2684         SkTimerInit(pAC, pAC->IoBase, SK_INIT_IO);
2685         
2686         /*
2687         ** tschilling:
2688         ** Speed and others are set back to default in level 1 init!
2689         */
2690         GetConfiguration(pAC);
2691         
2692         SkGeInit(   pAC, pAC->IoBase, SK_INIT_RUN);
2693         SkI2cInit(  pAC, pAC->IoBase, SK_INIT_RUN);
2694         SkEventInit(pAC, pAC->IoBase, SK_INIT_RUN);
2695         SkPnmiInit( pAC, pAC->IoBase, SK_INIT_RUN);
2696         SkAddrInit( pAC, pAC->IoBase, SK_INIT_RUN);
2697         SkRlmtInit( pAC, pAC->IoBase, SK_INIT_RUN);
2698         SkTimerInit(pAC, pAC->IoBase, SK_INIT_RUN);
2699
2700         /*
2701         ** clear and reinit the rx rings here
2702         */
2703         for (i=0; i<pAC->GIni.GIMacsFound; i++) {
2704                 ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
2705                 ClearRxRing(pAC, &pAC->RxPort[i]);
2706                 FillRxRing(pAC, &pAC->RxPort[i]);
2707
2708                 /* 
2709                 ** Enable transmit descriptor polling
2710                 */
2711                 SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
2712                 FillRxRing(pAC, &pAC->RxPort[i]);
2713         };
2714
2715         SkGeYellowLED(pAC, pAC->IoBase, 1);
2716         SkDimEnableModerationIfNeeded(pAC);     
2717         SkDimDisplayModerationSettings(pAC);
2718
2719         netif_start_queue(pAC->dev[pNet->PortNr]);
2720         for (i=pAC->GIni.GIMacsFound-1; i>=0; i--) {
2721                 spin_unlock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
2722         }
2723
2724         /* 
2725         ** Enable Interrupts again 
2726         */
2727         SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
2728         SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
2729
2730         SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
2731         SkEventDispatcher(pAC, pAC->IoBase);
2732
2733         /* 
2734         ** Notify RLMT about the changing and restarting one (or more) ports
2735         */
2736         if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
2737                 EvPara.Para32[0] = pAC->RlmtNets;
2738                 EvPara.Para32[1] = -1;
2739                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS, EvPara);
2740                 EvPara.Para32[0] = pNet->PortNr;
2741                 EvPara.Para32[1] = -1;
2742                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
2743                         
2744                 if (netif_running(pOtherDev)) {
2745                         DEV_NET *pOtherNet = netdev_priv(pOtherDev);
2746                         EvPara.Para32[0] = pOtherNet->PortNr;
2747                         SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
2748                 }
2749         } else {
2750                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
2751         }
2752
2753         SkEventDispatcher(pAC, pAC->IoBase);
2754         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2755         
2756         /*
2757         ** While testing this driver with latest kernel 2.5 (2.5.70), it 
2758         ** seems as if upper layers have a problem to handle a successful
2759         ** return value of '0'. If such a zero is returned, the complete 
2760         ** system hangs for several minutes (!), which is in acceptable.
2761         **
2762         ** Currently it is not clear, what the exact reason for this problem
2763         ** is. The implemented workaround for 2.5 is to return the desired 
2764         ** new MTU size if all needed changes for the new MTU size where 
2765         ** performed. In kernels 2.2 and 2.4, a zero value is returned,
2766         ** which indicates the successful change of the mtu-size.
2767         */
2768         return NewMtu;
2769
2770 } /* SkGeChangeMtu */
2771
2772
2773 /*****************************************************************************
2774  *
2775  *      SkGeStats - return ethernet device statistics
2776  *
2777  * Description:
2778  *      This function return statistic data about the ethernet device
2779  *      to the operating system.
2780  *
2781  * Returns:
2782  *      pointer to the statistic structure.
2783  */
2784 static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev)
2785 {
2786 DEV_NET *pNet = netdev_priv(dev);
2787 SK_AC   *pAC = pNet->pAC;
2788 SK_PNMI_STRUCT_DATA *pPnmiStruct;       /* structure for all Pnmi-Data */
2789 SK_PNMI_STAT    *pPnmiStat;             /* pointer to virtual XMAC stat. data */
2790 SK_PNMI_CONF    *pPnmiConf;             /* pointer to virtual link config. */
2791 unsigned int    Size;                   /* size of pnmi struct */
2792 unsigned long   Flags;                  /* for spin lock */
2793
2794         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2795                 ("SkGeStats starts now...\n"));
2796         pPnmiStruct = &pAC->PnmiStruct;
2797
2798 #ifdef SK_DIAG_SUPPORT
2799         if ((pAC->DiagModeActive == DIAG_NOTACTIVE) &&
2800                 (pAC->BoardLevel == SK_INIT_RUN)) {
2801 #endif
2802         SK_MEMSET(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
2803         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2804         Size = SK_PNMI_STRUCT_SIZE;
2805                 SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, pNet->NetNr);
2806         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2807 #ifdef SK_DIAG_SUPPORT
2808         }
2809 #endif
2810
2811         pPnmiStat = &pPnmiStruct->Stat[0];
2812         pPnmiConf = &pPnmiStruct->Conf[0];
2813
2814         pAC->stats.rx_packets = (SK_U32) pPnmiStruct->RxDeliveredCts & 0xFFFFFFFF;
2815         pAC->stats.tx_packets = (SK_U32) pPnmiStat->StatTxOkCts & 0xFFFFFFFF;
2816         pAC->stats.rx_bytes = (SK_U32) pPnmiStruct->RxOctetsDeliveredCts;
2817         pAC->stats.tx_bytes = (SK_U32) pPnmiStat->StatTxOctetsOkCts;
2818         
2819         if (dev->mtu <= 1500) {
2820                 pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
2821         } else {
2822                 pAC->stats.rx_errors = (SK_U32) ((pPnmiStruct->InErrorsCts -
2823                         pPnmiStat->StatRxTooLongCts) & 0xFFFFFFFF);
2824         }
2825
2826
2827         if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC && pAC->HWRevision < 12)
2828                 pAC->stats.rx_errors = pAC->stats.rx_errors - pPnmiStat->StatRxShortsCts;
2829
2830         pAC->stats.tx_errors = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
2831         pAC->stats.rx_dropped = (SK_U32) pPnmiStruct->RxNoBufCts & 0xFFFFFFFF;
2832         pAC->stats.tx_dropped = (SK_U32) pPnmiStruct->TxNoBufCts & 0xFFFFFFFF;
2833         pAC->stats.multicast = (SK_U32) pPnmiStat->StatRxMulticastOkCts & 0xFFFFFFFF;
2834         pAC->stats.collisions = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
2835
2836         /* detailed rx_errors: */
2837         pAC->stats.rx_length_errors = (SK_U32) pPnmiStat->StatRxRuntCts & 0xFFFFFFFF;
2838         pAC->stats.rx_over_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
2839         pAC->stats.rx_crc_errors = (SK_U32) pPnmiStat->StatRxFcsCts & 0xFFFFFFFF;
2840         pAC->stats.rx_frame_errors = (SK_U32) pPnmiStat->StatRxFramingCts & 0xFFFFFFFF;
2841         pAC->stats.rx_fifo_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
2842         pAC->stats.rx_missed_errors = (SK_U32) pPnmiStat->StatRxMissedCts & 0xFFFFFFFF;
2843
2844         /* detailed tx_errors */
2845         pAC->stats.tx_aborted_errors = (SK_U32) 0;
2846         pAC->stats.tx_carrier_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
2847         pAC->stats.tx_fifo_errors = (SK_U32) pPnmiStat->StatTxFifoUnderrunCts & 0xFFFFFFFF;
2848         pAC->stats.tx_heartbeat_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
2849         pAC->stats.tx_window_errors = (SK_U32) 0;
2850
2851         return(&pAC->stats);
2852 } /* SkGeStats */
2853
2854
2855 /*****************************************************************************
2856  *
2857  *      SkGeIoctl - IO-control function
2858  *
2859  * Description:
2860  *      This function is called if an ioctl is issued on the device.
2861  *      There are three subfunction for reading, writing and test-writing
2862  *      the private MIB data structure (usefull for SysKonnect-internal tools).
2863  *
2864  * Returns:
2865  *      0, if everything is ok
2866  *      !=0, on error
2867  */
2868 static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd)
2869 {
2870 DEV_NET         *pNet;
2871 SK_AC           *pAC;
2872 void            *pMemBuf;
2873 struct pci_dev  *pdev = NULL;
2874 SK_GE_IOCTL     Ioctl;
2875 unsigned int    Err = 0;
2876 int             Size = 0;
2877 int             Ret = 0;
2878 unsigned int    Length = 0;
2879 int             HeaderLength = sizeof(SK_U32) + sizeof(SK_U32);
2880
2881         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2882                 ("SkGeIoctl starts now...\n"));
2883
2884         pNet = netdev_priv(dev);
2885         pAC = pNet->pAC;
2886         
2887         if(copy_from_user(&Ioctl, rq->ifr_data, sizeof(SK_GE_IOCTL))) {
2888                 return -EFAULT;
2889         }
2890
2891         switch(cmd) {
2892         case SK_IOCTL_SETMIB:
2893         case SK_IOCTL_PRESETMIB:
2894                 if (!capable(CAP_NET_ADMIN)) return -EPERM;
2895         case SK_IOCTL_GETMIB:
2896                 if(copy_from_user(&pAC->PnmiStruct, Ioctl.pData,
2897                         Ioctl.Len<sizeof(pAC->PnmiStruct)?
2898                         Ioctl.Len : sizeof(pAC->PnmiStruct))) {
2899                         return -EFAULT;
2900                 }
2901                 Size = SkGeIocMib(pNet, Ioctl.Len, cmd);
2902                 if(copy_to_user(Ioctl.pData, &pAC->PnmiStruct,
2903                         Ioctl.Len<Size? Ioctl.Len : Size)) {
2904                         return -EFAULT;
2905                 }
2906                 Ioctl.Len = Size;
2907                 if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
2908                         return -EFAULT;
2909                 }
2910                 break;
2911         case SK_IOCTL_GEN:
2912                 if (Ioctl.Len < (sizeof(pAC->PnmiStruct) + HeaderLength)) {
2913                         Length = Ioctl.Len;
2914                 } else {
2915                         Length = sizeof(pAC->PnmiStruct) + HeaderLength;
2916                 }
2917                 if (NULL == (pMemBuf = kmalloc(Length, GFP_KERNEL))) {
2918                         return -ENOMEM;
2919                 }
2920                 if(copy_from_user(pMemBuf, Ioctl.pData, Length)) {
2921                         Err = -EFAULT;
2922                         goto fault_gen;
2923                 }
2924                 if ((Ret = SkPnmiGenIoctl(pAC, pAC->IoBase, pMemBuf, &Length, 0)) < 0) {
2925                         Err = -EFAULT;
2926                         goto fault_gen;
2927                 }
2928                 if(copy_to_user(Ioctl.pData, pMemBuf, Length) ) {
2929                         Err = -EFAULT;
2930                         goto fault_gen;
2931                 }
2932                 Ioctl.Len = Length;
2933                 if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
2934                         Err = -EFAULT;
2935                         goto fault_gen;
2936                 }
2937 fault_gen:
2938                 kfree(pMemBuf); /* cleanup everything */
2939                 break;
2940 #ifdef SK_DIAG_SUPPORT
2941        case SK_IOCTL_DIAG:
2942                 if (!capable(CAP_NET_ADMIN)) return -EPERM;
2943                 if (Ioctl.Len < (sizeof(pAC->PnmiStruct) + HeaderLength)) {
2944                         Length = Ioctl.Len;
2945                 } else {
2946                         Length = sizeof(pAC->PnmiStruct) + HeaderLength;
2947                 }
2948                 if (NULL == (pMemBuf = kmalloc(Length, GFP_KERNEL))) {
2949                         return -ENOMEM;
2950                 }
2951                 if(copy_from_user(pMemBuf, Ioctl.pData, Length)) {
2952                         Err = -EFAULT;
2953                         goto fault_diag;
2954                 }
2955                 pdev = pAC->PciDev;
2956                 Length = 3 * sizeof(SK_U32);  /* Error, Bus and Device */
2957                 /* 
2958                 ** While coding this new IOCTL interface, only a few lines of code
2959                 ** are to to be added. Therefore no dedicated function has been 
2960                 ** added. If more functionality is added, a separate function 
2961                 ** should be used...
2962                 */
2963                 * ((SK_U32 *)pMemBuf) = 0;
2964                 * ((SK_U32 *)pMemBuf + 1) = pdev->bus->number;
2965                 * ((SK_U32 *)pMemBuf + 2) = ParseDeviceNbrFromSlotName(pci_name(pdev));
2966                 if(copy_to_user(Ioctl.pData, pMemBuf, Length) ) {
2967                         Err = -EFAULT;
2968                         goto fault_diag;
2969                 }
2970                 Ioctl.Len = Length;
2971                 if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
2972                         Err = -EFAULT;
2973                         goto fault_diag;
2974                 }
2975 fault_diag:
2976                 kfree(pMemBuf); /* cleanup everything */
2977                 break;
2978 #endif
2979         default:
2980                 Err = -EOPNOTSUPP;
2981         }
2982
2983         return(Err);
2984
2985 } /* SkGeIoctl */
2986
2987
2988 /*****************************************************************************
2989  *
2990  *      SkGeIocMib - handle a GetMib, SetMib- or PresetMib-ioctl message
2991  *
2992  * Description:
2993  *      This function reads/writes the MIB data using PNMI (Private Network
2994  *      Management Interface).
2995  *      The destination for the data must be provided with the
2996  *      ioctl call and is given to the driver in the form of
2997  *      a user space address.
2998  *      Copying from the user-provided data area into kernel messages
2999  *      and back is done by copy_from_user and copy_to_user calls in
3000  *      SkGeIoctl.
3001  *
3002  * Returns:
3003  *      returned size from PNMI call
3004  */
3005 static int SkGeIocMib(
3006 DEV_NET         *pNet,  /* pointer to the adapter context */
3007 unsigned int    Size,   /* length of ioctl data */
3008 int             mode)   /* flag for set/preset */
3009 {
3010 unsigned long   Flags;  /* for spin lock */
3011 SK_AC           *pAC;
3012
3013         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3014                 ("SkGeIocMib starts now...\n"));
3015         pAC = pNet->pAC;
3016         /* access MIB */
3017         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3018         switch(mode) {
3019         case SK_IOCTL_GETMIB:
3020                 SkPnmiGetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3021                         pNet->NetNr);
3022                 break;
3023         case SK_IOCTL_PRESETMIB:
3024                 SkPnmiPreSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3025                         pNet->NetNr);
3026                 break;
3027         case SK_IOCTL_SETMIB:
3028                 SkPnmiSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3029                         pNet->NetNr);
3030                 break;
3031         default:
3032                 break;
3033         }
3034         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
3035         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3036                 ("MIB data access succeeded\n"));
3037         return (Size);
3038 } /* SkGeIocMib */
3039
3040
3041 /*****************************************************************************
3042  *
3043  *      GetConfiguration - read configuration information
3044  *
3045  * Description:
3046  *      This function reads per-adapter configuration information from
3047  *      the options provided on the command line.
3048  *
3049  * Returns:
3050  *      none
3051  */
3052 static void GetConfiguration(
3053 SK_AC   *pAC)   /* pointer to the adapter context structure */
3054 {
3055 SK_I32  Port;           /* preferred port */
3056 SK_BOOL AutoSet;
3057 SK_BOOL DupSet;
3058 int     LinkSpeed          = SK_LSPEED_AUTO;    /* Link speed */
3059 int     AutoNeg            = 1;                 /* autoneg off (0) or on (1) */
3060 int     DuplexCap          = 0;                 /* 0=both,1=full,2=half */
3061 int     FlowCtrl           = SK_FLOW_MODE_SYM_OR_REM;   /* FlowControl  */
3062 int     MSMode             = SK_MS_MODE_AUTO;   /* master/slave mode    */
3063
3064 SK_BOOL IsConTypeDefined   = SK_TRUE;
3065 SK_BOOL IsLinkSpeedDefined = SK_TRUE;
3066 SK_BOOL IsFlowCtrlDefined  = SK_TRUE;
3067 SK_BOOL IsRoleDefined      = SK_TRUE;
3068 SK_BOOL IsModeDefined      = SK_TRUE;
3069 /*
3070  *      The two parameters AutoNeg. and DuplexCap. map to one configuration
3071  *      parameter. The mapping is described by this table:
3072  *      DuplexCap ->    |       both    |       full    |       half    |
3073  *      AutoNeg         |               |               |               |
3074  *      -----------------------------------------------------------------
3075  *      Off             |    illegal    |       Full    |       Half    |
3076  *      -----------------------------------------------------------------
3077  *      On              |   AutoBoth    |   AutoFull    |   AutoHalf    |
3078  *      -----------------------------------------------------------------
3079  *      Sense           |   AutoSense   |   AutoSense   |   AutoSense   |
3080  */
3081 int     Capabilities[3][3] =
3082                 { {                -1, SK_LMODE_FULL     , SK_LMODE_HALF     },
3083                   {SK_LMODE_AUTOBOTH , SK_LMODE_AUTOFULL , SK_LMODE_AUTOHALF },
3084                   {SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE} };
3085
3086 #define DC_BOTH 0
3087 #define DC_FULL 1
3088 #define DC_HALF 2
3089 #define AN_OFF  0
3090 #define AN_ON   1
3091 #define AN_SENS 2
3092 #define M_CurrPort pAC->GIni.GP[Port]
3093
3094
3095         /*
3096         ** Set the default values first for both ports!
3097         */
3098         for (Port = 0; Port < SK_MAX_MACS; Port++) {
3099                 M_CurrPort.PLinkModeConf = Capabilities[AN_ON][DC_BOTH];
3100                 M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
3101                 M_CurrPort.PMSMode       = SK_MS_MODE_AUTO;
3102                 M_CurrPort.PLinkSpeed    = SK_LSPEED_AUTO;
3103         }
3104
3105         /*
3106         ** Check merged parameter ConType. If it has not been used,
3107         ** verify any other parameter (e.g. AutoNeg) and use default values. 
3108         **
3109         ** Stating both ConType and other lowlevel link parameters is also
3110         ** possible. If this is the case, the passed ConType-parameter is 
3111         ** overwritten by the lowlevel link parameter.
3112         **
3113         ** The following settings are used for a merged ConType-parameter:
3114         **
3115         ** ConType   DupCap   AutoNeg   FlowCtrl      Role      Speed
3116         ** -------   ------   -------   --------   ----------   -----
3117         **  Auto      Both      On      SymOrRem      Auto       Auto
3118         **  100FD     Full      Off       None      <ignored>    100
3119         **  100HD     Half      Off       None      <ignored>    100
3120         **  10FD      Full      Off       None      <ignored>    10
3121         **  10HD      Half      Off       None      <ignored>    10
3122         ** 
3123         ** This ConType parameter is used for all ports of the adapter!
3124         */
3125         if ( (ConType != NULL)                && 
3126              (pAC->Index < SK_MAX_CARD_PARAM) &&
3127              (ConType[pAC->Index] != NULL) ) {
3128
3129                         /* Check chipset family */
3130                         if ((!pAC->ChipsetType) && 
3131                                 (strcmp(ConType[pAC->Index],"Auto")!=0) &&
3132                                 (strcmp(ConType[pAC->Index],"")!=0)) {
3133                                 /* Set the speed parameter back */
3134                                         printk("sk98lin: Illegal value \"%s\" " 
3135                                                         "for ConType."
3136                                                         " Using Auto.\n", 
3137                                                         ConType[pAC->Index]);
3138
3139                                         sprintf(ConType[pAC->Index], "Auto");   
3140                         }
3141
3142                                 if (strcmp(ConType[pAC->Index],"")==0) {
3143                         IsConTypeDefined = SK_FALSE; /* No ConType defined */
3144                                 } else if (strcmp(ConType[pAC->Index],"Auto")==0) {
3145                     for (Port = 0; Port < SK_MAX_MACS; Port++) {
3146                         M_CurrPort.PLinkModeConf = Capabilities[AN_ON][DC_BOTH];
3147                         M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
3148                         M_CurrPort.PMSMode       = SK_MS_MODE_AUTO;
3149                         M_CurrPort.PLinkSpeed    = SK_LSPEED_AUTO;
3150                     }
3151                 } else if (strcmp(ConType[pAC->Index],"100FD")==0) {
3152                     for (Port = 0; Port < SK_MAX_MACS; Port++) {
3153                         M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_FULL];
3154                         M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
3155                         M_CurrPort.PMSMode       = SK_MS_MODE_AUTO;
3156                         M_CurrPort.PLinkSpeed    = SK_LSPEED_100MBPS;
3157                     }
3158                 } else if (strcmp(ConType[pAC->Index],"100HD")==0) {
3159                     for (Port = 0; Port < SK_MAX_MACS; Port++) {
3160                         M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_HALF];
3161                         M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
3162                         M_CurrPort.PMSMode       = SK_MS_MODE_AUTO;
3163                         M_CurrPort.PLinkSpeed    = SK_LSPEED_100MBPS;
3164                     }
3165                 } else if (strcmp(ConType[pAC->Index],"10FD")==0) {
3166                     for (Port = 0; Port < SK_MAX_MACS; Port++) {
3167                         M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_FULL];
3168                         M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
3169                         M_CurrPort.PMSMode       = SK_MS_MODE_AUTO;
3170                         M_CurrPort.PLinkSpeed    = SK_LSPEED_10MBPS;
3171                     }
3172                 } else if (strcmp(ConType[pAC->Index],"10HD")==0) {
3173                     for (Port = 0; Port < SK_MAX_MACS; Port++) {
3174                         M_CurrPort.PLinkModeConf = Capabilities[AN_OFF][DC_HALF];
3175                         M_CurrPort.PFlowCtrlMode = SK_FLOW_MODE_NONE;
3176                         M_CurrPort.PMSMode       = SK_MS_MODE_AUTO;
3177                         M_CurrPort.PLinkSpeed    = SK_LSPEED_10MBPS;
3178                     }
3179                 } else { 
3180          &