]> nv-tegra.nvidia Code Review - linux-2.6.git/blob - drivers/net/sk98lin/skge.c
[PATCH] sk98lin: basic suspend/resume support fixes
[linux-2.6.git] / drivers / net / sk98lin / skge.c
1 /******************************************************************************
2  *
3  * Name:        skge.c
4  * Project:     GEnesis, PCI Gigabit Ethernet Adapter
5  * Version:     $Revision: 1.45 $
6  * Date:        $Date: 2004/02/12 14:41:02 $
7  * Purpose:     The main driver source module
8  *
9  ******************************************************************************/
10
11 /******************************************************************************
12  *
13  *      (C)Copyright 1998-2002 SysKonnect GmbH.
14  *      (C)Copyright 2002-2003 Marvell.
15  *
16  *      Driver for Marvell Yukon chipset and SysKonnect Gigabit Ethernet 
17  *      Server Adapters.
18  *
19  *      Created 10-Feb-1999, based on Linux' acenic.c, 3c59x.c and
20  *      SysKonnects GEnesis Solaris driver
21  *      Author: Christoph Goos (cgoos@syskonnect.de)
22  *              Mirko Lindner (mlindner@syskonnect.de)
23  *
24  *      Address all question to: linux@syskonnect.de
25  *
26  *      The technical manual for the adapters is available from SysKonnect's
27  *      web pages: www.syskonnect.com
28  *      Goto "Support" and search Knowledge Base for "manual".
29  *      
30  *      This program is free software; you can redistribute it and/or modify
31  *      it under the terms of the GNU General Public License as published by
32  *      the Free Software Foundation; either version 2 of the License, or
33  *      (at your option) any later version.
34  *
35  *      The information in this file is provided "AS IS" without warranty.
36  *
37  ******************************************************************************/
38
39 /******************************************************************************
40  *
41  * Possible compiler options (#define xxx / -Dxxx):
42  *
43  *      debugging can be enable by changing SK_DEBUG_CHKMOD and
44  *      SK_DEBUG_CHKCAT in makefile (described there).
45  *
46  ******************************************************************************/
47
48 /******************************************************************************
49  *
50  * Description:
51  *
52  *      This is the main module of the Linux GE driver.
53  *      
54  *      All source files except skge.c, skdrv1st.h, skdrv2nd.h and sktypes.h
55  *      are part of SysKonnect's COMMON MODULES for the SK-98xx adapters.
56  *      Those are used for drivers on multiple OS', so some thing may seem
57  *      unnecessary complicated on Linux. Please do not try to 'clean up'
58  *      them without VERY good reasons, because this will make it more
59  *      difficult to keep the Linux driver in synchronisation with the
60  *      other versions.
61  *
62  * Include file hierarchy:
63  *
64  *      <linux/module.h>
65  *
66  *      "h/skdrv1st.h"
67  *              <linux/types.h>
68  *              <linux/kernel.h>
69  *              <linux/string.h>
70  *              <linux/errno.h>
71  *              <linux/ioport.h>
72  *              <linux/slab.h>
73  *              <linux/interrupt.h>
74  *              <linux/pci.h>
75  *              <linux/bitops.h>
76  *              <asm/byteorder.h>
77  *              <asm/io.h>
78  *              <linux/netdevice.h>
79  *              <linux/etherdevice.h>
80  *              <linux/skbuff.h>
81  *          those three depending on kernel version used:
82  *              <linux/bios32.h>
83  *              <linux/init.h>
84  *              <asm/uaccess.h>
85  *              <net/checksum.h>
86  *
87  *              "h/skerror.h"
88  *              "h/skdebug.h"
89  *              "h/sktypes.h"
90  *              "h/lm80.h"
91  *              "h/xmac_ii.h"
92  *
93  *      "h/skdrv2nd.h"
94  *              "h/skqueue.h"
95  *              "h/skgehwt.h"
96  *              "h/sktimer.h"
97  *              "h/ski2c.h"
98  *              "h/skgepnmi.h"
99  *              "h/skvpd.h"
100  *              "h/skgehw.h"
101  *              "h/skgeinit.h"
102  *              "h/skaddr.h"
103  *              "h/skgesirq.h"
104  *              "h/skcsum.h"
105  *              "h/skrlmt.h"
106  *
107  ******************************************************************************/
108
109 #include        "h/skversion.h"
110
111 #include        <linux/module.h>
112 #include        <linux/moduleparam.h>
113 #include        <linux/init.h>
114 #include        <linux/proc_fs.h>
115 #include        <linux/dma-mapping.h>
116
117 #include        "h/skdrv1st.h"
118 #include        "h/skdrv2nd.h"
119
120 /*******************************************************************************
121  *
122  * Defines
123  *
124  ******************************************************************************/
125
126 /* for debuging on x86 only */
127 /* #define BREAKPOINT() asm(" int $3"); */
128
129 /* use the transmit hw checksum driver functionality */
130 #define USE_SK_TX_CHECKSUM
131
132 /* use the receive hw checksum driver functionality */
133 #define USE_SK_RX_CHECKSUM
134
135 /* use the scatter-gather functionality with sendfile() */
136 #define SK_ZEROCOPY
137
138 /* use of a transmit complete interrupt */
139 #define USE_TX_COMPLETE
140
141 /*
142  * threshold for copying small receive frames
143  * set to 0 to avoid copying, set to 9001 to copy all frames
144  */
145 #define SK_COPY_THRESHOLD       50
146
147 /* number of adapters that can be configured via command line params */
148 #define SK_MAX_CARD_PARAM       16
149
150
151
152 /*
153  * use those defines for a compile-in version of the driver instead
154  * of command line parameters
155  */
156 // #define LINK_SPEED_A {"Auto", }
157 // #define LINK_SPEED_B {"Auto", }
158 // #define AUTO_NEG_A   {"Sense", }
159 // #define AUTO_NEG_B   {"Sense", }
160 // #define DUP_CAP_A    {"Both", }
161 // #define DUP_CAP_B    {"Both", }
162 // #define FLOW_CTRL_A  {"SymOrRem", }
163 // #define FLOW_CTRL_B  {"SymOrRem", }
164 // #define ROLE_A       {"Auto", }
165 // #define ROLE_B       {"Auto", }
166 // #define PREF_PORT    {"A", }
167 // #define CON_TYPE     {"Auto", }
168 // #define RLMT_MODE    {"CheckLinkState", }
169
170 #define DEV_KFREE_SKB(skb) dev_kfree_skb(skb)
171 #define DEV_KFREE_SKB_IRQ(skb) dev_kfree_skb_irq(skb)
172 #define DEV_KFREE_SKB_ANY(skb) dev_kfree_skb_any(skb)
173
174
175 /* Set blink mode*/
176 #define OEM_CONFIG_VALUE (      SK_ACT_LED_BLINK | \
177                                 SK_DUP_LED_NORMAL | \
178                                 SK_LED_LINK100_ON)
179
180
181 /* Isr return value */
182 #define SkIsrRetVar     irqreturn_t
183 #define SkIsrRetNone    IRQ_NONE
184 #define SkIsrRetHandled IRQ_HANDLED
185
186
187 /*******************************************************************************
188  *
189  * Local Function Prototypes
190  *
191  ******************************************************************************/
192
193 static void     FreeResources(struct SK_NET_DEVICE *dev);
194 static int      SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC);
195 static SK_BOOL  BoardAllocMem(SK_AC *pAC);
196 static void     BoardFreeMem(SK_AC *pAC);
197 static void     BoardInitMem(SK_AC *pAC);
198 static void     SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**, int*, SK_BOOL);
199 static SkIsrRetVar      SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
200 static SkIsrRetVar      SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
201 static int      SkGeOpen(struct SK_NET_DEVICE *dev);
202 static int      SkGeClose(struct SK_NET_DEVICE *dev);
203 static int      SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
204 static int      SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p);
205 static void     SkGeSetRxMode(struct SK_NET_DEVICE *dev);
206 static struct   net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev);
207 static int      SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd);
208 static void     GetConfiguration(SK_AC*);
209 static void     ProductStr(SK_AC*);
210 static int      XmitFrame(SK_AC*, TX_PORT*, struct sk_buff*);
211 static void     FreeTxDescriptors(SK_AC*pAC, TX_PORT*);
212 static void     FillRxRing(SK_AC*, RX_PORT*);
213 static SK_BOOL  FillRxDescriptor(SK_AC*, RX_PORT*);
214 static void     ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
215 static void     ClearAndStartRx(SK_AC*, int);
216 static void     ClearTxIrq(SK_AC*, int, int);
217 static void     ClearRxRing(SK_AC*, RX_PORT*);
218 static void     ClearTxRing(SK_AC*, TX_PORT*);
219 static int      SkGeChangeMtu(struct SK_NET_DEVICE *dev, int new_mtu);
220 static void     PortReInitBmu(SK_AC*, int);
221 static int      SkGeIocMib(DEV_NET*, unsigned int, int);
222 static int      SkGeInitPCI(SK_AC *pAC);
223 static void     StartDrvCleanupTimer(SK_AC *pAC);
224 static void     StopDrvCleanupTimer(SK_AC *pAC);
225 static int      XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
226
227 #ifdef SK_DIAG_SUPPORT
228 static SK_U32   ParseDeviceNbrFromSlotName(const char *SlotName);
229 static int      SkDrvInitAdapter(SK_AC *pAC, int devNbr);
230 static int      SkDrvDeInitAdapter(SK_AC *pAC, int devNbr);
231 #endif
232
233 /*******************************************************************************
234  *
235  * Extern Function Prototypes
236  *
237  ******************************************************************************/
238 static const char       SKRootName[] = "sk98lin";
239 static struct           proc_dir_entry *pSkRootDir;
240 extern struct   file_operations sk_proc_fops;
241
242 static inline void SkGeProcCreate(struct net_device *dev)
243 {
244         struct proc_dir_entry *pe;
245
246         if (pSkRootDir && 
247             (pe = create_proc_entry(dev->name, S_IRUGO, pSkRootDir))) {
248                 pe->proc_fops = &sk_proc_fops;
249                 pe->data = dev;
250                 pe->owner = THIS_MODULE;
251         }
252 }
253  
254 static inline void SkGeProcRemove(struct net_device *dev)
255 {
256         if (pSkRootDir)
257                 remove_proc_entry(dev->name, pSkRootDir);
258 }
259
260 extern void SkDimEnableModerationIfNeeded(SK_AC *pAC);  
261 extern void SkDimDisplayModerationSettings(SK_AC *pAC);
262 extern void SkDimStartModerationTimer(SK_AC *pAC);
263 extern void SkDimModerate(SK_AC *pAC);
264 extern void SkGeBlinkTimer(unsigned long data);
265
266 #ifdef DEBUG
267 static void     DumpMsg(struct sk_buff*, char*);
268 static void     DumpData(char*, int);
269 static void     DumpLong(char*, int);
270 #endif
271
272 /* global variables *********************************************************/
273 static SK_BOOL DoPrintInterfaceChange = SK_TRUE;
274 extern  struct ethtool_ops SkGeEthtoolOps;
275
276 /* local variables **********************************************************/
277 static uintptr_t TxQueueAddr[SK_MAX_MACS][2] = {{0x680, 0x600},{0x780, 0x700}};
278 static uintptr_t RxQueueAddr[SK_MAX_MACS] = {0x400, 0x480};
279
280 /*****************************************************************************
281  *
282  *      SkGeInitPCI - Init the PCI resources
283  *
284  * Description:
285  *      This function initialize the PCI resources and IO
286  *
287  * Returns: N/A
288  *      
289  */
290 int SkGeInitPCI(SK_AC *pAC)
291 {
292         struct SK_NET_DEVICE *dev = pAC->dev[0];
293         struct pci_dev *pdev = pAC->PciDev;
294         int retval;
295
296         if (pci_enable_device(pdev) != 0) {
297                 return 1;
298         }
299
300         dev->mem_start = pci_resource_start (pdev, 0);
301         pci_set_master(pdev);
302
303         if (pci_request_regions(pdev, pAC->Name) != 0) {
304                 retval = 2;
305                 goto out_disable;
306         }
307
308 #ifdef SK_BIG_ENDIAN
309         /*
310          * On big endian machines, we use the adapter's aibility of
311          * reading the descriptors as big endian.
312          */
313         {
314                 SK_U32          our2;
315                 SkPciReadCfgDWord(pAC, PCI_OUR_REG_2, &our2);
316                 our2 |= PCI_REV_DESC;
317                 SkPciWriteCfgDWord(pAC, PCI_OUR_REG_2, our2);
318         }
319 #endif
320
321         /*
322          * Remap the regs into kernel space.
323          */
324         pAC->IoBase = ioremap_nocache(dev->mem_start, 0x4000);
325
326         if (!pAC->IoBase){
327                 retval = 3;
328                 goto out_release;
329         }
330
331         return 0;
332
333  out_release:
334         pci_release_regions(pdev);
335  out_disable:
336         pci_disable_device(pdev);
337         return retval;
338 }
339
340
341 /*****************************************************************************
342  *
343  *      FreeResources - release resources allocated for adapter
344  *
345  * Description:
346  *      This function releases the IRQ, unmaps the IO and
347  *      frees the desriptor ring.
348  *
349  * Returns: N/A
350  *      
351  */
352 static void FreeResources(struct SK_NET_DEVICE *dev)
353 {
354 SK_U32 AllocFlag;
355 DEV_NET         *pNet;
356 SK_AC           *pAC;
357
358         pNet = netdev_priv(dev);
359         pAC = pNet->pAC;
360         AllocFlag = pAC->AllocFlag;
361         if (pAC->PciDev) {
362                 pci_release_regions(pAC->PciDev);
363         }
364         if (AllocFlag & SK_ALLOC_IRQ) {
365                 free_irq(dev->irq, dev);
366         }
367         if (pAC->IoBase) {
368                 iounmap(pAC->IoBase);
369         }
370         if (pAC->pDescrMem) {
371                 BoardFreeMem(pAC);
372         }
373         
374 } /* FreeResources */
375
376 MODULE_AUTHOR("Mirko Lindner <mlindner@syskonnect.de>");
377 MODULE_DESCRIPTION("SysKonnect SK-NET Gigabit Ethernet SK-98xx driver");
378 MODULE_LICENSE("GPL");
379
380 #ifdef LINK_SPEED_A
381 static char *Speed_A[SK_MAX_CARD_PARAM] = LINK_SPEED;
382 #else
383 static char *Speed_A[SK_MAX_CARD_PARAM] = {"", };
384 #endif
385
386 #ifdef LINK_SPEED_B
387 static char *Speed_B[SK_MAX_CARD_PARAM] = LINK_SPEED;
388 #else
389 static char *Speed_B[SK_MAX_CARD_PARAM] = {"", };
390 #endif
391
392 #ifdef AUTO_NEG_A
393 static char *AutoNeg_A[SK_MAX_CARD_PARAM] = AUTO_NEG_A;
394 #else
395 static char *AutoNeg_A[SK_MAX_CARD_PARAM] = {"", };
396 #endif
397
398 #ifdef DUP_CAP_A
399 static char *DupCap_A[SK_MAX_CARD_PARAM] = DUP_CAP_A;
400 #else
401 static char *DupCap_A[SK_MAX_CARD_PARAM] = {"", };
402 #endif
403
404 #ifdef FLOW_CTRL_A
405 static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = FLOW_CTRL_A;
406 #else
407 static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = {"", };
408 #endif
409
410 #ifdef ROLE_A
411 static char *Role_A[SK_MAX_CARD_PARAM] = ROLE_A;
412 #else
413 static char *Role_A[SK_MAX_CARD_PARAM] = {"", };
414 #endif
415
416 #ifdef AUTO_NEG_B
417 static char *AutoNeg_B[SK_MAX_CARD_PARAM] = AUTO_NEG_B;
418 #else
419 static char *AutoNeg_B[SK_MAX_CARD_PARAM] = {"", };
420 #endif
421
422 #ifdef DUP_CAP_B
423 static char *DupCap_B[SK_MAX_CARD_PARAM] = DUP_CAP_B;
424 #else
425 static char *DupCap_B[SK_MAX_CARD_PARAM] = {"", };
426 #endif
427
428 #ifdef FLOW_CTRL_B
429 static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = FLOW_CTRL_B;
430 #else
431 static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = {"", };
432 #endif
433
434 #ifdef ROLE_B
435 static char *Role_B[SK_MAX_CARD_PARAM] = ROLE_B;
436 #else
437 static char *Role_B[SK_MAX_CARD_PARAM] = {"", };
438 #endif
439
440 #ifdef CON_TYPE
441 static char *ConType[SK_MAX_CARD_PARAM] = CON_TYPE;
442 #else
443 static char *ConType[SK_MAX_CARD_PARAM] = {"", };
444 #endif
445
446 #ifdef PREF_PORT
447 static char *PrefPort[SK_MAX_CARD_PARAM] = PREF_PORT;
448 #else
449 static char *PrefPort[SK_MAX_CARD_PARAM] = {"", };
450 #endif
451
452 #ifdef RLMT_MODE
453 static char *RlmtMode[SK_MAX_CARD_PARAM] = RLMT_MODE;
454 #else
455 static char *RlmtMode[SK_MAX_CARD_PARAM] = {"", };
456 #endif
457
458 static int   IntsPerSec[SK_MAX_CARD_PARAM];
459 static char *Moderation[SK_MAX_CARD_PARAM];
460 static char *ModerationMask[SK_MAX_CARD_PARAM];
461 static char *AutoSizing[SK_MAX_CARD_PARAM];
462 static char *Stats[SK_MAX_CARD_PARAM];
463
464 module_param_array(Speed_A, charp, NULL, 0);
465 module_param_array(Speed_B, charp, NULL, 0);
466 module_param_array(AutoNeg_A, charp, NULL, 0);
467 module_param_array(AutoNeg_B, charp, NULL, 0);
468 module_param_array(DupCap_A, charp, NULL, 0);
469 module_param_array(DupCap_B, charp, NULL, 0);
470 module_param_array(FlowCtrl_A, charp, NULL, 0);
471 module_param_array(FlowCtrl_B, charp, NULL, 0);
472 module_param_array(Role_A, charp, NULL, 0);
473 module_param_array(Role_B, charp, NULL, 0);
474 module_param_array(ConType, charp, NULL, 0);
475 module_param_array(PrefPort, charp, NULL, 0);
476 module_param_array(RlmtMode, charp, NULL, 0);
477 /* used for interrupt moderation */
478 module_param_array(IntsPerSec, int, NULL, 0);
479 module_param_array(Moderation, charp, NULL, 0);
480 module_param_array(Stats, charp, NULL, 0);
481 module_param_array(ModerationMask, charp, NULL, 0);
482 module_param_array(AutoSizing, charp, NULL, 0);
483
484 /*****************************************************************************
485  *
486  *      SkGeBoardInit - do level 0 and 1 initialization
487  *
488  * Description:
489  *      This function prepares the board hardware for running. The desriptor
490  *      ring is set up, the IRQ is allocated and the configuration settings
491  *      are examined.
492  *
493  * Returns:
494  *      0, if everything is ok
495  *      !=0, on error
496  */
497 static int __init SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC)
498 {
499 short   i;
500 unsigned long Flags;
501 char    *DescrString = "sk98lin: Driver for Linux"; /* this is given to PNMI */
502 char    *VerStr = VER_STRING;
503 int     Ret;                    /* return code of request_irq */
504 SK_BOOL DualNet;
505
506         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
507                 ("IoBase: %08lX\n", (unsigned long)pAC->IoBase));
508         for (i=0; i<SK_MAX_MACS; i++) {
509                 pAC->TxPort[i][0].HwAddr = pAC->IoBase + TxQueueAddr[i][0];
510                 pAC->TxPort[i][0].PortIndex = i;
511                 pAC->RxPort[i].HwAddr = pAC->IoBase + RxQueueAddr[i];
512                 pAC->RxPort[i].PortIndex = i;
513         }
514
515         /* Initialize the mutexes */
516         for (i=0; i<SK_MAX_MACS; i++) {
517                 spin_lock_init(&pAC->TxPort[i][0].TxDesRingLock);
518                 spin_lock_init(&pAC->RxPort[i].RxDesRingLock);
519         }
520         spin_lock_init(&pAC->SlowPathLock);
521
522         /* setup phy_id blink timer */
523         pAC->BlinkTimer.function = SkGeBlinkTimer;
524         pAC->BlinkTimer.data = (unsigned long) dev;
525         init_timer(&pAC->BlinkTimer);
526
527         /* level 0 init common modules here */
528         
529         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
530         /* Does a RESET on board ...*/
531         if (SkGeInit(pAC, pAC->IoBase, SK_INIT_DATA) != 0) {
532                 printk("HWInit (0) failed.\n");
533                 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
534                 return(-EAGAIN);
535         }
536         SkI2cInit(  pAC, pAC->IoBase, SK_INIT_DATA);
537         SkEventInit(pAC, pAC->IoBase, SK_INIT_DATA);
538         SkPnmiInit( pAC, pAC->IoBase, SK_INIT_DATA);
539         SkAddrInit( pAC, pAC->IoBase, SK_INIT_DATA);
540         SkRlmtInit( pAC, pAC->IoBase, SK_INIT_DATA);
541         SkTimerInit(pAC, pAC->IoBase, SK_INIT_DATA);
542
543         pAC->BoardLevel = SK_INIT_DATA;
544         pAC->RxBufSize  = ETH_BUF_SIZE;
545
546         SK_PNMI_SET_DRIVER_DESCR(pAC, DescrString);
547         SK_PNMI_SET_DRIVER_VER(pAC, VerStr);
548
549         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
550
551         /* level 1 init common modules here (HW init) */
552         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
553         if (SkGeInit(pAC, pAC->IoBase, SK_INIT_IO) != 0) {
554                 printk("sk98lin: HWInit (1) failed.\n");
555                 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
556                 return(-EAGAIN);
557         }
558         SkI2cInit(  pAC, pAC->IoBase, SK_INIT_IO);
559         SkEventInit(pAC, pAC->IoBase, SK_INIT_IO);
560         SkPnmiInit( pAC, pAC->IoBase, SK_INIT_IO);
561         SkAddrInit( pAC, pAC->IoBase, SK_INIT_IO);
562         SkRlmtInit( pAC, pAC->IoBase, SK_INIT_IO);
563         SkTimerInit(pAC, pAC->IoBase, SK_INIT_IO);
564
565         /* Set chipset type support */
566         pAC->ChipsetType = 0;
567         if ((pAC->GIni.GIChipId == CHIP_ID_YUKON) ||
568                 (pAC->GIni.GIChipId == CHIP_ID_YUKON_LITE)) {
569                 pAC->ChipsetType = 1;
570         }
571
572         GetConfiguration(pAC);
573         if (pAC->RlmtNets == 2) {
574                 pAC->GIni.GIPortUsage = SK_MUL_LINK;
575         }
576
577         pAC->BoardLevel = SK_INIT_IO;
578         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
579
580         if (pAC->GIni.GIMacsFound == 2) {
581                  Ret = request_irq(dev->irq, SkGeIsr, SA_SHIRQ, pAC->Name, dev);
582         } else if (pAC->GIni.GIMacsFound == 1) {
583                 Ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ,
584                         pAC->Name, dev);
585         } else {
586                 printk(KERN_WARNING "sk98lin: Illegal number of ports: %d\n",
587                        pAC->GIni.GIMacsFound);
588                 return -EAGAIN;
589         }
590
591         if (Ret) {
592                 printk(KERN_WARNING "sk98lin: Requested IRQ %d is busy.\n",
593                        dev->irq);
594                 return -EAGAIN;
595         }
596         pAC->AllocFlag |= SK_ALLOC_IRQ;
597
598         /* Alloc memory for this board (Mem for RxD/TxD) : */
599         if(!BoardAllocMem(pAC)) {
600                 printk("No memory for descriptor rings.\n");
601                 return(-EAGAIN);
602         }
603
604         SkCsSetReceiveFlags(pAC,
605                 SKCS_PROTO_IP | SKCS_PROTO_TCP | SKCS_PROTO_UDP,
606                 &pAC->CsOfs1, &pAC->CsOfs2, 0);
607         pAC->CsOfs = (pAC->CsOfs2 << 16) | pAC->CsOfs1;
608
609         BoardInitMem(pAC);
610         /* tschilling: New common function with minimum size check. */
611         DualNet = SK_FALSE;
612         if (pAC->RlmtNets == 2) {
613                 DualNet = SK_TRUE;
614         }
615         
616         if (SkGeInitAssignRamToQueues(
617                 pAC,
618                 pAC->ActivePort,
619                 DualNet)) {
620                 BoardFreeMem(pAC);
621                 printk("sk98lin: SkGeInitAssignRamToQueues failed.\n");
622                 return(-EAGAIN);
623         }
624
625         return (0);
626 } /* SkGeBoardInit */
627
628
629 /*****************************************************************************
630  *
631  *      BoardAllocMem - allocate the memory for the descriptor rings
632  *
633  * Description:
634  *      This function allocates the memory for all descriptor rings.
635  *      Each ring is aligned for the desriptor alignment and no ring
636  *      has a 4 GByte boundary in it (because the upper 32 bit must
637  *      be constant for all descriptiors in one rings).
638  *
639  * Returns:
640  *      SK_TRUE, if all memory could be allocated
641  *      SK_FALSE, if not
642  */
643 static SK_BOOL BoardAllocMem(
644 SK_AC   *pAC)
645 {
646 caddr_t         pDescrMem;      /* pointer to descriptor memory area */
647 size_t          AllocLength;    /* length of complete descriptor area */
648 int             i;              /* loop counter */
649 unsigned long   BusAddr;
650
651         
652         /* rings plus one for alignment (do not cross 4 GB boundary) */
653         /* RX_RING_SIZE is assumed bigger than TX_RING_SIZE */
654 #if (BITS_PER_LONG == 32)
655         AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
656 #else
657         AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
658                 + RX_RING_SIZE + 8;
659 #endif
660
661         pDescrMem = pci_alloc_consistent(pAC->PciDev, AllocLength,
662                                          &pAC->pDescrMemDMA);
663
664         if (pDescrMem == NULL) {
665                 return (SK_FALSE);
666         }
667         pAC->pDescrMem = pDescrMem;
668         BusAddr = (unsigned long) pAC->pDescrMemDMA;
669
670         /* Descriptors need 8 byte alignment, and this is ensured
671          * by pci_alloc_consistent.
672          */
673         for (i=0; i<pAC->GIni.GIMacsFound; i++) {
674                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
675                         ("TX%d/A: pDescrMem: %lX,   PhysDescrMem: %lX\n",
676                         i, (unsigned long) pDescrMem,
677                         BusAddr));
678                 pAC->TxPort[i][0].pTxDescrRing = pDescrMem;
679                 pAC->TxPort[i][0].VTxDescrRing = BusAddr;
680                 pDescrMem += TX_RING_SIZE;
681                 BusAddr += TX_RING_SIZE;
682         
683                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
684                         ("RX%d: pDescrMem: %lX,   PhysDescrMem: %lX\n",
685                         i, (unsigned long) pDescrMem,
686                         (unsigned long)BusAddr));
687                 pAC->RxPort[i].pRxDescrRing = pDescrMem;
688                 pAC->RxPort[i].VRxDescrRing = BusAddr;
689                 pDescrMem += RX_RING_SIZE;
690                 BusAddr += RX_RING_SIZE;
691         } /* for */
692         
693         return (SK_TRUE);
694 } /* BoardAllocMem */
695
696
697 /****************************************************************************
698  *
699  *      BoardFreeMem - reverse of BoardAllocMem
700  *
701  * Description:
702  *      Free all memory allocated in BoardAllocMem: adapter context,
703  *      descriptor rings, locks.
704  *
705  * Returns:     N/A
706  */
707 static void BoardFreeMem(
708 SK_AC           *pAC)
709 {
710 size_t          AllocLength;    /* length of complete descriptor area */
711
712         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
713                 ("BoardFreeMem\n"));
714 #if (BITS_PER_LONG == 32)
715         AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
716 #else
717         AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
718                 + RX_RING_SIZE + 8;
719 #endif
720
721         pci_free_consistent(pAC->PciDev, AllocLength,
722                             pAC->pDescrMem, pAC->pDescrMemDMA);
723         pAC->pDescrMem = NULL;
724 } /* BoardFreeMem */
725
726
727 /*****************************************************************************
728  *
729  *      BoardInitMem - initiate the descriptor rings
730  *
731  * Description:
732  *      This function sets the descriptor rings up in memory.
733  *      The adapter is initialized with the descriptor start addresses.
734  *
735  * Returns:     N/A
736  */
737 static void BoardInitMem(
738 SK_AC   *pAC)   /* pointer to adapter context */
739 {
740 int     i;              /* loop counter */
741 int     RxDescrSize;    /* the size of a rx descriptor rounded up to alignment*/
742 int     TxDescrSize;    /* the size of a tx descriptor rounded up to alignment*/
743
744         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
745                 ("BoardInitMem\n"));
746
747         RxDescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
748         pAC->RxDescrPerRing = RX_RING_SIZE / RxDescrSize;
749         TxDescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
750         pAC->TxDescrPerRing = TX_RING_SIZE / RxDescrSize;
751         
752         for (i=0; i<pAC->GIni.GIMacsFound; i++) {
753                 SetupRing(
754                         pAC,
755                         pAC->TxPort[i][0].pTxDescrRing,
756                         pAC->TxPort[i][0].VTxDescrRing,
757                         (RXD**)&pAC->TxPort[i][0].pTxdRingHead,
758                         (RXD**)&pAC->TxPort[i][0].pTxdRingTail,
759                         (RXD**)&pAC->TxPort[i][0].pTxdRingPrev,
760                         &pAC->TxPort[i][0].TxdRingFree,
761                         SK_TRUE);
762                 SetupRing(
763                         pAC,
764                         pAC->RxPort[i].pRxDescrRing,
765                         pAC->RxPort[i].VRxDescrRing,
766                         &pAC->RxPort[i].pRxdRingHead,
767                         &pAC->RxPort[i].pRxdRingTail,
768                         &pAC->RxPort[i].pRxdRingPrev,
769                         &pAC->RxPort[i].RxdRingFree,
770                         SK_FALSE);
771         }
772 } /* BoardInitMem */
773
774
775 /*****************************************************************************
776  *
777  *      SetupRing - create one descriptor ring
778  *
779  * Description:
780  *      This function creates one descriptor ring in the given memory area.
781  *      The head, tail and number of free descriptors in the ring are set.
782  *
783  * Returns:
784  *      none
785  */
786 static void SetupRing(
787 SK_AC           *pAC,
788 void            *pMemArea,      /* a pointer to the memory area for the ring */
789 uintptr_t       VMemArea,       /* the virtual bus address of the memory area */
790 RXD             **ppRingHead,   /* address where the head should be written */
791 RXD             **ppRingTail,   /* address where the tail should be written */
792 RXD             **ppRingPrev,   /* address where the tail should be written */
793 int             *pRingFree,     /* address where the # of free descr. goes */
794 SK_BOOL         IsTx)           /* flag: is this a tx ring */
795 {
796 int     i;              /* loop counter */
797 int     DescrSize;      /* the size of a descriptor rounded up to alignment*/
798 int     DescrNum;       /* number of descriptors per ring */
799 RXD     *pDescr;        /* pointer to a descriptor (receive or transmit) */
800 RXD     *pNextDescr;    /* pointer to the next descriptor */
801 RXD     *pPrevDescr;    /* pointer to the previous descriptor */
802 uintptr_t VNextDescr;   /* the virtual bus address of the next descriptor */
803
804         if (IsTx == SK_TRUE) {
805                 DescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) *
806                         DESCR_ALIGN;
807                 DescrNum = TX_RING_SIZE / DescrSize;
808         } else {
809                 DescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) *
810                         DESCR_ALIGN;
811                 DescrNum = RX_RING_SIZE / DescrSize;
812         }
813         
814         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
815                 ("Descriptor size: %d   Descriptor Number: %d\n",
816                 DescrSize,DescrNum));
817         
818         pDescr = (RXD*) pMemArea;
819         pPrevDescr = NULL;
820         pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
821         VNextDescr = VMemArea + DescrSize;
822         for(i=0; i<DescrNum; i++) {
823                 /* set the pointers right */
824                 pDescr->VNextRxd = VNextDescr & 0xffffffffULL;
825                 pDescr->pNextRxd = pNextDescr;
826                 pDescr->TcpSumStarts = pAC->CsOfs;
827
828                 /* advance one step */
829                 pPrevDescr = pDescr;
830                 pDescr = pNextDescr;
831                 pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
832                 VNextDescr += DescrSize;
833         }
834         pPrevDescr->pNextRxd = (RXD*) pMemArea;
835         pPrevDescr->VNextRxd = VMemArea;
836         pDescr = (RXD*) pMemArea;
837         *ppRingHead = (RXD*) pMemArea;
838         *ppRingTail = *ppRingHead;
839         *ppRingPrev = pPrevDescr;
840         *pRingFree = DescrNum;
841 } /* SetupRing */
842
843
844 /*****************************************************************************
845  *
846  *      PortReInitBmu - re-initiate the descriptor rings for one port
847  *
848  * Description:
849  *      This function reinitializes the descriptor rings of one port
850  *      in memory. The port must be stopped before.
851  *      The HW is initialized with the descriptor start addresses.
852  *
853  * Returns:
854  *      none
855  */
856 static void PortReInitBmu(
857 SK_AC   *pAC,           /* pointer to adapter context */
858 int     PortIndex)      /* index of the port for which to re-init */
859 {
860         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
861                 ("PortReInitBmu "));
862
863         /* set address of first descriptor of ring in BMU */
864         SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+ Q_DA_L,
865                 (uint32_t)(((caddr_t)
866                 (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
867                 pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
868                 pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) &
869                 0xFFFFFFFF));
870         SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+ Q_DA_H,
871                 (uint32_t)(((caddr_t)
872                 (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
873                 pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
874                 pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) >> 32));
875         SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+Q_DA_L,
876                 (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
877                 pAC->RxPort[PortIndex].pRxDescrRing +
878                 pAC->RxPort[PortIndex].VRxDescrRing) & 0xFFFFFFFF));
879         SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+Q_DA_H,
880                 (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
881                 pAC->RxPort[PortIndex].pRxDescrRing +
882                 pAC->RxPort[PortIndex].VRxDescrRing) >> 32));
883 } /* PortReInitBmu */
884
885
886 /****************************************************************************
887  *
888  *      SkGeIsr - handle adapter interrupts
889  *
890  * Description:
891  *      The interrupt routine is called when the network adapter
892  *      generates an interrupt. It may also be called if another device
893  *      shares this interrupt vector with the driver.
894  *
895  * Returns: N/A
896  *
897  */
898 static SkIsrRetVar SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
899 {
900 struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
901 DEV_NET         *pNet;
902 SK_AC           *pAC;
903 SK_U32          IntSrc;         /* interrupts source register contents */       
904
905         pNet = netdev_priv(dev);
906         pAC = pNet->pAC;
907         
908         /*
909          * Check and process if its our interrupt
910          */
911         SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
912         if (IntSrc == 0) {
913                 return SkIsrRetNone;
914         }
915
916         while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
917 #if 0 /* software irq currently not used */
918                 if (IntSrc & IS_IRQ_SW) {
919                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
920                                 SK_DBGCAT_DRV_INT_SRC,
921                                 ("Software IRQ\n"));
922                 }
923 #endif
924                 if (IntSrc & IS_R1_F) {
925                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
926                                 SK_DBGCAT_DRV_INT_SRC,
927                                 ("EOF RX1 IRQ\n"));
928                         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
929                         SK_PNMI_CNT_RX_INTR(pAC, 0);
930                 }
931                 if (IntSrc & IS_R2_F) {
932                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
933                                 SK_DBGCAT_DRV_INT_SRC,
934                                 ("EOF RX2 IRQ\n"));
935                         ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
936                         SK_PNMI_CNT_RX_INTR(pAC, 1);
937                 }
938 #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
939                 if (IntSrc & IS_XA1_F) {
940                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
941                                 SK_DBGCAT_DRV_INT_SRC,
942                                 ("EOF AS TX1 IRQ\n"));
943                         SK_PNMI_CNT_TX_INTR(pAC, 0);
944                         spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
945                         FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
946                         spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
947                 }
948                 if (IntSrc & IS_XA2_F) {
949                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
950                                 SK_DBGCAT_DRV_INT_SRC,
951                                 ("EOF AS TX2 IRQ\n"));
952                         SK_PNMI_CNT_TX_INTR(pAC, 1);
953                         spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
954                         FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
955                         spin_unlock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
956                 }
957 #if 0 /* only if sync. queues used */
958                 if (IntSrc & IS_XS1_F) {
959                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
960                                 SK_DBGCAT_DRV_INT_SRC,
961                                 ("EOF SY TX1 IRQ\n"));
962                         SK_PNMI_CNT_TX_INTR(pAC, 1);
963                         spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
964                         FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
965                         spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
966                         ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
967                 }
968                 if (IntSrc & IS_XS2_F) {
969                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
970                                 SK_DBGCAT_DRV_INT_SRC,
971                                 ("EOF SY TX2 IRQ\n"));
972                         SK_PNMI_CNT_TX_INTR(pAC, 1);
973                         spin_lock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
974                         FreeTxDescriptors(pAC, 1, TX_PRIO_HIGH);
975                         spin_unlock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
976                         ClearTxIrq(pAC, 1, TX_PRIO_HIGH);
977                 }
978 #endif
979 #endif
980
981                 /* do all IO at once */
982                 if (IntSrc & IS_R1_F)
983                         ClearAndStartRx(pAC, 0);
984                 if (IntSrc & IS_R2_F)
985                         ClearAndStartRx(pAC, 1);
986 #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
987                 if (IntSrc & IS_XA1_F)
988                         ClearTxIrq(pAC, 0, TX_PRIO_LOW);
989                 if (IntSrc & IS_XA2_F)
990                         ClearTxIrq(pAC, 1, TX_PRIO_LOW);
991 #endif
992                 SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
993         } /* while (IntSrc & IRQ_MASK != 0) */
994
995         IntSrc &= pAC->GIni.GIValIrqMask;
996         if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
997                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
998                         ("SPECIAL IRQ DP-Cards => %x\n", IntSrc));
999                 pAC->CheckQueue = SK_FALSE;
1000                 spin_lock(&pAC->SlowPathLock);
1001                 if (IntSrc & SPECIAL_IRQS)
1002                         SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
1003
1004                 SkEventDispatcher(pAC, pAC->IoBase);
1005                 spin_unlock(&pAC->SlowPathLock);
1006         }
1007         /*
1008          * do it all again is case we cleared an interrupt that
1009          * came in after handling the ring (OUTs may be delayed
1010          * in hardware buffers, but are through after IN)
1011          *
1012          * rroesler: has been commented out and shifted to
1013          *           SkGeDrvEvent(), because it is timer
1014          *           guarded now
1015          *
1016         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1017         ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
1018          */
1019
1020         if (pAC->CheckQueue) {
1021                 pAC->CheckQueue = SK_FALSE;
1022                 spin_lock(&pAC->SlowPathLock);
1023                 SkEventDispatcher(pAC, pAC->IoBase);
1024                 spin_unlock(&pAC->SlowPathLock);
1025         }
1026
1027         /* IRQ is processed - Enable IRQs again*/
1028         SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
1029
1030                 return SkIsrRetHandled;
1031 } /* SkGeIsr */
1032
1033
1034 /****************************************************************************
1035  *
1036  *      SkGeIsrOnePort - handle adapter interrupts for single port adapter
1037  *
1038  * Description:
1039  *      The interrupt routine is called when the network adapter
1040  *      generates an interrupt. It may also be called if another device
1041  *      shares this interrupt vector with the driver.
1042  *      This is the same as above, but handles only one port.
1043  *
1044  * Returns: N/A
1045  *
1046  */
1047 static SkIsrRetVar SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
1048 {
1049 struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
1050 DEV_NET         *pNet;
1051 SK_AC           *pAC;
1052 SK_U32          IntSrc;         /* interrupts source register contents */       
1053
1054         pNet = netdev_priv(dev);
1055         pAC = pNet->pAC;
1056         
1057         /*
1058          * Check and process if its our interrupt
1059          */
1060         SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
1061         if (IntSrc == 0) {
1062                 return SkIsrRetNone;
1063         }
1064         
1065         while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
1066 #if 0 /* software irq currently not used */
1067                 if (IntSrc & IS_IRQ_SW) {
1068                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1069                                 SK_DBGCAT_DRV_INT_SRC,
1070                                 ("Software IRQ\n"));
1071                 }
1072 #endif
1073                 if (IntSrc & IS_R1_F) {
1074                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1075                                 SK_DBGCAT_DRV_INT_SRC,
1076                                 ("EOF RX1 IRQ\n"));
1077                         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1078                         SK_PNMI_CNT_RX_INTR(pAC, 0);
1079                 }
1080 #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
1081                 if (IntSrc & IS_XA1_F) {
1082                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1083                                 SK_DBGCAT_DRV_INT_SRC,
1084                                 ("EOF AS TX1 IRQ\n"));
1085                         SK_PNMI_CNT_TX_INTR(pAC, 0);
1086                         spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1087                         FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
1088                         spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1089                 }
1090 #if 0 /* only if sync. queues used */
1091                 if (IntSrc & IS_XS1_F) {
1092                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1093                                 SK_DBGCAT_DRV_INT_SRC,
1094                                 ("EOF SY TX1 IRQ\n"));
1095                         SK_PNMI_CNT_TX_INTR(pAC, 0);
1096                         spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1097                         FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
1098                         spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1099                         ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
1100                 }
1101 #endif
1102 #endif
1103
1104                 /* do all IO at once */
1105                 if (IntSrc & IS_R1_F)
1106                         ClearAndStartRx(pAC, 0);
1107 #ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
1108                 if (IntSrc & IS_XA1_F)
1109                         ClearTxIrq(pAC, 0, TX_PRIO_LOW);
1110 #endif
1111                 SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
1112         } /* while (IntSrc & IRQ_MASK != 0) */
1113         
1114         IntSrc &= pAC->GIni.GIValIrqMask;
1115         if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
1116                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
1117                         ("SPECIAL IRQ SP-Cards => %x\n", IntSrc));
1118                 pAC->CheckQueue = SK_FALSE;
1119                 spin_lock(&pAC->SlowPathLock);
1120                 if (IntSrc & SPECIAL_IRQS)
1121                         SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
1122
1123                 SkEventDispatcher(pAC, pAC->IoBase);
1124                 spin_unlock(&pAC->SlowPathLock);
1125         }
1126         /*
1127          * do it all again is case we cleared an interrupt that
1128          * came in after handling the ring (OUTs may be delayed
1129          * in hardware buffers, but are through after IN)
1130          *
1131          * rroesler: has been commented out and shifted to
1132          *           SkGeDrvEvent(), because it is timer
1133          *           guarded now
1134          *
1135         ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1136          */
1137
1138         /* IRQ is processed - Enable IRQs again*/
1139         SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
1140
1141                 return SkIsrRetHandled;
1142 } /* SkGeIsrOnePort */
1143
1144 #ifdef CONFIG_NET_POLL_CONTROLLER
1145 /****************************************************************************
1146  *
1147  *      SkGePollController - polling receive, for netconsole
1148  *
1149  * Description:
1150  *      Polling receive - used by netconsole and other diagnostic tools
1151  *      to allow network i/o with interrupts disabled.
1152  *
1153  * Returns: N/A
1154  */
1155 static void SkGePollController(struct net_device *dev)
1156 {
1157         disable_irq(dev->irq);
1158         SkGeIsr(dev->irq, dev, NULL);
1159         enable_irq(dev->irq);
1160 }
1161 #endif
1162
1163 /****************************************************************************
1164  *
1165  *      SkGeOpen - handle start of initialized adapter
1166  *
1167  * Description:
1168  *      This function starts the initialized adapter.
1169  *      The board level variable is set and the adapter is
1170  *      brought to full functionality.
1171  *      The device flags are set for operation.
1172  *      Do all necessary level 2 initialization, enable interrupts and
1173  *      give start command to RLMT.
1174  *
1175  * Returns:
1176  *      0 on success
1177  *      != 0 on error
1178  */
1179 static int SkGeOpen(
1180 struct SK_NET_DEVICE    *dev)
1181 {
1182         DEV_NET                 *pNet;
1183         SK_AC                   *pAC;
1184         unsigned long   Flags;          /* for spin lock */
1185         int                             i;
1186         SK_EVPARA               EvPara;         /* an event parameter union */
1187
1188         pNet = netdev_priv(dev);
1189         pAC = pNet->pAC;
1190         
1191         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1192                 ("SkGeOpen: pAC=0x%lX:\n", (unsigned long)pAC));
1193
1194 #ifdef SK_DIAG_SUPPORT
1195         if (pAC->DiagModeActive == DIAG_ACTIVE) {
1196                 if (pAC->Pnmi.DiagAttached == SK_DIAG_RUNNING) {
1197                         return (-1);   /* still in use by diag; deny actions */
1198                 } 
1199         }
1200 #endif
1201
1202         /* Set blink mode */
1203         if ((pAC->PciDev->vendor == 0x1186) || (pAC->PciDev->vendor == 0x11ab ))
1204                 pAC->GIni.GILedBlinkCtrl = OEM_CONFIG_VALUE;
1205
1206         if (pAC->BoardLevel == SK_INIT_DATA) {
1207                 /* level 1 init common modules here */
1208                 if (SkGeInit(pAC, pAC->IoBase, SK_INIT_IO) != 0) {
1209                         printk("%s: HWInit (1) failed.\n", pAC->dev[pNet->PortNr]->name);
1210                         return (-1);
1211                 }
1212                 SkI2cInit       (pAC, pAC->IoBase, SK_INIT_IO);
1213                 SkEventInit     (pAC, pAC->IoBase, SK_INIT_IO);
1214                 SkPnmiInit      (pAC, pAC->IoBase, SK_INIT_IO);
1215                 SkAddrInit      (pAC, pAC->IoBase, SK_INIT_IO);
1216                 SkRlmtInit      (pAC, pAC->IoBase, SK_INIT_IO);
1217                 SkTimerInit     (pAC, pAC->IoBase, SK_INIT_IO);
1218                 pAC->BoardLevel = SK_INIT_IO;
1219         }
1220
1221         if (pAC->BoardLevel != SK_INIT_RUN) {
1222                 /* tschilling: Level 2 init modules here, check return value. */
1223                 if (SkGeInit(pAC, pAC->IoBase, SK_INIT_RUN) != 0) {
1224                         printk("%s: HWInit (2) failed.\n", pAC->dev[pNet->PortNr]->name);
1225                         return (-1);
1226                 }
1227                 SkI2cInit       (pAC, pAC->IoBase, SK_INIT_RUN);
1228                 SkEventInit     (pAC, pAC->IoBase, SK_INIT_RUN);
1229                 SkPnmiInit      (pAC, pAC->IoBase, SK_INIT_RUN);
1230                 SkAddrInit      (pAC, pAC->IoBase, SK_INIT_RUN);
1231                 SkRlmtInit      (pAC, pAC->IoBase, SK_INIT_RUN);
1232                 SkTimerInit     (pAC, pAC->IoBase, SK_INIT_RUN);
1233                 pAC->BoardLevel = SK_INIT_RUN;
1234         }
1235
1236         for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1237                 /* Enable transmit descriptor polling. */
1238                 SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
1239                 FillRxRing(pAC, &pAC->RxPort[i]);
1240         }
1241         SkGeYellowLED(pAC, pAC->IoBase, 1);
1242
1243         StartDrvCleanupTimer(pAC);
1244         SkDimEnableModerationIfNeeded(pAC);     
1245         SkDimDisplayModerationSettings(pAC);
1246
1247         pAC->GIni.GIValIrqMask &= IRQ_MASK;
1248
1249         /* enable Interrupts */
1250         SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
1251         SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
1252
1253         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1254
1255         if ((pAC->RlmtMode != 0) && (pAC->MaxPorts == 0)) {
1256                 EvPara.Para32[0] = pAC->RlmtNets;
1257                 EvPara.Para32[1] = -1;
1258                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
1259                         EvPara);
1260                 EvPara.Para32[0] = pAC->RlmtMode;
1261                 EvPara.Para32[1] = 0;
1262                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_MODE_CHANGE,
1263                         EvPara);
1264         }
1265
1266         EvPara.Para32[0] = pNet->NetNr;
1267         EvPara.Para32[1] = -1;
1268         SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
1269         SkEventDispatcher(pAC, pAC->IoBase);
1270         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1271
1272         pAC->MaxPorts++;
1273         pNet->Up = 1;
1274
1275
1276         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1277                 ("SkGeOpen suceeded\n"));
1278
1279         return (0);
1280 } /* SkGeOpen */
1281
1282
1283 /****************************************************************************
1284  *
1285  *      SkGeClose - Stop initialized adapter
1286  *
1287  * Description:
1288  *      Close initialized adapter.
1289  *
1290  * Returns:
1291  *      0 - on success
1292  *      error code - on error
1293  */
1294 static int SkGeClose(
1295 struct SK_NET_DEVICE    *dev)
1296 {
1297         DEV_NET         *pNet;
1298         DEV_NET         *newPtrNet;
1299         SK_AC           *pAC;
1300
1301         unsigned long   Flags;          /* for spin lock */
1302         int             i;
1303         int             PortIdx;
1304         SK_EVPARA       EvPara;
1305
1306         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1307                 ("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
1308
1309         pNet = netdev_priv(dev);
1310         pAC = pNet->pAC;
1311
1312 #ifdef SK_DIAG_SUPPORT
1313         if (pAC->DiagModeActive == DIAG_ACTIVE) {
1314                 if (pAC->DiagFlowCtrl == SK_FALSE) {
1315                         /* 
1316                         ** notify that the interface which has been closed
1317                         ** by operator interaction must not be started up 
1318                         ** again when the DIAG has finished. 
1319                         */
1320                         newPtrNet = netdev_priv(pAC->dev[0]);
1321                         if (newPtrNet == pNet) {
1322                                 pAC->WasIfUp[0] = SK_FALSE;
1323                         } else {
1324                                 pAC->WasIfUp[1] = SK_FALSE;
1325                         }
1326                         return 0; /* return to system everything is fine... */
1327                 } else {
1328                         pAC->DiagFlowCtrl = SK_FALSE;
1329                 }
1330         }
1331 #endif
1332
1333         netif_stop_queue(dev);
1334
1335         if (pAC->RlmtNets == 1)
1336                 PortIdx = pAC->ActivePort;
1337         else
1338                 PortIdx = pNet->NetNr;
1339
1340         StopDrvCleanupTimer(pAC);
1341
1342         /*
1343          * Clear multicast table, promiscuous mode ....
1344          */
1345         SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
1346         SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
1347                 SK_PROM_MODE_NONE);
1348
1349         if (pAC->MaxPorts == 1) {
1350                 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1351                 /* disable interrupts */
1352                 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
1353                 EvPara.Para32[0] = pNet->NetNr;
1354                 EvPara.Para32[1] = -1;
1355                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1356                 SkEventDispatcher(pAC, pAC->IoBase);
1357                 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
1358                 /* stop the hardware */
1359                 SkGeDeInit(pAC, pAC->IoBase);
1360                 pAC->BoardLevel = SK_INIT_DATA;
1361                 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1362         } else {
1363
1364                 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1365                 EvPara.Para32[0] = pNet->NetNr;
1366                 EvPara.Para32[1] = -1;
1367                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1368                 SkPnmiEvent(pAC, pAC->IoBase, SK_PNMI_EVT_XMAC_RESET, EvPara);
1369                 SkEventDispatcher(pAC, pAC->IoBase);
1370                 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1371                 
1372                 /* Stop port */
1373                 spin_lock_irqsave(&pAC->TxPort[pNet->PortNr]
1374                         [TX_PRIO_LOW].TxDesRingLock, Flags);
1375                 SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
1376                         SK_STOP_ALL, SK_HARD_RST);
1377                 spin_unlock_irqrestore(&pAC->TxPort[pNet->PortNr]
1378                         [TX_PRIO_LOW].TxDesRingLock, Flags);
1379         }
1380
1381         if (pAC->RlmtNets == 1) {
1382                 /* clear all descriptor rings */
1383                 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1384                         ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
1385                         ClearRxRing(pAC, &pAC->RxPort[i]);
1386                         ClearTxRing(pAC, &pAC->TxPort[i][TX_PRIO_LOW]);
1387                 }
1388         } else {
1389                 /* clear port descriptor rings */
1390                 ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
1391                 ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
1392                 ClearTxRing(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]);
1393         }
1394
1395         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1396                 ("SkGeClose: done "));
1397
1398         SK_MEMSET(&(pAC->PnmiBackup), 0, sizeof(SK_PNMI_STRUCT_DATA));
1399         SK_MEMCPY(&(pAC->PnmiBackup), &(pAC->PnmiStruct), 
1400                         sizeof(SK_PNMI_STRUCT_DATA));
1401
1402         pAC->MaxPorts--;
1403         pNet->Up = 0;
1404
1405         return (0);
1406 } /* SkGeClose */
1407
1408
1409 /*****************************************************************************
1410  *
1411  *      SkGeXmit - Linux frame transmit function
1412  *
1413  * Description:
1414  *      The system calls this function to send frames onto the wire.
1415  *      It puts the frame in the tx descriptor ring. If the ring is
1416  *      full then, the 'tbusy' flag is set.
1417  *
1418  * Returns:
1419  *      0, if everything is ok
1420  *      !=0, on error
1421  * WARNING: returning 1 in 'tbusy' case caused system crashes (double
1422  *      allocated skb's) !!!
1423  */
1424 static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
1425 {
1426 DEV_NET         *pNet;
1427 SK_AC           *pAC;
1428 int                     Rc;     /* return code of XmitFrame */
1429
1430         pNet = netdev_priv(dev);
1431         pAC = pNet->pAC;
1432
1433         if ((!skb_shinfo(skb)->nr_frags) ||
1434                 (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) {
1435                 /* Don't activate scatter-gather and hardware checksum */
1436
1437                 if (pAC->RlmtNets == 2)
1438                         Rc = XmitFrame(
1439                                 pAC,
1440                                 &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
1441                                 skb);
1442                 else
1443                         Rc = XmitFrame(
1444                                 pAC,
1445                                 &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
1446                                 skb);
1447         } else {
1448                 /* scatter-gather and hardware TCP checksumming anabled*/
1449                 if (pAC->RlmtNets == 2)
1450                         Rc = XmitFrameSG(
1451                                 pAC,
1452                                 &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
1453                                 skb);
1454                 else
1455                         Rc = XmitFrameSG(
1456                                 pAC,
1457                                 &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
1458                                 skb);
1459         }
1460
1461         /* Transmitter out of resources? */
1462         if (Rc <= 0) {
1463                 netif_stop_queue(dev);
1464         }
1465
1466         /* If not taken, give buffer ownership back to the
1467          * queueing layer.
1468          */
1469         if (Rc < 0)
1470                 return (1);
1471
1472         dev->trans_start = jiffies;
1473         return (0);
1474 } /* SkGeXmit */
1475
1476
1477 /*****************************************************************************
1478  *
1479  *      XmitFrame - fill one socket buffer into the transmit ring
1480  *
1481  * Description:
1482  *      This function puts a message into the transmit descriptor ring
1483  *      if there is a descriptors left.
1484  *      Linux skb's consist of only one continuous buffer.
1485  *      The first step locks the ring. It is held locked
1486  *      all time to avoid problems with SWITCH_../PORT_RESET.
1487  *      Then the descriptoris allocated.
1488  *      The second part is linking the buffer to the descriptor.
1489  *      At the very last, the Control field of the descriptor
1490  *      is made valid for the BMU and a start TX command is given
1491  *      if necessary.
1492  *
1493  * Returns:
1494  *      > 0 - on succes: the number of bytes in the message
1495  *      = 0 - on resource shortage: this frame sent or dropped, now
1496  *              the ring is full ( -> set tbusy)
1497  *      < 0 - on failure: other problems ( -> return failure to upper layers)
1498  */
1499 static int XmitFrame(
1500 SK_AC           *pAC,           /* pointer to adapter context           */
1501 TX_PORT         *pTxPort,       /* pointer to struct of port to send to */
1502 struct sk_buff  *pMessage)      /* pointer to send-message              */
1503 {
1504         TXD             *pTxd;          /* the rxd to fill */
1505         TXD             *pOldTxd;
1506         unsigned long    Flags;
1507         SK_U64           PhysAddr;
1508         int              Protocol;
1509         int              IpHeaderLength;
1510         int              BytesSend = pMessage->len;
1511
1512         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS, ("X"));
1513
1514         spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
1515 #ifndef USE_TX_COMPLETE
1516         FreeTxDescriptors(pAC, pTxPort);
1517 #endif
1518         if (pTxPort->TxdRingFree == 0) {
1519                 /* 
1520                 ** no enough free descriptors in ring at the moment.
1521                 ** Maybe free'ing some old one help?
1522                 */
1523                 FreeTxDescriptors(pAC, pTxPort);
1524                 if (pTxPort->TxdRingFree == 0) {
1525                         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
1526                         SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
1527                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1528                                 SK_DBGCAT_DRV_TX_PROGRESS,
1529                                 ("XmitFrame failed\n"));
1530                         /* 
1531                         ** the desired message can not be sent
1532                         ** Because tbusy seems to be set, the message 
1533                         ** should not be freed here. It will be used 
1534                         ** by the scheduler of the ethernet handler 
1535                         */
1536                         return (-1);
1537                 }
1538         }
1539
1540         /*
1541         ** If the passed socket buffer is of smaller MTU-size than 60,
1542         ** copy everything into new buffer and fill all bytes between
1543         ** the original packet end and the new packet end of 60 with 0x00.
1544         ** This is to resolve faulty padding by the HW with 0xaa bytes.
1545         */
1546         if (BytesSend < C_LEN_ETHERNET_MINSIZE) {
1547                 if ((pMessage = skb_padto(pMessage, C_LEN_ETHERNET_MINSIZE)) == NULL) {
1548                         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
1549                         return 0;
1550                 }
1551                 pMessage->len = C_LEN_ETHERNET_MINSIZE;
1552         }
1553
1554         /* 
1555         ** advance head counter behind descriptor needed for this frame, 
1556         ** so that needed descriptor is reserved from that on. The next
1557         ** action will be to add the passed buffer to the TX-descriptor
1558         */
1559         pTxd = pTxPort->pTxdRingHead;
1560         pTxPort->pTxdRingHead = pTxd->pNextTxd;
1561         pTxPort->TxdRingFree--;
1562
1563 #ifdef SK_DUMP_TX
1564         DumpMsg(pMessage, "XmitFrame");
1565 #endif
1566
1567         /* 
1568         ** First step is to map the data to be sent via the adapter onto
1569         ** the DMA memory. Kernel 2.2 uses virt_to_bus(), but kernels 2.4
1570         ** and 2.6 need to use pci_map_page() for that mapping.
1571         */
1572         PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
1573                                         virt_to_page(pMessage->data),
1574                                         ((unsigned long) pMessage->data & ~PAGE_MASK),
1575                                         pMessage->len,
1576                                         PCI_DMA_TODEVICE);
1577         pTxd->VDataLow  = (SK_U32) (PhysAddr & 0xffffffff);
1578         pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
1579         pTxd->pMBuf     = pMessage;
1580
1581         if (pMessage->ip_summed == CHECKSUM_HW) {
1582                 Protocol = ((SK_U8)pMessage->data[C_OFFSET_IPPROTO] & 0xff);
1583                 if ((Protocol == C_PROTO_ID_UDP) && 
1584                         (pAC->GIni.GIChipRev == 0) &&
1585                         (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
1586                         pTxd->TBControl = BMU_TCP_CHECK;
1587                 } else {
1588                         pTxd->TBControl = BMU_UDP_CHECK;
1589                 }
1590
1591                 IpHeaderLength  = (SK_U8)pMessage->data[C_OFFSET_IPHEADER];
1592                 IpHeaderLength  = (IpHeaderLength & 0xf) * 4;
1593                 pTxd->TcpSumOfs = 0; /* PH-Checksum already calculated */
1594                 pTxd->TcpSumSt  = C_LEN_ETHERMAC_HEADER + IpHeaderLength + 
1595                                                         (Protocol == C_PROTO_ID_UDP ?
1596                                                         C_OFFSET_UDPHEADER_UDPCS : 
1597                                                         C_OFFSET_TCPHEADER_TCPCS);
1598                 pTxd->TcpSumWr  = C_LEN_ETHERMAC_HEADER + IpHeaderLength;
1599
1600                 pTxd->TBControl |= BMU_OWN | BMU_STF | 
1601                                    BMU_SW  | BMU_EOF |
1602 #ifdef USE_TX_COMPLETE
1603                                    BMU_IRQ_EOF |
1604 #endif
1605                                    pMessage->len;
1606         } else {
1607                 pTxd->TBControl = BMU_OWN | BMU_STF | BMU_CHECK | 
1608                                   BMU_SW  | BMU_EOF |
1609 #ifdef USE_TX_COMPLETE
1610                                    BMU_IRQ_EOF |
1611 #endif
1612                         pMessage->len;
1613         }
1614
1615         /* 
1616         ** If previous descriptor already done, give TX start cmd 
1617         */
1618         pOldTxd = xchg(&pTxPort->pTxdRingPrev, pTxd);
1619         if ((pOldTxd->TBControl & BMU_OWN) == 0) {
1620                 SK_OUT8(pTxPort->HwAddr, Q_CSR, CSR_START);
1621         }       
1622
1623         /* 
1624         ** after releasing the lock, the skb may immediately be free'd 
1625         */
1626         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
1627         if (pTxPort->TxdRingFree != 0) {
1628                 return (BytesSend);
1629         } else {
1630                 return (0);
1631         }
1632
1633 } /* XmitFrame */
1634
1635 /*****************************************************************************
1636  *
1637  *      XmitFrameSG - fill one socket buffer into the transmit ring
1638  *                (use SG and TCP/UDP hardware checksumming)
1639  *
1640  * Description:
1641  *      This function puts a message into the transmit descriptor ring
1642  *      if there is a descriptors left.
1643  *
1644  * Returns:
1645  *      > 0 - on succes: the number of bytes in the message
1646  *      = 0 - on resource shortage: this frame sent or dropped, now
1647  *              the ring is full ( -> set tbusy)
1648  *      < 0 - on failure: other problems ( -> return failure to upper layers)
1649  */
1650 static int XmitFrameSG(
1651 SK_AC           *pAC,           /* pointer to adapter context           */
1652 TX_PORT         *pTxPort,       /* pointer to struct of port to send to */
1653 struct sk_buff  *pMessage)      /* pointer to send-message              */
1654 {
1655
1656         TXD             *pTxd;
1657         TXD             *pTxdFst;
1658         TXD             *pTxdLst;
1659         int              CurrFrag;
1660         int              BytesSend;
1661         int              IpHeaderLength; 
1662         int              Protocol;
1663         skb_frag_t      *sk_frag;
1664         SK_U64           PhysAddr;
1665         unsigned long    Flags;
1666
1667         spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
1668 #ifndef USE_TX_COMPLETE
1669         FreeTxDescriptors(pAC, pTxPort);
1670 #endif
1671         if ((skb_shinfo(pMessage)->nr_frags +1) > pTxPort->TxdRingFree) {
1672                 FreeTxDescriptors(pAC, pTxPort);
1673                 if ((skb_shinfo(pMessage)->nr_frags + 1) > pTxPort->TxdRingFree) {
1674                         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
1675                         SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
1676                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1677                                 SK_DBGCAT_DRV_TX_PROGRESS,
1678                                 ("XmitFrameSG failed - Ring full\n"));
1679                                 /* this message can not be sent now */
1680                         return(-1);
1681                 }
1682         }
1683
1684         pTxd      = pTxPort->pTxdRingHead;
1685         pTxdFst   = pTxd;
1686         pTxdLst   = pTxd;
1687         BytesSend = 0;
1688         Protocol  = 0;
1689
1690         /* 
1691         ** Map the first fragment (header) into the DMA-space
1692         */
1693         PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
1694                         virt_to_page(pMessage->data),
1695                         ((unsigned long) pMessage->data & ~PAGE_MASK),
1696                         skb_headlen(pMessage),
1697                         PCI_DMA_TODEVICE);
1698
1699         pTxd->VDataLow  = (SK_U32) (PhysAddr & 0xffffffff);
1700         pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
1701
1702         /* 
1703         ** Does the HW need to evaluate checksum for TCP or UDP packets? 
1704         */
1705         if (pMessage->ip_summed == CHECKSUM_HW) {
1706                 pTxd->TBControl = BMU_STF | BMU_STFWD | skb_headlen(pMessage);
1707                 /* 
1708                 ** We have to use the opcode for tcp here,  because the
1709                 ** opcode for udp is not working in the hardware yet 
1710                 ** (Revision 2.0)
1711                 */
1712                 Protocol = ((SK_U8)pMessage->data[C_OFFSET_IPPROTO] & 0xff);
1713                 if ((Protocol == C_PROTO_ID_UDP) && 
1714                         (pAC->GIni.GIChipRev == 0) &&
1715                         (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
1716                         pTxd->TBControl |= BMU_TCP_CHECK;
1717                 } else {
1718                         pTxd->TBControl |= BMU_UDP_CHECK;
1719                 }
1720
1721                 IpHeaderLength  = ((SK_U8)pMessage->data[C_OFFSET_IPHEADER] & 0xf)*4;
1722                 pTxd->TcpSumOfs = 0; /* PH-Checksum already claculated */
1723                 pTxd->TcpSumSt  = C_LEN_ETHERMAC_HEADER + IpHeaderLength +
1724                                                 (Protocol == C_PROTO_ID_UDP ?
1725                                                 C_OFFSET_UDPHEADER_UDPCS :
1726                                                 C_OFFSET_TCPHEADER_TCPCS);
1727                 pTxd->TcpSumWr  = C_LEN_ETHERMAC_HEADER + IpHeaderLength;
1728         } else {
1729                 pTxd->TBControl = BMU_CHECK | BMU_SW | BMU_STF |
1730                                         skb_headlen(pMessage);
1731         }
1732
1733         pTxd = pTxd->pNextTxd;
1734         pTxPort->TxdRingFree--;
1735         BytesSend += skb_headlen(pMessage);
1736
1737         /* 
1738         ** Browse over all SG fragments and map each of them into the DMA space
1739         */
1740         for (CurrFrag = 0; CurrFrag < skb_shinfo(pMessage)->nr_frags; CurrFrag++) {
1741                 sk_frag = &skb_shinfo(pMessage)->frags[CurrFrag];
1742                 /* 
1743                 ** we already have the proper value in entry
1744                 */
1745                 PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
1746                                                  sk_frag->page,
1747                                                  sk_frag->page_offset,
1748                                                  sk_frag->size,
1749                                                  PCI_DMA_TODEVICE);
1750
1751                 pTxd->VDataLow  = (SK_U32) (PhysAddr & 0xffffffff);
1752                 pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
1753                 pTxd->pMBuf     = pMessage;
1754                 
1755                 /* 
1756                 ** Does the HW need to evaluate checksum for TCP or UDP packets? 
1757                 */
1758                 if (pMessage->ip_summed == CHECKSUM_HW) {
1759                         pTxd->TBControl = BMU_OWN | BMU_SW | BMU_STFWD;
1760                         /* 
1761                         ** We have to use the opcode for tcp here because the 
1762                         ** opcode for udp is not working in the hardware yet 
1763                         ** (revision 2.0)
1764                         */
1765                         if ((Protocol == C_PROTO_ID_UDP) && 
1766                                 (pAC->GIni.GIChipRev == 0) &&
1767                                 (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
1768                                 pTxd->TBControl |= BMU_TCP_CHECK;
1769                         } else {
1770                                 pTxd->TBControl |= BMU_UDP_CHECK;
1771                         }
1772                 } else {
1773                         pTxd->TBControl = BMU_CHECK | BMU_SW | BMU_OWN;
1774                 }
1775
1776                 /* 
1777                 ** Do we have the last fragment? 
1778                 */
1779                 if( (CurrFrag+1) == skb_shinfo(pMessage)->nr_frags )  {
1780 #ifdef USE_TX_COMPLETE
1781                         pTxd->TBControl |= BMU_EOF | BMU_IRQ_EOF | sk_frag->size;
1782 #else
1783                         pTxd->TBControl |= BMU_EOF | sk_frag->size;
1784 #endif
1785                         pTxdFst->TBControl |= BMU_OWN | BMU_SW;
1786
1787                 } else {
1788                         pTxd->TBControl |= sk_frag->size;
1789                 }
1790                 pTxdLst = pTxd;
1791                 pTxd    = pTxd->pNextTxd;
1792                 pTxPort->TxdRingFree--;
1793                 BytesSend += sk_frag->size;
1794         }
1795
1796         /* 
1797         ** If previous descriptor already done, give TX start cmd 
1798         */
1799         if ((pTxPort->pTxdRingPrev->TBControl & BMU_OWN) == 0) {
1800                 SK_OUT8(pTxPort->HwAddr, Q_CSR, CSR_START);
1801         }
1802
1803         pTxPort->pTxdRingPrev = pTxdLst;
1804         pTxPort->pTxdRingHead = pTxd;
1805
1806         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
1807
1808         if (pTxPort->TxdRingFree > 0) {
1809                 return (BytesSend);
1810         } else {
1811                 return (0);
1812         }
1813 }
1814
1815 /*****************************************************************************
1816  *
1817  *      FreeTxDescriptors - release descriptors from the descriptor ring
1818  *
1819  * Description:
1820  *      This function releases descriptors from a transmit ring if they
1821  *      have been sent by the BMU.
1822  *      If a descriptors is sent, it can be freed and the message can
1823  *      be freed, too.
1824  *      The SOFTWARE controllable bit is used to prevent running around a
1825  *      completely free ring for ever. If this bit is no set in the
1826  *      frame (by XmitFrame), this frame has never been sent or is
1827  *      already freed.
1828  *      The Tx descriptor ring lock must be held while calling this function !!!
1829  *
1830  * Returns:
1831  *      none
1832  */
1833 static void FreeTxDescriptors(
1834 SK_AC   *pAC,           /* pointer to the adapter context */
1835 TX_PORT *pTxPort)       /* pointer to destination port structure */
1836 {
1837 TXD     *pTxd;          /* pointer to the checked descriptor */
1838 TXD     *pNewTail;      /* pointer to 'end' of the ring */
1839 SK_U32  Control;        /* TBControl field of descriptor */
1840 SK_U64  PhysAddr;       /* address of DMA mapping */
1841
1842         pNewTail = pTxPort->pTxdRingTail;
1843         pTxd     = pNewTail;
1844         /*
1845         ** loop forever; exits if BMU_SW bit not set in start frame
1846         ** or BMU_OWN bit set in any frame
1847         */
1848         while (1) {
1849                 Control = pTxd->TBControl;
1850                 if ((Control & BMU_SW) == 0) {
1851                         /*
1852                         ** software controllable bit is set in first
1853                         ** fragment when given to BMU. Not set means that
1854                         ** this fragment was never sent or is already
1855                         ** freed ( -> ring completely free now).
1856                         */
1857                         pTxPort->pTxdRingTail = pTxd;
1858                         netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
1859                         return;
1860                 }
1861                 if (Control & BMU_OWN) {
1862                         pTxPort->pTxdRingTail = pTxd;
1863                         if (pTxPort->TxdRingFree > 0) {
1864                                 netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
1865                         }
1866                         return;
1867                 }
1868                 
1869                 /* 
1870                 ** release the DMA mapping, because until not unmapped
1871                 ** this buffer is considered being under control of the
1872                 ** adapter card!
1873                 */
1874                 PhysAddr = ((SK_U64) pTxd->VDataHigh) << (SK_U64) 32;
1875                 PhysAddr |= (SK_U64) pTxd->VDataLow;
1876                 pci_unmap_page(pAC->PciDev, PhysAddr,
1877                                  pTxd->pMBuf->len,
1878                                  PCI_DMA_TODEVICE);
1879
1880                 if (Control & BMU_EOF)
1881                         DEV_KFREE_SKB_ANY(pTxd->pMBuf); /* free message */
1882
1883                 pTxPort->TxdRingFree++;
1884                 pTxd->TBControl &= ~BMU_SW;
1885                 pTxd = pTxd->pNextTxd; /* point behind fragment with EOF */
1886         } /* while(forever) */
1887 } /* FreeTxDescriptors */
1888
1889 /*****************************************************************************
1890  *
1891  *      FillRxRing - fill the receive ring with valid descriptors
1892  *
1893  * Description:
1894  *      This function fills the receive ring descriptors with data
1895  *      segments and makes them valid for the BMU.
1896  *      The active ring is filled completely, if possible.
1897  *      The non-active ring is filled only partial to save memory.
1898  *
1899  * Description of rx ring structure:
1900  *      head - points to the descriptor which will be used next by the BMU
1901  *      tail - points to the next descriptor to give to the BMU
1902  *      
1903  * Returns:     N/A
1904  */
1905 static void FillRxRing(
1906 SK_AC           *pAC,           /* pointer to the adapter context */
1907 RX_PORT         *pRxPort)       /* ptr to port struct for which the ring
1908                                    should be filled */
1909 {
1910 unsigned long   Flags;
1911
1912         spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
1913         while (pRxPort->RxdRingFree > pRxPort->RxFillLimit) {
1914                 if(!FillRxDescriptor(pAC, pRxPort))
1915                         break;
1916         }
1917         spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
1918 } /* FillRxRing */
1919
1920
1921 /*****************************************************************************
1922  *
1923  *      FillRxDescriptor - fill one buffer into the receive ring
1924  *
1925  * Description:
1926  *      The function allocates a new receive buffer and
1927  *      puts it into the next descriptor.
1928  *
1929  * Returns:
1930  *      SK_TRUE - a buffer was added to the ring
1931  *      SK_FALSE - a buffer could not be added
1932  */
1933 static SK_BOOL FillRxDescriptor(
1934 SK_AC           *pAC,           /* pointer to the adapter context struct */
1935 RX_PORT         *pRxPort)       /* ptr to port struct of ring to fill */
1936 {
1937 struct sk_buff  *pMsgBlock;     /* pointer to a new message block */
1938 RXD             *pRxd;          /* the rxd to fill */
1939 SK_U16          Length;         /* data fragment length */
1940 SK_U64          PhysAddr;       /* physical address of a rx buffer */
1941
1942         pMsgBlock = alloc_skb(pAC->RxBufSize, GFP_ATOMIC);
1943         if (pMsgBlock == NULL) {
1944                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1945                         SK_DBGCAT_DRV_ENTRY,
1946                         ("%s: Allocation of rx buffer failed !\n",
1947                         pAC->dev[pRxPort->PortIndex]->name));
1948                 SK_PNMI_CNT_NO_RX_BUF(pAC, pRxPort->PortIndex);
1949                 return(SK_FALSE);
1950         }
1951         skb_reserve(pMsgBlock, 2); /* to align IP frames */
1952         /* skb allocated ok, so add buffer */
1953         pRxd = pRxPort->pRxdRingTail;
1954         pRxPort->pRxdRingTail = pRxd->pNextRxd;
1955         pRxPort->RxdRingFree--;
1956         Length = pAC->RxBufSize;
1957         PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
1958                 virt_to_page(pMsgBlock->data),
1959                 ((unsigned long) pMsgBlock->data &
1960                 ~PAGE_MASK),
1961                 pAC->RxBufSize - 2,
1962                 PCI_DMA_FROMDEVICE);
1963
1964         pRxd->VDataLow  = (SK_U32) (PhysAddr & 0xffffffff);
1965         pRxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
1966         pRxd->pMBuf     = pMsgBlock;
1967         pRxd->RBControl = BMU_OWN       | 
1968                           BMU_STF       | 
1969                           BMU_IRQ_EOF   | 
1970                           BMU_TCP_CHECK | 
1971                           Length;
1972         return (SK_TRUE);
1973
1974 } /* FillRxDescriptor */
1975
1976
1977 /*****************************************************************************
1978  *
1979  *      ReQueueRxBuffer - fill one buffer back into the receive ring
1980  *
1981  * Description:
1982  *      Fill a given buffer back into the rx ring. The buffer
1983  *      has been previously allocated and aligned, and its phys.
1984  *      address calculated, so this is no more necessary.
1985  *
1986  * Returns: N/A
1987  */
1988 static void ReQueueRxBuffer(
1989 SK_AC           *pAC,           /* pointer to the adapter context struct */
1990 RX_PORT         *pRxPort,       /* ptr to port struct of ring to fill */
1991 struct sk_buff  *pMsg,          /* pointer to the buffer */
1992 SK_U32          PhysHigh,       /* phys address high dword */
1993 SK_U32          PhysLow)        /* phys address low dword */
1994 {
1995 RXD             *pRxd;          /* the rxd to fill */
1996 SK_U16          Length;         /* data fragment length */
1997
1998         pRxd = pRxPort->pRxdRingTail;
1999         pRxPort->pRxdRingTail = pRxd->pNextRxd;
2000         pRxPort->RxdRingFree--;
2001         Length = pAC->RxBufSize;
2002
2003         pRxd->VDataLow  = PhysLow;
2004         pRxd->VDataHigh = PhysHigh;
2005         pRxd->pMBuf     = pMsg;
2006         pRxd->RBControl = BMU_OWN       | 
2007                           BMU_STF       |
2008                           BMU_IRQ_EOF   | 
2009                           BMU_TCP_CHECK | 
2010                           Length;
2011         return;
2012 } /* ReQueueRxBuffer */
2013
2014 /*****************************************************************************
2015  *
2016  *      ReceiveIrq - handle a receive IRQ
2017  *
2018  * Description:
2019  *      This function is called when a receive IRQ is set.
2020  *      It walks the receive descriptor ring and sends up all
2021  *      frames that are complete.
2022  *
2023  * Returns:     N/A
2024  */
2025 static void ReceiveIrq(
2026         SK_AC           *pAC,                   /* pointer to adapter context */
2027         RX_PORT         *pRxPort,               /* pointer to receive port struct */
2028         SK_BOOL         SlowPathLock)   /* indicates if SlowPathLock is needed */
2029 {
2030 RXD                             *pRxd;                  /* pointer to receive descriptors */
2031 SK_U32                  Control;                /* control field of descriptor */
2032 struct sk_buff  *pMsg;                  /* pointer to message holding frame */
2033 struct sk_buff  *pNewMsg;               /* pointer to a new message for copying frame */
2034 int                             FrameLength;    /* total length of received frame */
2035 int                             IpFrameLength;
2036 SK_MBUF                 *pRlmtMbuf;             /* ptr to a buffer for giving a frame to rlmt */
2037 SK_EVPARA               EvPara;                 /* an event parameter union */  
2038 unsigned long   Flags;                  /* for spin lock */
2039 int                             PortIndex = pRxPort->PortIndex;
2040 unsigned int    Offset;
2041 unsigned int    NumBytes;
2042 unsigned int    ForRlmt;
2043 SK_BOOL                 IsBc;
2044 SK_BOOL                 IsMc;
2045 SK_BOOL  IsBadFrame;                    /* Bad frame */
2046
2047 SK_U32                  FrameStat;
2048 unsigned short  Csum1;
2049 unsigned short  Csum2;
2050 unsigned short  Type;
2051 int                             Result;
2052 SK_U64                  PhysAddr;
2053
2054 rx_start:       
2055         /* do forever; exit if BMU_OWN found */
2056         for ( pRxd = pRxPort->pRxdRingHead ;
2057                   pRxPort->RxdRingFree < pAC->RxDescrPerRing ;
2058                   pRxd = pRxd->pNextRxd,
2059                   pRxPort->pRxdRingHead = pRxd,
2060                   pRxPort->RxdRingFree ++) {
2061
2062                 /*
2063                  * For a better understanding of this loop
2064                  * Go through every descriptor beginning at the head
2065                  * Please note: the ring might be completely received so the OWN bit
2066                  * set is not a good crirteria to leave that loop.
2067                  * Therefore the RingFree counter is used.
2068                  * On entry of this loop pRxd is a pointer to the Rxd that needs
2069                  * to be checked next.
2070                  */
2071
2072                 Control = pRxd->RBControl;
2073         
2074                 /* check if this descriptor is ready */
2075                 if ((Control & BMU_OWN) != 0) {
2076                         /* this descriptor is not yet ready */
2077                         /* This is the usual end of the loop */
2078                         /* We don't need to start the ring again */
2079                         FillRxRing(pAC, pRxPort);
2080                         return;
2081                 }
2082                 pAC->DynIrqModInfo.NbrProcessedDescr++;
2083
2084                 /* get length of frame and check it */
2085                 FrameLength = Control & BMU_BBC;
2086                 if (FrameLength > pAC->RxBufSize) {
2087                         goto rx_failed;
2088                 }
2089
2090                 /* check for STF and EOF */
2091                 if ((Control & (BMU_STF | BMU_EOF)) != (BMU_STF | BMU_EOF)) {
2092                         goto rx_failed;
2093                 }
2094
2095                 /* here we have a complete frame in the ring */
2096                 pMsg = pRxd->pMBuf;
2097
2098                 FrameStat = pRxd->FrameStat;
2099
2100                 /* check for frame length mismatch */
2101 #define XMR_FS_LEN_SHIFT        18
2102 #define GMR_FS_LEN_SHIFT        16
2103                 if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
2104                         if (FrameLength != (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)) {
2105                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2106                                         SK_DBGCAT_DRV_RX_PROGRESS,
2107                                         ("skge: Frame length mismatch (%u/%u).\n",
2108                                         FrameLength,
2109                                         (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
2110                                 goto rx_failed;
2111                         }
2112                 }
2113                 else {
2114                         if (FrameLength != (SK_U32) (FrameStat >> GMR_FS_LEN_SHIFT)) {
2115                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2116                                         SK_DBGCAT_DRV_RX_PROGRESS,
2117                                         ("skge: Frame length mismatch (%u/%u).\n",
2118                                         FrameLength,
2119                                         (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
2120                                 goto rx_failed;
2121                         }
2122                 }
2123
2124                 /* Set Rx Status */
2125                 if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
2126                         IsBc = (FrameStat & XMR_FS_BC) != 0;
2127                         IsMc = (FrameStat & XMR_FS_MC) != 0;
2128                         IsBadFrame = (FrameStat &
2129                                 (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0;
2130                 } else {
2131                         IsBc = (FrameStat & GMR_FS_BC) != 0;
2132                         IsMc = (FrameStat & GMR_FS_MC) != 0;
2133                         IsBadFrame = (((FrameStat & GMR_FS_ANY_ERR) != 0) ||
2134                                                         ((FrameStat & GMR_FS_RX_OK) == 0));
2135                 }
2136
2137                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
2138                         ("Received frame of length %d on port %d\n",
2139                         FrameLength, PortIndex));
2140                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
2141                         ("Number of free rx descriptors: %d\n",
2142                         pRxPort->RxdRingFree));
2143 /* DumpMsg(pMsg, "Rx"); */
2144
2145                 if ((Control & BMU_STAT_VAL) != BMU_STAT_VAL || (IsBadFrame)) {
2146 #if 0
2147                         (FrameStat & (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0) {
2148 #endif
2149                         /* there is a receive error in this frame */
2150                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2151                                 SK_DBGCAT_DRV_RX_PROGRESS,
2152                                 ("skge: Error in received frame, dropped!\n"
2153                                 "Control: %x\nRxStat: %x\n",
2154                                 Control, FrameStat));
2155
2156                         ReQueueRxBuffer(pAC, pRxPort, pMsg,
2157                                 pRxd->VDataHigh, pRxd->VDataLow);
2158
2159                         continue;
2160                 }
2161
2162                 /*
2163                  * if short frame then copy data to reduce memory waste
2164                  */
2165                 if ((FrameLength < SK_COPY_THRESHOLD) &&
2166                         ((pNewMsg = alloc_skb(FrameLength+2, GFP_ATOMIC)) != NULL)) {
2167                         /*
2168                          * Short frame detected and allocation successfull
2169                          */
2170                         /* use new skb and copy data */
2171                         skb_reserve(pNewMsg, 2);
2172                         skb_put(pNewMsg, FrameLength);
2173                         PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2174                         PhysAddr |= (SK_U64) pRxd->VDataLow;
2175
2176                         pci_dma_sync_single_for_cpu(pAC->PciDev,
2177                                                     (dma_addr_t) PhysAddr,
2178                                                     FrameLength,
2179                                                     PCI_DMA_FROMDEVICE);
2180                         eth_copy_and_sum(pNewMsg, pMsg->data,
2181                                 FrameLength, 0);
2182                         pci_dma_sync_single_for_device(pAC->PciDev,
2183                                                        (dma_addr_t) PhysAddr,
2184                                                        FrameLength,
2185                                                        PCI_DMA_FROMDEVICE);
2186                         ReQueueRxBuffer(pAC, pRxPort, pMsg,
2187                                 pRxd->VDataHigh, pRxd->VDataLow);
2188
2189                         pMsg = pNewMsg;
2190
2191                 }
2192                 else {
2193                         /*
2194                          * if large frame, or SKB allocation failed, pass
2195                          * the SKB directly to the networking
2196                          */
2197
2198                         PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2199                         PhysAddr |= (SK_U64) pRxd->VDataLow;
2200
2201                         /* release the DMA mapping */
2202                         pci_unmap_single(pAC->PciDev,
2203                                          PhysAddr,
2204                                          pAC->RxBufSize - 2,
2205                                          PCI_DMA_FROMDEVICE);
2206
2207                         /* set length in message */
2208                         skb_put(pMsg, FrameLength);
2209                         /* hardware checksum */
2210                         Type = ntohs(*((short*)&pMsg->data[12]));
2211
2212 #ifdef USE_SK_RX_CHECKSUM
2213                         if (Type == 0x800) {
2214                                 Csum1=le16_to_cpu(pRxd->TcpSums & 0xffff);
2215                                 Csum2=le16_to_cpu((pRxd->TcpSums >> 16) & 0xffff);
2216                                 IpFrameLength = (int) ntohs((unsigned short)
2217                                                                 ((unsigned short *) pMsg->data)[8]);
2218
2219                                 /*
2220                                  * Test: If frame is padded, a check is not possible!
2221                                  * Frame not padded? Length difference must be 14 (0xe)!
2222                                  */
2223                                 if ((FrameLength - IpFrameLength) != 0xe) {
2224                                 /* Frame padded => TCP offload not possible! */
2225                                         pMsg->ip_summed = CHECKSUM_NONE;
2226                                 } else {
2227                                 /* Frame not padded => TCP offload! */
2228                                         if ((((Csum1 & 0xfffe) && (Csum2 & 0xfffe)) &&
2229                                                 (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) ||
2230                                                 (pAC->ChipsetType)) {
2231                                                 Result = SkCsGetReceiveInfo(pAC,
2232                                                         &pMsg->data[14],
2233                                                         Csum1, Csum2, pRxPort->PortIndex);
2234                                                 if (Result ==
2235                                                         SKCS_STATUS_IP_FRAGMENT ||
2236                                                         Result ==
2237                                                         SKCS_STATUS_IP_CSUM_OK ||
2238                                                         Result ==
2239                                                         SKCS_STATUS_TCP_CSUM_OK ||
2240                                                         Result ==
2241                                                         SKCS_STATUS_UDP_CSUM_OK) {
2242                                                                 pMsg->ip_summed =
2243                                                                 CHECKSUM_UNNECESSARY;
2244                                                 }
2245                                                 else if (Result ==
2246                                                         SKCS_STATUS_TCP_CSUM_ERROR ||
2247                                                         Result ==
2248                                                         SKCS_STATUS_UDP_CSUM_ERROR ||
2249                                                         Result ==
2250                                                         SKCS_STATUS_IP_CSUM_ERROR_UDP ||
2251                                                         Result ==
2252                                                         SKCS_STATUS_IP_CSUM_ERROR_TCP ||
2253                                                         Result ==
2254                                                         SKCS_STATUS_IP_CSUM_ERROR ) {
2255                                                         /* HW Checksum error */
2256                                                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2257                                                         SK_DBGCAT_DRV_RX_PROGRESS,
2258                                                         ("skge: CRC error. Frame dropped!\n"));
2259                                                         goto rx_failed;
2260                                                 } else {
2261                                                                 pMsg->ip_summed =
2262                                                                 CHECKSUM_NONE;
2263                                                 }
2264                                         }/* checksumControl calculation valid */
2265                                 } /* Frame length check */
2266                         } /* IP frame */
2267 #else
2268                         pMsg->ip_summed = CHECKSUM_NONE;        
2269 #endif
2270                 } /* frame > SK_COPY_TRESHOLD */
2271                 
2272                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("V"));
2273                 ForRlmt = SK_RLMT_RX_PROTOCOL;
2274 #if 0
2275                 IsBc = (FrameStat & XMR_FS_BC)==XMR_FS_BC;
2276 #endif
2277                 SK_RLMT_PRE_LOOKAHEAD(pAC, PortIndex, FrameLength,
2278                         IsBc, &Offset, &NumBytes);
2279                 if (NumBytes != 0) {
2280 #if 0
2281                         IsMc = (FrameStat & XMR_FS_MC)==XMR_FS_MC;
2282 #endif
2283                         SK_RLMT_LOOKAHEAD(pAC, PortIndex,
2284                                 &pMsg->data[Offset],
2285                                 IsBc, IsMc, &ForRlmt);
2286                 }
2287                 if (ForRlmt == SK_RLMT_RX_PROTOCOL) {
2288                                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("W"));
2289                         /* send up only frames from active port */
2290                         if ((PortIndex == pAC->ActivePort) ||
2291                                 (pAC->RlmtNets == 2)) {
2292                                 /* frame for upper layer */
2293                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("U"));
2294 #ifdef xDEBUG
2295                                 DumpMsg(pMsg, "Rx");
2296 #endif
2297                                 SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,
2298                                         FrameLength, pRxPort->PortIndex);
2299
2300                                 pMsg->dev = pAC->dev[pRxPort->PortIndex];
2301                                 pMsg->protocol = eth_type_trans(pMsg,
2302                                         pAC->dev[pRxPort->PortIndex]);
2303                                 netif_rx(pMsg);
2304                                 pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
2305                         }
2306                         else {
2307                                 /* drop frame */
2308                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2309                                         SK_DBGCAT_DRV_RX_PROGRESS,
2310                                         ("D"));
2311                                 DEV_KFREE_SKB(pMsg);
2312                         }
2313                         
2314                 } /* if not for rlmt */
2315                 else {
2316                         /* packet for rlmt */
2317                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2318                                 SK_DBGCAT_DRV_RX_PROGRESS, ("R"));
2319                         pRlmtMbuf = SkDrvAllocRlmtMbuf(pAC,
2320                                 pAC->IoBase, FrameLength);
2321                         if (pRlmtMbuf != NULL) {
2322                                 pRlmtMbuf->pNext = NULL;
2323                                 pRlmtMbuf->Length = FrameLength;
2324                                 pRlmtMbuf->PortIdx = PortIndex;
2325                                 EvPara.pParaPtr = pRlmtMbuf;
2326                                 memcpy((char*)(pRlmtMbuf->pData),
2327                                            (char*)(pMsg->data),
2328                                            FrameLength);
2329
2330                                 /* SlowPathLock needed? */
2331                                 if (SlowPathLock == SK_TRUE) {
2332                                         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2333                                         SkEventQueue(pAC, SKGE_RLMT,
2334                                                 SK_RLMT_PACKET_RECEIVED,
2335                                                 EvPara);
2336                                         pAC->CheckQueue = SK_TRUE;
2337                                         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2338                                 } else {
2339                                         SkEventQueue(pAC, SKGE_RLMT,
2340                                                 SK_RLMT_PACKET_RECEIVED,
2341                                                 EvPara);
2342                                         pAC->CheckQueue = SK_TRUE;
2343                                 }
2344
2345                                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2346                                         SK_DBGCAT_DRV_RX_PROGRESS,
2347                                         ("Q"));
2348                         }
2349                         if ((pAC->dev[pRxPort->PortIndex]->flags &
2350                                 (IFF_PROMISC | IFF_ALLMULTI)) != 0 ||
2351                                 (ForRlmt & SK_RLMT_RX_PROTOCOL) ==
2352                                 SK_RLMT_RX_PROTOCOL) {
2353                                 pMsg->dev = pAC->dev[pRxPort->PortIndex];
2354                                 pMsg->protocol = eth_type_trans(pMsg,
2355                                         pAC->dev[pRxPort->PortIndex]);
2356                                 netif_rx(pMsg);
2357                                 pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
2358                         }
2359                         else {
2360                                 DEV_KFREE_SKB(pMsg);
2361                         }
2362
2363                 } /* if packet for rlmt */
2364         } /* for ... scanning the RXD ring */
2365
2366         /* RXD ring is empty -> fill and restart */
2367         FillRxRing(pAC, pRxPort);
2368         /* do not start if called from Close */
2369         if (pAC->BoardLevel > SK_INIT_DATA) {
2370                 ClearAndStartRx(pAC, PortIndex);
2371         }
2372         return;
2373
2374 rx_failed:
2375         /* remove error frame */
2376         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
2377                 ("Schrottdescriptor, length: 0x%x\n", FrameLength));
2378
2379         /* release the DMA mapping */
2380
2381         PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2382         PhysAddr |= (SK_U64) pRxd->VDataLow;
2383         pci_unmap_page(pAC->PciDev,
2384                          PhysAddr,
2385                          pAC->RxBufSize - 2,
2386                          PCI_DMA_FROMDEVICE);
2387         DEV_KFREE_SKB_IRQ(pRxd->pMBuf);
2388         pRxd->pMBuf = NULL;
2389         pRxPort->RxdRingFree++;
2390         pRxPort->pRxdRingHead = pRxd->pNextRxd;
2391         goto rx_start;
2392
2393 } /* ReceiveIrq */
2394
2395
2396 /*****************************************************************************
2397  *
2398  *      ClearAndStartRx - give a start receive command to BMU, clear IRQ
2399  *
2400  * Description:
2401  *      This function sends a start command and a clear interrupt
2402  *      command for one receive queue to the BMU.
2403  *
2404  * Returns: N/A
2405  *      none
2406  */
2407 static void ClearAndStartRx(
2408 SK_AC   *pAC,           /* pointer to the adapter context */
2409 int     PortIndex)      /* index of the receive port (XMAC) */
2410 {
2411         SK_OUT8(pAC->IoBase,
2412                 RxQueueAddr[PortIndex]+Q_CSR,
2413                 CSR_START | CSR_IRQ_CL_F);
2414 } /* ClearAndStartRx */
2415
2416
2417 /*****************************************************************************
2418  *
2419  *      ClearTxIrq - give a clear transmit IRQ command to BMU
2420  *
2421  * Description:
2422  *      This function sends a clear tx IRQ command for one
2423  *      transmit queue to the BMU.
2424  *
2425  * Returns: N/A
2426  */
2427 static void ClearTxIrq(
2428 SK_AC   *pAC,           /* pointer to the adapter context */
2429 int     PortIndex,      /* index of the transmit port (XMAC) */
2430 int     Prio)           /* priority or normal queue */
2431 {
2432         SK_OUT8(pAC->IoBase, 
2433                 TxQueueAddr[PortIndex][Prio]+Q_CSR,
2434                 CSR_IRQ_CL_F);
2435 } /* ClearTxIrq */
2436
2437
2438 /*****************************************************************************
2439  *
2440  *      ClearRxRing - remove all buffers from the receive ring
2441  *
2442  * Description:
2443  *      This function removes all receive buffers from the ring.
2444  *      The receive BMU must be stopped before calling this function.
2445  *
2446  * Returns: N/A
2447  */
2448 static void ClearRxRing(
2449 SK_AC   *pAC,           /* pointer to adapter context */
2450 RX_PORT *pRxPort)       /* pointer to rx port struct */
2451 {
2452 RXD             *pRxd;  /* pointer to the current descriptor */
2453 unsigned long   Flags;
2454 SK_U64          PhysAddr;
2455
2456         if (pRxPort->RxdRingFree == pAC->RxDescrPerRing) {
2457                 return;
2458         }
2459         spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
2460         pRxd = pRxPort->pRxdRingHead;
2461         do {
2462                 if (pRxd->pMBuf != NULL) {
2463
2464                         PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2465                         PhysAddr |= (SK_U64) pRxd->VDataLow;
2466                         pci_unmap_page(pAC->PciDev,
2467                                          PhysAddr,
2468                                          pAC->RxBufSize - 2,
2469                                          PCI_DMA_FROMDEVICE);
2470                         DEV_KFREE_SKB(pRxd->pMBuf);
2471                         pRxd->pMBuf = NULL;
2472                 }
2473                 pRxd->RBControl &= BMU_OWN;
2474                 pRxd = pRxd->pNextRxd;
2475                 pRxPort->RxdRingFree++;
2476         } while (pRxd != pRxPort->pRxdRingTail);
2477         pRxPort->pRxdRingTail = pRxPort->pRxdRingHead;
2478         spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
2479 } /* ClearRxRing */
2480
2481 /*****************************************************************************
2482  *
2483  *      ClearTxRing - remove all buffers from the transmit ring
2484  *
2485  * Description:
2486  *      This function removes all transmit buffers from the ring.
2487  *      The transmit BMU must be stopped before calling this function
2488  *      and transmitting at the upper level must be disabled.
2489  *      The BMU own bit of all descriptors is cleared, the rest is
2490  *      done by calling FreeTxDescriptors.
2491  *
2492  * Returns: N/A
2493  */
2494 static void ClearTxRing(
2495 SK_AC   *pAC,           /* pointer to adapter context */
2496 TX_PORT *pTxPort)       /* pointer to tx prt struct */
2497 {
2498 TXD             *pTxd;          /* pointer to the current descriptor */
2499 int             i;
2500 unsigned long   Flags;
2501
2502         spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
2503         pTxd = pTxPort->pTxdRingHead;
2504         for (i=0; i<pAC->TxDescrPerRing; i++) {
2505                 pTxd->TBControl &= ~BMU_OWN;
2506                 pTxd = pTxd->pNextTxd;
2507         }
2508         FreeTxDescriptors(pAC, pTxPort);
2509         spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
2510 } /* ClearTxRing */
2511
2512 /*****************************************************************************
2513  *
2514  *      SkGeSetMacAddr - Set the hardware MAC address
2515  *
2516  * Description:
2517  *      This function sets the MAC address used by the adapter.
2518  *
2519  * Returns:
2520  *      0, if everything is ok
2521  *      !=0, on error
2522  */
2523 static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p)
2524 {
2525
2526 DEV_NET *pNet = netdev_priv(dev);
2527 SK_AC   *pAC = pNet->pAC;
2528
2529 struct sockaddr *addr = p;
2530 unsigned long   Flags;
2531         
2532         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2533                 ("SkGeSetMacAddr starts now...\n"));
2534         if(netif_running(dev))
2535                 return -EBUSY;
2536
2537         memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2538         
2539         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2540
2541         if (pAC->RlmtNets == 2)
2542                 SkAddrOverride(pAC, pAC->IoBase, pNet->NetNr,
2543                         (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
2544         else
2545                 SkAddrOverride(pAC, pAC->IoBase, pAC->ActivePort,
2546                         (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
2547
2548         
2549         
2550         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2551         return 0;
2552 } /* SkGeSetMacAddr */
2553
2554
2555 /*****************************************************************************
2556  *
2557  *      SkGeSetRxMode - set receive mode
2558  *
2559  * Description:
2560  *      This function sets the receive mode of an adapter. The adapter
2561  *      supports promiscuous mode, allmulticast mode and a number of
2562  *      multicast addresses. If more multicast addresses the available
2563  *      are selected, a hash function in the hardware is used.
2564  *
2565  * Returns:
2566  *      0, if everything is ok
2567  *      !=0, on error
2568  */
2569 static void SkGeSetRxMode(struct SK_NET_DEVICE *dev)
2570 {
2571
2572 DEV_NET         *pNet;
2573 SK_AC           *pAC;
2574
2575 struct dev_mc_list      *pMcList;
2576 int                     i;
2577 int                     PortIdx;
2578 unsigned long           Flags;
2579
2580         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2581                 ("SkGeSetRxMode starts now... "));
2582
2583         pNet = netdev_priv(dev);
2584         pAC = pNet->pAC;
2585         if (pAC->RlmtNets == 1)
2586                 PortIdx = pAC->ActivePort;
2587         else
2588                 PortIdx = pNet->NetNr;
2589
2590         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2591         if (dev->flags & IFF_PROMISC) {
2592                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2593                         ("PROMISCUOUS mode\n"));
2594                 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
2595                         SK_PROM_MODE_LLC);
2596         } else if (dev->flags & IFF_ALLMULTI) {
2597                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2598                         ("ALLMULTI mode\n"));
2599                 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
2600                         SK_PROM_MODE_ALL_MC);
2601         } else {
2602                 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
2603                         SK_PROM_MODE_NONE);
2604                 SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
2605
2606                 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2607                         ("Number of MC entries: %d ", dev->mc_count));
2608                 
2609                 pMcList = dev->mc_list;
2610                 for (i=0; i<dev->mc_count; i++, pMcList = pMcList->next) {
2611                         SkAddrMcAdd(pAC, pAC->IoBase, PortIdx,
2612                                 (SK_MAC_ADDR*)pMcList->dmi_addr, 0);
2613                         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MCA,
2614                                 ("%02x:%02x:%02x:%02x:%02x:%02x\n",
2615                                 pMcList->dmi_addr[0],
2616                                 pMcList->dmi_addr[1],
2617                                 pMcList->dmi_addr[2],
2618                                 pMcList->dmi_addr[3],
2619                                 pMcList->dmi_addr[4],
2620                                 pMcList->dmi_addr[5]));
2621                 }
2622                 SkAddrMcUpdate(pAC, pAC->IoBase, PortIdx);
2623         }
2624         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2625         
2626         return;
2627 } /* SkGeSetRxMode */
2628
2629
2630 /*****************************************************************************
2631  *
2632  *      SkGeChangeMtu - set the MTU to another value
2633  *
2634  * Description:
2635  *      This function sets is called whenever the MTU size is changed
2636  *      (ifconfig mtu xxx dev ethX). If the MTU is bigger than standard
2637  *      ethernet MTU size, long frame support is activated.
2638  *
2639  * Returns:
2640  *      0, if everything is ok
2641  *      !=0, on error
2642  */
2643 static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int NewMtu)
2644 {
2645 DEV_NET         *pNet;
2646 DEV_NET         *pOtherNet;
2647 SK_AC           *pAC;
2648 unsigned long   Flags;
2649 int             i;
2650 SK_EVPARA       EvPara;
2651
2652         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2653                 ("SkGeChangeMtu starts now...\n"));
2654
2655         pNet = netdev_priv(dev);
2656         pAC  = pNet->pAC;
2657
2658         if ((NewMtu < 68) || (NewMtu > SK_JUMBO_MTU)) {
2659                 return -EINVAL;
2660         }
2661
2662         if(pAC->BoardLevel != SK_INIT_RUN) {
2663                 return -EINVAL;
2664         }
2665
2666 #ifdef SK_DIAG_SUPPORT
2667         if (pAC->DiagModeActive == DIAG_ACTIVE) {
2668                 if (pAC->DiagFlowCtrl == SK_FALSE) {
2669                         return -1; /* still in use, deny any actions of MTU */
2670                 } else {
2671                         pAC->DiagFlowCtrl = SK_FALSE;
2672                 }
2673         }
2674 #endif
2675
2676         pNet->Mtu = NewMtu;
2677         pOtherNet = netdev_priv(pAC->dev[1 - pNet->NetNr]);
2678         if ((pOtherNet->Mtu>1500) && (NewMtu<=1500) && (pOtherNet->Up==1)) {
2679                 return(0);
2680         }
2681
2682         pAC->RxBufSize = NewMtu + 32;
2683         dev->mtu = NewMtu;
2684
2685         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2686                 ("New MTU: %d\n", NewMtu));
2687
2688         /* 
2689         ** Prevent any reconfiguration while changing the MTU 
2690         ** by disabling any interrupts 
2691         */
2692         SK_OUT32(pAC->IoBase, B0_IMSK, 0);
2693         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2694
2695         /* 
2696         ** Notify RLMT that any ports are to be stopped
2697         */
2698         EvPara.Para32[0] =  0;
2699         EvPara.Para32[1] = -1;
2700         if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
2701                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
2702                 EvPara.Para32[0] =  1;
2703                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
2704         } else {
2705                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
2706         }
2707
2708         /*
2709         ** After calling the SkEventDispatcher(), RLMT is aware about
2710         ** the stopped ports -> configuration can take place!
2711         */
2712         SkEventDispatcher(pAC, pAC->IoBase);
2713
2714         for (i=0; i<pAC->GIni.GIMacsFound; i++) {
2715                 spin_lock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
2716                 netif_stop_queue(pAC->dev[i]);
2717
2718         }
2719
2720         /*
2721         ** Depending on the desired MTU size change, a different number of 
2722         ** RX buffers need to be allocated
2723         */
2724         if (NewMtu > 1500) {
2725             /* 
2726             ** Use less rx buffers 
2727             */
2728             for (i=0; i<pAC->GIni.GIMacsFound; i++) {
2729                 if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
2730                     pAC->RxPort[i].RxFillLimit =  pAC->RxDescrPerRing -
2731                                                  (pAC->RxDescrPerRing / 4);
2732                 } else {
2733                     if (i == pAC->ActivePort) {
2734                         pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 
2735                                                     (pAC->RxDescrPerRing / 4);
2736                     } else {
2737                         pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 
2738                                                     (pAC->RxDescrPerRing / 10);
2739                     }
2740                 }
2741             }
2742         } else {
2743             /* 
2744             ** Use the normal amount of rx buffers 
2745             */
2746             for (i=0; i<pAC->GIni.GIMacsFound; i++) {
2747                 if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
2748                     pAC->RxPort[i].RxFillLimit = 1;
2749                 } else {
2750                     if (i == pAC->ActivePort) {
2751                         pAC->RxPort[i].RxFillLimit = 1;
2752                     } else {
2753                         pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing -
2754                                                     (pAC->RxDescrPerRing / 4);
2755                     }
2756                 }
2757             }
2758         }
2759         
2760         SkGeDeInit(pAC, pAC->IoBase);
2761
2762         /*
2763         ** enable/disable hardware support for long frames
2764         */
2765         if (NewMtu > 1500) {
2766 // pAC->JumboActivated = SK_TRUE; /* is never set back !!! */
2767                 pAC->GIni.GIPortUsage = SK_JUMBO_LINK;
2768         } else {
2769             if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
2770                 pAC->GIni.GIPortUsage = SK_MUL_LINK;
2771             } else {
2772                 pAC->GIni.GIPortUsage = SK_RED_LINK;
2773             }
2774         }
2775
2776         SkGeInit(   pAC, pAC->IoBase, SK_INIT_IO);
2777         SkI2cInit(  pAC, pAC->IoBase, SK_INIT_IO);
2778         SkEventInit(pAC, pAC->IoBase, SK_INIT_IO);
2779         SkPnmiInit( pAC, pAC->IoBase, SK_INIT_IO);
2780         SkAddrInit( pAC, pAC->IoBase, SK_INIT_IO);
2781         SkRlmtInit( pAC, pAC->IoBase, SK_INIT_IO);
2782         SkTimerInit(pAC, pAC->IoBase, SK_INIT_IO);
2783         
2784         /*
2785         ** tschilling:
2786         ** Speed and others are set back to default in level 1 init!
2787         */
2788         GetConfiguration(pAC);
2789         
2790         SkGeInit(   pAC, pAC->IoBase, SK_INIT_RUN);
2791         SkI2cInit(  pAC, pAC->IoBase, SK_INIT_RUN);
2792         SkEventInit(pAC, pAC->IoBase, SK_INIT_RUN);
2793         SkPnmiInit( pAC, pAC->IoBase, SK_INIT_RUN);
2794         SkAddrInit( pAC, pAC->IoBase, SK_INIT_RUN);
2795         SkRlmtInit( pAC, pAC->IoBase, SK_INIT_RUN);
2796         SkTimerInit(pAC, pAC->IoBase, SK_INIT_RUN);
2797
2798         /*
2799         ** clear and reinit the rx rings here
2800         */
2801         for (i=0; i<pAC->GIni.GIMacsFound; i++) {
2802                 ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
2803                 ClearRxRing(pAC, &pAC->RxPort[i]);
2804                 FillRxRing(pAC, &pAC->RxPort[i]);
2805
2806                 /* 
2807                 ** Enable transmit descriptor polling
2808                 */
2809                 SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
2810                 FillRxRing(pAC, &pAC->RxPort[i]);
2811         };
2812
2813         SkGeYellowLED(pAC, pAC->IoBase, 1);
2814         SkDimEnableModerationIfNeeded(pAC);     
2815         SkDimDisplayModerationSettings(pAC);
2816
2817         netif_start_queue(pAC->dev[pNet->PortNr]);
2818         for (i=pAC->GIni.GIMacsFound-1; i>=0; i--) {
2819                 spin_unlock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
2820         }
2821
2822         /* 
2823         ** Enable Interrupts again 
2824         */
2825         SK_OUT32(pAC->IoBase, B0_IMSK, pAC->GIni.GIValIrqMask);
2826         SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
2827
2828         SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
2829         SkEventDispatcher(pAC, pAC->IoBase);
2830
2831         /* 
2832         ** Notify RLMT about the changing and restarting one (or more) ports
2833         */
2834         if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
2835                 EvPara.Para32[0] = pAC->RlmtNets;
2836                 EvPara.Para32[1] = -1;
2837                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS, EvPara);
2838                 EvPara.Para32[0] = pNet->PortNr;
2839                 EvPara.Para32[1] = -1;
2840                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
2841                         
2842                 if (pOtherNet->Up) {
2843                         EvPara.Para32[0] = pOtherNet->PortNr;
2844                         SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
2845                 }
2846         } else {
2847                 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
2848         }
2849
2850         SkEventDispatcher(pAC, pAC->IoBase);
2851         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2852         
2853         /*
2854         ** While testing this driver with latest kernel 2.5 (2.5.70), it 
2855         ** seems as if upper layers have a problem to handle a successful
2856         ** return value of '0'. If such a zero is returned, the complete 
2857         ** system hangs for several minutes (!), which is in acceptable.
2858         **
2859         ** Currently it is not clear, what the exact reason for this problem
2860         ** is. The implemented workaround for 2.5 is to return the desired 
2861         ** new MTU size if all needed changes for the new MTU size where 
2862         ** performed. In kernels 2.2 and 2.4, a zero value is returned,
2863         ** which indicates the successful change of the mtu-size.
2864         */
2865         return NewMtu;
2866
2867 } /* SkGeChangeMtu */
2868
2869
2870 /*****************************************************************************
2871  *
2872  *      SkGeStats - return ethernet device statistics
2873  *
2874  * Description:
2875  *      This function return statistic data about the ethernet device
2876  *      to the operating system.
2877  *
2878  * Returns:
2879  *      pointer to the statistic structure.
2880  */
2881 static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev)
2882 {
2883 DEV_NET *pNet = netdev_priv(dev);
2884 SK_AC   *pAC = pNet->pAC;
2885 SK_PNMI_STRUCT_DATA *pPnmiStruct;       /* structure for all Pnmi-Data */
2886 SK_PNMI_STAT    *pPnmiStat;             /* pointer to virtual XMAC stat. data */
2887 SK_PNMI_CONF    *pPnmiConf;             /* pointer to virtual link config. */
2888 unsigned int    Size;                   /* size of pnmi struct */
2889 unsigned long   Flags;                  /* for spin lock */
2890
2891         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2892                 ("SkGeStats starts now...\n"));
2893         pPnmiStruct = &pAC->PnmiStruct;
2894
2895 #ifdef SK_DIAG_SUPPORT
2896         if ((pAC->DiagModeActive == DIAG_NOTACTIVE) &&
2897                 (pAC->BoardLevel == SK_INIT_RUN)) {
2898 #endif
2899         SK_MEMSET(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
2900         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2901         Size = SK_PNMI_STRUCT_SIZE;
2902                 SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, pNet->NetNr);
2903         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2904 #ifdef SK_DIAG_SUPPORT
2905         }
2906 #endif
2907
2908         pPnmiStat = &pPnmiStruct->Stat[0];
2909         pPnmiConf = &pPnmiStruct->Conf[0];
2910
2911         pAC->stats.rx_packets = (SK_U32) pPnmiStruct->RxDeliveredCts & 0xFFFFFFFF;
2912         pAC->stats.tx_packets = (SK_U32) pPnmiStat->StatTxOkCts & 0xFFFFFFFF;
2913         pAC->stats.rx_bytes = (SK_U32) pPnmiStruct->RxOctetsDeliveredCts;
2914         pAC->stats.tx_bytes = (SK_U32) pPnmiStat->StatTxOctetsOkCts;
2915         
2916         if (pNet->Mtu <= 1500) {
2917                 pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
2918         } else {
2919                 pAC->stats.rx_errors = (SK_U32) ((pPnmiStruct->InErrorsCts -
2920                         pPnmiStat->StatRxTooLongCts) & 0xFFFFFFFF);
2921         }
2922
2923
2924         if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC && pAC->HWRevision < 12)
2925                 pAC->stats.rx_errors = pAC->stats.rx_errors - pPnmiStat->StatRxShortsCts;
2926
2927         pAC->stats.tx_errors = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
2928         pAC->stats.rx_dropped = (SK_U32) pPnmiStruct->RxNoBufCts & 0xFFFFFFFF;
2929         pAC->stats.tx_dropped = (SK_U32) pPnmiStruct->TxNoBufCts & 0xFFFFFFFF;
2930         pAC->stats.multicast = (SK_U32) pPnmiStat->StatRxMulticastOkCts & 0xFFFFFFFF;
2931         pAC->stats.collisions = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
2932
2933         /* detailed rx_errors: */
2934         pAC->stats.rx_length_errors = (SK_U32) pPnmiStat->StatRxRuntCts & 0xFFFFFFFF;
2935         pAC->stats.rx_over_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
2936         pAC->stats.rx_crc_errors = (SK_U32) pPnmiStat->StatRxFcsCts & 0xFFFFFFFF;
2937         pAC->stats.rx_frame_errors = (SK_U32) pPnmiStat->StatRxFramingCts & 0xFFFFFFFF;
2938         pAC->stats.rx_fifo_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
2939         pAC->stats.rx_missed_errors = (SK_U32) pPnmiStat->StatRxMissedCts & 0xFFFFFFFF;
2940
2941         /* detailed tx_errors */
2942         pAC->stats.tx_aborted_errors = (SK_U32) 0;
2943         pAC->stats.tx_carrier_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
2944         pAC->stats.tx_fifo_errors = (SK_U32) pPnmiStat->StatTxFifoUnderrunCts & 0xFFFFFFFF;
2945         pAC->stats.tx_heartbeat_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
2946         pAC->stats.tx_window_errors = (SK_U32) 0;
2947
2948         return(&pAC->stats);
2949 } /* SkGeStats */
2950
2951
2952 /*****************************************************************************
2953  *
2954  *      SkGeIoctl - IO-control function
2955  *
2956  * Description:
2957  *      This function is called if an ioctl is issued on the device.
2958  *      There are three subfunction for reading, writing and test-writing
2959  *      the private MIB data structure (usefull for SysKonnect-internal tools).
2960  *
2961  * Returns:
2962  *      0, if everything is ok
2963  *      !=0, on error
2964  */
2965 static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd)
2966 {
2967 DEV_NET         *pNet;
2968 SK_AC           *pAC;
2969 void            *pMemBuf;
2970 struct pci_dev  *pdev = NULL;
2971 SK_GE_IOCTL     Ioctl;
2972 unsigned int    Err = 0;
2973 int             Size = 0;
2974 int             Ret = 0;
2975 unsigned int    Length = 0;
2976 int             HeaderLength = sizeof(SK_U32) + sizeof(SK_U32);
2977
2978         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
2979                 ("SkGeIoctl starts now...\n"));
2980
2981         pNet = netdev_priv(dev);
2982         pAC = pNet->pAC;
2983         
2984         if(copy_from_user(&Ioctl, rq->ifr_data, sizeof(SK_GE_IOCTL))) {
2985                 return -EFAULT;
2986         }
2987
2988         switch(cmd) {
2989         case SK_IOCTL_SETMIB:
2990         case SK_IOCTL_PRESETMIB:
2991                 if (!capable(CAP_NET_ADMIN)) return -EPERM;
2992         case SK_IOCTL_GETMIB:
2993                 if(copy_from_user(&pAC->PnmiStruct, Ioctl.pData,
2994                         Ioctl.Len<sizeof(pAC->PnmiStruct)?
2995                         Ioctl.Len : sizeof(pAC->PnmiStruct))) {
2996                         return -EFAULT;
2997                 }
2998                 Size = SkGeIocMib(pNet, Ioctl.Len, cmd);
2999                 if(copy_to_user(Ioctl.pData, &pAC->PnmiStruct,
3000                         Ioctl.Len<Size? Ioctl.Len : Size)) {
3001                         return -EFAULT;
3002                 }
3003                 Ioctl.Len = Size;
3004                 if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
3005                         return -EFAULT;
3006                 }
3007                 break;
3008         case SK_IOCTL_GEN:
3009                 if (Ioctl.Len < (sizeof(pAC->PnmiStruct) + HeaderLength)) {
3010                         Length = Ioctl.Len;
3011                 } else {
3012                         Length = sizeof(pAC->PnmiStruct) + HeaderLength;
3013                 }
3014                 if (NULL == (pMemBuf = kmalloc(Length, GFP_KERNEL))) {
3015                         return -ENOMEM;
3016                 }
3017                 if(copy_from_user(pMemBuf, Ioctl.pData, Length)) {
3018                         Err = -EFAULT;
3019                         goto fault_gen;
3020                 }
3021                 if ((Ret = SkPnmiGenIoctl(pAC, pAC->IoBase, pMemBuf, &Length, 0)) < 0) {
3022                         Err = -EFAULT;
3023                         goto fault_gen;
3024                 }
3025                 if(copy_to_user(Ioctl.pData, pMemBuf, Length) ) {
3026                         Err = -EFAULT;
3027                         goto fault_gen;
3028                 }
3029                 Ioctl.Len = Length;
3030                 if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
3031                         Err = -EFAULT;
3032                         goto fault_gen;
3033                 }
3034 fault_gen:
3035                 kfree(pMemBuf); /* cleanup everything */
3036                 break;
3037 #ifdef SK_DIAG_SUPPORT
3038        case SK_IOCTL_DIAG:
3039                 if (!capable(CAP_NET_ADMIN)) return -EPERM;
3040                 if (Ioctl.Len < (sizeof(pAC->PnmiStruct) + HeaderLength)) {
3041                         Length = Ioctl.Len;
3042                 } else {
3043                         Length = sizeof(pAC->PnmiStruct) + HeaderLength;
3044                 }
3045                 if (NULL == (pMemBuf = kmalloc(Length, GFP_KERNEL))) {
3046                         return -ENOMEM;
3047                 }
3048                 if(copy_from_user(pMemBuf, Ioctl.pData, Length)) {
3049                         Err = -EFAULT;
3050                         goto fault_diag;
3051                 }
3052                 pdev = pAC->PciDev;
3053                 Length = 3 * sizeof(SK_U32);  /* Error, Bus and Device */
3054                 /* 
3055                 ** While coding this new IOCTL interface, only a few lines of code
3056                 ** are to to be added. Therefore no dedicated function has been 
3057                 ** added. If more functionality is added, a separate function 
3058                 ** should be used...
3059                 */
3060                 * ((SK_U32 *)pMemBuf) = 0;
3061                 * ((SK_U32 *)pMemBuf + 1) = pdev->bus->number;
3062                 * ((SK_U32 *)pMemBuf + 2) = ParseDeviceNbrFromSlotName(pci_name(pdev));
3063                 if(copy_to_user(Ioctl.pData, pMemBuf, Length) ) {
3064                         Err = -EFAULT;
3065                         goto fault_diag;
3066                 }
3067                 Ioctl.Len = Length;
3068                 if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
3069                         Err = -EFAULT;
3070                         goto fault_diag;
3071                 }
3072 fault_diag:
3073                 kfree(pMemBuf); /* cleanup everything */
3074                 break;
3075 #endif
3076         default:
3077                 Err = -EOPNOTSUPP;
3078         }
3079
3080         return(Err);
3081
3082 } /* SkGeIoctl */
3083
3084
3085 /*****************************************************************************
3086  *
3087  *      SkGeIocMib - handle a GetMib, SetMib- or PresetMib-ioctl message
3088  *
3089  * Description:
3090  *      This function reads/writes the MIB data using PNMI (Private Network
3091  *      Management Interface).
3092  *      The destination for the data must be provided with the
3093  *      ioctl call and is given to the driver in the form of
3094  *      a user space address.
3095  *      Copying from the user-provided data area into kernel messages
3096  *      and back is done by copy_from_user and copy_to_user calls in
3097  *      SkGeIoctl.
3098  *
3099  * Returns:
3100  *      returned size from PNMI call
3101  */
3102 static int SkGeIocMib(
3103 DEV_NET         *pNet,  /* pointer to the adapter context */
3104 unsigned int    Size,   /* length of ioctl data */
3105 int             mode)   /* flag for set/preset */
3106 {
3107 unsigned long   Flags;  /* for spin lock */
3108 SK_AC           *pAC;
3109
3110         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3111                 ("SkGeIocMib starts now...\n"));
3112         pAC = pNet->pAC;
3113         /* access MIB */
3114         spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3115         switch(mode) {
3116         case SK_IOCTL_GETMIB:
3117                 SkPnmiGetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3118                         pNet->NetNr);
3119                 break;
3120         case SK_IOCTL_PRESETMIB:
3121                 SkPnmiPreSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3122                         pNet->NetNr);
3123                 break;
3124         case SK_IOCTL_SETMIB:
3125                 SkPnmiSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3126                         pNet->NetNr);
3127                 break;
3128         default:
3129                 break;
3130         }
3131         spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
3132         SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3133                 ("MIB data access succeeded\n"));
3134         return (Size);
3135 } /* SkGeIocMib */
3136
3137
3138 /*****************************************************************************
3139  *
3140  *      GetConfiguration - read configuration information
3141  *
3142  * Description:
3143  *      This function reads per-adapter configuration information from
3144  *      the options provided on the command line.
3145  *
3146  * Returns:
3147  *      none
3148  */
3149 static void GetConfiguration(
3150 SK_AC   *pAC)   /* pointer to the adapter context structure */
3151 {
3152 SK_I32  Port;          &n