2 * linux/drivers/message/fusion/mptbase.c
3 * This is the Fusion MPT base driver which supports multiple
4 * (SCSI + LAN) specialized protocol drivers.
5 * For use with LSI Logic PCI chip/adapter(s)
6 * running LSI Logic Fusion MPT (Message Passing Technology) firmware.
8 * Copyright (c) 1999-2005 LSI Logic Corporation
9 * (mailto:mpt_linux_developer@lsil.com)
12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
14 This program is free software; you can redistribute it and/or modify
15 it under the terms of the GNU General Public License as published by
16 the Free Software Foundation; version 2 of the License.
18 This program is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
24 THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
25 CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
26 LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
27 MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
28 solely responsible for determining the appropriateness of using and
29 distributing the Program and assumes all risks associated with its
30 exercise of rights under this Agreement, including but not limited to
31 the risks and costs of program errors, damage to or loss of data,
32 programs or equipment, and unavailability or interruption of operations.
34 DISCLAIMER OF LIABILITY
35 NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
36 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
38 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
39 TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
40 USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
41 HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
43 You should have received a copy of the GNU General Public License
44 along with this program; if not, write to the Free Software
45 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
49 #include <linux/config.h>
50 #include <linux/kernel.h>
51 #include <linux/module.h>
52 #include <linux/errno.h>
53 #include <linux/init.h>
54 #include <linux/slab.h>
55 #include <linux/types.h>
56 #include <linux/pci.h>
57 #include <linux/kdev_t.h>
58 #include <linux/blkdev.h>
59 #include <linux/delay.h>
60 #include <linux/interrupt.h> /* needed for in_interrupt() proto */
61 #include <linux/dma-mapping.h>
67 #include <asm/irq.h> /* needed for __irq_itoa() proto */
72 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
73 #define my_NAME "Fusion MPT base driver"
74 #define my_VERSION MPT_LINUX_VERSION_COMMON
75 #define MYNAM "mptbase"
77 MODULE_AUTHOR(MODULEAUTHOR);
78 MODULE_DESCRIPTION(my_NAME);
79 MODULE_LICENSE("GPL");
84 static int mpt_msi_enable;
85 module_param(mpt_msi_enable, int, 0);
86 MODULE_PARM_DESC(mpt_msi_enable, " MSI Support Enable (default=0)");
89 static int mfcounter = 0;
90 #define PRINT_MF_COUNT 20000
93 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
97 int mpt_lan_index = -1;
98 int mpt_stm_index = -1;
100 struct proc_dir_entry *mpt_proc_root_dir;
102 #define WHOINIT_UNKNOWN 0xAA
104 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
108 /* Adapter link list */
110 /* Callback lookup table */
111 static MPT_CALLBACK MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
112 /* Protocol driver class lookup table */
113 static int MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
114 /* Event handler lookup table */
115 static MPT_EVHANDLER MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
116 /* Reset handler lookup table */
117 static MPT_RESETHANDLER MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
118 static struct mpt_pci_driver *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
120 static int mpt_base_index = -1;
121 static int last_drv_idx = -1;
123 static DECLARE_WAIT_QUEUE_HEAD(mpt_waitq);
125 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
129 static irqreturn_t mpt_interrupt(int irq, void *bus_id, struct pt_regs *r);
130 static int mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply);
131 static int mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
132 u32 *req, int replyBytes, u16 *u16reply, int maxwait,
134 static int mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
135 static void mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
136 static void mpt_adapter_disable(MPT_ADAPTER *ioc);
137 static void mpt_adapter_dispose(MPT_ADAPTER *ioc);
139 static void MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
140 static int MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
141 static int GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
142 static int GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
143 static int SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
144 static int SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
145 static int mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
146 static int mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
147 static int mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
148 static int KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
149 static int SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
150 static int PrimeIocFifos(MPT_ADAPTER *ioc);
151 static int WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
152 static int WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
153 static int WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
154 static int GetLanConfigPages(MPT_ADAPTER *ioc);
155 static int GetIoUnitPage2(MPT_ADAPTER *ioc);
156 int mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
157 static int mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
158 static int mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
159 static void mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
160 static void mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
161 static void mpt_timer_expired(unsigned long data);
162 static int SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch);
163 static int SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
164 static int mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
165 static int mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
167 #ifdef CONFIG_PROC_FS
168 static int procmpt_summary_read(char *buf, char **start, off_t offset,
169 int request, int *eof, void *data);
170 static int procmpt_version_read(char *buf, char **start, off_t offset,
171 int request, int *eof, void *data);
172 static int procmpt_iocinfo_read(char *buf, char **start, off_t offset,
173 int request, int *eof, void *data);
175 static void mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
177 //int mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag);
178 static int ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply, int *evHandlers);
179 static void mpt_sp_ioc_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
180 static void mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
181 static void mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
182 static void mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info);
184 /* module entry point */
185 static int __init fusion_init (void);
186 static void __exit fusion_exit (void);
188 #define CHIPREG_READ32(addr) readl_relaxed(addr)
189 #define CHIPREG_READ32_dmasync(addr) readl(addr)
190 #define CHIPREG_WRITE32(addr,val) writel(val, addr)
191 #define CHIPREG_PIO_WRITE32(addr,val) outl(val, (unsigned long)addr)
192 #define CHIPREG_PIO_READ32(addr) inl((unsigned long)addr)
195 pci_disable_io_access(struct pci_dev *pdev)
199 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
201 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
205 pci_enable_io_access(struct pci_dev *pdev)
209 pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
211 pci_write_config_word(pdev, PCI_COMMAND, command_reg);
215 * Process turbo (context) reply...
218 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
220 MPT_FRAME_HDR *mf = NULL;
221 MPT_FRAME_HDR *mr = NULL;
225 dmfprintk((MYIOC_s_INFO_FMT "Got TURBO reply req_idx=%08x\n",
228 switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
229 case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
230 req_idx = pa & 0x0000FFFF;
231 cb_idx = (pa & 0x00FF0000) >> 16;
232 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
234 case MPI_CONTEXT_REPLY_TYPE_LAN:
235 cb_idx = mpt_lan_index;
237 * Blind set of mf to NULL here was fatal
238 * after lan_reply says "freeme"
239 * Fix sort of combined with an optimization here;
240 * added explicit check for case where lan_reply
241 * was just returning 1 and doing nothing else.
242 * For this case skip the callback, but set up
243 * proper mf value first here:-)
245 if ((pa & 0x58000000) == 0x58000000) {
246 req_idx = pa & 0x0000FFFF;
247 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
248 mpt_free_msg_frame(ioc, mf);
253 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
255 case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
256 cb_idx = mpt_stm_index;
257 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
264 /* Check for (valid) IO callback! */
265 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
266 MptCallbacks[cb_idx] == NULL) {
267 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
268 __FUNCTION__, ioc->name, cb_idx);
272 if (MptCallbacks[cb_idx](ioc, mf, mr))
273 mpt_free_msg_frame(ioc, mf);
279 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
290 /* non-TURBO reply! Hmmm, something may be up...
291 * Newest turbo reply mechanism; get address
292 * via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
295 /* Map DMA address of reply header to cpu address.
296 * pa is 32 bits - but the dma address may be 32 or 64 bits
297 * get offset based only only the low addresses
300 reply_dma_low = (pa <<= 1);
301 mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
302 (reply_dma_low - ioc->reply_frames_low_dma));
304 req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
305 cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
306 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
308 dmfprintk((MYIOC_s_INFO_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
309 ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
310 DBG_DUMP_REPLY_FRAME(mr)
312 /* Check/log IOC log info
314 ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
315 if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
316 u32 log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
317 if (ioc->bus_type == FC)
318 mpt_fc_log_info(ioc, log_info);
319 else if (ioc->bus_type == SPI)
320 mpt_spi_log_info(ioc, log_info);
321 else if (ioc->bus_type == SAS)
322 mpt_sas_log_info(ioc, log_info);
324 if (ioc_stat & MPI_IOCSTATUS_MASK) {
325 if (ioc->bus_type == SPI &&
326 cb_idx != mpt_stm_index &&
327 cb_idx != mpt_lan_index)
328 mpt_sp_ioc_info(ioc, (u32)ioc_stat, mf);
332 /* Check for (valid) IO callback! */
333 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
334 MptCallbacks[cb_idx] == NULL) {
335 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
336 __FUNCTION__, ioc->name, cb_idx);
341 freeme = MptCallbacks[cb_idx](ioc, mf, mr);
344 /* Flush (non-TURBO) reply with a WRITE! */
345 CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
348 mpt_free_msg_frame(ioc, mf);
352 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
354 * mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
355 * @irq: irq number (not used)
356 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
357 * @r: pt_regs pointer (not used)
359 * This routine is registered via the request_irq() kernel API call,
360 * and handles all interrupts generated from a specific MPT adapter
361 * (also referred to as a IO Controller or IOC).
362 * This routine must clear the interrupt from the adapter and does
363 * so by reading the reply FIFO. Multiple replies may be processed
364 * per single call to this routine.
366 * This routine handles register-level access of the adapter but
367 * dispatches (calls) a protocol-specific callback routine to handle
368 * the protocol-specific details of the MPT request completion.
371 mpt_interrupt(int irq, void *bus_id, struct pt_regs *r)
373 MPT_ADAPTER *ioc = bus_id;
377 * Drain the reply FIFO!
380 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
381 if (pa == 0xFFFFFFFF)
383 else if (pa & MPI_ADDRESS_REPLY_A_BIT)
386 mpt_turbo_reply(ioc, pa);
392 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
394 * mpt_base_reply - MPT base driver's callback routine; all base driver
395 * "internal" request/reply processing is routed here.
396 * Currently used for EventNotification and EventAck handling.
397 * @ioc: Pointer to MPT_ADAPTER structure
398 * @mf: Pointer to original MPT request frame
399 * @reply: Pointer to MPT reply frame (NULL if TurboReply)
401 * Returns 1 indicating original alloc'd request frame ptr
402 * should be freed, or 0 if it shouldn't.
405 mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply)
410 dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply() called\n", ioc->name));
412 #if defined(MPT_DEBUG_MSG_FRAME)
413 if (!(reply->u.hdr.MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)) {
414 dmfprintk((KERN_INFO MYNAM ": Original request frame (@%p) header\n", mf));
415 DBG_DUMP_REQUEST_FRAME_HDR(mf)
419 func = reply->u.hdr.Function;
420 dmfprintk((MYIOC_s_INFO_FMT "mpt_base_reply, Function=%02Xh\n",
423 if (func == MPI_FUNCTION_EVENT_NOTIFICATION) {
424 EventNotificationReply_t *pEvReply = (EventNotificationReply_t *) reply;
428 results = ProcessEventNotification(ioc, pEvReply, &evHandlers);
429 if (results != evHandlers) {
430 /* CHECKME! Any special handling needed here? */
431 devtprintk((MYIOC_s_WARN_FMT "Called %d event handlers, sum results = %d\n",
432 ioc->name, evHandlers, results));
436 * Hmmm... It seems that EventNotificationReply is an exception
437 * to the rule of one reply per request.
439 if (pEvReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) {
441 devtprintk((MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p does not return Request frame\n",
442 ioc->name, pEvReply));
444 devtprintk((MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p returns Request frame\n",
445 ioc->name, pEvReply));
448 #ifdef CONFIG_PROC_FS
449 // LogEvent(ioc, pEvReply);
452 } else if (func == MPI_FUNCTION_EVENT_ACK) {
453 dprintk((MYIOC_s_INFO_FMT "mpt_base_reply, EventAck reply received\n",
455 } else if (func == MPI_FUNCTION_CONFIG) {
459 dcprintk((MYIOC_s_INFO_FMT "config_complete (mf=%p,mr=%p)\n",
460 ioc->name, mf, reply));
462 pCfg = * ((CONFIGPARMS **)((u8 *) mf + ioc->req_sz - sizeof(void *)));
465 /* disable timer and remove from linked list */
466 del_timer(&pCfg->timer);
468 spin_lock_irqsave(&ioc->FreeQlock, flags);
469 list_del(&pCfg->linkage);
470 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
473 * If IOC Status is SUCCESS, save the header
474 * and set the status code to GOOD.
476 pCfg->status = MPT_CONFIG_ERROR;
478 ConfigReply_t *pReply = (ConfigReply_t *)reply;
481 status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
482 dcprintk((KERN_NOTICE " IOCStatus=%04xh, IOCLogInfo=%08xh\n",
483 status, le32_to_cpu(pReply->IOCLogInfo)));
485 pCfg->status = status;
486 if (status == MPI_IOCSTATUS_SUCCESS) {
487 if ((pReply->Header.PageType &
488 MPI_CONFIG_PAGETYPE_MASK) ==
489 MPI_CONFIG_PAGETYPE_EXTENDED) {
490 pCfg->cfghdr.ehdr->ExtPageLength =
491 le16_to_cpu(pReply->ExtPageLength);
492 pCfg->cfghdr.ehdr->ExtPageType =
495 pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
497 /* If this is a regular header, save PageLength. */
498 /* LMP Do this better so not using a reserved field! */
499 pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
500 pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
501 pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
506 * Wake up the original calling thread
511 } else if (func == MPI_FUNCTION_SAS_IO_UNIT_CONTROL) {
512 /* we should be always getting a reply frame */
513 memcpy(ioc->persist_reply_frame, reply,
514 min(MPT_DEFAULT_FRAME_SIZE,
515 4*reply->u.reply.MsgLength));
516 del_timer(&ioc->persist_timer);
517 ioc->persist_wait_done = 1;
520 printk(MYIOC_s_ERR_FMT "Unexpected msg function (=%02Xh) reply received!\n",
525 * Conditionally tell caller to free the original
526 * EventNotification/EventAck/unexpected request frame!
531 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
533 * mpt_register - Register protocol-specific main callback handler.
534 * @cbfunc: callback function pointer
535 * @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
537 * This routine is called by a protocol-specific driver (SCSI host,
538 * LAN, SCSI target) to register it's reply callback routine. Each
539 * protocol-specific driver must do this before it will be able to
540 * use any IOC resources, such as obtaining request frames.
542 * NOTES: The SCSI protocol driver currently calls this routine thrice
543 * in order to register separate callbacks; one for "normal" SCSI IO;
544 * one for MptScsiTaskMgmt requests; one for Scan/DV requests.
546 * Returns a positive integer valued "handle" in the
547 * range (and S.O.D. order) {N,...,7,6,5,...,1} if successful.
548 * Any non-positive return value (including zero!) should be considered
549 * an error by the caller.
552 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass)
559 * Search for empty callback slot in this order: {N,...,7,6,5,...,1}
560 * (slot/handle 0 is reserved!)
562 for (i = MPT_MAX_PROTOCOL_DRIVERS-1; i; i--) {
563 if (MptCallbacks[i] == NULL) {
564 MptCallbacks[i] = cbfunc;
565 MptDriverClass[i] = dclass;
566 MptEvHandlers[i] = NULL;
575 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
577 * mpt_deregister - Deregister a protocol drivers resources.
578 * @cb_idx: previously registered callback handle
580 * Each protocol-specific driver should call this routine when it's
581 * module is unloaded.
584 mpt_deregister(int cb_idx)
586 if ((cb_idx >= 0) && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
587 MptCallbacks[cb_idx] = NULL;
588 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
589 MptEvHandlers[cb_idx] = NULL;
595 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
597 * mpt_event_register - Register protocol-specific event callback
599 * @cb_idx: previously registered (via mpt_register) callback handle
600 * @ev_cbfunc: callback function
602 * This routine can be called by one or more protocol-specific drivers
603 * if/when they choose to be notified of MPT events.
605 * Returns 0 for success.
608 mpt_event_register(int cb_idx, MPT_EVHANDLER ev_cbfunc)
610 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
613 MptEvHandlers[cb_idx] = ev_cbfunc;
617 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
619 * mpt_event_deregister - Deregister protocol-specific event callback
621 * @cb_idx: previously registered callback handle
623 * Each protocol-specific driver should call this routine
624 * when it does not (or can no longer) handle events,
625 * or when it's module is unloaded.
628 mpt_event_deregister(int cb_idx)
630 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
633 MptEvHandlers[cb_idx] = NULL;
636 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
638 * mpt_reset_register - Register protocol-specific IOC reset handler.
639 * @cb_idx: previously registered (via mpt_register) callback handle
640 * @reset_func: reset function
642 * This routine can be called by one or more protocol-specific drivers
643 * if/when they choose to be notified of IOC resets.
645 * Returns 0 for success.
648 mpt_reset_register(int cb_idx, MPT_RESETHANDLER reset_func)
650 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
653 MptResetHandlers[cb_idx] = reset_func;
657 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
659 * mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
660 * @cb_idx: previously registered callback handle
662 * Each protocol-specific driver should call this routine
663 * when it does not (or can no longer) handle IOC reset handling,
664 * or when it's module is unloaded.
667 mpt_reset_deregister(int cb_idx)
669 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
672 MptResetHandlers[cb_idx] = NULL;
675 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
677 * mpt_device_driver_register - Register device driver hooks
680 mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, int cb_idx)
684 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS) {
688 MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
690 /* call per pci device probe entry point */
691 list_for_each_entry(ioc, &ioc_list, list) {
692 if(dd_cbfunc->probe) {
693 dd_cbfunc->probe(ioc->pcidev,
694 ioc->pcidev->driver->id_table);
701 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
703 * mpt_device_driver_deregister - DeRegister device driver hooks
706 mpt_device_driver_deregister(int cb_idx)
708 struct mpt_pci_driver *dd_cbfunc;
711 if (cb_idx < 1 || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
714 dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
716 list_for_each_entry(ioc, &ioc_list, list) {
717 if (dd_cbfunc->remove)
718 dd_cbfunc->remove(ioc->pcidev);
721 MptDeviceDriverHandlers[cb_idx] = NULL;
725 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
727 * mpt_get_msg_frame - Obtain a MPT request frame from the pool (of 1024)
728 * allocated per MPT adapter.
729 * @handle: Handle of registered MPT protocol driver
730 * @ioc: Pointer to MPT adapter structure
732 * Returns pointer to a MPT request frame or %NULL if none are available
733 * or IOC is not active.
736 mpt_get_msg_frame(int handle, MPT_ADAPTER *ioc)
740 u16 req_idx; /* Request index */
742 /* validate handle and ioc identifier */
746 printk(KERN_WARNING "IOC Not Active! mpt_get_msg_frame returning NULL!\n");
749 /* If interrupts are not attached, do not return a request frame */
753 spin_lock_irqsave(&ioc->FreeQlock, flags);
754 if (!list_empty(&ioc->FreeQ)) {
757 mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
758 u.frame.linkage.list);
759 list_del(&mf->u.frame.linkage.list);
760 mf->u.frame.linkage.arg1 = 0;
761 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
762 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
764 req_idx = req_offset / ioc->req_sz;
765 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
766 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
767 ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame; /* Default, will be changed if necessary in SG generation */
774 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
778 printk(KERN_WARNING "IOC Active. No free Msg Frames! Count 0x%x Max 0x%x\n", ioc->mfcnt, ioc->req_depth);
780 if (mfcounter == PRINT_MF_COUNT)
781 printk(KERN_INFO "MF Count 0x%x Max 0x%x \n", ioc->mfcnt, ioc->req_depth);
784 dmfprintk((KERN_INFO MYNAM ": %s: mpt_get_msg_frame(%d,%d), got mf=%p\n",
785 ioc->name, handle, ioc->id, mf));
789 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
791 * mpt_put_msg_frame - Send a protocol specific MPT request frame
793 * @handle: Handle of registered MPT protocol driver
794 * @ioc: Pointer to MPT adapter structure
795 * @mf: Pointer to MPT request frame
797 * This routine posts a MPT request frame to the request post FIFO of a
798 * specific MPT adapter.
801 mpt_put_msg_frame(int handle, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
805 u16 req_idx; /* Request index */
807 /* ensure values are reset properly! */
808 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle; /* byte */
809 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
811 req_idx = req_offset / ioc->req_sz;
812 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
813 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
815 #ifdef MPT_DEBUG_MSG_FRAME
817 u32 *m = mf->u.frame.hwhdr.__hdr;
820 printk(KERN_INFO MYNAM ": %s: About to Put msg frame @ %p:\n" KERN_INFO " ",
822 n = ioc->req_sz/4 - 1;
825 for (ii=0; ii<=n; ii++) {
826 if (ii && ((ii%8)==0))
827 printk("\n" KERN_INFO " ");
828 printk(" %08x", le32_to_cpu(m[ii]));
834 mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
835 dsgprintk((MYIOC_s_INFO_FMT "mf_dma_addr=%x req_idx=%d RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx, ioc->RequestNB[req_idx]));
836 CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
839 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
841 * mpt_free_msg_frame - Place MPT request frame back on FreeQ.
842 * @handle: Handle of registered MPT protocol driver
843 * @ioc: Pointer to MPT adapter structure
844 * @mf: Pointer to MPT request frame
846 * This routine places a MPT request frame back on the MPT adapter's
850 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
854 /* Put Request back on FreeQ! */
855 spin_lock_irqsave(&ioc->FreeQlock, flags);
856 mf->u.frame.linkage.arg1 = 0xdeadbeaf; /* signature to know if this mf is freed */
857 list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
861 spin_unlock_irqrestore(&ioc->FreeQlock, flags);
864 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
866 * mpt_add_sge - Place a simple SGE at address pAddr.
867 * @pAddr: virtual address for SGE
868 * @flagslength: SGE flags and data transfer length
869 * @dma_addr: Physical address
871 * This routine places a MPT request frame back on the MPT adapter's
875 mpt_add_sge(char *pAddr, u32 flagslength, dma_addr_t dma_addr)
877 if (sizeof(dma_addr_t) == sizeof(u64)) {
878 SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
879 u32 tmp = dma_addr & 0xFFFFFFFF;
881 pSge->FlagsLength = cpu_to_le32(flagslength);
882 pSge->Address.Low = cpu_to_le32(tmp);
883 tmp = (u32) ((u64)dma_addr >> 32);
884 pSge->Address.High = cpu_to_le32(tmp);
887 SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
888 pSge->FlagsLength = cpu_to_le32(flagslength);
889 pSge->Address = cpu_to_le32(dma_addr);
893 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
895 * mpt_send_handshake_request - Send MPT request via doorbell
897 * @handle: Handle of registered MPT protocol driver
898 * @ioc: Pointer to MPT adapter structure
899 * @reqBytes: Size of the request in bytes
900 * @req: Pointer to MPT request frame
901 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
903 * This routine is used exclusively to send MptScsiTaskMgmt
904 * requests since they are required to be sent via doorbell handshake.
906 * NOTE: It is the callers responsibility to byte-swap fields in the
907 * request which are greater than 1 byte in size.
909 * Returns 0 for success, non-zero for failure.
912 mpt_send_handshake_request(int handle, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
918 /* State is known to be good upon entering
919 * this function so issue the bus reset
924 * Emulate what mpt_put_msg_frame() does /wrt to sanity
925 * setting cb_idx/req_idx. But ONLY if this request
926 * is in proper (pre-alloc'd) request buffer range...
928 ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
929 if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
930 MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
931 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
932 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = handle;
935 /* Make sure there are no doorbells */
936 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
938 CHIPREG_WRITE32(&ioc->chip->Doorbell,
939 ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
940 ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
942 /* Wait for IOC doorbell int */
943 if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
947 /* Read doorbell and check for active bit */
948 if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
951 dhsprintk((KERN_INFO MYNAM ": %s: mpt_send_handshake_request start, WaitCnt=%d\n",
954 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
956 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
960 /* Send request via doorbell handshake */
961 req_as_bytes = (u8 *) req;
962 for (ii = 0; ii < reqBytes/4; ii++) {
965 word = ((req_as_bytes[(ii*4) + 0] << 0) |
966 (req_as_bytes[(ii*4) + 1] << 8) |
967 (req_as_bytes[(ii*4) + 2] << 16) |
968 (req_as_bytes[(ii*4) + 3] << 24));
969 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
970 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
976 if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
981 /* Make sure there are no doorbells */
982 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
987 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
989 * mpt_host_page_access_control - provides mechanism for the host
990 * driver to control the IOC's Host Page Buffer access.
991 * @ioc: Pointer to MPT adapter structure
992 * @access_control_value: define bits below
994 * Access Control Value - bits[15:12]
996 * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
997 * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
998 * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
1000 * Returns 0 for success, non-zero for failure.
1004 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1008 /* return if in use */
1009 if (CHIPREG_READ32(&ioc->chip->Doorbell)
1010 & MPI_DOORBELL_ACTIVE)
1013 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1015 CHIPREG_WRITE32(&ioc->chip->Doorbell,
1016 ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
1017 <<MPI_DOORBELL_FUNCTION_SHIFT) |
1018 (access_control_value<<12)));
1020 /* Wait for IOC to clear Doorbell Status bit */
1021 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1027 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1029 * mpt_host_page_alloc - allocate system memory for the fw
1030 * If we already allocated memory in past, then resend the same pointer.
1031 * ioc@: Pointer to pointer to IOC adapter
1032 * ioc_init@: Pointer to ioc init config page
1034 * Returns 0 for success, non-zero for failure.
1037 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1041 u32 host_page_buffer_sz=0;
1043 if(!ioc->HostPageBuffer) {
1045 host_page_buffer_sz =
1046 le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1048 if(!host_page_buffer_sz)
1049 return 0; /* fw doesn't need any host buffers */
1051 /* spin till we get enough memory */
1052 while(host_page_buffer_sz > 0) {
1054 if((ioc->HostPageBuffer = pci_alloc_consistent(
1056 host_page_buffer_sz,
1057 &ioc->HostPageBuffer_dma)) != NULL) {
1059 dinitprintk((MYIOC_s_INFO_FMT
1060 "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
1062 ioc->HostPageBuffer,
1063 ioc->HostPageBuffer_dma,
1064 host_page_buffer_sz));
1065 ioc->alloc_total += host_page_buffer_sz;
1066 ioc->HostPageBuffer_sz = host_page_buffer_sz;
1070 host_page_buffer_sz -= (4*1024);
1074 if(!ioc->HostPageBuffer) {
1075 printk(MYIOC_s_ERR_FMT
1076 "Failed to alloc memory for host_page_buffer!\n",
1081 psge = (char *)&ioc_init->HostPageBufferSGE;
1082 flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1083 MPI_SGE_FLAGS_SYSTEM_ADDRESS |
1084 MPI_SGE_FLAGS_32_BIT_ADDRESSING |
1085 MPI_SGE_FLAGS_HOST_TO_IOC |
1086 MPI_SGE_FLAGS_END_OF_BUFFER;
1087 if (sizeof(dma_addr_t) == sizeof(u64)) {
1088 flags_length |= MPI_SGE_FLAGS_64_BIT_ADDRESSING;
1090 flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
1091 flags_length |= ioc->HostPageBuffer_sz;
1092 mpt_add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1093 ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1098 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1100 * mpt_verify_adapter - Given a unique IOC identifier, set pointer to
1101 * the associated MPT adapter structure.
1102 * @iocid: IOC unique identifier (integer)
1103 * @iocpp: Pointer to pointer to IOC adapter
1105 * Returns iocid and sets iocpp.
1108 mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
1112 list_for_each_entry(ioc,&ioc_list,list) {
1113 if (ioc->id == iocid) {
1123 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1125 * mpt_attach - Install a PCI intelligent MPT adapter.
1126 * @pdev: Pointer to pci_dev structure
1128 * This routine performs all the steps necessary to bring the IOC of
1129 * a MPT adapter to a OPERATIONAL state. This includes registering
1130 * memory regions, registering the interrupt, and allocating request
1131 * and reply memory pools.
1133 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
1136 * Returns 0 for success, non-zero for failure.
1138 * TODO: Add support for polled controllers
1141 mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1145 unsigned long mem_phys;
1153 static int mpt_ids = 0;
1154 #ifdef CONFIG_PROC_FS
1155 struct proc_dir_entry *dent, *ent;
1158 if (pci_enable_device(pdev))
1161 dinitprintk((KERN_WARNING MYNAM ": mpt_adapter_install\n"));
1163 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1164 dprintk((KERN_INFO MYNAM
1165 ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n"));
1166 } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1167 printk(KERN_WARNING MYNAM ": 32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
1171 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1172 dprintk((KERN_INFO MYNAM
1173 ": Using 64 bit consistent mask\n"));
1175 dprintk((KERN_INFO MYNAM
1176 ": Not using 64 bit consistent mask\n"));
1178 ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
1180 printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
1183 ioc->alloc_total = sizeof(MPT_ADAPTER);
1184 ioc->req_sz = MPT_DEFAULT_FRAME_SIZE; /* avoid div by zero! */
1185 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1188 ioc->diagPending = 0;
1189 spin_lock_init(&ioc->diagLock);
1190 spin_lock_init(&ioc->fc_rescan_work_lock);
1191 spin_lock_init(&ioc->fc_rport_lock);
1192 spin_lock_init(&ioc->initializing_hba_lock);
1194 /* Initialize the event logging.
1196 ioc->eventTypes = 0; /* None */
1197 ioc->eventContext = 0;
1198 ioc->eventLogSize = 0;
1205 ioc->cached_fw = NULL;
1207 /* Initilize SCSI Config Data structure
1209 memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1211 /* Initialize the running configQ head.
1213 INIT_LIST_HEAD(&ioc->configQ);
1215 /* Initialize the fc rport list head.
1217 INIT_LIST_HEAD(&ioc->fc_rports);
1219 /* Find lookup slot. */
1220 INIT_LIST_HEAD(&ioc->list);
1221 ioc->id = mpt_ids++;
1223 mem_phys = msize = 0;
1225 for (ii=0; ii < DEVICE_COUNT_RESOURCE; ii++) {
1226 if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
1227 /* Get I/O space! */
1228 port = pci_resource_start(pdev, ii);
1229 psize = pci_resource_len(pdev,ii);
1232 mem_phys = pci_resource_start(pdev, ii);
1233 msize = pci_resource_len(pdev,ii);
1237 ioc->mem_size = msize;
1239 if (ii == DEVICE_COUNT_RESOURCE) {
1240 printk(KERN_ERR MYNAM ": ERROR - MPT adapter has no memory regions defined!\n");
1245 dinitprintk((KERN_INFO MYNAM ": MPT adapter @ %lx, msize=%dd bytes\n", mem_phys, msize));
1246 dinitprintk((KERN_INFO MYNAM ": (port i/o @ %lx, psize=%dd bytes)\n", port, psize));
1249 /* Get logical ptr for PciMem0 space */
1250 /*mem = ioremap(mem_phys, msize);*/
1251 mem = ioremap(mem_phys, 0x100);
1253 printk(KERN_ERR MYNAM ": ERROR - Unable to map adapter memory!\n");
1258 dinitprintk((KERN_INFO MYNAM ": mem = %p, mem_phys = %lx\n", mem, mem_phys));
1260 dinitprintk((KERN_INFO MYNAM ": facts @ %p, pfacts[0] @ %p\n",
1261 &ioc->facts, &ioc->pfacts[0]));
1263 ioc->mem_phys = mem_phys;
1264 ioc->chip = (SYSIF_REGS __iomem *)mem;
1266 /* Save Port IO values in case we need to do downloadboot */
1268 u8 *pmem = (u8*)port;
1269 ioc->pio_mem_phys = port;
1270 ioc->pio_chip = (SYSIF_REGS __iomem *)pmem;
1273 if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC909) {
1274 ioc->prod_name = "LSIFC909";
1277 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929) {
1278 ioc->prod_name = "LSIFC929";
1281 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919) {
1282 ioc->prod_name = "LSIFC919";
1285 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC929X) {
1286 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
1288 if (revision < XL_929) {
1289 ioc->prod_name = "LSIFC929X";
1290 /* 929X Chip Fix. Set Split transactions level
1291 * for PCIX. Set MOST bits to zero.
1293 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1295 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1297 ioc->prod_name = "LSIFC929XL";
1298 /* 929XL Chip Fix. Set MMRBC to 0x08.
1300 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1302 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1305 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC919X) {
1306 ioc->prod_name = "LSIFC919X";
1308 /* 919X Chip Fix. Set Split transactions level
1309 * for PCIX. Set MOST bits to zero.
1311 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1313 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1315 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC939X) {
1316 ioc->prod_name = "LSIFC939X";
1318 ioc->errata_flag_1064 = 1;
1320 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC949X) {
1321 ioc->prod_name = "LSIFC949X";
1323 ioc->errata_flag_1064 = 1;
1325 else if (pdev->device == MPI_MANUFACTPAGE_DEVICEID_FC949E) {
1326 ioc->prod_name = "LSIFC949E";
1329 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_53C1030) {
1330 ioc->prod_name = "LSI53C1030";
1331 ioc->bus_type = SPI;
1332 /* 1030 Chip Fix. Disable Split transactions
1333 * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
1335 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
1336 if (revision < C0_1030) {
1337 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1339 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1342 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_1030_53C1035) {
1343 ioc->prod_name = "LSI53C1035";
1344 ioc->bus_type = SPI;
1346 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064) {
1347 ioc->prod_name = "LSISAS1064";
1348 ioc->bus_type = SAS;
1349 ioc->errata_flag_1064 = 1;
1351 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1066) {
1352 ioc->prod_name = "LSISAS1066";
1353 ioc->bus_type = SAS;
1354 ioc->errata_flag_1064 = 1;
1356 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068) {
1357 ioc->prod_name = "LSISAS1068";
1358 ioc->bus_type = SAS;
1359 ioc->errata_flag_1064 = 1;
1361 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1064E) {
1362 ioc->prod_name = "LSISAS1064E";
1363 ioc->bus_type = SAS;
1365 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1066E) {
1366 ioc->prod_name = "LSISAS1066E";
1367 ioc->bus_type = SAS;
1369 else if (pdev->device == MPI_MANUFACTPAGE_DEVID_SAS1068E) {
1370 ioc->prod_name = "LSISAS1068E";
1371 ioc->bus_type = SAS;
1374 if (ioc->errata_flag_1064)
1375 pci_disable_io_access(pdev);
1377 sprintf(ioc->name, "ioc%d", ioc->id);
1379 spin_lock_init(&ioc->FreeQlock);
1382 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1384 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1386 /* Set lookup ptr. */
1387 list_add_tail(&ioc->list, &ioc_list);
1391 if (mpt_msi_enable && !pci_enable_msi(pdev))
1392 printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n", ioc->name);
1394 r = request_irq(pdev->irq, mpt_interrupt, SA_SHIRQ, ioc->name, ioc);
1398 printk(MYIOC_s_ERR_FMT "Unable to allocate interrupt %d!\n",
1399 ioc->name, pdev->irq);
1401 printk(MYIOC_s_ERR_FMT "Unable to allocate interrupt %s!\n",
1402 ioc->name, __irq_itoa(pdev->irq));
1404 list_del(&ioc->list);
1410 ioc->pci_irq = pdev->irq;
1412 pci_set_master(pdev); /* ?? */
1413 pci_set_drvdata(pdev, ioc);
1416 dprintk((KERN_INFO MYNAM ": %s installed at interrupt %d\n", ioc->name, pdev->irq));
1418 dprintk((KERN_INFO MYNAM ": %s installed at interrupt %s\n", ioc->name, __irq_itoa(pdev->irq)));
1422 /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
1424 mpt_detect_bound_ports(ioc, pdev);
1426 if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
1428 printk(KERN_WARNING MYNAM
1429 ": WARNING - %s did not initialize properly! (%d)\n",
1432 list_del(&ioc->list);
1433 free_irq(ioc->pci_irq, ioc);
1435 pci_disable_msi(pdev);
1437 ioc->alt_ioc->alt_ioc = NULL;
1440 pci_set_drvdata(pdev, NULL);
1444 /* call per device driver probe entry point */
1445 for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
1446 if(MptDeviceDriverHandlers[ii] &&
1447 MptDeviceDriverHandlers[ii]->probe) {
1448 MptDeviceDriverHandlers[ii]->probe(pdev,id);
1452 #ifdef CONFIG_PROC_FS
1454 * Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
1456 dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
1458 ent = create_proc_entry("info", S_IFREG|S_IRUGO, dent);
1460 ent->read_proc = procmpt_iocinfo_read;
1463 ent = create_proc_entry("summary", S_IFREG|S_IRUGO, dent);
1465 ent->read_proc = procmpt_summary_read;
1474 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1476 * mpt_detach - Remove a PCI intelligent MPT adapter.
1477 * @pdev: Pointer to pci_dev structure
1482 mpt_detach(struct pci_dev *pdev)
1484 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1488 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
1489 remove_proc_entry(pname, NULL);
1490 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
1491 remove_proc_entry(pname, NULL);
1492 sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
1493 remove_proc_entry(pname, NULL);
1495 /* call per device driver remove entry point */
1496 for(ii=0; ii<MPT_MAX_PROTOCOL_DRIVERS; ii++) {
1497 if(MptDeviceDriverHandlers[ii] &&
1498 MptDeviceDriverHandlers[ii]->remove) {
1499 MptDeviceDriverHandlers[ii]->remove(pdev);
1503 /* Disable interrupts! */
1504 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1507 synchronize_irq(pdev->irq);
1509 /* Clear any lingering interrupt */
1510 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1512 CHIPREG_READ32(&ioc->chip->IntStatus);
1514 mpt_adapter_dispose(ioc);
1516 pci_set_drvdata(pdev, NULL);
1519 /**************************************************************************
1523 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1525 * mpt_suspend - Fusion MPT base driver suspend routine.
1530 mpt_suspend(struct pci_dev *pdev, pm_message_t state)
1533 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1535 device_state=pci_choose_state(pdev, state);
1537 printk(MYIOC_s_INFO_FMT
1538 "pci-suspend: pdev=0x%p, slot=%s, Entering operating state [D%d]\n",
1539 ioc->name, pdev, pci_name(pdev), device_state);
1541 pci_save_state(pdev);
1543 /* put ioc into READY_STATE */
1544 if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
1545 printk(MYIOC_s_ERR_FMT
1546 "pci-suspend: IOC msg unit reset failed!\n", ioc->name);
1549 /* disable interrupts */
1550 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1553 /* Clear any lingering interrupt */
1554 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1556 pci_disable_device(pdev);
1557 pci_set_power_state(pdev, device_state);
1562 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1564 * mpt_resume - Fusion MPT base driver resume routine.
1569 mpt_resume(struct pci_dev *pdev)
1571 MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1572 u32 device_state = pdev->current_state;
1575 printk(MYIOC_s_INFO_FMT
1576 "pci-resume: pdev=0x%p, slot=%s, Previous operating state [D%d]\n",
1577 ioc->name, pdev, pci_name(pdev), device_state);
1579 pci_set_power_state(pdev, 0);
1580 pci_restore_state(pdev);
1581 pci_enable_device(pdev);
1583 /* enable interrupts */
1584 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
1587 printk(MYIOC_s_INFO_FMT
1588 "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
1590 (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
1591 CHIPREG_READ32(&ioc->chip->Doorbell));
1593 /* bring ioc to operational state */
1594 if ((recovery_state = mpt_do_ioc_recovery(ioc,
1595 MPT_HOSTEVENT_IOC_RECOVER, CAN_SLEEP)) != 0) {
1596 printk(MYIOC_s_INFO_FMT
1597 "pci-resume: Cannot recover, error:[%x]\n",
1598 ioc->name, recovery_state);
1600 printk(MYIOC_s_INFO_FMT
1601 "pci-resume: success\n", ioc->name);
1608 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1610 * mpt_do_ioc_recovery - Initialize or recover MPT adapter.
1611 * @ioc: Pointer to MPT adapter structure
1612 * @reason: Event word / reason
1613 * @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
1615 * This routine performs all the steps necessary to bring the IOC
1616 * to a OPERATIONAL state.
1618 * This routine also pre-fetches the LAN MAC address of a Fibre Channel
1623 * -1 if failed to get board READY
1624 * -2 if READY but IOCFacts Failed
1625 * -3 if READY but PrimeIOCFifos Failed
1626 * -4 if READY but IOCInit Failed
1629 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
1631 int hard_reset_done = 0;
1632 int alt_ioc_ready = 0;
1638 int reset_alt_ioc_active = 0;
1640 printk(KERN_INFO MYNAM ": Initiating %s %s\n",
1641 ioc->name, reason==MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
1643 /* Disable reply interrupts (also blocks FreeQ) */
1644 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1648 if (ioc->alt_ioc->active)
1649 reset_alt_ioc_active = 1;
1651 /* Disable alt-IOC's reply interrupts (and FreeQ) for a bit ... */
1652 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, 0xFFFFFFFF);
1653 ioc->alt_ioc->active = 0;
1657 if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
1660 if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
1661 if (hard_reset_done == -4) {
1662 printk(KERN_WARNING MYNAM ": %s Owned by PEER..skipping!\n",
1665 if (reset_alt_ioc_active && ioc->alt_ioc) {
1666 /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
1667 dprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
1668 ioc->alt_ioc->name));
1669 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
1670 ioc->alt_ioc->active = 1;
1674 printk(KERN_WARNING MYNAM ": %s NOT READY WARNING!\n",
1680 /* hard_reset_done = 0 if a soft reset was performed
1681 * and 1 if a hard reset was performed.
1683 if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
1684 if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
1687 printk(KERN_WARNING MYNAM
1688 ": alt-%s: Not ready WARNING!\n",
1689 ioc->alt_ioc->name);
1692 for (ii=0; ii<5; ii++) {
1693 /* Get IOC facts! Allow 5 retries */
1694 if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
1700 dinitprintk((MYIOC_s_INFO_FMT "Retry IocFacts failed rc=%x\n", ioc->name, rc));
1702 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
1703 MptDisplayIocCapabilities(ioc);
1706 if (alt_ioc_ready) {
1707 if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
1708 dinitprintk((MYIOC_s_INFO_FMT "Initial Alt IocFacts failed rc=%x\n", ioc->name, rc));
1709 /* Retry - alt IOC was initialized once
1711 rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
1714 dinitprintk((MYIOC_s_INFO_FMT "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
1716 reset_alt_ioc_active = 0;
1717 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
1718 MptDisplayIocCapabilities(ioc->alt_ioc);
1722 /* Prime reply & request queues!
1723 * (mucho alloc's) Must be done prior to
1724 * init as upper addresses are needed for init.
1725 * If fails, continue with alt-ioc processing
1727 if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
1730 /* May need to check/upload firmware & data here!
1731 * If fails, continue with alt-ioc processing
1733 if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
1736 if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
1737 printk(KERN_WARNING MYNAM ": alt-%s: (%d) FIFO mgmt alloc WARNING!\n",
1738 ioc->alt_ioc->name, rc);
1740 reset_alt_ioc_active = 0;
1743 if (alt_ioc_ready) {
1744 if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
1746 reset_alt_ioc_active = 0;
1747 printk(KERN_WARNING MYNAM
1748 ": alt-%s: (%d) init failure WARNING!\n",
1749 ioc->alt_ioc->name, rc);
1753 if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
1754 if (ioc->upload_fw) {
1755 ddlprintk((MYIOC_s_INFO_FMT
1756 "firmware upload required!\n", ioc->name));
1758 /* Controller is not operational, cannot do upload
1761 rc = mpt_do_upload(ioc, sleepFlag);
1763 if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
1765 * Maintain only one pointer to FW memory
1766 * so there will not be two attempt to
1767 * downloadboot onboard dual function
1768 * chips (mpt_adapter_disable,
1771 ioc->cached_fw = NULL;
1772 ddlprintk((MYIOC_s_INFO_FMT ": mpt_upload: alt_%s has cached_fw=%p \n",
1773 ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
1776 printk(KERN_WARNING MYNAM ": firmware upload failure!\n");
1784 /* Enable! (reply interrupt) */
1785 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
1789 if (reset_alt_ioc_active && ioc->alt_ioc) {
1790 /* (re)Enable alt-IOC! (reply interrupt) */
1791 dinitprintk((KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
1792 ioc->alt_ioc->name));
1793 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
1794 ioc->alt_ioc->active = 1;
1797 /* Enable MPT base driver management of EventNotification
1798 * and EventAck handling.
1800 if ((ret == 0) && (!ioc->facts.EventState))
1801 (void) SendEventNotification(ioc, 1); /* 1=Enable EventNotification */
1803 if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
1804 (void) SendEventNotification(ioc->alt_ioc, 1); /* 1=Enable EventNotification */
1806 /* Add additional "reason" check before call to GetLanConfigPages
1807 * (combined with GetIoUnitPage2 call). This prevents a somewhat
1808 * recursive scenario; GetLanConfigPages times out, timer expired
1809 * routine calls HardResetHandler, which calls into here again,
1810 * and we try GetLanConfigPages again...
1812 if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
1813 if (ioc->bus_type == SAS) {
1815 /* clear persistency table */
1816 if(ioc->facts.IOCExceptions &
1817 MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
1818 ret = mptbase_sas_persist_operation(ioc,
1819 MPI_SAS_OP_CLEAR_NOT_PRESENT);
1826 mpt_findImVolumes(ioc);
1828 } else if (ioc->bus_type == FC) {
1830 * Pre-fetch FC port WWN and stuff...
1831 * (FCPortPage0_t stuff)
1833 for (ii=0; ii < ioc->facts.NumberOfPorts; ii++) {
1834 (void) mptbase_GetFcPortPage0(ioc, ii);
1837 if ((ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) &&
1838 (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
1840 * Pre-fetch the ports LAN MAC address!
1841 * (LANPage1_t stuff)
1843 (void) GetLanConfigPages(ioc);
1846 u8 *a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
1847 dprintk((MYIOC_s_INFO_FMT "LanAddr = %02X:%02X:%02X:%02X:%02X:%02X\n",
1848 ioc->name, a[5], a[4], a[3], a[2], a[1], a[0] ));
1853 /* Get NVRAM and adapter maximums from SPP 0 and 2
1855 mpt_GetScsiPortSettings(ioc, 0);
1857 /* Get version and length of SDP 1
1859 mpt_readScsiDevicePageHeaders(ioc, 0);
1863 if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
1864 mpt_findImVolumes(ioc);
1866 /* Check, and possibly reset, the coalescing value
1868 mpt_read_ioc_pg_1(ioc);
1870 mpt_read_ioc_pg_4(ioc);
1873 GetIoUnitPage2(ioc);
1877 * Call each currently registered protocol IOC reset handler
1878 * with post-reset indication.
1879 * NOTE: If we're doing _IOC_BRINGUP, there can be no
1880 * MptResetHandlers[] registered yet.
1882 if (hard_reset_done) {
1884 for (ii=MPT_MAX_PROTOCOL_DRIVERS-1; ii; ii--) {
1885 if ((ret == 0) && MptResetHandlers[ii]) {
1886 dprintk((MYIOC_s_INFO_FMT "Calling IOC post_reset handler #%d\n",
1888 rc += (*(MptResetHandlers[ii]))(ioc, MPT_IOC_POST_RESET);
1892 if (alt_ioc_ready && MptResetHandlers[ii]) {
1893 drsprintk((MYIOC_s_INFO_FMT "Calling alt-%s post_reset handler #%d\n",
1894 ioc->name, ioc->alt_ioc->name, ii));
1895 rc += (*(MptResetHandlers[ii]))(ioc->alt_ioc, MPT_IOC_POST_RESET);
1899 /* FIXME? Examine results here? */
1905 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1907 * mpt_detect_bound_ports - Search for PCI bus/dev_function
1908 * which matches PCI bus/dev_function (+/-1) for newly discovered 929,
1909 * 929X, 1030 or 1035.
1910 * @ioc: Pointer to MPT adapter structure
1911 * @pdev: Pointer to (struct pci_dev) structure
1913 * If match on PCI dev_function +/-1 is found, bind the two MPT adapters
1914 * using alt_ioc pointer fields in their %MPT_ADAPTER structures.
1917 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
1919 struct pci_dev *peer=NULL;
1920 unsigned int slot = PCI_SLOT(pdev->devfn);
1921 unsigned int func = PCI_FUNC(pdev->devfn);
1922 MPT_ADAPTER *ioc_srch;
1924 dprintk((MYIOC_s_INFO_FMT "PCI device %s devfn=%x/%x,"
1925 " searching for devfn match on %x or %x\n",
1926 ioc->name, pci_name(pdev), pdev->bus->number,
1927 pdev->devfn, func-1, func+1));
1929 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
1931 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
1936 list_for_each_entry(ioc_srch, &ioc_list, list) {
1937 struct pci_dev *_pcidev = ioc_srch->pcidev;
1938 if (_pcidev == peer) {
1939 /* Paranoia checks */
1940 if (ioc->alt_ioc != NULL) {
1941 printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
1942 ioc->name, ioc->alt_ioc->name);
1944 } else if (ioc_srch->alt_ioc != NULL) {
1945 printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
1946 ioc_srch->name, ioc_srch->alt_ioc->name);
1949 dprintk((KERN_INFO MYNAM ": FOUND! binding %s <==> %s\n",
1950 ioc->name, ioc_srch->name));
1951 ioc_srch->alt_ioc = ioc;
1952 ioc->alt_ioc = ioc_srch;
1958 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1960 * mpt_adapter_disable - Disable misbehaving MPT adapter.
1961 * @this: Pointer to MPT adapter structure
1964 mpt_adapter_disable(MPT_ADAPTER *ioc)
1969 if (ioc->cached_fw != NULL) {
1970 ddlprintk((KERN_INFO MYNAM ": mpt_adapter_disable: Pushing FW onto adapter\n"));
1971 if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)ioc->cached_fw, NO_SLEEP)) < 0) {
1972 printk(KERN_WARNING MYNAM
1973 ": firmware downloadboot failure (%d)!\n", ret);
1977 /* Disable adapter interrupts! */
1978 CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1980 /* Clear any lingering interrupt */
1981 CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1983 if (ioc->alloc != NULL) {
1985 dexitprintk((KERN_INFO MYNAM ": %s.free @ %p, sz=%d bytes\n",
1986 ioc->name, ioc->alloc, ioc->alloc_sz));
1987 pci_free_consistent(ioc->pcidev, sz,
1988 ioc->alloc, ioc->alloc_dma);
1989 ioc->reply_frames = NULL;
1990 ioc->req_frames = NULL;
1992 ioc->alloc_total -= sz;
1995 if (ioc->sense_buf_pool != NULL) {
1996 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
1997 pci_free_consistent(ioc->pcidev, sz,
1998 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
1999 ioc->sense_buf_pool = NULL;
2000 ioc->alloc_total -= sz;
2003 if (ioc->events != NULL){
2004 sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
2007 ioc->alloc_total -= sz;
2010 if (ioc->cached_fw != NULL) {
2011 sz = ioc->facts.FWImageSize;
2012 pci_free_consistent(ioc->pcidev, sz,
2013 ioc->cached_fw, ioc->cached_fw_dma);
2014 ioc->cached_fw = NULL;
2015 ioc->alloc_total -= sz;
2018 kfree(ioc->spi_data.nvram);
2019 kfree(ioc->raid_data.pIocPg3);
2020 ioc->spi_data.nvram = NULL;
2021 ioc->raid_data.pIocPg3 = NULL;
2023 if (ioc->spi_data.pIocPg4 != NULL) {
2024 sz = ioc->spi_data.IocPg4Sz;
2025 pci_free_consistent(ioc->pcidev, sz,
2026 ioc->spi_data.pIocPg4,
2027 ioc->spi_data.IocPg4_dma);
2028 ioc->spi_data.pIocPg4 = NULL;
2029 ioc->alloc_total -= sz;
2032 if (ioc->ReqToChain != NULL) {
2033 kfree(ioc->ReqToChain);
2034 kfree(ioc->RequestNB);
2035 ioc->ReqToChain = NULL;
2038 kfree(ioc->ChainToChain);
2039 ioc->ChainToChain = NULL;
2041 if (ioc->HostPageBuffer != NULL) {
2042 if((ret = mpt_host_page_access_control(ioc,
2043 MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
2044 printk(KERN_ERR MYNAM
2045 ": %s: host page buffers free failed (%d)!\n",
2048 dexitprintk((KERN_INFO MYNAM ": %s HostPageBuffer free @ %p, sz=%d bytes\n",
2049 ioc->name, ioc->HostPageBuffer, ioc->HostPageBuffer_sz));
2050 pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
2051 ioc->HostPageBuffer,
2052 ioc->HostPageBuffer_dma);
2053 ioc->HostPageBuffer = NULL;
2054 ioc->HostPageBuffer_sz = 0;
2055 ioc->alloc_total -= ioc->HostPageBuffer_sz;
2059 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2061 * mpt_adapter_dispose - Free all resources associated with a MPT
2063 * @ioc: Pointer to MPT adapter structure
2065 * This routine unregisters h/w resources and frees all alloc'd memory
2066 * associated with a MPT adapter structure.
2069 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2071 int sz_first, sz_last;
2076 sz_first = ioc->alloc_total;
2078 mpt_adapter_disable(ioc);
2080 if (ioc->pci_irq != -1) {
2081 free_irq(ioc->pci_irq, ioc);
2083 pci_disable_msi(ioc->pcidev);
2087 if (ioc->memmap != NULL) {
2088 iounmap(ioc->memmap);
2092 #if defined(CONFIG_MTRR) && 0
2093 if (ioc->mtrr_reg > 0) {
2094 mtrr_del(ioc->mtrr_reg, 0, 0);
2095 dprintk((KERN_INFO MYNAM ": %s: MTRR region de-registered\n", ioc->name));
2099 /* Zap the adapter lookup ptr! */
2100 list_del(&ioc->list);
2102 sz_last = ioc->alloc_total;
2103 dprintk((KERN_INFO MYNAM ": %s: free'd %d of %d bytes\n",
2104 ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2107 ioc->alt_ioc->alt_ioc = NULL;
2112 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2114 * MptDisplayIocCapabilities - Disply IOC's capacilities.
2115 * @ioc: Pointer to MPT adapter structure
2118 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2122 printk(KERN_INFO "%s: ", ioc->name);
2123 if (ioc->prod_name && strlen(ioc->prod_name) > 3)
2124 printk("%s: ", ioc->prod_name+3);
2125 printk("Capabilities={");
2127 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2128 printk("Initiator");
2132 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2133 printk("%sTarget", i ? "," : "");
2137 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2138 printk("%sLAN", i ? "," : "");
2144 * This would probably evoke more questions than it's worth
2146 if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2147 printk("%sLogBusAddr", i ? "," : "");
2155 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2157 * MakeIocReady - Get IOC to a READY state, using KickStart if needed.
2158 * @ioc: Pointer to MPT_ADAPTER structure
2159 * @force: Force hard KickStart of IOC
2160 * @sleepFlag: Specifies whether the process can sleep
2163 * 1 - DIAG reset and READY
2164 * 0 - READY initially OR soft reset and READY
2165 * -1 - Any failure on KickStart
2166 * -2 - Msg Unit Reset Failed
2167 * -3 - IO Unit Reset Failed
2168 * -4 - IOC owned by a PEER
2171 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2176 int hard_reset_done = 0;
2181 /* Get current [raw] IOC state */
2182 ioc_state = mpt_GetIocState(ioc, 0);
2183 dhsprintk((KERN_INFO MYNAM "::MakeIocReady, %s [raw] state=%08x\n", ioc->name, ioc_state));
2186 * Check to see if IOC got left/stuck in doorbell handshake
2187 * grip of death. If so, hard reset the IOC.
2189 if (ioc_state & MPI_DOORBELL_ACTIVE) {
2191 printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
2195 /* Is it already READY? */
2196 if (!statefault && (ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)
2200 * Check to see if IOC is in FAULT state.
2202 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
2204 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
2206 printk(KERN_WARNING " FAULT code = %04xh\n",
2207 ioc_state & MPI_DOORBELL_DATA_MASK);
2211 * Hmmm... Did it get left operational?
2213 if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
2214 dinitprintk((MYIOC_s_INFO_FMT "IOC operational unexpected\n",
2218 * If PCI Peer, exit.
2219 * Else, if no fault conditions are present, issue a MessageUnitReset
2220 * Else, fall through to KickStart case
2222 whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
2223 dinitprintk((KERN_INFO MYNAM
2224 ": whoinit 0x%x statefault %d force %d\n",
2225 whoinit, statefault, force));
2226 if (whoinit == MPI_WHOINIT_PCI_PEER)
2229 if ((statefault == 0 ) && (force == 0)) {
2230 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2237 hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2238 if (hard_reset_done < 0)
2242 * Loop here waiting for IOC to come READY.
2245 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5; /* 5 seconds */
2247 while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
2248 if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
2250 * BIOS or previous driver load left IOC in OP state.
2251 * Reset messaging FIFOs.
2253 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
2254 printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
2257 } else if (ioc_state == MPI_IOC_STATE_RESET) {
2259 * Something is wrong. Try to get IOC back
2262 if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
2263 printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
2270 printk(MYIOC_s_ERR_FMT "Wait IOC_READY state timeout(%d)!\n",
2271 ioc->name, (int)((ii+5)/HZ));
2275 if (sleepFlag == CAN_SLEEP) {
2276 msleep_interruptible(1);
2278 mdelay (1); /* 1 msec delay */
2283 if (statefault < 3) {
2284 printk(MYIOC_s_INFO_FMT "Recovered from %s\n",
2286 statefault==1 ? "stuck handshake" : "IOC FAULT");
2289 return hard_reset_done;
2292 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2294 * mpt_GetIocState - Get the current state of a MPT adapter.
2295 * @ioc: Pointer to MPT_ADAPTER structure
2296 * @cooked: Request raw or cooked IOC state
2298 * Returns all IOC Doorbell register bits if cooked==0, else just the
2299 * Doorbell bits in MPI_IOC_STATE_MASK.
2302 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
2307 s = CHIPREG_READ32(&ioc->chip->Doorbell);
2308 // dprintk((MYIOC_s_INFO_FMT "raw state = %08x\n", ioc->name, s));
2309 sc = s & MPI_IOC_STATE_MASK;
2312 ioc->last_state = sc;
2314 return cooked ? sc : s;
2317 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2319 * GetIocFacts - Send IOCFacts request to MPT adapter.
2320 * @ioc: Pointer to MPT_ADAPTER structure
2321 * @sleepFlag: Specifies whether the process can sleep
2322 * @reason: If recovery, only update facts.
2324 * Returns 0 for success, non-zero for failure.
2327 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
2329 IOCFacts_t get_facts;
2330 IOCFactsReply_t *facts;
2338 /* IOC *must* NOT be in RESET state! */
2339 if (ioc->last_state == MPI_IOC_STATE_RESET) {
2340 printk(KERN_ERR MYNAM ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
2346 facts = &ioc->facts;
2348 /* Destination (reply area)... */
2349 reply_sz = sizeof(*facts);
2350 memset(facts, 0, reply_sz);
2352 /* Request area (get_facts on the stack right now!) */
2353 req_sz = sizeof(get_facts);
2354 memset(&get_facts, 0, req_sz);
2356 get_facts.Function = MPI_FUNCTION_IOC_FACTS;
2357 /* Assert: All other get_facts fields are zero! */
2359 dinitprintk((MYIOC_s_INFO_FMT
2360 "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
2361 ioc->name, req_sz, reply_sz));
2363 /* No non-zero fields in the get_facts request are greater than
2364 * 1 byte in size, so we can just fire it off as is.
2366 r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
2367 reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
2372 * Now byte swap (GRRR) the necessary fields before any further
2373 * inspection of reply contents.
2375 * But need to do some sanity checks on MsgLength (byte) field
2376 * to make sure we don't zero IOC's req_sz!
2378 /* Did we get a valid reply? */
2379 if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
2380 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2382 * If not been here, done that, save off first WhoInit value
2384 if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
2385 ioc->FirstWhoInit = facts->WhoInit;
2388 facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
2389 facts->MsgContext = le32_to_cpu(facts->MsgContext);
2390 facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
2391 facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
2392 facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
2393 status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
2394 /* CHECKME! IOCStatus, IOCLogInfo */
2396 facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
2397 facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
2400 * FC f/w version changed between 1.1 and 1.2
2401 * Old: u16{Major(4),Minor(4),SubMinor(8)}
2402 * New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
2404 if (facts->MsgVersion < 0x0102) {
2406 * Handle old FC f/w style, convert to new...
2408 u16 oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
2409 facts->FWVersion.Word =
2410 ((oldv<<12) & 0xFF000000) |
2411 ((oldv<<8) & 0x000FFF00);
2413 facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
2415 facts->ProductID = le16_to_cpu(facts->ProductID);
2416 facts->CurrentHostMfaHighAddr =
2417 le32_to_cpu(facts->CurrentHostMfaHighAddr);
2418 facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
2419 facts->CurrentSenseBufferHighAddr =
2420 le32_to_cpu(facts->CurrentSenseBufferHighAddr);
2421 facts->CurReplyFrameSize =
2422 le16_to_cpu(facts->CurReplyFrameSize);
2423 facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
2426 * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
2427 * Older MPI-1.00.xx struct had 13 dwords, and enlarged
2428 * to 14 in MPI-1.01.0x.
2430 if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
2431 facts->MsgVersion > 0x0100) {
2432 facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
2435 sz = facts->FWImageSize;
2440 facts->FWImageSize = sz;
2442 if (!facts->RequestFrameSize) {
2443 /* Something is wrong! */
2444 printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
2449 r = sz = facts->BlockSize;
2450 vv = ((63 / (sz * 4)) + 1) & 0x03;
2451 ioc->NB_for_64_byte_frame = vv;
2457 ioc->NBShiftFactor = shiftFactor;
2458 dinitprintk((MYIOC_s_INFO_FMT "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
2459 ioc->name, vv, shiftFactor, r));
2461 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2463 * Set values for this IOC's request & reply frame sizes,
2464 * and request & reply queue depths...
2466 ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
2467 ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
2468 ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
2469 ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
2471 dinitprintk((MYIOC_s_INFO_FMT "reply_sz=%3d, reply_depth=%4d\n",
2472 ioc->name, ioc->reply_sz, ioc->reply_depth));
2473 dinitprintk((MYIOC_s_INFO_FMT "req_sz =%3d, req_depth =%4d\n",
2474 ioc->name, ioc->req_sz, ioc->req_depth));
2476 /* Get port facts! */
2477 if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
2481 printk(MYIOC_s_ERR_FMT
2482 "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
2483 ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
2484 RequestFrameSize)/sizeof(u32)));
2491 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2493 * GetPortFacts - Send PortFacts request to MPT adapter.
2494 * @ioc: Pointer to MPT_ADAPTER structure
2495 * @portnum: Port number
2496 * @sleepFlag: Specifies whether the process can sleep
2498 * Returns 0 for success, non-zero for failure.
2501 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
2503 PortFacts_t get_pfacts;
2504 PortFactsReply_t *pfacts;
2509 /* IOC *must* NOT be in RESET state! */
2510 if (ioc->last_state == MPI_IOC_STATE_RESET) {
2511 printk(KERN_ERR MYNAM ": ERROR - Can't get PortFacts, %s NOT READY! (%08x)\n",
2517 pfacts = &ioc->pfacts[portnum];
2519 /* Destination (reply area)... */
2520 reply_sz = sizeof(*pfacts);
2521 memset(pfacts, 0, reply_sz);
2523 /* Request area (get_pfacts on the stack right now!) */
2524 req_sz = sizeof(get_pfacts);
2525 memset(&get_pfacts, 0, req_sz);
2527 get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
2528 get_pfacts.PortNumber = portnum;
2529 /* Assert: All other get_pfacts fields are zero! */
2531 dinitprintk((MYIOC_s_INFO_FMT "Sending get PortFacts(%d) request\n",
2532 ioc->name, portnum));
2534 /* No non-zero fields in the get_pfacts request are greater than
2535 * 1 byte in size, so we can just fire it off as is.
2537 ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
2538 reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
2542 /* Did we get a valid reply? */
2544 /* Now byte swap the necessary fields in the response. */
2545 pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
2546 pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
2547 pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
2548 pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
2549 pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
2550 pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
2551 pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
2552 pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
2553 pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
2558 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2560 * SendIocInit - Send IOCInit request to MPT adapter.
2561 * @ioc: Pointer to MPT_ADAPTER structure
2562 * @sleepFlag: Specifies whether the process can sleep
2564 * Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
2566 * Returns 0 for success, non-zero for failure.
2569 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
2572 MPIDefaultReply_t init_reply;
2578 memset(&ioc_init, 0, sizeof(ioc_init));
2579 memset(&init_reply, 0, sizeof(init_reply));
2581 ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
2582 ioc_init.Function = MPI_FUNCTION_IOC_INIT;
2584 /* If we are in a recovery mode and we uploaded the FW image,
2585 * then this pointer is not NULL. Skip the upload a second time.
2586 * Set this flag if cached_fw set for either IOC.
2588 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
2592 ddlprintk((MYIOC_s_INFO_FMT "upload_fw %d facts.Flags=%x\n",
2593 ioc->name, ioc->upload_fw, ioc->facts.Flags));
2595 if(ioc->bus_type == SAS)
2596 ioc_init.MaxDevices = ioc->facts.MaxDevices;
2597 else if(ioc->bus_type == FC)
2598 ioc_init.MaxDevices = MPT_MAX_FC_DEVICES;
2600 ioc_init.MaxDevices = MPT_MAX_SCSI_DEVICES;
2601 ioc_init.MaxBuses = MPT_MAX_BUS;
2602 dinitprintk((MYIOC_s_INFO_FMT "facts.MsgVersion=%x\n",
2603 ioc->name, ioc->facts.MsgVersion));
2604 if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
2605 // set MsgVersion and HeaderVersion host driver was built with
2606 ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
2607 ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
2609 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
2610 ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
2611 } else if(mpt_host_page_alloc(ioc, &ioc_init))
2614 ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz); /* in BYTES */
2616 if (sizeof(dma_addr_t) == sizeof(u64)) {
2617 /* Save the upper 32-bits of the request
2618 * (reply) and sense buffers.
2620 ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
2621 ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
2623 /* Force 32-bit addressing */
2624 ioc_init.HostMfaHighAddr = cpu_to_le32(0);
2625 ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
2628 ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
2629 ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
2630 ioc->facts.MaxDevices = ioc_init.MaxDevices;
2631 ioc->facts.MaxBuses = ioc_init.MaxBuses;
2633 dhsprintk((MYIOC_s_INFO_FMT "Sending IOCInit (req @ %p)\n",
2634 ioc->name, &ioc_init));
2636 r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
2637 sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
2639 printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
2643 /* No need to byte swap the multibyte fields in the reply
2644 * since we don't even look at it's contents.
2647 dhsprintk((MYIOC_s_INFO_FMT "Sending PortEnable (req @ %p)\n",
2648 ioc->name, &ioc_init));
2650 if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
2651 printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
2655 /* YIKES! SUPER IMPORTANT!!!
2656 * Poll IocState until _OPERATIONAL while IOC is doing
2657 * LoopInit and TargetDiscovery!
2660 cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60; /* 60 seconds */
2661 state = mpt_GetIocState(ioc, 1);
2662 while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
2663 if (sleepFlag == CAN_SLEEP) {
2664 msleep_interruptible(1);
2670 printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
2671 ioc->name, (int)((count+5)/HZ));
2675 state = mpt_GetIocState(ioc, 1);
2678 dinitprintk((MYIOC_s_INFO_FMT "INFO - Wait IOC_OPERATIONAL state (cnt=%d)\n",
2684 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2686 * SendPortEnable - Send PortEnable request to MPT adapter port.
2687 * @ioc: Pointer to MPT_ADAPTER structure
2688 * @portnum: Port number to enable
2689 * @sleepFlag: Specifies whether the process can sleep
2691 * Send PortEnable to bring IOC to OPERATIONAL state.
2693 * Returns 0 for success, non-zero for failure.
2696 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
2698 PortEnable_t port_enable;
2699 MPIDefaultReply_t reply_buf;
2704 /* Destination... */
2705 reply_sz = sizeof(MPIDefaultReply_t);
2706 memset(&reply_buf, 0, reply_sz);
2708 req_sz = sizeof(PortEnable_t);
2709 memset(&port_enable, 0, req_sz);
2711 port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
2712 port_enable.PortNumber = portnum;
2713 /* port_enable.ChainOffset = 0; */
2714 /* port_enable.MsgFlags = 0; */
2715 /* port_enable.MsgContext = 0; */
2717 dinitprintk((MYIOC_s_INFO_FMT "Sending Port(%d)Enable (req @ %p)\n",
2718 ioc->name, portnum, &port_enable));
2720 /* RAID FW may take a long time to enable
2722 if (((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
2723 > MPI_FW_HEADER_PID_PROD_TARGET_SCSI) ||
2724 (ioc->bus_type == SAS)) {
2725 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
2726 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
2727 300 /*seconds*/, sleepFlag);
2729 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
2730 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
2731 30 /*seconds*/, sleepFlag);
2737 * ioc: Pointer to MPT_ADAPTER structure
2738 * size - total FW bytes
2741 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
2744 return; /* use already allocated memory */
2745 if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2746 ioc->cached_fw = ioc->alt_ioc->cached_fw; /* use alt_ioc's memory */
2747 ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
2749 if ( (ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma) ) )
2750 ioc->alloc_total += size;
2754 * If alt_img is NULL, delete from ioc structure.
2755 * Else, delete a secondary image in same format.
2758 mpt_free_fw_memory(MPT_ADAPTER *ioc)
2762 sz = ioc->facts.FWImageSize;
2763 dinitprintk((KERN_INFO MYNAM "free_fw_memory: FW Image @ %p[%p], sz=%d[%x] bytes\n",
2764 ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
2765 pci_free_consistent(ioc->pcidev, sz,
2766 ioc->cached_fw, ioc->cached_fw_dma);
2767 ioc->cached_fw = NULL;
2773 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2775 * mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
2776 * @ioc: Pointer to MPT_ADAPTER structure
2777 * @sleepFlag: Specifies whether the process can sleep
2779 * Returns 0 for success, >0 for handshake failure
2780 * <0 for fw upload failure.
2782 * Remark: If bound IOC and a successful FWUpload was performed
2783 * on the bound IOC, the second image is discarded
2784 * and memory is free'd. Both channels must upload to prevent
2785 * IOC from running in degraded mode.
2788 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
2790 u8 request[ioc->req_sz];
2791 u8 reply[sizeof(FWUploadReply_t)];
2792 FWUpload_t *prequest;
2793 FWUploadReply_t *preply;
2794 FWUploadTCSGE_t *ptcsge;
2797 int ii, sz, reply_sz;
2800 /* If the image size is 0, we are done.
2802 if ((sz = ioc->facts.FWImageSize) == 0)
2805 mpt_alloc_fw_memory(ioc, sz);
2807 dinitprintk((KERN_INFO MYNAM ": FW Image @ %p[%p], sz=%d[%x] bytes\n",
2808 ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
2810 if (ioc->cached_fw == NULL) {
2816 prequest = (FWUpload_t *)&request;
2817 preply = (FWUploadReply_t *)&reply;
2819 /* Destination... */
2820 memset(prequest, 0, ioc->req_sz);
2822 reply_sz = sizeof(reply);
2823 memset(preply, 0, reply_sz);
2825 prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
2826 prequest->Function = MPI_FUNCTION_FW_UPLOAD;
2828 ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
2829 ptcsge->DetailsLength = 12;
2830 ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
2831 ptcsge->ImageSize = cpu_to_le32(sz);
2833 sgeoffset = sizeof(FWUpload_t) - sizeof(SGE_MPI_UNION) + sizeof(FWUploadTCSGE_t);
2835 flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
2836 mpt_add_sge(&request[sgeoffset], flagsLength, ioc->cached_fw_dma);
2838 sgeoffset += sizeof(u32) + sizeof(dma_addr_t);
2839 dinitprintk((KERN_INFO MYNAM ": Sending FW Upload (req @ %p) sgeoffset=%d \n",
2840 prequest, sgeoffset));
2841 DBG_DUMP_FW_REQUEST_FRAME(prequest)
2843 ii = mpt_handshake_req_reply_wait(ioc, sgeoffset, (u32*)prequest,
2844 reply_sz, (u16*)preply, 65 /*seconds*/, sleepFlag);
2846 dinitprintk((KERN_INFO MYNAM ": FW Upload completed rc=%x \n", ii));
2848 cmdStatus = -EFAULT;
2850 /* Handshake transfer was complete and successful.
2851 * Check the Reply Frame.
2853 int status, transfer_sz;
2854 status = le16_to_cpu(preply->IOCStatus);
2855 if (status == MPI_IOCSTATUS_SUCCESS) {
2856 transfer_sz = le32_to_cpu(preply->ActualImageSize);
2857 if (transfer_sz == sz)
2861 dinitprintk((MYIOC_s_INFO_FMT ": do_upload cmdStatus=%d \n",
2862 ioc->name, cmdStatus));
2867 ddlprintk((MYIOC_s_INFO_FMT ": fw upload failed, freeing image \n",
2869 mpt_free_fw_memory(ioc);
2875 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2877 * mpt_downloadboot - DownloadBoot code
2878 * @ioc: Pointer to MPT_ADAPTER structure
2879 * @flag: Specify which part of IOC memory is to be uploaded.
2880 * @sleepFlag: Specifies whether the process can sleep
2882 * FwDownloadBoot requires Programmed IO access.
2884 * Returns 0 for success
2885 * -1 FW Image size is 0
2886 * -2 No valid cached_fw Pointer
2887 * <0 for fw upload failure.
2890 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
2892 MpiExtImageHeader_t *pExtImage;
2902 ddlprintk((MYIOC_s_INFO_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
2903 ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
2905 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
2906 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
2907 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
2908 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
2909 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
2910 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
2912 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
2915 if (sleepFlag == CAN_SLEEP) {
2916 msleep_interruptible(1);
2921 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
2922 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
2924 for (count = 0; count < 30; count ++) {
2925 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
2926 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
2927 ddlprintk((MYIOC_s_INFO_FMT "RESET_ADAPTER cleared, count=%d\n",
2932 if (sleepFlag == CAN_SLEEP) {
2933 msleep_interruptible (100);
2939 if ( count == 30 ) {
2940 ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! "
2941 "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
2942 ioc->name, diag0val));
2946 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
2947 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
2948 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
2949 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
2950 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
2951 CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
2953 /* Set the DiagRwEn and Disable ARM bits */
2954 CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
2956 fwSize = (pFwHeader->ImageSize + 3)/4;
2957 ptrFw = (u32 *) pFwHeader;
2959 /* Write the LoadStartAddress to the DiagRw Address Register
2960 * using Programmed IO
2962 if (ioc->errata_flag_1064)
2963 pci_enable_io_access(ioc->pcidev);
2965 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
2966 ddlprintk((MYIOC_s_INFO_FMT "LoadStart addr written 0x%x \n",
2967 ioc->name, pFwHeader->LoadStartAddress));
2969 ddlprintk((MYIOC_s_INFO_FMT "Write FW Image: 0x%x bytes @ %p\n",
2970 ioc->name, fwSize*4, ptrFw));
2972 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
2975 nextImage = pFwHeader->NextImageHeaderOffset;
2977 pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
2979 load_addr = pExtImage->LoadStartAddress;
2981 fwSize = (pExtImage->ImageSize + 3) >> 2;
2982 ptrFw = (u32 *)pExtImage;
2984 ddlprintk((MYIOC_s_INFO_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
2985 ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
2986 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
2989 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
2991 nextImage = pExtImage->NextImageHeaderOffset;
2994 /* Write the IopResetVectorRegAddr */
2995 ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Addr=%x! \n", ioc->name, pFwHeader->IopResetRegAddr));
2996 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
2998 /* Write the IopResetVectorValue */
2999 ddlprintk((MYIOC_s_INFO_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3000 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3002 /* Clear the internal flash bad bit - autoincrementing register,
3003 * so must do two writes.
3005 if (ioc->bus_type == SPI) {
3007 * 1030 and 1035 H/W errata, workaround to access
3008 * the ClearFlashBadSignatureBit
3010 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3011 diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3012 diagRwData |= 0x40000000;
3013 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3014 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3016 } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3017 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3018 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3019 MPI_DIAG_CLEAR_FLASH_BAD_SIG);
3022 if (sleepFlag == CAN_SLEEP) {
3023 msleep_interruptible (1);
3029 if (ioc->errata_flag_1064)
3030 pci_disable_io_access(ioc->pcidev);
3032 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3033 ddlprintk((MYIOC_s_INFO_FMT "downloadboot diag0val=%x, "
3034 "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
3035 ioc->name, diag0val));
3036 diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
3037 ddlprintk((MYIOC_s_INFO_FMT "downloadboot now diag0val=%x\n",
3038 ioc->name, diag0val));
3039 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3041 /* Write 0xFF to reset the sequencer */
3042 CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3044 if (ioc->bus_type == SAS) {
3045 ioc_state = mpt_GetIocState(ioc, 0);
3046 if ( (GetIocFacts(ioc, sleepFlag,
3047 MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
3048 ddlprintk((MYIOC_s_INFO_FMT "GetIocFacts failed: IocState=%x\n",
3049 ioc->name, ioc_state));
3054 for (count=0; count<HZ*20; count++) {
3055 if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3056 ddlprintk((MYIOC_s_INFO_FMT "downloadboot successful! (count=%d) IocState=%x\n",
3057 ioc->name, count, ioc_state));
3058 if (ioc->bus_type == SAS) {
3061 if ((SendIocInit(ioc, sleepFlag)) != 0) {
3062 ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit failed\n",
3066 ddlprintk((MYIOC_s_INFO_FMT "downloadboot: SendIocInit successful\n",
3070 if (sleepFlag == CAN_SLEEP) {
3071 msleep_interruptible (10);
3076 ddlprintk((MYIOC_s_INFO_FMT "downloadboot failed! IocState=%x\n",
3077 ioc->name, ioc_state));
3081 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3083 * KickStart - Perform hard reset of MPT adapter.
3084 * @ioc: Pointer to MPT_ADAPTER structure
3085 * @force: Force hard reset
3086 * @sleepFlag: Specifies whether the process can sleep
3088 * This routine places MPT adapter in diagnostic mode via the
3089 * WriteSequence register, and then performs a hard reset of adapter
3090 * via the Diagnostic register.
3092 * Inputs: sleepflag - CAN_SLEEP (non-interrupt thread)
3093 * or NO_SLEEP (interrupt thread, use mdelay)
3094 * force - 1 if doorbell active, board fault state
3095 * board operational, IOC_RECOVERY or
3096 * IOC_BRINGUP and there is an alt_ioc.
3100 * 1 - hard reset, READY
3101 * 0 - no reset due to History bit, READY
3102 * -1 - no reset due to History bit but not READY
3103 * OR reset but failed to come READY
3104 * -2 - no reset, could not enter DIAG mode
3105 * -3 - reset but bad FW bit
3108 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3110 int hard_reset_done = 0;
3114 dinitprintk((KERN_WARNING MYNAM ": KickStarting %s!\n", ioc->name));
3115 if (ioc->bus_type == SPI) {
3116 /* Always issue a Msg Unit Reset first. This will clear some
3117 * SCSI bus hang conditions.
3119 SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3121 if (sleepFlag == CAN_SLEEP) {
3122 msleep_interruptible (1000);