22cb0f8b2bcd36866ee62673ecb62b8d8863df05
[linux-2.6.git] / drivers / message / fusion / mptbase.c
1 /*
2  *  linux/drivers/message/fusion/mptbase.c
3  *      This is the Fusion MPT base driver which supports multiple
4  *      (SCSI + LAN) specialized protocol drivers.
5  *      For use with LSI PCI chip/adapter(s)
6  *      running LSI Fusion MPT (Message Passing Technology) firmware.
7  *
8  *  Copyright (c) 1999-2007 LSI Corporation
9  *  (mailto:DL-MPTFusionLinux@lsi.com)
10  *
11  */
12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
13 /*
14     This program is free software; you can redistribute it and/or modify
15     it under the terms of the GNU General Public License as published by
16     the Free Software Foundation; version 2 of the License.
17
18     This program is distributed in the hope that it will be useful,
19     but WITHOUT ANY WARRANTY; without even the implied warranty of
20     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21     GNU General Public License for more details.
22
23     NO WARRANTY
24     THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
25     CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
26     LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
27     MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
28     solely responsible for determining the appropriateness of using and
29     distributing the Program and assumes all risks associated with its
30     exercise of rights under this Agreement, including but not limited to
31     the risks and costs of program errors, damage to or loss of data,
32     programs or equipment, and unavailability or interruption of operations.
33
34     DISCLAIMER OF LIABILITY
35     NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
36     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37     DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
38     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
39     TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
40     USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
41     HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
42
43     You should have received a copy of the GNU General Public License
44     along with this program; if not, write to the Free Software
45     Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
46 */
47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
48
49 #include <linux/kernel.h>
50 #include <linux/module.h>
51 #include <linux/errno.h>
52 #include <linux/init.h>
53 #include <linux/slab.h>
54 #include <linux/types.h>
55 #include <linux/pci.h>
56 #include <linux/kdev_t.h>
57 #include <linux/blkdev.h>
58 #include <linux/delay.h>
59 #include <linux/interrupt.h>            /* needed for in_interrupt() proto */
60 #include <linux/dma-mapping.h>
61 #include <asm/io.h>
62 #ifdef CONFIG_MTRR
63 #include <asm/mtrr.h>
64 #endif
65
66 #include "mptbase.h"
67 #include "lsi/mpi_log_fc.h"
68
69 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
70 #define my_NAME         "Fusion MPT base driver"
71 #define my_VERSION      MPT_LINUX_VERSION_COMMON
72 #define MYNAM           "mptbase"
73
74 MODULE_AUTHOR(MODULEAUTHOR);
75 MODULE_DESCRIPTION(my_NAME);
76 MODULE_LICENSE("GPL");
77 MODULE_VERSION(my_VERSION);
78
79 /*
80  *  cmd line parameters
81  */
82 static int mpt_msi_enable;
83 module_param(mpt_msi_enable, int, 0);
84 MODULE_PARM_DESC(mpt_msi_enable, " MSI Support Enable (default=0)");
85
86 static int mpt_channel_mapping;
87 module_param(mpt_channel_mapping, int, 0);
88 MODULE_PARM_DESC(mpt_channel_mapping, " Mapping id's to channels (default=0)");
89
90 static int mpt_debug_level;
91 static int mpt_set_debug_level(const char *val, struct kernel_param *kp);
92 module_param_call(mpt_debug_level, mpt_set_debug_level, param_get_int,
93                   &mpt_debug_level, 0600);
94 MODULE_PARM_DESC(mpt_debug_level, " debug level - refer to mptdebug.h - (default=0)");
95
96 #ifdef MFCNT
97 static int mfcounter = 0;
98 #define PRINT_MF_COUNT 20000
99 #endif
100
101 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
102 /*
103  *  Public data...
104  */
105
106 struct proc_dir_entry *mpt_proc_root_dir;
107
108 #define WHOINIT_UNKNOWN         0xAA
109
110 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
111 /*
112  *  Private data...
113  */
114                                         /* Adapter link list */
115 LIST_HEAD(ioc_list);
116                                         /* Callback lookup table */
117 static MPT_CALLBACK              MptCallbacks[MPT_MAX_PROTOCOL_DRIVERS];
118                                         /* Protocol driver class lookup table */
119 static int                       MptDriverClass[MPT_MAX_PROTOCOL_DRIVERS];
120                                         /* Event handler lookup table */
121 static MPT_EVHANDLER             MptEvHandlers[MPT_MAX_PROTOCOL_DRIVERS];
122                                         /* Reset handler lookup table */
123 static MPT_RESETHANDLER          MptResetHandlers[MPT_MAX_PROTOCOL_DRIVERS];
124 static struct mpt_pci_driver    *MptDeviceDriverHandlers[MPT_MAX_PROTOCOL_DRIVERS];
125
126 static DECLARE_WAIT_QUEUE_HEAD(mpt_waitq);
127
128 /*
129  *  Driver Callback Index's
130  */
131 static u8 mpt_base_index = MPT_MAX_PROTOCOL_DRIVERS;
132 static u8 last_drv_idx;
133
134 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
135 /*
136  *  Forward protos...
137  */
138 static irqreturn_t mpt_interrupt(int irq, void *bus_id);
139 static int      mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *req, MPT_FRAME_HDR *reply);
140 static int      mpt_handshake_req_reply_wait(MPT_ADAPTER *ioc, int reqBytes,
141                         u32 *req, int replyBytes, u16 *u16reply, int maxwait,
142                         int sleepFlag);
143 static int      mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag);
144 static void     mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev);
145 static void     mpt_adapter_disable(MPT_ADAPTER *ioc);
146 static void     mpt_adapter_dispose(MPT_ADAPTER *ioc);
147
148 static void     MptDisplayIocCapabilities(MPT_ADAPTER *ioc);
149 static int      MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag);
150 static int      GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason);
151 static int      GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
152 static int      SendIocInit(MPT_ADAPTER *ioc, int sleepFlag);
153 static int      SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag);
154 static int      mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag);
155 static int      mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag);
156 static int      mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
157 static int      KickStart(MPT_ADAPTER *ioc, int ignore, int sleepFlag);
158 static int      SendIocReset(MPT_ADAPTER *ioc, u8 reset_type, int sleepFlag);
159 static int      PrimeIocFifos(MPT_ADAPTER *ioc);
160 static int      WaitForDoorbellAck(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
161 static int      WaitForDoorbellInt(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
162 static int      WaitForDoorbellReply(MPT_ADAPTER *ioc, int howlong, int sleepFlag);
163 static int      GetLanConfigPages(MPT_ADAPTER *ioc);
164 static int      GetIoUnitPage2(MPT_ADAPTER *ioc);
165 int             mptbase_sas_persist_operation(MPT_ADAPTER *ioc, u8 persist_opcode);
166 static int      mpt_GetScsiPortSettings(MPT_ADAPTER *ioc, int portnum);
167 static int      mpt_readScsiDevicePageHeaders(MPT_ADAPTER *ioc, int portnum);
168 static void     mpt_read_ioc_pg_1(MPT_ADAPTER *ioc);
169 static void     mpt_read_ioc_pg_4(MPT_ADAPTER *ioc);
170 static void     mpt_timer_expired(unsigned long data);
171 static void     mpt_get_manufacturing_pg_0(MPT_ADAPTER *ioc);
172 static int      SendEventNotification(MPT_ADAPTER *ioc, u8 EvSwitch);
173 static int      SendEventAck(MPT_ADAPTER *ioc, EventNotificationReply_t *evnp);
174 static int      mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag);
175 static int      mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init);
176
177 #ifdef CONFIG_PROC_FS
178 static int      procmpt_summary_read(char *buf, char **start, off_t offset,
179                                 int request, int *eof, void *data);
180 static int      procmpt_version_read(char *buf, char **start, off_t offset,
181                                 int request, int *eof, void *data);
182 static int      procmpt_iocinfo_read(char *buf, char **start, off_t offset,
183                                 int request, int *eof, void *data);
184 #endif
185 static void     mpt_get_fw_exp_ver(char *buf, MPT_ADAPTER *ioc);
186
187 //int           mpt_HardResetHandler(MPT_ADAPTER *ioc, int sleepFlag);
188 static int      ProcessEventNotification(MPT_ADAPTER *ioc, EventNotificationReply_t *evReply, int *evHandlers);
189 static void     mpt_iocstatus_info(MPT_ADAPTER *ioc, u32 ioc_status, MPT_FRAME_HDR *mf);
190 static void     mpt_fc_log_info(MPT_ADAPTER *ioc, u32 log_info);
191 static void     mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info);
192 static void     mpt_sas_log_info(MPT_ADAPTER *ioc, u32 log_info);
193 static int      mpt_read_ioc_pg_3(MPT_ADAPTER *ioc);
194 static void     mpt_inactive_raid_list_free(MPT_ADAPTER *ioc);
195
196 /* module entry point */
197 static int  __init    fusion_init  (void);
198 static void __exit    fusion_exit  (void);
199
200 #define CHIPREG_READ32(addr)            readl_relaxed(addr)
201 #define CHIPREG_READ32_dmasync(addr)    readl(addr)
202 #define CHIPREG_WRITE32(addr,val)       writel(val, addr)
203 #define CHIPREG_PIO_WRITE32(addr,val)   outl(val, (unsigned long)addr)
204 #define CHIPREG_PIO_READ32(addr)        inl((unsigned long)addr)
205
206 static void
207 pci_disable_io_access(struct pci_dev *pdev)
208 {
209         u16 command_reg;
210
211         pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
212         command_reg &= ~1;
213         pci_write_config_word(pdev, PCI_COMMAND, command_reg);
214 }
215
216 static void
217 pci_enable_io_access(struct pci_dev *pdev)
218 {
219         u16 command_reg;
220
221         pci_read_config_word(pdev, PCI_COMMAND, &command_reg);
222         command_reg |= 1;
223         pci_write_config_word(pdev, PCI_COMMAND, command_reg);
224 }
225
226 static int mpt_set_debug_level(const char *val, struct kernel_param *kp)
227 {
228         int ret = param_set_int(val, kp);
229         MPT_ADAPTER *ioc;
230
231         if (ret)
232                 return ret;
233
234         list_for_each_entry(ioc, &ioc_list, list)
235                 ioc->debug_level = mpt_debug_level;
236         return 0;
237 }
238
239 /**
240  *      mpt_get_cb_idx - obtain cb_idx for registered driver
241  *      @dclass: class driver enum
242  *
243  *      Returns cb_idx, or zero means it wasn't found
244  **/
245 static u8
246 mpt_get_cb_idx(MPT_DRIVER_CLASS dclass)
247 {
248         u8 cb_idx;
249
250         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--)
251                 if (MptDriverClass[cb_idx] == dclass)
252                         return cb_idx;
253         return 0;
254 }
255
256 /*
257  *  Process turbo (context) reply...
258  */
259 static void
260 mpt_turbo_reply(MPT_ADAPTER *ioc, u32 pa)
261 {
262         MPT_FRAME_HDR *mf = NULL;
263         MPT_FRAME_HDR *mr = NULL;
264         u16 req_idx = 0;
265         u8 cb_idx;
266
267         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got TURBO reply req_idx=%08x\n",
268                                 ioc->name, pa));
269
270         switch (pa >> MPI_CONTEXT_REPLY_TYPE_SHIFT) {
271         case MPI_CONTEXT_REPLY_TYPE_SCSI_INIT:
272                 req_idx = pa & 0x0000FFFF;
273                 cb_idx = (pa & 0x00FF0000) >> 16;
274                 mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
275                 break;
276         case MPI_CONTEXT_REPLY_TYPE_LAN:
277                 cb_idx = mpt_get_cb_idx(MPTLAN_DRIVER);
278                 /*
279                  *  Blind set of mf to NULL here was fatal
280                  *  after lan_reply says "freeme"
281                  *  Fix sort of combined with an optimization here;
282                  *  added explicit check for case where lan_reply
283                  *  was just returning 1 and doing nothing else.
284                  *  For this case skip the callback, but set up
285                  *  proper mf value first here:-)
286                  */
287                 if ((pa & 0x58000000) == 0x58000000) {
288                         req_idx = pa & 0x0000FFFF;
289                         mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
290                         mpt_free_msg_frame(ioc, mf);
291                         mb();
292                         return;
293                         break;
294                 }
295                 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
296                 break;
297         case MPI_CONTEXT_REPLY_TYPE_SCSI_TARGET:
298                 cb_idx = mpt_get_cb_idx(MPTSTM_DRIVER);
299                 mr = (MPT_FRAME_HDR *) CAST_U32_TO_PTR(pa);
300                 break;
301         default:
302                 cb_idx = 0;
303                 BUG();
304         }
305
306         /*  Check for (valid) IO callback!  */
307         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
308                         MptCallbacks[cb_idx] == NULL) {
309                 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
310                                 __FUNCTION__, ioc->name, cb_idx);
311                 goto out;
312         }
313
314         if (MptCallbacks[cb_idx](ioc, mf, mr))
315                 mpt_free_msg_frame(ioc, mf);
316  out:
317         mb();
318 }
319
320 static void
321 mpt_reply(MPT_ADAPTER *ioc, u32 pa)
322 {
323         MPT_FRAME_HDR   *mf;
324         MPT_FRAME_HDR   *mr;
325         u16              req_idx;
326         u8               cb_idx;
327         int              freeme;
328
329         u32 reply_dma_low;
330         u16 ioc_stat;
331
332         /* non-TURBO reply!  Hmmm, something may be up...
333          *  Newest turbo reply mechanism; get address
334          *  via left shift 1 (get rid of MPI_ADDRESS_REPLY_A_BIT)!
335          */
336
337         /* Map DMA address of reply header to cpu address.
338          * pa is 32 bits - but the dma address may be 32 or 64 bits
339          * get offset based only only the low addresses
340          */
341
342         reply_dma_low = (pa <<= 1);
343         mr = (MPT_FRAME_HDR *)((u8 *)ioc->reply_frames +
344                          (reply_dma_low - ioc->reply_frames_low_dma));
345
346         req_idx = le16_to_cpu(mr->u.frame.hwhdr.msgctxu.fld.req_idx);
347         cb_idx = mr->u.frame.hwhdr.msgctxu.fld.cb_idx;
348         mf = MPT_INDEX_2_MFPTR(ioc, req_idx);
349
350         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Got non-TURBO reply=%p req_idx=%x cb_idx=%x Function=%x\n",
351                         ioc->name, mr, req_idx, cb_idx, mr->u.hdr.Function));
352         DBG_DUMP_REPLY_FRAME(ioc, (u32 *)mr)
353
354          /*  Check/log IOC log info
355          */
356         ioc_stat = le16_to_cpu(mr->u.reply.IOCStatus);
357         if (ioc_stat & MPI_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
358                 u32      log_info = le32_to_cpu(mr->u.reply.IOCLogInfo);
359                 if (ioc->bus_type == FC)
360                         mpt_fc_log_info(ioc, log_info);
361                 else if (ioc->bus_type == SPI)
362                         mpt_spi_log_info(ioc, log_info);
363                 else if (ioc->bus_type == SAS)
364                         mpt_sas_log_info(ioc, log_info);
365         }
366
367         if (ioc_stat & MPI_IOCSTATUS_MASK)
368                 mpt_iocstatus_info(ioc, (u32)ioc_stat, mf);
369
370         /*  Check for (valid) IO callback!  */
371         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS ||
372                         MptCallbacks[cb_idx] == NULL) {
373                 printk(MYIOC_s_WARN_FMT "%s: Invalid cb_idx (%d)!\n",
374                                 __FUNCTION__, ioc->name, cb_idx);
375                 freeme = 0;
376                 goto out;
377         }
378
379         freeme = MptCallbacks[cb_idx](ioc, mf, mr);
380
381  out:
382         /*  Flush (non-TURBO) reply with a WRITE!  */
383         CHIPREG_WRITE32(&ioc->chip->ReplyFifo, pa);
384
385         if (freeme)
386                 mpt_free_msg_frame(ioc, mf);
387         mb();
388 }
389
390 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
391 /**
392  *      mpt_interrupt - MPT adapter (IOC) specific interrupt handler.
393  *      @irq: irq number (not used)
394  *      @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
395  *
396  *      This routine is registered via the request_irq() kernel API call,
397  *      and handles all interrupts generated from a specific MPT adapter
398  *      (also referred to as a IO Controller or IOC).
399  *      This routine must clear the interrupt from the adapter and does
400  *      so by reading the reply FIFO.  Multiple replies may be processed
401  *      per single call to this routine.
402  *
403  *      This routine handles register-level access of the adapter but
404  *      dispatches (calls) a protocol-specific callback routine to handle
405  *      the protocol-specific details of the MPT request completion.
406  */
407 static irqreturn_t
408 mpt_interrupt(int irq, void *bus_id)
409 {
410         MPT_ADAPTER *ioc = bus_id;
411         u32 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
412
413         if (pa == 0xFFFFFFFF)
414                 return IRQ_NONE;
415
416         /*
417          *  Drain the reply FIFO!
418          */
419         do {
420                 if (pa & MPI_ADDRESS_REPLY_A_BIT)
421                         mpt_reply(ioc, pa);
422                 else
423                         mpt_turbo_reply(ioc, pa);
424                 pa = CHIPREG_READ32_dmasync(&ioc->chip->ReplyFifo);
425         } while (pa != 0xFFFFFFFF);
426
427         return IRQ_HANDLED;
428 }
429
430 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
431 /**
432  *      mpt_base_reply - MPT base driver's callback routine
433  *      @ioc: Pointer to MPT_ADAPTER structure
434  *      @mf: Pointer to original MPT request frame
435  *      @reply: Pointer to MPT reply frame (NULL if TurboReply)
436  *
437  *      MPT base driver's callback routine; all base driver
438  *      "internal" request/reply processing is routed here.
439  *      Currently used for EventNotification and EventAck handling.
440  *
441  *      Returns 1 indicating original alloc'd request frame ptr
442  *      should be freed, or 0 if it shouldn't.
443  */
444 static int
445 mpt_base_reply(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf, MPT_FRAME_HDR *reply)
446 {
447         int freereq = 1;
448         u8 func;
449
450         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_base_reply() called\n", ioc->name));
451 #ifdef CONFIG_FUSION_LOGGING
452         if ((ioc->debug_level & MPT_DEBUG_MSG_FRAME) &&
453                         !(reply->u.hdr.MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY)) {
454                 dmfprintk(ioc, printk(KERN_INFO MYNAM ": Original request frame (@%p) header\n", mf));
455                 DBG_DUMP_REQUEST_FRAME_HDR(ioc, (u32 *)mf)
456         }
457 #endif
458
459         func = reply->u.hdr.Function;
460         dmfprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_base_reply, Function=%02Xh\n",
461                         ioc->name, func));
462
463         if (func == MPI_FUNCTION_EVENT_NOTIFICATION) {
464                 EventNotificationReply_t *pEvReply = (EventNotificationReply_t *) reply;
465                 int evHandlers = 0;
466                 int results;
467
468                 results = ProcessEventNotification(ioc, pEvReply, &evHandlers);
469                 if (results != evHandlers) {
470                         /* CHECKME! Any special handling needed here? */
471                         devtverboseprintk(ioc, printk(MYIOC_s_WARN_FMT "Called %d event handlers, sum results = %d\n",
472                                         ioc->name, evHandlers, results));
473                 }
474
475                 /*
476                  *      Hmmm...  It seems that EventNotificationReply is an exception
477                  *      to the rule of one reply per request.
478                  */
479                 if (pEvReply->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) {
480                         freereq = 0;
481                 } else {
482                         devtverboseprintk(ioc, printk(MYIOC_s_WARN_FMT "EVENT_NOTIFICATION reply %p returns Request frame\n",
483                                 ioc->name, pEvReply));
484                 }
485
486 #ifdef CONFIG_PROC_FS
487 //              LogEvent(ioc, pEvReply);
488 #endif
489
490         } else if (func == MPI_FUNCTION_EVENT_ACK) {
491                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mpt_base_reply, EventAck reply received\n",
492                                 ioc->name));
493         } else if (func == MPI_FUNCTION_CONFIG) {
494                 CONFIGPARMS *pCfg;
495                 unsigned long flags;
496
497                 dcprintk(ioc, printk(MYIOC_s_DEBUG_FMT "config_complete (mf=%p,mr=%p)\n",
498                                 ioc->name, mf, reply));
499
500                 pCfg = * ((CONFIGPARMS **)((u8 *) mf + ioc->req_sz - sizeof(void *)));
501
502                 if (pCfg) {
503                         /* disable timer and remove from linked list */
504                         del_timer(&pCfg->timer);
505
506                         spin_lock_irqsave(&ioc->FreeQlock, flags);
507                         list_del(&pCfg->linkage);
508                         spin_unlock_irqrestore(&ioc->FreeQlock, flags);
509
510                         /*
511                          *      If IOC Status is SUCCESS, save the header
512                          *      and set the status code to GOOD.
513                          */
514                         pCfg->status = MPT_CONFIG_ERROR;
515                         if (reply) {
516                                 ConfigReply_t   *pReply = (ConfigReply_t *)reply;
517                                 u16              status;
518
519                                 status = le16_to_cpu(pReply->IOCStatus) & MPI_IOCSTATUS_MASK;
520                                 dcprintk(ioc, printk(KERN_NOTICE "  IOCStatus=%04xh, IOCLogInfo=%08xh\n",
521                                      status, le32_to_cpu(pReply->IOCLogInfo)));
522
523                                 pCfg->status = status;
524                                 if (status == MPI_IOCSTATUS_SUCCESS) {
525                                         if ((pReply->Header.PageType &
526                                             MPI_CONFIG_PAGETYPE_MASK) ==
527                                             MPI_CONFIG_PAGETYPE_EXTENDED) {
528                                                 pCfg->cfghdr.ehdr->ExtPageLength =
529                                                     le16_to_cpu(pReply->ExtPageLength);
530                                                 pCfg->cfghdr.ehdr->ExtPageType =
531                                                     pReply->ExtPageType;
532                                         }
533                                         pCfg->cfghdr.hdr->PageVersion = pReply->Header.PageVersion;
534
535                                         /* If this is a regular header, save PageLength. */
536                                         /* LMP Do this better so not using a reserved field! */
537                                         pCfg->cfghdr.hdr->PageLength = pReply->Header.PageLength;
538                                         pCfg->cfghdr.hdr->PageNumber = pReply->Header.PageNumber;
539                                         pCfg->cfghdr.hdr->PageType = pReply->Header.PageType;
540                                 }
541                         }
542
543                         /*
544                          *      Wake up the original calling thread
545                          */
546                         pCfg->wait_done = 1;
547                         wake_up(&mpt_waitq);
548                 }
549         } else if (func == MPI_FUNCTION_SAS_IO_UNIT_CONTROL) {
550                 /* we should be always getting a reply frame */
551                 memcpy(ioc->persist_reply_frame, reply,
552                     min(MPT_DEFAULT_FRAME_SIZE,
553                     4*reply->u.reply.MsgLength));
554                 del_timer(&ioc->persist_timer);
555                 ioc->persist_wait_done = 1;
556                 wake_up(&mpt_waitq);
557         } else {
558                 printk(MYIOC_s_ERR_FMT "Unexpected msg function (=%02Xh) reply received!\n",
559                                 ioc->name, func);
560         }
561
562         /*
563          *      Conditionally tell caller to free the original
564          *      EventNotification/EventAck/unexpected request frame!
565          */
566         return freereq;
567 }
568
569 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
570 /**
571  *      mpt_register - Register protocol-specific main callback handler.
572  *      @cbfunc: callback function pointer
573  *      @dclass: Protocol driver's class (%MPT_DRIVER_CLASS enum value)
574  *
575  *      This routine is called by a protocol-specific driver (SCSI host,
576  *      LAN, SCSI target) to register its reply callback routine.  Each
577  *      protocol-specific driver must do this before it will be able to
578  *      use any IOC resources, such as obtaining request frames.
579  *
580  *      NOTES: The SCSI protocol driver currently calls this routine thrice
581  *      in order to register separate callbacks; one for "normal" SCSI IO;
582  *      one for MptScsiTaskMgmt requests; one for Scan/DV requests.
583  *
584  *      Returns u8 valued "handle" in the range (and S.O.D. order)
585  *      {N,...,7,6,5,...,1} if successful.
586  *      A return value of MPT_MAX_PROTOCOL_DRIVERS (including zero!) should be
587  *      considered an error by the caller.
588  */
589 u8
590 mpt_register(MPT_CALLBACK cbfunc, MPT_DRIVER_CLASS dclass)
591 {
592         u8 cb_idx;
593         last_drv_idx = MPT_MAX_PROTOCOL_DRIVERS;
594
595         /*
596          *  Search for empty callback slot in this order: {N,...,7,6,5,...,1}
597          *  (slot/handle 0 is reserved!)
598          */
599         for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
600                 if (MptCallbacks[cb_idx] == NULL) {
601                         MptCallbacks[cb_idx] = cbfunc;
602                         MptDriverClass[cb_idx] = dclass;
603                         MptEvHandlers[cb_idx] = NULL;
604                         last_drv_idx = cb_idx;
605                         break;
606                 }
607         }
608
609         return last_drv_idx;
610 }
611
612 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
613 /**
614  *      mpt_deregister - Deregister a protocol drivers resources.
615  *      @cb_idx: previously registered callback handle
616  *
617  *      Each protocol-specific driver should call this routine when its
618  *      module is unloaded.
619  */
620 void
621 mpt_deregister(u8 cb_idx)
622 {
623         if (cb_idx  && (cb_idx < MPT_MAX_PROTOCOL_DRIVERS)) {
624                 MptCallbacks[cb_idx] = NULL;
625                 MptDriverClass[cb_idx] = MPTUNKNOWN_DRIVER;
626                 MptEvHandlers[cb_idx] = NULL;
627
628                 last_drv_idx++;
629         }
630 }
631
632 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
633 /**
634  *      mpt_event_register - Register protocol-specific event callback
635  *      handler.
636  *      @cb_idx: previously registered (via mpt_register) callback handle
637  *      @ev_cbfunc: callback function
638  *
639  *      This routine can be called by one or more protocol-specific drivers
640  *      if/when they choose to be notified of MPT events.
641  *
642  *      Returns 0 for success.
643  */
644 int
645 mpt_event_register(u8 cb_idx, MPT_EVHANDLER ev_cbfunc)
646 {
647         if (!cb_idx  || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
648                 return -1;
649
650         MptEvHandlers[cb_idx] = ev_cbfunc;
651         return 0;
652 }
653
654 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
655 /**
656  *      mpt_event_deregister - Deregister protocol-specific event callback
657  *      handler.
658  *      @cb_idx: previously registered callback handle
659  *
660  *      Each protocol-specific driver should call this routine
661  *      when it does not (or can no longer) handle events,
662  *      or when its module is unloaded.
663  */
664 void
665 mpt_event_deregister(u8 cb_idx)
666 {
667         if (!cb_idx  || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
668                 return;
669
670         MptEvHandlers[cb_idx] = NULL;
671 }
672
673 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
674 /**
675  *      mpt_reset_register - Register protocol-specific IOC reset handler.
676  *      @cb_idx: previously registered (via mpt_register) callback handle
677  *      @reset_func: reset function
678  *
679  *      This routine can be called by one or more protocol-specific drivers
680  *      if/when they choose to be notified of IOC resets.
681  *
682  *      Returns 0 for success.
683  */
684 int
685 mpt_reset_register(u8 cb_idx, MPT_RESETHANDLER reset_func)
686 {
687         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
688                 return -1;
689
690         MptResetHandlers[cb_idx] = reset_func;
691         return 0;
692 }
693
694 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
695 /**
696  *      mpt_reset_deregister - Deregister protocol-specific IOC reset handler.
697  *      @cb_idx: previously registered callback handle
698  *
699  *      Each protocol-specific driver should call this routine
700  *      when it does not (or can no longer) handle IOC reset handling,
701  *      or when its module is unloaded.
702  */
703 void
704 mpt_reset_deregister(u8 cb_idx)
705 {
706         if (!cb_idx || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
707                 return;
708
709         MptResetHandlers[cb_idx] = NULL;
710 }
711
712 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
713 /**
714  *      mpt_device_driver_register - Register device driver hooks
715  *      @dd_cbfunc: driver callbacks struct
716  *      @cb_idx: MPT protocol driver index
717  */
718 int
719 mpt_device_driver_register(struct mpt_pci_driver * dd_cbfunc, u8 cb_idx)
720 {
721         MPT_ADAPTER     *ioc;
722         const struct pci_device_id *id;
723
724         if (!cb_idx  || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
725                 return -EINVAL;
726
727         MptDeviceDriverHandlers[cb_idx] = dd_cbfunc;
728
729         /* call per pci device probe entry point */
730         list_for_each_entry(ioc, &ioc_list, list) {
731                 id = ioc->pcidev->driver ?
732                     ioc->pcidev->driver->id_table : NULL;
733                 if (dd_cbfunc->probe)
734                         dd_cbfunc->probe(ioc->pcidev, id);
735          }
736
737         return 0;
738 }
739
740 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
741 /**
742  *      mpt_device_driver_deregister - DeRegister device driver hooks
743  *      @cb_idx: MPT protocol driver index
744  */
745 void
746 mpt_device_driver_deregister(u8 cb_idx)
747 {
748         struct mpt_pci_driver *dd_cbfunc;
749         MPT_ADAPTER     *ioc;
750
751         if (!cb_idx  || cb_idx >= MPT_MAX_PROTOCOL_DRIVERS)
752                 return;
753
754         dd_cbfunc = MptDeviceDriverHandlers[cb_idx];
755
756         list_for_each_entry(ioc, &ioc_list, list) {
757                 if (dd_cbfunc->remove)
758                         dd_cbfunc->remove(ioc->pcidev);
759         }
760
761         MptDeviceDriverHandlers[cb_idx] = NULL;
762 }
763
764
765 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
766 /**
767  *      mpt_get_msg_frame - Obtain a MPT request frame from the pool (of 1024)
768  *      allocated per MPT adapter.
769  *      @cb_idx: Handle of registered MPT protocol driver
770  *      @ioc: Pointer to MPT adapter structure
771  *
772  *      Returns pointer to a MPT request frame or %NULL if none are available
773  *      or IOC is not active.
774  */
775 MPT_FRAME_HDR*
776 mpt_get_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc)
777 {
778         MPT_FRAME_HDR *mf;
779         unsigned long flags;
780         u16      req_idx;       /* Request index */
781
782         /* validate handle and ioc identifier */
783
784 #ifdef MFCNT
785         if (!ioc->active)
786                 printk(KERN_WARNING "IOC Not Active! mpt_get_msg_frame returning NULL!\n");
787 #endif
788
789         /* If interrupts are not attached, do not return a request frame */
790         if (!ioc->active)
791                 return NULL;
792
793         spin_lock_irqsave(&ioc->FreeQlock, flags);
794         if (!list_empty(&ioc->FreeQ)) {
795                 int req_offset;
796
797                 mf = list_entry(ioc->FreeQ.next, MPT_FRAME_HDR,
798                                 u.frame.linkage.list);
799                 list_del(&mf->u.frame.linkage.list);
800                 mf->u.frame.linkage.arg1 = 0;
801                 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;  /* byte */
802                 req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
803                                                                 /* u16! */
804                 req_idx = req_offset / ioc->req_sz;
805                 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
806                 mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
807                 ioc->RequestNB[req_idx] = ioc->NB_for_64_byte_frame; /* Default, will be changed if necessary in SG generation */
808 #ifdef MFCNT
809                 ioc->mfcnt++;
810 #endif
811         }
812         else
813                 mf = NULL;
814         spin_unlock_irqrestore(&ioc->FreeQlock, flags);
815
816 #ifdef MFCNT
817         if (mf == NULL)
818                 printk(KERN_WARNING "IOC Active. No free Msg Frames! Count 0x%x Max 0x%x\n", ioc->mfcnt, ioc->req_depth);
819         mfcounter++;
820         if (mfcounter == PRINT_MF_COUNT)
821                 printk(KERN_INFO "MF Count 0x%x Max 0x%x \n", ioc->mfcnt, ioc->req_depth);
822 #endif
823
824         dmfprintk(ioc, printk(KERN_INFO MYNAM ": %s: mpt_get_msg_frame(%d,%d), got mf=%p\n",
825                         ioc->name, cb_idx, ioc->id, mf));
826         return mf;
827 }
828
829 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
830 /**
831  *      mpt_put_msg_frame - Send a protocol specific MPT request frame
832  *      to a IOC.
833  *      @cb_idx: Handle of registered MPT protocol driver
834  *      @ioc: Pointer to MPT adapter structure
835  *      @mf: Pointer to MPT request frame
836  *
837  *      This routine posts a MPT request frame to the request post FIFO of a
838  *      specific MPT adapter.
839  */
840 void
841 mpt_put_msg_frame(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
842 {
843         u32 mf_dma_addr;
844         int req_offset;
845         u16      req_idx;       /* Request index */
846
847         /* ensure values are reset properly! */
848         mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;          /* byte */
849         req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
850                                                                 /* u16! */
851         req_idx = req_offset / ioc->req_sz;
852         mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
853         mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
854
855         DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
856
857         mf_dma_addr = (ioc->req_frames_low_dma + req_offset) | ioc->RequestNB[req_idx];
858         dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d RequestNB=%x\n", ioc->name, mf_dma_addr, req_idx, ioc->RequestNB[req_idx]));
859         CHIPREG_WRITE32(&ioc->chip->RequestFifo, mf_dma_addr);
860 }
861
862 /**
863  *      mpt_put_msg_frame_hi_pri - Send a protocol specific MPT request frame
864  *      to a IOC using hi priority request queue.
865  *      @cb_idx: Handle of registered MPT protocol driver
866  *      @ioc: Pointer to MPT adapter structure
867  *      @mf: Pointer to MPT request frame
868  *
869  *      This routine posts a MPT request frame to the request post FIFO of a
870  *      specific MPT adapter.
871  **/
872 void
873 mpt_put_msg_frame_hi_pri(u8 cb_idx, MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
874 {
875         u32 mf_dma_addr;
876         int req_offset;
877         u16      req_idx;       /* Request index */
878
879         /* ensure values are reset properly! */
880         mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
881         req_offset = (u8 *)mf - (u8 *)ioc->req_frames;
882         req_idx = req_offset / ioc->req_sz;
883         mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(req_idx);
884         mf->u.frame.hwhdr.msgctxu.fld.rsvd = 0;
885
886         DBG_DUMP_PUT_MSG_FRAME(ioc, (u32 *)mf);
887
888         mf_dma_addr = (ioc->req_frames_low_dma + req_offset);
889         dsgprintk(ioc, printk(MYIOC_s_DEBUG_FMT "mf_dma_addr=%x req_idx=%d\n",
890                 ioc->name, mf_dma_addr, req_idx));
891         CHIPREG_WRITE32(&ioc->chip->RequestHiPriFifo, mf_dma_addr);
892 }
893
894 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
895 /**
896  *      mpt_free_msg_frame - Place MPT request frame back on FreeQ.
897  *      @handle: Handle of registered MPT protocol driver
898  *      @ioc: Pointer to MPT adapter structure
899  *      @mf: Pointer to MPT request frame
900  *
901  *      This routine places a MPT request frame back on the MPT adapter's
902  *      FreeQ.
903  */
904 void
905 mpt_free_msg_frame(MPT_ADAPTER *ioc, MPT_FRAME_HDR *mf)
906 {
907         unsigned long flags;
908
909         /*  Put Request back on FreeQ!  */
910         spin_lock_irqsave(&ioc->FreeQlock, flags);
911         mf->u.frame.linkage.arg1 = 0xdeadbeaf; /* signature to know if this mf is freed */
912         list_add_tail(&mf->u.frame.linkage.list, &ioc->FreeQ);
913 #ifdef MFCNT
914         ioc->mfcnt--;
915 #endif
916         spin_unlock_irqrestore(&ioc->FreeQlock, flags);
917 }
918
919 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
920 /**
921  *      mpt_add_sge - Place a simple SGE at address pAddr.
922  *      @pAddr: virtual address for SGE
923  *      @flagslength: SGE flags and data transfer length
924  *      @dma_addr: Physical address
925  *
926  *      This routine places a MPT request frame back on the MPT adapter's
927  *      FreeQ.
928  */
929 void
930 mpt_add_sge(char *pAddr, u32 flagslength, dma_addr_t dma_addr)
931 {
932         if (sizeof(dma_addr_t) == sizeof(u64)) {
933                 SGESimple64_t *pSge = (SGESimple64_t *) pAddr;
934                 u32 tmp = dma_addr & 0xFFFFFFFF;
935
936                 pSge->FlagsLength = cpu_to_le32(flagslength);
937                 pSge->Address.Low = cpu_to_le32(tmp);
938                 tmp = (u32) ((u64)dma_addr >> 32);
939                 pSge->Address.High = cpu_to_le32(tmp);
940
941         } else {
942                 SGESimple32_t *pSge = (SGESimple32_t *) pAddr;
943                 pSge->FlagsLength = cpu_to_le32(flagslength);
944                 pSge->Address = cpu_to_le32(dma_addr);
945         }
946 }
947
948 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
949 /**
950  *      mpt_send_handshake_request - Send MPT request via doorbell handshake method.
951  *      @cb_idx: Handle of registered MPT protocol driver
952  *      @ioc: Pointer to MPT adapter structure
953  *      @reqBytes: Size of the request in bytes
954  *      @req: Pointer to MPT request frame
955  *      @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
956  *
957  *      This routine is used exclusively to send MptScsiTaskMgmt
958  *      requests since they are required to be sent via doorbell handshake.
959  *
960  *      NOTE: It is the callers responsibility to byte-swap fields in the
961  *      request which are greater than 1 byte in size.
962  *
963  *      Returns 0 for success, non-zero for failure.
964  */
965 int
966 mpt_send_handshake_request(u8 cb_idx, MPT_ADAPTER *ioc, int reqBytes, u32 *req, int sleepFlag)
967 {
968         int     r = 0;
969         u8      *req_as_bytes;
970         int      ii;
971
972         /* State is known to be good upon entering
973          * this function so issue the bus reset
974          * request.
975          */
976
977         /*
978          * Emulate what mpt_put_msg_frame() does /wrt to sanity
979          * setting cb_idx/req_idx.  But ONLY if this request
980          * is in proper (pre-alloc'd) request buffer range...
981          */
982         ii = MFPTR_2_MPT_INDEX(ioc,(MPT_FRAME_HDR*)req);
983         if (reqBytes >= 12 && ii >= 0 && ii < ioc->req_depth) {
984                 MPT_FRAME_HDR *mf = (MPT_FRAME_HDR*)req;
985                 mf->u.frame.hwhdr.msgctxu.fld.req_idx = cpu_to_le16(ii);
986                 mf->u.frame.hwhdr.msgctxu.fld.cb_idx = cb_idx;
987         }
988
989         /* Make sure there are no doorbells */
990         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
991
992         CHIPREG_WRITE32(&ioc->chip->Doorbell,
993                         ((MPI_FUNCTION_HANDSHAKE<<MPI_DOORBELL_FUNCTION_SHIFT) |
994                          ((reqBytes/4)<<MPI_DOORBELL_ADD_DWORDS_SHIFT)));
995
996         /* Wait for IOC doorbell int */
997         if ((ii = WaitForDoorbellInt(ioc, 5, sleepFlag)) < 0) {
998                 return ii;
999         }
1000
1001         /* Read doorbell and check for active bit */
1002         if (!(CHIPREG_READ32(&ioc->chip->Doorbell) & MPI_DOORBELL_ACTIVE))
1003                 return -5;
1004
1005         dhsprintk(ioc, printk(KERN_INFO MYNAM ": %s: mpt_send_handshake_request start, WaitCnt=%d\n",
1006                 ioc->name, ii));
1007
1008         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1009
1010         if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1011                 return -2;
1012         }
1013
1014         /* Send request via doorbell handshake */
1015         req_as_bytes = (u8 *) req;
1016         for (ii = 0; ii < reqBytes/4; ii++) {
1017                 u32 word;
1018
1019                 word = ((req_as_bytes[(ii*4) + 0] <<  0) |
1020                         (req_as_bytes[(ii*4) + 1] <<  8) |
1021                         (req_as_bytes[(ii*4) + 2] << 16) |
1022                         (req_as_bytes[(ii*4) + 3] << 24));
1023                 CHIPREG_WRITE32(&ioc->chip->Doorbell, word);
1024                 if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1025                         r = -3;
1026                         break;
1027                 }
1028         }
1029
1030         if (r >= 0 && WaitForDoorbellInt(ioc, 10, sleepFlag) >= 0)
1031                 r = 0;
1032         else
1033                 r = -4;
1034
1035         /* Make sure there are no doorbells */
1036         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1037
1038         return r;
1039 }
1040
1041 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1042 /**
1043  * mpt_host_page_access_control - control the IOC's Host Page Buffer access
1044  * @ioc: Pointer to MPT adapter structure
1045  * @access_control_value: define bits below
1046  * @sleepFlag: Specifies whether the process can sleep
1047  *
1048  * Provides mechanism for the host driver to control the IOC's
1049  * Host Page Buffer access.
1050  *
1051  * Access Control Value - bits[15:12]
1052  * 0h Reserved
1053  * 1h Enable Access { MPI_DB_HPBAC_ENABLE_ACCESS }
1054  * 2h Disable Access { MPI_DB_HPBAC_DISABLE_ACCESS }
1055  * 3h Free Buffer { MPI_DB_HPBAC_FREE_BUFFER }
1056  *
1057  * Returns 0 for success, non-zero for failure.
1058  */
1059
1060 static int
1061 mpt_host_page_access_control(MPT_ADAPTER *ioc, u8 access_control_value, int sleepFlag)
1062 {
1063         int      r = 0;
1064
1065         /* return if in use */
1066         if (CHIPREG_READ32(&ioc->chip->Doorbell)
1067             & MPI_DOORBELL_ACTIVE)
1068             return -1;
1069
1070         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1071
1072         CHIPREG_WRITE32(&ioc->chip->Doorbell,
1073                 ((MPI_FUNCTION_HOST_PAGEBUF_ACCESS_CONTROL
1074                  <<MPI_DOORBELL_FUNCTION_SHIFT) |
1075                  (access_control_value<<12)));
1076
1077         /* Wait for IOC to clear Doorbell Status bit */
1078         if ((r = WaitForDoorbellAck(ioc, 5, sleepFlag)) < 0) {
1079                 return -2;
1080         }else
1081                 return 0;
1082 }
1083
1084 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1085 /**
1086  *      mpt_host_page_alloc - allocate system memory for the fw
1087  *      @ioc: Pointer to pointer to IOC adapter
1088  *      @ioc_init: Pointer to ioc init config page
1089  *
1090  *      If we already allocated memory in past, then resend the same pointer.
1091  *      Returns 0 for success, non-zero for failure.
1092  */
1093 static int
1094 mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init)
1095 {
1096         char    *psge;
1097         int     flags_length;
1098         u32     host_page_buffer_sz=0;
1099
1100         if(!ioc->HostPageBuffer) {
1101
1102                 host_page_buffer_sz =
1103                     le32_to_cpu(ioc->facts.HostPageBufferSGE.FlagsLength) & 0xFFFFFF;
1104
1105                 if(!host_page_buffer_sz)
1106                         return 0; /* fw doesn't need any host buffers */
1107
1108                 /* spin till we get enough memory */
1109                 while(host_page_buffer_sz > 0) {
1110
1111                         if((ioc->HostPageBuffer = pci_alloc_consistent(
1112                             ioc->pcidev,
1113                             host_page_buffer_sz,
1114                             &ioc->HostPageBuffer_dma)) != NULL) {
1115
1116                                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1117                                     "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n",
1118                                     ioc->name, ioc->HostPageBuffer,
1119                                     (u32)ioc->HostPageBuffer_dma,
1120                                     host_page_buffer_sz));
1121                                 ioc->alloc_total += host_page_buffer_sz;
1122                                 ioc->HostPageBuffer_sz = host_page_buffer_sz;
1123                                 break;
1124                         }
1125
1126                         host_page_buffer_sz -= (4*1024);
1127                 }
1128         }
1129
1130         if(!ioc->HostPageBuffer) {
1131                 printk(MYIOC_s_ERR_FMT
1132                     "Failed to alloc memory for host_page_buffer!\n",
1133                     ioc->name);
1134                 return -999;
1135         }
1136
1137         psge = (char *)&ioc_init->HostPageBufferSGE;
1138         flags_length = MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1139             MPI_SGE_FLAGS_SYSTEM_ADDRESS |
1140             MPI_SGE_FLAGS_32_BIT_ADDRESSING |
1141             MPI_SGE_FLAGS_HOST_TO_IOC |
1142             MPI_SGE_FLAGS_END_OF_BUFFER;
1143         if (sizeof(dma_addr_t) == sizeof(u64)) {
1144             flags_length |= MPI_SGE_FLAGS_64_BIT_ADDRESSING;
1145         }
1146         flags_length = flags_length << MPI_SGE_FLAGS_SHIFT;
1147         flags_length |= ioc->HostPageBuffer_sz;
1148         mpt_add_sge(psge, flags_length, ioc->HostPageBuffer_dma);
1149         ioc->facts.HostPageBufferSGE = ioc_init->HostPageBufferSGE;
1150
1151 return 0;
1152 }
1153
1154 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1155 /**
1156  *      mpt_verify_adapter - Given IOC identifier, set pointer to its adapter structure.
1157  *      @iocid: IOC unique identifier (integer)
1158  *      @iocpp: Pointer to pointer to IOC adapter
1159  *
1160  *      Given a unique IOC identifier, set pointer to the associated MPT
1161  *      adapter structure.
1162  *
1163  *      Returns iocid and sets iocpp if iocid is found.
1164  *      Returns -1 if iocid is not found.
1165  */
1166 int
1167 mpt_verify_adapter(int iocid, MPT_ADAPTER **iocpp)
1168 {
1169         MPT_ADAPTER *ioc;
1170
1171         list_for_each_entry(ioc,&ioc_list,list) {
1172                 if (ioc->id == iocid) {
1173                         *iocpp =ioc;
1174                         return iocid;
1175                 }
1176         }
1177
1178         *iocpp = NULL;
1179         return -1;
1180 }
1181
1182 /**
1183  *      mpt_get_product_name - returns product string
1184  *      @vendor: pci vendor id
1185  *      @device: pci device id
1186  *      @revision: pci revision id
1187  *      @prod_name: string returned
1188  *
1189  *      Returns product string displayed when driver loads,
1190  *      in /proc/mpt/summary and /sysfs/class/scsi_host/host<X>/version_product
1191  *
1192  **/
1193 static void
1194 mpt_get_product_name(u16 vendor, u16 device, u8 revision, char *prod_name)
1195 {
1196         char *product_str = NULL;
1197
1198         if (vendor == PCI_VENDOR_ID_BROCADE) {
1199                 switch (device)
1200                 {
1201                 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1202                         switch (revision)
1203                         {
1204                         case 0x00:
1205                                 product_str = "BRE040 A0";
1206                                 break;
1207                         case 0x01:
1208                                 product_str = "BRE040 A1";
1209                                 break;
1210                         default:
1211                                 product_str = "BRE040";
1212                                 break;
1213                         }
1214                         break;
1215                 }
1216                 goto out;
1217         }
1218
1219         switch (device)
1220         {
1221         case MPI_MANUFACTPAGE_DEVICEID_FC909:
1222                 product_str = "LSIFC909 B1";
1223                 break;
1224         case MPI_MANUFACTPAGE_DEVICEID_FC919:
1225                 product_str = "LSIFC919 B0";
1226                 break;
1227         case MPI_MANUFACTPAGE_DEVICEID_FC929:
1228                 product_str = "LSIFC929 B0";
1229                 break;
1230         case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1231                 if (revision < 0x80)
1232                         product_str = "LSIFC919X A0";
1233                 else
1234                         product_str = "LSIFC919XL A1";
1235                 break;
1236         case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1237                 if (revision < 0x80)
1238                         product_str = "LSIFC929X A0";
1239                 else
1240                         product_str = "LSIFC929XL A1";
1241                 break;
1242         case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1243                 product_str = "LSIFC939X A1";
1244                 break;
1245         case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1246                 product_str = "LSIFC949X A1";
1247                 break;
1248         case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1249                 switch (revision)
1250                 {
1251                 case 0x00:
1252                         product_str = "LSIFC949E A0";
1253                         break;
1254                 case 0x01:
1255                         product_str = "LSIFC949E A1";
1256                         break;
1257                 default:
1258                         product_str = "LSIFC949E";
1259                         break;
1260                 }
1261                 break;
1262         case MPI_MANUFACTPAGE_DEVID_53C1030:
1263                 switch (revision)
1264                 {
1265                 case 0x00:
1266                         product_str = "LSI53C1030 A0";
1267                         break;
1268                 case 0x01:
1269                         product_str = "LSI53C1030 B0";
1270                         break;
1271                 case 0x03:
1272                         product_str = "LSI53C1030 B1";
1273                         break;
1274                 case 0x07:
1275                         product_str = "LSI53C1030 B2";
1276                         break;
1277                 case 0x08:
1278                         product_str = "LSI53C1030 C0";
1279                         break;
1280                 case 0x80:
1281                         product_str = "LSI53C1030T A0";
1282                         break;
1283                 case 0x83:
1284                         product_str = "LSI53C1030T A2";
1285                         break;
1286                 case 0x87:
1287                         product_str = "LSI53C1030T A3";
1288                         break;
1289                 case 0xc1:
1290                         product_str = "LSI53C1020A A1";
1291                         break;
1292                 default:
1293                         product_str = "LSI53C1030";
1294                         break;
1295                 }
1296                 break;
1297         case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1298                 switch (revision)
1299                 {
1300                 case 0x03:
1301                         product_str = "LSI53C1035 A2";
1302                         break;
1303                 case 0x04:
1304                         product_str = "LSI53C1035 B0";
1305                         break;
1306                 default:
1307                         product_str = "LSI53C1035";
1308                         break;
1309                 }
1310                 break;
1311         case MPI_MANUFACTPAGE_DEVID_SAS1064:
1312                 switch (revision)
1313                 {
1314                 case 0x00:
1315                         product_str = "LSISAS1064 A1";
1316                         break;
1317                 case 0x01:
1318                         product_str = "LSISAS1064 A2";
1319                         break;
1320                 case 0x02:
1321                         product_str = "LSISAS1064 A3";
1322                         break;
1323                 case 0x03:
1324                         product_str = "LSISAS1064 A4";
1325                         break;
1326                 default:
1327                         product_str = "LSISAS1064";
1328                         break;
1329                 }
1330                 break;
1331         case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1332                 switch (revision)
1333                 {
1334                 case 0x00:
1335                         product_str = "LSISAS1064E A0";
1336                         break;
1337                 case 0x01:
1338                         product_str = "LSISAS1064E B0";
1339                         break;
1340                 case 0x02:
1341                         product_str = "LSISAS1064E B1";
1342                         break;
1343                 case 0x04:
1344                         product_str = "LSISAS1064E B2";
1345                         break;
1346                 case 0x08:
1347                         product_str = "LSISAS1064E B3";
1348                         break;
1349                 default:
1350                         product_str = "LSISAS1064E";
1351                         break;
1352                 }
1353                 break;
1354         case MPI_MANUFACTPAGE_DEVID_SAS1068:
1355                 switch (revision)
1356                 {
1357                 case 0x00:
1358                         product_str = "LSISAS1068 A0";
1359                         break;
1360                 case 0x01:
1361                         product_str = "LSISAS1068 B0";
1362                         break;
1363                 case 0x02:
1364                         product_str = "LSISAS1068 B1";
1365                         break;
1366                 default:
1367                         product_str = "LSISAS1068";
1368                         break;
1369                 }
1370                 break;
1371         case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1372                 switch (revision)
1373                 {
1374                 case 0x00:
1375                         product_str = "LSISAS1068E A0";
1376                         break;
1377                 case 0x01:
1378                         product_str = "LSISAS1068E B0";
1379                         break;
1380                 case 0x02:
1381                         product_str = "LSISAS1068E B1";
1382                         break;
1383                 case 0x04:
1384                         product_str = "LSISAS1068E B2";
1385                         break;
1386                 case 0x08:
1387                         product_str = "LSISAS1068E B3";
1388                         break;
1389                 default:
1390                         product_str = "LSISAS1068E";
1391                         break;
1392                 }
1393                 break;
1394         case MPI_MANUFACTPAGE_DEVID_SAS1078:
1395                 switch (revision)
1396                 {
1397                 case 0x00:
1398                         product_str = "LSISAS1078 A0";
1399                         break;
1400                 case 0x01:
1401                         product_str = "LSISAS1078 B0";
1402                         break;
1403                 case 0x02:
1404                         product_str = "LSISAS1078 C0";
1405                         break;
1406                 case 0x03:
1407                         product_str = "LSISAS1078 C1";
1408                         break;
1409                 case 0x04:
1410                         product_str = "LSISAS1078 C2";
1411                         break;
1412                 default:
1413                         product_str = "LSISAS1078";
1414                         break;
1415                 }
1416                 break;
1417         }
1418
1419  out:
1420         if (product_str)
1421                 sprintf(prod_name, "%s", product_str);
1422 }
1423
1424 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1425 /**
1426  *      mpt_attach - Install a PCI intelligent MPT adapter.
1427  *      @pdev: Pointer to pci_dev structure
1428  *      @id: PCI device ID information
1429  *
1430  *      This routine performs all the steps necessary to bring the IOC of
1431  *      a MPT adapter to a OPERATIONAL state.  This includes registering
1432  *      memory regions, registering the interrupt, and allocating request
1433  *      and reply memory pools.
1434  *
1435  *      This routine also pre-fetches the LAN MAC address of a Fibre Channel
1436  *      MPT adapter.
1437  *
1438  *      Returns 0 for success, non-zero for failure.
1439  *
1440  *      TODO: Add support for polled controllers
1441  */
1442 int
1443 mpt_attach(struct pci_dev *pdev, const struct pci_device_id *id)
1444 {
1445         MPT_ADAPTER     *ioc;
1446         u8              __iomem *mem;
1447         unsigned long    mem_phys;
1448         unsigned long    port;
1449         u32              msize;
1450         u32              psize;
1451         int              ii;
1452         u8               cb_idx;
1453         int              r = -ENODEV;
1454         u8               revision;
1455         u8               pcixcmd;
1456         static int       mpt_ids = 0;
1457 #ifdef CONFIG_PROC_FS
1458         struct proc_dir_entry *dent, *ent;
1459 #endif
1460
1461         ioc = kzalloc(sizeof(MPT_ADAPTER), GFP_ATOMIC);
1462         if (ioc == NULL) {
1463                 printk(KERN_ERR MYNAM ": ERROR - Insufficient memory to add adapter!\n");
1464                 return -ENOMEM;
1465         }
1466
1467         ioc->debug_level = mpt_debug_level;
1468         if (mpt_debug_level)
1469                 printk(KERN_INFO MYNAM ": mpt_debug_level=%xh\n", mpt_debug_level);
1470
1471         if (pci_enable_device(pdev))
1472                 return r;
1473
1474         dinitprintk(ioc, printk(KERN_WARNING MYNAM ": mpt_adapter_install\n"));
1475
1476         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
1477                 dprintk(ioc, printk(KERN_INFO MYNAM
1478                         ": 64 BIT PCI BUS DMA ADDRESSING SUPPORTED\n"));
1479         } else if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1480                 printk(KERN_WARNING MYNAM ": 32 BIT PCI BUS DMA ADDRESSING NOT SUPPORTED\n");
1481                 return r;
1482         }
1483
1484         if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
1485                 dprintk(ioc, printk(KERN_INFO MYNAM
1486                         ": Using 64 bit consistent mask\n"));
1487         } else {
1488                 dprintk(ioc, printk(KERN_INFO MYNAM
1489                         ": Not using 64 bit consistent mask\n"));
1490         }
1491
1492         ioc->alloc_total = sizeof(MPT_ADAPTER);
1493         ioc->req_sz = MPT_DEFAULT_FRAME_SIZE;           /* avoid div by zero! */
1494         ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
1495
1496         ioc->pcidev = pdev;
1497         ioc->diagPending = 0;
1498         spin_lock_init(&ioc->diagLock);
1499         spin_lock_init(&ioc->initializing_hba_lock);
1500
1501         /* Initialize the event logging.
1502          */
1503         ioc->eventTypes = 0;    /* None */
1504         ioc->eventContext = 0;
1505         ioc->eventLogSize = 0;
1506         ioc->events = NULL;
1507
1508 #ifdef MFCNT
1509         ioc->mfcnt = 0;
1510 #endif
1511
1512         ioc->cached_fw = NULL;
1513
1514         /* Initilize SCSI Config Data structure
1515          */
1516         memset(&ioc->spi_data, 0, sizeof(SpiCfgData));
1517
1518         /* Initialize the running configQ head.
1519          */
1520         INIT_LIST_HEAD(&ioc->configQ);
1521
1522         /* Initialize the fc rport list head.
1523          */
1524         INIT_LIST_HEAD(&ioc->fc_rports);
1525
1526         /* Find lookup slot. */
1527         INIT_LIST_HEAD(&ioc->list);
1528         ioc->id = mpt_ids++;
1529
1530         mem_phys = msize = 0;
1531         port = psize = 0;
1532         for (ii=0; ii < DEVICE_COUNT_RESOURCE; ii++) {
1533                 if (pci_resource_flags(pdev, ii) & PCI_BASE_ADDRESS_SPACE_IO) {
1534                         if (psize)
1535                                 continue;
1536                         /* Get I/O space! */
1537                         port = pci_resource_start(pdev, ii);
1538                         psize = pci_resource_len(pdev,ii);
1539                 } else {
1540                         if (msize)
1541                                 continue;
1542                         /* Get memmap */
1543                         mem_phys = pci_resource_start(pdev, ii);
1544                         msize = pci_resource_len(pdev,ii);
1545                 }
1546         }
1547         ioc->mem_size = msize;
1548
1549         mem = NULL;
1550         /* Get logical ptr for PciMem0 space */
1551         /*mem = ioremap(mem_phys, msize);*/
1552         mem = ioremap(mem_phys, msize);
1553         if (mem == NULL) {
1554                 printk(KERN_ERR MYNAM ": ERROR - Unable to map adapter memory!\n");
1555                 kfree(ioc);
1556                 return -EINVAL;
1557         }
1558         ioc->memmap = mem;
1559         dinitprintk(ioc, printk(KERN_INFO MYNAM ": mem = %p, mem_phys = %lx\n", mem, mem_phys));
1560
1561         dinitprintk(ioc, printk(KERN_INFO MYNAM ": facts @ %p, pfacts[0] @ %p\n",
1562                         &ioc->facts, &ioc->pfacts[0]));
1563
1564         ioc->mem_phys = mem_phys;
1565         ioc->chip = (SYSIF_REGS __iomem *)mem;
1566
1567         /* Save Port IO values in case we need to do downloadboot */
1568         {
1569                 u8 *pmem = (u8*)port;
1570                 ioc->pio_mem_phys = port;
1571                 ioc->pio_chip = (SYSIF_REGS __iomem *)pmem;
1572         }
1573
1574         pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
1575         mpt_get_product_name(pdev->vendor, pdev->device, revision, ioc->prod_name);
1576
1577         switch (pdev->device)
1578         {
1579         case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1580         case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1581                 ioc->errata_flag_1064 = 1;
1582         case MPI_MANUFACTPAGE_DEVICEID_FC909:
1583         case MPI_MANUFACTPAGE_DEVICEID_FC929:
1584         case MPI_MANUFACTPAGE_DEVICEID_FC919:
1585         case MPI_MANUFACTPAGE_DEVICEID_FC949E:
1586                 ioc->bus_type = FC;
1587                 break;
1588
1589         case MPI_MANUFACTPAGE_DEVICEID_FC929X:
1590                 if (revision < XL_929) {
1591                         /* 929X Chip Fix. Set Split transactions level
1592                         * for PCIX. Set MOST bits to zero.
1593                         */
1594                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1595                         pcixcmd &= 0x8F;
1596                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1597                 } else {
1598                         /* 929XL Chip Fix. Set MMRBC to 0x08.
1599                         */
1600                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1601                         pcixcmd |= 0x08;
1602                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1603                 }
1604                 ioc->bus_type = FC;
1605                 break;
1606
1607         case MPI_MANUFACTPAGE_DEVICEID_FC919X:
1608                 /* 919X Chip Fix. Set Split transactions level
1609                  * for PCIX. Set MOST bits to zero.
1610                  */
1611                 pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1612                 pcixcmd &= 0x8F;
1613                 pci_write_config_byte(pdev, 0x6a, pcixcmd);
1614                 ioc->bus_type = FC;
1615                 break;
1616
1617         case MPI_MANUFACTPAGE_DEVID_53C1030:
1618                 /* 1030 Chip Fix. Disable Split transactions
1619                  * for PCIX. Set MOST bits to zero if Rev < C0( = 8).
1620                  */
1621                 if (revision < C0_1030) {
1622                         pci_read_config_byte(pdev, 0x6a, &pcixcmd);
1623                         pcixcmd &= 0x8F;
1624                         pci_write_config_byte(pdev, 0x6a, pcixcmd);
1625                 }
1626
1627         case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1628                 ioc->bus_type = SPI;
1629                 break;
1630
1631         case MPI_MANUFACTPAGE_DEVID_SAS1064:
1632         case MPI_MANUFACTPAGE_DEVID_SAS1068:
1633                 ioc->errata_flag_1064 = 1;
1634
1635         case MPI_MANUFACTPAGE_DEVID_SAS1064E:
1636         case MPI_MANUFACTPAGE_DEVID_SAS1068E:
1637         case MPI_MANUFACTPAGE_DEVID_SAS1078:
1638                 ioc->bus_type = SAS;
1639         }
1640
1641         if (ioc->errata_flag_1064)
1642                 pci_disable_io_access(pdev);
1643
1644         sprintf(ioc->name, "ioc%d", ioc->id);
1645
1646         spin_lock_init(&ioc->FreeQlock);
1647
1648         /* Disable all! */
1649         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1650         ioc->active = 0;
1651         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1652
1653         /* Set lookup ptr. */
1654         list_add_tail(&ioc->list, &ioc_list);
1655
1656         /* Check for "bound ports" (929, 929X, 1030, 1035) to reduce redundant resets.
1657          */
1658         mpt_detect_bound_ports(ioc, pdev);
1659
1660         if ((r = mpt_do_ioc_recovery(ioc, MPT_HOSTEVENT_IOC_BRINGUP,
1661             CAN_SLEEP)) != 0){
1662                 printk(KERN_WARNING MYNAM
1663                   ": WARNING - %s did not initialize properly! (%d)\n",
1664                   ioc->name, r);
1665
1666                 list_del(&ioc->list);
1667                 if (ioc->alt_ioc)
1668                         ioc->alt_ioc->alt_ioc = NULL;
1669                 iounmap(mem);
1670                 kfree(ioc);
1671                 pci_set_drvdata(pdev, NULL);
1672                 return r;
1673         }
1674
1675         /* call per device driver probe entry point */
1676         for(cb_idx=0; cb_idx<MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
1677                 if(MptDeviceDriverHandlers[cb_idx] &&
1678                   MptDeviceDriverHandlers[cb_idx]->probe) {
1679                         MptDeviceDriverHandlers[cb_idx]->probe(pdev,id);
1680                 }
1681         }
1682
1683 #ifdef CONFIG_PROC_FS
1684         /*
1685          *  Create "/proc/mpt/iocN" subdirectory entry for each MPT adapter.
1686          */
1687         dent = proc_mkdir(ioc->name, mpt_proc_root_dir);
1688         if (dent) {
1689                 ent = create_proc_entry("info", S_IFREG|S_IRUGO, dent);
1690                 if (ent) {
1691                         ent->read_proc = procmpt_iocinfo_read;
1692                         ent->data = ioc;
1693                 }
1694                 ent = create_proc_entry("summary", S_IFREG|S_IRUGO, dent);
1695                 if (ent) {
1696                         ent->read_proc = procmpt_summary_read;
1697                         ent->data = ioc;
1698                 }
1699         }
1700 #endif
1701
1702         return 0;
1703 }
1704
1705 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1706 /**
1707  *      mpt_detach - Remove a PCI intelligent MPT adapter.
1708  *      @pdev: Pointer to pci_dev structure
1709  */
1710
1711 void
1712 mpt_detach(struct pci_dev *pdev)
1713 {
1714         MPT_ADAPTER     *ioc = pci_get_drvdata(pdev);
1715         char pname[32];
1716         u8 cb_idx;
1717
1718         sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
1719         remove_proc_entry(pname, NULL);
1720         sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/info", ioc->name);
1721         remove_proc_entry(pname, NULL);
1722         sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s", ioc->name);
1723         remove_proc_entry(pname, NULL);
1724
1725         /* call per device driver remove entry point */
1726         for(cb_idx=0; cb_idx<MPT_MAX_PROTOCOL_DRIVERS; cb_idx++) {
1727                 if(MptDeviceDriverHandlers[cb_idx] &&
1728                   MptDeviceDriverHandlers[cb_idx]->remove) {
1729                         MptDeviceDriverHandlers[cb_idx]->remove(pdev);
1730                 }
1731         }
1732
1733         /* Disable interrupts! */
1734         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1735
1736         ioc->active = 0;
1737         synchronize_irq(pdev->irq);
1738
1739         /* Clear any lingering interrupt */
1740         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1741
1742         CHIPREG_READ32(&ioc->chip->IntStatus);
1743
1744         mpt_adapter_dispose(ioc);
1745
1746         pci_set_drvdata(pdev, NULL);
1747 }
1748
1749 /**************************************************************************
1750  * Power Management
1751  */
1752 #ifdef CONFIG_PM
1753 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1754 /**
1755  *      mpt_suspend - Fusion MPT base driver suspend routine.
1756  *      @pdev: Pointer to pci_dev structure
1757  *      @state: new state to enter
1758  */
1759 int
1760 mpt_suspend(struct pci_dev *pdev, pm_message_t state)
1761 {
1762         u32 device_state;
1763         MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1764
1765         device_state=pci_choose_state(pdev, state);
1766
1767         printk(MYIOC_s_INFO_FMT
1768         "pci-suspend: pdev=0x%p, slot=%s, Entering operating state [D%d]\n",
1769                 ioc->name, pdev, pci_name(pdev), device_state);
1770
1771         pci_save_state(pdev);
1772
1773         /* put ioc into READY_STATE */
1774         if(SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, CAN_SLEEP)) {
1775                 printk(MYIOC_s_ERR_FMT
1776                 "pci-suspend:  IOC msg unit reset failed!\n", ioc->name);
1777         }
1778
1779         /* disable interrupts */
1780         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1781         ioc->active = 0;
1782
1783         /* Clear any lingering interrupt */
1784         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
1785
1786         pci_disable_device(pdev);
1787         pci_set_power_state(pdev, device_state);
1788
1789         return 0;
1790 }
1791
1792 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1793 /**
1794  *      mpt_resume - Fusion MPT base driver resume routine.
1795  *      @pdev: Pointer to pci_dev structure
1796  */
1797 int
1798 mpt_resume(struct pci_dev *pdev)
1799 {
1800         MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
1801         u32 device_state = pdev->current_state;
1802         int recovery_state;
1803         int err;
1804
1805         printk(MYIOC_s_INFO_FMT
1806         "pci-resume: pdev=0x%p, slot=%s, Previous operating state [D%d]\n",
1807                 ioc->name, pdev, pci_name(pdev), device_state);
1808
1809         pci_set_power_state(pdev, 0);
1810         pci_restore_state(pdev);
1811         err = pci_enable_device(pdev);
1812         if (err)
1813                 return err;
1814
1815         /* enable interrupts */
1816         CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
1817         ioc->active = 1;
1818
1819         printk(MYIOC_s_INFO_FMT
1820                 "pci-resume: ioc-state=0x%x,doorbell=0x%x\n",
1821                 ioc->name,
1822                 (mpt_GetIocState(ioc, 1) >> MPI_IOC_STATE_SHIFT),
1823                 CHIPREG_READ32(&ioc->chip->Doorbell));
1824
1825         /* bring ioc to operational state */
1826         if ((recovery_state = mpt_do_ioc_recovery(ioc,
1827             MPT_HOSTEVENT_IOC_RECOVER, CAN_SLEEP)) != 0) {
1828                 printk(MYIOC_s_INFO_FMT
1829                         "pci-resume: Cannot recover, error:[%x]\n",
1830                         ioc->name, recovery_state);
1831         } else {
1832                 printk(MYIOC_s_INFO_FMT
1833                         "pci-resume: success\n", ioc->name);
1834         }
1835
1836         return 0;
1837 }
1838 #endif
1839
1840 static int
1841 mpt_signal_reset(u8 index, MPT_ADAPTER *ioc, int reset_phase)
1842 {
1843         if ((MptDriverClass[index] == MPTSPI_DRIVER &&
1844              ioc->bus_type != SPI) ||
1845             (MptDriverClass[index] == MPTFC_DRIVER &&
1846              ioc->bus_type != FC) ||
1847             (MptDriverClass[index] == MPTSAS_DRIVER &&
1848              ioc->bus_type != SAS))
1849                 /* make sure we only call the relevant reset handler
1850                  * for the bus */
1851                 return 0;
1852         return (MptResetHandlers[index])(ioc, reset_phase);
1853 }
1854
1855 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
1856 /**
1857  *      mpt_do_ioc_recovery - Initialize or recover MPT adapter.
1858  *      @ioc: Pointer to MPT adapter structure
1859  *      @reason: Event word / reason
1860  *      @sleepFlag: Use schedule if CAN_SLEEP else use udelay.
1861  *
1862  *      This routine performs all the steps necessary to bring the IOC
1863  *      to a OPERATIONAL state.
1864  *
1865  *      This routine also pre-fetches the LAN MAC address of a Fibre Channel
1866  *      MPT adapter.
1867  *
1868  *      Returns:
1869  *               0 for success
1870  *              -1 if failed to get board READY
1871  *              -2 if READY but IOCFacts Failed
1872  *              -3 if READY but PrimeIOCFifos Failed
1873  *              -4 if READY but IOCInit Failed
1874  */
1875 static int
1876 mpt_do_ioc_recovery(MPT_ADAPTER *ioc, u32 reason, int sleepFlag)
1877 {
1878         int      hard_reset_done = 0;
1879         int      alt_ioc_ready = 0;
1880         int      hard;
1881         int      rc=0;
1882         int      ii;
1883         u8       cb_idx;
1884         int      handlers;
1885         int      ret = 0;
1886         int      reset_alt_ioc_active = 0;
1887         int      irq_allocated = 0;
1888         u8      *a;
1889
1890         printk(KERN_INFO MYNAM ": Initiating %s %s\n",
1891                         ioc->name, reason==MPT_HOSTEVENT_IOC_BRINGUP ? "bringup" : "recovery");
1892
1893         /* Disable reply interrupts (also blocks FreeQ) */
1894         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
1895         ioc->active = 0;
1896
1897         if (ioc->alt_ioc) {
1898                 if (ioc->alt_ioc->active)
1899                         reset_alt_ioc_active = 1;
1900
1901                 /* Disable alt-IOC's reply interrupts (and FreeQ) for a bit ... */
1902                 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, 0xFFFFFFFF);
1903                 ioc->alt_ioc->active = 0;
1904         }
1905
1906         hard = 1;
1907         if (reason == MPT_HOSTEVENT_IOC_BRINGUP)
1908                 hard = 0;
1909
1910         if ((hard_reset_done = MakeIocReady(ioc, hard, sleepFlag)) < 0) {
1911                 if (hard_reset_done == -4) {
1912                         printk(KERN_WARNING MYNAM ": %s Owned by PEER..skipping!\n",
1913                                         ioc->name);
1914
1915                         if (reset_alt_ioc_active && ioc->alt_ioc) {
1916                                 /* (re)Enable alt-IOC! (reply interrupt, FreeQ) */
1917                                 dprintk(ioc, printk(KERN_INFO MYNAM
1918                                         ": alt-%s reply irq re-enabled\n",
1919                                                 ioc->alt_ioc->name));
1920                                 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
1921                                 ioc->alt_ioc->active = 1;
1922                         }
1923
1924                 } else {
1925                         printk(KERN_WARNING MYNAM ": %s NOT READY WARNING!\n",
1926                                         ioc->name);
1927                 }
1928                 return -1;
1929         }
1930
1931         /* hard_reset_done = 0 if a soft reset was performed
1932          * and 1 if a hard reset was performed.
1933          */
1934         if (hard_reset_done && reset_alt_ioc_active && ioc->alt_ioc) {
1935                 if ((rc = MakeIocReady(ioc->alt_ioc, 0, sleepFlag)) == 0)
1936                         alt_ioc_ready = 1;
1937                 else
1938                         printk(KERN_WARNING MYNAM
1939                                         ": alt-%s: Not ready WARNING!\n",
1940                                         ioc->alt_ioc->name);
1941         }
1942
1943         for (ii=0; ii<5; ii++) {
1944                 /* Get IOC facts! Allow 5 retries */
1945                 if ((rc = GetIocFacts(ioc, sleepFlag, reason)) == 0)
1946                         break;
1947         }
1948
1949
1950         if (ii == 5) {
1951                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Retry IocFacts failed rc=%x\n", ioc->name, rc));
1952                 ret = -2;
1953         } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
1954                 MptDisplayIocCapabilities(ioc);
1955         }
1956
1957         if (alt_ioc_ready) {
1958                 if ((rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason)) != 0) {
1959                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1960                                 "Initial Alt IocFacts failed rc=%x\n", ioc->name, rc));
1961                         /* Retry - alt IOC was initialized once
1962                          */
1963                         rc = GetIocFacts(ioc->alt_ioc, sleepFlag, reason);
1964                 }
1965                 if (rc) {
1966                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
1967                                 "Retry Alt IocFacts failed rc=%x\n", ioc->name, rc));
1968                         alt_ioc_ready = 0;
1969                         reset_alt_ioc_active = 0;
1970                 } else if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
1971                         MptDisplayIocCapabilities(ioc->alt_ioc);
1972                 }
1973         }
1974
1975         /*
1976          * Device is reset now. It must have de-asserted the interrupt line
1977          * (if it was asserted) and it should be safe to register for the
1978          * interrupt now.
1979          */
1980         if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
1981                 ioc->pci_irq = -1;
1982                 if (ioc->pcidev->irq) {
1983                         if (mpt_msi_enable && !pci_enable_msi(ioc->pcidev))
1984                                 printk(MYIOC_s_INFO_FMT "PCI-MSI enabled\n",
1985                                         ioc->name);
1986                         rc = request_irq(ioc->pcidev->irq, mpt_interrupt,
1987                                         IRQF_SHARED, ioc->name, ioc);
1988                         if (rc < 0) {
1989                                 printk(MYIOC_s_ERR_FMT "Unable to allocate "
1990                                         "interrupt %d!\n", ioc->name,
1991                                         ioc->pcidev->irq);
1992                                 if (mpt_msi_enable)
1993                                         pci_disable_msi(ioc->pcidev);
1994                                 return -EBUSY;
1995                         }
1996                         irq_allocated = 1;
1997                         ioc->pci_irq = ioc->pcidev->irq;
1998                         pci_set_master(ioc->pcidev);            /* ?? */
1999                         pci_set_drvdata(ioc->pcidev, ioc);
2000                         dprintk(ioc, printk(KERN_INFO MYNAM ": %s installed at interrupt "
2001                                 "%d\n", ioc->name, ioc->pcidev->irq));
2002                 }
2003         }
2004
2005         /* Prime reply & request queues!
2006          * (mucho alloc's) Must be done prior to
2007          * init as upper addresses are needed for init.
2008          * If fails, continue with alt-ioc processing
2009          */
2010         if ((ret == 0) && ((rc = PrimeIocFifos(ioc)) != 0))
2011                 ret = -3;
2012
2013         /* May need to check/upload firmware & data here!
2014          * If fails, continue with alt-ioc processing
2015          */
2016         if ((ret == 0) && ((rc = SendIocInit(ioc, sleepFlag)) != 0))
2017                 ret = -4;
2018 // NEW!
2019         if (alt_ioc_ready && ((rc = PrimeIocFifos(ioc->alt_ioc)) != 0)) {
2020                 printk(KERN_WARNING MYNAM ": alt-%s: (%d) FIFO mgmt alloc WARNING!\n",
2021                                 ioc->alt_ioc->name, rc);
2022                 alt_ioc_ready = 0;
2023                 reset_alt_ioc_active = 0;
2024         }
2025
2026         if (alt_ioc_ready) {
2027                 if ((rc = SendIocInit(ioc->alt_ioc, sleepFlag)) != 0) {
2028                         alt_ioc_ready = 0;
2029                         reset_alt_ioc_active = 0;
2030                         printk(KERN_WARNING MYNAM
2031                                 ": alt-%s: (%d) init failure WARNING!\n",
2032                                         ioc->alt_ioc->name, rc);
2033                 }
2034         }
2035
2036         if (reason == MPT_HOSTEVENT_IOC_BRINGUP){
2037                 if (ioc->upload_fw) {
2038                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2039                                 "firmware upload required!\n", ioc->name));
2040
2041                         /* Controller is not operational, cannot do upload
2042                          */
2043                         if (ret == 0) {
2044                                 rc = mpt_do_upload(ioc, sleepFlag);
2045                                 if (rc == 0) {
2046                                         if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
2047                                                 /*
2048                                                  * Maintain only one pointer to FW memory
2049                                                  * so there will not be two attempt to
2050                                                  * downloadboot onboard dual function
2051                                                  * chips (mpt_adapter_disable,
2052                                                  * mpt_diag_reset)
2053                                                  */
2054                                                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2055                                                         ": mpt_upload:  alt_%s has cached_fw=%p \n",
2056                                                         ioc->name, ioc->alt_ioc->name, ioc->alt_ioc->cached_fw));
2057                                                 ioc->alt_ioc->cached_fw = NULL;
2058                                         }
2059                                 } else {
2060                                         printk(KERN_WARNING MYNAM ": firmware upload failure!\n");
2061                                         ret = -5;
2062                                 }
2063                         }
2064                 }
2065         }
2066
2067         if (ret == 0) {
2068                 /* Enable! (reply interrupt) */
2069                 CHIPREG_WRITE32(&ioc->chip->IntMask, MPI_HIM_DIM);
2070                 ioc->active = 1;
2071         }
2072
2073         if (reset_alt_ioc_active && ioc->alt_ioc) {
2074                 /* (re)Enable alt-IOC! (reply interrupt) */
2075                 dinitprintk(ioc, printk(KERN_INFO MYNAM ": alt-%s reply irq re-enabled\n",
2076                                 ioc->alt_ioc->name));
2077                 CHIPREG_WRITE32(&ioc->alt_ioc->chip->IntMask, MPI_HIM_DIM);
2078                 ioc->alt_ioc->active = 1;
2079         }
2080
2081         /*  Enable MPT base driver management of EventNotification
2082          *  and EventAck handling.
2083          */
2084         if ((ret == 0) && (!ioc->facts.EventState))
2085                 (void) SendEventNotification(ioc, 1);   /* 1=Enable EventNotification */
2086
2087         if (ioc->alt_ioc && alt_ioc_ready && !ioc->alt_ioc->facts.EventState)
2088                 (void) SendEventNotification(ioc->alt_ioc, 1);  /* 1=Enable EventNotification */
2089
2090         /*      Add additional "reason" check before call to GetLanConfigPages
2091          *      (combined with GetIoUnitPage2 call).  This prevents a somewhat
2092          *      recursive scenario; GetLanConfigPages times out, timer expired
2093          *      routine calls HardResetHandler, which calls into here again,
2094          *      and we try GetLanConfigPages again...
2095          */
2096         if ((ret == 0) && (reason == MPT_HOSTEVENT_IOC_BRINGUP)) {
2097
2098                 /*
2099                  * Initalize link list for inactive raid volumes.
2100                  */
2101                 init_MUTEX(&ioc->raid_data.inactive_list_mutex);
2102                 INIT_LIST_HEAD(&ioc->raid_data.inactive_list);
2103
2104                 if (ioc->bus_type == SAS) {
2105
2106                         /* clear persistency table */
2107                         if(ioc->facts.IOCExceptions &
2108                             MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL) {
2109                                 ret = mptbase_sas_persist_operation(ioc,
2110                                     MPI_SAS_OP_CLEAR_NOT_PRESENT);
2111                                 if(ret != 0)
2112                                         goto out;
2113                         }
2114
2115                         /* Find IM volumes
2116                          */
2117                         mpt_findImVolumes(ioc);
2118
2119                 } else if (ioc->bus_type == FC) {
2120                         if ((ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) &&
2121                             (ioc->lan_cnfg_page0.Header.PageLength == 0)) {
2122                                 /*
2123                                  *  Pre-fetch the ports LAN MAC address!
2124                                  *  (LANPage1_t stuff)
2125                                  */
2126                                 (void) GetLanConfigPages(ioc);
2127                                 a = (u8*)&ioc->lan_cnfg_page1.HardwareAddressLow;
2128                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2129                                         "LanAddr = %02X:%02X:%02X:"
2130                                         "%02X:%02X:%02X\n",
2131                                         ioc->name, a[5], a[4],
2132                                         a[3], a[2], a[1], a[0] ));
2133
2134                         }
2135                 } else {
2136                         /* Get NVRAM and adapter maximums from SPP 0 and 2
2137                          */
2138                         mpt_GetScsiPortSettings(ioc, 0);
2139
2140                         /* Get version and length of SDP 1
2141                          */
2142                         mpt_readScsiDevicePageHeaders(ioc, 0);
2143
2144                         /* Find IM volumes
2145                          */
2146                         if (ioc->facts.MsgVersion >= MPI_VERSION_01_02)
2147                                 mpt_findImVolumes(ioc);
2148
2149                         /* Check, and possibly reset, the coalescing value
2150                          */
2151                         mpt_read_ioc_pg_1(ioc);
2152
2153                         mpt_read_ioc_pg_4(ioc);
2154                 }
2155
2156                 GetIoUnitPage2(ioc);
2157                 mpt_get_manufacturing_pg_0(ioc);
2158         }
2159
2160         /*
2161          * Call each currently registered protocol IOC reset handler
2162          * with post-reset indication.
2163          * NOTE: If we're doing _IOC_BRINGUP, there can be no
2164          * MptResetHandlers[] registered yet.
2165          */
2166         if (hard_reset_done) {
2167                 rc = handlers = 0;
2168                 for (cb_idx = MPT_MAX_PROTOCOL_DRIVERS-1; cb_idx; cb_idx--) {
2169                         if ((ret == 0) && MptResetHandlers[cb_idx]) {
2170                                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2171                                         "Calling IOC post_reset handler #%d\n",
2172                                         ioc->name, cb_idx));
2173                                 rc += mpt_signal_reset(cb_idx, ioc, MPT_IOC_POST_RESET);
2174                                 handlers++;
2175                         }
2176
2177                         if (alt_ioc_ready && MptResetHandlers[cb_idx]) {
2178                                 drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2179                                         "Calling alt-%s post_reset handler #%d\n",
2180                                         ioc->name, ioc->alt_ioc->name, cb_idx));
2181                                 rc += mpt_signal_reset(cb_idx, ioc->alt_ioc, MPT_IOC_POST_RESET);
2182                                 handlers++;
2183                         }
2184                 }
2185                 /* FIXME?  Examine results here? */
2186         }
2187
2188  out:
2189         if ((ret != 0) && irq_allocated) {
2190                 free_irq(ioc->pci_irq, ioc);
2191                 if (mpt_msi_enable)
2192                         pci_disable_msi(ioc->pcidev);
2193         }
2194         return ret;
2195 }
2196
2197 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2198 /**
2199  *      mpt_detect_bound_ports - Search for matching PCI bus/dev_function
2200  *      @ioc: Pointer to MPT adapter structure
2201  *      @pdev: Pointer to (struct pci_dev) structure
2202  *
2203  *      Search for PCI bus/dev_function which matches
2204  *      PCI bus/dev_function (+/-1) for newly discovered 929,
2205  *      929X, 1030 or 1035.
2206  *
2207  *      If match on PCI dev_function +/-1 is found, bind the two MPT adapters
2208  *      using alt_ioc pointer fields in their %MPT_ADAPTER structures.
2209  */
2210 static void
2211 mpt_detect_bound_ports(MPT_ADAPTER *ioc, struct pci_dev *pdev)
2212 {
2213         struct pci_dev *peer=NULL;
2214         unsigned int slot = PCI_SLOT(pdev->devfn);
2215         unsigned int func = PCI_FUNC(pdev->devfn);
2216         MPT_ADAPTER *ioc_srch;
2217
2218         dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "PCI device %s devfn=%x/%x,"
2219             " searching for devfn match on %x or %x\n",
2220                 ioc->name, pci_name(pdev), pdev->bus->number,
2221                 pdev->devfn, func-1, func+1));
2222
2223         peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func-1));
2224         if (!peer) {
2225                 peer = pci_get_slot(pdev->bus, PCI_DEVFN(slot,func+1));
2226                 if (!peer)
2227                         return;
2228         }
2229
2230         list_for_each_entry(ioc_srch, &ioc_list, list) {
2231                 struct pci_dev *_pcidev = ioc_srch->pcidev;
2232                 if (_pcidev == peer) {
2233                         /* Paranoia checks */
2234                         if (ioc->alt_ioc != NULL) {
2235                                 printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
2236                                         ioc->name, ioc->alt_ioc->name);
2237                                 break;
2238                         } else if (ioc_srch->alt_ioc != NULL) {
2239                                 printk(KERN_WARNING MYNAM ": Oops, already bound (%s <==> %s)!\n",
2240                                         ioc_srch->name, ioc_srch->alt_ioc->name);
2241                                 break;
2242                         }
2243                         dprintk(ioc, printk(KERN_INFO MYNAM ": FOUND! binding %s <==> %s\n",
2244                                 ioc->name, ioc_srch->name));
2245                         ioc_srch->alt_ioc = ioc;
2246                         ioc->alt_ioc = ioc_srch;
2247                 }
2248         }
2249         pci_dev_put(peer);
2250 }
2251
2252 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2253 /**
2254  *      mpt_adapter_disable - Disable misbehaving MPT adapter.
2255  *      @ioc: Pointer to MPT adapter structure
2256  */
2257 static void
2258 mpt_adapter_disable(MPT_ADAPTER *ioc)
2259 {
2260         int sz;
2261         int ret;
2262
2263         if (ioc->cached_fw != NULL) {
2264                 ddlprintk(ioc, printk(KERN_INFO MYNAM ": mpt_adapter_disable: Pushing FW onto adapter\n"));
2265                 if ((ret = mpt_downloadboot(ioc, (MpiFwHeader_t *)ioc->cached_fw, NO_SLEEP)) < 0) {
2266                         printk(KERN_WARNING MYNAM
2267                                 ": firmware downloadboot failure (%d)!\n", ret);
2268                 }
2269         }
2270
2271         /* Disable adapter interrupts! */
2272         CHIPREG_WRITE32(&ioc->chip->IntMask, 0xFFFFFFFF);
2273         ioc->active = 0;
2274         /* Clear any lingering interrupt */
2275         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
2276
2277         if (ioc->alloc != NULL) {
2278                 sz = ioc->alloc_sz;
2279                 dexitprintk(ioc, printk(KERN_INFO MYNAM ": %s.free  @ %p, sz=%d bytes\n",
2280                         ioc->name, ioc->alloc, ioc->alloc_sz));
2281                 pci_free_consistent(ioc->pcidev, sz,
2282                                 ioc->alloc, ioc->alloc_dma);
2283                 ioc->reply_frames = NULL;
2284                 ioc->req_frames = NULL;
2285                 ioc->alloc = NULL;
2286                 ioc->alloc_total -= sz;
2287         }
2288
2289         if (ioc->sense_buf_pool != NULL) {
2290                 sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC);
2291                 pci_free_consistent(ioc->pcidev, sz,
2292                                 ioc->sense_buf_pool, ioc->sense_buf_pool_dma);
2293                 ioc->sense_buf_pool = NULL;
2294                 ioc->alloc_total -= sz;
2295         }
2296
2297         if (ioc->events != NULL){
2298                 sz = MPTCTL_EVENT_LOG_SIZE * sizeof(MPT_IOCTL_EVENTS);
2299                 kfree(ioc->events);
2300                 ioc->events = NULL;
2301                 ioc->alloc_total -= sz;
2302         }
2303
2304         if (ioc->cached_fw != NULL) {
2305                 sz = ioc->facts.FWImageSize;
2306                 pci_free_consistent(ioc->pcidev, sz,
2307                         ioc->cached_fw, ioc->cached_fw_dma);
2308                 ioc->cached_fw = NULL;
2309                 ioc->alloc_total -= sz;
2310         }
2311
2312         kfree(ioc->spi_data.nvram);
2313         mpt_inactive_raid_list_free(ioc);
2314         kfree(ioc->raid_data.pIocPg2);
2315         kfree(ioc->raid_data.pIocPg3);
2316         ioc->spi_data.nvram = NULL;
2317         ioc->raid_data.pIocPg3 = NULL;
2318
2319         if (ioc->spi_data.pIocPg4 != NULL) {
2320                 sz = ioc->spi_data.IocPg4Sz;
2321                 pci_free_consistent(ioc->pcidev, sz,
2322                         ioc->spi_data.pIocPg4,
2323                         ioc->spi_data.IocPg4_dma);
2324                 ioc->spi_data.pIocPg4 = NULL;
2325                 ioc->alloc_total -= sz;
2326         }
2327
2328         if (ioc->ReqToChain != NULL) {
2329                 kfree(ioc->ReqToChain);
2330                 kfree(ioc->RequestNB);
2331                 ioc->ReqToChain = NULL;
2332         }
2333
2334         kfree(ioc->ChainToChain);
2335         ioc->ChainToChain = NULL;
2336
2337         if (ioc->HostPageBuffer != NULL) {
2338                 if((ret = mpt_host_page_access_control(ioc,
2339                     MPI_DB_HPBAC_FREE_BUFFER, NO_SLEEP)) != 0) {
2340                         printk(KERN_ERR MYNAM
2341                            ": %s: host page buffers free failed (%d)!\n",
2342                             __FUNCTION__, ret);
2343                 }
2344                 dexitprintk(ioc, printk(KERN_INFO MYNAM ": %s HostPageBuffer free  @ %p, sz=%d bytes\n",
2345                         ioc->name, ioc->HostPageBuffer, ioc->HostPageBuffer_sz));
2346                 pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz,
2347                                 ioc->HostPageBuffer,
2348                                 ioc->HostPageBuffer_dma);
2349                 ioc->HostPageBuffer = NULL;
2350                 ioc->HostPageBuffer_sz = 0;
2351                 ioc->alloc_total -= ioc->HostPageBuffer_sz;
2352         }
2353 }
2354
2355 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2356 /**
2357  *      mpt_adapter_dispose - Free all resources associated with an MPT adapter
2358  *      @ioc: Pointer to MPT adapter structure
2359  *
2360  *      This routine unregisters h/w resources and frees all alloc'd memory
2361  *      associated with a MPT adapter structure.
2362  */
2363 static void
2364 mpt_adapter_dispose(MPT_ADAPTER *ioc)
2365 {
2366         int sz_first, sz_last;
2367
2368         if (ioc == NULL)
2369                 return;
2370
2371         sz_first = ioc->alloc_total;
2372
2373         mpt_adapter_disable(ioc);
2374
2375         if (ioc->pci_irq != -1) {
2376                 free_irq(ioc->pci_irq, ioc);
2377                 if (mpt_msi_enable)
2378                         pci_disable_msi(ioc->pcidev);
2379                 ioc->pci_irq = -1;
2380         }
2381
2382         if (ioc->memmap != NULL) {
2383                 iounmap(ioc->memmap);
2384                 ioc->memmap = NULL;
2385         }
2386
2387 #if defined(CONFIG_MTRR) && 0
2388         if (ioc->mtrr_reg > 0) {
2389                 mtrr_del(ioc->mtrr_reg, 0, 0);
2390                 dprintk(ioc, printk(KERN_INFO MYNAM ": %s: MTRR region de-registered\n", ioc->name));
2391         }
2392 #endif
2393
2394         /*  Zap the adapter lookup ptr!  */
2395         list_del(&ioc->list);
2396
2397         sz_last = ioc->alloc_total;
2398         dprintk(ioc, printk(KERN_INFO MYNAM ": %s: free'd %d of %d bytes\n",
2399                         ioc->name, sz_first-sz_last+(int)sizeof(*ioc), sz_first));
2400
2401         if (ioc->alt_ioc)
2402                 ioc->alt_ioc->alt_ioc = NULL;
2403
2404         kfree(ioc);
2405 }
2406
2407 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2408 /**
2409  *      MptDisplayIocCapabilities - Disply IOC's capabilities.
2410  *      @ioc: Pointer to MPT adapter structure
2411  */
2412 static void
2413 MptDisplayIocCapabilities(MPT_ADAPTER *ioc)
2414 {
2415         int i = 0;
2416
2417         printk(KERN_INFO "%s: ", ioc->name);
2418         if (ioc->prod_name)
2419                 printk("%s: ", ioc->prod_name);
2420         printk("Capabilities={");
2421
2422         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR) {
2423                 printk("Initiator");
2424                 i++;
2425         }
2426
2427         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2428                 printk("%sTarget", i ? "," : "");
2429                 i++;
2430         }
2431
2432         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_LAN) {
2433                 printk("%sLAN", i ? "," : "");
2434                 i++;
2435         }
2436
2437 #if 0
2438         /*
2439          *  This would probably evoke more questions than it's worth
2440          */
2441         if (ioc->pfacts[0].ProtocolFlags & MPI_PORTFACTS_PROTOCOL_TARGET) {
2442                 printk("%sLogBusAddr", i ? "," : "");
2443                 i++;
2444         }
2445 #endif
2446
2447         printk("}\n");
2448 }
2449
2450 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2451 /**
2452  *      MakeIocReady - Get IOC to a READY state, using KickStart if needed.
2453  *      @ioc: Pointer to MPT_ADAPTER structure
2454  *      @force: Force hard KickStart of IOC
2455  *      @sleepFlag: Specifies whether the process can sleep
2456  *
2457  *      Returns:
2458  *               1 - DIAG reset and READY
2459  *               0 - READY initially OR soft reset and READY
2460  *              -1 - Any failure on KickStart
2461  *              -2 - Msg Unit Reset Failed
2462  *              -3 - IO Unit Reset Failed
2463  *              -4 - IOC owned by a PEER
2464  */
2465 static int
2466 MakeIocReady(MPT_ADAPTER *ioc, int force, int sleepFlag)
2467 {
2468         u32      ioc_state;
2469         int      statefault = 0;
2470         int      cntdn;
2471         int      hard_reset_done = 0;
2472         int      r;
2473         int      ii;
2474         int      whoinit;
2475
2476         /* Get current [raw] IOC state  */
2477         ioc_state = mpt_GetIocState(ioc, 0);
2478         dhsprintk(ioc, printk(KERN_INFO MYNAM "::MakeIocReady, %s [raw] state=%08x\n", ioc->name, ioc_state));
2479
2480         /*
2481          *      Check to see if IOC got left/stuck in doorbell handshake
2482          *      grip of death.  If so, hard reset the IOC.
2483          */
2484         if (ioc_state & MPI_DOORBELL_ACTIVE) {
2485                 statefault = 1;
2486                 printk(MYIOC_s_WARN_FMT "Unexpected doorbell active!\n",
2487                                 ioc->name);
2488         }
2489
2490         /* Is it already READY? */
2491         if (!statefault && (ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_READY)
2492                 return 0;
2493
2494         /*
2495          *      Check to see if IOC is in FAULT state.
2496          */
2497         if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
2498                 statefault = 2;
2499                 printk(MYIOC_s_WARN_FMT "IOC is in FAULT state!!!\n",
2500                                 ioc->name);
2501                 printk(KERN_WARNING "           FAULT code = %04xh\n",
2502                                 ioc_state & MPI_DOORBELL_DATA_MASK);
2503         }
2504
2505         /*
2506          *      Hmmm...  Did it get left operational?
2507          */
2508         if ((ioc_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_OPERATIONAL) {
2509                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "IOC operational unexpected\n",
2510                                 ioc->name));
2511
2512                 /* Check WhoInit.
2513                  * If PCI Peer, exit.
2514                  * Else, if no fault conditions are present, issue a MessageUnitReset
2515                  * Else, fall through to KickStart case
2516                  */
2517                 whoinit = (ioc_state & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT;
2518                 dinitprintk(ioc, printk(KERN_INFO MYNAM
2519                         ": whoinit 0x%x statefault %d force %d\n",
2520                         whoinit, statefault, force));
2521                 if (whoinit == MPI_WHOINIT_PCI_PEER)
2522                         return -4;
2523                 else {
2524                         if ((statefault == 0 ) && (force == 0)) {
2525                                 if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) == 0)
2526                                         return 0;
2527                         }
2528                         statefault = 3;
2529                 }
2530         }
2531
2532         hard_reset_done = KickStart(ioc, statefault||force, sleepFlag);
2533         if (hard_reset_done < 0)
2534                 return -1;
2535
2536         /*
2537          *  Loop here waiting for IOC to come READY.
2538          */
2539         ii = 0;
2540         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 5;     /* 5 seconds */
2541
2542         while ((ioc_state = mpt_GetIocState(ioc, 1)) != MPI_IOC_STATE_READY) {
2543                 if (ioc_state == MPI_IOC_STATE_OPERATIONAL) {
2544                         /*
2545                          *  BIOS or previous driver load left IOC in OP state.
2546                          *  Reset messaging FIFOs.
2547                          */
2548                         if ((r = SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag)) != 0) {
2549                                 printk(MYIOC_s_ERR_FMT "IOC msg unit reset failed!\n", ioc->name);
2550                                 return -2;
2551                         }
2552                 } else if (ioc_state == MPI_IOC_STATE_RESET) {
2553                         /*
2554                          *  Something is wrong.  Try to get IOC back
2555                          *  to a known state.
2556                          */
2557                         if ((r = SendIocReset(ioc, MPI_FUNCTION_IO_UNIT_RESET, sleepFlag)) != 0) {
2558                                 printk(MYIOC_s_ERR_FMT "IO unit reset failed!\n", ioc->name);
2559                                 return -3;
2560                         }
2561                 }
2562
2563                 ii++; cntdn--;
2564                 if (!cntdn) {
2565                         printk(MYIOC_s_ERR_FMT "Wait IOC_READY state timeout(%d)!\n",
2566                                         ioc->name, (int)((ii+5)/HZ));
2567                         return -ETIME;
2568                 }
2569
2570                 if (sleepFlag == CAN_SLEEP) {
2571                         msleep(1);
2572                 } else {
2573                         mdelay (1);     /* 1 msec delay */
2574                 }
2575
2576         }
2577
2578         if (statefault < 3) {
2579                 printk(MYIOC_s_INFO_FMT "Recovered from %s\n",
2580                                 ioc->name,
2581                                 statefault==1 ? "stuck handshake" : "IOC FAULT");
2582         }
2583
2584         return hard_reset_done;
2585 }
2586
2587 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2588 /**
2589  *      mpt_GetIocState - Get the current state of a MPT adapter.
2590  *      @ioc: Pointer to MPT_ADAPTER structure
2591  *      @cooked: Request raw or cooked IOC state
2592  *
2593  *      Returns all IOC Doorbell register bits if cooked==0, else just the
2594  *      Doorbell bits in MPI_IOC_STATE_MASK.
2595  */
2596 u32
2597 mpt_GetIocState(MPT_ADAPTER *ioc, int cooked)
2598 {
2599         u32 s, sc;
2600
2601         /*  Get!  */
2602         s = CHIPREG_READ32(&ioc->chip->Doorbell);
2603 //      dprintk((MYIOC_s_INFO_FMT "raw state = %08x\n", ioc->name, s));
2604         sc = s & MPI_IOC_STATE_MASK;
2605
2606         /*  Save!  */
2607         ioc->last_state = sc;
2608
2609         return cooked ? sc : s;
2610 }
2611
2612 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2613 /**
2614  *      GetIocFacts - Send IOCFacts request to MPT adapter.
2615  *      @ioc: Pointer to MPT_ADAPTER structure
2616  *      @sleepFlag: Specifies whether the process can sleep
2617  *      @reason: If recovery, only update facts.
2618  *
2619  *      Returns 0 for success, non-zero for failure.
2620  */
2621 static int
2622 GetIocFacts(MPT_ADAPTER *ioc, int sleepFlag, int reason)
2623 {
2624         IOCFacts_t               get_facts;
2625         IOCFactsReply_t         *facts;
2626         int                      r;
2627         int                      req_sz;
2628         int                      reply_sz;
2629         int                      sz;
2630         u32                      status, vv;
2631         u8                       shiftFactor=1;
2632
2633         /* IOC *must* NOT be in RESET state! */
2634         if (ioc->last_state == MPI_IOC_STATE_RESET) {
2635                 printk(KERN_ERR MYNAM ": ERROR - Can't get IOCFacts, %s NOT READY! (%08x)\n",
2636                                 ioc->name,
2637                                 ioc->last_state );
2638                 return -44;
2639         }
2640
2641         facts = &ioc->facts;
2642
2643         /* Destination (reply area)... */
2644         reply_sz = sizeof(*facts);
2645         memset(facts, 0, reply_sz);
2646
2647         /* Request area (get_facts on the stack right now!) */
2648         req_sz = sizeof(get_facts);
2649         memset(&get_facts, 0, req_sz);
2650
2651         get_facts.Function = MPI_FUNCTION_IOC_FACTS;
2652         /* Assert: All other get_facts fields are zero! */
2653
2654         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2655             "Sending get IocFacts request req_sz=%d reply_sz=%d\n",
2656             ioc->name, req_sz, reply_sz));
2657
2658         /* No non-zero fields in the get_facts request are greater than
2659          * 1 byte in size, so we can just fire it off as is.
2660          */
2661         r = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_facts,
2662                         reply_sz, (u16*)facts, 5 /*seconds*/, sleepFlag);
2663         if (r != 0)
2664                 return r;
2665
2666         /*
2667          * Now byte swap (GRRR) the necessary fields before any further
2668          * inspection of reply contents.
2669          *
2670          * But need to do some sanity checks on MsgLength (byte) field
2671          * to make sure we don't zero IOC's req_sz!
2672          */
2673         /* Did we get a valid reply? */
2674         if (facts->MsgLength > offsetof(IOCFactsReply_t, RequestFrameSize)/sizeof(u32)) {
2675                 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2676                         /*
2677                          * If not been here, done that, save off first WhoInit value
2678                          */
2679                         if (ioc->FirstWhoInit == WHOINIT_UNKNOWN)
2680                                 ioc->FirstWhoInit = facts->WhoInit;
2681                 }
2682
2683                 facts->MsgVersion = le16_to_cpu(facts->MsgVersion);
2684                 facts->MsgContext = le32_to_cpu(facts->MsgContext);
2685                 facts->IOCExceptions = le16_to_cpu(facts->IOCExceptions);
2686                 facts->IOCStatus = le16_to_cpu(facts->IOCStatus);
2687                 facts->IOCLogInfo = le32_to_cpu(facts->IOCLogInfo);
2688                 status = le16_to_cpu(facts->IOCStatus) & MPI_IOCSTATUS_MASK;
2689                 /* CHECKME! IOCStatus, IOCLogInfo */
2690
2691                 facts->ReplyQueueDepth = le16_to_cpu(facts->ReplyQueueDepth);
2692                 facts->RequestFrameSize = le16_to_cpu(facts->RequestFrameSize);
2693
2694                 /*
2695                  * FC f/w version changed between 1.1 and 1.2
2696                  *      Old: u16{Major(4),Minor(4),SubMinor(8)}
2697                  *      New: u32{Major(8),Minor(8),Unit(8),Dev(8)}
2698                  */
2699                 if (facts->MsgVersion < 0x0102) {
2700                         /*
2701                          *      Handle old FC f/w style, convert to new...
2702                          */
2703                         u16      oldv = le16_to_cpu(facts->Reserved_0101_FWVersion);
2704                         facts->FWVersion.Word =
2705                                         ((oldv<<12) & 0xFF000000) |
2706                                         ((oldv<<8)  & 0x000FFF00);
2707                 } else
2708                         facts->FWVersion.Word = le32_to_cpu(facts->FWVersion.Word);
2709
2710                 facts->ProductID = le16_to_cpu(facts->ProductID);
2711                 if ((ioc->facts.ProductID & MPI_FW_HEADER_PID_PROD_MASK)
2712                     > MPI_FW_HEADER_PID_PROD_TARGET_SCSI)
2713                         ioc->ir_firmware = 1;
2714                 facts->CurrentHostMfaHighAddr =
2715                                 le32_to_cpu(facts->CurrentHostMfaHighAddr);
2716                 facts->GlobalCredits = le16_to_cpu(facts->GlobalCredits);
2717                 facts->CurrentSenseBufferHighAddr =
2718                                 le32_to_cpu(facts->CurrentSenseBufferHighAddr);
2719                 facts->CurReplyFrameSize =
2720                                 le16_to_cpu(facts->CurReplyFrameSize);
2721                 facts->IOCCapabilities = le32_to_cpu(facts->IOCCapabilities);
2722
2723                 /*
2724                  * Handle NEW (!) IOCFactsReply fields in MPI-1.01.xx
2725                  * Older MPI-1.00.xx struct had 13 dwords, and enlarged
2726                  * to 14 in MPI-1.01.0x.
2727                  */
2728                 if (facts->MsgLength >= (offsetof(IOCFactsReply_t,FWImageSize) + 7)/4 &&
2729                     facts->MsgVersion > 0x0100) {
2730                         facts->FWImageSize = le32_to_cpu(facts->FWImageSize);
2731                 }
2732
2733                 sz = facts->FWImageSize;
2734                 if ( sz & 0x01 )
2735                         sz += 1;
2736                 if ( sz & 0x02 )
2737                         sz += 2;
2738                 facts->FWImageSize = sz;
2739
2740                 if (!facts->RequestFrameSize) {
2741                         /*  Something is wrong!  */
2742                         printk(MYIOC_s_ERR_FMT "IOC reported invalid 0 request size!\n",
2743                                         ioc->name);
2744                         return -55;
2745                 }
2746
2747                 r = sz = facts->BlockSize;
2748                 vv = ((63 / (sz * 4)) + 1) & 0x03;
2749                 ioc->NB_for_64_byte_frame = vv;
2750                 while ( sz )
2751                 {
2752                         shiftFactor++;
2753                         sz = sz >> 1;
2754                 }
2755                 ioc->NBShiftFactor  = shiftFactor;
2756                 dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT
2757                         "NB_for_64_byte_frame=%x NBShiftFactor=%x BlockSize=%x\n",
2758                         ioc->name, vv, shiftFactor, r));
2759
2760                 if (reason == MPT_HOSTEVENT_IOC_BRINGUP) {
2761                         /*
2762                          * Set values for this IOC's request & reply frame sizes,
2763                          * and request & reply queue depths...
2764                          */
2765                         ioc->req_sz = min(MPT_DEFAULT_FRAME_SIZE, facts->RequestFrameSize * 4);
2766                         ioc->req_depth = min_t(int, MPT_MAX_REQ_DEPTH, facts->GlobalCredits);
2767                         ioc->reply_sz = MPT_REPLY_FRAME_SIZE;
2768                         ioc->reply_depth = min_t(int, MPT_DEFAULT_REPLY_DEPTH, facts->ReplyQueueDepth);
2769
2770                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "reply_sz=%3d, reply_depth=%4d\n",
2771                                 ioc->name, ioc->reply_sz, ioc->reply_depth));
2772                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "req_sz  =%3d, req_depth  =%4d\n",
2773                                 ioc->name, ioc->req_sz, ioc->req_depth));
2774
2775                         /* Get port facts! */
2776                         if ( (r = GetPortFacts(ioc, 0, sleepFlag)) != 0 )
2777                                 return r;
2778                 }
2779         } else {
2780                 printk(MYIOC_s_ERR_FMT
2781                      "Invalid IOC facts reply, msgLength=%d offsetof=%zd!\n",
2782                      ioc->name, facts->MsgLength, (offsetof(IOCFactsReply_t,
2783                      RequestFrameSize)/sizeof(u32)));
2784                 return -66;
2785         }
2786
2787         return 0;
2788 }
2789
2790 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2791 /**
2792  *      GetPortFacts - Send PortFacts request to MPT adapter.
2793  *      @ioc: Pointer to MPT_ADAPTER structure
2794  *      @portnum: Port number
2795  *      @sleepFlag: Specifies whether the process can sleep
2796  *
2797  *      Returns 0 for success, non-zero for failure.
2798  */
2799 static int
2800 GetPortFacts(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
2801 {
2802         PortFacts_t              get_pfacts;
2803         PortFactsReply_t        *pfacts;
2804         int                      ii;
2805         int                      req_sz;
2806         int                      reply_sz;
2807         int                      max_id;
2808
2809         /* IOC *must* NOT be in RESET state! */
2810         if (ioc->last_state == MPI_IOC_STATE_RESET) {
2811                 printk(KERN_ERR MYNAM ": ERROR - Can't get PortFacts, %s NOT READY! (%08x)\n",
2812                                 ioc->name,
2813                                 ioc->last_state );
2814                 return -4;
2815         }
2816
2817         pfacts = &ioc->pfacts[portnum];
2818
2819         /* Destination (reply area)...  */
2820         reply_sz = sizeof(*pfacts);
2821         memset(pfacts, 0, reply_sz);
2822
2823         /* Request area (get_pfacts on the stack right now!) */
2824         req_sz = sizeof(get_pfacts);
2825         memset(&get_pfacts, 0, req_sz);
2826
2827         get_pfacts.Function = MPI_FUNCTION_PORT_FACTS;
2828         get_pfacts.PortNumber = portnum;
2829         /* Assert: All other get_pfacts fields are zero! */
2830
2831         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending get PortFacts(%d) request\n",
2832                         ioc->name, portnum));
2833
2834         /* No non-zero fields in the get_pfacts request are greater than
2835          * 1 byte in size, so we can just fire it off as is.
2836          */
2837         ii = mpt_handshake_req_reply_wait(ioc, req_sz, (u32*)&get_pfacts,
2838                                 reply_sz, (u16*)pfacts, 5 /*seconds*/, sleepFlag);
2839         if (ii != 0)
2840                 return ii;
2841
2842         /* Did we get a valid reply? */
2843
2844         /* Now byte swap the necessary fields in the response. */
2845         pfacts->MsgContext = le32_to_cpu(pfacts->MsgContext);
2846         pfacts->IOCStatus = le16_to_cpu(pfacts->IOCStatus);
2847         pfacts->IOCLogInfo = le32_to_cpu(pfacts->IOCLogInfo);
2848         pfacts->MaxDevices = le16_to_cpu(pfacts->MaxDevices);
2849         pfacts->PortSCSIID = le16_to_cpu(pfacts->PortSCSIID);
2850         pfacts->ProtocolFlags = le16_to_cpu(pfacts->ProtocolFlags);
2851         pfacts->MaxPostedCmdBuffers = le16_to_cpu(pfacts->MaxPostedCmdBuffers);
2852         pfacts->MaxPersistentIDs = le16_to_cpu(pfacts->MaxPersistentIDs);
2853         pfacts->MaxLanBuckets = le16_to_cpu(pfacts->MaxLanBuckets);
2854
2855         max_id = (ioc->bus_type == SAS) ? pfacts->PortSCSIID :
2856             pfacts->MaxDevices;
2857         ioc->devices_per_bus = (max_id > 255) ? 256 : max_id;
2858         ioc->number_of_buses = (ioc->devices_per_bus < 256) ? 1 : max_id/256;
2859
2860         /*
2861          * Place all the devices on channels
2862          *
2863          * (for debuging)
2864          */
2865         if (mpt_channel_mapping) {
2866                 ioc->devices_per_bus = 1;
2867                 ioc->number_of_buses = (max_id > 255) ? 255 : max_id;
2868         }
2869
2870         return 0;
2871 }
2872
2873 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2874 /**
2875  *      SendIocInit - Send IOCInit request to MPT adapter.
2876  *      @ioc: Pointer to MPT_ADAPTER structure
2877  *      @sleepFlag: Specifies whether the process can sleep
2878  *
2879  *      Send IOCInit followed by PortEnable to bring IOC to OPERATIONAL state.
2880  *
2881  *      Returns 0 for success, non-zero for failure.
2882  */
2883 static int
2884 SendIocInit(MPT_ADAPTER *ioc, int sleepFlag)
2885 {
2886         IOCInit_t                ioc_init;
2887         MPIDefaultReply_t        init_reply;
2888         u32                      state;
2889         int                      r;
2890         int                      count;
2891         int                      cntdn;
2892
2893         memset(&ioc_init, 0, sizeof(ioc_init));
2894         memset(&init_reply, 0, sizeof(init_reply));
2895
2896         ioc_init.WhoInit = MPI_WHOINIT_HOST_DRIVER;
2897         ioc_init.Function = MPI_FUNCTION_IOC_INIT;
2898
2899         /* If we are in a recovery mode and we uploaded the FW image,
2900          * then this pointer is not NULL. Skip the upload a second time.
2901          * Set this flag if cached_fw set for either IOC.
2902          */
2903         if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT)
2904                 ioc->upload_fw = 1;
2905         else
2906                 ioc->upload_fw = 0;
2907         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "upload_fw %d facts.Flags=%x\n",
2908                    ioc->name, ioc->upload_fw, ioc->facts.Flags));
2909
2910         ioc_init.MaxDevices = (U8)ioc->devices_per_bus;
2911         ioc_init.MaxBuses = (U8)ioc->number_of_buses;
2912         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "facts.MsgVersion=%x\n",
2913                    ioc->name, ioc->facts.MsgVersion));
2914         if (ioc->facts.MsgVersion >= MPI_VERSION_01_05) {
2915                 // set MsgVersion and HeaderVersion host driver was built with
2916                 ioc_init.MsgVersion = cpu_to_le16(MPI_VERSION);
2917                 ioc_init.HeaderVersion = cpu_to_le16(MPI_HEADER_VERSION);
2918
2919                 if (ioc->facts.Flags & MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT) {
2920                         ioc_init.HostPageBufferSGE = ioc->facts.HostPageBufferSGE;
2921                 } else if(mpt_host_page_alloc(ioc, &ioc_init))
2922                         return -99;
2923         }
2924         ioc_init.ReplyFrameSize = cpu_to_le16(ioc->reply_sz);   /* in BYTES */
2925
2926         if (sizeof(dma_addr_t) == sizeof(u64)) {
2927                 /* Save the upper 32-bits of the request
2928                  * (reply) and sense buffers.
2929                  */
2930                 ioc_init.HostMfaHighAddr = cpu_to_le32((u32)((u64)ioc->alloc_dma >> 32));
2931                 ioc_init.SenseBufferHighAddr = cpu_to_le32((u32)((u64)ioc->sense_buf_pool_dma >> 32));
2932         } else {
2933                 /* Force 32-bit addressing */
2934                 ioc_init.HostMfaHighAddr = cpu_to_le32(0);
2935                 ioc_init.SenseBufferHighAddr = cpu_to_le32(0);
2936         }
2937
2938         ioc->facts.CurrentHostMfaHighAddr = ioc_init.HostMfaHighAddr;
2939         ioc->facts.CurrentSenseBufferHighAddr = ioc_init.SenseBufferHighAddr;
2940         ioc->facts.MaxDevices = ioc_init.MaxDevices;
2941         ioc->facts.MaxBuses = ioc_init.MaxBuses;
2942
2943         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending IOCInit (req @ %p)\n",
2944                         ioc->name, &ioc_init));
2945
2946         r = mpt_handshake_req_reply_wait(ioc, sizeof(IOCInit_t), (u32*)&ioc_init,
2947                                 sizeof(MPIDefaultReply_t), (u16*)&init_reply, 10 /*seconds*/, sleepFlag);
2948         if (r != 0) {
2949                 printk(MYIOC_s_ERR_FMT "Sending IOCInit failed(%d)!\n",ioc->name, r);
2950                 return r;
2951         }
2952
2953         /* No need to byte swap the multibyte fields in the reply
2954          * since we don't even look at its contents.
2955          */
2956
2957         dhsprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending PortEnable (req @ %p)\n",
2958                         ioc->name, &ioc_init));
2959
2960         if ((r = SendPortEnable(ioc, 0, sleepFlag)) != 0) {
2961                 printk(MYIOC_s_ERR_FMT "Sending PortEnable failed(%d)!\n",ioc->name, r);
2962                 return r;
2963         }
2964
2965         /* YIKES!  SUPER IMPORTANT!!!
2966          *  Poll IocState until _OPERATIONAL while IOC is doing
2967          *  LoopInit and TargetDiscovery!
2968          */
2969         count = 0;
2970         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 60;    /* 60 seconds */
2971         state = mpt_GetIocState(ioc, 1);
2972         while (state != MPI_IOC_STATE_OPERATIONAL && --cntdn) {
2973                 if (sleepFlag == CAN_SLEEP) {
2974                         msleep(1);
2975                 } else {
2976                         mdelay(1);
2977                 }
2978
2979                 if (!cntdn) {
2980                         printk(MYIOC_s_ERR_FMT "Wait IOC_OP state timeout(%d)!\n",
2981                                         ioc->name, (int)((count+5)/HZ));
2982                         return -9;
2983                 }
2984
2985                 state = mpt_GetIocState(ioc, 1);
2986                 count++;
2987         }
2988         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "INFO - Wait IOC_OPERATIONAL state (cnt=%d)\n",
2989                         ioc->name, count));
2990
2991         ioc->aen_event_read_flag=0;
2992         return r;
2993 }
2994
2995 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
2996 /**
2997  *      SendPortEnable - Send PortEnable request to MPT adapter port.
2998  *      @ioc: Pointer to MPT_ADAPTER structure
2999  *      @portnum: Port number to enable
3000  *      @sleepFlag: Specifies whether the process can sleep
3001  *
3002  *      Send PortEnable to bring IOC to OPERATIONAL state.
3003  *
3004  *      Returns 0 for success, non-zero for failure.
3005  */
3006 static int
3007 SendPortEnable(MPT_ADAPTER *ioc, int portnum, int sleepFlag)
3008 {
3009         PortEnable_t             port_enable;
3010         MPIDefaultReply_t        reply_buf;
3011         int      rc;
3012         int      req_sz;
3013         int      reply_sz;
3014
3015         /*  Destination...  */
3016         reply_sz = sizeof(MPIDefaultReply_t);
3017         memset(&reply_buf, 0, reply_sz);
3018
3019         req_sz = sizeof(PortEnable_t);
3020         memset(&port_enable, 0, req_sz);
3021
3022         port_enable.Function = MPI_FUNCTION_PORT_ENABLE;
3023         port_enable.PortNumber = portnum;
3024 /*      port_enable.ChainOffset = 0;            */
3025 /*      port_enable.MsgFlags = 0;               */
3026 /*      port_enable.MsgContext = 0;             */
3027
3028         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Sending Port(%d)Enable (req @ %p)\n",
3029                         ioc->name, portnum, &port_enable));
3030
3031         /* RAID FW may take a long time to enable
3032          */
3033         if (ioc->ir_firmware || ioc->bus_type == SAS) {
3034                 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3035                 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3036                 300 /*seconds*/, sleepFlag);
3037         } else {
3038                 rc = mpt_handshake_req_reply_wait(ioc, req_sz,
3039                 (u32*)&port_enable, reply_sz, (u16*)&reply_buf,
3040                 30 /*seconds*/, sleepFlag);
3041         }
3042         return rc;
3043 }
3044
3045 /**
3046  *      mpt_alloc_fw_memory - allocate firmware memory
3047  *      @ioc: Pointer to MPT_ADAPTER structure
3048  *      @size: total FW bytes
3049  *
3050  *      If memory has already been allocated, the same (cached) value
3051  *      is returned.
3052  */
3053 void
3054 mpt_alloc_fw_memory(MPT_ADAPTER *ioc, int size)
3055 {
3056         if (ioc->cached_fw)
3057                 return;  /* use already allocated memory */
3058         if (ioc->alt_ioc && ioc->alt_ioc->cached_fw) {
3059                 ioc->cached_fw = ioc->alt_ioc->cached_fw;  /* use alt_ioc's memory */
3060                 ioc->cached_fw_dma = ioc->alt_ioc->cached_fw_dma;
3061                 ioc->alloc_total += size;
3062                 ioc->alt_ioc->alloc_total -= size;
3063         } else {
3064                 if ( (ioc->cached_fw = pci_alloc_consistent(ioc->pcidev, size, &ioc->cached_fw_dma) ) )
3065                         ioc->alloc_total += size;
3066         }
3067 }
3068 /**
3069  *      mpt_free_fw_memory - free firmware memory
3070  *      @ioc: Pointer to MPT_ADAPTER structure
3071  *
3072  *      If alt_img is NULL, delete from ioc structure.
3073  *      Else, delete a secondary image in same format.
3074  */
3075 void
3076 mpt_free_fw_memory(MPT_ADAPTER *ioc)
3077 {
3078         int sz;
3079
3080         sz = ioc->facts.FWImageSize;
3081         dinitprintk(ioc, printk(KERN_INFO MYNAM "free_fw_memory: FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3082                  ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3083         pci_free_consistent(ioc->pcidev, sz,
3084                         ioc->cached_fw, ioc->cached_fw_dma);
3085         ioc->cached_fw = NULL;
3086
3087         return;
3088 }
3089
3090
3091 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3092 /**
3093  *      mpt_do_upload - Construct and Send FWUpload request to MPT adapter port.
3094  *      @ioc: Pointer to MPT_ADAPTER structure
3095  *      @sleepFlag: Specifies whether the process can sleep
3096  *
3097  *      Returns 0 for success, >0 for handshake failure
3098  *              <0 for fw upload failure.
3099  *
3100  *      Remark: If bound IOC and a successful FWUpload was performed
3101  *      on the bound IOC, the second image is discarded
3102  *      and memory is free'd. Both channels must upload to prevent
3103  *      IOC from running in degraded mode.
3104  */
3105 static int
3106 mpt_do_upload(MPT_ADAPTER *ioc, int sleepFlag)
3107 {
3108         u8                       request[ioc->req_sz];
3109         u8                       reply[sizeof(FWUploadReply_t)];
3110         FWUpload_t              *prequest;
3111         FWUploadReply_t         *preply;
3112         FWUploadTCSGE_t         *ptcsge;
3113         int                      sgeoffset;
3114         u32                      flagsLength;
3115         int                      ii, sz, reply_sz;
3116         int                      cmdStatus;
3117
3118         /* If the image size is 0, we are done.
3119          */
3120         if ((sz = ioc->facts.FWImageSize) == 0)
3121                 return 0;
3122
3123         mpt_alloc_fw_memory(ioc, sz);
3124
3125         dinitprintk(ioc, printk(KERN_INFO MYNAM ": FW Image  @ %p[%p], sz=%d[%x] bytes\n",
3126                  ioc->cached_fw, (void *)(ulong)ioc->cached_fw_dma, sz, sz));
3127
3128         if (ioc->cached_fw == NULL) {
3129                 /* Major Failure.
3130                  */
3131                 return -ENOMEM;
3132         }
3133
3134         prequest = (FWUpload_t *)&request;
3135         preply = (FWUploadReply_t *)&reply;
3136
3137         /*  Destination...  */
3138         memset(prequest, 0, ioc->req_sz);
3139
3140         reply_sz = sizeof(reply);
3141         memset(preply, 0, reply_sz);
3142
3143         prequest->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
3144         prequest->Function = MPI_FUNCTION_FW_UPLOAD;
3145
3146         ptcsge = (FWUploadTCSGE_t *) &prequest->SGL;
3147         ptcsge->DetailsLength = 12;
3148         ptcsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
3149         ptcsge->ImageSize = cpu_to_le32(sz);
3150
3151         sgeoffset = sizeof(FWUpload_t) - sizeof(SGE_MPI_UNION) + sizeof(FWUploadTCSGE_t);
3152
3153         flagsLength = MPT_SGE_FLAGS_SSIMPLE_READ | sz;
3154         mpt_add_sge(&request[sgeoffset], flagsLength, ioc->cached_fw_dma);
3155
3156         sgeoffset += sizeof(u32) + sizeof(dma_addr_t);
3157         dinitprintk(ioc, printk(KERN_INFO MYNAM ": Sending FW Upload (req @ %p) sgeoffset=%d \n",
3158                         prequest, sgeoffset));
3159         DBG_DUMP_FW_REQUEST_FRAME(ioc, (u32 *)prequest)
3160
3161         ii = mpt_handshake_req_reply_wait(ioc, sgeoffset, (u32*)prequest,
3162                                 reply_sz, (u16*)preply, 65 /*seconds*/, sleepFlag);
3163
3164         dinitprintk(ioc, printk(KERN_INFO MYNAM ": FW Upload completed rc=%x \n", ii));
3165
3166         cmdStatus = -EFAULT;
3167         if (ii == 0) {
3168                 /* Handshake transfer was complete and successful.
3169                  * Check the Reply Frame.
3170                  */
3171                 int status, transfer_sz;
3172                 status = le16_to_cpu(preply->IOCStatus);
3173                 if (status == MPI_IOCSTATUS_SUCCESS) {
3174                         transfer_sz = le32_to_cpu(preply->ActualImageSize);
3175                         if (transfer_sz == sz)
3176                                 cmdStatus = 0;
3177                 }
3178         }
3179         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": do_upload cmdStatus=%d \n",
3180                         ioc->name, cmdStatus));
3181
3182
3183         if (cmdStatus) {
3184
3185                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT ": fw upload failed, freeing image \n",
3186                         ioc->name));
3187                 mpt_free_fw_memory(ioc);
3188         }
3189
3190         return cmdStatus;
3191 }
3192
3193 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3194 /**
3195  *      mpt_downloadboot - DownloadBoot code
3196  *      @ioc: Pointer to MPT_ADAPTER structure
3197  *      @pFwHeader: Pointer to firmware header info
3198  *      @sleepFlag: Specifies whether the process can sleep
3199  *
3200  *      FwDownloadBoot requires Programmed IO access.
3201  *
3202  *      Returns 0 for success
3203  *              -1 FW Image size is 0
3204  *              -2 No valid cached_fw Pointer
3205  *              <0 for fw upload failure.
3206  */
3207 static int
3208 mpt_downloadboot(MPT_ADAPTER *ioc, MpiFwHeader_t *pFwHeader, int sleepFlag)
3209 {
3210         MpiExtImageHeader_t     *pExtImage;
3211         u32                      fwSize;
3212         u32                      diag0val;
3213         int                      count;
3214         u32                     *ptrFw;
3215         u32                      diagRwData;
3216         u32                      nextImage;
3217         u32                      load_addr;
3218         u32                      ioc_state=0;
3219
3220         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot: fw size 0x%x (%d), FW Ptr %p\n",
3221                                 ioc->name, pFwHeader->ImageSize, pFwHeader->ImageSize, pFwHeader));
3222
3223         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3224         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3225         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3226         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3227         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3228         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3229
3230         CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM));
3231
3232         /* wait 1 msec */
3233         if (sleepFlag == CAN_SLEEP) {
3234                 msleep(1);
3235         } else {
3236                 mdelay (1);
3237         }
3238
3239         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3240         CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val | MPI_DIAG_RESET_ADAPTER);
3241
3242         for (count = 0; count < 30; count ++) {
3243                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3244                 if (!(diag0val & MPI_DIAG_RESET_ADAPTER)) {
3245                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "RESET_ADAPTER cleared, count=%d\n",
3246                                 ioc->name, count));
3247                         break;
3248                 }
3249                 /* wait .1 sec */
3250                 if (sleepFlag == CAN_SLEEP) {
3251                         msleep (100);
3252                 } else {
3253                         mdelay (100);
3254                 }
3255         }
3256
3257         if ( count == 30 ) {
3258                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot failed! "
3259                 "Unable to get MPI_DIAG_DRWE mode, diag0val=%x\n",
3260                 ioc->name, diag0val));
3261                 return -3;
3262         }
3263
3264         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3265         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3266         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3267         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3268         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3269         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3270
3271         /* Set the DiagRwEn and Disable ARM bits */
3272         CHIPREG_WRITE32(&ioc->chip->Diagnostic, (MPI_DIAG_RW_ENABLE | MPI_DIAG_DISABLE_ARM));
3273
3274         fwSize = (pFwHeader->ImageSize + 3)/4;
3275         ptrFw = (u32 *) pFwHeader;
3276
3277         /* Write the LoadStartAddress to the DiagRw Address Register
3278          * using Programmed IO
3279          */
3280         if (ioc->errata_flag_1064)
3281                 pci_enable_io_access(ioc->pcidev);
3282
3283         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->LoadStartAddress);
3284         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "LoadStart addr written 0x%x \n",
3285                 ioc->name, pFwHeader->LoadStartAddress));
3286
3287         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write FW Image: 0x%x bytes @ %p\n",
3288                                 ioc->name, fwSize*4, ptrFw));
3289         while (fwSize--) {
3290                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3291         }
3292
3293         nextImage = pFwHeader->NextImageHeaderOffset;
3294         while (nextImage) {
3295                 pExtImage = (MpiExtImageHeader_t *) ((char *)pFwHeader + nextImage);
3296
3297                 load_addr = pExtImage->LoadStartAddress;
3298
3299                 fwSize = (pExtImage->ImageSize + 3) >> 2;
3300                 ptrFw = (u32 *)pExtImage;
3301
3302                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write Ext Image: 0x%x (%d) bytes @ %p load_addr=%x\n",
3303                                                 ioc->name, fwSize*4, fwSize*4, ptrFw, load_addr));
3304                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, load_addr);
3305
3306                 while (fwSize--) {
3307                         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, *ptrFw++);
3308                 }
3309                 nextImage = pExtImage->NextImageHeaderOffset;
3310         }
3311
3312         /* Write the IopResetVectorRegAddr */
3313         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Addr=%x! \n", ioc->name,  pFwHeader->IopResetRegAddr));
3314         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, pFwHeader->IopResetRegAddr);
3315
3316         /* Write the IopResetVectorValue */
3317         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Write IopResetVector Value=%x! \n", ioc->name, pFwHeader->IopResetVectorValue));
3318         CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, pFwHeader->IopResetVectorValue);
3319
3320         /* Clear the internal flash bad bit - autoincrementing register,
3321          * so must do two writes.
3322          */
3323         if (ioc->bus_type == SPI) {
3324                 /*
3325                  * 1030 and 1035 H/W errata, workaround to access
3326                  * the ClearFlashBadSignatureBit
3327                  */
3328                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3329                 diagRwData = CHIPREG_PIO_READ32(&ioc->pio_chip->DiagRwData);
3330                 diagRwData |= 0x40000000;
3331                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwAddress, 0x3F000000);
3332                 CHIPREG_PIO_WRITE32(&ioc->pio_chip->DiagRwData, diagRwData);
3333
3334         } else /* if((ioc->bus_type == SAS) || (ioc->bus_type == FC)) */ {
3335                 diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3336                 CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val |
3337                     MPI_DIAG_CLEAR_FLASH_BAD_SIG);
3338
3339                 /* wait 1 msec */
3340                 if (sleepFlag == CAN_SLEEP) {
3341                         msleep (1);
3342                 } else {
3343                         mdelay (1);
3344                 }
3345         }
3346
3347         if (ioc->errata_flag_1064)
3348                 pci_disable_io_access(ioc->pcidev);
3349
3350         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3351         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot diag0val=%x, "
3352                 "turning off PREVENT_IOC_BOOT, DISABLE_ARM, RW_ENABLE\n",
3353                 ioc->name, diag0val));
3354         diag0val &= ~(MPI_DIAG_PREVENT_IOC_BOOT | MPI_DIAG_DISABLE_ARM | MPI_DIAG_RW_ENABLE);
3355         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "downloadboot now diag0val=%x\n",
3356                 ioc->name, diag0val));
3357         CHIPREG_WRITE32(&ioc->chip->Diagnostic, diag0val);
3358
3359         /* Write 0xFF to reset the sequencer */
3360         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3361
3362         if (ioc->bus_type == SAS) {
3363                 ioc_state = mpt_GetIocState(ioc, 0);
3364                 if ( (GetIocFacts(ioc, sleepFlag,
3365                                 MPT_HOSTEVENT_IOC_BRINGUP)) != 0 ) {
3366                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT "GetIocFacts failed: IocState=%x\n",
3367                                         ioc->name, ioc_state));
3368                         return -EFAULT;
3369                 }
3370         }
3371
3372         for (count=0; count<HZ*20; count++) {
3373                 if ((ioc_state = mpt_GetIocState(ioc, 0)) & MPI_IOC_STATE_READY) {
3374                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3375                                 "downloadboot successful! (count=%d) IocState=%x\n",
3376                                 ioc->name, count, ioc_state));
3377                         if (ioc->bus_type == SAS) {
3378                                 return 0;
3379                         }
3380                         if ((SendIocInit(ioc, sleepFlag)) != 0) {
3381                                 ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3382                                         "downloadboot: SendIocInit failed\n",
3383                                         ioc->name));
3384                                 return -EFAULT;
3385                         }
3386                         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3387                                         "downloadboot: SendIocInit successful\n",
3388                                         ioc->name));
3389                         return 0;
3390                 }
3391                 if (sleepFlag == CAN_SLEEP) {
3392                         msleep (10);
3393                 } else {
3394                         mdelay (10);
3395                 }
3396         }
3397         ddlprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3398                 "downloadboot failed! IocState=%x\n",ioc->name, ioc_state));
3399         return -EFAULT;
3400 }
3401
3402 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3403 /**
3404  *      KickStart - Perform hard reset of MPT adapter.
3405  *      @ioc: Pointer to MPT_ADAPTER structure
3406  *      @force: Force hard reset
3407  *      @sleepFlag: Specifies whether the process can sleep
3408  *
3409  *      This routine places MPT adapter in diagnostic mode via the
3410  *      WriteSequence register, and then performs a hard reset of adapter
3411  *      via the Diagnostic register.
3412  *
3413  *      Inputs:   sleepflag - CAN_SLEEP (non-interrupt thread)
3414  *                      or NO_SLEEP (interrupt thread, use mdelay)
3415  *                force - 1 if doorbell active, board fault state
3416  *                              board operational, IOC_RECOVERY or
3417  *                              IOC_BRINGUP and there is an alt_ioc.
3418  *                        0 else
3419  *
3420  *      Returns:
3421  *               1 - hard reset, READY
3422  *               0 - no reset due to History bit, READY
3423  *              -1 - no reset due to History bit but not READY
3424  *                   OR reset but failed to come READY
3425  *              -2 - no reset, could not enter DIAG mode
3426  *              -3 - reset but bad FW bit
3427  */
3428 static int
3429 KickStart(MPT_ADAPTER *ioc, int force, int sleepFlag)
3430 {
3431         int hard_reset_done = 0;
3432         u32 ioc_state=0;
3433         int cnt,cntdn;
3434
3435         dinitprintk(ioc, printk(KERN_WARNING MYNAM ": KickStarting %s!\n", ioc->name));
3436         if (ioc->bus_type == SPI) {
3437                 /* Always issue a Msg Unit Reset first. This will clear some
3438                  * SCSI bus hang conditions.
3439                  */
3440                 SendIocReset(ioc, MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET, sleepFlag);
3441
3442                 if (sleepFlag == CAN_SLEEP) {
3443                         msleep (1000);
3444                 } else {
3445                         mdelay (1000);
3446                 }
3447         }
3448
3449         hard_reset_done = mpt_diag_reset(ioc, force, sleepFlag);
3450         if (hard_reset_done < 0)
3451                 return hard_reset_done;
3452
3453         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "Diagnostic reset successful!\n",
3454                         ioc->name));
3455
3456         cntdn = ((sleepFlag == CAN_SLEEP) ? HZ : 1000) * 2;     /* 2 seconds */
3457         for (cnt=0; cnt<cntdn; cnt++) {
3458                 ioc_state = mpt_GetIocState(ioc, 1);
3459                 if ((ioc_state == MPI_IOC_STATE_READY) || (ioc_state == MPI_IOC_STATE_OPERATIONAL)) {
3460                         dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT "KickStart successful! (cnt=%d)\n",
3461                                         ioc->name, cnt));
3462                         return hard_reset_done;
3463                 }
3464                 if (sleepFlag == CAN_SLEEP) {
3465                         msleep (10);
3466                 } else {
3467                         mdelay (10);
3468                 }
3469         }
3470
3471         printk(MYIOC_s_ERR_FMT "Failed to come READY after reset! IocState=%x\n",
3472                         ioc->name, ioc_state);
3473         return -1;
3474 }
3475
3476 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
3477 /**
3478  *      mpt_diag_reset - Perform hard reset of the adapter.
3479  *      @ioc: Pointer to MPT_ADAPTER structure
3480  *      @ignore: Set if to honor and clear to ignore
3481  *              the reset history bit
3482  *      @sleepFlag: CAN_SLEEP if called in a non-interrupt thread,
3483  *              else set to NO_SLEEP (use mdelay instead)
3484  *
3485  *      This routine places the adapter in diagnostic mode via the
3486  *      WriteSequence register and then performs a hard reset of adapter
3487  *      via the Diagnostic register. Adapter should be in ready state
3488  *      upon successful completion.
3489  *
3490  *      Returns:  1  hard reset successful
3491  *                0  no reset performed because reset history bit set
3492  *               -2  enabling diagnostic mode failed
3493  *               -3  diagnostic reset failed
3494  */
3495 static int
3496 mpt_diag_reset(MPT_ADAPTER *ioc, int ignore, int sleepFlag)
3497 {
3498         MPT_ADAPTER     *iocp=NULL;
3499         u32 diag0val;
3500         u32 doorbell;
3501         int hard_reset_done = 0;
3502         int count = 0;
3503         u32 diag1val = 0;
3504
3505         /* Clear any existing interrupts */
3506         CHIPREG_WRITE32(&ioc->chip->IntStatus, 0);
3507
3508         if (ioc->pcidev->device == MPI_MANUFACTPAGE_DEVID_SAS1078) {
3509                 drsprintk(ioc, printk(MYIOC_s_WARN_FMT "%s: Doorbell=%p; 1078 reset "
3510                         "address=%p\n",  ioc->name, __FUNCTION__,
3511                         &ioc->chip->Doorbell, &ioc->chip->Reset_1078));
3512                 CHIPREG_WRITE32(&ioc->chip->Reset_1078, 0x07);
3513                 if (sleepFlag == CAN_SLEEP)
3514                         msleep(1);
3515                 else
3516                         mdelay(1);
3517
3518                 for (count = 0; count < 60; count ++) {
3519                         doorbell = CHIPREG_READ32(&ioc->chip->Doorbell);
3520                         doorbell &= MPI_IOC_STATE_MASK;
3521
3522                         drsprintk(ioc, printk(MYIOC_s_DEBUG_FMT
3523                                 "looking for READY STATE: doorbell=%x"
3524                                 " count=%d\n",
3525                                 ioc->name, doorbell, count));
3526                         if (doorbell == MPI_IOC_STATE_READY) {
3527                                 return 1;
3528                         }
3529
3530                         /* wait 1 sec */
3531                         if (sleepFlag == CAN_SLEEP)
3532                                 msleep(1000);
3533                         else
3534                                 mdelay(1000);
3535                 }
3536                 return -1;
3537         }
3538
3539         /* Use "Diagnostic reset" method! (only thing available!) */
3540         diag0val = CHIPREG_READ32(&ioc->chip->Diagnostic);
3541
3542         if (ioc->debug_level & MPT_DEBUG) {
3543                 if (ioc->alt_ioc)
3544                         diag1val = CHIPREG_READ32(&ioc->alt_ioc->chip->Diagnostic);
3545                 dprintk(ioc, printk(MYIOC_s_DEBUG_FMT "DbG1: diag0=%08x, diag1=%08x\n",
3546                         ioc->name, diag0val, diag1val));
3547         }
3548
3549         /* Do the reset if we are told to ignore the reset history
3550          * or if the reset history is 0
3551          */
3552         if (ignore || !(diag0val & MPI_DIAG_RESET_HISTORY)) {
3553                 while ((diag0val & MPI_DIAG_DRWE) == 0) {
3554                         /* Write magic sequence to WriteSequence register
3555                          * Loop until in diagnostic mode
3556                          */
3557                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, 0xFF);
3558                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_1ST_KEY_VALUE);
3559                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_2ND_KEY_VALUE);
3560                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_3RD_KEY_VALUE);
3561                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_4TH_KEY_VALUE);
3562                         CHIPREG_WRITE32(&ioc->chip->WriteSequence, MPI_WRSEQ_5TH_KEY_VALUE);
3563
3564                         /* wait 100 msec */
3565                         if (sleepFlag == CAN_SLEEP) {
3566                                 msleep (100);
3567                         } else {
3568                                 mdelay (100);
3569                         }
3570
3571                         count++;
3572                         if (count > 20) {
3573                                 printk(MYIOC_s_ERR_FMT "Enable Diagnostic mode FAILED! (%02xh)\n",
3574                                                 ioc->name, diag0val);
3575                               &