7df09ff38e63408d7fd827d25f49f296cc70c4d0
[linux-2.6.git] / drivers / media / video / sn9c102 / sn9c102_ov7630.c
1 /***************************************************************************
2  * Plug-in for OV7630 image sensor connected to the SN9C1xx PC Camera      *
3  * Controllers                                                             *
4  *                                                                         *
5  * Copyright (C) 2006-2007 by Luca Risolia <luca.risolia@studio.unibo.it>  *
6  *                                                                         *
7  * This program is free software; you can redistribute it and/or modify    *
8  * it under the terms of the GNU General Public License as published by    *
9  * the Free Software Foundation; either version 2 of the License, or       *
10  * (at your option) any later version.                                     *
11  *                                                                         *
12  * This program is distributed in the hope that it will be useful,         *
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of          *
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the           *
15  * GNU General Public License for more details.                            *
16  *                                                                         *
17  * You should have received a copy of the GNU General Public License       *
18  * along with this program; if not, write to the Free Software             *
19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.               *
20  ***************************************************************************/
21
22 #include "sn9c102_sensor.h"
23
24
25 static struct sn9c102_sensor ov7630;
26
27
28 static int ov7630_init(struct sn9c102_device* cam)
29 {
30         int err = 0;
31
32         switch (sn9c102_get_bridge(cam)) {
33         case BRIDGE_SN9C101:
34         case BRIDGE_SN9C102:
35         err += sn9c102_write_reg(cam, 0x00, 0x14);
36         err += sn9c102_write_reg(cam, 0x60, 0x17);
37         err += sn9c102_write_reg(cam, 0x0f, 0x18);
38         err += sn9c102_write_reg(cam, 0x50, 0x19);
39
40                 err += sn9c102_i2c_write(cam, 0x12, 0x8d);
41                 err += sn9c102_i2c_write(cam, 0x12, 0x0d);
42                 err += sn9c102_i2c_write(cam, 0x11, 0x00);
43         err += sn9c102_i2c_write(cam, 0x15, 0x34);
44         err += sn9c102_i2c_write(cam, 0x16, 0x03);
45         err += sn9c102_i2c_write(cam, 0x17, 0x1c);
46         err += sn9c102_i2c_write(cam, 0x18, 0xbd);
47         err += sn9c102_i2c_write(cam, 0x19, 0x06);
48         err += sn9c102_i2c_write(cam, 0x1a, 0xf6);
49         err += sn9c102_i2c_write(cam, 0x1b, 0x04);
50                 err += sn9c102_i2c_write(cam, 0x20, 0x44);
51                 err += sn9c102_i2c_write(cam, 0x23, 0xee);
52                 err += sn9c102_i2c_write(cam, 0x26, 0xa0);
53                 err += sn9c102_i2c_write(cam, 0x27, 0x9a);
54                 err += sn9c102_i2c_write(cam, 0x28, 0x20);
55                 err += sn9c102_i2c_write(cam, 0x29, 0x30);
56                 err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
57                 err += sn9c102_i2c_write(cam, 0x30, 0x24);
58                 err += sn9c102_i2c_write(cam, 0x32, 0x86);
59                 err += sn9c102_i2c_write(cam, 0x60, 0xa9);
60                 err += sn9c102_i2c_write(cam, 0x61, 0x42);
61                 err += sn9c102_i2c_write(cam, 0x65, 0x00);
62                 err += sn9c102_i2c_write(cam, 0x69, 0x38);
63                 err += sn9c102_i2c_write(cam, 0x6f, 0x88);
64                 err += sn9c102_i2c_write(cam, 0x70, 0x0b);
65                 err += sn9c102_i2c_write(cam, 0x71, 0x00);
66                 err += sn9c102_i2c_write(cam, 0x74, 0x21);
67                 err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
68                 break;
69         case BRIDGE_SN9C103:
70                 err += sn9c102_write_reg(cam, 0x00, 0x02);
71                 err += sn9c102_write_reg(cam, 0x00, 0x03);
72                 err += sn9c102_write_reg(cam, 0x1a, 0x04);
73                 err += sn9c102_write_reg(cam, 0x20, 0x05);
74                 err += sn9c102_write_reg(cam, 0x20, 0x06);
75                 err += sn9c102_write_reg(cam, 0x20, 0x07);
76                 err += sn9c102_write_reg(cam, 0x03, 0x10);
77                 err += sn9c102_write_reg(cam, 0x0a, 0x14);
78                 err += sn9c102_write_reg(cam, 0x60, 0x17);
79                 err += sn9c102_write_reg(cam, 0x0f, 0x18);
80                 err += sn9c102_write_reg(cam, 0x50, 0x19);
81                 err += sn9c102_write_reg(cam, 0x1d, 0x1a);
82                 err += sn9c102_write_reg(cam, 0x10, 0x1b);
83                 err += sn9c102_write_reg(cam, 0x02, 0x1c);
84                 err += sn9c102_write_reg(cam, 0x03, 0x1d);
85                 err += sn9c102_write_reg(cam, 0x0f, 0x1e);
86                 err += sn9c102_write_reg(cam, 0x0c, 0x1f);
87                 err += sn9c102_write_reg(cam, 0x00, 0x20);
88                 err += sn9c102_write_reg(cam, 0x10, 0x21);
89                 err += sn9c102_write_reg(cam, 0x20, 0x22);
90                 err += sn9c102_write_reg(cam, 0x30, 0x23);
91                 err += sn9c102_write_reg(cam, 0x40, 0x24);
92                 err += sn9c102_write_reg(cam, 0x50, 0x25);
93                 err += sn9c102_write_reg(cam, 0x60, 0x26);
94                 err += sn9c102_write_reg(cam, 0x70, 0x27);
95                 err += sn9c102_write_reg(cam, 0x80, 0x28);
96                 err += sn9c102_write_reg(cam, 0x90, 0x29);
97                 err += sn9c102_write_reg(cam, 0xa0, 0x2a);
98                 err += sn9c102_write_reg(cam, 0xb0, 0x2b);
99                 err += sn9c102_write_reg(cam, 0xc0, 0x2c);
100                 err += sn9c102_write_reg(cam, 0xd0, 0x2d);
101                 err += sn9c102_write_reg(cam, 0xe0, 0x2e);
102                 err += sn9c102_write_reg(cam, 0xf0, 0x2f);
103                 err += sn9c102_write_reg(cam, 0xff, 0x30);
104
105                 err += sn9c102_i2c_write(cam, 0x12, 0x8d);
106                 err += sn9c102_i2c_write(cam, 0x12, 0x0d);
107                 err += sn9c102_i2c_write(cam, 0x15, 0x34);
108                 err += sn9c102_i2c_write(cam, 0x11, 0x01);
109                 err += sn9c102_i2c_write(cam, 0x1b, 0x04);
110                 err += sn9c102_i2c_write(cam, 0x20, 0x44);
111         err += sn9c102_i2c_write(cam, 0x23, 0xee);
112         err += sn9c102_i2c_write(cam, 0x26, 0xa0);
113         err += sn9c102_i2c_write(cam, 0x27, 0x9a);
114                 err += sn9c102_i2c_write(cam, 0x28, 0x20);
115         err += sn9c102_i2c_write(cam, 0x29, 0x30);
116         err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
117         err += sn9c102_i2c_write(cam, 0x30, 0x24);
118         err += sn9c102_i2c_write(cam, 0x32, 0x86);
119         err += sn9c102_i2c_write(cam, 0x60, 0xa9);
120         err += sn9c102_i2c_write(cam, 0x61, 0x42);
121         err += sn9c102_i2c_write(cam, 0x65, 0x00);
122         err += sn9c102_i2c_write(cam, 0x69, 0x38);
123         err += sn9c102_i2c_write(cam, 0x6f, 0x88);
124         err += sn9c102_i2c_write(cam, 0x70, 0x0b);
125         err += sn9c102_i2c_write(cam, 0x71, 0x00);
126         err += sn9c102_i2c_write(cam, 0x74, 0x21);
127         err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
128                 break;
129         default:
130                 break;
131         }
132
133         return err;
134 }
135
136
137 static int ov7630_get_ctrl(struct sn9c102_device* cam,
138                            struct v4l2_control* ctrl)
139 {
140         int err = 0;
141
142         switch (ctrl->id) {
143         case V4L2_CID_EXPOSURE:
144                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x10)) < 0)
145                         return -EIO;
146                 break;
147         case V4L2_CID_RED_BALANCE:
148                 ctrl->value = sn9c102_pread_reg(cam, 0x07);
149                 break;
150         case V4L2_CID_BLUE_BALANCE:
151                 ctrl->value = sn9c102_pread_reg(cam, 0x06);
152                 break;
153         case SN9C102_V4L2_CID_GREEN_BALANCE:
154                 ctrl->value = sn9c102_pread_reg(cam, 0x05);
155                 break;
156         case V4L2_CID_GAIN:
157                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x00)) < 0)
158                         return -EIO;
159                 ctrl->value &= 0x3f;
160                 break;
161         case V4L2_CID_DO_WHITE_BALANCE:
162                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x0c)) < 0)
163                         return -EIO;
164                 ctrl->value &= 0x3f;
165                 break;
166         case V4L2_CID_WHITENESS:
167                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x0d)) < 0)
168                         return -EIO;
169                 ctrl->value &= 0x3f;
170                 break;
171         case V4L2_CID_AUTOGAIN:
172                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x13)) < 0)
173                         return -EIO;
174                 ctrl->value &= 0x01;
175                 break;
176         case V4L2_CID_VFLIP:
177                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x75)) < 0)
178                         return -EIO;
179                 ctrl->value = (ctrl->value & 0x80) ? 1 : 0;
180                 break;
181         case SN9C102_V4L2_CID_GAMMA:
182                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x14)) < 0)
183                         return -EIO;
184                 ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
185                 break;
186         case SN9C102_V4L2_CID_BAND_FILTER:
187                 if ((ctrl->value = sn9c102_i2c_read(cam, 0x2d)) < 0)
188                         return -EIO;
189                 ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
190                 break;
191         default:
192                 return -EINVAL;
193         }
194
195         return err ? -EIO : 0;
196 }
197
198
199 static int ov7630_set_ctrl(struct sn9c102_device* cam,
200                            const struct v4l2_control* ctrl)
201 {
202         int err = 0;
203
204         switch (ctrl->id) {
205         case V4L2_CID_EXPOSURE:
206                 err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
207                 break;
208         case V4L2_CID_RED_BALANCE:
209                 err += sn9c102_write_reg(cam, ctrl->value, 0x07);
210                 break;
211         case V4L2_CID_BLUE_BALANCE:
212                 err += sn9c102_write_reg(cam, ctrl->value, 0x06);
213                 break;
214         case SN9C102_V4L2_CID_GREEN_BALANCE:
215                 err += sn9c102_write_reg(cam, ctrl->value, 0x05);
216                 break;
217         case V4L2_CID_GAIN:
218                 err += sn9c102_i2c_write(cam, 0x00, ctrl->value);
219                 break;
220         case V4L2_CID_DO_WHITE_BALANCE:
221                 err += sn9c102_i2c_write(cam, 0x0c, ctrl->value);
222                 break;
223         case V4L2_CID_WHITENESS:
224                 err += sn9c102_i2c_write(cam, 0x0d, ctrl->value);
225                 break;
226         case V4L2_CID_AUTOGAIN:
227                 err += sn9c102_i2c_write(cam, 0x13, ctrl->value |
228                                                     (ctrl->value << 1));
229                 break;
230         case V4L2_CID_VFLIP:
231                 err += sn9c102_i2c_write(cam, 0x75, 0x0e | (ctrl->value << 7));
232                 break;
233         case SN9C102_V4L2_CID_GAMMA:
234                 err += sn9c102_i2c_write(cam, 0x14, ctrl->value << 2);
235                 break;
236         case SN9C102_V4L2_CID_BAND_FILTER:
237                 err += sn9c102_i2c_write(cam, 0x2d, ctrl->value << 2);
238                 break;
239         default:
240                 return -EINVAL;
241         }
242
243         return err ? -EIO : 0;
244 }
245
246
247 static int ov7630_set_crop(struct sn9c102_device* cam,
248                            const struct v4l2_rect* rect)
249 {
250         struct sn9c102_sensor* s = sn9c102_get_sensor(cam);
251         int err = 0;
252         u8 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1,
253            v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1;
254
255         err += sn9c102_write_reg(cam, h_start, 0x12);
256         err += sn9c102_write_reg(cam, v_start, 0x13);
257
258         return err;
259 }
260
261
262 static int ov7630_set_pix_format(struct sn9c102_device* cam,
263                                  const struct v4l2_pix_format* pix)
264 {
265         int err = 0;
266
267         if (pix->pixelformat == V4L2_PIX_FMT_SN9C10X)
268                 err += sn9c102_write_reg(cam, 0x20, 0x19);
269         else
270                 err += sn9c102_write_reg(cam, 0x50, 0x19);
271
272         return err;
273 }
274
275
276 static struct sn9c102_sensor ov7630 = {
277         .name = "OV7630",
278         .maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
279         .supported_bridge = BRIDGE_SN9C101 | BRIDGE_SN9C102 | BRIDGE_SN9C103,
280         .sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
281         .frequency = SN9C102_I2C_100KHZ,
282         .interface = SN9C102_I2C_2WIRES,
283         .i2c_slave_id = 0x21,
284         .init = &ov7630_init,
285         .qctrl = {
286                 {
287                         .id = V4L2_CID_GAIN,
288                         .type = V4L2_CTRL_TYPE_INTEGER,
289                         .name = "global gain",
290                         .minimum = 0x00,
291                         .maximum = 0x3f,
292                         .step = 0x01,
293                         .default_value = 0x14,
294                         .flags = 0,
295                 },
296                 {
297                         .id = V4L2_CID_EXPOSURE,
298                         .type = V4L2_CTRL_TYPE_INTEGER,
299                         .name = "exposure",
300                         .minimum = 0x00,
301                         .maximum = 0xff,
302                         .step = 0x01,
303                         .default_value = 0x60,
304                         .flags = 0,
305                 },
306                 {
307                         .id = V4L2_CID_WHITENESS,
308                         .type = V4L2_CTRL_TYPE_INTEGER,
309                         .name = "white balance background: red",
310                         .minimum = 0x00,
311                         .maximum = 0x3f,
312                         .step = 0x01,
313                         .default_value = 0x20,
314                         .flags = 0,
315                 },
316                 {
317                         .id = V4L2_CID_DO_WHITE_BALANCE,
318                         .type = V4L2_CTRL_TYPE_INTEGER,
319                         .name = "white balance background: blue",
320                         .minimum = 0x00,
321                         .maximum = 0x3f,
322                         .step = 0x01,
323                         .default_value = 0x20,
324                         .flags = 0,
325                 },
326                 {
327                         .id = V4L2_CID_RED_BALANCE,
328                         .type = V4L2_CTRL_TYPE_INTEGER,
329                         .name = "red balance",
330                         .minimum = 0x00,
331                         .maximum = 0x7f,
332                         .step = 0x01,
333                         .default_value = 0x20,
334                         .flags = 0,
335                 },
336                 {
337                         .id = V4L2_CID_BLUE_BALANCE,
338                         .type = V4L2_CTRL_TYPE_INTEGER,
339                         .name = "blue balance",
340                         .minimum = 0x00,
341                         .maximum = 0x7f,
342                         .step = 0x01,
343                         .default_value = 0x20,
344                         .flags = 0,
345                 },
346                 {
347                         .id = V4L2_CID_AUTOGAIN,
348                         .type = V4L2_CTRL_TYPE_BOOLEAN,
349                         .name = "auto adjust",
350                         .minimum = 0x00,
351                         .maximum = 0x01,
352                         .step = 0x01,
353                         .default_value = 0x00,
354                         .flags = 0,
355                 },
356                 {
357                         .id = V4L2_CID_VFLIP,
358                         .type = V4L2_CTRL_TYPE_BOOLEAN,
359                         .name = "vertical flip",
360                         .minimum = 0x00,
361                         .maximum = 0x01,
362                         .step = 0x01,
363                         .default_value = 0x01,
364                         .flags = 0,
365                 },
366                 {
367                         .id = SN9C102_V4L2_CID_GREEN_BALANCE,
368                         .type = V4L2_CTRL_TYPE_INTEGER,
369                         .name = "green balance",
370                         .minimum = 0x00,
371                         .maximum = 0x7f,
372                         .step = 0x01,
373                         .default_value = 0x20,
374                         .flags = 0,
375                 },
376                 {
377                         .id = SN9C102_V4L2_CID_BAND_FILTER,
378                         .type = V4L2_CTRL_TYPE_BOOLEAN,
379                         .name = "band filter",
380                         .minimum = 0x00,
381                         .maximum = 0x01,
382                         .step = 0x01,
383                         .default_value = 0x00,
384                         .flags = 0,
385                 },
386                 {
387                         .id = SN9C102_V4L2_CID_GAMMA,
388                         .type = V4L2_CTRL_TYPE_BOOLEAN,
389                         .name = "rgb gamma",
390                         .minimum = 0x00,
391                         .maximum = 0x01,
392                         .step = 0x01,
393                         .default_value = 0x00,
394                         .flags = 0,
395                 },
396         },
397         .get_ctrl = &ov7630_get_ctrl,
398         .set_ctrl = &ov7630_set_ctrl,
399         .cropcap = {
400                 .bounds = {
401                         .left = 0,
402                         .top = 0,
403                         .width = 640,
404                         .height = 480,
405                 },
406                 .defrect = {
407                         .left = 0,
408                         .top = 0,
409                         .width = 640,
410                         .height = 480,
411                 },
412         },
413         .set_crop = &ov7630_set_crop,
414         .pix_format = {
415                 .width = 640,
416                 .height = 480,
417                 .pixelformat = V4L2_PIX_FMT_SN9C10X,
418                 .priv = 8,
419         },
420         .set_pix_format = &ov7630_set_pix_format
421 };
422
423
424 int sn9c102_probe_ov7630(struct sn9c102_device* cam)
425 {
426         int pid, ver, err = 0;
427
428         switch (sn9c102_get_bridge(cam)) {
429         case BRIDGE_SN9C101:
430         case BRIDGE_SN9C102:
431         err += sn9c102_write_reg(cam, 0x01, 0x01);
432         err += sn9c102_write_reg(cam, 0x00, 0x01);
433         err += sn9c102_write_reg(cam, 0x28, 0x17);
434                 break;
435         case BRIDGE_SN9C103: /* do _not_ change anything! */
436                 err += sn9c102_write_reg(cam, 0x09, 0x01);
437                 err += sn9c102_write_reg(cam, 0x42, 0x01);
438                 err += sn9c102_write_reg(cam, 0x28, 0x17);
439                 err += sn9c102_write_reg(cam, 0x44, 0x02);
440                 pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
441                 if (err || pid < 0) { /* try a different initialization */
442                         err = sn9c102_write_reg(cam, 0x01, 0x01);
443                         err += sn9c102_write_reg(cam, 0x00, 0x01);
444                 }
445                 break;
446         default:
447                 break;
448         }
449
450         pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
451         ver = sn9c102_i2c_try_read(cam, &ov7630, 0x0b);
452         if (err || pid < 0 || ver < 0)
453                 return -EIO;
454         if (pid != 0x76 || ver != 0x31)
455                 return -ENODEV;
456         sn9c102_attach_sensor(cam, &ov7630);
457
458         return 0;
459 }